Re: Converting to DM SERIAL for Kirkwood boards

[Stefan Roese]

Hi Tony,

On 12/19/22 07:17, Stefan Roese wrote:




git checkout 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3
Previous HEAD position was 3b44b3fdf2 arm: mvebu: Add support for
programming LD0 and LD1 eFuse
HEAD is now at 37bb396669 timer: orion-timer: Only init timer once

This is where the Pogo V4 was frozen during boot. Among the Kirkwood
boards that I have and used for testing, it is the only one that has
CONFIG_BOOTSTAGE=y.


Thanks for testing and git bi-secting.


Should I create a new post for would like to continue this topic here
in this thread?


Let me check, if I can find the root cause and this problem quickly. If
not, then we should probably disable CONFIG_BOOTSTAGE on the Pogo v4 for
a short while until we've fixed this issue.


I fail to spot the problem with this small commit 37bb396669b27a. I can
also not reproduce this on my Armada XP board - it uses SPL though, this
might make a difference.

Could you perhaps apply this attached debug patch and make sure, that
you have DEBUG_UART enabled in your Pogo v4 config. And boot into the
resulting image.

Thanks,
Stefandiff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
index d0eab3ce781d..8c5cfa46762c 100644
--- a/drivers/timer/orion-timer.c
+++ b/drivers/timer/orion-timer.c
@@ -5,6 +5,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define TIMER_CTRL		0x00
 #define TIMER0_EN		BIT(0)
@@ -33,6 +34,7 @@ static void orion_timer_init(void *base, enum input_clock_type type)
 		return;
 	early_init_done = true;
 
+	printch('1'); // test-only
 	writel(~0, base + TIMER0_VAL);
 	writel(~0, base + TIMER0_RELOAD);
 
@@ -56,6 +58,7 @@ static uint64_t orion_timer_get_count(void *base)
 /* Early (e.g. bootstage etc) timer functions */
 static void notrace timer_early_init(void)
 {
+	printch('2'); // test-only
 	if (IS_ENABLED(CONFIG_ARCH_MVEBU))
 		orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_25MHZ);
 	else
@@ -90,6 +93,7 @@ ulong timer_get_boot_us(void)
 {
 	u64 ticks;
 
+	printch('3'); // test-only
 	ticks = timer_early_get_count();
 	return lldiv(ticks * 1000, timer_early_get_rate());
 }
@@ -108,6 +112,7 @@ static int orion_timer_probe(struct udevice *dev)
 	enum input_clock_type type = dev_get_driver_data(dev);
 	struct orion_timer_priv *priv = dev_get_priv(dev);
 
+	printch('4'); // test-only
 	priv->base = devfdt_remap_addr_index(dev, 0);
 	if (!priv->base) {
 		debug("unable to map registers\n");

Re: [PATCH v4 3/5] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree

[Kever Yang]

Hi Quentin,

    I got below error for this patch:

+arch/arm/mach-rockchip/px30/px30.c: In function 'spl_perform_fixups':
2782 
+arch/arm/mach-rockchip/px30/px30.c:475:18: 
error: implicit declaration of function 'fdt_find_or_add_subnode'; did 
you mean 'fdt_for_each_subnode'? [-Werror=implicit-function-declaration]
2783 
+ 
475 | chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
2784 
+ 
| ^~~
2785 
+ 
| fdt_for_each_subnode



Thanks,
- Kever
On 2022/11/29 20:19, Quentin Schulz wrote:

From: Quentin Schulz

It is possible to boot U-Boot proper from a different storage medium
than the one used by the BOOTROM to load the SPL. This information is
stored in the u-boot,spl-boot-device Device Tree property and is
accessible from U-Boot proper so that it has knowledge at runtime where
it was loaded from.

Let's add support for this feature for px30.

Cc: Quentin Schulz
Signed-off-by: Quentin Schulz
---
  arch/arm/mach-rockchip/px30/px30.c | 50 ++
  1 file changed, 50 insertions(+)

diff --git a/arch/arm/mach-rockchip/px30/px30.c 
b/arch/arm/mach-rockchip/px30/px30.c
index 481b50235e..5f26128d01 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -6,6 +6,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -427,3 +428,52 @@ void board_debug_uart_init(void)
  #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
  }
  #endif /* CONFIG_DEBUG_UART_BOARD_INIT */
+
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char *spl_decode_boot_device(u32 boot_device)
+{
+   int i;
+   static const struct {
+   u32 boot_device;
+   const char *ofpath;
+   } spl_boot_devices_tbl[] = {
+   { BOOT_DEVICE_MMC2, "/mmc@ff37" },
+   { BOOT_DEVICE_MMC1, "/mmc@ff39" },
+   };
+
+   for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
+   if (spl_boot_devices_tbl[i].boot_device == boot_device)
+   return spl_boot_devices_tbl[i].ofpath;
+
+   return NULL;
+}
+
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+   void *blob = spl_image->fdt_addr;
+   const char *boot_ofpath;
+   int chosen;
+
+   /*
+* Inject the ofpath of the device the full U-Boot (or Linux in
+* Falcon-mode) was booted from into the FDT, if a FDT has been
+* loaded at the same time.
+*/
+   if (!blob)
+   return;
+
+   boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
+   if (!boot_ofpath) {
+   pr_err("%s: could not map boot_device to ofpath\n", __func__);
+   return;
+   }
+
+   chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
+   if (chosen < 0) {
+   pr_err("%s: could not find/create '/chosen'\n", __func__);
+   return;
+   }
+   fdt_setprop_string(blob, chosen,
+  "u-boot,spl-boot-device", boot_ofpath);
+}
+#endif

Re: [PATCH 2/2] efi_selftest: conformance test for GetNextVariableName

[Ilias Apalodimas]

Hi Heinrich

On Sun, 18 Dec 2022 at 08:09, Heinrich Schuchardt
 wrote:
>
> Test that GetNextVariableName() checks the parameters.
>
> Signed-off-by: Heinrich Schuchardt 
> ---
>  lib/efi_selftest/efi_selftest_variables.c | 35 +++
>  1 file changed, 35 insertions(+)
>
> diff --git a/lib/efi_selftest/efi_selftest_variables.c 
> b/lib/efi_selftest/efi_selftest_variables.c
> index dc1d5c8f43..c7a3fdbaa6 100644
> --- a/lib/efi_selftest/efi_selftest_variables.c
> +++ b/lib/efi_selftest/efi_selftest_variables.c
> @@ -141,6 +141,41 @@ static int execute(void)
> return EFI_ST_FAILURE;
> }
> /* Enumerate variables */
> +
> +   ret = runtime->get_next_variable_name(NULL, u"efi_st_var1", );
> +   if (ret != EFI_INVALID_PARAMETER) {
> +   efi_st_error("GetNextVariableName missing parameter check\n");
> +   return EFI_ST_FAILURE;
> +   }
> +
> +   len = 24;
> +   ret = runtime->get_next_variable_name(, NULL, );
> +   if (ret != EFI_INVALID_PARAMETER) {
> +   efi_st_error("GetNextVariableName missing parameter check\n");
> +   return EFI_ST_FAILURE;
> +   }
> +
> +   len = 24;
> +   ret = runtime->get_next_variable_name(, u"efi_st_var1", NULL);
> +   if (ret != EFI_INVALID_PARAMETER) {
> +   efi_st_error("GetNextVariableName missing parameter check\n");
> +   return EFI_ST_FAILURE;
> +   }
> +
> +   len = 1;
> +   ret = runtime->get_next_variable_name(, u"", );
> +   if (ret != EFI_INVALID_PARAMETER) {
> +   efi_st_error("GetNextVariableName missing parameter check\n");
> +   return EFI_ST_FAILURE;
> +   }
> +
> +   len = 16;
> +   ret = runtime->get_next_variable_name(, u"efi_st_var1", );
> +   if (ret != EFI_INVALID_PARAMETER) {
> +   efi_st_error("GetNextVariableName missing parameter check\n");
> +   return EFI_ST_FAILURE;
> +   }

I am assuming the name or guid don't exist for this test?

Regards
/Ilias
> +
> boottime->set_mem(, 16, 0);
> *varname = 0;
> flag = 0;
> --
> 2.37.2
>

[PATCH v4 1/2] arm: mediatek: add mt8195 SOC support

[Macpaul Lin]

From: Fabien Parent 

The MediaTek MT8195 is a ARM64-based SoC with a quad-core Cortex-A73 and
a quad-core Cortex-A53. It is including UART, SPI, USB3.0 device and hosts,
SD and MMC cards, UFS, PWM, I2C, I2S, S/PDIF, and several LPDDR3
and LPDDR4 options.

Signed-off-by: Fabien Parent 
Signed-off-by: Macpaul Lin 
---
 MAINTAINERS|   2 +
 arch/arm/dts/mt8195.dtsi   | 370 +
 arch/arm/mach-mediatek/Kconfig |  13 +-
 arch/arm/mach-mediatek/Makefile|   1 +
 arch/arm/mach-mediatek/mt8195/Makefile |   3 +
 arch/arm/mach-mediatek/mt8195/init.c   |  81 ++
 6 files changed, 469 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/mt8195.dtsi
 create mode 100644 arch/arm/mach-mediatek/mt8195/Makefile
 create mode 100644 arch/arm/mach-mediatek/mt8195/init.c

Changes for v2:
 - Correct node name to t-phy for u3phy0.
 - Add platform compatible string "mediatek,mt8195-tphy" to all usb phy nodes.
 - remove clock nodes that software cannot controlled in phy nodes.
 - Test and add back "mac" for HOST only xhci nodes.

Changes for v3:
 - Revise device node name from "xhciX: xhciX@" to "xhciX: xhci@".

Changes for v4:
 - No change.

diff --git a/MAINTAINERS b/MAINTAINERS
index 75b27bc1cc..f2fe78dfc7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -363,8 +363,10 @@ ARM MEDIATEK
 M: Ryder Lee 
 M: Weijie Gao 
 M: Chunfeng Yun 
+M: Macpaul Lin 
 R: GSS_MTK_Uboot_upstream 
 S: Maintained
+F: arch/arm/dts/mt8195.dtsi
 F: arch/arm/mach-mediatek/
 F: arch/arm/include/asm/arch-mediatek/
 F: board/mediatek/
diff --git a/arch/arm/dts/mt8195.dtsi b/arch/arm/dts/mt8195.dtsi
new file mode 100644
index 00..bb6dead834
--- /dev/null
+++ b/arch/arm/dts/mt8195.dtsi
@@ -0,0 +1,370 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Copyright (C) 2022 BayLibre, SAS
+ * Author: Ben Ho 
+ * Erin Lo 
+ * Fabien Parent 
+ * Macpaul Lin 
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   compatible = "mediatek,mt8195";
+   interrupt-parent = <>;
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu-map {
+   cluster0 {
+   core0 {
+   cpu = <>;
+   };
+   core1 {
+   cpu = <>;
+   };
+   core2 {
+   cpu = <>;
+   };
+   core3 {
+   cpu = <>;
+   };
+   };
+
+   cluster1 {
+   core0 {
+   cpu = <>;
+   };
+   core1 {
+   cpu = <>;
+   };
+   core2 {
+   cpu = <>;
+   };
+   core3 {
+   cpu = <>;
+   };
+   };
+   };
+
+   cpu0: cpu@0 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x000>;
+   enable-method = "psci";
+   capacity-dmips-mhz = <741>;
+   };
+
+   cpu1: cpu@1 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x001>;
+   enable-method = "psci";
+   capacity-dmips-mhz = <741>;
+   };
+
+   cpu2: cpu@2 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x002>;
+   enable-method = "psci";
+   capacity-dmips-mhz = <741>;
+   };
+
+   cpu3: cpu@3 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a53";
+   reg = <0x003>;
+   enable-method = "psci";
+   capacity-dmips-mhz = <741>;
+   };
+
+   cpu4: cpu@100 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a73";
+   reg = <0x100>;
+   enable-method = "psci";
+   capacity-dmips-mhz = <1024>;
+   };
+
+   cpu5: cpu@101 {
+   

[PATCH v4 2/2] board: mediatek: add mt8195 demo board

[Macpaul Lin]

From: Fabien Parent 

Add mt8195-demo board support.
This demo purpose board uses MediaTek's MT8195 SoC.

Signed-off-by: Fabien Parent 
Signed-off-by: Amjad Ouled-Ameur 
Signed-off-by: Macpaul Lin 
---
 MAINTAINERS |   1 +
 arch/arm/dts/Makefile   |   1 +
 arch/arm/dts/mt8195-demo.dts| 109 
 board/mediatek/mt8195/MAINTAINERS   |   6 ++
 board/mediatek/mt8195/Makefile  |   3 +
 board/mediatek/mt8195/mt8195_demo.c |  38 ++
 configs/mt8195_demo_defconfig   |  89 +++
 include/configs/mt8195.h|  28 +++
 8 files changed, 275 insertions(+)
 create mode 100644 arch/arm/dts/mt8195-demo.dts
 create mode 100644 board/mediatek/mt8195/MAINTAINERS
 create mode 100644 board/mediatek/mt8195/Makefile
 create mode 100644 board/mediatek/mt8195/mt8195_demo.c
 create mode 100644 configs/mt8195_demo_defconfig
 create mode 100644 include/configs/mt8195.h

Changes for v2 and v3:
 - no change.

Changes for v4:
 - Remove CONFIG_SYS_NS16550 related settings in mt8195.h
 - Tested with u-boot/next.

diff --git a/MAINTAINERS b/MAINTAINERS
index f2fe78dfc7..3c7db798be 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -390,6 +390,7 @@ F:  drivers/watchdog/mtk_wdt.c
 F: drivers/net/mtk_eth.c
 F: drivers/net/mtk_eth.h
 F: drivers/reset/reset-mediatek.c
+F: include/configs/mt8195.h
 F: tools/mtk_image.c
 F: tools/mtk_image.h
 F: tools/mtk_nand_headers.c
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b3baaf4829..5ab10ac3db 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1278,6 +1278,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7986a-emmc-rfb.dtb \
mt7986b-emmc-rfb.dtb \
mt8183-pumpkin.dtb \
+   mt8195-demo.dtb \
mt8512-bm1-emmc.dtb \
mt8516-pumpkin.dtb \
mt8518-ap1-emmc.dtb
diff --git a/arch/arm/dts/mt8195-demo.dts b/arch/arm/dts/mt8195-demo.dts
new file mode 100644
index 00..bd0952b248
--- /dev/null
+++ b/arch/arm/dts/mt8195-demo.dts
@@ -0,0 +1,109 @@
+// SPDX-License-Identifier: GPL-2.0 OR MIT
+/*
+ * Copyright (C) 2022 MediaTek Inc.
+ * Copyright (C) 2022 BayLibre SAS.
+ * Author: Macpaul Lin 
+ * Author: Fabien Parent 
+ */
+
+/dts-v1/;
+
+#include 
+#include "mt8195.dtsi"
+
+/ {
+   model = "MediaTek MT8195 demo board";
+   compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
+
+   memory@4000 {
+   device_type = "memory";
+   reg = <0 0x4000 0 0x8000>;
+   };
+
+   reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
+   bl31_secmon_reserved: secmon@5460 {
+   no-map;
+   reg = <0 0x5460 0x0 0x20>;
+   };
+
+   /* 12 MiB reserved for OP-TEE (BL32)
+* +---+ 0x43e0_
+* |  SHMEM 2MiB   |
+* +---+ 0x43c0_
+* || TA_RAM  8MiB |
+* + TZDRAM +--+ 0x4340_
+* || TEE_RAM 2MiB |
+* +---+ 0x4320_
+*/
+   optee_reserved: optee@4320 {
+   no-map;
+   reg = <0 0x4320 0 0x00c0>;
+   };
+   };
+
+   chosen {
+   stdout-path = 
+   };
+
+   reg_1p8v: regulator-1p8v {
+   compatible = "regulator-fixed";
+   regulator-name = "fixed-1.8V";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+
+   reg_3p3v: regulator-3p3v {
+   compatible = "regulator-fixed";
+   regulator-name = "fixed-3.3V";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   regulator-boot-on;
+   regulator-always-on;
+   };
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   bus-width = <4>;
+   max-frequency = <2>;
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+   cap-mmc-hw-reset;
+   vmmc-supply = <_3p3v>;
+   vqmmc-supply = <_1p8v>;
+   non-removable;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   mediatek,force-vbus;
+   maximum-speed = "high-speed";
+   dr_mode = "peripheral";
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};
diff --git a/board/mediatek/mt8195/MAINTAINERS 
b/board/mediatek/mt8195/MAINTAINERS
new file mode 100644
index 00..01fa25115d
--- /dev/null
+++ b/board/mediatek/mt8195/MAINTAINERS

Re: Converting to DM SERIAL for Kirkwood boards

[Stefan Roese]

Hi Tony,

On 12/19/22 01:17, Tony Dinh wrote:

Hi Stefan,

On Fri, Dec 16, 2022 at 1:49 PM Tony Dinh  wrote:


Hi Stefan,
Yes, I also think we need Kconfig changes for Kirwood. I will try that
and send in patches.

Hi Pali,
I hope debugging this will be a bit quicker now that I can tell that
it got stuck (hung or infinite loop) in nand_init() in
./common/board_r.c.

U-Boot 2023.01-rc3-00048-gc917865c7f-dirty (Dec 15 2022 - 21:20:41 -0800)
Pogoplug V4
SoC:   Kirkwood 88F6281_A1
Model: Cloud Engines PogoPlug Series 4
DRAM:  128 MiB
Core:  19 devices, 15 uclasses, devicetree: separate
NAND:



As Pali suggested, I did a git bisect to track down the Pogo V4
problem. And the result is that perhaps we missed testing commit
37bb396669 in rc1. If I go back one commit from this one, it is
working fine. So I think the orion_timer itself is working very well
with no problem.

git checkout 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3
Previous HEAD position was 3b44b3fdf2 arm: mvebu: Add support for
programming LD0 and LD1 eFuse
HEAD is now at 37bb396669 timer: orion-timer: Only init timer once

This is where the Pogo V4 was frozen during boot. Among the Kirkwood
boards that I have and used for testing, it is the only one that has
CONFIG_BOOTSTAGE=y.


Thanks for testing and git bi-secting.


Should I create a new post for would like to continue this topic here
in this thread?


Let me check, if I can find the root cause and this problem quickly. If
not, then we should probably disable CONFIG_BOOTSTAGE on the Pogo v4 for
a short while until we've fixed this issue.

Thanks,
Stefan

Pull request: u-boot-rockchip-20221219

[Kever Yang]

Hi Tom,

Please pull the rockchip updates:
- Only call binman when TPL available;
- rk3128 DTS fix;
- Fix GPT table corruption for rk3399 puma ;
- Fix i2c for rk3399 Pinebookpro;
- Enable UEFI capsule update for RockPi4;

Gitlab ci:
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip/pipelines/14459

Thanks,
- Kever

The following changes since commit 9bd3d354a1a0712ac27c717df9ad60566b0406ee:

  Merge https://source.denx.de/u-boot/custodians/u-boot-x86 (2022-12-15 
13:06:00 -0500)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-rockchip.git 
tags/u-boot-rockchip-20221219

for you to fetch changes up to bdd3a47e025759549dcbfe2ea549e458e3b767d0:

  rockpi4: capsule: Enable UEFI capsule update on RockPi4 boards (2022-12-19 
10:56:12 +0800)


FUKAUMI Naoki (2):
  rockchip: enable fdt overlays for ROCK Pi 4 series
  arm: dts: rockchip: enable ums/rockusb command for ROCK Pi 4

Johan Jonker (5):
  rockchip: rk3128-cru: sync the clock dt-binding header from Linux
  arm: dts: rockchip: rk3128: bulk convert gpios to their constant 
counterparts
  arm: dts: rockchip: move all rk3128 u-boot specific properties in 
separate dtsi files
  arm: dts: rockchip: rk3128: fix DT node names
  arm: dts: rockchip: rk3128: fix clocks, compatible and phys

John Keeping (1):
  phy: rockchip: handle clock without enable function

Kever Yang (1):
  rockchip: Only call binman when TPL available

Manoj Sai (1):
  configs:rockchip:roc-rk3399-pc:Enable more configs

Michal Suchanek (1):
  rockchip: Pinebook Pro: Do not initialize i2c before relocation

Quentin Schulz (1):
  rockchip: puma: fix GPT table corruption when saving U-Boot environment

Sughosh Ganu (3):
  rockchip: capsule: Add functions for supporting capsule updates
  rockpi4: board: Add firmware image information for capsule updates
  rockpi4: capsule: Enable UEFI capsule update on RockPi4 boards

 arch/arm/dts/rk3128-evb-u-boot.dtsi   |   7 +
 arch/arm/dts/rk3128-evb.dts   |  19 ++-
 arch/arm/dts/rk3128-u-boot.dtsi   |  19 +++
 arch/arm/dts/rk3128.dtsi  | 209 +++-
 arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi  |   8 -
 arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi   |   2 +-
 arch/arm/dts/rockchip-u-boot.dtsi |   2 +-
 arch/arm/include/asm/arch-rockchip/misc.h |   1 +
 arch/arm/mach-rockchip/Kconfig|   1 +
 arch/arm/mach-rockchip/board.c| 153 ++
 board/rockchip/evb_rk3399/evb-rk3399.c|  55 ++-
 configs/puma-rk3399_defconfig |   1 +
 configs/roc-pc-rk3399_defconfig   |   8 +
 configs/rock-pi-4-rk3399_defconfig|  12 ++
 configs/rock-pi-4c-rk3399_defconfig   |  12 ++
 drivers/clk/rockchip/clk_rk3128.c |   8 +-
 drivers/phy/rockchip/phy-rockchip-inno-usb2.c |   2 +-
 include/configs/rk3399_common.h   |  16 ++
 include/dt-bindings/clock/rk3128-cru.h| 222 ++
 19 files changed, 549 insertions(+), 208 deletions(-)
 create mode 100644 arch/arm/dts/rk3128-evb-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3128-u-boot.dtsi

Re: [PATCH v3 2/2] board: mediatek: add mt8195 demo board

[Macpaul Lin]

On 12/13/22 03:02, Tom Rini wrote:

On Mon, Dec 12, 2022 at 01:53:05PM -0500, Tom Rini wrote:

On Mon, Dec 12, 2022 at 11:53:04AM -0500, Tom Rini wrote:

On Thu, Nov 10, 2022 at 03:34:53PM +0800, Macpaul Lin wrote:


From: Fabien Parent 

Add mt8195-demo board support.
This demo purpose board uses MediaTek's MT8195 SoC.

Signed-off-by: Fabien Parent 
Signed-off-by: Amjad Ouled-Ameur 
Signed-off-by: Macpaul Lin 

[snip]

+#include 
+
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE-4
+#define CONFIG_SYS_NS16550_MEM32
+#define CONFIG_SYS_NS16550_COM10x11002000
+#define CONFIG_SYS_NS16550_CLK 2600


This is unused, I believe.  But when trying to build with current next I
get:
Error: Load Address must be set.
Error: Bad parameters for image type

Please rebase on top of current next and repost, thanks!


Thanks for the information, will send patch v4 later.



Sorry for the noise, this failed due to another patch that needs to be
reworked instead.


Welp, I should have finished my re-testing.  The patch that broke
phycore-rk3288 and I assumed broke this platform too, did not break this
platform, there's still some other problem here.



I've tested it on uboot/next and got the following result.

$ make ARCH=arm phycore-rk3288_defconfig
$ make ARCH=arm
scripts/kconfig/conf  --syncconfig Kconfig
  UPD include/config.h
  CFG u-boot.cfg
  GEN include/autoconf.mk
  GEN include/autoconf.mk.dep
  CFG spl/u-boot.cfg
  GEN spl/include/autoconf.mk
  UPD include/config/uboot.release
  UPD include/generated/version_autogenerated.h
  UPD include/generated/timestamp_autogenerated.h
  UPD include/generated/dt.h
  ENVCinclude/generated/env.txt
  ENVPinclude/generated/env.in
  ENVTinclude/generated/environment.h
  CC  lib/asm-offsets.s
cc1: error: bad value (‘generic-armv7-a’) for ‘-mtune=’ switch
cc1: note: valid arguments to ‘-mtune=’ switch are: nocona core2 nehalem 
corei7 westmere sandybridge corei7-avx ivybridge core-avx-i haswell 
core-avx2 broadwell skylake skylake-avx512 bonnell atom silvermont slm 
knl intel x86-64 eden-x2 nano nano-1000 nano-2000 nano-3000 nano-x2 
eden-x4 nano-x4 k8 k8-sse3 opteron opteron-sse3 athlon64 athlon64-sse3 
athlon-fx amdfam10 barcelona bdver1 bdver2 bdver3 bdver4 znver1 btver1 
btver2 generic

scripts/Makefile.build:147: recipe for target 'lib/asm-offsets.s' failed
make[1]: *** [lib/asm-offsets.s] Error 1
Makefile:1932: recipe for target 'prepare0' failed
make: *** [prepare0] Error 2


I'm not sure should I test it on custodian tree: arm/next, too. This
failure seems not related to the 2nd patch of mt8195-demo board.

Thanks
Macpaul Lin

Re: [PATCH u-boot] powerpc/mpc85xx: Pass correct cpu compiler flags

[Vagrant Cascadian]

On 2022-12-13, Pali Rohár wrote:
> Vagrant and Aurelien, could you test if this change fully fixes your
> Debian issue?

Well, apparently the issue has been fixed some other way, as u-boot
2022.03-rc3 builds the qemu-ppce500 target fine in Debian with binutils
2.39.50.20221208-5 even without the old patch applied...

... that said, it also builds with this proposed patch applied, so if it
is more correct, that seems ok to me too.

I haven't tested the resulting u-boot binaries, just that they build
successfully.

Hope that is helpful!

live well,
  vagrant


signature.asc
Description: PGP signature

[PATCH v3] doc: add texinfodocs and infodocs targets

[Maxim Cournoyer]

Sphinx supports generating Texinfo sources and Info documentation,
which can be navigated easily and is convenient to search (via the
indexed nodes or anchors, for example).  This is basically the same as
1f050e904dd6f2955eecbd22031d912ccb2e7683, which was recently applied
to the Linux kernel.

Signed-off-by: Maxim Cournoyer 
---

Changes in v3:
- Adjust texinfo target and direntry names, description in doc/conf.py
- Equally adjust the man page name, for consistency

Changes in v2:
- Do not invoke nonexistent 'sphinx-pre-install' script

 Makefile   |  2 +-
 doc/Makefile   | 10 ++
 doc/conf.py|  6 +++---
 doc/media/Makefile |  3 ++-
 4 files changed, 16 insertions(+), 5 deletions(-)

diff --git a/Makefile b/Makefile
index de5746399a..597a8886c3 100644
--- a/Makefile
+++ b/Makefile
@@ -2372,7 +2372,7 @@ tcheck:
 # Documentation targets
 # ---
 DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \
-  linkcheckdocs dochelp refcheckdocs
+  linkcheckdocs dochelp refcheckdocs texinfodocs infodocs
 PHONY += $(DOC_TARGETS)
 $(DOC_TARGETS): scripts_basic FORCE
$(Q)$(MAKE) $(build)=doc $@
diff --git a/doc/Makefile b/doc/Makefile
index f5de65e927..d0904a9f99 100644
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -69,6 +69,14 @@ quiet_cmd_sphinx = SPHINX  $@ --> file://$(abspath 
$(BUILDDIR)/$3/$4)
 htmldocs:
@+$(foreach var,$(SPHINXDIRS),$(call 
loop_cmd,sphinx,html,$(var),,$(var)))
 
+texinfodocs:
+   @+$(foreach var,$(SPHINXDIRS),$(call 
loop_cmd,sphinx,texinfo,$(var),texinfo,$(var)))
+
+# Note: the 'info' Make target is generated by sphinx itself when
+# running the texinfodocs target defined above.
+infodocs: texinfodocs
+   $(MAKE) -C $(BUILDDIR)/texinfo info
+
 linkcheckdocs:
@$(foreach var,$(SPHINXDIRS),$(call 
loop_cmd,sphinx,linkcheck,$(var),,$(var)))
 
@@ -109,6 +117,8 @@ cleandocs:
 dochelp:
@echo  ' U-Boot documentation in different formats from ReST:'
@echo  '  htmldocs- HTML'
+   @echo  '  texinfodocs - Texinfo'
+   @echo  '  infodocs- Info'
@echo  '  latexdocs   - LaTeX'
@echo  '  pdfdocs - PDF'
@echo  '  epubdocs- EPUB'
diff --git a/doc/conf.py b/doc/conf.py
index 62c8d31270..3db70f80c1 100644
--- a/doc/conf.py
+++ b/doc/conf.py
@@ -449,7 +449,7 @@ for fn in os.listdir('.'):
 # One entry per manual page. List of tuples
 # (source start file, name, description, authors, manual section).
 man_pages = [
-(master_doc, 'dasuboot', 'The U-Boot Documentation',
+(master_doc, 'u-boot', 'The U-Boot Documentation',
  [author], 1)
 ]
 
@@ -463,8 +463,8 @@ man_pages = [
 # (source start file, target name, title, author,
 #  dir menu entry, description, category)
 texinfo_documents = [
-(master_doc, 'DasUBoot', 'The U-Boot Documentation',
- author, 'DasUBoot', 'One line description of project.',
+(master_doc, 'u-boot', 'The U-Boot Documentation',
+ author, 'U-Boot', 'Boot loader for embedded systems',
  'Miscellaneous'),
 ]
 
diff --git a/doc/media/Makefile b/doc/media/Makefile
index b9b43a34c3..9b32258696 100644
--- a/doc/media/Makefile
+++ b/doc/media/Makefile
@@ -22,10 +22,11 @@ $(BUILDDIR)/linker_lists.h.rst: ${API}/linker_lists.h 
${PARSER} $(SRC_DIR)/linke
 
 # Media build rules
 
-.PHONY: all html epub xml latex
+.PHONY: all html texinfo epub xml latex
 
 all: $(IMGDOT) $(BUILDDIR) ${TARGETS}
 html: all
+texinfo: all
 epub: all
 xml: all
 latex: $(IMGPDF) all

base-commit: 9bd3d354a1a0712ac27c717df9ad60566b0406ee
-- 
2.38.1

[PATCH v2 2/2] eficonfig: avoid SetVariable between GetNextVariableName calls

[Masahisa Kojima]

The current code calls efi_set_variable_int() to delete the
invalid boot option between calls to efi_get_next_variable_name_int(),
it may produce unpredictable results.

This commit moves removal of the invalid boot option outside
of the efi_get_next_variable_name_int() calls.
EFI_NOT_FOUND returned from efi_get_next_variable_name_int()
indicates we retrieved all EFI variables, it should be treated
as EFI_SUCEESS.

To address the checkpatch warning of too many leading tabs,
combine two if statement into one.

Signed-off-by: Masahisa Kojima 
---
Changes in v2:
- fix typos
- use '!guidcmp()' instead of 'guidcmp() == 0'
- remove superfluous malloc() branch

 cmd/eficonfig.c | 54 ++---
 1 file changed, 38 insertions(+), 16 deletions(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 0b07dfc958..ce7175a566 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -2310,13 +2310,14 @@ out:
 efi_status_t eficonfig_delete_invalid_boot_option(struct 
eficonfig_media_boot_option *opt,
  efi_status_t count)
 {
-   u32 i;
efi_uintn_t size;
void *load_option;
+   u32 i, list_size = 0;
struct efi_load_option lo;
u16 *var_name16 = NULL;
u16 varname[] = u"Boot";
efi_status_t ret = EFI_SUCCESS;
+   u16 *delete_index_list = NULL, *p;
efi_uintn_t buf_size;
 
buf_size = 128;
@@ -2331,8 +2332,14 @@ efi_status_t eficonfig_delete_invalid_boot_option(struct 
eficonfig_media_boot_op
efi_uintn_t tmp;
 
ret = efi_next_variable_name(_size, _name16, );
-   if (ret == EFI_NOT_FOUND)
+   if (ret == EFI_NOT_FOUND) {
+   /*
+* EFI_NOT_FOUND indicates we retrieved all EFI 
variables.
+* This should be treated as success.
+*/
+   ret = EFI_SUCCESS;
break;
+   }
if (ret != EFI_SUCCESS)
goto out;
 
@@ -2349,31 +2356,46 @@ efi_status_t 
eficonfig_delete_invalid_boot_option(struct eficonfig_media_boot_op
if (ret != EFI_SUCCESS)
goto next;
 
-   if (size >= sizeof(efi_guid_bootmenu_auto_generated)) {
-   if (guidcmp(lo.optional_data, 
_guid_bootmenu_auto_generated) == 0) {
-   for (i = 0; i < count; i++) {
-   if (opt[i].size == tmp &&
-   memcmp(opt[i].lo, load_option, tmp) 
== 0) {
-   opt[i].exist = true;
-   break;
-   }
+   if (size >= sizeof(efi_guid_bootmenu_auto_generated) &&
+   !guidcmp(lo.optional_data, 
_guid_bootmenu_auto_generated)) {
+   for (i = 0; i < count; i++) {
+   if (opt[i].size == tmp &&
+   memcmp(opt[i].lo, load_option, tmp) == 0) {
+   opt[i].exist = true;
+   break;
}
+   }
 
-   if (i == count) {
-   ret = delete_boot_option(i);
-   if (ret != EFI_SUCCESS) {
-   free(load_option);
-   goto out;
-   }
+   /*
+* The entire list of variables must be retrieved by
+* efi_get_next_variable_name_int() before deleting the 
invalid
+* boot option, just save the index here.
+*/
+   if (i == count) {
+   p = realloc(delete_index_list, sizeof(u32) *
+   (list_size + 1));
+   if (!p) {
+   ret = EFI_OUT_OF_RESOURCES;
+   goto out;
}
+   delete_index_list = p;
+   delete_index_list[list_size++] = index;
}
}
 next:
free(load_option);
}
 
+   /* delete all invalid boot options */
+   for (i = 0; i < list_size; i++) {
+   ret = delete_boot_option(delete_index_list[i]);
+   if (ret != EFI_SUCCESS)
+   goto out;
+   }
+
 out:
free(var_name16);
+   free(delete_index_list);
 
return ret;
 }
-- 
2.17.1

[PATCH v2 1/2] eficonfig: carve out efi_get_next_variable_name_int calls

[Masahisa Kojima]

To retrieve the EFI variable name by efi_get_next_variable_name_int(),
the sequence of alloc -> efi_get_next_variable_name_int ->
realloc -> efi_get_next_variable_name_int is required.
In current code, this sequence repeatedly appears in
the several functions. It should be curved out a common function.

This commit also fixes the missing free() of var_name16
in eficonfig_delete_invalid_boot_option().

Signed-off-by: Masahisa Kojima 
---
Changes in v2:
- fix typo in the commit message
- rename efi_get_variable_name to efi_next_variable_name

 cmd/eficonfig.c | 62 +
 include/efi_loader.h|  2 ++
 lib/efi_loader/efi_helper.c | 34 
 3 files changed, 51 insertions(+), 47 deletions(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 394ae67cce..0b07dfc958 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -1683,7 +1683,7 @@ static efi_status_t 
eficonfig_show_boot_selection(unsigned int *selected)
u32 i;
u16 *bootorder;
efi_status_t ret;
-   u16 *var_name16 = NULL, *p;
+   u16 *var_name16 = NULL;
efi_uintn_t num, size, buf_size;
struct efimenu *efi_menu;
struct list_head *pos, *n;
@@ -1718,24 +1718,12 @@ static efi_status_t 
eficonfig_show_boot_selection(unsigned int *selected)
int index;
efi_guid_t guid;
 
-   size = buf_size;
-   ret = efi_get_next_variable_name_int(, var_name16, );
+   ret = efi_next_variable_name(_size, _name16, );
if (ret == EFI_NOT_FOUND)
break;
-   if (ret == EFI_BUFFER_TOO_SMALL) {
-   buf_size = size;
-   p = realloc(var_name16, buf_size);
-   if (!p) {
-   free(var_name16);
-   return EFI_OUT_OF_RESOURCES;
-   }
-   var_name16 = p;
-   ret = efi_get_next_variable_name_int(, var_name16, 
);
-   }
-   if (ret != EFI_SUCCESS) {
-   free(var_name16);
-   return ret;
-   }
+   if (ret != EFI_SUCCESS)
+   goto out;
+
if (efi_varname_is_load_option(var_name16, )) {
/* If the index is included in the BootOrder, skip it */
if (search_bootorder(bootorder, num, index, NULL))
@@ -2026,7 +2014,7 @@ static efi_status_t 
eficonfig_create_change_boot_order_entry(struct efimenu *efi
u32 i;
char *title;
efi_status_t ret;
-   u16 *var_name16 = NULL, *p;
+   u16 *var_name16 = NULL;
efi_uintn_t size, buf_size;
 
/* list the load option in the order of BootOrder variable */
@@ -2054,19 +2042,9 @@ static efi_status_t 
eficonfig_create_change_boot_order_entry(struct efimenu *efi
break;
 
size = buf_size;
-   ret = efi_get_next_variable_name_int(, var_name16, );
+   ret = efi_next_variable_name(_size, _name16, );
if (ret == EFI_NOT_FOUND)
break;
-   if (ret == EFI_BUFFER_TOO_SMALL) {
-   buf_size = size;
-   p = realloc(var_name16, buf_size);
-   if (!p) {
-   ret = EFI_OUT_OF_RESOURCES;
-   goto out;
-   }
-   var_name16 = p;
-   ret = efi_get_next_variable_name_int(, var_name16, 
);
-   }
if (ret != EFI_SUCCESS)
goto out;
 
@@ -2336,10 +2314,10 @@ efi_status_t 
eficonfig_delete_invalid_boot_option(struct eficonfig_media_boot_op
efi_uintn_t size;
void *load_option;
struct efi_load_option lo;
-   u16 *var_name16 = NULL, *p;
+   u16 *var_name16 = NULL;
u16 varname[] = u"Boot";
efi_status_t ret = EFI_SUCCESS;
-   efi_uintn_t varname_size, buf_size;
+   efi_uintn_t buf_size;
 
buf_size = 128;
var_name16 = malloc(buf_size);
@@ -2352,24 +2330,12 @@ efi_status_t 
eficonfig_delete_invalid_boot_option(struct eficonfig_media_boot_op
efi_guid_t guid;
efi_uintn_t tmp;
 
-   varname_size = buf_size;
-   ret = efi_get_next_variable_name_int(_size, var_name16, 
);
+   ret = efi_next_variable_name(_size, _name16, );
if (ret == EFI_NOT_FOUND)
break;
-   if (ret == EFI_BUFFER_TOO_SMALL) {
-   buf_size = varname_size;
-   p = realloc(var_name16, buf_size);
-   if (!p) {
-   free(var_name16);
-   return EFI_OUT_OF_RESOURCES;
- 

[PATCH v2 0/2] fix eficonfig GetNextVariableName calls handling

[Masahisa Kojima]

This series includes refactoring and bugfix of GetNextVariableName
calls in eficonfig.

After "eficonfig: carve out efi_get_next_variable_name_int calls" patch
is merged, I will send the follow-up patch to use common function in
cmd/efidebug.c and cmd/nvedit_efi.c. These files also implement
alloc -> efi_get_next_variable_name_int -> realloc ->
efi_get_next_variable_name_int sequence.

Masahisa Kojima (2):
  eficonfig: carve out efi_get_next_variable_name_int calls
  eficonfig: avoid SetVariable between GetNextVariableName calls

 cmd/eficonfig.c | 114 
 include/efi_loader.h|   2 +
 lib/efi_loader/efi_helper.c |  34 +++
 3 files changed, 88 insertions(+), 62 deletions(-)

-- 
2.17.1

[PATCH 9/9] patman: document default 'send' command

[Maxim Cournoyer]

Document that this command is the default and what it's intended for.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/__main__.py | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/tools/patman/__main__.py b/tools/patman/__main__.py
index 82cef4fc0b..11f19281fb 100755
--- a/tools/patman/__main__.py
+++ b/tools/patman/__main__.py
@@ -56,7 +56,8 @@ parser.add_argument('-H', '--full-help', action='store_true', 
dest='full_help',
 default=False, help='Display the README file')
 
 subparsers = parser.add_subparsers(dest='cmd')
-send = subparsers.add_parser('send')
+send = subparsers.add_parser(
+'send', help='Format, check and email patches (default command)')
 send.add_argument('-i', '--ignore-errors', action='store_true',
dest='ignore_errors', default=False,
help='Send patches email even if patch errors are found')
-- 
2.38.1

[PATCH 6/9] patman: add pytest configuration file

[Maxim Cournoyer]

With this change, a user can run the patman test suite using Pytest
the same as when using 'patman test':

$ cd tools/patman && pytest
[...]
44 passed, 8 warnings in 8.87s

$ ./patman test
Ran 44 tests in 8.460s

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/pytest.ini | 2 ++
 1 file changed, 2 insertions(+)
 create mode 100644 tools/patman/pytest.ini

diff --git a/tools/patman/pytest.ini b/tools/patman/pytest.ini
new file mode 100644
index 00..df3eb518d0
--- /dev/null
+++ b/tools/patman/pytest.ini
@@ -0,0 +1,2 @@
+[pytest]
+addopts = --doctest-modules
-- 
2.38.1

[PATCH 7/9] patman: hide the 'test' action unless test data is available

[Maxim Cournoyer]

Some tests would fail when the test data is not available, so it
doesn't make much sense to expose the action when patman is running
outside of the u-boot git checkout.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/__main__.py | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/tools/patman/__main__.py b/tools/patman/__main__.py
index 5a7756a221..82cef4fc0b 100755
--- a/tools/patman/__main__.py
+++ b/tools/patman/__main__.py
@@ -21,6 +21,7 @@ if __name__ == "__main__":
 # Our modules
 from patman import command
 from patman import control
+from patman import func_test
 from patman import gitutil
 from patman import project
 from patman import settings
@@ -96,9 +97,11 @@ send.add_argument('--smtp-server', type=str,
 
 send.add_argument('patchfiles', nargs='*')
 
-test_parser = subparsers.add_parser('test', help='Run tests')
-test_parser.add_argument('testname', type=str, default=None, nargs='?',
- help="Specify the test to run")
+# Only add the 'test' action if the test data files are available.
+if os.path.exists(func_test.TEST_DATA_DIR):
+test_parser = subparsers.add_parser('test', help='Run tests')
+test_parser.add_argument('testname', type=str, default=None, nargs='?',
+ help="Specify the test to run")
 
 status = subparsers.add_parser('status',
help='Check status of patches in patchwork')
-- 
2.38.1

[PATCH 5/9] patman: rename main script to __main__.py

[Maxim Cournoyer]

This allows running the package as a Python module, like e.g.:

$ python -m patman

It also prevents Pytest from attempting to parse main.py, which
would cause errors.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/{main.py => __main__.py} | 0
 tools/patman/patman   | 2 +-
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename tools/patman/{main.py => __main__.py} (100%)

diff --git a/tools/patman/main.py b/tools/patman/__main__.py
similarity index 100%
rename from tools/patman/main.py
rename to tools/patman/__main__.py
diff --git a/tools/patman/patman b/tools/patman/patman
index 11a5d8e18a..5a427d1942 12
--- a/tools/patman/patman
+++ b/tools/patman/patman
@@ -1 +1 @@
-main.py
\ No newline at end of file
+__main__.py
\ No newline at end of file
-- 
2.38.1

[PATCH 8/9] patman: document how to run test suite via pytest

[Maxim Cournoyer]

Pytest offers useful features such as selecting tests by means of a
regular expression, or running the pdb debugger upon encountering a
test failure.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/patman.rst | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/tools/patman/patman.rst b/tools/patman/patman.rst
index 8c5c9cc2cc..b06399b459 100644
--- a/tools/patman/patman.rst
+++ b/tools/patman/patman.rst
@@ -680,6 +680,12 @@ them:
 
 $ tools/patman/patman test
 
+Alternatively, you can run the test suite via Pytest:
+
+.. code-block:: bash
+
+$ cd tools/patman && pytest
+
 Error handling doesn't always produce friendly error messages - e.g.
 putting an incorrect tag in a commit may provide a confusing message.
 
-- 
2.38.1

[PATCH 4/9] patman: fix test_indent test

[Maxim Cournoyer]

The checkpatch.pl script indentation check now checks that lines start
with tabs an complains otherwise, so to make the test fail, start a
line with spaces.  This is now also emitted as a warning rather than
as a check.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/test_checkpatch.py | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/tools/patman/test_checkpatch.py b/tools/patman/test_checkpatch.py
index 8960cd505f..bd53ae3ca5 100644
--- a/tools/patman/test_checkpatch.py
+++ b/tools/patman/test_checkpatch.py
@@ -4,6 +4,7 @@
 # Tests for U-Boot-specific checkpatch.pl features
 #
 # Copyright (c) 2011 The Chromium OS Authors.
+# Copyright (c) 2022 Maxim Cournoyer 
 #
 
 import os
@@ -257,7 +258,7 @@ index 000..2234c87
 +  rec->name = name;
 +  }
 +  if (!rec->name &&
-+  %ssomething_else) {
++%ssomething_else) {
 +  rec->time_us = (u32)timer_get_us();
 +  rec->name = name;
 +  }
@@ -269,7 +270,7 @@ index 000..2234c87
 signoff = 'Signed-off-by: Simon Glass \n'
 license = '// SPDX-License-Identifier: GPL-2.0+'
 tab = ''
-indent = ''
+indent = tab
 if data_type == 'good':
 pass
 elif data_type == 'no-signoff':
@@ -279,7 +280,7 @@ index 000..2234c87
 elif data_type == 'spaces':
 tab = '   '
 elif data_type == 'indent':
-indent = tab
+indent = '' # must use tabs, not spaces!
 else:
 print('not implemented')
 return data % (signoff, license, tab, indent, tab)
@@ -343,8 +344,8 @@ index 000..2234c87
 self.assertEqual(result.ok, False)
 self.assertEqual(len(result.problems), 1)
 self.assertEqual(result.errors, 0)
-self.assertEqual(result.warnings, 0)
-self.assertEqual(result.checks, 1)
+self.assertEqual(result.warnings, 1)
+self.assertEqual(result.checks, 0)
 self.assertEqual(result.lines, 62)
 os.remove(inf)
 
-- 
2.38.1

[PATCH 3/9] patman: invoke the checkpatch.pl script with '--u-boot'

[Maxim Cournoyer]

This resolves 10 out of 11 test failures seen when running
'tools/patman/patman test', which were caused by a change in the
checkpatch.pl script.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/checkpatch.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py
index d1b902dd96..8755470ddb 100644
--- a/tools/patman/checkpatch.py
+++ b/tools/patman/checkpatch.py
@@ -211,7 +211,7 @@ def check_patch(fname, verbose=False, show_types=False, 
use_tree=False):
 stdout: Full output of checkpatch
 """
 chk = find_check_patch()
-args = [chk]
+args = [chk, '--u-boot']
 if not use_tree:
 args.append('--no-tree')
 if show_types:
-- 
2.38.1

[PATCH 2/9] patman: locate test data files via __file__ and pathlib

[Maxim Cournoyer]

Previously it would rely on the executing script location, which could
break for example when running the tests via 'pytest'.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/func_test.py | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/tools/patman/func_test.py b/tools/patman/func_test.py
index 7b92bc67be..7fa4a00786 100644
--- a/tools/patman/func_test.py
+++ b/tools/patman/func_test.py
@@ -7,6 +7,7 @@
 """Functional tests for checking that patman behaves correctly"""
 
 import os
+import pathlib
 import re
 import shutil
 import sys
@@ -28,6 +29,10 @@ from patman.test_util import capture_sys_output
 import pygit2
 from patman import status
 
+
+TEST_DATA_DIR = pathlib.Path(__file__).parent / 'test/'
+
+
 class TestFunctional(unittest.TestCase):
 """Functional tests for checking that patman behaves correctly"""
 leb = (b'Lord Edmund Blackadd\xc3\xabr '.
@@ -57,8 +62,7 @@ class TestFunctional(unittest.TestCase):
 Returns:
 str: Full path to file in the test directory
 """
-return os.path.join(os.path.dirname(os.path.realpath(sys.argv[0])),
-'test', fname)
+return TEST_DATA_DIR / fname
 
 @classmethod
 def _get_text(cls, fname):
-- 
2.38.1

[PATCH 1/9] patman: cosmetic: Fix PEP 8 warnings for the gitutil module.

[Maxim Cournoyer]

This patch fixes all the PEP 8 warnings reported by Pyflake for the
gitutil module.

Signed-off-by: Maxim Cournoyer 
---

 tools/patman/gitutil.py | 106 
 1 file changed, 65 insertions(+), 41 deletions(-)

diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py
index ceaf2ce150..74c6e94494 100644
--- a/tools/patman/gitutil.py
+++ b/tools/patman/gitutil.py
@@ -2,21 +2,19 @@
 # Copyright (c) 2011 The Chromium OS Authors.
 #
 
-import re
 import os
-import subprocess
 import sys
 
 from patman import command
 from patman import settings
 from patman import terminal
-from patman import tools
 
 # True to use --no-decorate - we check this in setup()
 use_no_decorate = True
 
+
 def log_cmd(commit_range, git_dir=None, oneline=False, reverse=False,
-   count=None):
+count=None):
 """Create a command to perform a 'git log'
 
 Args:
@@ -49,6 +47,7 @@ def log_cmd(commit_range, git_dir=None, oneline=False, 
reverse=False,
 cmd.append('--')
 return cmd
 
+
 def count_commits_to_branch(branch):
 """Returns number of commits between HEAD and the tracking branch.
 
@@ -68,13 +67,14 @@ def count_commits_to_branch(branch):
 rev_range = '@{upstream}..'
 pipe = [log_cmd(rev_range, oneline=True)]
 result = command.run_pipe(pipe, capture=True, capture_stderr=True,
- oneline=True, raise_on_error=False)
+  oneline=True, raise_on_error=False)
 if result.return_code:
 raise ValueError('Failed to determine upstream: %s' %
  result.stderr.strip())
 patch_count = len(result.stdout.splitlines())
 return patch_count
 
+
 def name_revision(commit_hash):
 """Gets the revision name for a commit
 
@@ -91,6 +91,7 @@ def name_revision(commit_hash):
 name = stdout.split(' ')[1].strip()
 return name
 
+
 def guess_upstream(git_dir, branch):
 """Tries to guess the upstream for a branch
 
@@ -109,7 +110,7 @@ def guess_upstream(git_dir, branch):
 """
 pipe = [log_cmd(branch, git_dir=git_dir, oneline=True, count=100)]
 result = command.run_pipe(pipe, capture=True, capture_stderr=True,
- raise_on_error=False)
+  raise_on_error=False)
 if result.return_code:
 return None, "Branch '%s' not found" % branch
 for line in result.stdout.splitlines()[1:]:
@@ -121,6 +122,7 @@ def guess_upstream(git_dir, branch):
 return name, "Guessing upstream as '%s'" % name
 return None, "Cannot find a suitable upstream for branch '%s'" % branch
 
+
 def get_upstream(git_dir, branch):
 """Returns the name of the upstream for a branch
 
@@ -135,10 +137,10 @@ def get_upstream(git_dir, branch):
 """
 try:
 remote = command.output_one_line('git', '--git-dir', git_dir, 'config',
-   'branch.%s.remote' % branch)
+ 'branch.%s.remote' % branch)
 merge = command.output_one_line('git', '--git-dir', git_dir, 'config',
-  'branch.%s.merge' % branch)
-except:
+'branch.%s.merge' % branch)
+except Exception:
 upstream, msg = guess_upstream(git_dir, branch)
 return upstream, msg
 
@@ -149,7 +151,8 @@ def get_upstream(git_dir, branch):
 return '%s/%s' % (remote, leaf), None
 else:
 raise ValueError("Cannot determine upstream branch for branch "
-"'%s' remote='%s', merge='%s'" % (branch, remote, merge))
+ "'%s' remote='%s', merge='%s'"
+ % (branch, remote, merge))
 
 
 def get_range_in_branch(git_dir, branch, include_upstream=False):
@@ -168,6 +171,7 @@ def get_range_in_branch(git_dir, branch, 
include_upstream=False):
 rstr = '%s%s..%s' % (upstream, '~' if include_upstream else '', branch)
 return rstr, msg
 
+
 def count_commits_in_range(git_dir, range_expr):
 """Returns the number of commits in the given range.
 
@@ -180,12 +184,13 @@ def count_commits_in_range(git_dir, range_expr):
 """
 pipe = [log_cmd(range_expr, git_dir=git_dir, oneline=True)]
 result = command.run_pipe(pipe, capture=True, capture_stderr=True,
- raise_on_error=False)
+  raise_on_error=False)
 if result.return_code:
 return None, "Range '%s' not found or is invalid" % range_expr
 patch_count = len(result.stdout.splitlines())
 return patch_count, None
 
+
 def count_commits_in_branch(git_dir, branch, include_upstream=False):
 """Returns the number of commits in the given branch.
 
@@ -201,6 +206,7 @@ def count_commits_in_branch(git_dir, branch, 
include_upstream=False):
 return None, msg
 return count_commits_in_range(git_dir, range_expr)
 
+
 def count_commits(commit_range):
 """Returns the number of 

Re: Pull request for efi-2023-01-rc4

[Tom Rini]

On Sat, Dec 17, 2022 at 03:30:56PM +, Heinrich Schuchardt wrote:

> Dear Tom,
> 
> The following changes since commit 9bd3d354a1a0712ac27c717df9ad60566b0406ee:
> 
>   Merge https://source.denx.de/u-boot/custodians/u-boot-x86 (2022-12-15
> 13:06:00 -0500)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-efi.git
> tags/efi-2023-01-rc4
> 
> for you to fetch changes up to 5b5f6e0d61efe55df5eab82d231f2a483d3f49e7:
> 
>   doc: update Sphinx requirements for certifi (2022-12-17 15:25:52 +)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

Re: Pull request: u-boot-sunxi/master for 2023.01

[Tom Rini]

On Sat, Dec 17, 2022 at 01:51:14AM +, Andre Przywara wrote:

> Hi Tom,
> 
> please pull some fixes for sunxi.
> This cleans up each board's defconfig, and fixes the serial console on
> some Olimex board. Also we lose another legacy config variable.
> The rest are minor cleanups, that actually shouldn't change anything
> in the build.
> 
> Passed the gitlab CI, plus briefly tested on Pine64-LTS, LicheePi Nano,
> and BananaPi M1.
> 
> Thanks,
> Andre
> 
> The following changes since commit c917865c7fd14420d25388bb3c8c24cb03911caf:
> 
>   Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2022-12-12 
> 09:00:58 -0500)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-sunxi.git master
> 
> for you to fetch changes up to 64531496f990c2a63211c72b953dfc084b4c2589:
> 
>   sunxi: board: annotate #endif lines (2022-12-14 22:31:33 +)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Description: PGP signature

Re: [PATCH] doc: add texinfodocs and infodocs targets

[Tom Rini]

On Sat, Dec 17, 2022 at 01:27:52PM +, Heinrich Schuchardt wrote:
> On 12/17/22 02:51, Maxim Cournoyer wrote:
> > Sphinx supports generating Texinfo sources and Info documentation,
> > which can be navigated easily and is convenient to search (via the
> > indexed nodes or anchors, for example).  This is basically the same as
> > 1f050e904dd6f2955eecbd22031d912ccb2e7683, which was recently applied
> > to the Linux kernel.
> > 
> > Signed-off-by: Maxim Cournoyer 
> > ---
> > 
> >   Makefile   |  2 +-
> >   doc/Makefile   | 11 +++
> >   doc/media/Makefile |  3 ++-
> >   3 files changed, 14 insertions(+), 2 deletions(-)
> > 
> > diff --git a/Makefile b/Makefile
> > index de5746399a..597a8886c3 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -2372,7 +2372,7 @@ tcheck:
> >   # Documentation targets
> >   # 
> > ---
> >   DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \
> > -  linkcheckdocs dochelp refcheckdocs
> > +  linkcheckdocs dochelp refcheckdocs texinfodocs infodocs
> >   PHONY += $(DOC_TARGETS)
> >   $(DOC_TARGETS): scripts_basic FORCE
> > $(Q)$(MAKE) $(build)=doc $@
> > diff --git a/doc/Makefile b/doc/Makefile
> > index f5de65e927..62effd0fec 100644
> > --- a/doc/Makefile
> > +++ b/doc/Makefile
> > @@ -69,6 +69,15 @@ quiet_cmd_sphinx = SPHINX  $@ --> file://$(abspath 
> > $(BUILDDIR)/$3/$4)
> >   htmldocs:
> > @+$(foreach var,$(SPHINXDIRS),$(call 
> > loop_cmd,sphinx,html,$(var),,$(var)))
> > 
> > +texinfodocs:
> > +   @$(srctree)/scripts/sphinx-pre-install --version-check
> > +   @+$(foreach var,$(SPHINXDIRS),$(call 
> > loop_cmd,sphinx,texinfo,$(var),texinfo,$(var)))
> > +
> > +# Note: the 'info' Make target is generated by sphinx itself when
> > +# running the texinfodocs target defined above.
> > +infodocs: texinfodocs
> > +   $(MAKE) -C $(BUILDDIR)/texinfo info
> > +
> >   linkcheckdocs:
> > @$(foreach var,$(SPHINXDIRS),$(call 
> > loop_cmd,sphinx,linkcheck,$(var),,$(var)))
> > 
> > @@ -109,6 +118,8 @@ cleandocs:
> >   dochelp:
> > @echo  ' U-Boot documentation in different formats from ReST:'
> > @echo  '  htmldocs- HTML'
> > +   @echo  '  texinfodocs - Texinfo'
> > +   @echo  '  infodocs- Info'
> 
> This does not work:
> 
> $ make infodocs
> make[1]: ./scripts/sphinx-pre-install: No such file or directory
> 
> $ make texinfodocs
> make[1]: ./scripts/sphinx-pre-install: No such file or directory
> make[1]: *** [doc/Makefile:73: texinfodocs] Error 127
> make: *** [Makefile:2378: texinfodocs] Error 2
> 
> @Tom:
> Should we add a build step for each of the new targets to
> .gitlab-ci.yml and .azure-pipelines.yml?

We should rename the job and build all doc targets, once they've been
fixed I think.

-- 
Tom


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Re: [PATCH] Makefile: With BINMAN_ALLOW_MISSING=1 don't error on missing

[Tom Rini]

On Sat, Dec 17, 2022 at 02:40:36PM -0700, Simon Glass wrote:
> Hi Tom,
> 
> On Tue, 13 Dec 2022 at 09:39, Tom Rini  wrote:
> >
> > On Mon, Dec 12, 2022 at 10:59:01PM -0700, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Mon, 12 Dec 2022 at 16:43, Tom Rini  wrote:
> > > >
> > > > On Tue, Dec 06, 2022 at 10:03:37AM -0500, Tom Rini wrote:
> > > > > On Tue, Dec 06, 2022 at 03:36:49PM +1300, Simon Glass wrote:
> > > > > > Hi Tom,
> > > > > >
> > > > > > On Tue, 6 Dec 2022 at 15:03, Tom Rini  wrote:
> > > > > > >
> > > > > > > When the user builds with BINMAN_ALLOW_MISSING=1 they're 
> > > > > > > explicitly
> > > > > > > setting the flag to allow for additional binaries to be missing 
> > > > > > > and so
> > > > > > > have acknowledged the output might not work. In this case we want 
> > > > > > > to
> > > > > > > default to not passing a non-zero exit code.
> > > > > > >
> > > > > > > Cc: Simon Glass 
> > > > > > > Reported-by: Peter Robinson 
> > > > > > > Signed-off-by: Tom Rini 
> > > > > > > ---
> > > > > > > This passes CI as-is:
> > > > > > > https://source.denx.de/u-boot/u-boot/-/pipelines/14340
> > > > > > > ---
> > > > > > >  Makefile | 2 +-
> > > > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > > >
> > > > > > > diff --git a/Makefile b/Makefile
> > > > > > > index de5746399a63..03de1da1bfd0 100644
> > > > > > > --- a/Makefile
> > > > > > > +++ b/Makefile
> > > > > > > @@ -1334,7 +1334,7 @@ cmd_binman = $(srctree)/tools/binman/binman 
> > > > > > > $(if $(BINMAN_DEBUG),-D) \
> > > > > > >  --toolpath $(objtree)/tools \
> > > > > > > $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \
> > > > > > > build -u -d u-boot.dtb -O . -m \
> > > > > > > -   $(if $(BINMAN_ALLOW_MISSING),--allow-missing 
> > > > > > > --fake-ext-blobs) \
> > > > > > > +   $(if $(BINMAN_ALLOW_MISSING),--allow-missing 
> > > > > > > --ignore-missing) \
> > > > > > > -I . -I $(srctree) -I 
> > > > > > > $(srctree)/board/$(BOARDDIR) \
> > > > > > > -I arch/$(ARCH)/dts -a of-list=$(CONFIG_OF_LIST) \
> > > > > > > $(foreach f,$(BINMAN_INDIRS),-I $(f)) \
> > > > > > > --
> > > > > > > 2.25.1
> > > > > > >
> > > > > >
> > > > > > I believe we need the --fake-ext-blobs flag as well, since otherwise
> > > > > > boards which use tools (like mkimage) on things that don't exist 
> > > > > > will
> > > > > > not work.
> > > > >
> > > > > So, we need to list out all the use cases perhaps, as we had missed 
> > > > > one
> > > > > before. In my mind we have:
> > > > > - Board requires 1 or more blobs, developer will be running this on
> > > > >   hardware, expects output from U-Boot 'make' (or buildman) to boot.
> > > > >   Blobs must be present or non-zero exist status by default.
> > > > >   We didn't have this before, and we do now.
> > > > > - Board requires 1 or more blobs AND has optional blobs, will be 
> > > > > running
> > > > >   this on hardware, expects output from U-Boot 'make' (or buildman) to
> > > > >   boot. This is the case we had missed before as allwinner requires 
> > > > > bl31
> > > > >   and has optional PMIC firmware. This is the case Peter reported and 
> > > > > we
> > > > >   had missed before, which this patch allows for, with the caveat that
> > > > >   if you forget BL31 you're not going to boot and make won't complain
> > > > >   exit-code wise. Another way to resolve this would be a property in 
> > > > > the
> > > > >   binman node to mark a blob as optional and warn if missing, rather
> > > > >   than error if missing.
> > > > > - Board requires 1 or more blobs, output will NOT be run. This is the 
> > > > > CI
> > > > >   case and the compile testing lots of board cases. This is what CI
> > > > >   passes still, with the above.
> > > > > - Board requires 1 or more blobs, developer will be running this on
> > > > >   hardware, BUT will be injecting the blobs later on. I think this is
> > > > >   the use case you're talking about?
> > > >
> > > > Simon, can you test this last case by chance? I think that's the one
> > > > that's unclear about if this patch breaks or not and I want to know if I
> > > > need to respin to still include the fake blobs flag still too or not.
> > > > Or does anyone else use this case and can test?
> > >
> > > Yes I have your email printed out but travel and family things have
> > > made it hard to get to it. I do think you need the flag, but the extra
> > > case you mention need another look and probably a test, as you say.
> >
> > Yeah, understandable. My plan is to take this patch before the next -rc,
> > so Fedora won't be broken and if we need the other flag (and I'll check
> > in before release) we can follow up there and have a fixes tag on top of
> > this one here.
> 
> I just sent a patch that allows entries (with external blobs) to be
> marked as optional. I believe this covers the remaining case.
> 
> You still need to keep --fake-ext-blobs (in 

Re: [PATCH] Makefile: With BINMAN_ALLOW_MISSING=1 don't error on missing

[Tom Rini]

On Mon, 5 Dec 2022 21:03:36 -0500, Tom Rini wrote:

> When the user builds with BINMAN_ALLOW_MISSING=1 they're explicitly
> setting the flag to allow for additional binaries to be missing and so
> have acknowledged the output might not work. In this case we want to
> default to not passing a non-zero exit code.
> 
> 

Applied to u-boot/master, thanks!

-- 
Tom

[PATCH 2/2] mtd: spi-nor: Add support for Infineon s25fs256t

[tkuw584924]

From: Takahiro Kuwano 

Infineon S25FS256T is 256Mbit Quad SPI NOR flash. The key features and
differences comparing to other Spansion/Cypress flash familes are:
  - 4-byte address mode by factory default
  - Quad mode is enabled by factory default
  - Supports mixture of 128KB and 64KB sectors by OTP configuration
(this patch supports uniform 128KB only)

Signed-off-by: Takahiro Kuwano 
---
 drivers/mtd/spi/spi-nor-core.c | 47 +++---
 drivers/mtd/spi/spi-nor-ids.c  |  2 ++
 include/linux/mtd/spi-nor.h|  1 +
 3 files changed, 41 insertions(+), 9 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 4e8b4a6769dd..f25b56d9c899 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3195,6 +3195,10 @@ static int spi_nor_setup(struct spi_nor *nor, const 
struct flash_info *info,
 }
 
 #ifdef CONFIG_SPI_FLASH_SPANSION
+
+/* Use ID byte 4 to distinguish S25FS256T and S25Hx-T */
+#define S25FS256T_ID4  (0x08)
+
 static int s25_mdp_ready(struct spi_nor *nor)
 {
u32 addr;
@@ -3234,19 +3238,35 @@ static int s25_setup(struct spi_nor *nor, const struct 
flash_info *info,
 const struct spi_nor_flash_parameter *params)
 {
int ret;
-   u8 cfr3v;
+   u8 cr;
 
 #ifdef CONFIG_SPI_FLASH_BAR
return -ENOTSUPP; /* Bank Address Register is not supported */
 #endif
+   /*
+* S25FS256T has multiple sector architecture options, with selection of
+* count and location of 128KB and 64KB sectors. This driver supports
+* uniform 128KB only due to complexity of non-uniform layout.
+*/
+   if (nor->info->id[4] == S25FS256T_ID4) {
+   ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_ARCFN, 8, );
+   if (ret)
+   return ret;
+
+   if (cr) /* Option 0 (ARCFN[7:0] == 0x00) is uniform */
+   return -EOPNOTSUPP;
+
+   return spi_nor_default_setup(nor, info, params);
+   }
+
/*
 * Read CFR3V to check if uniform sector is selected. If not, assign an
 * erase hook that supports non-uniform erase.
 */
-   ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_CFR3V, 0, );
+   ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_CFR3V, 0, );
if (ret)
return ret;
-   if (!(cfr3v & CFR3V_UNHYSA))
+   if (!(cr & CFR3V_UNHYSA))
nor->erase = s25_erase_non_uniform;
 
/*
@@ -3296,6 +3316,10 @@ static int s25_post_bfpt_fixup(struct spi_nor *nor,
nor->addr_mode_nbytes = 4;
}
 
+   /* The default address mode in S25FS256T is 4. */
+   if (nor->info->id[4] == S25FS256T_ID4)
+   nor->addr_mode_nbytes = 4;
+
/*
 * The page_size is set to 512B from BFPT, but it actually depends on
 * the configuration register. Look up the CFR3V and determine the
@@ -3321,12 +3345,17 @@ static int s25_post_bfpt_fixup(struct spi_nor *nor,
 static void s25_post_sfdp_fixup(struct spi_nor *nor,
struct spi_nor_flash_parameter *params)
 {
-   /* READ_FAST_4B (0Ch) requires mode cycles*/
-   params->reads[SNOR_CMD_READ_FAST].num_mode_clocks = 8;
-   /* PP_1_1_4 is not supported */
-   params->hwcaps.mask &= ~SNOR_HWCAPS_PP_1_1_4;
-   /* Use volatile register to enable quad */
-   params->quad_enable = s25_quad_enable;
+   if (nor->info->id[4] == S25FS256T_ID4) {
+   /* PP_1_1_4 is supported */
+   params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_4;
+   } else {
+   /* READ_FAST_4B (0Ch) requires mode cycles*/
+   params->reads[SNOR_CMD_READ_FAST].num_mode_clocks = 8;
+   /* PP_1_1_4 is not supported */
+   params->hwcaps.mask &= ~SNOR_HWCAPS_PP_1_1_4;
+   /* Use volatile register to enable quad */
+   params->quad_enable = s25_quad_enable;
+   }
 }
 
 static struct spi_nor_fixups s25_fixups = {
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 5f8f3ec955d9..a862fbd707b3 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -294,6 +294,8 @@ const struct flash_info spi_nor_ids[] = {
USE_CLSR) },
{ INFO6("s25hs02gt",  0x342b1c, 0x0f0090, 256 * 1024, 1024,
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
+   { INFO6("s25fs256t",  0x342b19, 0x0f0890, 128 * 1024, 256,
+   SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
 #ifdef CONFIG_SPI_FLASH_S28HX_T
{ INFO("s28hl512t",  0x345a1a,  0, 256 * 1024, 256, 
SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hl01gt",  0x345a1b,  0, 256 * 1024, 512, 
SPI_NOR_OCTAL_DTR_READ) },
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 30f15452aa68..13cfaf2b2da4 100644
--- a/include/linux/mtd/spi-nor.h
+++ 

[PATCH 1/2] mtd: spi-nor: Rename s25hx_t prefix

[tkuw584924]

From: Takahiro Kuwano 

Rename s25hx_t prefix to s25 so that the single set of fixup hooks can
support all other S25 families.

Signed-off-by: Takahiro Kuwano 
---
 drivers/mtd/spi/spi-nor-core.c | 42 +-
 1 file changed, 21 insertions(+), 21 deletions(-)

diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 1ea8363d9f89..4e8b4a6769dd 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3195,7 +3195,7 @@ static int spi_nor_setup(struct spi_nor *nor, const 
struct flash_info *info,
 }
 
 #ifdef CONFIG_SPI_FLASH_SPANSION
-static int s25hx_t_mdp_ready(struct spi_nor *nor)
+static int s25_mdp_ready(struct spi_nor *nor)
 {
u32 addr;
int ret;
@@ -3209,7 +3209,7 @@ static int s25hx_t_mdp_ready(struct spi_nor *nor)
return 1;
 }
 
-static int s25hx_t_quad_enable(struct spi_nor *nor)
+static int s25_quad_enable(struct spi_nor *nor)
 {
u32 addr;
int ret;
@@ -3223,15 +3223,15 @@ static int s25hx_t_quad_enable(struct spi_nor *nor)
return 0;
 }
 
-static int s25hx_t_erase_non_uniform(struct spi_nor *nor, loff_t addr)
+static int s25_erase_non_uniform(struct spi_nor *nor, loff_t addr)
 {
/* Support 32 x 4KB sectors at bottom */
return spansion_erase_non_uniform(nor, addr, SPINOR_OP_BE_4K_4B, 0,
  SZ_128K);
 }
 
-static int s25hx_t_setup(struct spi_nor *nor, const struct flash_info *info,
-const struct spi_nor_flash_parameter *params)
+static int s25_setup(struct spi_nor *nor, const struct flash_info *info,
+const struct spi_nor_flash_parameter *params)
 {
int ret;
u8 cfr3v;
@@ -3247,27 +3247,27 @@ static int s25hx_t_setup(struct spi_nor *nor, const 
struct flash_info *info,
if (ret)
return ret;
if (!(cfr3v & CFR3V_UNHYSA))
-   nor->erase = s25hx_t_erase_non_uniform;
+   nor->erase = s25_erase_non_uniform;
 
/*
 * For the multi-die package parts, the ready() hook is needed to check
 * all dies' status via read any register.
 */
if (nor->mtd.size > SZ_128M)
-   nor->ready = s25hx_t_mdp_ready;
+   nor->ready = s25_mdp_ready;
 
return spi_nor_default_setup(nor, info, params);
 }
 
-static void s25hx_t_default_init(struct spi_nor *nor)
+static void s25_default_init(struct spi_nor *nor)
 {
-   nor->setup = s25hx_t_setup;
+   nor->setup = s25_setup;
 }
 
-static int s25hx_t_post_bfpt_fixup(struct spi_nor *nor,
-  const struct sfdp_parameter_header *header,
-  const struct sfdp_bfpt *bfpt,
-  struct spi_nor_flash_parameter *params)
+static int s25_post_bfpt_fixup(struct spi_nor *nor,
+  const struct sfdp_parameter_header *header,
+  const struct sfdp_bfpt *bfpt,
+  struct spi_nor_flash_parameter *params)
 {
int ret;
u32 addr;
@@ -3318,21 +3318,21 @@ static int s25hx_t_post_bfpt_fixup(struct spi_nor *nor,
return 0;
 }
 
-static void s25hx_t_post_sfdp_fixup(struct spi_nor *nor,
-   struct spi_nor_flash_parameter *params)
+static void s25_post_sfdp_fixup(struct spi_nor *nor,
+   struct spi_nor_flash_parameter *params)
 {
/* READ_FAST_4B (0Ch) requires mode cycles*/
params->reads[SNOR_CMD_READ_FAST].num_mode_clocks = 8;
/* PP_1_1_4 is not supported */
params->hwcaps.mask &= ~SNOR_HWCAPS_PP_1_1_4;
/* Use volatile register to enable quad */
-   params->quad_enable = s25hx_t_quad_enable;
+   params->quad_enable = s25_quad_enable;
 }
 
-static struct spi_nor_fixups s25hx_t_fixups = {
-   .default_init = s25hx_t_default_init,
-   .post_bfpt = s25hx_t_post_bfpt_fixup,
-   .post_sfdp = s25hx_t_post_sfdp_fixup,
+static struct spi_nor_fixups s25_fixups = {
+   .default_init = s25_default_init,
+   .post_bfpt = s25_post_bfpt_fixup,
+   .post_sfdp = s25_post_sfdp_fixup,
 };
 
 static int s25fl256l_setup(struct spi_nor *nor, const struct flash_info *info,
@@ -3850,7 +3850,7 @@ void spi_nor_set_fixups(struct spi_nor *nor)
switch (nor->info->id[1]) {
case 0x2a: /* S25HL (QSPI, 3.3V) */
case 0x2b: /* S25HS (QSPI, 1.8V) */
-   nor->fixups = _t_fixups;
+   nor->fixups = _fixups;
break;
 
 #ifdef CONFIG_SPI_FLASH_S28HX_T
-- 
2.25.1

[PATCH 0/2] Add support for Infineon s25fs256t

[tkuw584924]

From: Takahiro Kuwano 

Infineon S25FS256T is 256Mb QSPI NOR Flash.
https://www.infineon.com/dgdlac/Infineon-S25FS256T_256Mb_SEMPER_Nano_Flash_Quad_SPI_1.8V-DataSheet-v12_00-EN.pdf?fileId=8ac78c8c80027ecd0180740c5a46707a

Tested on Xilinx Zynq-7000 FPGA board.

Takahiro Kuwano (2):
  mtd: spi-nor: s/s25hx_t/s25
  mtd: spi-nor: Add support for s25fs256t

 drivers/mtd/spi/spi-nor-core.c | 87 ++
 drivers/mtd/spi/spi-nor-ids.c  |  2 +
 include/linux/mtd/spi-nor.h|  1 +
 3 files changed, 61 insertions(+), 29 deletions(-)

-- 
2.25.1

Re: Converting to DM SERIAL for Kirkwood boards

[Tony Dinh]

Hi Stefan,

On Fri, Dec 16, 2022 at 1:49 PM Tony Dinh  wrote:
>
> Hi Stefan,
> Yes, I also think we need Kconfig changes for Kirwood. I will try that
> and send in patches.
>
> Hi Pali,
> I hope debugging this will be a bit quicker now that I can tell that
> it got stuck (hung or infinite loop) in nand_init() in
> ./common/board_r.c.
>
> U-Boot 2023.01-rc3-00048-gc917865c7f-dirty (Dec 15 2022 - 21:20:41 -0800)
> Pogoplug V4
> SoC:   Kirkwood 88F6281_A1
> Model: Cloud Engines PogoPlug Series 4
> DRAM:  128 MiB
> Core:  19 devices, 15 uclasses, devicetree: separate
> NAND:
>

As Pali suggested, I did a git bisect to track down the Pogo V4
problem. And the result is that perhaps we missed testing commit
37bb396669 in rc1. If I go back one commit from this one, it is
working fine. So I think the orion_timer itself is working very well
with no problem.

git checkout 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3
Previous HEAD position was 3b44b3fdf2 arm: mvebu: Add support for
programming LD0 and LD1 eFuse
HEAD is now at 37bb396669 timer: orion-timer: Only init timer once

This is where the Pogo V4 was frozen during boot. Among the Kirkwood
boards that I have and used for testing, it is the only one that has
CONFIG_BOOTSTAGE=y.

Should I create a new post for would like to continue this topic here
in this thread?

Thanks,
Tony

[PATCH 2/2] test: cmd: exit: Add unit test for exit and partly run commands

[Marek Vasut]

Add a test which validates that exit from environment script works as
expected, including return value propagation and clipping to positive
integers.

Signed-off-by: Marek Vasut 
---
Cc: Adrian Vovk 
Cc: Hector Palacios 
Cc: Pantelis Antoniou 
Cc: Simon Glass 
Cc: Tom Rini 
---
 include/test/suites.h |   1 +
 test/cmd/Makefile |   2 +-
 test/cmd/exit.c   | 135 ++
 test/cmd_ut.c |   1 +
 4 files changed, 138 insertions(+), 1 deletion(-)
 create mode 100644 test/cmd/exit.c

diff --git a/include/test/suites.h b/include/test/suites.h
index a01000e127b..9ce49cbb031 100644
--- a/include/test/suites.h
+++ b/include/test/suites.h
@@ -38,6 +38,7 @@ int do_ut_compression(struct cmd_tbl *cmdtp, int flag, int 
argc,
  char *const argv[]);
 int do_ut_dm(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_env(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
+int do_ut_exit(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_fdt(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_font(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
 int do_ut_lib(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
diff --git a/test/cmd/Makefile b/test/cmd/Makefile
index bc961df3dce..09e410ec30e 100644
--- a/test/cmd/Makefile
+++ b/test/cmd/Makefile
@@ -8,7 +8,7 @@ endif
 ifdef CONFIG_CONSOLE_RECORD
 obj-$(CONFIG_CMD_PAUSE) += test_pause.o
 endif
-obj-y += mem.o
+obj-y += exit.o mem.o
 obj-$(CONFIG_CMD_ADDRMAP) += addrmap.o
 obj-$(CONFIG_CMD_FDT) += fdt.o
 obj-$(CONFIG_CONSOLE_TRUETYPE) += font.o
diff --git a/test/cmd/exit.c b/test/cmd/exit.c
new file mode 100644
index 000..ca34abef899
--- /dev/null
+++ b/test/cmd/exit.c
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Tests for exit command
+ *
+ * Copyright 2022 Marek Vasut 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Declare a new exit test */
+#define EXIT_TEST(_name, _flags)   UNIT_TEST(_name, _flags, exit_test)
+
+/* Test 'exit addr' getting/setting address */
+static int cmd_exit_test(struct unit_test_state *uts)
+{
+   int i;
+
+   /*
+* Test 'exit' with parameter -3, -2, -1, 0, 1, 2, 3 . Use all those
+* parameters to cover also the special return value -2 that is used
+* in HUSH to detect exit command.
+*
+* Always test whether 'exit' command:
+* - exits out of the 'run' command
+* - return value is propagated out of the 'run' command
+* - return value can be tested on outside of 'run' command
+* - return value can be printed outside of 'run' command
+*/
+   for (i = -3; i <= 3; i++) {
+   ut_assertok(console_record_reset_enable());
+   ut_assertok(run_commandf("setenv foo 'echo bar ; exit %d ; echo 
baz' ; run foo ; echo $?", i));
+   ut_assert_nextline("bar");
+   ut_assert_nextline("%d", i > 0 ? i : 0);
+   ut_assertok(ut_check_console_end(uts));
+
+   ut_assertok(console_record_reset_enable());
+   ut_assertok(run_commandf("setenv foo 'echo bar ; exit %d ; echo 
baz' ; run foo && echo quux ; echo $?", i));
+   ut_assert_nextline("bar");
+   if (i <= 0)
+   ut_assert_nextline("quux");
+   ut_assert_nextline("%d", i > 0 ? i : 0);
+   ut_assertok(ut_check_console_end(uts));
+
+   ut_assertok(console_record_reset_enable());
+   ut_assertok(run_commandf("setenv foo 'echo bar ; exit %d ; echo 
baz' ; run foo || echo quux ; echo $?", i));
+   ut_assert_nextline("bar");
+   if (i > 0)
+   ut_assert_nextline("quux");
+   /* Either 'exit' returns 0, or 'echo quux' returns 0 */
+   ut_assert_nextline("0");
+   ut_assertok(ut_check_console_end(uts));
+   }
+
+   /* Validate that 'exit' behaves the same way as 'exit 0' */
+   ut_assertok(console_record_reset_enable());
+   ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run 
foo ; echo $?", i));
+   ut_assert_nextline("bar");
+   ut_assert_nextline("0");
+   ut_assertok(ut_check_console_end(uts));
+
+   ut_assertok(console_record_reset_enable());
+   ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run 
foo && echo quux ; echo $?", i));
+   ut_assert_nextline("bar");
+   ut_assert_nextline("quux");
+   ut_assert_nextline("0");
+   ut_assertok(ut_check_console_end(uts));
+
+   ut_assertok(console_record_reset_enable());
+   ut_assertok(run_commandf("setenv foo 'echo bar ; exit ; echo baz' ; run 
foo || echo quux ; echo $?", i));
+   ut_assert_nextline("bar");
+   /* Either 'exit' returns 0, or 'echo quux' returns 0 */

[PATCH 1/2] cmd: exit: Fix return value propagation out of environment scripts

[Marek Vasut]

Make sure the 'exit' command as well as 'exit $val' command exits
from environment scripts immediately and propagates return value
out of those scripts fully. That means the following behavior is
expected:

"
=> setenv foo 'echo bar ; exit 1' ; run foo ; echo $?
bar
1
=> setenv foo 'echo bar ; exit 0' ; run foo ; echo $?
bar
0
=> setenv foo 'echo bar ; exit -2' ; run foo ; echo $?
bar
0
"

As well as the followin behavior:

"
=> setenv foo 'echo bar ; exit 3 ; echo fail'; run foo; echo $?
bar
3
=> setenv foo 'echo bar ; exit 1 ; echo fail'; run foo; echo $?
bar
1
=> setenv foo 'echo bar ; exit 0 ; echo fail'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit -1 ; echo fail'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit -2 ; echo fail'; run foo; echo $?
bar
0
=> setenv foo 'echo bar ; exit ; echo fail'; run foo; echo $?
bar
0
"

Fixes: 8c4e3b79bd0 ("cmd: exit: Fix return value")
Signed-off-by: Marek Vasut 
---
Cc: Adrian Vovk 
Cc: Hector Palacios 
Cc: Pantelis Antoniou 
Cc: Simon Glass 
Cc: Tom Rini 
---
 cmd/exit.c|  7 +--
 common/cli.c  |  7 ---
 common/cli_hush.c | 21 +++--
 3 files changed, 24 insertions(+), 11 deletions(-)

diff --git a/cmd/exit.c b/cmd/exit.c
index 2c7132693ad..7bf241ec732 100644
--- a/cmd/exit.c
+++ b/cmd/exit.c
@@ -10,10 +10,13 @@
 static int do_exit(struct cmd_tbl *cmdtp, int flag, int argc,
   char *const argv[])
 {
+   int r;
+
+   r = 0;
if (argc > 1)
-   return dectoul(argv[1], NULL);
+   r = simple_strtoul(argv[1], NULL, 10);
 
-   return 0;
+   return -r - 2;
 }
 
 U_BOOT_CMD(
diff --git a/common/cli.c b/common/cli.c
index a47d6a3f2b4..ba45dad2db5 100644
--- a/common/cli.c
+++ b/common/cli.c
@@ -146,7 +146,7 @@ int run_commandf(const char *fmt, ...)
 #if defined(CONFIG_CMD_RUN)
 int do_run(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
 {
-   int i;
+   int i, ret;
 
if (argc < 2)
return CMD_RET_USAGE;
@@ -160,8 +160,9 @@ int do_run(struct cmd_tbl *cmdtp, int flag, int argc, char 
*const argv[])
return 1;
}
 
-   if (run_command(arg, flag | CMD_FLAG_ENV) != 0)
-   return 1;
+   ret = run_command(arg, flag | CMD_FLAG_ENV);
+   if (ret)
+   return ret;
}
return 0;
 }
diff --git a/common/cli_hush.c b/common/cli_hush.c
index 1467ff81b35..b8940b19735 100644
--- a/common/cli_hush.c
+++ b/common/cli_hush.c
@@ -1902,7 +1902,7 @@ static int run_list_real(struct pipe *pi)
last_return_code = -rcode - 2;
return -2;  /* exit */
}
-   last_return_code=(rcode == 0) ? 0 : 1;
+   last_return_code = rcode;
 #endif
 #ifndef __U_BOOT__
pi->num_progs = save_num_progs; /* restore number of programs */
@@ -3212,7 +3212,15 @@ static int parse_stream_outer(struct in_str *inp, int 
flag)
printf("exit not allowed from main 
input shell.\n");
continue;
}
-   break;
+   /*
+* DANGER
+* Return code -2 is special in this context,
+* it indicates exit from inner pipe instead
+* of return code itself, the return code is
+* stored in 'last_return_code' variable!
+* DANGER
+*/
+   return -2;
}
if (code == -1)
flag_repeat = 0;
@@ -3249,9 +3257,9 @@ int parse_string_outer(const char *s, int flag)
 #endif /* __U_BOOT__ */
 {
struct in_str input;
+   int rcode;
 #ifdef __U_BOOT__
char *p = NULL;
-   int rcode;
if (!s)
return 1;
if (!*s)
@@ -3263,11 +3271,12 @@ int parse_string_outer(const char *s, int flag)
setup_string_in_str(, p);
rcode = parse_stream_outer(, flag);
free(p);
-   return rcode;
+   return rcode == -2 ? last_return_code : rcode;
} else {
 #endif
setup_string_in_str(, s);
-   return parse_stream_outer(, flag);
+   rcode = parse_stream_outer(, flag);
+   return rcode == -2 ? last_return_code : rcode;
 #ifdef __U_BOOT__
}
 #endif
@@ -3287,7 +3296,7 @@ int parse_file_outer(void)
setup_file_in_str();
 #endif
rcode = parse_stream_outer(, FLAG_PARSE_SEMICOLON);
-   return rcode;
+   return rcode == -2 ? last_return_code : rcode;
 }
 
 #ifdef __U_BOOT__
-- 
2.35.1

Re: RFC: Handling of multiple EFI System Partitions

[Heinrich Schuchardt]

Am 18. Dezember 2022 15:21:06 MEZ schrieb Mark Kettenis 
:
>The Asahi installer, which is what most people use to get their Apple
>Silicon Mac into a state where it is possible to install another OS on
>the machine, offers the posibility to create multiple OS installs.
>For each of these it creates a separate APFS partition (which holds
>among other things, some essential system firmware) and separate EFI
>System Partitions.  This has a few benefits:
>
>* It allows control over which version of the system firmware is used
>  by the OS.  This is especially important for things like the GPU and
>  DCP (display controller) firmware, where the firmware interface
>  isn't exactly what we'd call "stable".  This way system firmware is
>  paired with the OS install (similar to what macOS does for itself)
>  which prevents breaking other OS installs on the same disk.
>
>* It allows us to store a 2nd stage bootloader (m1n1+u-boot+dtb) on
>  the EFI System Partition (ESP) such that it can be easily upgraded
>  from within Linux without affecting other OS installs on the same
>  disk.
>
>* It allows the use of the "native" boot picker to switch between
>  OSes.
>
>The approach the Asahi team has taken is to pair the APFS partition
>with the ESP by adding a proprty that contains the partition UUID to
>the device tree.  The installer ships u-boot with a patched distro
>boot script that looks at this device tree property, figures out what
>the right ESP is and loads the EFI bootloader
>(efi/boot/bootaarch64.efi) from that partition.
>
>This approach has some drawbacks:
>
>1. U-Boot will still consider the first ESP as *the* ESP, which means
>   that the ubootefi.var file is still read from and written from the
>   first ESP.
>
>2. The distro boot script modifications don't work if U-Boot's
>   built-in efibootmgr is used.  This probably also affects Simon's
>   bootstd stuff.
>
>So my idea is to have U-Boot recognize the device tree property and
>use it when it determines what partition is *the* ESP.  A proof of
>concept diff is attached below.  This probably needs a bit of
>massaging as reading the device tree property in generic EFI code like
>this is probably not acceptable.  A better approach might be to have a
>function that can be called from board-specific code that sets the UUID.
>
>Thoughts?  Would such a feature be useful on other hardware platforms?

efi/boot/bootaarch64.efi is only a fallback if load options are not set up. 
Once the operating system has generated a load option it is not used anymore.

The MacBooks only have one drive. Why would you want two ESPs on one drive?

Why can't the Asahi team use the current UEFI bootflow? We should avoid 
unneeded deviations. Can the current deviations be removed in Asahi Linux?

Best regards

Heinrich 

>
>commit 088f5626d4347cef76ad5a54477944886efb005a
>Author: Mark Kettenis 
>Date:   Sun Sep 25 01:57:24 2022 +0200
>
>HACK: Use designated ESP
>
>Signed-off-by: Mark Kettenis 
>
>diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
>index 7ea0334083..86b867d319 100644
>--- a/lib/efi_loader/efi_disk.c
>+++ b/lib/efi_loader/efi_disk.c
>@@ -523,6 +523,27 @@ static efi_status_t efi_disk_add_dev(
> desc->devnum, part);
>   }
>   }
>+
>+  ofnode chosen_node;
>+  const char *uuid = NULL;
>+  chosen_node = ofnode_path("/chosen");
>+  if (ofnode_valid(chosen_node)) {
>+  uuid = ofnode_read_string(chosen_node,
>+"asahi,efi-system-partition");
>+  }
>+
>+  /* Store designated EFI system partition */
>+  if (part && uuid && strcmp(uuid, part_info->uuid) == 0) {
>+  if (part_info->bootable & PART_EFI_SYSTEM_PARTITION) {
>+  efi_system_partition.uclass_id = desc->uclass_id;
>+  efi_system_partition.devnum = desc->devnum;
>+  efi_system_partition.part = part;
>+  EFI_PRINT("EFI system partition: %s %x:%x\n",
>+blk_get_uclass_name(desc->uclass_id),
>+desc->devnum, part);
>+  }
>+  }
>+
>   return EFI_SUCCESS;
> error:
>   efi_delete_handle(>header);

RFC: Handling of multiple EFI System Partitions

[Mark Kettenis]

The Asahi installer, which is what most people use to get their Apple
Silicon Mac into a state where it is possible to install another OS on
the machine, offers the posibility to create multiple OS installs.
For each of these it creates a separate APFS partition (which holds
among other things, some essential system firmware) and separate EFI
System Partitions.  This has a few benefits:

* It allows control over which version of the system firmware is used
  by the OS.  This is especially important for things like the GPU and
  DCP (display controller) firmware, where the firmware interface
  isn't exactly what we'd call "stable".  This way system firmware is
  paired with the OS install (similar to what macOS does for itself)
  which prevents breaking other OS installs on the same disk.

* It allows us to store a 2nd stage bootloader (m1n1+u-boot+dtb) on
  the EFI System Partition (ESP) such that it can be easily upgraded
  from within Linux without affecting other OS installs on the same
  disk.

* It allows the use of the "native" boot picker to switch between
  OSes.

The approach the Asahi team has taken is to pair the APFS partition
with the ESP by adding a proprty that contains the partition UUID to
the device tree.  The installer ships u-boot with a patched distro
boot script that looks at this device tree property, figures out what
the right ESP is and loads the EFI bootloader
(efi/boot/bootaarch64.efi) from that partition.

This approach has some drawbacks:

1. U-Boot will still consider the first ESP as *the* ESP, which means
   that the ubootefi.var file is still read from and written from the
   first ESP.

2. The distro boot script modifications don't work if U-Boot's
   built-in efibootmgr is used.  This probably also affects Simon's
   bootstd stuff.

So my idea is to have U-Boot recognize the device tree property and
use it when it determines what partition is *the* ESP.  A proof of
concept diff is attached below.  This probably needs a bit of
massaging as reading the device tree property in generic EFI code like
this is probably not acceptable.  A better approach might be to have a
function that can be called from board-specific code that sets the UUID.

Thoughts?  Would such a feature be useful on other hardware platforms?


commit 088f5626d4347cef76ad5a54477944886efb005a
Author: Mark Kettenis 
Date:   Sun Sep 25 01:57:24 2022 +0200

HACK: Use designated ESP

Signed-off-by: Mark Kettenis 

diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index 7ea0334083..86b867d319 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -523,6 +523,27 @@ static efi_status_t efi_disk_add_dev(
  desc->devnum, part);
}
}
+
+   ofnode chosen_node;
+   const char *uuid = NULL;
+   chosen_node = ofnode_path("/chosen");
+   if (ofnode_valid(chosen_node)) {
+   uuid = ofnode_read_string(chosen_node,
+ "asahi,efi-system-partition");
+   }
+
+   /* Store designated EFI system partition */
+   if (part && uuid && strcmp(uuid, part_info->uuid) == 0) {
+   if (part_info->bootable & PART_EFI_SYSTEM_PARTITION) {
+   efi_system_partition.uclass_id = desc->uclass_id;
+   efi_system_partition.devnum = desc->devnum;
+   efi_system_partition.part = part;
+   EFI_PRINT("EFI system partition: %s %x:%x\n",
+ blk_get_uclass_name(desc->uclass_id),
+ desc->devnum, part);
+   }
+   }
+
return EFI_SUCCESS;
 error:
efi_delete_handle(>header);

Re: [PATCH] rockchip: rk3399: pass platform parameter to TF-A by default

[Michal Suchánek]

Hello,

On Sun, Dec 18, 2022 at 06:00:13PM +0800, Kever Yang wrote:
> Hi Quentin,
> 
>     I would prefer you to remove SPL_ATF_NO_PLATFORM_PARAM in those boards
> you have test,

then we will have no end of this problem.

> 
> there may have some boards using legacy ATF binary but still want to use
> mainline U-Boot

Why would they do it?

The ATF is SoC-specific, the only board-specific part is the console
speed which is resolved by this change.

If people are using old kernel because they have binary driver for a
special device they can still change the option in the kconfig.

Maybe adding a note in the rk3399 documentation woukl be dessirable but
that's about it.

Thanks

Michal

> 
> which may have problem with this update.
> 
> 
> Thanks,
> 
> - Kever
> 
> On 2022/11/15 01:37, Quentin Schulz wrote:
> > From: Quentin Schulz 
> > 
> > Long are gone the times TF-A couldn't handle the FDT passed by U-Boot.
> > Specifically, since commit e7b586987c0a ("rockchip: don't crash if we
> > get an FDT we can't parse") in TF-A, failure to parse the FDT will use
> > the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two
> > years ago.
> > 
> > Therefore, let's finally pass the FDT to TF-A so that it can get the
> > serial configuration from U-Boot FDT instead of requiring the user to
> > patch TF-A hardcoded fallback values.
> > 
> > Cc: Quentin Schulz 
> > Signed-off-by: Quentin Schulz 
> > ---
> > rockchip: rk3399: pass platform parameter to TF-A
> > 
> > Finally pass the FDT address to TF-A since it now gracefully fallbacks to
> > hardcoded defaults if it cannot parse it. This allows us to avoid modifying
> > hardcoded values in TF-A to enable the console.
> > 
> > This was tested with TF-A v2.7.0 on Puma Haikou RK3399.
> > 
> > To: Simon Glass 
> > To: Philipp Tomsich 
> > To: Kever Yang 
> > Cc: Hugh Cole-Baker 
> > Cc: Walter Lozano 
> > Cc: u-boot@lists.denx.de
> > ---
> >   arch/arm/mach-rockchip/Kconfig | 1 -
> >   1 file changed, 1 deletion(-)
> > 
> > diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
> > index 69d51ff378..2fcc23f9fa 100644
> > --- a/arch/arm/mach-rockchip/Kconfig
> > +++ b/arch/arm/mach-rockchip/Kconfig
> > @@ -249,7 +249,6 @@ config ROCKCHIP_RK3399
> > imply PRE_CONSOLE_BUFFER
> > imply ROCKCHIP_COMMON_BOARD
> > imply ROCKCHIP_SDRAM_COMMON
> > -   imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
> > imply SPL_ROCKCHIP_COMMON_BOARD
> > imply TPL_SERIAL
> > imply TPL_LIBCOMMON_SUPPORT
> > 
> > ---
> > base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3
> > change-id: 20221114-rk3399-tf-a-plat-param-3ab055f40b9e
> > 
> > Best regards,

Re: [PATCH v2] doc: add texinfodocs and infodocs targets

[Heinrich Schuchardt]

On 12/18/22 01:31, Maxim Cournoyer wrote:

Sphinx supports generating Texinfo sources and Info documentation,
which can be navigated easily and is convenient to search (via the
indexed nodes or anchors, for example).  This is basically the same as
1f050e904dd6f2955eecbd22031d912ccb2e7683, which was recently applied
to the Linux kernel.

Signed-off-by: Maxim Cournoyer 


Hello Maxim,

the texinfodocs and infodocs targets can be built now.

After navigating to doc/output/texinfo and running 'sudo make
install-info' the 'DasUBoot' chapter is available. This is not a good
title. Can we change the title to 'U-Boot' in doc/conf.py:466?

'One line description of project.' is not a reasonable text either
(doc/conf.py:467). I would suggest the following:

diff --git a/doc/conf.py b/doc/conf.py
index 62c8d31270..b973143ee0 100644
--- a/doc/conf.py
+++ b/doc/conf.py
@@ -463,8 +463,8 @@ man_pages = [
 # (source start file, target name, title, author,
 #  dir menu entry, description, category)
 texinfo_documents = [
-(master_doc, 'DasUBoot', 'The U-Boot Documentation',
- author, 'DasUBoot', 'One line description of project.',
+(master_doc, 'u-boot', 'The U-Boot Documentation',
+ author, 'U-Boot', 'boot loader for embedded systems',
  'Miscellaneous'),
 ]

Best regards

Heinrich


---

Changes in v2:
- Do not invoke nonexistent 'sphinx-pre-install' script

  Makefile   |  2 +-
  doc/Makefile   | 10 ++
  doc/media/Makefile |  3 ++-
  3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index de5746399a..597a8886c3 100644
--- a/Makefile
+++ b/Makefile
@@ -2372,7 +2372,7 @@ tcheck:
  # Documentation targets
  # ---
  DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \
-  linkcheckdocs dochelp refcheckdocs
+  linkcheckdocs dochelp refcheckdocs texinfodocs infodocs
  PHONY += $(DOC_TARGETS)
  $(DOC_TARGETS): scripts_basic FORCE
$(Q)$(MAKE) $(build)=doc $@
diff --git a/doc/Makefile b/doc/Makefile
index f5de65e927..d0904a9f99 100644
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -69,6 +69,14 @@ quiet_cmd_sphinx = SPHINX  $@ --> file://$(abspath 
$(BUILDDIR)/$3/$4)
  htmldocs:
@+$(foreach var,$(SPHINXDIRS),$(call 
loop_cmd,sphinx,html,$(var),,$(var)))

+texinfodocs:
+   @+$(foreach var,$(SPHINXDIRS),$(call 
loop_cmd,sphinx,texinfo,$(var),texinfo,$(var)))
+
+# Note: the 'info' Make target is generated by sphinx itself when
+# running the texinfodocs target defined above.
+infodocs: texinfodocs
+   $(MAKE) -C $(BUILDDIR)/texinfo info
+
  linkcheckdocs:
@$(foreach var,$(SPHINXDIRS),$(call 
loop_cmd,sphinx,linkcheck,$(var),,$(var)))

@@ -109,6 +117,8 @@ cleandocs:
  dochelp:
@echo  ' U-Boot documentation in different formats from ReST:'
@echo  '  htmldocs- HTML'
+   @echo  '  texinfodocs - Texinfo'
+   @echo  '  infodocs- Info'
@echo  '  latexdocs   - LaTeX'
@echo  '  pdfdocs - PDF'
@echo  '  epubdocs- EPUB'
diff --git a/doc/media/Makefile b/doc/media/Makefile
index b9b43a34c3..9b32258696 100644
--- a/doc/media/Makefile
+++ b/doc/media/Makefile
@@ -22,10 +22,11 @@ $(BUILDDIR)/linker_lists.h.rst: ${API}/linker_lists.h 
${PARSER} $(SRC_DIR)/linke

  # Media build rules

-.PHONY: all html epub xml latex
+.PHONY: all html texinfo epub xml latex

  all: $(IMGDOT) $(BUILDDIR) ${TARGETS}
  html: all
+texinfo: all
  epub: all
  xml: all
  latex: $(IMGPDF) all

base-commit: 9bd3d354a1a0712ac27c717df9ad60566b0406ee

[u-boot][master][PATCH 3/3] pico-imx7d: update defconfigs of pico-imx7d baseboards

[egyszeregy]

From: Benjamin Szőke 

Update defconfigs of pico-imx7d baseboards. In freescale community
default CONFIG_SPL_FS_LOAD_PAYLOAD_NAME is "u-boot-dtb.img".

Signed-off-by: Benjamin Szőke 
---
 configs/pico-dwarf-imx7d_defconfig  | 6 ++
 configs/pico-hobbit-imx7d_defconfig | 6 ++
 configs/pico-imx7d_bl33_defconfig   | 6 ++
 configs/pico-imx7d_defconfig| 6 ++
 configs/pico-nymph-imx7d_defconfig  | 6 ++
 configs/pico-pi-imx7d_defconfig | 6 ++
 6 files changed, 36 insertions(+)

diff --git a/configs/pico-dwarf-imx7d_defconfig 
b/configs/pico-dwarf-imx7d_defconfig
index 821357827a..9e82380419 100644
--- a/configs/pico-dwarf-imx7d_defconfig
+++ b/configs/pico-dwarf-imx7d_defconfig
@@ -15,8 +15,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_MMC_VERBOSE=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/pico-hobbit-imx7d_defconfig 
b/configs/pico-hobbit-imx7d_defconfig
index 759866ce11..f896352cad 100644
--- a/configs/pico-hobbit-imx7d_defconfig
+++ b/configs/pico-hobbit-imx7d_defconfig
@@ -15,8 +15,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_MMC_VERBOSE=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/pico-imx7d_bl33_defconfig 
b/configs/pico-imx7d_bl33_defconfig
index 8631f81f33..a7f25a8d94 100644
--- a/configs/pico-imx7d_bl33_defconfig
+++ b/configs/pico-imx7d_bl33_defconfig
@@ -14,8 +14,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_MMC_VERBOSE=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_SYS_MEMTEST_START=0x8000
 CONFIG_SYS_MEMTEST_END=0xa000
diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig
index a84954d22f..7b3fb4c686 100644
--- a/configs/pico-imx7d_defconfig
+++ b/configs/pico-imx7d_defconfig
@@ -15,8 +15,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_MMC_VERBOSE=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/pico-nymph-imx7d_defconfig 
b/configs/pico-nymph-imx7d_defconfig
index 821357827a..9e82380419 100644
--- a/configs/pico-nymph-imx7d_defconfig
+++ b/configs/pico-nymph-imx7d_defconfig
@@ -15,8 +15,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_MMC_VERBOSE=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig
index dec4280974..077fd3e71c 100644
--- a/configs/pico-pi-imx7d_defconfig
+++ b/configs/pico-pi-imx7d_defconfig
@@ -15,8 +15,14 @@ CONFIG_DM_GPIO=y
 CONFIG_DEFAULT_DEVICE_TREE="imx7d-pico-pi"
 CONFIG_TARGET_PICO_IMX7D=y
 CONFIG_SPL_MMC=y
+CONFIG_SPL_DM_MMC=y
+CONFIG_SPL_MMC_BOOT=y
+CONFIG_MMC_VERBOSE=y
 CONFIG_SPL_SERIAL=y
 CONFIG_SPL=y
+CONFIG_SUPPORT_SPL=y
+CONFIG_SPL_FS_FAT=y
+CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot-dtb.img"
 CONFIG_ARMV7_BOOT_SEC_DEFAULT=y
 CONFIG_IMX_RDC=y
 CONFIG_IMX_BOOTAUX=y
-- 
2.38.1.windows.1

[u-boot][master][PATCH 2/3] pico-imx7d: add baseboard SD card boot detect

[egyszeregy]

From: Benjamin Szőke 

Take over codes from Techenxion to support mmc autodetect boot for pico-imx7d.

Signed-off-by: Benjamin Szőke 
---
 board/technexion/pico-imx7d/pico-imx7d.c | 82 +
 board/technexion/pico-imx7d/pico-imx7d_spl.c | 92 ++--
 include/configs/pico-imx7d.h |  4 +-
 3 files changed, 170 insertions(+), 8 deletions(-)

diff --git a/board/technexion/pico-imx7d/pico-imx7d.c 
b/board/technexion/pico-imx7d/pico-imx7d.c
index 7db34abcb1..7e47f15e71 100644
--- a/board/technexion/pico-imx7d/pico-imx7d.c
+++ b/board/technexion/pico-imx7d/pico-imx7d.c
@@ -21,6 +21,8 @@
 #include 
 #include 
 #include "../../freescale/common/pfuze.h"
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -159,6 +161,53 @@ int board_phy_config(struct phy_device *phydev)
 }
 #endif
 
+#if CONFIG_IS_ENABLED(FSL_ESDHC_IMX)
+int check_mmc_autodetect(void)
+{
+   char *autodetect_str = env_get("mmcautodetect");
+
+   if ((autodetect_str != NULL) &&
+   (strcmp(autodetect_str, "yes") == 0)) {
+   return 1;
+   }
+
+   return 0;
+}
+
+void board_late_mmc_init(void)
+{
+   int dev_no = 0;
+   char cmd[32];
+   char mmcblk[32];
+   
+   if (!check_mmc_autodetect())
+   return;
+
+   switch (get_boot_device()) {
+   case SD3_BOOT:
+   case MMC3_BOOT:
+   env_set("bootdev", "MMC3");
+   dev_no = 2;
+   break;
+   case SD1_BOOT:
+   env_set("bootdev", "SD1");
+   dev_no = 0;
+   break;
+   default:
+   printf("Wrong boot device!");
+   }
+   
+   env_set_ulong("mmcdev", dev_no);
+   
+   /* Set mmcblk env */
+   sprintf(mmcblk, "/dev/mmcblk%dp2 rootwait rw", dev_no);
+   env_set("mmcroot", mmcblk);
+   
+   sprintf(cmd, "mmc dev %d", dev_no);
+   run_command(cmd, 0);
+}
+#endif
+
 static void setup_iomux_uart(void)
 {
imx_iomux_v3_setup_multiple_pads(uart5_pads, ARRAY_SIZE(uart5_pads));
@@ -210,6 +259,10 @@ int board_late_init(void)
 
set_wdog_reset(wdog);
 
+#if defined(CONFIG_ENV_IS_IN_MMC) || defined(CONFIG_ENV_IS_NOWHERE)
+   board_late_mmc_init();
+#endif /* CONFIG_ENV_IS_IN_MMC or CONFIG_ENV_IS_NOWHERE */
+
/*
 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
 * since we use PMIC_PWRON to reset the board.
@@ -219,6 +272,29 @@ int board_late_init(void)
return 0;
 }
 
+#ifdef CONFIG_OF_BOARD_SETUP
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+   const int *cell;
+   int offs;
+   uint32_t cma_size;
+   unsigned int dram_size;
+
+   dram_size = imx_ddr_size() / 1024 / 1024;
+   offs = fdt_path_offset(blob, "/reserved-memory/linux,cma");
+   cell = fdt_getprop(blob, offs, "size", NULL);
+   cma_size = fdt32_to_cpu(cell[0]);
+   if (dram_size == 512) {
+   /* CMA is aligned by 32MB on i.mx8mq,
+  so CMA size can only be multiple of 32MB */
+   cma_size = env_get_ulong("cma_size", 10, (6 * 32) * 1024 * 
1024);
+   fdt_setprop_u32(blob, offs, "size", (uint64_t)cma_size);
+   }
+
+   return 0;
+}
+#endif
+
 int checkboard(void)
 {
puts("Board: i.MX7D PICOSOM\n");
@@ -244,3 +320,9 @@ int board_ehci_hcd_init(int port)
}
return 0;
 }
+
+/* This should be defined for each board */
+__weak int mmc_map_to_kernel_blk(int dev_no)
+{
+return dev_no;
+}
diff --git a/board/technexion/pico-imx7d/pico-imx7d_spl.c 
b/board/technexion/pico-imx7d/pico-imx7d_spl.c
index 0009c55022..499e4a49e0 100644
--- a/board/technexion/pico-imx7d/pico-imx7d_spl.c
+++ b/board/technexion/pico-imx7d/pico-imx7d_spl.c
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #if defined(CONFIG_SPL_BUILD)
 
@@ -158,7 +160,20 @@ void reset_cpu(void)
 #define USDHC_PAD_CTRL (PAD_CTL_DSE_3P3V_32OHM | PAD_CTL_SRE_SLOW | \
PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
 
-static iomux_v3_cfg_t const usdhc3_pads[] = {
+#define USDHC1_CD_GPIO IMX_GPIO_NR(5, 0)
+/* EMMC/SD */
+static iomux_v3_cfg_t const usdhc1_pads[] = {
+   MX7D_PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_DATA3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+   MX7D_PAD_SD1_CD_B__GPIO5_IO0  | MUX_PAD_CTRL(USDHC_PAD_CTRL),
+};
+
+#define USDHC3_CD_GPIO IMX_GPIO_NR(1, 14)
+static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX7D_PAD_SD3_CMD__SD3_CMD | 

[u-boot][master][PATCH 1/3] pico-imx7d: add support for 2GB memory SoMs

[egyszeregy]

From: Benjamin Szőke 

Take over codes from Techenxion to support SoMs with 2GB DDR3.

Signed-off-by: Benjamin Szőke 
---
 board/technexion/pico-imx7d/Makefile  |  2 +-
 .../pico-imx7d/{spl.c => pico-imx7d_spl.c}| 30 +--
 2 files changed, 28 insertions(+), 4 deletions(-)
 rename board/technexion/pico-imx7d/{spl.c => pico-imx7d_spl.c} (83%)

diff --git a/board/technexion/pico-imx7d/Makefile 
b/board/technexion/pico-imx7d/Makefile
index 4ae3d606b5..b45b127884 100644
--- a/board/technexion/pico-imx7d/Makefile
+++ b/board/technexion/pico-imx7d/Makefile
@@ -1,4 +1,4 @@
 # SPDX-License-Identifier: GPL-2.0+
 # (C) Copyright 2017 NXP Semiconductors
 
-obj-y  := pico-imx7d.o spl.o
+obj-y  := pico-imx7d.o pico-imx7d_spl.o
diff --git a/board/technexion/pico-imx7d/spl.c 
b/board/technexion/pico-imx7d/pico-imx7d_spl.c
similarity index 83%
rename from board/technexion/pico-imx7d/spl.c
rename to board/technexion/pico-imx7d/pico-imx7d_spl.c
index df5f058577..0009c55022 100644
--- a/board/technexion/pico-imx7d/spl.c
+++ b/board/technexion/pico-imx7d/pico-imx7d_spl.c
@@ -61,6 +61,8 @@ static struct ddrc ddrc_regs_val = {
.dramtmg0   = 0x09081109,
.addrmap0   = 0x001f,
.addrmap1   = 0x00080808,
+   .addrmap2   = 0x,
+   .addrmap3   = 0x,
.addrmap4   = 0x0f0f,
.addrmap5   = 0x07070707,
.addrmap6   = 0x0f0f0707,
@@ -100,17 +102,39 @@ static void gpr_init(void)
writel(0x4F45, _regs->gpr[1]);
 }
 
+/**
+* Revision Detection
+*
+* DDR_TYPE_DET_1   DDR_TYPE_DET_2
+*   GPIO_1   GPIO_2
+* 01   2GB DDR3
+* 00   1GB DDR3
+* 10   512MB DDR3
+***/
 static bool is_1g(void)
 {
gpio_direction_input(IMX_GPIO_NR(1, 12));
return !gpio_get_value(IMX_GPIO_NR(1, 12));
 }
 
-static void ddr_init(void)
+static bool is_2g(void)
 {
-   if (is_1g())
-   ddrc_regs_val.addrmap6  = 0x0f070707;
+   gpio_direction_input(IMX_GPIO_NR(1, 13));
+   return gpio_get_value(IMX_GPIO_NR(1, 13));
+}
 
+static void ddr_init(void)
+{
+   if (is_1g()) {
+   if (is_2g()) {
+   ddrc_regs_val.addrmap0  = 0x001f;
+   ddrc_regs_val.addrmap1  = 0x00181818;
+   ddrc_regs_val.addrmap4  = 0x0f0f;
+   ddrc_regs_val.addrmap5  = 0x04040404;
+   ddrc_regs_val.addrmap6  = 0x04040404;
+   } else
+   ddrc_regs_val.addrmap6  = 0x0f070707;
+   }
mx7_dram_cfg(_regs_val, _mp_val, _phy_regs_val,
 _param);
 }
-- 
2.38.1.windows.1

[PATCH v3] console: usb: kbd: Limit poll frequency to improve performance

[Filip Žaludek]

Hello,
 change seems to be unfriendly to RPi3B+, it allows to enter 'U-Boot>' shell 
but usb keyboard
does not respond. Keyboard is detected by 'usb info' in v2023.01-rc3, not in 
v2022.10.
When reverted, usb keyboard works as expected.

Anybody sitting front of RPi3B+ care to confirm?


Regards,
Filip





Patch:
https://github.com/u-boot/u-boot/commit/96991e652f541323a03c5b7e075d54a117091618


Debug:
USB KBD: found interrupt EP: 0x81
USB KBD: set boot protocol
dwc2_submit_control_msg: dev='usb@7e98', udev=3af4be00,
udev->dev='usb_kbd', portnr=3
USB KBD: set idle interval...
dwc2_submit_control_msg: dev='usb@7e98', udev=3af4be00,
udev->dev='usb_kbd', portnr=3
USB KBD: enable interrupt pipe...
usb_kbd usb_kbd: Timeout poll on interrupt endpoint


Tested:
SW: v2022.10 & v2023.01-rc3 compiled from sources as 'rpiarm64'
HW: USB 1.1 and 2.0 keyboards, RPi3B+
JeOS:
http://download.opensuse.org/ports/aarch64/tumbleweed/appliances/openSUSE-Tumbleweed-ARM-JeOS-raspberrypi.aarch64-2022.10.11-Snapshot20221112.raw.xz
(u-boot-rpiarm64-2022.10-1.1.aarch64)

[PATCH] rockchip: Only call binman when TPL available

[Kever Yang]

Rockchip platform use TPL to do the DRAM initialize for all the SoCs,
if TPL is not available, means no available DRAM init program, and the
u-boot-rockchip.bin is not functionable.

Signed-off-by: Kever Yang 
---

 arch/arm/dts/rockchip-u-boot.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/rockchip-u-boot.dtsi 
b/arch/arm/dts/rockchip-u-boot.dtsi
index 584f21eb5bf..e2b0f389711 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -11,7 +11,7 @@
};
 };
 
-#ifdef CONFIG_SPL
+#ifdef CONFIG_TPL_BUILD
  {
simple-bin {
filename = "u-boot-rockchip.bin";
-- 
2.25.1

[PATCH v1 4/4] arm: s5p4418: dm_serial: remove old code / add DEBUG_UART

[Stefan Bosch]

Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART
to s5p4418_nanopi2_defconfig.

Signed-off-by: Stefan Bosch 
---

 arch/arm/cpu/armv7/s5p4418/cpu.c  | 29 -
 arch/arm/mach-nexell/clock.c  |  2 +-
 configs/s5p4418_nanopi2_defconfig |  8 +++-
 include/configs/s5p4418_nanopi2.h |  8 +++-
 4 files changed, 11 insertions(+), 36 deletions(-)

diff --git a/arch/arm/cpu/armv7/s5p4418/cpu.c b/arch/arm/cpu/armv7/s5p4418/cpu.c
index 3baa761ec7..fcaafc0ff7 100644
--- a/arch/arm/cpu/armv7/s5p4418/cpu.c
+++ b/arch/arm/cpu/armv7/s5p4418/cpu.c
@@ -13,10 +13,8 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
-#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -45,39 +43,12 @@ static void cpu_soc_init(void)
nx_tieoff_set(NX_TIEOFF_CORTEXA9MP_TOP_QUADL2C_L2RET1N_1, 1);
 }
 
-#ifdef CONFIG_PL011_SERIAL
-static void serial_device_init(void)
-{
-   char dev[10];
-   int id;
-
-   sprintf(dev, "nx-uart.%d", CONFIG_CONS_INDEX);
-   id = RESET_ID_UART0 + CONFIG_CONS_INDEX;
-
-   struct clk *clk = clk_get((const char *)dev);
-
-   /* reset control: Low active ___|---   */
-   nx_rstcon_setrst(id, RSTCON_ASSERT);
-   udelay(10);
-   nx_rstcon_setrst(id, RSTCON_NEGATE);
-   udelay(10);
-
-   /* set clock   */
-   clk_disable(clk);
-   clk_set_rate(clk, CONFIG_PL011_CLOCK);
-   clk_enable(clk);
-}
-#endif
-
 int arch_cpu_init(void)
 {
flush_dcache_all();
cpu_soc_init();
clk_init();
 
-   if (IS_ENABLED(CONFIG_PL011_SERIAL))
-   serial_device_init();
-
return 0;
 }
 
diff --git a/arch/arm/mach-nexell/clock.c b/arch/arm/mach-nexell/clock.c
index 24fa204ccd..59ffa26255 100644
--- a/arch/arm/mach-nexell/clock.c
+++ b/arch/arm/mach-nexell/clock.c
@@ -856,7 +856,7 @@ void __init clk_init(void)
}
 
/* prevent uart clock disable for low step debug message */
-   #ifndef CONFIG_DEBUG_NX_UART
+   #ifndef CONFIG_DEBUG_UART
if (peri->dev_name) {
#ifdef CONFIG_BACKLIGHT_PWM
if (!strcmp(peri->dev_name, DEV_NAME_PWM))
diff --git a/configs/s5p4418_nanopi2_defconfig 
b/configs/s5p4418_nanopi2_defconfig
index f3a316513c..042037acfc 100644
--- a/configs/s5p4418_nanopi2_defconfig
+++ b/configs/s5p4418_nanopi2_defconfig
@@ -54,7 +54,7 @@ CONFIG_MMC_DW=y
 CONFIG_PINCTRL=y
 CONFIG_DM_PMIC=y
 CONFIG_DM_REGULATOR=y
-CONFIG_CONS_INDEX=0
+
 CONFIG_DM_VIDEO=y
 CONFIG_VIDEO_LOGO=y
 CONFIG_DISPLAY=y
@@ -67,3 +67,9 @@ CONFIG_SPLASH_SCREEN_ALIGN=y
 CONFIG_SPLASH_SOURCE=y
 CONFIG_BMP_24BPP=y
 CONFIG_ERRNO_STR=y
+
+CONFIG_DEBUG_UART=y
+CONFIG_DEBUG_UART_PL011=y
+CONFIG_DEBUG_UART_BASE=0xC00A1000
+CONFIG_DEBUG_UART_CLOCK=15000
+CONFIG_DEBUG_UART_SKIP_INIT=y
diff --git a/include/configs/s5p4418_nanopi2.h 
b/include/configs/s5p4418_nanopi2.h
index ae94f0ecc5..a6d3957dc1 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -78,11 +78,9 @@
 /*---
  * serial console configuration
  */
-#define CONFIG_PL011_CLOCK 5000
-#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
-(void *)PHY_BASEADDR_UART1, \
-(void *)PHY_BASEADDR_UART2, \
-(void *)PHY_BASEADDR_UART3}
+
+/* 150MHz is the clock rate set by SPL (uart0) */
+#define CONFIG_PL011_CLOCK 15000
 
 /*---
  * BACKLIGHT
-- 
2.17.1

[PATCH v1 3/4] arm: s5p4418: dm_serial: switch to DM_SERIAL

[Stefan Bosch]

Switch the S5P4418-SOC and therefore the s5p4418_nanopi2 board to
DM_SERIAL.

Signed-off-by: Stefan Bosch 
---

 arch/arm/mach-nexell/Kconfig | 4 ++--
 drivers/serial/Kconfig   | 9 +
 drivers/serial/Makefile  | 1 +
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-nexell/Kconfig b/arch/arm/mach-nexell/Kconfig
index 86a2398637..16324e1520 100644
--- a/arch/arm/mach-nexell/Kconfig
+++ b/arch/arm/mach-nexell/Kconfig
@@ -6,8 +6,8 @@ config ARCH_S5P4418
select OF_CONTROL
select OF_SEPARATE
select NX_GPIO
-   select PL011_SERIAL
-   select PL011_SERIAL_FLUSH_ON_INIT
+   select DM_SERIAL
+   select PL01X_SERIAL
help
  Enable support for Nexell S5P4418 SoC.
 
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index de02e08a29..b3e9bb4a15 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -789,6 +789,15 @@ config S5P_SERIAL
help
  Select this to enable Samsung S5P UART support.
 
+config S5P4418_PL011_SERIAL
+   bool "Extended PL011 driver for S5P4418"
+   depends on DM_SERIAL && PL01X_SERIAL && ARCH_NEXELL
+   default y
+   help
+ Select this to enable support of the PL011 UARTs in the S5P4418 SOC.
+ With this driver the UART-clocks are set to the appropriate rate
+ (if not 'skip-init').
+
 config SANDBOX_SERIAL
bool "Sandbox UART support"
depends on SANDBOX
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index eb7b8f23ee..4853f4d59b 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -75,6 +75,7 @@ obj-$(CONFIG_MT7620_SERIAL) += serial_mt7620.o
 obj-$(CONFIG_HTIF_CONSOLE) += serial_htif.o
 obj-$(CONFIG_SIFIVE_SERIAL) += serial_sifive.o
 obj-$(CONFIG_XEN_SERIAL) += serial_xen.o
+obj-$(CONFIG_S5P4418_PL011_SERIAL) += serial_s5p4418_pl011.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_USB_TTY) += usbtty.o
-- 
2.17.1

[PATCH v1 2/4] arm: s5p4418: dm_serial: add uarts to dts

[Stefan Bosch]

Add S5P4418 UARTs and appropriate pinctrl to dts. Add UART to
s5p4418-nanopi2.dts.

Signed-off-by: Stefan Bosch 
---

 arch/arm/dts/s5p4418-nanopi2.dts  |  6 +++
 arch/arm/dts/s5p4418-pinctrl.dtsi | 71 +++
 arch/arm/dts/s5p4418.dtsi | 40 +
 3 files changed, 117 insertions(+)

diff --git a/arch/arm/dts/s5p4418-nanopi2.dts b/arch/arm/dts/s5p4418-nanopi2.dts
index 4deaf10a1c..42251e0a05 100644
--- a/arch/arm/dts/s5p4418-nanopi2.dts
+++ b/arch/arm/dts/s5p4418-nanopi2.dts
@@ -25,6 +25,7 @@
i2c0 = "/i2c@c00a4000";
i2c1 = "/i2c@c00a5000";
i2c2 = "/i2c@c00a6000";
+   serial0 = "/uart@c00a1000";
};
 
mmc0:mmc@c0062000 {
@@ -107,4 +108,9 @@
};
};
};
+
+   uart0:uart@c00a1000 {
+   skip-init;
+   status = "okay";
+   };
 };
diff --git a/arch/arm/dts/s5p4418-pinctrl.dtsi 
b/arch/arm/dts/s5p4418-pinctrl.dtsi
index a7e1c2c381..0768d80fc9 100644
--- a/arch/arm/dts/s5p4418-pinctrl.dtsi
+++ b/arch/arm/dts/s5p4418-pinctrl.dtsi
@@ -132,4 +132,75 @@ pinctrl@C001 {
pin-pull = <2>;
pin-strength = <0>;
};
+
+   /* UART */
+   uart0_rx:uart0-rx {
+   pins = "gpiod-14";
+   pin-function = <1>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart0_tx:uart0-tx {
+   pins = "gpiod-18";
+   pin-function = <1>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart1_rx:uart1-rx {
+   pins = "gpiod-15";
+   pin-function = <2>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart1_tx:uart1-tx {
+   pins = "gpiod-19";
+   pin-function = <2>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart2_rx:uart2-rx {
+   pins = "gpiod-16";
+   pin-function = <1>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart2_tx:uart2-tx {
+   pins = "gpiod-20";
+   pin-function = <1>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart3_rx:uart3-rx {
+   pins = "gpiod-17";
+   pin-function = <1>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart3_tx:uart3-tx {
+   pins = "gpiod-21";
+   pin-function = <1>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart4_rx:uart4-rx {
+   pins = "gpiob-28";
+   pin-function = <3>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
+
+   uart4_tx:uart4-tx {
+   pins = "gpiob-29";
+   pin-function = <3>;
+   pin-pull = <2>;
+   pin-strength = <0>;
+   };
 };
diff --git a/arch/arm/dts/s5p4418.dtsi b/arch/arm/dts/s5p4418.dtsi
index a4d1a1bd03..3027cd4bb9 100644
--- a/arch/arm/dts/s5p4418.dtsi
+++ b/arch/arm/dts/s5p4418.dtsi
@@ -167,4 +167,44 @@
reg = <0xc001 0xf000>;
u-boot,dm-pre-reloc;
};
+
+   uart0:uart@c00a1000 {
+   compatible = "nexell,s5p4418-pl011", "arm,primecell";
+   reg = <0xc00a1000 0x1000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rx>, <_tx>;
+   status = "disabled";
+   };
+
+   uart1:uart@c00a {
+   compatible = "nexell,s5p4418-pl011", "arm,primecell";
+   reg = <0xc00a 0x1000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rx>, <_tx>;
+   status = "disabled";
+   };
+
+   uart2:uart@c00a2000 {
+   compatible = "nexell,s5p4418-pl011", "arm,primecell";
+   reg = <0xc00a2000 0x1000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rx>, <_tx>;
+   status = "disabled";
+   };
+
+   uart3:uart@c00a3000 {
+   compatible = "nexell,s5p4418-pl011", "arm,primecell";
+   reg = <0xc00a3000 0x1000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rx>, <_tx>;
+   status = "disabled";
+   };
+
+   uart4:uart@c006d000 {
+   compatible = "nexell,s5p4418-pl011", "arm,primecell";
+   reg = <0xc006d000 0x1000>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_rx>, <_tx>;
+   status = "disabled";
+   };
 };
-- 
2.17.1

[PATCH v1 1/4] arm: s5p4418: dm_serial: add driver source code

[Stefan Bosch]

Add dm_serial driver source code for S5P4418 SOC. Extend the "arm,pl011"
driver by init of UART-clock and UART-reset.

Signed-off-by: Stefan Bosch 
---

 MAINTAINERS   |  1 +
 drivers/serial/serial_s5p4418_pl011.c | 94 +++
 2 files changed, 95 insertions(+)
 create mode 100644 drivers/serial/serial_s5p4418_pl011.c

diff --git a/MAINTAINERS b/MAINTAINERS
index cb4d44584d..3473f765fd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -411,6 +411,7 @@ F:  drivers/gpio/nx_gpio.c
 F: drivers/i2c/nx_i2c.c
 F: drivers/mmc/nexell_dw_mmc_dm.c
 F: drivers/pinctrl/nexell/
+F: drivers/serial/serial_s5p4418_pl011.c
 F: drivers/video/nexell/
 F: drivers/video/nexell_display.c
 F: include/configs/s5p4418_nanopi2.h
diff --git a/drivers/serial/serial_s5p4418_pl011.c 
b/drivers/serial/serial_s5p4418_pl011.c
new file mode 100644
index 00..e4492e662e
--- /dev/null
+++ b/drivers/serial/serial_s5p4418_pl011.c
@@ -0,0 +1,94 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022  Stefan Bosch 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include "serial_pl01x_internal.h"
+
+int s5p4418_pl011_serial_probe(struct udevice *dev)
+{
+   struct pl01x_serial_plat *plat = dev_get_plat(dev);
+   struct clk *nx_clk;
+   ulong rate_act;
+   char uart_clk_name[10];
+   int uart_num = -1;
+   int rst_id, ret;
+
+   if (!plat->skip_init) {
+   uart_num = dev->seq_;
+   rst_id = RESET_ID_UART0 + uart_num;
+
+   if (uart_num < 0 || rst_id > RESET_ID_UART5) {
+   /* invalid UART-number */
+   debug("%s: sequence/uart number %d is invalid!\n", 
__func__, uart_num);
+   return -ENODEV;
+   }
+
+   sprintf(uart_clk_name, "nx-uart.%d", uart_num);
+   nx_clk = clk_get(uart_clk_name);
+   if (!nx_clk) {
+   debug("%s: clk_get('%s') failed!\n", __func__, 
uart_clk_name);
+   return -ENODEV;
+   }
+
+   /* wait to make sure all pending characters have been sent */
+   mdelay(100);
+   }
+
+   /*
+* Note: Unless !plat->skip_init, the UART is disabled here, so printf()
+* or debug() must not be used until pl01x_serial_setbrg() has been 
called
+* (enables the UART). Otherwise u-boot is hanging!
+*/
+   ret = pl01x_serial_probe(dev);
+   if (ret)
+   return ret;
+
+   if (!plat->skip_init) {
+   /* do reset UART */
+   nx_rstcon_setrst(rst_id, RSTCON_ASSERT);
+   udelay(10);
+   nx_rstcon_setrst(rst_id, RSTCON_NEGATE);
+   udelay(10);
+   clk_disable(nx_clk);
+
+   rate_act = clk_set_rate(nx_clk, plat->clock);
+   clk_enable(nx_clk);
+
+   plat->clock = rate_act;
+   }
+
+   return 0;
+}
+
+static const struct dm_serial_ops s5p4418_pl011_serial_ops = {
+   .putc = pl01x_serial_putc,
+   .pending = pl01x_serial_pending,
+   .getc = pl01x_serial_getc,
+   .setbrg = pl01x_serial_setbrg,
+};
+
+static const struct udevice_id s5p4418_pl011_serial_id[] = {
+   {.compatible = "nexell,s5p4418-pl011", .data = TYPE_PL011},
+   {}
+};
+
+U_BOOT_DRIVER(s5p4418_pl011_uart) = {
+   .name   = "s5p4418_pl011",
+   .id = UCLASS_SERIAL,
+   .of_match = of_match_ptr(s5p4418_pl011_serial_id),
+   .of_to_plat = of_match_ptr(pl01x_serial_of_to_plat),
+   .plat_auto  = sizeof(struct pl01x_serial_plat),
+   .probe = s5p4418_pl011_serial_probe,
+   .ops= _pl011_serial_ops,
+   .flags  = DM_FLAG_PRE_RELOC,
+   .priv_auto  = sizeof(struct pl01x_priv),
+};
-- 
2.17.1

[PATCH v1 0/4] arm: s5p4418: migrate to DM_SERIAL

[Stefan Bosch]

This patch-series migrates the S5P4418-SOC and therefore also the
s5p4418_nanopi2 board from CONFIG_SERIAL to CONFIG_DM_SERIAL.


Stefan Bosch (4):
  arm: s5p4418: dm_serial: add driver source code
  arm: s5p4418: dm_serial: add uarts to dts
  arm: s5p4418: dm_serial: switch to DM_SERIAL
  arm: s5p4418: dm_serial: remove old code / add DEBUG_UART

 MAINTAINERS   |  1 +
 arch/arm/cpu/armv7/s5p4418/cpu.c  | 29 -
 arch/arm/dts/s5p4418-nanopi2.dts  |  6 ++
 arch/arm/dts/s5p4418-pinctrl.dtsi | 71 
 arch/arm/dts/s5p4418.dtsi | 40 
 arch/arm/mach-nexell/Kconfig  |  4 +-
 arch/arm/mach-nexell/clock.c  |  2 +-
 configs/s5p4418_nanopi2_defconfig |  8 ++-
 drivers/serial/Kconfig|  9 +++
 drivers/serial/Makefile   |  1 +
 drivers/serial/serial_s5p4418_pl011.c | 94 +++
 include/configs/s5p4418_nanopi2.h |  8 +--
 12 files changed, 235 insertions(+), 38 deletions(-)
 create mode 100644 drivers/serial/serial_s5p4418_pl011.c

-- 
2.17.1

Re: [PATCH] powerpc: dts: keymile: Deduplicate binman code

[Christophe Leroy]

Le 18/12/2022 à 11:59, Pali Rohár a écrit :
> On Sunday 18 December 2022 09:29:23 Christophe Leroy wrote:
 -  binman {
 -  filename = "u-boot-with-dtb.bin";
 -  skip-at-start = ;
 -  sort-by-offset;
 -  pad-byte = <0xff>;
 -  size = ;
 -
 -  u-boot-with-ucode-ptr {
 -  offset = ;
 -  optional-ucode;
 -  };
 -
 -  u-boot-dtb-with-ucode {
 -  align = <256>;
>>
>> u-boot.dtsi has 'align = <4>' . Will it still work ?
> 
> Yes, it must be <4> otherwise mpc85xx code does not boot. Other boards
> use global u-boot.dtsi so they are already fixed. Just this one board
> has copy of older (not fixed) content of u-boot.dtsi
> 
> See commits where it was fixed for other boards:
> 
> 7696b80ec5e9 powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL
> b898f6a6db76 powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting
> e8c0e0064c8a powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support
> 
> In separate thread is discussion about this issue:
> https://lore.kernel.org/u-boot/20221217235913.w7ihsktbplbp2j7z@pali/

Ok

Reviewed-by: Christophe Leroy 

Re: [PATCH] powerpc: dts: keymile: Deduplicate binman code

[Pali Rohár]

On Sunday 18 December 2022 09:29:23 Christophe Leroy wrote:
> Le 17/12/2022 à 23:15, Pali Rohár a écrit :
> > + Christophe and Mario: Could you please take this u-boot ppc patch?
> > 
> > On Friday 16 December 2022 19:16:38 Pali Rohár wrote:
> >> PING?
> >>
> >> On Monday 21 November 2022 18:40:41 Pali Rohár wrote:
> >>> + Tom
> >>>
> >>> On Tuesday 01 November 2022 23:57:08 Pali Rohár wrote:
>  PING?
> 
>  On Sunday 09 October 2022 14:28:19 Pali Rohár wrote:
> > PING?
> >
> > On Wednesday 03 August 2022 13:20:49 Pali Rohár wrote:
> >> kmcent2-u-boot.dtsi file contains copy of powerpc u-boot.dtsi binman 
> >> file.
> >> So remove code duplication and replace it by including u-boot.dtsi 
> >> file.
> >>
> >> Signed-off-by: Pali Rohár 
> >> ---
> >>   arch/powerpc/dts/kmcent2-u-boot.dtsi | 22 ++
> >>   1 file changed, 2 insertions(+), 20 deletions(-)
> >>
> >> diff --git a/arch/powerpc/dts/kmcent2-u-boot.dtsi 
> >> b/arch/powerpc/dts/kmcent2-u-boot.dtsi
> >> index ab76a9f1226c..d0277627644b 100644
> >> --- a/arch/powerpc/dts/kmcent2-u-boot.dtsi
> >> +++ b/arch/powerpc/dts/kmcent2-u-boot.dtsi
> >> @@ -74,24 +74,6 @@
> >>compatible = "fsl,pcie-t104x";
> >>law_trgt_if = <0>;
> >>};
> >> -
> >> -  binman {
> >> -  filename = "u-boot-with-dtb.bin";
> >> -  skip-at-start = ;
> >> -  sort-by-offset;
> >> -  pad-byte = <0xff>;
> >> -  size = ;
> >> -
> >> -  u-boot-with-ucode-ptr {
> >> -  offset = ;
> >> -  optional-ucode;
> >> -  };
> >> -
> >> -  u-boot-dtb-with-ucode {
> >> -  align = <256>;
> 
> u-boot.dtsi has 'align = <4>' . Will it still work ?

Yes, it must be <4> otherwise mpc85xx code does not boot. Other boards
use global u-boot.dtsi so they are already fixed. Just this one board
has copy of older (not fixed) content of u-boot.dtsi

See commits where it was fixed for other boards:

7696b80ec5e9 powerpc: mpc85xx: Fix loading U-Boot proper from SD card in SPL
b898f6a6db76 powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR booting
e8c0e0064c8a powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support

In separate thread is discussion about this issue:
https://lore.kernel.org/u-boot/20221217235913.w7ihsktbplbp2j7z@pali/

> >> -  };
> >> -  powerpc-mpc85xx-bootpg-resetvec {
> >> -  offset = <(CONFIG_RESET_VECTOR_ADDRESS - 
> >> 0xffc)>;
> >> -  };
> >> -  };
> >>   };
> >> +
> >> +#include "u-boot.dtsi"
> >> -- 
> >> 2.20.1
> >>

Re: [PATCH v4 25/25] board: rockchip: Add Edgeble Neu2 IO Board

[Kever Yang]

On 2022/12/15 01:51, Jagan Teki wrote:

Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki 



I have seen Heiko apply the dts into linux 6.3, so I will apply this 
patch set for U-Boot.



Reviewed-by: Kever Yang 

Thanks,
- Kever


---
Changes for v4:
- add MONITOR_LEN config
Changes for v3:
- updated the board names
Changes for v2:
- none

  .../dts/rv1126-edgeble-neu2-io-u-boot.dtsi| 10 
  arch/arm/mach-rockchip/rv1126/Kconfig | 16 ++
  board/edgeble/neural-compute-module-2/Kconfig | 16 ++
  .../neural-compute-module-2/MAINTAINERS   |  6 ++
  .../edgeble/neural-compute-module-2/Makefile  |  7 +++
  board/edgeble/neural-compute-module-2/neu2.c  |  4 ++
  configs/neu2-io-rv1126_defconfig  | 57 +++
  doc/board/rockchip/rockchip.rst   |  3 +
  include/configs/neural-compute-module-2.h | 21 +++
  9 files changed, 140 insertions(+)
  create mode 100644 arch/arm/dts/rv1126-edgeble-neu2-io-u-boot.dtsi
  create mode 100644 board/edgeble/neural-compute-module-2/Kconfig
  create mode 100644 board/edgeble/neural-compute-module-2/MAINTAINERS
  create mode 100644 board/edgeble/neural-compute-module-2/Makefile
  create mode 100644 board/edgeble/neural-compute-module-2/neu2.c
  create mode 100644 configs/neu2-io-rv1126_defconfig
  create mode 100644 include/configs/neural-compute-module-2.h

diff --git a/arch/arm/dts/rv1126-edgeble-neu2-io-u-boot.dtsi 
b/arch/arm/dts/rv1126-edgeble-neu2-io-u-boot.dtsi
new file mode 100644
index 00..51a1617708
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-neu2-io-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rv1126-u-boot.dtsi"
+
+ {
+   status = "disabled";
+};
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig 
b/arch/arm/mach-rockchip/rv1126/Kconfig
index 4f5021b083..7382c55996 100644
--- a/arch/arm/mach-rockchip/rv1126/Kconfig
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -1,5 +1,19 @@
  if ROCKCHIP_RV1126
  
+config TARGET_RV1126_NEU2

+   bool "Edgeble Neural Compute Module 2(Neu2) SoM"
+   help
+ Neu2:
+ Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
+ based on Rockchip RV1126 from Edgeble AI.
+ Neu2 powered with Consumer grade (0 to +80 °C) RV1126 SoC.
+ Neu2k powered with Industrial grade (-40 °C to +85 °C) RV1126K SoC.
+
+ Neu2-IO:
+ Neural Compute Module 2(Neu2) IO board is an industrial form factor
+ IO board and Neu2 needs to mount on top of this IO board in order to
+ create complete Edgeble Neural Compute Module 2(Neu2) IO platform.
+
  config SOC_SPECIFIC_OPTIONS # dummy
def_bool y
select HAS_CUSTOM_SYS_INIT_SP_ADDR
@@ -40,4 +54,6 @@ config SYS_MALLOC_F_LEN
  config TEXT_BASE
default 0x60
  
+source board/edgeble/neural-compute-module-2/Kconfig

+
  endif
diff --git a/board/edgeble/neural-compute-module-2/Kconfig 
b/board/edgeble/neural-compute-module-2/Kconfig
new file mode 100644
index 00..21faf4ad26
--- /dev/null
+++ b/board/edgeble/neural-compute-module-2/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_RV1126_NEU2
+
+config SYS_BOARD
+   default "neural-compute-module-2"
+
+config SYS_VENDOR
+   default "edgeble"
+
+config SYS_CONFIG_NAME
+   default "neural-compute-module-2"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select RAM_ROCKCHIP_LPDDR4
+
+endif
diff --git a/board/edgeble/neural-compute-module-2/MAINTAINERS 
b/board/edgeble/neural-compute-module-2/MAINTAINERS
new file mode 100644
index 00..38edb3a360
--- /dev/null
+++ b/board/edgeble/neural-compute-module-2/MAINTAINERS
@@ -0,0 +1,6 @@
+RV1126-ECM0
+M: Jagan Teki 
+S: Maintained
+F: board/edgeble/neural-compute-module-2
+F: include/configs/neural-compute-module-2.h
+F: configs/neu2-io-rv1126_defconfig
diff --git a/board/edgeble/neural-compute-module-2/Makefile 
b/board/edgeble/neural-compute-module-2/Makefile
new file mode 100644
index 00..3bfc89fa15
--- /dev/null
+++ b/board/edgeble/neural-compute-module-2/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += neu2.o
diff --git a/board/edgeble/neural-compute-module-2/neu2.c 
b/board/edgeble/neural-compute-module-2/neu2.c
new file mode 100644
index 00..3d2262ce97
--- /dev/null
+++ b/board/edgeble/neural-compute-module-2/neu2.c
@@ -0,0 +1,4 @@
+// 

Re: [PATCH v4 23/25] ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO

[Kever Yang]

On 2022/12/15 01:51, Jagan Teki wrote:

Neural Compute Module 2(Neu2) IO board is an industrial form factor
evaluation board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes for v4:
- pick changes from linux
Changes for v3:
- rebase on linux
Changes for v2:
- none

  arch/arm/dts/Makefile   |  3 ++
  arch/arm/dts/rv1126-edgeble-neu2-io.dts | 42 +
  2 files changed, 45 insertions(+)
  create mode 100644 arch/arm/dts/rv1126-edgeble-neu2-io.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 43951a7731..a0ea23113c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -170,6 +170,9 @@ dtb-$(CONFIG_ROCKCHIP_RV1108) += \
rv1108-elgin-r1.dtb \
rv1108-evb.dtb
  
+dtb-$(CONFIG_ROCKCHIP_RV1126) += \

+   rv1126-edgeble-neu2-io.dtb
+
  dtb-$(CONFIG_ARCH_S5P4418) += \
s5p4418-nanopi2.dtb
  
diff --git a/arch/arm/dts/rv1126-edgeble-neu2-io.dts b/arch/arm/dts/rv1126-edgeble-neu2-io.dts

new file mode 100644
index 00..dded0a12f0
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-neu2-io.dts
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+/dts-v1/;
+#include "rv1126.dtsi"
+#include "rv1126-edgeble-neu2.dtsi"
+
+/ {
+   model = "Edgeble Neu2 IO Board";
+   compatible = "edgeble,neural-compute-module-2-io",
+"edgeble,neural-compute-module-2", "rockchip,rv1126";
+
+   aliases {
+   serial2 = 
+   };
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+};
+
+ {
+   bus-width = <4>;
+   cap-mmc-highspeed;
+   cap-sd-highspeed;
+   card-detect-delay = <200>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_clk _cmd _bus4 _det>;
+   rockchip,default-sample-phase = <90>;
+   sd-uhs-sdr12;
+   sd-uhs-sdr25;
+   sd-uhs-sdr104;
+   vqmmc-supply = <_sd>;
+   status = "okay";
+};
+
+ {
+   status = "okay";
+};

Re: [PATCH v4 22/25] ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2)

[Kever Yang]

On 2022/12/15 01:51, Jagan Teki wrote:

Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.

General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 8/16/32GB eMMC
- 2x MIPI CSI2 FPC connector
- Fn-link 8223A-SR WiFi/BT

Industrial grade (-40 °C to +85 °C) version of the same class of module
called Neu2k powered with Rockchip RV1126K.

Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.

Add support for it.

Signed-off-by: Jagan Teki 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes for v4:
- pick changes from linux
Changes for v3:
- rebase on linux
Changes for v2:
- none

  arch/arm/dts/rv1126-edgeble-neu2.dtsi | 338 ++
  1 file changed, 338 insertions(+)
  create mode 100644 arch/arm/dts/rv1126-edgeble-neu2.dtsi

diff --git a/arch/arm/dts/rv1126-edgeble-neu2.dtsi 
b/arch/arm/dts/rv1126-edgeble-neu2.dtsi
new file mode 100644
index 00..cc64ba4be3
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-neu2.dtsi
@@ -0,0 +1,338 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+/ {
+   compatible = "edgeble,neural-compute-module-2", "rockchip,rv1126";
+
+   aliases {
+   mmc0 = 
+   };
+
+   vcc5v0_sys: vcc5v0-sys-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
+
+   vccio_flash: vccio-flash-regulator {
+   compatible = "regulator-fixed";
+   enable-active-high;
+   gpio = < RK_PB3 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_vol_sel>;
+   regulator-name = "vccio_flash";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   vin-supply = <_3v3>;
+   };
+
+   sdio_pwrseq: pwrseq-sdio {
+   compatible = "mmc-pwrseq-simple";
+   clocks = < 1>;
+   clock-names = "ext_clock";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+   reset-gpios = < RK_PD0 GPIO_ACTIVE_LOW>;
+   };
+};
+
+ {
+   cpu-supply = <_arm>;
+};
+
+ {
+   bus-width = <8>;
+   non-removable;
+   pinctrl-names = "default";
+   pinctrl-0 = <_bus8 _cmd _clk _rstnout>;
+   rockchip,default-sample-phase = <90>;
+   vmmc-supply = <_3v3>;
+   vqmmc-supply = <_flash>;
+   status = "okay";
+};
+
+ {
+   clock-frequency = <40>;
+   status = "okay";
+
+   rk809: pmic@20 {
+   compatible = "rockchip,rk809";
+   reg = <0x20>;
+   interrupt-parent = <>;
+   interrupts = ;
+   #clock-cells = <1>;
+   clock-output-names = "rk808-clkout1", "rk808-clkout2";
+   pinctrl-names = "default";
+   pinctrl-0 = <_int_l>;
+   rockchip,system-power-controller;
+   wakeup-source;
+
+   vcc1-supply = <_sys>;
+   vcc2-supply = <_sys>;
+   vcc3-supply = <_sys>;
+   vcc4-supply = <_sys>;
+   vcc5-supply = <_buck5>;
+   vcc6-supply = <_buck5>;
+   vcc7-supply = <_sys>;
+   vcc8-supply = <_sys>;
+   vcc9-supply = <_sys>;
+
+   regulators {
+   vdd_npu_vepu: DCDC_REG1 {
+   regulator-name = "vdd_npu_vepu";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-initial-mode = <0x2>;
+   regulator-min-microvolt = <65>;
+   regulator-max-microvolt = <95>;
+   regulator-ramp-delay = <6001>;
+   regulator-state-mem {
+   regulator-off-in-suspend;
+   };
+   };
+
+   vdd_arm: DCDC_REG2 {
+   regulator-name = "vdd_arm";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-initial-mode = <0x2>;
+   regulator-min-microvolt = <725000>;
+   regulator-max-microvolt = <135>;
+   regulator-ramp-delay = <6001>;
+   regulator-state-mem {
+   

Re: [PATCH v4 18/25] ARM: dts: rockchip: Add Rockchip RV1126 SoC

[Kever Yang]

On 2022/12/15 01:51, Jagan Teki wrote:

RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.

It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.

This patch add basic core dtsi support.

Signed-off-by: Jon Lin 
Signed-off-by: Sugar Zhang 
Signed-off-by: Jagan Teki 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes for v4:
- pick changes from linux
Changes for v3:
- collect Kever r-b
Changes for v2:
- none

  arch/arm/dts/rv1126.dtsi | 438 +++
  1 file changed, 438 insertions(+)
  create mode 100644 arch/arm/dts/rv1126.dtsi

diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
new file mode 100644
index 00..1cb43147e9
--- /dev/null
+++ b/arch/arm/dts/rv1126.dtsi
@@ -0,0 +1,438 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/ {
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   compatible = "rockchip,rv1126";
+
+   interrupt-parent = <>;
+
+   aliases {
+   i2c0 = 
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   cpu0: cpu@f00 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0xf00>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+
+   cpu1: cpu@f01 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0xf01>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+
+   cpu2: cpu@f02 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0xf02>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+
+   cpu3: cpu@f03 {
+   device_type = "cpu";
+   compatible = "arm,cortex-a7";
+   reg = <0xf03>;
+   enable-method = "psci";
+   clocks = < ARMCLK>;
+   };
+   };
+
+   arm-pmu {
+   compatible = "arm,cortex-a7-pmu";
+   interrupts = ,
+,
+,
+;
+   interrupt-affinity = <>, <>, <>, <>;
+   };
+
+   psci {
+   compatible = "arm,psci-1.0";
+   method = "smc";
+   };
+
+   timer {
+   compatible = "arm,armv7-timer";
+   interrupts = ,
+,
+,
+;
+   clock-frequency = <2400>;
+   };
+
+   xin24m: oscillator {
+   compatible = "fixed-clock";
+   clock-frequency = <2400>;
+   clock-output-names = "xin24m";
+   #clock-cells = <0>;
+   };
+
+   grf: syscon@fe00 {
+   compatible = "rockchip,rv1126-grf", "syscon", "simple-mfd";
+   reg = <0xfe00 0x2>;
+   };
+
+   pmugrf: syscon@fe02 {
+   compatible = "rockchip,rv1126-pmugrf", "syscon", "simple-mfd";
+   reg = <0xfe02 0x1000>;
+
+   pmu_io_domains: io-domains {
+   compatible = "rockchip,rv1126-pmu-io-voltage-domain";
+   status = "disabled";
+   };
+   };
+
+   qos_emmc: qos@fe86 {
+   compatible = "rockchip,rv1126-qos", "syscon";
+   reg = <0xfe86 0x20>;
+   };
+
+   qos_nandc: qos@fe860080 {
+   compatible = "rockchip,rv1126-qos", "syscon";
+   reg = <0xfe860080 0x20>;
+   };
+
+   qos_sfc: qos@fe860200 {
+   compatible = "rockchip,rv1126-qos", "syscon";
+   reg = <0xfe860200 0x20>;
+   };
+
+   qos_sdio: qos@fe86c000 {
+   compatible = "rockchip,rv1126-qos", "syscon";
+   reg = <0xfe86c000 0x20>;
+   };
+
+   gic: interrupt-controller@feff {
+   compatible = "arm,gic-400";
+   interrupt-controller;
+   #interrupt-cells = <3>;
+   #address-cells = <0>;
+
+   reg = <0xfeff1000 0x1000>,
+ <0xfeff2000 0x2000>,
+ <0xfeff4000 0x2000>,
+ <0xfeff6000 0x2000>;
+   interrupts = ;
+   

Re: [PATCH] phy: rockchip: handle clock without enable function

[Kever Yang]

On 2022/12/6 20:48, John Keeping wrote:

If a clock doesn't supply the enable hook, clk_enable() will return
-ENOSYS.  In this case the clock is always enabled so there is no error
and the phy initialisation should continue.

Signed-off-by: John Keeping 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c 
b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
index 62b8ba3a4a..b32a498ea7 100644
--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
@@ -119,7 +119,7 @@ static int rockchip_usb2phy_init(struct phy *phy)
int ret;
  
  	ret = clk_enable(>phyclk);

-   if (ret) {
+   if (ret && ret != -ENOSYS) {
dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret);
return ret;
}

Re: [PATCH] rockchip: Pinebook Pro: Do not initialize i2c before relocation

[Kever Yang]

Hi Simon,

On 2022/12/6 07:55, Simon Glass wrote:

Hi,

On Tue, 6 Dec 2022 at 11:25, Tom Rini  wrote:

On Mon, Dec 05, 2022 at 09:35:41PM +, Peter Robinson wrote:

On Sat, Dec 3, 2022 at 12:31 PM Michal Suchanek  wrote:

The i2c locks up when initialized before relocation, and it stays broken
in Linux as well breaking the ability to boot Linux.

The i2c bus and pmic was not actually used in pre-reloc before
commit ad607512f575 ("power: pmic: rk8xx: Support sysreset shutdown method")

The cause is not known.

This is board-specific, other boards that do not add the option to
include the i2c bus in pre-reloc DT are not affected.

Signed-off-by: Michal Suchanek 

Reviewed-by: Peter Robinson 
Tested-by: Peter Robinson 

Thanks for checking this out, I had noticed a regression and had got
as far as bisecting it but not getting to a fix.

Tom: can we get this pulled into 2023.01 please?

Probably should be, yes.  Kever, are there any other rockchip must-fixes
for v2023.01? I can take this directly if you don't have others and/or
don't want to make up a PR, thanks!

There is also this one:

https://patchwork.ozlabs.org/project/uboot/patch/20220928024046.2657593-1-...@chromium.org/


This patch has been merge into mainline at about 21th Oct.

I forgot to update the patch status in patchwork system.


Thanks,

- Kever


Regards,
Simon

Re: [PATCH] rockchip: Pinebook Pro: Do not initialize i2c before relocation

[Kever Yang]

On 2022/12/3 20:31, Michal Suchanek wrote:

The i2c locks up when initialized before relocation, and it stays broken
in Linux as well breaking the ability to boot Linux.

The i2c bus and pmic was not actually used in pre-reloc before
commit ad607512f575 ("power: pmic: rk8xx: Support sysreset shutdown method")

The cause is not known.

This is board-specific, other boards that do not add the option to
include the i2c bus in pre-reloc DT are not affected.

Signed-off-by: Michal Suchanek 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---

This is not tested, my board does not currentl;y boot at all, YMMV
---
  arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi | 8 
  1 file changed, 8 deletions(-)

diff --git a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi 
b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
index 2d87bea933..fd87102c0b 100644
--- a/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-pinebook-pro-u-boot.dtsi
@@ -20,14 +20,6 @@
rockchip,panel = <_panel>;
  };
  
- {

-   u-boot,dm-pre-reloc;
-};
-
- {
-   u-boot,dm-pre-reloc;
-};
-
   {
max-frequency = <2500>;
u-boot,dm-pre-reloc;

Re: [PATCH v4 5/5] rockchip: add support for PX30 Ringneck SoM on Haikou Devkit

[Kever Yang]

On 2022/11/29 20:19, Quentin Schulz wrote:

From: Quentin Schulz 

The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
 * CPU: quad-core Cortex-A35
 * DRAM: 2GB dual-channel
 * eMMC: onboard eMMC
 * SD/MMC
 * TI DP83825I 10/100Mbps PHY
 * USB:
 * USB2.0 dual role port
 * 3x USB2.0 host via onboard USB2.0 hub
 * Display: MIPI-DSI
 * Camera: MIPI-CSI
 * onboard 2.4GHz WiFi + Bluetooth module
 * Companion Controller: on-board additional microcontroller
  (STM32 Cortex-M0 or ATtiny):
 * RTC
 * fan controller
 * CAN (only STM32)

The non-U-Boot DTS files are imported from Linux next-20221114.

Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi  |  91 +
  arch/arm/dts/px30-ringneck-haikou.dts  | 232 +
  arch/arm/dts/px30-ringneck.dtsi| 382 +
  arch/arm/mach-rockchip/px30/Kconfig|  25 ++
  board/theobroma-systems/ringneck_px30/Kconfig  |  18 +
  board/theobroma-systems/ringneck_px30/MAINTAINERS  |   9 +
  board/theobroma-systems/ringneck_px30/Makefile |   7 +
  board/theobroma-systems/ringneck_px30/README   |  69 
  .../ringneck_px30/ringneck-px30.c  | 175 ++
  configs/ringneck-px30_defconfig| 128 +++
  doc/board/rockchip/rockchip.rst|   1 +
  include/configs/ringneck_px30.h|  15 +
  12 files changed, 1152 insertions(+)

diff --git a/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi 
b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
new file mode 100644
index 00..e8a34c7c1e
--- /dev/null
+++ b/arch/arm/dts/px30-ringneck-haikou-u-boot.dtsi
@@ -0,0 +1,91 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include "px30-u-boot.dtsi"
+
+/ {
+   config {
+   u-boot,mmc-env-offset = <0x5000>;  /* @  20KB */
+   u-boot,efi-partition-entries-offset = <0x20>; /* 2MB */
+   u-boot,boot-led = "module_led";
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   u-boot,spl-boot-order = "same-as-spl", , 
+   };
+};
+
+ {
+   simple-bin {
+   blob {
+   offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 64) 
* 512)>;
+   };
+   };
+};
+
+_clk {
+   u-boot,dm-pre-reloc;
+};
+
+_cmd {
+   u-boot,dm-pre-reloc;
+};
+
+_bus8 {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-pre-reloc;
+
+   /*
+* The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module
+* eMMC powered-down initially (in fact it keeps the reset signal
+* asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after
+* the SPL has been booted from SD Card.
+*/
+   bios-disable-override-hog {
+   u-boot,dm-pre-reloc;
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
+_pull_none_8ma {
+   u-boot,dm-pre-reloc;
+};
+
+_pull_up_8ma {
+   u-boot,dm-pre-reloc;
+};
+
+_bus4 {
+   u-boot,dm-pre-reloc;
+};
+
+_clk {
+   u-boot,dm-pre-reloc;
+};
+
+_cmd {
+   u-boot,dm-pre-reloc;
+};
+
+_det {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   clock-frequency = <2400>;
+   u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/px30-ringneck-haikou.dts 
b/arch/arm/dts/px30-ringneck-haikou.dts
new file mode 100644
index 00..08a3ad3e7a
--- /dev/null
+++ b/arch/arm/dts/px30-ringneck-haikou.dts
@@ -0,0 +1,232 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH
+ */
+
+/dts-v1/;
+#include "px30-ringneck.dtsi"
+#include 
+#include 
+
+/ {
+   model = "Theobroma Systems PX30-uQ7 SoM on Haikou devkit";
+   compatible = "tsd,px30-ringneck-haikou", "rockchip,px30";
+
+   aliases {
+   mmc2 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:115200n8";
+   };
+
+   gpio-keys {
+   compatible = "gpio-keys";
+   pinctrl-0 = <_keys_pin>;
+   pinctrl-names = "default";
+
+   button-batlow-n {
+   label = "BATLOW#";
+   linux,code = ;
+   gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
+   };
+
+   button-slp-btn-n {
+   label = "SLP_BTN#";
+   linux,code = ;
+   gpios = < RK_PB7 GPIO_ACTIVE_LOW>;
+   };
+
+   button-wake-n {
+   label = "WAKE#";
+   linux,code = 

Re: [PATCH v4 3/5] rockchip: px30: insert u-boot, spl-boot-device into U-Boot device tree

[Kever Yang]

On 2022/11/29 20:19, Quentin Schulz wrote:

From: Quentin Schulz 

It is possible to boot U-Boot proper from a different storage medium
than the one used by the BOOTROM to load the SPL. This information is
stored in the u-boot,spl-boot-device Device Tree property and is
accessible from U-Boot proper so that it has knowledge at runtime where
it was loaded from.

Let's add support for this feature for px30.

Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/mach-rockchip/px30/px30.c | 50 ++
  1 file changed, 50 insertions(+)

diff --git a/arch/arm/mach-rockchip/px30/px30.c 
b/arch/arm/mach-rockchip/px30/px30.c
index 481b50235e..5f26128d01 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -6,6 +6,7 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
@@ -427,3 +428,52 @@ void board_debug_uart_init(void)
  #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */
  }
  #endif /* CONFIG_DEBUG_UART_BOARD_INIT */
+
+#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)
+const char *spl_decode_boot_device(u32 boot_device)
+{
+   int i;
+   static const struct {
+   u32 boot_device;
+   const char *ofpath;
+   } spl_boot_devices_tbl[] = {
+   { BOOT_DEVICE_MMC2, "/mmc@ff37" },
+   { BOOT_DEVICE_MMC1, "/mmc@ff39" },
+   };
+
+   for (i = 0; i < ARRAY_SIZE(spl_boot_devices_tbl); ++i)
+   if (spl_boot_devices_tbl[i].boot_device == boot_device)
+   return spl_boot_devices_tbl[i].ofpath;
+
+   return NULL;
+}
+
+void spl_perform_fixups(struct spl_image_info *spl_image)
+{
+   void *blob = spl_image->fdt_addr;
+   const char *boot_ofpath;
+   int chosen;
+
+   /*
+* Inject the ofpath of the device the full U-Boot (or Linux in
+* Falcon-mode) was booted from into the FDT, if a FDT has been
+* loaded at the same time.
+*/
+   if (!blob)
+   return;
+
+   boot_ofpath = spl_decode_boot_device(spl_image->boot_device);
+   if (!boot_ofpath) {
+   pr_err("%s: could not map boot_device to ofpath\n", __func__);
+   return;
+   }
+
+   chosen = fdt_find_or_add_subnode(blob, 0, "chosen");
+   if (chosen < 0) {
+   pr_err("%s: could not find/create '/chosen'\n", __func__);
+   return;
+   }
+   fdt_setprop_string(blob, chosen,
+  "u-boot,spl-boot-device", boot_ofpath);
+}
+#endif

Re: [PATCH v2] configs: roc-pc-rk3399: Enable rockchip efuse support

[Kever Yang]

On 2022/11/23 21:59, Christopher Obbard wrote:

Enable efuse support which allows reading of the cpuid#, serial#
and also generates a unique mac address from the board's serial.

Signed-off-by: Christopher Obbard 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes in v2:
- added missing configuration symbol CONFIG_MISC_INIT_R=y

  configs/roc-pc-mezzanine-rk3399_defconfig | 2 ++
  configs/roc-pc-rk3399_defconfig   | 2 ++
  2 files changed, 4 insertions(+)

diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig 
b/configs/roc-pc-mezzanine-rk3399_defconfig
index 3cdcc729f853..d936309709ed 100644
--- a/configs/roc-pc-mezzanine-rk3399_defconfig
+++ b/configs/roc-pc-mezzanine-rk3399_defconfig
@@ -22,6 +22,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
  # CONFIG_ANDROID_BOOT_IMAGE is not set
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
  CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
  CONFIG_SPL_MAX_SIZE=0x2e000
  CONFIG_SPL_PAD_TO=0x7f8000
  CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -50,6 +51,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
  CONFIG_ROCKCHIP_GPIO=y
  CONFIG_SYS_I2C_ROCKCHIP=y
  CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
  CONFIG_MMC_DW=y
  CONFIG_MMC_DW_ROCKCHIP=y
  CONFIG_MMC_SDHCI=y
diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig
index e03442afa462..865d4e0e9f25 100644
--- a/configs/roc-pc-rk3399_defconfig
+++ b/configs/roc-pc-rk3399_defconfig
@@ -22,6 +22,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
  # CONFIG_ANDROID_BOOT_IMAGE is not set
  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
  CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
  CONFIG_SPL_MAX_SIZE=0x2e000
  CONFIG_SPL_PAD_TO=0x7f8000
  CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
@@ -49,6 +50,7 @@ CONFIG_SPL_DM_SEQ_ALIAS=y
  CONFIG_ROCKCHIP_GPIO=y
  CONFIG_SYS_I2C_ROCKCHIP=y
  CONFIG_MISC=y
+CONFIG_ROCKCHIP_EFUSE=y
  CONFIG_MMC_DW=y
  CONFIG_MMC_DW_ROCKCHIP=y
  CONFIG_MMC_SDHCI=y

Re: [PATCH 2/2] rockchip: mkimage: make RC4 key const

[Kever Yang]

On 2022/11/19 00:13, John Keeping wrote:

This is read-only data, so mark it as such.

Signed-off-by: John Keeping 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  tools/rkcommon.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 0db45c2d41..fab61949e1 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -154,7 +154,7 @@ struct spl_params {
  
  static struct spl_params spl_params = { 0 };
  
-static unsigned char rc4_key[16] = {

+static const unsigned char rc4_key[16] = {
124, 78, 3, 4, 85, 5, 9, 7,
45, 44, 123, 56, 23, 13, 23, 17
  };

Re: [PATCH 1/2] rc4: mark key as const

[Kever Yang]

On 2022/11/19 00:13, John Keeping wrote:

Key data is never written so the parameter can be const, which allows
putting fixed keys in .rodata.

Signed-off-by: John Keeping 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  include/rc4.h | 2 +-
  lib/rc4.c | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/rc4.h b/include/rc4.h
index c1ff1349d4..d1257f20a4 100644
--- a/include/rc4.h
+++ b/include/rc4.h
@@ -15,6 +15,6 @@
   * @len:  Length of buffer in bytes
   * @key:  16-byte key to use
   */
-void rc4_encode(unsigned char *buf, unsigned int len, unsigned char key[16]);
+void rc4_encode(unsigned char *buf, unsigned int len, const unsigned char 
key[16]);
  
  #endif

diff --git a/lib/rc4.c b/lib/rc4.c
index 0c00439843..720112d1fd 100644
--- a/lib/rc4.c
+++ b/lib/rc4.c
@@ -12,7 +12,7 @@
  #endif
  #include 
  
-void rc4_encode(unsigned char *buf, unsigned int len, unsigned char key[16])

+void rc4_encode(unsigned char *buf, unsigned int len, const unsigned char 
key[16])
  {
unsigned char s[256], k[256], temp;
unsigned short i, j, t;

Re: [PATCH] rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114

[Kever Yang]

On 2022/11/15 22:46, Quentin Schulz wrote:

From: Quentin Schulz 

This synchronizes the Device Trees related to Puma RK3399 SoM with Linux
kernel next-20221114 to include two important changes pertaining to
eMMC and SD card instability.

Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
To: Simon Glass 
To: Philipp Tomsich 
To: Kever Yang 
To: Klaus Goger 
Cc: u-boot@lists.denx.de
---
  arch/arm/dts/rk3399-puma-haikou.dts |  5 +++--
  arch/arm/dts/rk3399-puma.dtsi   | 32 +++-
  2 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/rk3399-puma-haikou.dts 
b/arch/arm/dts/rk3399-puma-haikou.dts
index 292bb7e80c..115c14c0a3 100644
--- a/arch/arm/dts/rk3399-puma-haikou.dts
+++ b/arch/arm/dts/rk3399-puma-haikou.dts
@@ -49,7 +49,7 @@
sgtl5000_clk: sgtl5000-oscillator  {
compatible = "fixed-clock";
#clock-cells = <0>;
-   clock-frequency  = <24576000>;
+   clock-frequency = <24576000>;
};
  
  	dc_12v: dc-12v {

@@ -207,7 +207,7 @@
cap-sd-highspeed;
cd-gpios = < RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
-   max-frequency = <15000>;
+   max-frequency = <4000>;
pinctrl-names = "default";
pinctrl-0 = <_clk _cmd _cd _bus4>;
vmmc-supply = <_baseboard>;
@@ -232,6 +232,7 @@
  
  _dwc3_0 {

dr_mode = "otg";
+   extcon = <_usb3>;
status = "okay";
  };
  
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi

index fb67db4619..aa3e21bd6c 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -25,6 +25,13 @@
};
};
  
+	extcon_usb3: extcon-usb3 {

+   compatible = "linux,extcon-usb-gpio";
+   id-gpio = < RK_PC2 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_id>;
+   };
+
clkin_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <12500>;
@@ -55,7 +62,6 @@
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
gpio = < RK_PA3 GPIO_ACTIVE_LOW>;
-   enable-active-low;
pinctrl-names = "default";
pinctrl-0 = <_host_en>;
regulator-name = "vcc5v0_host";
@@ -71,6 +77,17 @@
regulator-min-microvolt = <500>;
regulator-max-microvolt = <500>;
};
+
+   vdd_log: vdd-log {
+   compatible = "pwm-regulator";
+   pwms = < 0 25000 1>;
+   pwm-supply = <_sys>;
+   regulator-name = "vdd_log";
+   regulator-min-microvolt = <80>;
+   regulator-max-microvolt = <140>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
  };
  
  _b0 {

@@ -422,9 +439,22 @@
  <4 RK_PA3 RK_FUNC_GPIO _pull_none>;
};
};
+
+   usb3 {
+   usb3_id: usb3-id {
+   rockchip,pins =
+ <1 RK_PC2 RK_FUNC_GPIO _pull_none>;
+   };
+   };
  };
  
   {

+   /*
+* Signal integrity isn't great at 200MHz but 100MHz has proven stable
+* enough.
+*/
+   max-frequency = <1>;
+
bus-width = <8>;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;

---
base-commit: c4ee4fe92e9be120be6d12718273dec6b63cc7d9
change-id: 20221115-puma-dts-sync-b73a5c739ad8

Best regards,

Re: [PATCH] board: rockchip: Add support for Rock Pi S

[Kever Yang]

Hi Angelo,

    1. please add simple description about this board like other new 
board add;


    2. please add mainline kernel commit number or tag for dts;

    3. please split tht dts change and board support change into two 
patches.



Thanks,

- Kever

On 2022/11/15 16:55, Angelo Compagnucci wrote:

Add support for the Radxa Rock Pi S RK3308 SBC.

Signed-off-by: Angelo Compagnucci 
---
  arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi |  21 
  arch/arm/dts/rk3308-rock-pi-s.dts | 115 ++
  arch/arm/mach-rockchip/rk3308/Kconfig |   5 +
  board/radxa/rock-pi-s/Kconfig |  15 +++
  board/radxa/rock-pi-s/MAINTAINERS |   8 ++
  board/radxa/rock-pi-s/Makefile|   7 ++
  board/radxa/rock-pi-s/rock-pi-s.c |   6 ++
  configs/rock-pi-s-rk3308_defconfig|  88 +
  doc/README.rockchip   |   7 ++
  include/configs/rock-pi-s.h   |  15 +++
  include/configs/rock-pi-s_rk3308.h|  15 +++
  11 files changed, 302 insertions(+)
  create mode 100644 arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
  create mode 100644 arch/arm/dts/rk3308-rock-pi-s.dts
  create mode 100644 board/radxa/rock-pi-s/Kconfig
  create mode 100644 board/radxa/rock-pi-s/MAINTAINERS
  create mode 100644 board/radxa/rock-pi-s/Makefile
  create mode 100644 board/radxa/rock-pi-s/rock-pi-s.c
  create mode 100644 configs/rock-pi-s-rk3308_defconfig
  create mode 100644 include/configs/rock-pi-s.h
  create mode 100644 include/configs/rock-pi-s_rk3308.h

diff --git a/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi 
b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
new file mode 100644
index 00..b6f18824ba
--- /dev/null
+++ b/arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2022 Angelo Compagnucci 
+ */
+#include "rk3308-u-boot.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = "same-as-spl", , 
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   clock-frequency = <2400>;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/rk3308-rock-pi-s.dts 
b/arch/arm/dts/rk3308-rock-pi-s.dts
new file mode 100644
index 00..5880fec8fe
--- /dev/null
+++ b/arch/arm/dts/rk3308-rock-pi-s.dts
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Angelo Compagnucci 
+ */
+
+/dts-v1/;
+#include "rk3308.dtsi"
+
+/ {
+   model = "Radxa ROCK Pi S";
+   compatible = "radxa,rockpis", "rockchip,rk3308";
+
+   aliases {
+   mmc0 = 
+   mmc1 = 
+   };
+
+   chosen {
+   stdout-path = "serial0:150n8";
+   };
+
+   vcc_1v8: vcc-1v8 {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_1v8";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   vin-supply = <_io>;
+   };
+
+   vcc_io: vcc-io {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_io";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_sys>;
+   };
+
+   vcc_ddr: vcc-ddr {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_ddr";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <150>;
+   regulator-max-microvolt = <150>;
+   vin-supply = <_sys>;
+   };
+
+   vcc5v0_sys: vcc5v0-sys {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc5v0_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
+
+   vdd_core: vdd-core {
+   compatible = "pwm-regulator";
+   pwms = < 0 5000 1>;
+   pwm-supply = <_sys>;
+   regulator-name = "vdd_core";
+   regulator-min-microvolt = <827000>;
+   regulator-max-microvolt = <134>;
+   regulator-init-microvolt = <1015000>;
+   regulator-settling-time-up-us = <250>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+};
+
+ {
+   cpu-supply = <_core>;
+};
+
+ {
+   bus-width = <4>;
+   cap-mmc-highspeed;
+   mmc-hs200-1_8v;
+   non-removable;
+   vmmc-supply = <_io>;
+   status = "okay";
+};
+
+ {
+   clock_in_out = "output";
+   phy-supply = <_io>;
+   snps,reset-gpio = < RK_PA7 GPIO_ACTIVE_LOW>;
+   snps,reset-active-low;
+   snps,reset-delays-us = <0 5 5>;
+   

Re: [PATCH] rockchip: rk3399: pass platform parameter to TF-A by default

[Kever Yang]

Hi Quentin,

    I would prefer you to remove SPL_ATF_NO_PLATFORM_PARAM in those 
boards you have test,


there may have some boards using legacy ATF binary but still want to use 
mainline U-Boot


which may have problem with this update.


Thanks,

- Kever

On 2022/11/15 01:37, Quentin Schulz wrote:

From: Quentin Schulz 

Long are gone the times TF-A couldn't handle the FDT passed by U-Boot.
Specifically, since commit e7b586987c0a ("rockchip: don't crash if we
get an FDT we can't parse") in TF-A, failure to parse the FDT will use
the fallback mechanism. This patch was merged in TF-A v2.4-rc0 from two
years ago.

Therefore, let's finally pass the FDT to TF-A so that it can get the
serial configuration from U-Boot FDT instead of requiring the user to
patch TF-A hardcoded fallback values.

Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 
---
rockchip: rk3399: pass platform parameter to TF-A

Finally pass the FDT address to TF-A since it now gracefully fallbacks to
hardcoded defaults if it cannot parse it. This allows us to avoid modifying
hardcoded values in TF-A to enable the console.

This was tested with TF-A v2.7.0 on Puma Haikou RK3399.

To: Simon Glass 
To: Philipp Tomsich 
To: Kever Yang 
Cc: Hugh Cole-Baker 
Cc: Walter Lozano 
Cc: u-boot@lists.denx.de
---
  arch/arm/mach-rockchip/Kconfig | 1 -
  1 file changed, 1 deletion(-)

diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 69d51ff378..2fcc23f9fa 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -249,7 +249,6 @@ config ROCKCHIP_RK3399
imply PRE_CONSOLE_BUFFER
imply ROCKCHIP_COMMON_BOARD
imply ROCKCHIP_SDRAM_COMMON
-   imply SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
imply SPL_ROCKCHIP_COMMON_BOARD
imply TPL_SERIAL
imply TPL_LIBCOMMON_SUPPORT

---
base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3
change-id: 20221114-rk3399-tf-a-plat-param-3ab055f40b9e

Best regards,

Re: [PATCH v2] rockchip: px30: make watchdog and tsadc trigger a first global reset

[Kever Yang]

On 2022/11/11 19:25, Quentin Schulz wrote:

From: Quentin Schulz 

By default, the PX30 is configured for watchdog and tsadc to trigger a
second global reset which is a more permissive reset than first global
reset.

>From TRM part 1 "2.3 System Reset Solution":
glb_srstn_1 will reset the all logic, and
glb_srstn_2 will reset the all logic except GRF, SGRF and all GPIOs.

This enforces that the watchdog and tsadc trigger glb_srstn_1 as
similarly done for RK3399 in U-Boot (in SDRAM driver for some reason?),
TF-A and Coreboot.

Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
rockchip: px30: make watchdog and tsadc trigger a first global reset

Our devkits have a HW switch which electrically cuts the power and clock lines
to the on-board eMMC so that the module is forced to boot from SD card (or enter
USB flashing mode if none is present). This HW switch is electrically bypassed
in SW by a GPIO in U-Boot SPL to allow for eMMC to be used in U-Boot and Linux.

In a second global reset, the GPIO do not get reset and is therefore still
bypassing the HW switch, meaning the eMMC will be operational even though it is
not desired (because the HW switch is supposed to enforce booting from SD
card/USB when in that position).

This also mimics what's seen on RK3399.

To: Simon Glass 
To: Philipp Tomsich 
To: Kever Yang 
Cc: u-boot@lists.denx.de
---
Changes in v2:
- add missing cru struct
---
  arch/arm/mach-rockchip/px30/px30.c | 4 
  1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-rockchip/px30/px30.c 
b/arch/arm/mach-rockchip/px30/px30.c
index 0641e6af0f..ded03ffa51 100644
--- a/arch/arm/mach-rockchip/px30/px30.c
+++ b/arch/arm/mach-rockchip/px30/px30.c
@@ -234,6 +234,7 @@ enum {
  int arch_cpu_init(void)
  {
static struct px30_grf * const grf = (void *)GRF_BASE;
+   static struct px30_cru * const cru = (void *)CRU_BASE;
u32 __maybe_unused val;
  
  #ifdef CONFIG_SPL_BUILD

@@ -285,6 +286,9 @@ int arch_cpu_init(void)
/* Clear the force_jtag */
rk_clrreg(>cpu_con[1], 1 << 7);
  
+	/* Make TSADC and WDT trigger a first global reset */

+   clrsetbits_le32(>glb_rst_con, 0x3, 0x3);
+
return 0;
  }
  


---
base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3
change-id: 2022-px30-wdt-1-glb-rst-0ce41249727d

Best regards,

Re: [PATCH] rockchip: puma: fix GPT table corruption when saving U-Boot environment

[Kever Yang]

On 2022/10/25 18:58, Quentin Schulz wrote:

From: Quentin Schulz 

The GPT table is taking the first 34 sectors, which amounts to 0x4400
bytes. Saving the environment below this address in storage will corrupt
the GPT table.

While technically the table ends at 0x4400, some tools (e.g. bmaptool)
are rounding everything to the logical block size (0x1000), so it is
safer to make it point to 0x5000 so that the environment could still
persist when flashing a sparse image with bmaptool or similar tools.

Obviously, the default 0x4000 environment size does not work anymore, so
let's set it to 0x3000 so it does fill the gap between the GPT table
(rounded to 0x1000) and the start of the idbloader.img.

Fixes: 56f580d3eb8d ("rockchip: dts: rk3399-puma: put environment (in MMC/SD 
configurations) before SPL")
Cc: Quentin Schulz 
Signed-off-by: Quentin Schulz 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
To: Simon Glass 
To: Philipp Tomsich 
To: Kever Yang 
To: Klaus Goger 
Cc: u-boot@lists.denx.de
---
  arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi | 2 +-
  configs/puma-rk3399_defconfig   | 1 +
  2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi 
b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
index f8335c74a7..d2349ae90e 100644
--- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
@@ -15,7 +15,7 @@
  / {
config {
u-boot,spl-payload-offset = <0x8>; /* @ 512KB */
-   u-boot,mmc-env-offset = <0x4000>;  /* @  16KB */
+   u-boot,mmc-env-offset = <0x5000>;  /* @  20KB */
u-boot,efi-partition-entries-offset = <0x20>; /* 2MB */
u-boot,boot-led = "module_led";
sysreset-gpio = < RK_PA6 GPIO_ACTIVE_HIGH>;
diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index 34186d1caa..91f31b37e8 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -5,6 +5,7 @@ CONFIG_ARCH_ROCKCHIP=y
  CONFIG_SYS_TEXT_BASE=0x0020
  CONFIG_SPL_GPIO=y
  CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x3000
  CONFIG_ENV_OFFSET=0x3F8000
  CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou"
  CONFIG_ROCKCHIP_RK3399=y

---
base-commit: 1e892ef0b59a4a04971ac23619b95917020b3e18
change-id: 20221025-upstream-puma-mmc-env-gpt-6f42cd038fdd

Best regards,

Re: [PATCH 3/3] rockchip: Add initial support for the PINE64 Pinephone Pro

[Kever Yang]

On 2022/10/25 15:52, Peter Robinson wrote:

The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.

Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem

Signed-off-by: Peter Robinson 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi |  39 +++
  arch/arm/mach-rockchip/rk3399/Kconfig |   8 ++
  board/pine64/pinephone-pro-rk3399/Kconfig |  15 +++
  board/pine64/pinephone-pro-rk3399/MAINTAINERS |   8 ++
  board/pine64/pinephone-pro-rk3399/Makefile|   1 +
  .../pinephone-pro-rk3399.c|  76 +
  configs/pinephone-pro-rk3399_defconfig| 104 ++
  include/configs/pinephone-pro-rk3399.h|  19 
  8 files changed, 270 insertions(+)
  create mode 100644 arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
  create mode 100644 board/pine64/pinephone-pro-rk3399/Kconfig
  create mode 100644 board/pine64/pinephone-pro-rk3399/MAINTAINERS
  create mode 100644 board/pine64/pinephone-pro-rk3399/Makefile
  create mode 100644 board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
  create mode 100644 configs/pinephone-pro-rk3399_defconfig
  create mode 100644 include/configs/pinephone-pro-rk3399.h

diff --git a/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi 
b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
new file mode 100644
index 000..c9f1f4af635
--- /dev/null
+++ b/arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2022 Peter Robinson 
+ */
+
+#include "rk3399-u-boot.dtsi"
+#include "rk3399-sdram-lpddr4-100.dtsi"
+
+/ {
+   chosen {
+   u-boot,spl-boot-order = "same-as-spl", , 
+   };
+
+   config {
+   u-boot,spl-payload-offset = <0x6>; /* @ 384KB */
+   };
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   status = "okay";
+};
+
+ {
+   max-frequency = <2500>;
+   u-boot,dm-pre-reloc;
+};
+
+ {
+   max-frequency = <2000>;
+   u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/mach-rockchip/rk3399/Kconfig 
b/arch/arm/mach-rockchip/rk3399/Kconfig
index b48feeb3466..d01063ac98b 100644
--- a/arch/arm/mach-rockchip/rk3399/Kconfig
+++ b/arch/arm/mach-rockchip/rk3399/Kconfig
@@ -39,6 +39,13 @@ config TARGET_PINEBOOK_PRO_RK3399
  with 4Gb RAM, onboard eMMC, USB-C, a USB3 and USB2 port,
  1920*1080 screen and all the usual laptop features.
  
+config TARGET_PINEPHONE_PRO_RK3399

+   bool "PinePhone Pro"
+   help
+ PinePhone Pro is a phone based on a variant of the Rockchip
+ rk3399 SoC with 4Gb RAM, onboard eMMC, USB-C, headphone jack,
+ 720x1440 screen and a Quectel 4G/LTE modem.
+
  config TARGET_PUMA_RK3399
bool "Theobroma Systems RK3399-Q7 (Puma)"
help
@@ -165,6 +172,7 @@ endif # BOOTCOUNT_LIMIT
  source "board/firefly/roc-pc-rk3399/Kconfig"
  source "board/google/gru/Kconfig"
  source "board/pine64/pinebook-pro-rk3399/Kconfig"
+source "board/pine64/pinephone-pro-rk3399/Kconfig"
  source "board/pine64/rockpro64_rk3399/Kconfig"
  source "board/rockchip/evb_rk3399/Kconfig"
  source "board/theobroma-systems/puma_rk3399/Kconfig"
diff --git a/board/pine64/pinephone-pro-rk3399/Kconfig 
b/board/pine64/pinephone-pro-rk3399/Kconfig
new file mode 100644
index 000..13d6465ae6e
--- /dev/null
+++ b/board/pine64/pinephone-pro-rk3399/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_PINEPHONE_PRO_RK3399
+
+config SYS_BOARD
+   default "pinephone-pro-rk3399"
+
+config SYS_VENDOR
+   default "pine64"
+
+config SYS_CONFIG_NAME
+   default "pinephone-pro-rk3399"
+
+config BOARD_SPECIFIC_OPTIONS
+   def_bool y
+
+endif
diff --git a/board/pine64/pinephone-pro-rk3399/MAINTAINERS 
b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
new file mode 100644
index 000..c923ff1be32
--- /dev/null
+++ b/board/pine64/pinephone-pro-rk3399/MAINTAINERS
@@ -0,0 +1,8 @@
+PINEPHONE_PRO
+M: Peter Robinson 
+S: Maintained
+F: board/pine64/rk3399-pinephone-pro/
+F: include/configs/rk3399-pinephone-pro.h
+F: arch/arm/dts/rk3399-pinephone-pro.dts
+F: arch/arm/dts/rk3399-pinephone-pro-u-boot.dtsi
+F: configs/pinephone-pro-rk3399_defconfig
diff --git a/board/pine64/pinephone-pro-rk3399/Makefile 
b/board/pine64/pinephone-pro-rk3399/Makefile
new file mode 100644
index 000..8d9203053e5
--- /dev/null
+++ b/board/pine64/pinephone-pro-rk3399/Makefile
@@ -0,0 +1 @@
+obj-y  += pinephone-pro-rk3399.o
diff --git a/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c 
b/board/pine64/pinephone-pro-rk3399/pinephone-pro-rk3399.c
new 

Re: [PATCH 2/3] arm64: dts: rk3399: Add upstream Pinephone Pro dts

[Kever Yang]

On 2022/10/25 15:52, Peter Robinson wrote:

Initial support for the PinePhone Pro has now landed upstream in
Linux 6.1 RC1 so sync the dts from upstream for initial support.

Signed-off-by: Peter Robinson 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/dts/Makefile |   1 +
  arch/arm/dts/rk3399-pinephone-pro.dts | 398 ++
  2 files changed, 399 insertions(+)
  create mode 100644 arch/arm/dts/rk3399-pinephone-pro.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 965895bc2a3..624c4f997c3 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -153,6 +153,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-nanopi-r4s.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
+   rk3399-pinephone-pro.dtb \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
diff --git a/arch/arm/dts/rk3399-pinephone-pro.dts 
b/arch/arm/dts/rk3399-pinephone-pro.dts
new file mode 100644
index 000..2e058c31502
--- /dev/null
+++ b/arch/arm/dts/rk3399-pinephone-pro.dts
@@ -0,0 +1,398 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2020 Martijn Braam 
+ * Copyright (c) 2021 Kamil Trzciński 
+ */
+
+/*
+ * PinePhone Pro datasheet:
+ * 
https://files.pine64.org/doc/PinePhonePro/PinephonePro-Schematic-V1.0-20211127.pdf
+ */
+
+/dts-v1/;
+#include 
+#include "rk3399.dtsi"
+#include "rk3399-opp.dtsi"
+
+/ {
+   model = "Pine64 PinePhonePro";
+   compatible = "pine64,pinephone-pro", "rockchip,rk3399";
+   chassis-type = "handset";
+
+   aliases {
+   mmc0 = 
+   mmc1 = 
+   mmc2 = 
+   };
+
+   chosen {
+   stdout-path = "serial2:115200n8";
+   };
+
+   gpio-keys {
+   compatible = "gpio-keys";
+   pinctrl-names = "default";
+   pinctrl-0 = <_pin>;
+
+   key-power {
+   debounce-interval = <20>;
+   gpios = < RK_PA5 GPIO_ACTIVE_LOW>;
+   label = "Power";
+   linux,code = ;
+   wakeup-source;
+   };
+   };
+
+   vcc_sys: vcc-sys-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc3v3_sys: vcc3v3-sys-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc3v3_sys";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_sys>;
+   };
+
+   vcca1v8_s3: vcc1v8-s3-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcca1v8_s3";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   vin-supply = <_sys>;
+   regulator-always-on;
+   regulator-boot-on;
+   };
+
+   vcc1v8_codec: vcc1v8-codec-regulator {
+   compatible = "regulator-fixed";
+   enable-active-high;
+   gpio = < RK_PA4 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_codec_en>;
+   regulator-name = "vcc1v8_codec";
+   regulator-min-microvolt = <180>;
+   regulator-max-microvolt = <180>;
+   vin-supply = <_sys>;
+   };
+};
+
+_l0 {
+   cpu-supply = <_cpu_l>;
+};
+
+_l1 {
+   cpu-supply = <_cpu_l>;
+};
+
+_l2 {
+   cpu-supply = <_cpu_l>;
+};
+
+_l3 {
+   cpu-supply = <_cpu_l>;
+};
+
+_b0 {
+   cpu-supply = <_cpu_b>;
+};
+
+_b1 {
+   cpu-supply = <_cpu_b>;
+};
+
+_phy {
+   status = "okay";
+};
+
+ {
+   clock-frequency = <40>;
+   i2c-scl-rising-time-ns = <168>;
+   i2c-scl-falling-time-ns = <4>;
+   status = "okay";
+
+   rk818: pmic@1c {
+   compatible = "rockchip,rk818";
+   reg = <0x1c>;
+   interrupt-parent = <>;
+   interrupts = ;
+   #clock-cells = <1>;
+   clock-output-names = "xin32k", "rk808-clkout2";
+   pinctrl-names = "default";
+   pinctrl-0 = <_int_l>;
+   rockchip,system-power-controller;
+   wakeup-source;
+
+   vcc1-supply = <_sys>;
+   vcc2-supply = <_sys>;
+   vcc3-supply = <_sys>;
+   vcc4-supply = <_sys>;
+   vcc6-supply = <_sys>;
+   vcc7-supply = <_sys>;
+   vcc8-supply = <_sys>;
+   vcc9-supply = <_sys>;
+
+   regulators {
+   vdd_cpu_l: DCDC_REG1 {
+   regulator-name = "vdd_cpu_l";
+  

Re: [PATCH 1/3] arm64: dts: rk3399: sync rk3399.dtsi from 6.1-rc1

[Kever Yang]

On 2022/10/25 15:52, Peter Robinson wrote:

Sync rk3399.dtsi and associated bindings includes. Fix up building
of clk/rockchip/clk_rk3399.c for the changes as well as adjusting
the rk3399-u-boot.dtsi for the new upstream pieces.

Signed-off-by: Peter Robinson 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  arch/arm/dts/rk3399-opp.dtsi |   6 +-
  arch/arm/dts/rk3399-u-boot.dtsi  |  36 ++--
  arch/arm/dts/rk3399.dtsi | 200 ---
  drivers/clk/rockchip/clk_rk3399.c|   2 +-
  include/dt-bindings/clock/rk3399-cru.h   |  24 +--
  include/dt-bindings/power/rk3399-power.h |   1 +
  6 files changed, 206 insertions(+), 63 deletions(-)

diff --git a/arch/arm/dts/rk3399-opp.dtsi b/arch/arm/dts/rk3399-opp.dtsi
index da41cd81ebb..fee5e711127 100644
--- a/arch/arm/dts/rk3399-opp.dtsi
+++ b/arch/arm/dts/rk3399-opp.dtsi
@@ -4,7 +4,7 @@
   */
  
  / {

-   cluster0_opp: opp-table0 {
+   cluster0_opp: opp-table-0 {
compatible = "operating-points-v2";
opp-shared;
  
@@ -35,7 +35,7 @@

};
};
  
-	cluster1_opp: opp-table1 {

+   cluster1_opp: opp-table-1 {
compatible = "operating-points-v2";
opp-shared;
  
@@ -74,7 +74,7 @@

};
};
  
-	gpu_opp_table: opp-table2 {

+   gpu_opp_table: opp-table-2 {
compatible = "operating-points-v2";
  
  		opp00 {

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 3c1a15fe51b..2fa8f25a3e1 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -20,38 +20,12 @@
reg = <0x0 0xff62 0x0 0x100>;
};
  
-	dfi: dfi@ff63 {

-   u-boot,dm-pre-reloc;
-   reg = <0x00 0xff63 0x00 0x4000>;
-   compatible = "rockchip,rk3399-dfi";
-   rockchip,pmu = <>;
-   clocks = < PCLK_DDR_MON>;
-   clock-names = "pclk_ddr_mon";
-   };
-
rng: rng@ff8b8000 {
compatible = "rockchip,cryptov1-rng";
reg = <0x0 0xff8b8000 0x0 0x1000>;
status = "okay";
};
  
-	dmc: dmc {

-   u-boot,dm-pre-reloc;
-   compatible = "rockchip,rk3399-dmc";
-   devfreq-events = <>;
-   interrupts = ;
-   clocks = < SCLK_DDRCLK>;
-   clock-names = "dmc_clk";
-   reg = <0x0 0xffa8 0x0 0x0800
-  0x0 0xffa80800 0x0 0x1800
-  0x0 0xffa82000 0x0 0x2000
-  0x0 0xffa84000 0x0 0x1000
-  0x0 0xffa88000 0x0 0x0800
-  0x0 0xffa88800 0x0 0x1800
-  0x0 0xffa8a000 0x0 0x2000
-  0x0 0xffa8c000 0x0 0x1000>;
-   };
-
pmusgrf: syscon@ff33 {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pmusgrf", "syscon";
@@ -88,6 +62,16 @@
u-boot,dm-pre-reloc;
  };
  
+ {

+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
+ {
+   u-boot,dm-pre-reloc;
+   status = "okay";
+};
+
  _phy {
u-boot,dm-pre-reloc;
  };
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 3871c7fd83b..92c2207e686 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -124,6 +124,12 @@
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <_SLEEP _SLEEP>;
+
+   thermal-idle {
+   #cooling-cells = <2>;
+   duration-us = <1>;
+   exit-latency-us = <500>;
+   };
};
  
  		cpu_b1: cpu@101 {

@@ -136,6 +142,12 @@
#cooling-cells = <2>; /* min followed by max */
dynamic-power-coefficient = <436>;
cpu-idle-states = <_SLEEP _SLEEP>;
+
+   thermal-idle {
+   #cooling-cells = <2>;
+   duration-us = <1>;
+   exit-latency-us = <500>;
+   };
};
  
  		idle-states {

@@ -166,6 +178,15 @@
ports = <_out>, <_out>;
};
  
+	dmc: memory-controller {

+   compatible = "rockchip,rk3399-dmc";
+   rockchip,pmu = <>;
+   devfreq-events = <>;
+   clocks = < SCLK_DDRC>;
+   clock-names = "dmc_clk";
+   status = "disabled";
+   };
+
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = ;
@@ -361,6 +382,54 @@
status = "disabled";
};
  
+	debug@fe43 {

+   compatible = "arm,coresight-cpu-debug", 

Re: [PATCH] arm: dts: rockchip: add support for ROCK 4C+

[Kever Yang]

Hi Naoki,

    Please add simple descrption for this new board,

and does the dts merged in mainline kernel? if yes, please reference the 
commit number or tag.



Thanks,

- Kever

On 2022/10/19 15:37, FUKAUMI Naoki wrote:

this patch add support for Radxa ROCK 4C Plus.

Signed-off-by: FUKAUMI Naoki 
---
  arch/arm/dts/Makefile|   1 +
  arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi |   6 +
  arch/arm/dts/rk3399-rock-4c-plus.dts | 703 +++
  arch/arm/dts/rk3399-t-opp.dtsi   | 114 +++
  configs/rock-4c-plus-rk3399_defconfig|  90 +++
  5 files changed, 914 insertions(+)
  create mode 100644 arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
  create mode 100644 arch/arm/dts/rk3399-rock-4c-plus.dts
  create mode 100644 arch/arm/dts/rk3399-t-opp.dtsi
  create mode 100644 configs/rock-4c-plus-rk3399_defconfig

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 965895bc2a..74904599d7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -156,6 +156,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
+   rk3399-rock-4c-plus.dtb \
rk3399-rock-pi-4a.dtb \
rk3399-rock-pi-4b.dtb \
rk3399-rock-pi-4c.dtb \
diff --git a/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi 
b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
new file mode 100644
index 00..b7dcd2e05d
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus-u-boot.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Radxa Limited
+ */
+
+#include "rk3399-rock-pi-4-u-boot.dtsi"
diff --git a/arch/arm/dts/rk3399-rock-4c-plus.dts 
b/arch/arm/dts/rk3399-rock-4c-plus.dts
new file mode 100644
index 00..f9884902f8
--- /dev/null
+++ b/arch/arm/dts/rk3399-rock-4c-plus.dts
@@ -0,0 +1,703 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
+ * Copyright (c) 2019 Radxa Limited
+ * Copyright (c) 2022 Amarula Solutions(India)
+ */
+
+/dts-v1/;
+#include 
+#include "rk3399.dtsi"
+#include "rk3399-t-opp.dtsi"
+
+/ {
+   model = "Radxa ROCK 4C+";
+   compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
+
+   aliases {
+   mmc0 = 
+   mmc1 = 
+   };
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+
+   clkin_gmac: external-gmac-clock {
+   compatible = "fixed-clock";
+   clock-frequency = <12500>;
+   clock-output-names = "clkin_gmac";
+   #clock-cells = <0>;
+   };
+
+   leds {
+   compatible = "gpio-leds";
+   pinctrl-names = "default";
+   pinctrl-0 = <_led1 _led2>;
+
+   /* USER_LED1 */
+   led-0 {
+   function = LED_FUNCTION_POWER;
+   color = ;
+   gpios = < RK_PD4 GPIO_ACTIVE_LOW>;
+   linux,default-trigger = "default-on";
+   };
+
+   /* USER_LED2 */
+   led-1 {
+   function = LED_FUNCTION_STATUS;
+   color = ;
+   gpios = < RK_PD5 GPIO_ACTIVE_HIGH>;
+   linux,default-trigger = "heartbeat";
+   };
+   };
+
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   clocks = < 1>;
+   clock-names = "ext_clock";
+   pinctrl-names = "default";
+   pinctrl-0 = <_enable_h>;
+   reset-gpios = < RK_PB2 GPIO_ACTIVE_LOW>;
+   };
+
+   vcc_3v3: vcc-3v3-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc_3v3";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_sys>;
+   };
+
+   vcc3v3_phy1: vcc3v3-phy1-regulator {
+   compatible = "regulator-fixed";
+   regulator-name = "vcc3v3_phy1";
+   regulator-always-on;
+   regulator-boot-on;
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   vin-supply = <_3v3>;
+   };
+
+   vcc5v0_host1: vcc5v0-host-regulator {
+   compatible = "regulator-fixed";
+   enable-active-high;
+   gpio = < RK_PD6 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <_host_en>;
+   regulator-name = "vcc5v0_host1";
+   regulator-always-on;
+   regulator-boot-on;
+   vin-supply = <_host0_s0>;
+   };
+
+   vcc5v0_sys: vcc5v0-sys-regulator {
+   compatible = "regulator-fixed";
+   

Re: [PATCH] arm: dts: rockchip: enable ums/rockusb command for ROCK Pi 4

[Kever Yang]

On 2022/10/19 15:12, FUKAUMI Naoki wrote:

this patch add USB mass storage function and Rockusb function for
Radxa ROCK Pi 4 series.

Signed-off-by: FUKAUMI Naoki 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
  configs/rock-pi-4-rk3399_defconfig  | 3 +++
  configs/rock-pi-4c-rk3399_defconfig | 3 +++
  2 files changed, 6 insertions(+)

diff --git a/configs/rock-pi-4-rk3399_defconfig 
b/configs/rock-pi-4-rk3399_defconfig
index a13ac12d8c..c4f5a71f89 100644
--- a/configs/rock-pi-4-rk3399_defconfig
+++ b/configs/rock-pi-4-rk3399_defconfig
@@ -34,6 +34,8 @@ CONFIG_CMD_GPT=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_PCI=y
  CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TIME=y
  CONFIG_SPL_OF_CONTROL=y
@@ -78,6 +80,7 @@ CONFIG_USB_ETHER_MCS7830=y
  CONFIG_USB_ETHER_RTL8152=y
  CONFIG_USB_ETHER_SMSC95XX=y
  CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
  CONFIG_DM_VIDEO=y
  CONFIG_DISPLAY=y
  CONFIG_VIDEO_ROCKCHIP=y
diff --git a/configs/rock-pi-4c-rk3399_defconfig 
b/configs/rock-pi-4c-rk3399_defconfig
index be9ac7aab9..04bff81022 100644
--- a/configs/rock-pi-4c-rk3399_defconfig
+++ b/configs/rock-pi-4c-rk3399_defconfig
@@ -34,6 +34,8 @@ CONFIG_CMD_GPT=y
  CONFIG_CMD_MMC=y
  CONFIG_CMD_PCI=y
  CONFIG_CMD_USB=y
+CONFIG_CMD_ROCKUSB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
  # CONFIG_CMD_SETEXPR is not set
  CONFIG_CMD_TIME=y
  CONFIG_SPL_OF_CONTROL=y
@@ -78,6 +80,7 @@ CONFIG_USB_ETHER_MCS7830=y
  CONFIG_USB_ETHER_RTL8152=y
  CONFIG_USB_ETHER_SMSC95XX=y
  CONFIG_USB_GADGET=y
+CONFIG_USB_FUNCTION_ROCKUSB=y
  CONFIG_DM_VIDEO=y
  CONFIG_DISPLAY=y
  CONFIG_VIDEO_ROCKCHIP=y

Re: [PATCH] powerpc: dts: keymile: Deduplicate binman code

[Christophe Leroy]

Le 17/12/2022 à 23:15, Pali Rohár a écrit :
> + Christophe and Mario: Could you please take this u-boot ppc patch?
> 
> On Friday 16 December 2022 19:16:38 Pali Rohár wrote:
>> PING?
>>
>> On Monday 21 November 2022 18:40:41 Pali Rohár wrote:
>>> + Tom
>>>
>>> On Tuesday 01 November 2022 23:57:08 Pali Rohár wrote:
 PING?

 On Sunday 09 October 2022 14:28:19 Pali Rohár wrote:
> PING?
>
> On Wednesday 03 August 2022 13:20:49 Pali Rohár wrote:
>> kmcent2-u-boot.dtsi file contains copy of powerpc u-boot.dtsi binman 
>> file.
>> So remove code duplication and replace it by including u-boot.dtsi file.
>>
>> Signed-off-by: Pali Rohár 
>> ---
>>   arch/powerpc/dts/kmcent2-u-boot.dtsi | 22 ++
>>   1 file changed, 2 insertions(+), 20 deletions(-)
>>
>> diff --git a/arch/powerpc/dts/kmcent2-u-boot.dtsi 
>> b/arch/powerpc/dts/kmcent2-u-boot.dtsi
>> index ab76a9f1226c..d0277627644b 100644
>> --- a/arch/powerpc/dts/kmcent2-u-boot.dtsi
>> +++ b/arch/powerpc/dts/kmcent2-u-boot.dtsi
>> @@ -74,24 +74,6 @@
>>  compatible = "fsl,pcie-t104x";
>>  law_trgt_if = <0>;
>>  };
>> -
>> -binman {
>> -filename = "u-boot-with-dtb.bin";
>> -skip-at-start = ;
>> -sort-by-offset;
>> -pad-byte = <0xff>;
>> -size = ;
>> -
>> -u-boot-with-ucode-ptr {
>> -offset = ;
>> -optional-ucode;
>> -};
>> -
>> -u-boot-dtb-with-ucode {
>> -align = <256>;

u-boot.dtsi has 'align = <4>' . Will it still work ?

>> -};
>> -powerpc-mpc85xx-bootpg-resetvec {
>> -offset = <(CONFIG_RESET_VECTOR_ADDRESS - 
>> 0xffc)>;
>> -};
>> -};
>>   };
>> +
>> +#include "u-boot.dtsi"
>> -- 
>> 2.20.1
>>