Re: [PATCH u-boot] doc: board: qemu-ppce500: Update supported and unsupported
On Wednesday 21 December 2022 09:15:41 Bin Meng wrote: > On Wed, Dec 21, 2022 at 4:06 AM Pali Rohár wrote: > > > > qemu can emulate also e500v1 core but cannot emulate CPUs from Freescale > > PowerPC QorIQ T and P series. > > > > Signed-off-by: Pali Rohár > > --- > > doc/board/emulation/qemu-ppce500.rst | 8 +--- > > 1 file changed, 5 insertions(+), 3 deletions(-) > > > > diff --git a/doc/board/emulation/qemu-ppce500.rst > > b/doc/board/emulation/qemu-ppce500.rst > > index 5de0aaf55ded..10427cc56302 100644 > > --- a/doc/board/emulation/qemu-ppce500.rst > > +++ b/doc/board/emulation/qemu-ppce500.rst > > @@ -7,7 +7,7 @@ QEMU PPC E500 > > QEMU for PPC supports a special 'ppce500' machine designed for emulation > > and > > virtualization purposes. This document describes how to run U-Boot under > > it. > > > > -The QEMU ppce500 machine models a generic PowerPC E500 virtual machine with > > +The QEMU ppce500 machine models a generic PowerPC e500 virtual machine with > > support for the VirtIO standard networking device connected to the built-in > > PCI host controller. Some common devices in the CCSBAR space are modeled, > > including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with > > @@ -39,6 +39,7 @@ embedded DTB created by QEMU reflects the new setting. > > Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the > > following > > 32-bit PowerPC CPUs: > > > > +* e500v1 > > * e500v2 > > * e500mc > > > > @@ -61,8 +62,9 @@ When U-Boot boots, you will notice the following:: > > This is because we only specified a core name to QEMU and it does not have > > a > > meaningful SVR value which represents an actual SoC that integrates such > > core. > > You can specify a real world SoC device that QEMU has built-in support but > > all > > -these SoCs are e500v2 based MPC85xx series, hence you cannot test anything > > -built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500). > > +these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot test > > anything > > +built for P10xx/P2010/P2020 (e500v2), P2O4x/P304x/P40xx (e500mc), > > P50xx/T10xx (e5500) > > typo: P2O4x Where is a typo? I wrote P204x (which should mean both P2040 and P2041). > > +and T208x/T4080/T4160/T4240 (e6500). > > > > By default a VirtIO standard PCI networking device is connected as an > > ethernet > > interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by:: > > -- > > Regards, > Bin
Re: [PATCH 04/12] drivers: dma: Add support for J784S4
On 20/11/22 00:29, Hari Nagalla wrote: > diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile > index 6807eb8e8b..bd4ce68d9c 100644 > --- a/drivers/dma/ti/Makefile > +++ b/drivers/dma/ti/Makefile > @@ -8,3 +8,4 @@ k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o > k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o > k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o > k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o > +k3-psil-data-$(CONFIG_SOC_K3_J784S4) += k3-psil-j784s4.o > diff --git a/drivers/dma/ti/k3-psil-j784s4.c b/drivers/dma/ti/k3-psil-j784s4.c > new file mode 100644 > index 00..e73ea1d030 > --- /dev/null > +++ b/drivers/dma/ti/k3-psil-j784s4.c > @@ -0,0 +1,167 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com > + */ > +/* TODO : check again for j784s4 */ Could you address the TODO or drop it if already done? -- Regards Vignesh
Re: [PATCH v2 2/4] configs: am62x_evm_*: Run savedefconfig
On 20/12/22 20:51, Sjoerd Simons wrote: Clean configuration for am62x_evm using savedefconfig Signed-off-by: Sjoerd Simons --- (no changes since v1) configs/am62x_evm_a53_defconfig | 4 ++-- configs/am62x_evm_r5_defconfig | 32 +++- 2 files changed, 17 insertions(+), 19 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 94de1ea4586..cd06e362f09 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_K3_ATF_LOAD_ADDR=0x9e78 CONFIG_TARGET_AM625_A53_EVM=y +CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" CONFIG_SPL_TEXT_BASE=0x8008 CONFIG_SPL_MMC=y @@ -14,6 +15,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x8200 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -32,12 +34,10 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x28 CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 40f933ca749..7350882a36f 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_R5_EVM=y +CONFIG_ENV_SIZE=0x2 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" @@ -18,10 +19,8 @@ CONFIG_SPL_STACK_R_ADDR=0x8200 CONFIG_SPL_SIZE_LIMIT=0x4 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_SPI=y CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_SPL_SPI=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000 CONFIG_SPL_LOAD_FIT=y @@ -42,10 +41,9 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x100 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 -CONFIG_SYS_SPI_U_BOOT_OFFS=0x8 CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_DM_RESET=y CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y @@ -53,6 +51,7 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x8 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_ASKENV=y @@ -88,6 +87,14 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y @@ -101,23 +108,14 @@ CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y -CONFIG_DM_SPI=y -CONFIG_CADENCE_QSPI=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0 -CONFIG_SPI=y -CONFIG_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPI_FLASH_SOFT_RESET=y -CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_LIB_RATIONAL=y CONFIG_SPL_LIB_RATIONAL=y -CONFIG_ENV_SIZE=0x2 -CONFIG_ENV_OFFSET=0x68 Tested QSPI Flash on my AM62x, tried probe, read and update ops and they seems to be working fine. Hence, for flash related config changes, Tested-by: Dhruva Gole -- Thanks and Regards, Dhruva Gole
Re: [PATCH v2 1/4] configs: am62x_evm_*: Correct SPI configuration option
Hi, On 20/12/22 20:51, Sjoerd Simons wrote: In f422c4bec the configuration option to support s28hs512t SPI flashes was changed from CONFIG_SPI_FLASH_S28HS512T to CONFIG_SPI_FLASH_S28HX_T to support the wider family. Follow this change in the AM62x EVM configurations. Signed-off-by: Sjoerd Simons --- Thanks for this update! (no changes since v1) configs/am62x_evm_a53_defconfig | 2 +- configs/am62x_evm_r5_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index e6ffd166927..94de1ea4586 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -71,7 +71,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index f95bc5f2221..40f933ca749 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -110,7 +110,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y Reviewed-by: Dhruva Gole -- Thanks and Regards, Dhruva Gole
[PATCH] riscv: ae350: Enable CCTL_SUEN
CCTL operations are available to Supervisor/User-mode software under the control of the mcache_ctl.CCTL_SUEN control bit. Enable it to support Superviosr(and User) CCTL operations. Signed-off-by: Rick Chen --- arch/riscv/cpu/ax25/cpu.c | 4 1 file changed, 4 insertions(+) diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c index c4c2de2ef0..fc3239e1ac 100644 --- a/arch/riscv/cpu/ax25/cpu.c +++ b/arch/riscv/cpu/ax25/cpu.c @@ -17,11 +17,13 @@ #define V5_MCACHE_CTL_IC_EN_OFFSET 0 #define V5_MCACHE_CTL_DC_EN_OFFSET 1 +#define V5_MCACHE_CTL_CCTL_SUEN_OFFSET 8 #define V5_MCACHE_CTL_DC_COHEN_OFFSET 19 #define V5_MCACHE_CTL_DC_COHSTA_OFFSET 20 #define V5_MCACHE_CTL_IC_ENBIT(V5_MCACHE_CTL_IC_EN_OFFSET) #define V5_MCACHE_CTL_DC_EN BIT(V5_MCACHE_CTL_DC_EN_OFFSET) +#define V5_MCACHE_CTL_CCTL_SUENBIT(V5_MCACHE_CTL_CCTL_SUEN_OFFSET) #define V5_MCACHE_CTL_DC_COHEN_EN BIT(V5_MCACHE_CTL_DC_COHEN_OFFSET) #define V5_MCACHE_CTL_DC_COHSTA_EN BIT(V5_MCACHE_CTL_DC_COHSTA_OFFSET) @@ -55,6 +57,8 @@ void harts_early_init(void) mcache_ctl_val |= V5_MCACHE_CTL_IC_EN; if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_EN)) mcache_ctl_val |= V5_MCACHE_CTL_DC_EN; + if (!(mcache_ctl_val & V5_MCACHE_CTL_CCTL_SUEN)) + mcache_ctl_val |= V5_MCACHE_CTL_CCTL_SUEN; csr_write(CSR_MCACHE_CTL, mcache_ctl_val); /* -- 2.17.1
[PATCH] riscv: ae350: Support openSBI 1.0+ which enable FW_PIC
Change openSBI load address from 0x100 to 0x0 and it will start to run at 0x0 directly without relocation. Signed-off-by: Rick Chen --- board/AndesTech/ax25-ae350/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig index 36b67f0b52..4bb33b0793 100644 --- a/board/AndesTech/ax25-ae350/Kconfig +++ b/board/AndesTech/ax25-ae350/Kconfig @@ -25,7 +25,7 @@ config SPL_TEXT_BASE default 0x80 config SPL_OPENSBI_LOAD_ADDR - default 0x0100 + default 0x config SYS_FDT_BASE hex -- 2.17.1
Re: [PATCH v5 6/6] patman: additionally honor a local .patman config file
Hi Simon, Simon Glass writes: > On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer > wrote: >> >> This enables versioning a project specific patman configuration file. >> It also makes it possible to declare the project name, which is not a >> useful thing to do in $HOME/.patman. A new test is added, along >> updated documentation. >> >> Signed-off-by: Maxim Cournoyer >> --- >> >> Changes in v5: >> - Use try/finally in cleared_command_line_args context manager >> >> Changes in v4: >> - Use tools.run to invoke git in test suite >> >> Changes in v3: >> - Clear command line arguments in test_git_local_config >> - Also test overriding a 'send' command line argument >> >> Changes in v2: >> - Explicitly provide an empty args list to parse_known_args in test >> >> tools/patman/patman.rst | 8 - >> tools/patman/settings.py | 24 ++--- >> tools/patman/test_settings.py | 67 +++ >> 3 files changed, 94 insertions(+), 5 deletions(-) >> create mode 100644 tools/patman/test_settings.py > > Reviewed-by: Simon Glass > > Applied to u-boot-dm/next, thanks! Great, thank you for the review and seeing it through! -- Thanks, Maxim
Re: [PATCH u-boot] doc: board: qemu-ppce500: Update supported and unsupported
On Wed, Dec 21, 2022 at 4:06 AM Pali Rohár wrote: > > qemu can emulate also e500v1 core but cannot emulate CPUs from Freescale > PowerPC QorIQ T and P series. > > Signed-off-by: Pali Rohár > --- > doc/board/emulation/qemu-ppce500.rst | 8 +--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/doc/board/emulation/qemu-ppce500.rst > b/doc/board/emulation/qemu-ppce500.rst > index 5de0aaf55ded..10427cc56302 100644 > --- a/doc/board/emulation/qemu-ppce500.rst > +++ b/doc/board/emulation/qemu-ppce500.rst > @@ -7,7 +7,7 @@ QEMU PPC E500 > QEMU for PPC supports a special 'ppce500' machine designed for emulation and > virtualization purposes. This document describes how to run U-Boot under it. > > -The QEMU ppce500 machine models a generic PowerPC E500 virtual machine with > +The QEMU ppce500 machine models a generic PowerPC e500 virtual machine with > support for the VirtIO standard networking device connected to the built-in > PCI host controller. Some common devices in the CCSBAR space are modeled, > including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with > @@ -39,6 +39,7 @@ embedded DTB created by QEMU reflects the new setting. > Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the > following > 32-bit PowerPC CPUs: > > +* e500v1 > * e500v2 > * e500mc > > @@ -61,8 +62,9 @@ When U-Boot boots, you will notice the following:: > This is because we only specified a core name to QEMU and it does not have a > meaningful SVR value which represents an actual SoC that integrates such > core. > You can specify a real world SoC device that QEMU has built-in support but > all > -these SoCs are e500v2 based MPC85xx series, hence you cannot test anything > -built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500). > +these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot test > anything > +built for P10xx/P2010/P2020 (e500v2), P2O4x/P304x/P40xx (e500mc), > P50xx/T10xx (e5500) typo: P2O4x > +and T208x/T4080/T4160/T4240 (e6500). > > By default a VirtIO standard PCI networking device is connected as an > ethernet > interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by:: > -- Regards, Bin
Re: [PATCH] patman: Switch to setuptools
On Mon, 28 Nov 2022 at 10:55, Sean Anderson wrote: > > distutils is about to meet its demise [1]. Switch to setuptools. > > [1] https://peps.python.org/pep-0632/ > > Signed-off-by: Sean Anderson > --- > > tools/patman/setup.py | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH 1/1] test:dm:fix typo
On Sat, 3 Dec 2022 at 01:26, Yuepeng Xing wrote: > > Fix typos in the 'test/dm' directory. > > Signed-off-by: Yuepeng Xing > --- > test/dm/blk.c| 2 +- > test/dm/button.c | 4 ++-- > test/dm/gpio.c | 4 ++-- > test/dm/host.c | 2 +- > test/dm/remoteproc.c | 2 +- > test/dm/scmi.c | 2 +- > test/dm/spmi.c | 2 +- > test/dm/test-fdt.c | 2 +- > 8 files changed, 10 insertions(+), 10 deletions(-) > Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 4/8] patman: rename main script to __main__.py
Hi Maxim,
On Tue, 20 Dec 2022 at 17:28, Simon Glass wrote:
>
> This allows running the package as a Python module, like e.g.:
>
> $ python -m patman
>
> It also prevents Pytest from attempting to parse main.py, which
> would cause errors.
>
> Reviewed-by: Simon Glass
> Signed-off-by: Maxim Cournoyer
> ---
>
> (no changes since v1)
>
> tools/patman/{main.py => __main__.py} | 0
> tools/patman/patman | 2 +-
> 2 files changed, 1 insertion(+), 1 deletion(-)
> rename tools/patman/{main.py => __main__.py} (100%)
>
> Applied to u-boot-dm/next, thanks!
I did a little fix-up on this one to rename the file in __init__.py
Regards,
Simon
Re: [PATCH 2/3] patman: fix installation of README.rst data file
On Fri, 16 Dec 2022 at 18:45, Maxim Cournoyer wrote:
>
> This fixes a regression introduced in commit 74df491051d6 ("buildman:
> Convert documentation to rST").
>
> Signed-off-by: Maxim Cournoyer
> ---
>
> tools/patman/setup.py | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Simon Glass
Applied to u-boot-dm/next, thanks!
Re: [PATCH 1/3] patman: remove extraneous imports
On Fri, 16 Dec 2022 at 18:45, Maxim Cournoyer wrote: > > * tools/patman/main.py: Remove extraneous imports and fix indentation. > > Signed-off-by: Maxim Cournoyer > --- > > tools/patman/main.py | 5 + > 1 file changed, 1 insertion(+), 4 deletions(-) Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH 3/3] patman: locate README.rst via importlib
On Fri, 16 Dec 2022 at 18:45, Maxim Cournoyer wrote: > > Rationale: this is more robust than assumptions about the file > hierarchy layout of the installation of patman, for example on non > file-hierarchy standard (FHS) systems such as Guix System or Nix OS. > > Signed-off-by: Maxim Cournoyer > --- > > tools/patman/main.py | 8 +++- > 1 file changed, 3 insertions(+), 5 deletions(-) > Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 2/8] patman: locate test data files via __file__ and pathlib
Previously it would rely on the executing script location, which could break for example when running the tests via 'pytest'. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- (no changes since v1) tools/patman/func_test.py | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) Applied to u-boot-dm/next, thanks!
Re: [PATCH v5 1/6] patman: fix pep8 warnings in settings module
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > Remove extraneous imports, variables and comply to PEP 8 maximum line > width, among other PEP 8 changes suggested by Pyflake. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/settings.py | 38 +- > 1 file changed, 21 insertions(+), 17 deletions(-) Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 1/8] patman: cosmetic: Fix PEP 8 warnings for the gitutil module.
This patch fixes all the PEP 8 warnings reported by Pyflake for the gitutil module. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- (no changes since v1) tools/patman/gitutil.py | 106 1 file changed, 65 insertions(+), 41 deletions(-) Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 3/8] patman: invoke the checkpatch.pl script with '--u-boot' and '--strict'
This resolves 10 out of 11 test failures seen when running './patman test' from the 'tools/patman' subdirectory. This was caused by the .checkpatch.conf configuration file at the root of the project not being picked up. Make the test suite of patman independent from it by always invoking the checkpatch.pl script with the minimally required arguments for the test suite to pass. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- Changes in v3: - Fix typo in commit message Changes in v2: - Reword the commit message with a better explanation of the problem - Add the '--strict' argument to script invocation tools/patman/checkpatch.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 4/8] patman: rename main script to __main__.py
This allows running the package as a Python module, like e.g.:
$ python -m patman
It also prevents Pytest from attempting to parse main.py, which
would cause errors.
Reviewed-by: Simon Glass
Signed-off-by: Maxim Cournoyer
---
(no changes since v1)
tools/patman/{main.py => __main__.py} | 0
tools/patman/patman | 2 +-
2 files changed, 1 insertion(+), 1 deletion(-)
rename tools/patman/{main.py => __main__.py} (100%)
Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 6/8] patman: hide the 'test' command unless test data is available
Some tests would fail when the test data is not available, so it doesn't make much sense to expose the action when patman is running outside of the u-boot git checkout. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- Changes in v3: - Mention the test command is hidden unless run from the git repo tools/patman/__main__.py | 9 ++--- tools/patman/patman.rst | 4 2 files changed, 10 insertions(+), 3 deletions(-) Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 5/8] patman: add pytest configuration file
With this change, a user can run the patman test suite using Pytest the same as when using 'patman test': $ cd tools/patman && pytest [...] 44 passed, 8 warnings in 8.87s $ ./patman test Ran 44 tests in 8.460s Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- (no changes since v1) tools/patman/pytest.ini | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 tools/patman/pytest.ini Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 7/8] patman: document how to run test suite via pytest
Pytest offers useful features such as selecting tests by means of a regular expression, or running the pdb debugger upon encountering a test failure. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- (no changes since v1) tools/patman/patman.rst | 6 ++ 1 file changed, 6 insertions(+) Applied to u-boot-dm/next, thanks!
Re: [PATCH v2] patman: add '--get-maintainer-script' argument
This makes it possible to configure a project to use some other location or script than the default scripts/get_maintainer.pl one used in the U-Boot and Linux projects. It can be configured via a .patman configuration file and accepts arguments, as documented. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- Changes in v2: - Add functional test - Fix 'os.path.exist' typo in 'find_get_maintainer' tools/patman/__main__.py | 7 + tools/patman/control.py| 12 --- tools/patman/func_test.py | 49 +++-- tools/patman/get_maintainer.py | 57 +- tools/patman/gitutil.py| 3 +- tools/patman/patman.rst| 30 +- tools/patman/series.py | 9 -- 7 files changed, 127 insertions(+), 40 deletions(-) Applied to u-boot-dm/next, thanks!
Re: [PATCH v3 8/8] patman: document default 'send' command
Document that this command is the default and what it's intended for. Reviewed-by: Simon Glass Signed-off-by: Maxim Cournoyer --- (no changes since v1) tools/patman/__main__.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) Applied to u-boot-dm/next, thanks!
Re: [PATCH v5 2/6] patman: replace deprecated SafeConfigParser with ConfigParser
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > The SafeConfigParser class has been renamed in Python 3.2 to > ConfigParser, and the old alias has been deprecated since. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/settings.py | 28 ++-- > 1 file changed, 14 insertions(+), 14 deletions(-) > Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v5 4/6] patman: set the default config_fname argument value to None
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > This better matches Python conventions, allowing to easily test > whether the optional argument is provided. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/__main__.py | 2 +- > tools/patman/settings.py | 9 + > 2 files changed, 6 insertions(+), 5 deletions(-) Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v5 3/6] patman: import gitutil module where it is needed
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > Instead of propagating it from the module entry point (main script). > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/__main__.py | 3 +-- > tools/patman/settings.py | 8 +--- > 2 files changed, 6 insertions(+), 5 deletions(-) Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v5 6/6] patman: additionally honor a local .patman config file
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > This enables versioning a project specific patman configuration file. > It also makes it possible to declare the project name, which is not a > useful thing to do in $HOME/.patman. A new test is added, along > updated documentation. > > Signed-off-by: Maxim Cournoyer > --- > > Changes in v5: > - Use try/finally in cleared_command_line_args context manager > > Changes in v4: > - Use tools.run to invoke git in test suite > > Changes in v3: > - Clear command line arguments in test_git_local_config > - Also test overriding a 'send' command line argument > > Changes in v2: > - Explicitly provide an empty args list to parse_known_args in test > > tools/patman/patman.rst | 8 - > tools/patman/settings.py | 24 ++--- > tools/patman/test_settings.py | 67 +++ > 3 files changed, 94 insertions(+), 5 deletions(-) > create mode 100644 tools/patman/test_settings.py Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
Re: [PATCH v5 5/6] patman: fail early in Setup when provided config file does not exist
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > Rationale: if the user explicitly provide this argument, they probably > intend for it to be used. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/settings.py | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) Reviewed-by: Simon Glass Applied to u-boot-dm/next, thanks!
[PATCH v2] video: ti: am335x: restore driver-model code
The commit 82f7b869f5d7a ("video: Drop CONFIG_AM335X_LCD") removed not
only the LCD legacy implementation but also the code with driver model
support. The patch restores the code with driver model support.
Signed-off-by: Dario Binacchi
---
Changes in v2:
- Collapse the two patches:
- Revert "video: Drop CONFIG_AM335X_LCD"
- video: ti: am335x: drop pre-driver-model code
into one only.
- Fix the compilation failure.
drivers/video/Kconfig | 2 +
drivers/video/Makefile | 1 +
drivers/video/ti/Kconfig| 8 +
drivers/video/ti/Makefile | 6 +
drivers/video/ti/tilcdc-panel.c | 172 +
drivers/video/ti/tilcdc-panel.h | 14 ++
drivers/video/ti/tilcdc.c | 426
drivers/video/ti/tilcdc.h | 38 +++
8 files changed, 667 insertions(+)
create mode 100644 drivers/video/ti/Kconfig
create mode 100644 drivers/video/ti/Makefile
create mode 100644 drivers/video/ti/tilcdc-panel.c
create mode 100644 drivers/video/ti/tilcdc-panel.h
create mode 100644 drivers/video/ti/tilcdc.c
create mode 100644 drivers/video/ti/tilcdc.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index c841b99bb30d..54fa93adb4f8 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -573,6 +573,8 @@ config ATMEL_HLCD
help
HLCDC supports video output to an attached LCD panel.
+source "drivers/video/ti/Kconfig"
+
source "drivers/video/exynos/Kconfig"
config LOGICORE_DP_TX
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 40a871d638e9..b359b0784050 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -26,6 +26,7 @@ obj-${CONFIG_EXYNOS_FB} += exynos/
obj-${CONFIG_VIDEO_ROCKCHIP} += rockchip/
obj-${CONFIG_VIDEO_STM32} += stm32/
obj-${CONFIG_VIDEO_TEGRA124} += tegra124/
+obj-y += ti/
obj-$(CONFIG_ATMEL_HLCD) += atmel_hlcdfb.o
obj-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
diff --git a/drivers/video/ti/Kconfig b/drivers/video/ti/Kconfig
new file mode 100644
index ..3081e9e8c09b
--- /dev/null
+++ b/drivers/video/ti/Kconfig
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020 Dario Binacchi
+#
+config AM335X_LCD
+ bool "Enable AM335x video support"
+ help
+ Supports video output to an attached LCD panel.
diff --git a/drivers/video/ti/Makefile b/drivers/video/ti/Makefile
new file mode 100644
index ..1f551c84f347
--- /dev/null
+++ b/drivers/video/ti/Makefile
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2020 Dario Binacchi
+#
+
+obj-$(CONFIG_AM335X_LCD) += tilcdc.o tilcdc-panel.o
diff --git a/drivers/video/ti/tilcdc-panel.c b/drivers/video/ti/tilcdc-panel.c
new file mode 100644
index ..df95086a5151
--- /dev/null
+++ b/drivers/video/ti/tilcdc-panel.c
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * OMAP panel support
+ *
+ * Copyright (C) 2020 Dario Binacchi
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "tilcdc.h"
+
+struct tilcdc_panel_priv {
+ struct tilcdc_panel_info info;
+ struct display_timing timing;
+ struct udevice *backlight;
+ struct gpio_desc enable;
+};
+
+static int tilcdc_panel_enable_backlight(struct udevice *dev)
+{
+ struct tilcdc_panel_priv *priv = dev_get_priv(dev);
+
+ if (dm_gpio_is_valid(&priv->enable))
+ dm_gpio_set_value(&priv->enable, 1);
+
+ if (priv->backlight)
+ return backlight_enable(priv->backlight);
+
+ return 0;
+}
+
+static int tilcdc_panel_set_backlight(struct udevice *dev, int percent)
+{
+ struct tilcdc_panel_priv *priv = dev_get_priv(dev);
+
+ if (dm_gpio_is_valid(&priv->enable))
+ dm_gpio_set_value(&priv->enable, 1);
+
+ if (priv->backlight)
+ return backlight_set_brightness(priv->backlight, percent);
+
+ return 0;
+}
+
+int tilcdc_panel_get_display_info(struct udevice *dev,
+ struct tilcdc_panel_info *info)
+{
+ struct tilcdc_panel_priv *priv = dev_get_priv(dev);
+
+ memcpy(info, &priv->info, sizeof(*info));
+ return 0;
+}
+
+static int tilcdc_panel_get_display_timing(struct udevice *dev,
+ struct display_timing *timing)
+{
+ struct tilcdc_panel_priv *priv = dev_get_priv(dev);
+
+ memcpy(timing, &priv->timing, sizeof(*timing));
+ return 0;
+}
+
+static int tilcdc_panel_remove(struct udevice *dev)
+{
+ struct tilcdc_panel_priv *priv = dev_get_priv(dev);
+
+ if (dm_gpio_is_valid(&priv->enable))
+ dm_gpio_free(dev, &priv->enable);
+
+ return 0;
+}
+
+static int tilcdc_panel_probe(struct udevice *dev)
+{
+ struct tilcdc_panel_priv *priv = dev_get_priv(dev);
+ int err;
+
+ err = uclass_get_device_by_phandle(UCLASS_PANEL_BACKLIGHT, dev,
+
Re: [RESEND RFC PATCH 1/2] Revert "video: Drop CONFIG_AM335X_LCD"
Hi Simon,
On Mon, Dec 19, 2022 at 8:20 PM Simon Glass wrote:
>
> Hi Dario,
>
> On Mon, 19 Dec 2022 at 04:35, Dario Binacchi
> wrote:
> >
> > This reverts commit 82f7b869f5d7aad246a4621a18a5ad04475815ba.
> >
> > It also removed code with driver model support.
> > The commit [1], as described in its message, was also designed to make
> > it easy to remove pre-driver-model code in the near future.
> >
> > [1] 35ab1b6ef7f3a ("video: omap: split the legacy code from the DM code")
> > Signed-off-by: Dario Binacchi
> > ---
> >
> > arch/arm/mach-omap2/am33xx/clock_am33xx.c | 4 +
> > board/bosch/guardian/board.c | 70
> > configs/am335x_guardian_defconfig | 1 +
> > drivers/video/Kconfig | 2 +
> > drivers/video/Makefile| 1 +
> > drivers/video/ti/Kconfig | 8 +
> > drivers/video/ti/Makefile | 10 +
> > drivers/video/ti/am335x-fb.c | 318
> > drivers/video/ti/am335x-fb.h | 71
> > drivers/video/ti/tilcdc-panel.c | 172 +
> > drivers/video/ti/tilcdc-panel.h | 14 +
> > drivers/video/ti/tilcdc.c | 426 ++
> > drivers/video/ti/tilcdc.h | 38 ++
> > 13 files changed, 1135 insertions(+)
> > create mode 100644 drivers/video/ti/Kconfig
> > create mode 100644 drivers/video/ti/Makefile
> > create mode 100644 drivers/video/ti/am335x-fb.c
> > create mode 100644 drivers/video/ti/am335x-fb.h
> > create mode 100644 drivers/video/ti/tilcdc-panel.c
> > create mode 100644 drivers/video/ti/tilcdc-panel.h
> > create mode 100644 drivers/video/ti/tilcdc.c
> > create mode 100644 drivers/video/ti/tilcdc.h
>
> I'm sorry if I messed something up there. Can you add back just the DM
> code? We don't have lcd.h anymore.
Yes, you are right. I will submit v2, collapsing the two patches in
one only that
restores the DM code.
Furthermore, the two patches failed the compilation.
Thanks and regards,
Dario
>
> But if this is the way you want to do it:
>
> Reviewed-by: Simon Glass
>
> Regards,
> Simon
--
Dario Binacchi
Embedded Linux Developer
dario.binac...@amarulasolutions.com
__
Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
i...@amarulasolutions.com
www.amarulasolutions.com
[PATCH u-boot] doc: board: qemu-ppce500: Update supported and unsupported
qemu can emulate also e500v1 core but cannot emulate CPUs from Freescale PowerPC QorIQ T and P series. Signed-off-by: Pali Rohár --- doc/board/emulation/qemu-ppce500.rst | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/doc/board/emulation/qemu-ppce500.rst b/doc/board/emulation/qemu-ppce500.rst index 5de0aaf55ded..10427cc56302 100644 --- a/doc/board/emulation/qemu-ppce500.rst +++ b/doc/board/emulation/qemu-ppce500.rst @@ -7,7 +7,7 @@ QEMU PPC E500 QEMU for PPC supports a special 'ppce500' machine designed for emulation and virtualization purposes. This document describes how to run U-Boot under it. -The QEMU ppce500 machine models a generic PowerPC E500 virtual machine with +The QEMU ppce500 machine models a generic PowerPC e500 virtual machine with support for the VirtIO standard networking device connected to the built-in PCI host controller. Some common devices in the CCSBAR space are modeled, including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller with @@ -39,6 +39,7 @@ embedded DTB created by QEMU reflects the new setting. Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the following 32-bit PowerPC CPUs: +* e500v1 * e500v2 * e500mc @@ -61,8 +62,9 @@ When U-Boot boots, you will notice the following:: This is because we only specified a core name to QEMU and it does not have a meaningful SVR value which represents an actual SoC that integrates such core. You can specify a real world SoC device that QEMU has built-in support but all -these SoCs are e500v2 based MPC85xx series, hence you cannot test anything -built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500). +these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot test anything +built for P10xx/P2010/P2020 (e500v2), P2O4x/P304x/P40xx (e500mc), P50xx/T10xx (e5500) +and T208x/T4080/T4160/T4240 (e6500). By default a VirtIO standard PCI networking device is connected as an ethernet interface at PCI address 0.1.0, but we can switch that to an e1000 NIC by:: -- 2.20.1
[PATCH 2/2] configs: Enable distroboot on am625
TI boards use a custom (though faily common to TI boards) mechanism for
booting Linux. We would like to use the "distroboot" approach.
Enable distroboot as a further option to use for booting on am625 should
the existing options fail.
Signed-off-by: Martyn Welch
---
configs/am62x_evm_a53_defconfig | 2 +-
include/configs/am62x_evm.h | 26 +-
2 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
index ff258bcbc1..ea248090e4 100644
--- a/configs/am62x_evm_a53_defconfig
+++ b/configs/am62x_evm_a53_defconfig
@@ -20,7 +20,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8048
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_LOAD_FIT_ADDRESS=0x8100
-CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
+CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run
get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern;
setenv fdtfile ti/${name_fdt}; run distro_bootcmd"
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a0
diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h
index 78201adc07..335c27c5cb 100644
--- a/include/configs/am62x_evm.h
+++ b/include/configs/am62x_evm.h
@@ -15,6 +15,29 @@
/* DDR Configuration */
#define CONFIG_SYS_SDRAM_BASE1 0x88000
+#ifdef CONFIG_CMD_MMC
+#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
+#else
+#define DISTRO_BOOT_DEV_MMC(func)
+#endif
+
+#ifdef CONFIG_CMD_PXE
+#define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na)
+#else
+#define DISTRO_BOOT_DEV_PXE(func)
+#endif
+
+#ifdef CONFIG_CMD_DHCP
+#define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na)
+#else
+#define DISTRO_BOOT_DEV_DHCP(func)
+#endif
+
+#define BOOT_TARGET_DEVICES(func) \
+ DISTRO_BOOT_DEV_MMC(func) \
+ DISTRO_BOOT_DEV_PXE(func) \
+ DISTRO_BOOT_DEV_DHCP(func)
+
#define PARTS_DEFAULT \
/* Linux partitions */ \
"name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
@@ -59,7 +82,8 @@
DEFAULT_LINUX_BOOT_ENV \
DEFAULT_MMC_TI_ARGS \
EXTRA_ENV_AM625_BOARD_SETTINGS \
- EXTRA_ENV_AM625_BOARD_SETTINGS_MMC
+ EXTRA_ENV_AM625_BOARD_SETTINGS_MMC \
+ BOOTENV
/* Now for the remaining common defines */
#include
--
2.35.1
[PATCH 1/2] arm64:mach-k3 am625_init: Correct boot mode detection
The boot mode detection assumes that BOOT_DEVICE_MMC2 should always
result in MMCSD_MODE_FS, but MMCSD_MODE_RAW is also a valid option for
this port.
The current logic also avoids looking at the bootmode pin strapping,
which should be the primary means of determining whether a device is
being booted in MMCSD_MODE_EMMCBOOT mode.
Switch around the logic to check the boot mode to determine whether the
eMMC boot mode is expected or MMC/SD boot mode. From there we can look
at the boot mode config if in MMC/SD boot mode to determine whether to
attempt RAW or FS based booting.
This change allows U-Boot to also be successfully booted from RAW
offsets in addition to from a filesystem.
Signed-off-by: Martyn Welch
---
arch/arm/mach-k3/am625_init.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index da2229d0bf..a91c15ca4e 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -173,21 +173,20 @@ void board_init_f(ulong dummy)
u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
{
u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
+ u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
+ MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
- switch (boot_device) {
- case BOOT_DEVICE_MMC1:
- if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) >>
-MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_SHIFT)
- return MMCSD_MODE_EMMCBOOT;
- return MMCSD_MODE_FS;
-
- case BOOT_DEVICE_MMC2:
- return MMCSD_MODE_FS;
+ switch (bootmode) {
+ case BOOT_DEVICE_EMMC:
+ return MMCSD_MODE_EMMCBOOT;
+ case BOOT_DEVICE_MMC:
+ if (bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK)
+ return MMCSD_MODE_RAW;
default:
- return MMCSD_MODE_RAW;
+ return MMCSD_MODE_FS;
}
}
--
2.35.1
[PATCH 0/2] Enable distroboot as a boot option for am62x
The am62x config currently doesn't enable distroboot as an option for booting. Add this as a further option after the existing mechanisms have failed. Whilst working on this it was found that boot detection was failing on the am625-sk when attempting to boot from raw offsets on an SD card. Boot mode is updated to correctly detect the boot mode from the SoC boot config. Martyn Welch (2): arm64:mach-k3 am625_init: Correct boot mode detection configs: Enable distroboot on am625 arch/arm/mach-k3/am625_init.c | 19 +-- configs/am62x_evm_a53_defconfig | 2 +- include/configs/am62x_evm.h | 26 +- 3 files changed, 35 insertions(+), 12 deletions(-) -- 2.35.1
Re: [PATCH v5 5/6] patman: fail early in Setup when provided config file does not exist
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > Rationale: if the user explicitly provide this argument, they probably > intend for it to be used. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/settings.py | 6 +- > 1 file changed, 5 insertions(+), 1 deletion(-) Reviewed-by: Simon Glass
Re: [PATCH v5 6/6] patman: additionally honor a local .patman config file
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > This enables versioning a project specific patman configuration file. > It also makes it possible to declare the project name, which is not a > useful thing to do in $HOME/.patman. A new test is added, along > updated documentation. > > Signed-off-by: Maxim Cournoyer > --- > > Changes in v5: > - Use try/finally in cleared_command_line_args context manager > > Changes in v4: > - Use tools.run to invoke git in test suite > > Changes in v3: > - Clear command line arguments in test_git_local_config > - Also test overriding a 'send' command line argument > > Changes in v2: > - Explicitly provide an empty args list to parse_known_args in test > > tools/patman/patman.rst | 8 - > tools/patman/settings.py | 24 ++--- > tools/patman/test_settings.py | 67 +++ > 3 files changed, 94 insertions(+), 5 deletions(-) > create mode 100644 tools/patman/test_settings.py Reviewed-by: Simon Glass
Re: [PATCH v5 4/6] patman: set the default config_fname argument value to None
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > This better matches Python conventions, allowing to easily test > whether the optional argument is provided. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/__main__.py | 2 +- > tools/patman/settings.py | 9 + > 2 files changed, 6 insertions(+), 5 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH v5 3/6] patman: import gitutil module where it is needed
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > Instead of propagating it from the module entry point (main script). > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/__main__.py | 3 +-- > tools/patman/settings.py | 8 +--- > 2 files changed, 6 insertions(+), 5 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH v5 2/6] patman: replace deprecated SafeConfigParser with ConfigParser
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > The SafeConfigParser class has been renamed in Python 3.2 to > ConfigParser, and the old alias has been deprecated since. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/settings.py | 28 ++-- > 1 file changed, 14 insertions(+), 14 deletions(-) > Reviewed-by: Simon Glass
Re: [PATCH v5 1/6] patman: fix pep8 warnings in settings module
On Mon, 19 Dec 2022 at 22:38, Maxim Cournoyer wrote: > > Remove extraneous imports, variables and comply to PEP 8 maximum line > width, among other PEP 8 changes suggested by Pyflake. > > Signed-off-by: Maxim Cournoyer > --- > > (no changes since v1) > > tools/patman/settings.py | 38 +- > 1 file changed, 21 insertions(+), 17 deletions(-) Reviewed-by: Simon Glass
Re: [PATCH v2 00/25] bootstd: Add a boot menu
Hi Tom, On Mon, 5 Dec 2022 at 17:05, Simon Glass wrote: > > Hi Heinrich (and anyone else), > > On Thu, 10 Nov 2022 at 15:15, Simon Glass wrote: > > > > Hi Heinrich, > > > > On Mon, 7 Nov 2022 at 16:35, Simon Glass wrote: > > > > > > Hi Heinrich, > > > > > > On Mon, 7 Nov 2022 at 12:15, Heinrich Schuchardt > > > wrote: > > > > > > > > On 11/4/22 23:48, Simon Glass wrote: > > > > > So far standard boot lacks a boot menu, although it is possible to > > > > > create > > > > > a rudimentary one using the existing 'bootmenu' command. > > > > > > > > > > Even then, this text-based menu offer only basic functionality and > > > > > does > > > > > not take full advantage of the displays which are common on many > > > > > devices. > > > > > > > > > > This series provides a 'bootflow menu' command which allows the user > > > > > to > > > > > select from the available bootflows. An attempt is made to show the > > > > > name > > > > > of the available operating systems, by reading more information into > > > > > the > > > > > bootflow. A logo can be read also, where supported, so that this can > > > > > be > > > > > presented to the user when an option is highlighted. > > > > > > > > > > Full use is made of TrueType fonts, if enabled. For cases where only a > > > > > serial console is available, it falls back to a simple text-based > > > > > menu. > > > > > > > > Please, add the link to your design document > > > > > > > > https://docs.google.com/document/d/1VQeApnLlH6xKm_OI36AhWkJLUEd9OXEvIJXB8aM2de8/edit?resourcekey=0-DwgHpR2S8vJEJzvvwPb-AQ#heading=h.17wg41voij6q > > > > is broken. > > > > > > What happens when you click that? It works for me. > > > > > > > > > > > in future version of this series. > > > > > > > > The series leaves us with duplicate code in > > > > > > > > bootmenu_choice_entry() and eficonfig_choice_entry() as well as > > > > bootmenu_loop() and bootmenu_autoboot_loop(). > > > > > > Yes OK, but that is the case today and my series actually removes some > > > duplicated code, so perhaps that could be cleaned up later? > > > > > > > > > > > The bootmenu command relies heavily on ANSI sequences but VIDEO_ANSI is > > > > disabled by default for CONFIG_EFI_LOADER=n which means that the > > > > bootmenu command will not work anymore. > > > > > > Does it not work, or does it just work but in a serial fashion? I > > > don't see ANSI codes as being necessary to show a menu. > > > > > > > > > > > > > > > > > All of this is implementing using a new 'expo' construct, a > > > > > collection of > > > > > > > > Expo is not an English word. Expo is typically used as name of trade > > > > fairs. Transaction probably is the right word to use here. > > > > > > That is debatable I think. Transaction is quite generic and appears in > > > U-Boot >400 times. I think it will just be confusing, like the word > > > 'metadata' used in the FWU stuff. > > > > > > Expo is short for exposition. My use of it is somewhat archaic > > > perhaps, but even for the meaning you mention, a public exposition is > > > not a bad description of what is provided here. > > > > > > I am not 100% convinced about 'expo' either. Do you have any other ideas? > > > > > > > > > > > Files expo.c and scene.c are in boot/ which does not match a generic GUI > > > > feature. They should be placed in lib/. > > > > > > Yes I was wondering about that, but thought that boot/ made at least > > > some sense since the menu will only ever be used for booting...? > > > > > > I can move it, but I am a little nervous about that, since lib/ > > > normally has utility libraries. Perhaps lib/expo would be better? > > > > Just to say that I replied to your comments on the doc also, so let me > > know what you think. > > I'd like to get this applied now that -next is opening. Do you have > any more comments? What are your thoughts on apply this now, -next? I am starting to wonder if we should have a VBE tree, as we do for EFI? Regards, Simon
Pull request for efi-2023-01-rc5
The following changes since commit 2243922edca9f56a9d5519b9d6e36f5d7a18434d: Prepare v2023.01-rc4 (2022-12-19 08:45:26 -0500) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-efi.git tags/efi-2023-01-rc5 for you to fetch changes up to ad50ca5019ae2b4f6ad5ffb4d62808b640f7b8aa: eficonfig: EFI_VARIABLE_APPEND_WRITE is not set for null key (2022-12-20 16:06:48 +0100) Gitlab CI showed no issues: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/14471 Pull request for efi-2023-01-rc5 UEFI: * Improve parameter checking in efi_get_next_variable_name_mem() * Fix a bugs in management of security database via the eficonfig command Other: * Allow sound command to play multiple sounds Heinrich Schuchardt (5): cmd: allow sound command to play multiple sounds doc: correct heading level in printenv man-page test: add unit test for u16_strnlen() efi_loader: fix efi_get_next_variable_name_mem() efi_selftest: conformance test for GetNextVariableName Masahisa Kojima (3): eficonfig: carve out efi_get_next_variable_name_int calls eficonfig: avoid SetVariable between GetNextVariableName calls eficonfig: EFI_VARIABLE_APPEND_WRITE is not set for null key cmd/eficonfig.c | 114 ++ cmd/eficonfig_sbkey.c | 38 +- cmd/sound.c | 41 +++ doc/usage/cmd/printenv.rst| 2 +- doc/usage/cmd/sound.rst | 23 +- include/efi_loader.h | 2 + include/efi_variable.h| 3 +- lib/efi_loader/efi_helper.c | 34 + lib/efi_loader/efi_var_mem.c | 6 +- lib/efi_selftest/efi_selftest_variables.c | 35 + test/unicode_ut.c | 11 +++ 11 files changed, 225 insertions(+), 84 deletions(-)
Re: [PATCH v5 3/3] arm: dts: am335x-sancloud-bbe-lite: UEFI SPI export
On Wed, Nov 23, 2022 at 05:50:06PM +, Paul Barker wrote:
> Add properties to the Authenta SPI flash device node to enable access by
> a UEFI application using a fixed GUID.
>
> Signed-off-by: Paul Barker
> ---
> arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi | 13 ++---
> arch/arm/dts/am335x-sancloud-bbe-lite.dts | 2 +-
> 2 files changed, 11 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi
> b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi
> index 01c105ebb383..6c4ff67f9a4b 100644
> --- a/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi
> +++ b/arch/arm/dts/am335x-sancloud-bbe-lite-u-boot.dtsi
> @@ -38,7 +38,14 @@
>
> &spi0 {
> u-boot,dm-pre-reloc;
> - channel@0 {
> - u-boot,dm-pre-reloc;
> - };
> +};
> +
> +&authenta_flash {
> + u-boot,dm-pre-reloc;
> +
> + u-boot,uefi-spi-vendor = "micron";
> + u-boot,uefi-spi-part-number = "mt25ql128abb";
Looks like a compatible string. Yet, the flash node compatible string,
micron,spi-authenta, is not documented (though in use for spidev). So
use a compatible string for the flash that is specific to the flash
model. I assume there is some reason the specific model is needed?
> + /* GUID in UEFI format: 77126730-a4ca-4386-b341-881fe18e7f7d */
> + u-boot,uefi-spi-io-guid = [30 67 12 77 ca a4 86 43
> +b3 41 88 1f e1 8e 7f 7d];
We need to define first in the DT spec the format for GUIDs. I don't
think there are any existing cases though some have been proposed. IMO,
I would make this a string instead. The byte array is not that
readable with its little endian order. A GUID as a string is readily
identifiable as a GUID.
Why is this u-boot specific? Another UEFI implementation doesn't need
the GUID?
Rob
[PATCH v2 3/4] arm: dts: k3-am625-sk: Enable first ethernet port
The K3 am625 sk EVM has two ethernet ports; Enable the first one for
usage in u-boot.
Signed-off-by: Sjoerd Simons
---
(no changes since v1)
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
index 92788bae3e0..f275e3b46ca 100644
--- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi
@@ -126,3 +126,25 @@
};
};
};
+
+&cpsw3g {
+ reg = <0x0 0x800 0x0 0x20>,
+ <0x0 0x43000200 0x0 0x8>;
+ reg-names = "cpsw_nuss", "mac_efuse";
+ /delete-property/ ranges;
+ u-boot,dm-spl;
+
+ cpsw-phy-sel@04044 {
+ compatible = "ti,am64-phy-gmii-sel";
+ reg = <0x0 0x00104044 0x0 0x8>;
+ u-boot,dm-spl;
+ };
+};
+
+&cpsw_port1 {
+ u-boot,dm-spl;
+};
+
+&cpsw_port2 {
+ status = "disabled";
+};
--
2.39.0
[PATCH v2 2/4] configs: am62x_evm_*: Run savedefconfig
Clean configuration for am62x_evm using savedefconfig Signed-off-by: Sjoerd Simons --- (no changes since v1) configs/am62x_evm_a53_defconfig | 4 ++-- configs/am62x_evm_r5_defconfig | 32 +++- 2 files changed, 17 insertions(+), 19 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 94de1ea4586..cd06e362f09 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_K3_ATF_LOAD_ADDR=0x9e78 CONFIG_TARGET_AM625_A53_EVM=y +CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" CONFIG_SPL_TEXT_BASE=0x8008 CONFIG_SPL_MMC=y @@ -14,6 +15,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x8200 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -32,12 +34,10 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x28 CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 40f933ca749..7350882a36f 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_R5_EVM=y +CONFIG_ENV_SIZE=0x2 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" @@ -18,10 +19,8 @@ CONFIG_SPL_STACK_R_ADDR=0x8200 CONFIG_SPL_SIZE_LIMIT=0x4 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_SPI=y CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_SPL_SPI=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000 CONFIG_SPL_LOAD_FIT=y @@ -42,10 +41,9 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x100 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 -CONFIG_SYS_SPI_U_BOOT_OFFS=0x8 CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_DM_RESET=y CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y @@ -53,6 +51,7 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x8 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_ASKENV=y @@ -88,6 +87,14 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=2500 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y @@ -101,23 +108,14 @@ CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y -CONFIG_DM_SPI=y -CONFIG_CADENCE_QSPI=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0 -CONFIG_SPI=y -CONFIG_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPI_FLASH_SOFT_RESET=y -CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_LIB_RATIONAL=y CONFIG_SPL_LIB_RATIONAL=y -CONFIG_ENV_SIZE=0x2 -CONFIG_ENV_OFFSET=0x68 -- 2.39.0
[PATCH v2 4/4] configs: am62x_evm_a53: Enable ethernet
Enable ethernet support for u-boot on am62x evm Signed-off-by: Sjoerd Simons --- Changes in v2: - Split out config cleanup from ethernet changes configs/am62x_evm_a53_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index cd06e362f09..ab77135e257 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -57,6 +57,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y @@ -72,6 +74,10 @@ CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_S28HX_T=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_FIXED=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y -- 2.39.0
[PATCH v2 1/4] configs: am62x_evm_*: Correct SPI configuration option
In f422c4bec the configuration option to support s28hs512t SPI flashes was changed from CONFIG_SPI_FLASH_S28HS512T to CONFIG_SPI_FLASH_S28HX_T to support the wider family. Follow this change in the AM62x EVM configurations. Signed-off-by: Sjoerd Simons --- (no changes since v1) configs/am62x_evm_a53_defconfig | 2 +- configs/am62x_evm_r5_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index e6ffd166927..94de1ea4586 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -71,7 +71,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index f95bc5f2221..40f933ca749 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -110,7 +110,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y -- 2.39.0
[PATCH v2 0/4] Enable ethernet for ti am62x
These patches enable ethernet from u-boot on the ti am62x EVM. They are based on the u-boot next branch (33f4d3c3) to take advantage of recent dts sync of these boards with linux The first two patches clean up the configurations little bit (fixing incorrect config variable, running savedefconfig), the last two actually enable ethernet support Changes in v2: - Split out config cleanup from ethernet changes Sjoerd Simons (4): configs: am62x_evm_*: Correct SPI configuration option configs: am62x_evm_*: Run savedefconfig arm: dts: k3-am625-sk: Enable first ethernet port configs: am62x_evm_a53: Enable ethernet arch/arm/dts/k3-am625-sk-u-boot.dtsi | 22 +++ configs/am62x_evm_a53_defconfig | 12 --- configs/am62x_evm_r5_defconfig | 32 +--- 3 files changed, 46 insertions(+), 20 deletions(-) -- 2.39.0
Re: [PATCH v2] eficonfig: EFI_VARIABLE_APPEND_WRITE is not set for null key
On 12/20/22 10:38, Masahisa Kojima wrote:
The signed null key with authenticated header is used to clear
the PK, KEK, db and dbx. When CONFIG_EFI_MM_COMM_TEE is enabled
(StMM and OP-TEE based RPMB storage is used as the EFI variable
storage), clearing KEK, db and dbx by enrolling a signed null
key does not work as expected if EFI_VARIABLE_APPEND_WRITE
attritube is set.
This commit checks the selected file is null key, then
EFI_VARIABLE_APPEND_WRITE attibute will not be used for the null key.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
Changes in v2:
- s/size == 0/!size/
cmd/eficonfig_sbkey.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/cmd/eficonfig_sbkey.c b/cmd/eficonfig_sbkey.c
index 6e0bebf1d4..7fb0467543 100644
--- a/cmd/eficonfig_sbkey.c
+++ b/cmd/eficonfig_sbkey.c
@@ -72,6 +72,30 @@ static bool file_have_auth_header(void *buf, efi_uintn_t
size)
return true;
}
+/**
+ * file_is_null_key() - check the file is an authenticated and signed null key
+ * @auth: pointer to the file
+ * @size: file size
+ * @null_key: pointer to store the result
+ * Return: status code
+ */
+static efi_status_t file_is_null_key(struct efi_variable_authentication_2
*auth,
+efi_uintn_t size, bool *null_key)
+{
+ efi_status_t ret = EFI_SUCCESS;
+
+ if (size < (sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength))
+ return EFI_INVALID_PARAMETER;
+
+ size -= (sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength);
+ if (!size) /* No payload */
+ *null_key = true;
+ else
+ *null_key = false;
+
+ return ret;
+}
+
When merging I will make this:
+static efi_status_t file_is_null_key(struct
efi_variable_authentication_2 *auth,
+efi_uintn_t size, bool *null_key)
+{
+ efi_uintn_t auth_size =
+ sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength;
+
+ if (size < auth_size)
+ return EFI_INVALID_PARAMETER;
+
+ *null_key = (size == auth_size);
+
+ return EFI_SUCCESS;
+}
Looks easier to read to me.
Reviewed-by: Heinrich Schuchardt
/**
* eficonfig_process_enroll_key() - enroll key into signature database
*
@@ -84,6 +108,7 @@ static efi_status_t eficonfig_process_enroll_key(void *data)
char *buf = NULL;
efi_uintn_t size;
efi_status_t ret;
+ bool null_key = false;
struct efi_file_handle *f = NULL;
struct efi_device_path *full_dp = NULL;
struct eficonfig_select_file_info file_info;
@@ -149,13 +174,24 @@ static efi_status_t eficonfig_process_enroll_key(void
*data)
goto out;
}
+ ret = file_is_null_key((struct efi_variable_authentication_2 *)buf,
+ size, &null_key);
+ if (ret != EFI_SUCCESS) {
+ eficonfig_print_msg("ERROR! Invalid file format.");
+ goto out;
+ }
+
attr = EFI_VARIABLE_NON_VOLATILE |
EFI_VARIABLE_BOOTSERVICE_ACCESS |
EFI_VARIABLE_RUNTIME_ACCESS |
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS;
- /* PK can enroll only one certificate */
- if (u16_strcmp(data, u"PK")) {
+ /*
+* PK can enroll only one certificate.
+* The signed null key is used to clear KEK, db and dbx.
+* EFI_VARIABLE_APPEND_WRITE attribute must not be set in these cases.
+*/
+ if (u16_strcmp(data, u"PK") && !null_key) {
efi_uintn_t db_size = 0;
/* check the variable exists. If exists, add APPEND_WRITE
attribute */
Re: [u-boot][master][PATCH 1/3] pico-imx7d: add support for 2GB memory SoMs
I will not keep, most of Technexion SoM codes are broken or limited in functionalities (like 2GB RAM support missing, dual boot missing), because there is no any active maintenancing and as i see nobody cares about it from freescale community.What is the point of renaming and rewriting these codes, which they have already made for themselves once and work well, now? My opinion is, need to migrate only these codes, and do not need to change.
Re: [u-boot][master][PATCH 2/3] pico-imx7d: add baseboard SD card boot detect
To use fsl_esdhc_initialize() is must or esdhc drivers object will be not initialized. It was made by Technexion.In practice, it turned out that 3 is good.
Re: [u-boot][master][PATCH 1/3] pico-imx7d: add support for 2GB memory SoMs
Technexion did that renaming, it is better to keep in synchronized.https://github.com/TechNexion/u-boot-tn-imx/tree/tn-imx_v2021.04_5.10.72_2.2.0-stable/board/technexion/pico-imx7d
Re: [u-boot][master][PATCH 1/3] pico-imx7d: add support for 2GB memory SoMs
All codes come from official u-boot codes from Technexion may they knows better why it is optimal in this form.https://github.com/TechNexion/u-boot-tn-imx/tree/tn-imx_v2021.04_5.10.72_2.2.0-stable/board/technexion/pico-imx7d
[PATCH 1/4] xilinx: zynq: Enable gigadevice
Enable gigadevice part #s Signed-off-by: Victor Lim --- configs/xilinx_zynq_virt_defconfig | 1 + configs/zynq_cse_qspi_defconfig| 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 611c5e993c..fe2321d658 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -103,6 +103,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_PHY_MARVELL=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index 60f0d7cac4..d58db07e71 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -71,6 +71,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_ARM_DCC=y CONFIG_ZYNQ_QSPI=y -- 2.25.1
[PATCH 4/4] mtd: spi-nor-ids: add gigadevice part #
Adding the following parts to the list
gd25b256: 3V QSPI, QE=1, 256Mbit
gd25b512: 3V QSPI, QE=1, 512Mbit
gd55b01g: 3V QSPI, QE=1, 1Gbit
gd55b02g: 3V QSPI, QE=1, 2Gbit
gd25f64: 3V QSPI, QE=1, 64Mbit, high performance
gd25f128: 3V QSPI, QE=1, 128Mbit, high performance
gd25f256: 3V QSPI, QE=1, 256Mbit, high performance
gd55f512: 3V QSPI, QE=1, 512Mbit, high performance
gd25t512: 3V QSPI, 512Mbit, ultra high performance
gd55t01g: 3V QSPI, 1Gbit, ultra high performance
gd55t02g: 3V QSPI, 2Gbit, ultra high performance
gd25x512: 3V OSPI, 512Mbit, ultra high performance
gd55x01g: 3V OSPI, 1Gbit, ultra high performance
gd55x02g: 3V OSPI, 2Gbit, ultra high performance
gd25lb256: 1.8V QSPI, QE=1, 256Mbit
gd25lb512: 1.8V QSPI, QE=1, 512Mbit
gd55lb01g: 1.8V QSPI, QE=1, 1Gbit
gd55lb02g: 1.8V QSPI, QE=1, 2Gbit
gd25lf64: 1.8V QSPI, QE=1, 64Mbit, high performance
gd25lf128: 1.8V QSPI, QE=1, 128Mbit, high performance
gd25lf256: 1.8V QSPI, QE=1, 256Mbit, high performance
gd55lf512: 1.8V QSPI, QE=1, 512Mbit, high performance
gd25lt512: 1.8V QSPI, 512Mbit, ultra high performance
gd55lt01g: 1.8V QSPI, 1Gbit, ultra high performance
gd55lt02g: 1.8V QSPI, 2Gbit, ultra high performance
gd25lx512: 1.8V OSPI, 512Mbit, ultra high performance
gd55lx01g: 1.8V OSPI, 1Gbit, ultra high performance
gd55lx02g: 1.8V OSPI, 2Gbit, ultra high performance
This is the link to the datasheet.
https://www.gigadevice.com/products/memory/flash/spi-nor/
Signed-off-by: Victor Lim
---
drivers/mtd/spi/spi-nor-ids.c | 68 +++
1 file changed, 68 insertions(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 74e93d6209..ba73eef87f 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -118,6 +118,36 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ /* adding these 3V QSPI flash parts */
+ {INFO("gd25b256", 0xc84019, 0, 64 * 1024, 512, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_4B_OPCODES) },
+ {INFO("gd25b512", 0xc8471A, 0, 64 * 1024, 1024, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55b01g", 0xc8471B, 0, 64 * 1024, 2048, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55b02g", 0xc8471C, 0, 64 * 1024, 4096, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd25f64", 0xc84317, 0, 64 * 1024, 128, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)},
+ {INFO("gd25f128", 0xc84318, 0, 64 * 1024, 256, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK)},
+ {INFO("gd25f256", 0xc84319, 0, 64 * 1024, 512, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_4B_OPCODES)},
+ {INFO("gd55f512", 0xc8431A, 0, 64 * 1024, 1024, SECT_4K |
+ SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK |
SPI_NOR_4B_OPCODES)},
+ {INFO("gd25t512", 0xc8461A, 0, 64 * 1024, 1024, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55t01g", 0xc8461B, 0, 64 * 1024, 2048, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55t02g", 0xc8461C, 0, 64 * 1024, 4096, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ /* adding these 3V OSPI flash parts */
+ {INFO("gd25x512", 0xc8481A, 0, 64 * 1024, 1024, SECT_4K |
+ SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55x01g", 0xc8481B, 0, 64 * 1024, 2048, SECT_4K |
+ SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55x02g", 0xc8481C, 0, 64 * 1024, 4096, SECT_4K |
+ SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)},
{
INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ |
@@ -128,10 +158,48 @@ const struct flash_info spi_nor_ids[] = {
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
},
+ /* adding these 1.8V QSPI flash parts */
+ {INFO("gd25lb256", 0xc86719, 0, 64 * 1024, 512, SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd25lb512", 0xc8671A, 0, 64 * 1024, 1024,SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55lb01g", 0xc8671B, 0, 64 * 1024, 2048,SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd55lb02g", 0xc8671C, 0, 64 * 1024, 4096,SECT_4K |
+ SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
+ {INFO("gd25lf80", 0xc86314, 0, 64 * 1024, 16, SECT_4K |
+ SPI_NOR_DUAL_RE
[PATCH 3/4] xilinx: versal: Enable gigadevice parts
Enable gigadevice in this file Signed-off-by: Victor Lim --- configs/xilinx_versal_mini_qspi_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index bb53e6c913..247a011dae 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_POWER is not set CONFIG_ARM_DCC=y -- 2.25.1
[PATCH 2/4] arm64: zynqmp: Enable gigadevice
Enable gigadevice part # Signed-off-by: Victor Lim --- configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index c6401c2a54..2171d09fc3 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set # CONFIG_POWER is not set CONFIG_ARM_DCC=y diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index e63b19b911..2893fdaa82 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -147,6 +147,7 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_SST=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_SPI_FLASH_GIGADEVICE=y # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_MARVELL=y -- 2.25.1
[PATCH 0/4] Enable gigadevice and add new part #s
Enabling gigadevice part #s. These are the part #s added, gd25b256: 3V QSPI, QE=1, 256Mbit gd25b512: 3V QSPI, QE=1, 512Mbit gd55b01g: 3V QSPI, QE=1, 1Gbit gd55b02g: 3V QSPI, QE=1, 2Gbit gd25f64: 3V QSPI, QE=1, 64Mbit, high performance gd25f128: 3V QSPI, QE=1, 128Mbit, high performance gd25f256: 3V QSPI, QE=1, 256Mbit, high performance gd55f512: 3V QSPI, QE=1, 512Mbit, high performance gd25t512: 3V QSPI, 512Mbit, ultra high performance gd55t01g: 3V QSPI, 1Gbit, ultra high performance gd55t02g: 3V QSPI, 2Gbit, ultra high performance gd25x512: 3V OSPI, 512Mbit, ultra high performance gd55x01g: 3V OSPI, 1Gbit, ultra high performance gd55x02g: 3V OSPI, 2Gbit, ultra high performance gd25lb256: 1.8V QSPI, QE=1, 256Mbit gd25lb512: 1.8V QSPI, QE=1, 512Mbit gd55lb01g: 1.8V QSPI, QE=1, 1Gbit gd55lb02g: 1.8V QSPI, QE=1, 2Gbit gd25lf64: 1.8V QSPI, QE=1, 64Mbit, high performance gd25lf128: 1.8V QSPI, QE=1, 128Mbit, high performance gd25lf256: 1.8V QSPI, QE=1, 256Mbit, high performance gd55lf512: 1.8V QSPI, QE=1, 512Mbit, high performance gd25lt512: 1.8V QSPI, 512Mbit, ultra high performance gd55lt01g: 1.8V QSPI, 1Gbit, ultra high performance gd55lt02g: 1.8V QSPI, 2Gbit, ultra high performance gd25lx512: 1.8V OSPI, 512Mbit, ultra high performance gd55lx01g: 1.8V OSPI, 1Gbit, ultra high performance gd55lx02g: 1.8V OSPI, 2Gbit, ultra high performance This is the link to the datasheet. https://www.gigadevice.com/products/memory/flash/spi-nor/ Victor Lim (4): xilinx: zynq: Enable gigadevice arm64: zynqmp: Enable gigadevice xilinx: versal: Enable gigadevice parts mtd: spi-nor-ids: add gigadevice part # configs/xilinx_versal_mini_qspi_defconfig | 1 + configs/xilinx_zynq_virt_defconfig| 1 + configs/xilinx_zynqmp_mini_qspi_defconfig | 1 + configs/xilinx_zynqmp_virt_defconfig | 1 + configs/zynq_cse_qspi_defconfig | 1 + drivers/mtd/spi/spi-nor-ids.c | 68 +++ 6 files changed, 73 insertions(+) -- 2.25.1
[PATCH] i2c: add dm_i2c_probe_chip() to detect chip presence
Add function to determine whether a chip is present. This check is
typically implemented by writing the chip address to the bus and
checking that the chip replies with an ACK.
The already existing dm_i2c_probe() will attempt to bind/probe the
relevant driver if the chip is present. This makes it unsuitable for
situations where one only wants to know the presence of a chip.
Signed-off-by: Johan Korsnes
Cc: Eirik Schultz
Cc: Heiko Schocher
Cc: Simon Glass
---
Previously, I've used i2c_probe() to determine whether or not an i2c
chip is present on an i2c bus. With the introduction of the driver model
this function is deprecated. Fortunately, I found dm_i2c_probe(), which
I expected to perform the same check, it was even documented to be
suitable for this purpose:
```
dm_i2c_probe() - probe a particular chip address
This can be useful to check for the existence of a chip on the bus.
It is typically implemented by writing the chip address to the bus
and checking that the chip replies with an ACK.
```
Unfortunately, it does not seem to be a replacement. It seems
dm_i2c_probe() will attempt to bind/probe a driver if the chip is
present, and will in turn return the return value from the driver
probe/bind attempt.
---
drivers/i2c/i2c-uclass.c | 11 +++
include/i2c.h| 16 +---
2 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/i2c/i2c-uclass.c b/drivers/i2c/i2c-uclass.c
index 8d9a89ed89..16a2be7531 100644
--- a/drivers/i2c/i2c-uclass.c
+++ b/drivers/i2c/i2c-uclass.c
@@ -409,6 +409,17 @@ int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint
chip_flags,
return ret;
}
+int dm_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint chip_flags)
+{
+ int ret;
+
+ ret = i2c_probe_chip(bus, chip_addr, chip_flags);
+ debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
+ chip_addr, ret);
+
+ return ret;
+}
+
int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
{
struct dm_i2c_ops *ops = i2c_get_ops(bus);
diff --git a/include/i2c.h b/include/i2c.h
index e0ee94e550..4c22d8c887 100644
--- a/include/i2c.h
+++ b/include/i2c.h
@@ -206,6 +206,18 @@ int dm_i2c_write(struct udevice *dev, uint offset, const
uint8_t *buffer,
/**
* dm_i2c_probe() - probe a particular chip address
*
+ * @bus: Bus to probe
+ * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
+ * @chip_flags:Flags for the probe (see enum dm_i2c_chip_flags)
+ * @devp: Returns the device found, or NULL if none
+ * Return: 0 if a chip was found at that address, -ve if not
+ */
+int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
+struct udevice **devp);
+
+/**
+ * dm_i2c_probe_chip() - probe a particular chip address
+ *
* This can be useful to check for the existence of a chip on the bus.
* It is typically implemented by writing the chip address to the bus
* and checking that the chip replies with an ACK.
@@ -213,11 +225,9 @@ int dm_i2c_write(struct udevice *dev, uint offset, const
uint8_t *buffer,
* @bus: Bus to probe
* @chip_addr: 7-bit address to probe (10-bit and others are not supported)
* @chip_flags:Flags for the probe (see enum dm_i2c_chip_flags)
- * @devp: Returns the device found, or NULL if none
* Return: 0 if a chip was found at that address, -ve if not
*/
-int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
-struct udevice **devp);
+int dm_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint chip_flags);
/**
* dm_i2c_reg_read() - Read a value from an I2C register
--
2.38.1
[PATCH] arm: mach-k3: j721e: Add platform data for main_uart2
Add platform clock and powerdomain data for main_uart2 in J721e. This
data is used by the driver to register main_uart2 device clocks and
powerdomains for J721e.
Signed-off-by: Bhavya Kapoor
---
arch/arm/mach-k3/j721e/clk-data.c | 7 +--
arch/arm/mach-k3/j721e/dev-data.c | 3 ++-
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-k3/j721e/clk-data.c
b/arch/arm/mach-k3/j721e/clk-data.c
index 5ab795139e..2b262bfbc3 100644
--- a/arch/arm/mach-k3/j721e/clk-data.c
+++ b/arch/arm/mach-k3/j721e/clk-data.c
@@ -553,6 +553,7 @@ static const struct clk_data clk_list[] = {
CLK_MUX("main_pll4_xref_sel_out0", main_pll4_xref_sel_out0_parents, 2,
0x43008090, 4, 1, 0),
CLK_MUX("mcu_clkout_mux_out0", mcu_clkout_mux_out0_parents, 2,
0x40f08010, 0, 1, 0),
CLK_DIV_DEFFREQ("usart_programmable_clock_divider_out0",
"hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c0, 0, 2, 0, 0, 4800),
+ CLK_DIV("usart_programmable_clock_divider_out2",
"hsdiv4_16fft_main_1_hsdivout0_clk", 0x1081c8, 0, 2, 0, 0),
CLK_DIV("hsdiv0_16fft_main_12_hsdivout0_clk",
"pllfracf_ssmod_16fft_main_12_foutvcop_clk", 0x68c080, 0, 7, 0, 0),
CLK_DIV("hsdiv0_16fft_main_6_hsdivout0_clk",
"pllfrac2_ssmod_16fft_main_6_foutvcop_clk", 0x686080, 0, 7, 0, 0),
CLK_DIV("hsdiv0_16fft_main_7_hsdivout0_clk",
"pllfrac2_ssmod_16fft_main_7_foutvcop_clk", 0x687080, 0, 7, 0, 0),
@@ -760,6 +761,8 @@ static const struct dev_clk soc_dev_clk_data[] = {
DEV_CLK(197, 4, "k3_pll_ctrl_wrap_wkup_0_chip_div1_clk_clk"),
DEV_CLK(202, 2, "hsdiv0_16fft_main_8_hsdivout0_clk"),
DEV_CLK(203, 0, "hsdiv0_16fft_main_8_hsdivout0_clk"),
+ DEV_CLK(279, 0, "usart_programmable_clock_divider_out2"),
+ DEV_CLK(279, 1, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(288, 3, "postdiv3_16fft_main_1_hsdivout7_clk"),
DEV_CLK(288, 4, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
DEV_CLK(288, 5, "k3_pll_ctrl_wrap_main_0_chip_div1_clk_clk"),
@@ -780,7 +783,7 @@ static const struct dev_clk soc_dev_clk_data[] = {
const struct ti_k3_clk_platdata j721e_clk_platdata = {
.clk_list = clk_list,
- .clk_list_cnt = 156,
+ .clk_list_cnt = 157,
.soc_dev_clk_data = soc_dev_clk_data,
- .soc_dev_clk_data_cnt = 171,
+ .soc_dev_clk_data_cnt = 173,
};
diff --git a/arch/arm/mach-k3/j721e/dev-data.c
b/arch/arm/mach-k3/j721e/dev-data.c
index 300d998c62..f0afa3552b 100644
--- a/arch/arm/mach-k3/j721e/dev-data.c
+++ b/arch/arm/mach-k3/j721e/dev-data.c
@@ -46,6 +46,7 @@ static struct ti_dev soc_dev_list[] = {
PSC_DEV(30, &soc_lpsc_list[0]),
PSC_DEV(61, &soc_lpsc_list[0]),
PSC_DEV(146, &soc_lpsc_list[1]),
+ PSC_DEV(279, &soc_lpsc_list[1]),
PSC_DEV(90, &soc_lpsc_list[2]),
PSC_DEV(47, &soc_lpsc_list[3]),
PSC_DEV(288, &soc_lpsc_list[4]),
@@ -75,5 +76,5 @@ const struct ti_k3_pd_platdata j721e_pd_platdata = {
.num_psc = 2,
.num_pd = 5,
.num_lpsc = 16,
- .num_devs = 22,
+ .num_devs = 23,
};
--
2.37.2
[PATCH v2] eficonfig: EFI_VARIABLE_APPEND_WRITE is not set for null key
The signed null key with authenticated header is used to clear
the PK, KEK, db and dbx. When CONFIG_EFI_MM_COMM_TEE is enabled
(StMM and OP-TEE based RPMB storage is used as the EFI variable
storage), clearing KEK, db and dbx by enrolling a signed null
key does not work as expected if EFI_VARIABLE_APPEND_WRITE
attritube is set.
This commit checks the selected file is null key, then
EFI_VARIABLE_APPEND_WRITE attibute will not be used for the null key.
Signed-off-by: Masahisa Kojima
Reviewed-by: Ilias Apalodimas
---
Changes in v2:
- s/size == 0/!size/
cmd/eficonfig_sbkey.c | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/cmd/eficonfig_sbkey.c b/cmd/eficonfig_sbkey.c
index 6e0bebf1d4..7fb0467543 100644
--- a/cmd/eficonfig_sbkey.c
+++ b/cmd/eficonfig_sbkey.c
@@ -72,6 +72,30 @@ static bool file_have_auth_header(void *buf, efi_uintn_t
size)
return true;
}
+/**
+ * file_is_null_key() - check the file is an authenticated and signed null key
+ * @auth: pointer to the file
+ * @size: file size
+ * @null_key: pointer to store the result
+ * Return: status code
+ */
+static efi_status_t file_is_null_key(struct efi_variable_authentication_2
*auth,
+efi_uintn_t size, bool *null_key)
+{
+ efi_status_t ret = EFI_SUCCESS;
+
+ if (size < (sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength))
+ return EFI_INVALID_PARAMETER;
+
+ size -= (sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength);
+ if (!size) /* No payload */
+ *null_key = true;
+ else
+ *null_key = false;
+
+ return ret;
+}
+
/**
* eficonfig_process_enroll_key() - enroll key into signature database
*
@@ -84,6 +108,7 @@ static efi_status_t eficonfig_process_enroll_key(void *data)
char *buf = NULL;
efi_uintn_t size;
efi_status_t ret;
+ bool null_key = false;
struct efi_file_handle *f = NULL;
struct efi_device_path *full_dp = NULL;
struct eficonfig_select_file_info file_info;
@@ -149,13 +174,24 @@ static efi_status_t eficonfig_process_enroll_key(void
*data)
goto out;
}
+ ret = file_is_null_key((struct efi_variable_authentication_2 *)buf,
+ size, &null_key);
+ if (ret != EFI_SUCCESS) {
+ eficonfig_print_msg("ERROR! Invalid file format.");
+ goto out;
+ }
+
attr = EFI_VARIABLE_NON_VOLATILE |
EFI_VARIABLE_BOOTSERVICE_ACCESS |
EFI_VARIABLE_RUNTIME_ACCESS |
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS;
- /* PK can enroll only one certificate */
- if (u16_strcmp(data, u"PK")) {
+ /*
+* PK can enroll only one certificate.
+* The signed null key is used to clear KEK, db and dbx.
+* EFI_VARIABLE_APPEND_WRITE attribute must not be set in these cases.
+*/
+ if (u16_strcmp(data, u"PK") && !null_key) {
efi_uintn_t db_size = 0;
/* check the variable exists. If exists, add APPEND_WRITE
attribute */
--
2.17.1
[u-boot][PATCH v2 8/8] mtd: rawnand: omap_elm: u-boot driver model support
Support u-boot driver model. We still retain
support legacy way of doing things if ELM_BASE
is defined in
We could completely get rid of that if all
platforms defining ELM_BASE get rid of that definition
and enable CONFIG_SYS_NAND_SELF_INIT and are verified
to work.
Signed-off-by: Roger Quadros
---
drivers/mtd/nand/raw/omap_elm.c | 35 ++-
.../mtd => drivers/mtd/nand/raw}/omap_elm.h | 6
drivers/mtd/nand/raw/omap_gpmc.c | 12 ++-
3 files changed, 51 insertions(+), 2 deletions(-)
rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
diff --git a/drivers/mtd/nand/raw/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c
index 35c6dd1f1bc..e528a5348d5 100644
--- a/drivers/mtd/nand/raw/omap_elm.c
+++ b/drivers/mtd/nand/raw/omap_elm.c
@@ -15,9 +15,14 @@
#include
#include
#include
-#include
#include
+#include
+#include
+#include
+
+#include "omap_elm.h"
+
#define DRIVER_NAME"omap-elm"
#define ELM_DEFAULT_POLY (0)
@@ -180,6 +185,7 @@ void elm_reset(void)
;
}
+#ifdef ELM_BASE
/**
* elm_init - Initialize ELM module
*
@@ -191,3 +197,30 @@ void elm_init(void)
elm_cfg = (struct elm *)ELM_BASE;
elm_reset();
}
+#endif
+
+static int elm_probe(struct udevice *dev)
+{
+#ifndef ELM_BASE
+ struct resource res;
+
+ dev_read_resource(dev, 0, &res);
+ elm_cfg = devm_ioremap(dev, res.start, resource_size(&res));
+ elm_reset();
+#endif
+
+ return 0;
+}
+
+static const struct udevice_id elm_ids[] = {
+ { .compatible = "ti,am3352-elm" },
+ { .compatible = "ti,am64-elm" },
+ { }
+};
+
+U_BOOT_DRIVER(gpmc_elm) = {
+ .name = DRIVER_NAME,
+ .id = UCLASS_MTD,
+ .of_match = elm_ids,
+ .probe = elm_probe,
+};
diff --git a/include/linux/mtd/omap_elm.h b/drivers/mtd/nand/raw/omap_elm.h
similarity index 97%
rename from include/linux/mtd/omap_elm.h
rename to drivers/mtd/nand/raw/omap_elm.h
index f3db00d55de..a7f7bacb154 100644
--- a/include/linux/mtd/omap_elm.h
+++ b/drivers/mtd/nand/raw/omap_elm.h
@@ -74,6 +74,12 @@ int elm_check_error(u8 *syndrome, enum bch_level bch_type,
u32 *error_count,
u32 *error_locations);
int elm_config(enum bch_level level);
void elm_reset(void);
+#ifdef ELM_BASE
void elm_init(void);
+#else
+static inline void elm_init(void)
+{
+}
+#endif
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARCH_ELM_H */
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index ed6cdf93ad0..9692b78da3c 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -20,7 +20,8 @@
#include
#include
#include
-#include
+
+#include "omap_elm.h"
#ifndef GPMC_MAX_CS
#define GPMC_MAX_CS4
@@ -1249,6 +1250,15 @@ void board_nand_init(void)
struct udevice *dev;
int ret;
+#ifdef CONFIG_NAND_OMAP_ELM
+ ret = uclass_get_device_by_driver(UCLASS_MTD,
+ DM_DRIVER_GET(gpmc_elm), &dev);
+ if (ret && ret != -ENODEV) {
+ pr_err("%s: Failed to get ELM device: %d\n", __func__, ret);
+ return;
+ }
+#endif
+
ret = uclass_get_device_by_driver(UCLASS_MTD,
DM_DRIVER_GET(gpmc_nand), &dev);
if (ret && ret != -ENODEV)
--
2.34.1
[u-boot][PATCH v2 7/8] dt-bindings: mtd: Add ti, elm DT binding documentation
Adds DT binding documentation for the TI Error Location Module.
This is picked up from the Linux Kernel.
Signed-off-by: Roger Quadros
---
doc/device-tree-bindings/mtd/ti,elm.yaml | 72
1 file changed, 72 insertions(+)
create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml
diff --git a/doc/device-tree-bindings/mtd/ti,elm.yaml
b/doc/device-tree-bindings/mtd/ti,elm.yaml
new file mode 100644
index 000..87128c00459
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/ti,elm.yaml
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/ti,elm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments Error Location Module (ELM).
+
+maintainers:
+ - Roger Quadros
+
+description:
+ ELM module is used together with GPMC and NAND Flash to detect
+ errors and the location of the error based on BCH algorithms
+ so they can be corrected if possible.
+
+properties:
+ compatible:
+enum:
+ - ti,am3352-elm
+ - ti,am64-elm
+
+ reg:
+maxItems: 1
+
+ interrupts:
+maxItems: 1
+
+ clocks:
+maxItems: 1
+description: Functional clock.
+
+ clock-names:
+items:
+ - const: fck
+
+ power-domains:
+maxItems: 1
+
+ ti,hwmods:
+description:
+ Name of the HWMOD associated with ELM. This is for legacy
+ platforms only.
+$ref: /schemas/types.yaml#/definitions/string
+deprecated: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+allOf:
+ - if:
+ properties:
+compatible:
+ contains:
+const: ti,am64-elm
+then:
+ required:
+- clocks
+- clock-names
+- power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+elm: ecc@0 {
+compatible = "ti,am3352-elm";
+reg = <0x0 0x2000>;
+interrupts = <4>;
+};
--
2.34.1
[u-boot][PATCH v2 6/8] mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
The symbol is required for NAND support in SPL when using OMAP_GPMC driver. Signed-off-by: Roger Quadros --- drivers/mtd/nand/raw/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index e53c9284a0d..458b5faeb65 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -574,7 +574,8 @@ config SYS_NAND_ONFI_DETECTION config SYS_NAND_PAGE_COUNT hex "NAND chip page count" depends on SPL_NAND_SUPPORT && (NAND_ATMEL || NAND_MXC || \ - SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE) + SPL_NAND_AM33XX_BCH || SPL_NAND_LOAD || SPL_NAND_SIMPLE || \ + NAND_OMAP_GPMC) help Number of pages in the NAND chip. -- 2.34.1
[u-boot][PATCH v2 5/8] mtd: rawnand: omap_gpmc: Add SPL NAND support
Enables SPL NAND support for ARCH_K3 by enabling
SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT.
Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH
instead.
Signed-off-by: Roger Quadros
---
drivers/mtd/nand/raw/Kconfig | 5
drivers/mtd/nand/raw/Makefile| 2 +-
drivers/mtd/nand/raw/omap_gpmc.c | 40
3 files changed, 46 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 3f4851b93bd..e53c9284a0d 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -26,6 +26,9 @@ config TPL_SYS_NAND_SELF_INIT
config TPL_NAND_INIT
bool
+config SPL_NAND_INIT
+ bool
+
config SYS_MAX_NAND_DEVICE
int "Maximum number of NAND devices to support"
default 1
@@ -199,6 +202,8 @@ config NAND_OMAP_GPMC
bool "Support OMAP GPMC NAND controller"
depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3
select SYS_NAND_SELF_INIT if ARCH_K3
+ select SPL_NAND_INIT if ARCH_K3
+ select SPL_SYS_NAND_SELF_INIT if ARCH_K3
help
Enables omap_gpmc.c driver for OMAPx and AM platforms.
GPMC controller is used for parallel NAND flash devices, and can
diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile
index a398aa9d886..6fe33d2485b 100644
--- a/drivers/mtd/nand/raw/Makefile
+++ b/drivers/mtd/nand/raw/Makefile
@@ -18,7 +18,7 @@ obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_amd.o
nand_hynix.o \
nand_macronix.o nand_micron.o \
nand_samsung.o nand_toshiba.o
obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o
-obj-$(CONFIG_TPL_NAND_INIT) += nand.o
+obj-$(CONFIG_$(SPL_TPL_)NAND_INIT) += nand.o
ifeq ($(CONFIG_SPL_ENV_SUPPORT),y)
obj-$(CONFIG_ENV_IS_IN_NAND) += nand_util.o
endif
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 61e025db9a5..ed6cdf93ad0 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -1263,3 +1263,43 @@ int board_nand_init(struct nand_chip *nand)
}
#endif /* CONFIG_SYS_NAND_SELF_INIT */
+
+#if defined(CONFIG_SPL_NAND_INIT)
+
+/* nand_init() is provided by nand.c */
+
+/* Unselect after operation */
+void nand_deselect(void)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+
+ if (nand_chip->select_chip)
+ nand_chip->select_chip(mtd, -1);
+}
+
+static int nand_is_bad_block(int block)
+{
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+
+ loff_t ofs = block * CONFIG_SYS_NAND_BLOCK_SIZE;
+
+ return nand_chip->block_bad(mtd, ofs);
+}
+
+static int nand_read_page(int block, int page, uchar *dst)
+{
+ int page_addr = block * CONFIG_SYS_NAND_PAGE_COUNT + page;
+ loff_t ofs = page_addr * CONFIG_SYS_NAND_PAGE_SIZE;
+ int ret;
+ size_t len = CONFIG_SYS_NAND_PAGE_SIZE;
+ struct mtd_info *mtd = nand_to_mtd(nand_chip);
+
+ ret = nand_read(mtd, ofs, &len, dst);
+ if (ret)
+ printf("nand_read failed %d\n", ret);
+
+ return ret;
+}
+
+#include "nand_spl_loaders.c"
+#endif /* CONFIG_SPL_NAND_INIT */
--
2.34.1
[u-boot][PATCH v2 4/8] mtd: rawnand: omap_gpmc: support u-boot driver model
Adds driver model support.
We need to be able to self initialize the NAND controller/chip
at probe and so enable CONFIG_SYS_NAND_SELF_INIT.
Doing so requires nand_register() API which is provided by nand.c
and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT.
But nand.c also provides nand_init() so we need to get rid of nand_init()
in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set.
Signed-off-by: Roger Quadros
---
drivers/mtd/nand/raw/Kconfig | 1 +
drivers/mtd/nand/raw/omap_gpmc.c | 64 +++-
2 files changed, 64 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
index 8aaba8b1a2c..3f4851b93bd 100644
--- a/drivers/mtd/nand/raw/Kconfig
+++ b/drivers/mtd/nand/raw/Kconfig
@@ -198,6 +198,7 @@ config NAND_LPC32XX_SLC
config NAND_OMAP_GPMC
bool "Support OMAP GPMC NAND controller"
depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3
+ select SYS_NAND_SELF_INIT if ARCH_K3
help
Enables omap_gpmc.c driver for OMAPx and AM platforms.
GPMC controller is used for parallel NAND flash devices, and can
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index e772a914c88..61e025db9a5 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -7,6 +7,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_ARCH_OMAP2PLUS
@@ -1121,7 +1122,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t
hardware, uint32_t eccstrength)
* nand_scan about special functionality. See the defines for further
* explanation
*/
-int board_nand_init(struct nand_chip *nand)
+int gpmc_nand_init(struct nand_chip *nand)
{
int32_t gpmc_config = 0;
int cs = cs_next++;
@@ -1201,3 +1202,64 @@ int board_nand_init(struct nand_chip *nand)
return 0;
}
+
+/* First NAND chip for SPL use only */
+static __maybe_unused struct nand_chip *nand_chip;
+
+#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
+
+static int gpmc_nand_probe(struct udevice *dev)
+{
+ struct nand_chip *nand = dev_get_priv(dev);
+ struct mtd_info *mtd = nand_to_mtd(nand);
+ int ret;
+
+ gpmc_nand_init(nand);
+
+ ret = nand_scan(mtd, CONFIG_SYS_NAND_MAX_CHIPS);
+ if (ret)
+ return ret;
+
+ ret = nand_register(0, mtd);
+ if (ret)
+ return ret;
+
+ if (!nand_chip)
+ nand_chip = nand;
+
+ return 0;
+}
+
+static const struct udevice_id gpmc_nand_ids[] = {
+ { .compatible = "ti,am64-nand" },
+ { .compatible = "ti,omap2-nand" },
+ { }
+};
+
+U_BOOT_DRIVER(gpmc_nand) = {
+ .name = "gpmc-nand",
+ .id = UCLASS_MTD,
+ .of_match = gpmc_nand_ids,
+ .probe = gpmc_nand_probe,
+ .priv_auto = sizeof(struct nand_chip),
+};
+
+void board_nand_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MTD,
+ DM_DRIVER_GET(gpmc_nand), &dev);
+ if (ret && ret != -ENODEV)
+ pr_err("%s: Failed to get GPMC device: %d\n", __func__, ret);
+}
+
+#else
+
+int board_nand_init(struct nand_chip *nand)
+{
+ return gpmc_nand_init(nand);
+}
+
+#endif /* CONFIG_SYS_NAND_SELF_INIT */
--
2.34.1
[u-boot][PATCH v2 3/8] dt-bindings: mtd: Add ti, gpmc-nand DT binding documentation
Add DT binding documentation for the TI GPMC NAND controller.
This is picked up from the Linux Kernel.
Signed-off-by: Roger Quadros
---
.../mtd/ti,gpmc-nand.yaml | 129 ++
1 file changed, 129 insertions(+)
create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
diff --git a/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
b/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
new file mode 100644
index 000..4ac198814b7
--- /dev/null
+++ b/doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
@@ -0,0 +1,129 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments GPMC NAND Flash controller.
+
+maintainers:
+ - Tony Lindgren
+ - Roger Quadros
+
+description:
+ GPMC NAND controller/Flash is represented as a child of the
+ GPMC controller node.
+
+properties:
+ compatible:
+items:
+ - enum:
+ - ti,am64-nand
+ - ti,omap2-nand
+
+ reg:
+maxItems: 1
+
+ interrupts:
+items:
+ - description: Interrupt for fifoevent
+ - description: Interrupt for termcount
+
+ "#address-cells": true
+
+ "#size-cells": true
+
+ ti,nand-ecc-opt:
+description: Desired ECC algorithm
+$ref: /schemas/types.yaml#/definitions/string
+enum: [sw, ham1, bch4, bch8, bch16]
+
+ ti,nand-xfer-type:
+description: Data transfer method between controller and chip.
+$ref: /schemas/types.yaml#/definitions/string
+enum: [prefetch-polled, polled, prefetch-dma, prefetch-irq]
+default: prefetch-polled
+
+ ti,elm-id:
+description:
+ phandle to the ELM (Error Location Module).
+$ref: /schemas/types.yaml#/definitions/phandle
+
+ nand-bus-width:
+description:
+ Bus width to the NAND chip
+$ref: /schemas/types.yaml#/definitions/uint32
+enum: [8, 16]
+default: 8
+
+ rb-gpios:
+description:
+ GPIO connection to R/B signal from NAND chip
+maxItems: 1
+
+patternProperties:
+ "@[0-9a-f]+$":
+$ref: "/schemas/mtd/partitions/partition.yaml"
+
+allOf:
+ - $ref: "/schemas/memory-controllers/ti,gpmc-child.yaml"
+
+required:
+ - compatible
+ - reg
+ - ti,nand-ecc-opt
+
+unevaluatedProperties: false
+
+examples:
+ - |
+#include
+#include
+
+gpmc: memory-controller@5000 {
+ compatible = "ti,am3352-gpmc";
+ dmas = <&edma 52 0>;
+ dma-names = "rxtx";
+ clocks = <&l3s_gclk>;
+ clock-names = "fck";
+ reg = <0x5000 0x2000>;
+ interrupts = ;
+ gpmc,num-cs = <7>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ranges = <0 0 0x0800 0x0100>; /* CS0 space. Min partition =
16MB */
+ nand@0,0 {
+compatible = "ti,omap2-nand";
+reg = <0 0 4>; /* device IO registers */
+interrupt-parent = <&gpmc>;
+interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+ <1 IRQ_TYPE_NONE>; /* termcount */
+ti,nand-xfer-type = "prefetch-dma";
+ti,nand-ecc-opt = "bch16";
+ti,elm-id = <&elm>;
+#address-cells = <1>;
+#size-cells = <1>;
+
+/* NAND generic properties */
+nand-bus-width = <8>;
+rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
+
+/* GPMC properties*/
+gpmc,device-width = <1>;
+
+partition@0 {
+ label = "NAND.SPL";
+ reg = <0x 0x0004>;
+};
+partition@1 {
+ label = "NAND.SPL.backup1";
+ reg = <0x0004 0x0004>;
+};
+ };
+};
--
2.34.1
[u-boot][PATCH v2 1/8] mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
The BCH detection hardware can generate ECC bytes for multiple
sectors in one go. Use that feature.
correct() only corrects one sector at a time so we need to call it
repeatedly for each sector.
Signed-off-by: Roger Quadros
Reviewed-by: Michael Trimarchi
---
drivers/mtd/nand/raw/omap_gpmc.c | 325 +--
1 file changed, 223 insertions(+), 102 deletions(-)
diff --git a/drivers/mtd/nand/raw/omap_gpmc.c b/drivers/mtd/nand/raw/omap_gpmc.c
index 69fc09be097..e772a914c88 100644
--- a/drivers/mtd/nand/raw/omap_gpmc.c
+++ b/drivers/mtd/nand/raw/omap_gpmc.c
@@ -27,6 +27,9 @@
#define BADBLOCK_MARKER_LENGTH 2
#define SECTOR_BYTES 512
+#define ECCSIZE0_SHIFT 12
+#define ECCSIZE1_SHIFT 22
+#define ECC1RESULTSIZE 0x1
#define ECCCLEAR (0x1 << 8)
#define ECCRESULTREG1 (0x1 << 0)
/* 4 bit padding to make byte aligned, 56 = 52 + 4 */
@@ -186,72 +189,35 @@ static int __maybe_unused omap_correct_data(struct
mtd_info *mtd, uint8_t *dat,
__maybe_unused
static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
{
- struct nand_chip*nand = mtd_to_nand(mtd);
- struct omap_nand_info *info = nand_get_controller_data(nand);
+ struct nand_chip *nand = mtd_to_nand(mtd);
+ struct omap_nand_info *info = nand_get_controller_data(nand);
unsigned int dev_width = (nand->options & NAND_BUSWIDTH_16) ? 1 : 0;
- unsigned int ecc_algo = 0;
- unsigned int bch_type = 0;
- unsigned int eccsize1 = 0x00, eccsize0 = 0x00, bch_wrapmode = 0x00;
- u32 ecc_size_config_val = 0;
- u32 ecc_config_val = 0;
- int cs = info->cs;
+ u32 val;
- /* configure GPMC for specific ecc-scheme */
- switch (info->ecc_scheme) {
- case OMAP_ECC_HAM1_CODE_SW:
- return;
- case OMAP_ECC_HAM1_CODE_HW:
- ecc_algo = 0x0;
- bch_type = 0x0;
- bch_wrapmode = 0x00;
- eccsize0 = 0xFF;
- eccsize1 = 0xFF;
+ /* Clear ecc and enable bits */
+ writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
+
+ /* program ecc and result sizes */
+ val = nand->ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) |
+ ECC1RESULTSIZE);
+ writel(val, &gpmc_cfg->ecc_size_config);
+
+ switch (mode) {
+ case NAND_ECC_READ:
+ case NAND_ECC_WRITE:
+ writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
break;
- case OMAP_ECC_BCH8_CODE_HW_DETECTION_SW:
- case OMAP_ECC_BCH8_CODE_HW:
- ecc_algo = 0x1;
- bch_type = 0x1;
- if (mode == NAND_ECC_WRITE) {
- bch_wrapmode = 0x01;
- eccsize0 = 0; /* extra bits in nibbles per sector */
- eccsize1 = 28; /* OOB bits in nibbles per sector */
- } else {
- bch_wrapmode = 0x01;
- eccsize0 = 26; /* ECC bits in nibbles per sector */
- eccsize1 = 2; /* non-ECC bits in nibbles per sector */
- }
- break;
- case OMAP_ECC_BCH16_CODE_HW:
- ecc_algo = 0x1;
- bch_type = 0x2;
- if (mode == NAND_ECC_WRITE) {
- bch_wrapmode = 0x01;
- eccsize0 = 0; /* extra bits in nibbles per sector */
- eccsize1 = 52; /* OOB bits in nibbles per sector */
- } else {
- bch_wrapmode = 0x01;
- eccsize0 = 52; /* ECC bits in nibbles per sector */
- eccsize1 = 0; /* non-ECC bits in nibbles per sector */
- }
+ case NAND_ECC_READSYN:
+ writel(ECCCLEAR, &gpmc_cfg->ecc_control);
break;
default:
- return;
+ printf("%s: error: unrecognized Mode[%d]!\n", __func__, mode);
+ break;
}
- /* Clear ecc and enable bits */
- writel(ECCCLEAR | ECCRESULTREG1, &gpmc_cfg->ecc_control);
- /* Configure ecc size for BCH */
- ecc_size_config_val = (eccsize1 << 22) | (eccsize0 << 12);
- writel(ecc_size_config_val, &gpmc_cfg->ecc_size_config);
-
- /* Configure device details for BCH engine */
- ecc_config_val = ((ecc_algo << 16) | /* HAM1 | BCHx */
- (bch_type << 12)| /* BCH4/BCH8/BCH16 */
- (bch_wrapmode << 8) | /* wrap mode */
- (dev_width << 7)| /* bus width */
- (0x0 << 4) | /* number of sectors */
- (cs << 1) | /* ECC CS */
- (0x1)); /* enable ECC */
- writel(ecc_config_val, &gpmc_cfg->ecc_config);
+
+ /* (ECC 16 or 8 bit col) | ( CS ) | ECC Enable */
+ val
[u-boot][PATCH v2 2/8] mtd: rawnand: nand_base: Allow base driver to be used in SPL without nand_bbt
nand_bbt.c is not being built with the nand_base driver during SPL
build. This results in build failures if we try to access any nand_bbt
related functions.
Don't use any nand_bbt functions for SPL build.
Signed-off-by: Roger Quadros
---
drivers/mtd/nand/raw/nand_base.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index bc61ad03eb0..9eba360d55f 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -447,7 +447,10 @@ static int nand_default_block_markbad(struct mtd_info
*mtd, loff_t ofs)
static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs)
{
struct nand_chip *chip = mtd_to_nand(mtd);
- int res, ret = 0;
+ int ret = 0;
+#ifndef CONFIG_SPL_BUILD
+ int res;
+#endif
if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) {
struct erase_info einfo;
@@ -465,12 +468,14 @@ static int nand_block_markbad_lowlevel(struct mtd_info
*mtd, loff_t ofs)
nand_release_device(mtd);
}
+#ifndef CONFIG_SPL_BUILD
/* Mark block bad in BBT */
if (chip->bbt) {
res = nand_markbad_bbt(mtd, ofs);
if (!ret)
ret = res;
}
+#endif
if (!ret)
mtd->ecc_stats.badblocks++;
@@ -517,7 +522,11 @@ static int nand_block_isreserved(struct mtd_info *mtd,
loff_t ofs)
if (!chip->bbt)
return 0;
/* Return info from the table */
+#ifndef CONFIG_SPL_BUILD
return nand_isreserved_bbt(mtd, ofs);
+#else
+ return 0;
+#endif
}
/**
@@ -543,7 +552,11 @@ static int nand_block_checkbad(struct mtd_info *mtd,
loff_t ofs, int allowbbt)
return chip->block_bad(mtd, ofs);
/* Return info from the table */
+#ifndef CONFIG_SPL_BUILD
return nand_isbad_bbt(mtd, ofs, allowbbt);
+#else
+ return 0;
+#endif
}
/**
@@ -3752,8 +3765,11 @@ static void nand_set_defaults(struct nand_chip *chip,
int busw)
chip->write_byte = busw ? nand_write_byte16 : nand_write_byte;
if (!chip->read_buf || chip->read_buf == nand_read_buf)
chip->read_buf = busw ? nand_read_buf16 : nand_read_buf;
+
+#ifndef CONFIG_SPL_BUILD
if (!chip->scan_bbt)
chip->scan_bbt = nand_default_bbt;
+#endif
if (!chip->controller) {
chip->controller = &chip->hwcontrol;
--
2.34.1
[u-boot][PATCH v2 0/8] rawnand: omap_gpmc: driver model support
Hi Michael & Dario,
This series adds driver model support for rawnand: omap_gpmc
and omap_elm drivers.
This will enable the driver to be used on K2/K3 platforms as well.
This series along with remaining patches required to get NAND working on
AM6x EVM is available here
https://github.com/rogerq/u-boot/commits/for-v2023.01/am64-nand-base-2.0
cheers,
-roger
Changelog:
v2:
- Fixed build warning and failures for am335x_guardian, chiliboard, and cm_t32
- use __maybe_unused struct nand_chip to fix build warning
- make elm_probe() a NOP if ELM_BASE is defined. This should not interfere
with existing platforms that don't use Driver Model for ELM driver.
Roger Quadros (8):
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
mtd: rawnand: nand_base: Allow base driver to be used in SPL without
nand_bbt
dt-bindings: mtd: Add ti,gpmc-nand DT binding documentation
mtd: rawnand: omap_gpmc: support u-boot driver model
mtd: rawnand: omap_gpmc: Add SPL NAND support
mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
dt-bindings: mtd: Add ti,elm DT binding documentation
mtd: rawnand: omap_elm: u-boot driver model support
doc/device-tree-bindings/mtd/ti,elm.yaml | 72 +++
.../mtd/ti,gpmc-nand.yaml | 129 +
drivers/mtd/nand/raw/Kconfig | 9 +-
drivers/mtd/nand/raw/Makefile | 2 +-
drivers/mtd/nand/raw/nand_base.c | 18 +-
drivers/mtd/nand/raw/omap_elm.c | 35 +-
.../mtd => drivers/mtd/nand/raw}/omap_elm.h | 6 +
drivers/mtd/nand/raw/omap_gpmc.c | 441 +-
8 files changed, 604 insertions(+), 108 deletions(-)
create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml
create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
--
2.34.1
Re: [PATCH] eficonfig: EFI_VARIABLE_APPEND_WRITE is not set for null key
Hi Ilias,
On Tue, 20 Dec 2022 at 15:56, Ilias Apalodimas
wrote:
>
> On Tue, Dec 20, 2022 at 12:12:56AM +0900, Masahisa Kojima wrote:
> > The signed null key with authenticated header is used to clear
> > the PK, KEK, db and dbx. When CONFIG_EFI_MM_COMM_TEE is enabled
> > (StMM and OP-TEE based RPMB storage is used as the EFI variable
> > storage), clearing KEK, db and dbx by enrolling a signed null
> > key does not work as expected if EFI_VARIABLE_APPEND_WRITE
> > attritube is set.
> >
> > This commit checks the selected file is null key, then
> > EFI_VARIABLE_APPEND_WRITE attibute will not be used for the null key.
> >
> > Signed-off-by: Masahisa Kojima
> > ---
> > cmd/eficonfig_sbkey.c | 40 ++--
> > 1 file changed, 38 insertions(+), 2 deletions(-)
> >
> > diff --git a/cmd/eficonfig_sbkey.c b/cmd/eficonfig_sbkey.c
> > index 6e0bebf1d4..bd2671bf8f 100644
> > --- a/cmd/eficonfig_sbkey.c
> > +++ b/cmd/eficonfig_sbkey.c
> > @@ -72,6 +72,30 @@ static bool file_have_auth_header(void *buf, efi_uintn_t
> > size)
> > return true;
> > }
> >
> > +/**
> > + * file_is_null_key() - check the file is an authenticated and signed null
> > key
> > + * @auth:pointer to the file
> > + * @size:file size
> > + * @null_key:pointer to store the result
> > + * Return: status code
> > + */
> > +static efi_status_t file_is_null_key(struct efi_variable_authentication_2
> > *auth,
> > + efi_uintn_t size, bool *null_key)
> > +{
> > + efi_status_t ret = EFI_SUCCESS;
> > +
> > + if (size < (sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength))
> > + return EFI_INVALID_PARAMETER;
> > +
> > + size -= (sizeof(auth->time_stamp) + auth->auth_info.hdr.dwLength);
> > + if (size == 0) /* No payload */
>
> s/size == 0/!size
OK.
Thank you for your review.
Regards,
Masahisa Kojima
>
> > + *null_key = true;
> > + else
> > + *null_key = false;
> > +
> > + return ret;
> > +}
> > +
> > /**
> > * eficonfig_process_enroll_key() - enroll key into signature database
> > *
> > @@ -84,6 +108,7 @@ static efi_status_t eficonfig_process_enroll_key(void
> > *data)
> > char *buf = NULL;
> > efi_uintn_t size;
> > efi_status_t ret;
> > + bool null_key = false;
> > struct efi_file_handle *f = NULL;
> > struct efi_device_path *full_dp = NULL;
> > struct eficonfig_select_file_info file_info;
> > @@ -149,13 +174,24 @@ static efi_status_t eficonfig_process_enroll_key(void
> > *data)
> > goto out;
> > }
> >
> > + ret = file_is_null_key((struct efi_variable_authentication_2 *)buf,
> > +size, &null_key);
> > + if (ret != EFI_SUCCESS) {
> > + eficonfig_print_msg("ERROR! Invalid file format.");
> > + goto out;
> > + }
> > +
> > attr = EFI_VARIABLE_NON_VOLATILE |
> > EFI_VARIABLE_BOOTSERVICE_ACCESS |
> > EFI_VARIABLE_RUNTIME_ACCESS |
> > EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS;
> >
> > - /* PK can enroll only one certificate */
> > - if (u16_strcmp(data, u"PK")) {
> > + /*
> > + * PK can enroll only one certificate.
> > + * The signed null key is used to clear KEK, db and dbx.
> > + * EFI_VARIABLE_APPEND_WRITE attribute must not be set in these cases.
> > + */
> > + if (u16_strcmp(data, u"PK") && !null_key) {
> > efi_uintn_t db_size = 0;
> >
> > /* check the variable exists. If exists, add APPEND_WRITE
> > attribute */
> > --
> > 2.17.1
> >
>
> Reviewed-by: Ilias Apalodimas
>
[PATCH v1] pinctrl: nuvoton: add NPCM7xx/NPCM8xx reset type detect
add reset type detect and persist setting.
Signed-off-by: Jim Liu
---
arch/arm/include/asm/arch-npcm8xx/rst.h | 2 +-
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 20
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 22 +-
3 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-npcm8xx/rst.h
b/arch/arm/include/asm/arch-npcm8xx/rst.h
index 379e841fca..09e1485063 100644
--- a/arch/arm/include/asm/arch-npcm8xx/rst.h
+++ b/arch/arm/include/asm/arch-npcm8xx/rst.h
@@ -16,7 +16,7 @@
#define SW1RST BIT(28)
#define SW2RST BIT(27)
#define SW3RST BIT(26)
-#define SW4RST BIT(25)
+#define TIPRST BIT(25)
#define WD1RST BIT(24)
#define WD2RST BIT(23)
#define RST_STS_MASK GENMASK(31, 23)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index 31678f5537..1ad8bfbd88 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -47,6 +47,10 @@
#define WD0RST BIT(29)
#define WD1RST BIT(24)
#define WD2RST BIT(23)
+#define SWRST1 BIT(28)
+#define SWRST2 BIT(27)
+#define SWRST3 BIT(26)
+#define SW4RST BIT(25)
#define GPIOX_MODULE_RESET 16
#define CA9C_RESET BIT(0)
@@ -1374,6 +1378,14 @@ static bool is_gpio_persist(struct udevice *dev, u8 bank)
regmap_read(priv->rst_regmap, NPCM7XX_RST_WD1RCR, &tmp);
else if (value & WD2RST)
regmap_read(priv->rst_regmap, NPCM7XX_RST_WD2RCR, &tmp);
+ else if (value & SWRST1)
+regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, &tmp);
+ else if (value & SWRST2)
+regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, &tmp);
+ else if (value & SWRST3)
+regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, &tmp);
+ else if (value & SW4RST)
+regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, &tmp);
else
return false;
@@ -1392,11 +1404,19 @@ static int npcm7xx_gpio_reset_persist(struct udevice
*dev, unsigned int banknum,
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR,
BIT(num), 0);
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR,
BIT(num), 0);
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC,
BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC1,
BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC2,
BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC3,
BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC4,
BIT(num), 0);
} else {
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC1,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC2,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC3,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC4,
BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
}
return 0;
diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
index c6ffa89f77..0ec47e9577 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
@@ -20,7 +20,7 @@
#define SWRSTC10x44
#define SWRSTC20x48
#define SWRSTC30x4c
-#define SWRSTC40x50
+#define TIPRSTC0x50
#define CORSTC 0x5c
#define FLOCKR10x74
#define INTCR4 0xc0
@@ -772,6 +772,10 @@ static int npcm8xx_gpio_reset_persist(struct udevice *dev,
uint bank,
regmap_update_bits(priv->rst_regmap, WD1RCR, BIT(offset), 0);
regmap_update_bits(priv->rst_regmap, WD2RCR, BIT(offset), 0);
regmap_update_bits(priv->rst_regmap, CORSTC, BIT(offset), 0);
+ regmap_update_bits(priv->rst_regmap, SWRSTC1, BIT(offset), 0);
+ regmap_update_bits(priv->rst_regmap, SWRSTC2, BIT(offset), 0);
+
Re: [PATCH] arm64: zynqmp: Remove unused snps,refclk_fladj property
On 12/12/22 15:27, Michal Simek wrote:
The commit c55ac51a550c ("usb: dwc3: Program GFLADJ") hopefully fixed
issues around fladj logic. This DT property was used in Xilinx stack only
that's why remove because it is not needed anymore.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 34504a8cbb92..0a06c73390b2 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -870,7 +870,6 @@
interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
- snps,refclk_fladj;
clock-names = "ref";
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
@@ -902,7 +901,6 @@
interrupts = <0 70 4>, <0 74 4>, <0 76 4>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
- snps,refclk_fladj;
clock-names = "ref";
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
Applied.
M
Re: [PATCH 1/2] arm64: zynqmp: Describe TI phy as ethernet phy ID on ZCU102 RevB & up
On 12/12/22 15:14, Michal Simek wrote:
From: Harini Katakam
TI phy requires a reset before PHY address detection to make sure
correct strapping via MIO is detected. Facilitate the same using
ethernet-phy-id compatible string. GPIO reset entry will be added in
a separate commit.
This support is present in RevA but needs to be extended to RevB/1.0/1.1
versions which are built on top.
Fixes: 13622c7a9dfa ("arm64: zynqmp: Describe TI phy as ethernet-phy-id")
Signed-off-by: Harini Katakam
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu102-revB.dts | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts
b/arch/arm/dts/zynqmp-zcu102-revB.dts
index 2422558b7484..b2f0b1133175 100644
--- a/arch/arm/dts/zynqmp-zcu102-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revB.dts
@@ -16,16 +16,20 @@
&gem3 {
phy-handle = <&phyc>;
- phyc: ethernet-phy@c {
- reg = <0xc>;
- ti,rx-internal-delay = <0x8>;
- ti,tx-internal-delay = <0xa>;
- ti,fifo-depth = <0x1>;
- ti,dp83867-rxctrl-strap-quirk;
- /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+ mdio: mdio {
+ phyc: ethernet-phy@c {
+ #phy-cells = <0x1>;
+ compatible = "ethernet-phy-id2000.a231";
+ reg = <0xc>;
+ ti,rx-internal-delay = <0x8>;
+ ti,tx-internal-delay = <0xa>;
+ ti,fifo-depth = <0x1>;
+ ti,dp83867-rxctrl-strap-quirk;
+ /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+ };
+ /* Cleanup from RevA */
+ /delete-node/ ethernet-phy@21;
};
- /* Cleanup from RevA */
- /delete-node/ ethernet-phy@21;
};
/* Fix collision with u61 */
Applied both.
M
Re: [PATCH] arm64: zynqmp: Remove unused USB DT properties
On 12/12/22 15:06, Michal Simek wrote:
xlnx,usb-polarity, xlnx,usb-reset-mode and snps,mask_phy_reset are not
documented in dt binding and also there is no code associated with them
that's why remove them.
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-dlc21-revA.dts | 4
arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 2 --
arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4
arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4
arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4
arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 4
6 files changed, 22 deletions(-)
diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts
b/arch/arm/dts/zynqmp-dlc21-revA.dts
index 0461219ca3e7..bf0d89a5fcbe 100644
--- a/arch/arm/dts/zynqmp-dlc21-revA.dts
+++ b/arch/arm/dts/zynqmp-dlc21-revA.dts
@@ -154,8 +154,6 @@
&usb0 {
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_0 {
@@ -170,8 +168,6 @@
&usb1 {
status = "disabled"; /* Any unknown issue with USB-C */
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
index e00428351cbf..02d2427809d5 100644
--- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
@@ -303,8 +303,6 @@
&usb0 { /* USB0 MIO52-63 */
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_0 {
diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
index 1fa023ffb13c..2d7fe592c8f9 100644
--- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
@@ -461,8 +461,6 @@
&usb0 {
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_0 {
@@ -474,8 +472,6 @@
&usb1 {
status = "disabled"; /* not at mem board */
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
index 2271a6a49065..e46748d32c03 100644
--- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
@@ -463,8 +463,6 @@
&usb0 {
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_0 {
@@ -476,8 +474,6 @@
&usb1 {
status = "disabled"; /* not at mem board */
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
index a89046a818fd..f564817e2c84 100644
--- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
@@ -457,8 +457,6 @@
&usb0 {
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_0 {
@@ -470,8 +468,6 @@
&usb1 {
status = "disabled"; /* not at mem board */
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
index b3fe42faeee8..d63deb83e3c6 100644
--- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -543,8 +543,6 @@
&usb0 {
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
phy-names = "usb3-phy";
phys = <&psgtr 1 PHY_TYPE_USB3 0 1>;
};
@@ -559,8 +557,6 @@
&usb1 {
status = "okay";
- xlnx,usb-polarity = <0>;
- xlnx,usb-reset-mode = <0>;
};
&dwc3_1 {
Applied.
M
Re: Converting to DM SERIAL for Kirkwood boards
On Tuesday 20 December 2022 07:20:15 Stefan Roese wrote:
> Hi Tony,
>
> On 12/20/22 02:36, Tony Dinh wrote:
> > Hi Stefan,
> >
> > On Mon, Dec 19, 2022 at 4:06 PM Tony Dinh wrote:
> > >
> > > Hi Stefan,
> > >
> > > On Mon, Dec 19, 2022 at 1:22 PM Tony Dinh wrote:
> > > >
> > > > Hi Stefan,
> > > >
> > > > On Sun, Dec 18, 2022 at 11:29 PM Stefan Roese wrote:
> > > > >
> > > > > Hi Tony,
> > > > >
> > > > > On 12/19/22 07:17, Stefan Roese wrote:
> > > > >
> > > > >
> > > > >
> > > > > > > git checkout 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3
> > > > > > > Previous HEAD position was 3b44b3fdf2 arm: mvebu: Add support for
> > > > > > > programming LD0 and LD1 eFuse
> > > > > > > HEAD is now at 37bb396669 timer: orion-timer: Only init timer once
> > > > > > >
> > > > > > > This is where the Pogo V4 was frozen during boot. Among the
> > > > > > > Kirkwood
> > > > > > > boards that I have and used for testing, it is the only one that
> > > > > > > has
> > > > > > > CONFIG_BOOTSTAGE=y.
> > > > > >
> > > > > > Thanks for testing and git bi-secting.
> > > > > >
> > > > > > > Should I create a new post for would like to continue this topic
> > > > > > > here
> > > > > > > in this thread?
> > > > > >
> > > > > > Let me check, if I can find the root cause and this problem
> > > > > > quickly. If
> > > > > > not, then we should probably disable CONFIG_BOOTSTAGE on the Pogo
> > > > > > v4 for
> > > > > > a short while until we've fixed this issue.
> > > > >
> > > > > I fail to spot the problem with this small commit 37bb396669b27a. I
> > > > > can
> > > > > also not reproduce this on my Armada XP board - it uses SPL though,
> > > > > this
> > > > > might make a difference.
> > > > >
> > > > > Could you perhaps apply this attached debug patch and make sure, that
> > > > > you have DEBUG_UART enabled in your Pogo v4 config. And boot into the
> > > > > resulting image.
> > > >
> > > > Here is the kwboot log with DEBUG_UART. Note that number 322322 below
> > > > is part of the log.
> > > >
> > > > 322322
> > > >
> > > > U-Boot 2023.01-rc3-00057-g9bd3d354a1-dirty (Dec 19 2022 - 01:29:21
> > > > -0800)
> > > > Pogoplug V4
> > > >
> > > > SoC: Kirkwood 88F6281_A1
> > > > Model: Cloud Engines PogoPlug Series 4
> > > > DRAM: 128 MiB
> > > > 322322322Core: 19 devices, 15 uclasses, devicetree: separate
> > > > NAND: 4
> > > >
> > >
> > > Going a bit further with your debug patch, I've added more prints.
> > >
> > > static void orion_timer_init(void *base, enum input_clock_type type)
> > > {
> > > /* Only init the timer once */
> > > - if (early_init_done)
> > > + if (early_init_done) {
> > > + printch('6'); // test-only
> > > return;
> > > + }
> > >
> > > And the boot log below shows somehow the early_init_done is already
> > > true by the time the orion_timer_init is called. Pretty weird, to say
> > > the least!
> > >
> > > --BEGIN LOG--
> > > 3262632626
> > >
> > > U-Boot 2023.01-rc4-dirty (Dec 19 2022 - 15:35:26 -0800)
> > > Pogoplug V4
> > >
> > > SoC: Kirkwood 88F6281_A1
> > > Model: Cloud Engines PogoPlug Series 4
> > > DRAM: 128 MiB
> > > 326263262632626Core: 19 devices, 15 uclasses, devicetree: separate
> > > NAND: 456
> > > --END LOG--
> > >
> >
> > I tried this change in drivers/timer/orion-timer.c and it seems to
> > work consistently.
> >
> > -static bool early_init_done __section(".data") = false;
> > +static bool early_init_done = false;
> >
> > I still can't see why it would make a difference. Why does the
> > __section macro not work? does the reallocation timing have anything
> > to do with this variable being of the wrong value?
>
> Hmmm, so we might have a problem with memory being overwritten? You
> should perhaps where the sections (especially data) are located and
> where the stack etc is located. I suggest to also enable DEBUG in
> board_f/c.c to see a bit more of the addresses being used.
>
> Thanks,
> Stefan
Maybe similar issue as with mbus or atsha?
https://lore.kernel.org/u-boot/20220810124609.5765-1-p...@kernel.org/
https://lore.kernel.org/u-boot/20220408143015.23163-2-p...@kernel.org/
static variables do not work correctly _before_ u-boot relocation. You
should avoid usage global OR static variables in code which may be
called before relocation. And on some boards are all global, static and
bss variables read-only (those which use execute-in-place, e.g. ppc
flash).
