Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2

2022-12-21 Thread Pali Rohár
On Wednesday 21 December 2022 21:54:15 Tom Rini wrote:
> On Fri, Dec 16, 2022 at 10:56:39PM +0100, Pali Rohár wrote:
> > On Friday 05 August 2022 16:21:24 Pali Rohár wrote:
> > > Broken is also commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2. Seems
> > > that all kconfig migration changes done after that commit are broken.
> > > 
> > > I really do not have energy to investigate what and how was broken due
> > > to incorrect kconfig migration.
> > > 
> > > 
> > > I did simple test. Applied following change:
> > > 
> > > diff --git a/include/configs/p1_p2_rdb_pc.h 
> > > b/include/configs/p1_p2_rdb_pc.h
> > > index a6523753d5ca..489f24df0ab1 100644
> > > --- a/include/configs/p1_p2_rdb_pc.h
> > > +++ b/include/configs/p1_p2_rdb_pc.h
> > > @@ -624,3 +624,7 @@ __stringify(__PCIE_RST_CMD)"\0"
> > >  "bootm $norbootaddr - $norfdtaddr"
> > >  
> > >  #endif /* __CONFIG_H */
> > > +
> > > +#ifdef CONFIG_SDCARD
> > > +#error
> > > +#endif
> > > 
> > > And then called:
> > > 
> > > make CROSS_COMPILE=powerpc-linux-gnuspe- P2020RDB-PC_defconfig u-boot.bin
> > > 
> > > And it failed, even when this defconfig file is not SD card builds.
> > 
> > Tom, that commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 is yours.
> > Could you please look at it? Because it is a regressions which made P1
> > and P2 broken. Based on the past experience it really does not make
> > sense to wait for somebody who promised to do something as same
> > situation is just repeating.
> > 
> > Above diff is a simple check to verify if code conversion is correct or
> > not. If _before_ conversion CONFIG_SDCARD was not defined then also
> > _after_ conversion this macro must not be defined. Right?
> 
> I dug through all of this again. I thought I understood what the right
> answer was again for a moment, but I don't. You, however, understand
> what platforms don't use PBL and what they use instead. I understand
> half of the fix, which is to change:
> choice
> prompt "Freescale PBL load location"
> depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \
> || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || 
> TARGET_P2020RDB) \
> && !CMD_NAND)
> 
> To, I think:
> choice
> prompt "Freescale PBL load location"
> depends on RAMBOOT_PBL
> 
> Then introduce some new, not "SDCARD" symbol, for the P1/P2 platforms
> that don't use PBL but instead the FSL_PREPBL_ESDHC_BOOT_SECTOR logic
> you introduced before.

P2020RDB-PC_defconfig is for booting from FLASH NOR, not from SD card.
CONFIG_SDCARD for P1/P2 must be defined when booting from SD card.

Before commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 everything worked
fine and CONFIG_SDCARD was not defined for P2020RDB-PC_defconfig. After
commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2, symbol CONFIG_SDCARD is
defined.

You can check it by adding into config.h:

+#ifdef CONFIG_SDCARD
+#error
+#endif

> I say I almost thought I had it because I thought this would work:
> diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig 
> b/arch/powerpc/cpu/mpc85xx/Kconfig
> index 24d3f1f20c25..59740b173b11 100644
> --- a/arch/powerpc/cpu/mpc85xx/Kconfig
> +++ b/arch/powerpc/cpu/mpc85xx/Kconfig
> @@ -15,7 +15,7 @@ config CMD_ERRATA
>  config FSL_PREPBL_ESDHC_BOOT_SECTOR
>   bool "Generate QorIQ pre-PBL eSDHC boot sector"
>   depends on MPC85xx
> - depends on SDCARD
> + depends on TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB

No, original code was OK. As is written in description
FSL_PREPBL_ESDHC_BOOT_SECTOR is for writing bootsector to SD card. And
it is optional as there is other way how to generate it, as described in
some doc/ file.

But if you choose to compile u-boot for P2020RDB-PC_defconfig (NOR
FLASH) then there is no SD card booting and hence
FSL_PREPBL_ESDHC_BOOT_SECTOR for P2020RDB-PC_defconfig must never be
generated. So FSL_PREPBL_ESDHC_BOOT_SECTOR must depends on SDCARD.

>   help
> With this option final image would have prepended QorIQ pre-PBL eSDHC
> boot sector suitable for SD card images. This boot sector instruct
> diff --git a/boot/Kconfig b/boot/Kconfig
> index 4a001bcee851..d1c9c5f25067 100644
> --- a/boot/Kconfig
> +++ b/boot/Kconfig
> @@ -725,8 +725,7 @@ config RAMBOOT_PBL
>  
>  choice
>   prompt "Freescale PBL load location"
> - depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \
> - || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) 
> \
> + depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB) \
>   && !CMD_NAND)
>  
>  config SDCARD
> 
> But no one enables CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR.

It is optional _user_ symbol. During compilation of sd card version of
u-boot, user can enable it.

For turris 1.x board there is waiting patch on the list which uses it.
No review yet?

> But maybe that
> just needs to be enabled on the platforms in question, and then the
> first dependency change above 

Re: [PATCH] riscv: ae350: Support openSBI 1.0+ which enable FW_PIC

2022-12-21 Thread Bin Meng
On Thu, Dec 22, 2022 at 1:23 PM Rick Chen  wrote:
>
> Hi Bin,
>
> > On Wed, Dec 21, 2022 at 10:29 AM Rick Chen  wrote:
> > >
> > > Change openSBI load address from 0x100 to 0x0 and it
> >
> > nits: OpenSBI
>
> OK, will fix it.
>
> >
> > > will start to run at 0x0 directly without relocation.
> > >
> > > Signed-off-by: Rick Chen 
> > > ---
> > >  board/AndesTech/ax25-ae350/Kconfig | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/board/AndesTech/ax25-ae350/Kconfig 
> > > b/board/AndesTech/ax25-ae350/Kconfig
> > > index 36b67f0b52..4bb33b0793 100644
> > > --- a/board/AndesTech/ax25-ae350/Kconfig
> > > +++ b/board/AndesTech/ax25-ae350/Kconfig
> > > @@ -25,7 +25,7 @@ config SPL_TEXT_BASE
> > > default 0x80
> > >
> > >  config SPL_OPENSBI_LOAD_ADDR
> > > -   default 0x0100
> > > +   default 0x
> > >
> > >  config SYS_FDT_BASE
> > > hex
> > > --
> >
> > Can you describe why is this change a must have, like why 0x0100
> > does not work?
>
> When I prepare this patch, I have tried two OpenSBI address, 0x100 and 
> 0x0.
> And both boot successfully. I think maybe the Kernel Image is smaller
> one that it just don't overlap
> the memory region !

But why 0x0100 does not work?

Regards,
Bin


[PATCH] riscv: bypass malloc when spl fit boots from ram

2022-12-21 Thread Rick Chen
When fit image boots from ram, the payload will
be prepared in the address of SPL_LOAD_FIT_ADDRESS.
In spl fit generic flow, it will malloc another
memory address and copy whole fit image to this
malloc address.  But it is un-necessary for booting
from RAM.

This patch improves this flow by declare the
board_spl_fit_buffer_addr() to replace the original one.
The larger image size (eq: Kernel Image 10~20MB), it
can save more booting time.

Also enhance memcpy function by checking source and
destination address. If they are the same address,
just return and don't copy data anymore.

Signed-off-by: Rick Chen 
---
 arch/riscv/lib/memcpy.S |  2 ++
 arch/riscv/lib/spl.c| 16 
 2 files changed, 18 insertions(+)

diff --git a/arch/riscv/lib/memcpy.S b/arch/riscv/lib/memcpy.S
index 00672c19ad..9884077c93 100644
--- a/arch/riscv/lib/memcpy.S
+++ b/arch/riscv/lib/memcpy.S
@@ -9,6 +9,7 @@
 /* void *memcpy(void *, const void *, size_t) */
 ENTRY(__memcpy)
 WEAK(memcpy)
+   beq a0, a1, .copy_end
/* Save for return value */
mv  t6, a0
 
@@ -121,6 +122,7 @@ WEAK(memcpy)
 2:
 
mv  a0, t6
+.copy_end:
ret
 
 .Lmisaligned_word_copy:
diff --git a/arch/riscv/lib/spl.c b/arch/riscv/lib/spl.c
index f4d3b67e5d..18f86ee207 100644
--- a/arch/riscv/lib/spl.c
+++ b/arch/riscv/lib/spl.c
@@ -61,3 +61,19 @@ void __noreturn jump_to_image_no_args(struct spl_image_info 
*spl_image)
 #endif
image_entry(gd->arch.boot_hart, fdt_blob);
 }
+
+#ifdef CONFIG_SPL_RAM_SUPPORT
+struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size)
+{
+   return (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + offset);
+}
+
+void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len)
+{
+   void *buf;
+
+   buf = spl_get_load_buffer(0, sectors * bl_len);
+
+   return buf;
+}
+#endif
-- 
2.17.1



Re: [PATCH] Makefile: add -W for BINMAN_ALLOW_MISSING

2022-12-21 Thread Nikita Shubin
Hello Tom!

On Mon, 19 Dec 2022 08:36:30 -0500
Tom Rini  wrote:

> On Mon, Dec 19, 2022 at 11:21:45AM +0300, Nikita Shubin wrote:
> > Hello Tom and Simon!
> > 
> > On Sat, 17 Dec 2022 14:38:30 -0700
> > Simon Glass  wrote:
> >   
> > > +Tom Rini
> > > 
> > > We do actually want to report the failure, since it means that the
> > > image will not function. This was a recent change requested by a
> > > few people.  
> > 
> > It doesn't make sense to me - if i am passing "--allow-missing" than
> > binman shouldn't fail drastically, cause i literally told him "It's
> > okay if files are missing". What purpose does it have now, it we
> > are failing regardless we are providing this flag or not ?
> > 
> > This breaks old behaviour by the way, when passing "--allow-missing"
> > for missing blobs produced a warning instead of error.
> >   
> > > 
> > > Note that buildman looks for the message 'Some images are
> > > invalid' and either returning 103, or 0 if -W is given.
> > > 
> > > There is no attempt to produce a special exit code from the
> > > Makefile. It generally returns 2 (as per 'man make'), which is
> > > why buildman has this extra processing.  
> > 
> > Well, there are only 3 codes for make and 2 indicates any failure:
> > 
> > "A status of two will be returned if any errors were encountered."
> > (c)
> > 
> > This new behaviour looks the same with or without
> > BINMAN_ALLOW_MISSING flag from top point of view:
> > 
> > With BINMAN_ALLOW_MISSING=1:
> > Some images are invalid
> > make[1]: *** [Makefile:1114: .binman_stamp] Error 103
> > make[1]: Leaving directory '/home/maquefel/workshop/overlord/u-boot'
> > make: *** [Makefile:271: u-boot/u
> > 
> > $ echo $?
> > 2-boot-nodtb.bin] Error 2
> > 
> > Without BINMAN_ALLOW_MISSING:
> > 
> > binman: Filename 'fw_dynamic.bin' not found in input path
> > (.,.,./board/syntacore/scr7_elct,arch/riscv/dts)
> > (cwd='/home/maquefel/workshop/overlord/u-boot') make[1]: ***
> > [Makefile:1114: .binman_stamp] Error 1 make[1]: Leaving directory
> > '/home/maquefel/workshop/overlord/u-boot' make: *** [Makefile:271:
> > u-boot/u-boot-nodtb.bin] Error 2
> > 
> > $ echo $?
> > 2
> > 
> > So that's the difference if build is failing either way ?  
> 
> So, with what is in master right now, BINMAN_ALLOW_MISSING=1 should
> work as intended, while it did not at its introduction.  Please
> confirm if your use cases work now, or not. 

They don't actually, a few iterations ago i didn't even needed
BINMAN_ALLOW_MISSING (now it's clear for me that i never needed it), as
make produced only a warning and not a error.

I have kernel and ramdisk sections in my binman file and FIT image is
fully functional even if they are missing.

And now there is no way to tell u-boot not to fail if some blobs are
missing.

> The problem we needed to
> solve was the one that by default previously, you could run "make
> fooboard_config all", not have BL31/etc available, get a warning
> printed and a zero exit code, leading to non-obvious failures if you
> build indirectly (buildroot, yocto/OE, etc).
> 

May be they shouldn't use BINMAN_ALLOW_MISSING when building u-boot at
all then ?

Or can we, at least, have some BINMAN_REALLY_ALLOW_MISSING option or
simply passing some flags with BINMAN_OPTS for example ?

Through:
  -W, --ignore-missing  Return success even if there are missing
blobs/bintools (requires -M)

seems to have really good synergy with:

 -M, --allow-missing   Allow external blobs and bintools to be
 missing

For BINMAN_ALLOW_MISSING.

Yours,
Nikita Shubin.





Re: [PATCH v1 01/17] riscv: cpu: jh7110: Add support for jh7110 SoC

2022-12-21 Thread Rick Chen
> From: Yanhong Wang 
> Sent: Monday, December 12, 2022 10:50 AM
> To: u-boot@lists.denx.de; Rick Jian-Zhi Chen(陳建志) ; Leo 
> Yu-Chi Liang(梁育齊) ; Lukasz Majewski ; 
> Sean Anderson 
> Cc: Lee Kuan Lim ; Jianlong Huang 
> ; Emil Renner Berthing ; 
> Yanhong Wang 
> Subject: [PATCH v1 01/17] riscv: cpu: jh7110: Add support for jh7110 SoC
>
> Add StarFive JH7110 SoC to support RISC-V arch.
>
> Signed-off-by: Yanhong Wang 
> ---
>  arch/riscv/cpu/jh7110/Makefile| 10 
>  arch/riscv/cpu/jh7110/cpu.c   | 23 
>  arch/riscv/cpu/jh7110/dram.c  | 38 +
>  arch/riscv/cpu/jh7110/spl.c   | 56 +++
>  .../include/asm/arch-jh7110/jh7110-regs.h | 20 +++
>  arch/riscv/include/asm/arch-jh7110/spl.h  | 13 +
>  6 files changed, 160 insertions(+)

Reviewed-by: Rick Chen 


Re: [PATCH] riscv: ae350: Support openSBI 1.0+ which enable FW_PIC

2022-12-21 Thread Rick Chen
Hi Bin,

> On Wed, Dec 21, 2022 at 10:29 AM Rick Chen  wrote:
> >
> > Change openSBI load address from 0x100 to 0x0 and it
>
> nits: OpenSBI

OK, will fix it.

>
> > will start to run at 0x0 directly without relocation.
> >
> > Signed-off-by: Rick Chen 
> > ---
> >  board/AndesTech/ax25-ae350/Kconfig | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/board/AndesTech/ax25-ae350/Kconfig 
> > b/board/AndesTech/ax25-ae350/Kconfig
> > index 36b67f0b52..4bb33b0793 100644
> > --- a/board/AndesTech/ax25-ae350/Kconfig
> > +++ b/board/AndesTech/ax25-ae350/Kconfig
> > @@ -25,7 +25,7 @@ config SPL_TEXT_BASE
> > default 0x80
> >
> >  config SPL_OPENSBI_LOAD_ADDR
> > -   default 0x0100
> > +   default 0x
> >
> >  config SYS_FDT_BASE
> > hex
> > --
>
> Can you describe why is this change a must have, like why 0x0100
> does not work?

When I prepare this patch, I have tried two OpenSBI address, 0x100 and 0x0.
And both boot successfully. I think maybe the Kernel Image is smaller
one that it just don't overlap
the memory region !

Thanks,
Rick

>
> Is the reason the same as commit cb052d771200b15717eeb68f185cf7caa2dcfea0
> "riscv: qemu: spl: Fix booting Linux kernel with OpenSBI 1.0+"
>
> Regards,
> Bin


[PATCH] cmd: mmc: Expand bkops handling

2022-12-21 Thread Marek Vasut
Add more capable "bkops" command which allows enabling and disabling both
manual and automatic bkops. The existing 'mmc bkops-enable' subcommand is
poorly named to cover all the possibilities, hence the new-ish subcommand.
Note that both commands are wrappers around the same common code.

Signed-off-by: Marek Vasut 
---
Cc: Jaehoon Chung 
Cc: Peng Fan 
---
 cmd/mmc.c | 49 +++
 drivers/mmc/mmc.c | 14 +-
 include/mmc.h |  2 +-
 3 files changed, 51 insertions(+), 14 deletions(-)

diff --git a/cmd/mmc.c b/cmd/mmc.c
index c79d9407986..94deb9a1686 100644
--- a/cmd/mmc.c
+++ b/cmd/mmc.c
@@ -1020,16 +1020,12 @@ static int do_mmc_setdsr(struct cmd_tbl *cmdtp, int 
flag,
 }
 
 #ifdef CONFIG_CMD_BKOPS_ENABLE
-static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag,
-  int argc, char *const argv[])
+static int mmc_bkops_common(char *device, bool autobkops, bool enable)
 {
-   int dev;
struct mmc *mmc;
+   int dev;
 
-   if (argc != 2)
-   return CMD_RET_USAGE;
-
-   dev = dectoul(argv[1], NULL);
+   dev = dectoul(device, NULL);
 
mmc = init_mmc_device(dev, false);
if (!mmc)
@@ -1040,7 +1036,41 @@ static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, 
int flag,
return CMD_RET_FAILURE;
}
 
-   return mmc_set_bkops_enable(mmc);
+   return mmc_set_bkops_enable(mmc, autobkops, enable);
+}
+
+static int do_mmc_bkops(struct cmd_tbl *cmdtp, int flag,
+   int argc, char * const argv[])
+{
+   bool autobkops, enable;
+
+   if (argc != 4)
+   return CMD_RET_USAGE;
+
+   if (!strcmp(argv[2], "manual"))
+   autobkops = false;
+   else if (!strcmp(argv[2], "auto"))
+   autobkops = true;
+   else
+   return CMD_RET_FAILURE;
+
+   if (!strcmp(argv[3], "disable"))
+   enable = false;
+   else if (!strcmp(argv[3], "enable"))
+   enable = true;
+   else
+   return CMD_RET_FAILURE;
+
+   return mmc_bkops_common(argv[1], autobkops, enable);
+}
+
+static int do_mmc_bkops_enable(struct cmd_tbl *cmdtp, int flag,
+  int argc, char * const argv[])
+{
+   if (argc != 2)
+   return CMD_RET_USAGE;
+
+   return mmc_bkops_common(argv[1], false, true);
 }
 #endif
 
@@ -1102,6 +1132,7 @@ static struct cmd_tbl cmd_mmc[] = {
U_BOOT_CMD_MKENT(setdsr, 2, 0, do_mmc_setdsr, "", ""),
 #ifdef CONFIG_CMD_BKOPS_ENABLE
U_BOOT_CMD_MKENT(bkops-enable, 2, 0, do_mmc_bkops_enable, "", ""),
+   U_BOOT_CMD_MKENT(bkops, 4, 0, do_mmc_bkops, "", ""),
 #endif
 };
 
@@ -1188,6 +1219,8 @@ U_BOOT_CMD(
 #ifdef CONFIG_CMD_BKOPS_ENABLE
"mmc bkops-enable  - enable background operations handshake on 
device\n"
"   WARNING: This is a write-once setting.\n"
+   "mmc bkops  [auto|manual] [enable|disable]\n"
+   " - configure background operations handshake on device\n"
 #endif
);
 
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 210703ea46b..afbc497b12c 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -3127,9 +3127,10 @@ int mmc_init_device(int num)
 #endif
 
 #ifdef CONFIG_CMD_BKOPS_ENABLE
-int mmc_set_bkops_enable(struct mmc *mmc)
+int mmc_set_bkops_enable(struct mmc *mmc, bool autobkops, bool enable)
 {
int err;
+   u32 bit = autobkops ? BIT(1) : BIT(0);
ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 
err = mmc_send_ext_csd(mmc, ext_csd);
@@ -3143,18 +3144,21 @@ int mmc_set_bkops_enable(struct mmc *mmc)
return -EMEDIUMTYPE;
}
 
-   if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
+   if (enable && (ext_csd[EXT_CSD_BKOPS_EN] & bit)) {
puts("Background operations already enabled\n");
return 0;
}
 
-   err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
+   err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN,
+enable ? bit : 0);
if (err) {
-   puts("Failed to enable manual background operations\n");
+   printf("Failed to %sable manual background operations\n",
+  enable ? "en" : "dis");
return err;
}
 
-   puts("Enabled manual background operations\n");
+   printf("%sabled %s background operations\n",
+  enable ? "En" : "Dis", autobkops ? "auto" : "manual");
 
return 0;
 }
diff --git a/include/mmc.h b/include/mmc.h
index 571fa625d02..e116e78f343 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -893,7 +893,7 @@ int mmc_rpmb_route_frames(struct mmc *mmc, void *req, 
unsigned long reqlen,
  void *rsp, unsigned long rsplen);
 
 #ifdef CONFIG_CMD_BKOPS_ENABLE
-int mmc_set_bkops_enable(struct mmc *mmc);
+int mmc_set_bkops_enable(struct mmc *mmc, bool autobkops, 

Re: [PATCH 10/10] arm: imx: imx8m: Add basic PSCI provider implementation

2022-12-21 Thread Marek Vasut

On 12/22/22 04:05, Adam Ford wrote:

On Wed, Dec 21, 2022 at 6:47 PM Marek Vasut  wrote:


Implement basic PSCI provider to let OS turn CPU cores off and on,
power off and restart the system and determine PSCI version. This
is sufficient to remove the need for the ATF BL31 blob altogether.

To make use of this functionality, active the following Kconfig options:
   # CONFIG_PSCI_RESET is not set
   CONFIG_ARMV8_MULTIENTRY=y
   CONFIG_ARMV8_SET_SMPEN=y
   CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
   CONFIG_ARMV8_EA_EL3_FIRST=y
   CONFIG_ARMV8_PSCI=y
   CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
   CONFIG_ARMV8_SECURE_BASE=0x97


  I am guessing 0x97 was for the 8MP based on the previous location
of ATF.  Is that true?   If that's the case, can I assume that this
address would be  0x91, 0x92 and 0x96 for the imx8mq,
imx8mm and imx8mn respectively?


It was for MX8MP, but you can pick whichever address you want, since it 
is U-Boot that installs the SMC handlers, you are no longer forced to 
somehow try and accommodate custom not well fitting load address picked 
by some 3rd party binary blob.


Re: [PATCH 10/10] arm: imx: imx8m: Add basic PSCI provider implementation

2022-12-21 Thread Adam Ford
On Wed, Dec 21, 2022 at 6:47 PM Marek Vasut  wrote:
>
> Implement basic PSCI provider to let OS turn CPU cores off and on,
> power off and restart the system and determine PSCI version. This
> is sufficient to remove the need for the ATF BL31 blob altogether.
>
> To make use of this functionality, active the following Kconfig options:
>   # CONFIG_PSCI_RESET is not set
>   CONFIG_ARMV8_MULTIENTRY=y
>   CONFIG_ARMV8_SET_SMPEN=y
>   CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
>   CONFIG_ARMV8_EA_EL3_FIRST=y
>   CONFIG_ARMV8_PSCI=y
>   CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
>   CONFIG_ARMV8_SECURE_BASE=0x97

 I am guessing 0x97 was for the 8MP based on the previous location
of ATF.  Is that true?   If that's the case, can I assume that this
address would be  0x91, 0x92 and 0x96 for the imx8mq,
imx8mm and imx8mn respectively?

>   CONFIG_ARM_SMCCC=y
>   CONFIG_SYS_HAS_ARMV8_SECURE_BASE=y
>
> Signed-off-by: Marek Vasut 
> ---
> Cc: "Ariel D'Alessandro" 
> Cc: "NXP i.MX U-Boot Team" 
> Cc: "Ying-Chun Liu (PaulLiu)" 
> Cc: Adam Ford 
> Cc: Andrejs Cainikovs 
> Cc: Fabio Estevam 
> Cc: Manoj Sai 
> Cc: Marcel Ziswiler 
> Cc: Michael Trimarchi 
> Cc: Peng Fan 
> Cc: Ricardo Salveti 
> Cc: Simon Glass 
> Cc: Stefano Babic 
> Cc: Tim Harvey 
> Cc: Ye Li 
> ---
>  arch/arm/mach-imx/imx8m/Kconfig  |   8 +
>  arch/arm/mach-imx/imx8m/Makefile |   1 +
>  arch/arm/mach-imx/imx8m/psci.c   | 288 +++
>  3 files changed, 297 insertions(+)
>  create mode 100644 arch/arm/mach-imx/imx8m/psci.c
>
> diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
> index 9e957e2de57..080c84f8163 100644
> --- a/arch/arm/mach-imx/imx8m/Kconfig
> +++ b/arch/arm/mach-imx/imx8m/Kconfig
> @@ -27,6 +27,14 @@ config IMX8MP
>  config SYS_SOC
> default "imx8m"
>
> +config SYS_HAS_ARMV8_SECURE_BASE
> +   bool "Enable secure address for PSCI image"
> +   depends on ARMV8_PSCI
> +   help
> + PSCI image can be re-located to secure RAM.
> + If enabled, please also define the value for ARMV8_SECURE_BASE,
> + for i.MX8M, it could be some address in OCRAM.
> +
>  choice
> prompt "NXP i.MX8M board select"
> optional
> diff --git a/arch/arm/mach-imx/imx8m/Makefile 
> b/arch/arm/mach-imx/imx8m/Makefile
> index d9dee894aae..abd5ddc1774 100644
> --- a/arch/arm/mach-imx/imx8m/Makefile
> +++ b/arch/arm/mach-imx/imx8m/Makefile
> @@ -4,5 +4,6 @@
>
>  obj-y += lowlevel_init.o
>  obj-y += clock_slice.o soc.o
> +obj-$(CONFIG_ARMV8_PSCI) += psci.o
>  obj-$(CONFIG_IMX8MQ) += clock_imx8mq.o
>  obj-$(CONFIG_IMX8MM)$(CONFIG_IMX8MN)$(CONFIG_IMX8MP) += clock_imx8mm.o
> diff --git a/arch/arm/mach-imx/imx8m/psci.c b/arch/arm/mach-imx/imx8m/psci.c
> new file mode 100644
> index 000..62f0b768cfa
> --- /dev/null
> +++ b/arch/arm/mach-imx/imx8m/psci.c
> @@ -0,0 +1,288 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * This file implements basic PSCI support for i.MX8M
> + *
> + * Copyright (C) 2022 Marek Vasut 
> + */
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#define SNVS_LPCR  0x38
> +#define SNVS_LPCR_TOP  BIT(6)
> +#define SNVS_LPCR_DP_ENBIT(5)
> +#define SNVS_LPCR_SRTC_ENV BIT(0)
> +
> +#define MPIDR_AFF0 GENMASK(7, 0)
> +
> +#define GPC_LPCR_A53_AD0x4
> +#define EN_Cn_WFI_PDN(cpu) BIT(cpu) & 1) * 2) + (((cpu) & 2) 
> * 8)))
> +#define GPC_PGC_nCTRL(cpu) (0x800 + ((cpu) * 0x40))
> +#define PGC_PCRBIT(0)
> +#define GPC_CPU_PGC_SW_PUP_REQ (IS_ENABLED(CONFIG_IMX8MP) ? 0xd0 : 
> 0xf0)
> +#define COREn_A53_SW_PUP_REQ(cpu)  BIT(cpu)
> +
> +#define SRC_A53RCR10x8
> +#define A53_COREn_ENABLE(n)BIT(n)
> +#define SRC_GPR(n) (0x74 + ((n) * 4))
> +
> +/*
> + * Helper code
> + */
> +static u8 psci_state[CONFIG_ARMV8_PSCI_NR_CPUS] __secure_data = {
> +   PSCI_AFFINITY_LEVEL_ON,
> +   PSCI_AFFINITY_LEVEL_OFF,
> +   PSCI_AFFINITY_LEVEL_OFF,
> +   PSCI_AFFINITY_LEVEL_OFF
> +};
> +
> +int psci_update_dt(void *fdt)
> +{
> +   return 0;
> +}
> +
> +__secure static void psci_set_state(int cpu, u8 state)
> +{
> +   psci_state[cpu] = state;
> +   dsb();
> +   isb();
> +}
> +
> +__secure static s32 psci_cpu_on_validate_mpidr(u64 mpidr, u32 *cpu)
> +{
> +   *cpu = mpidr & MPIDR_AFF0;
> +
> +   if (mpidr & ~MPIDR_AFF0)
> +   return ARM_PSCI_RET_INVAL;
> +
> +   if (*cpu >= CONFIG_ARMV8_PSCI_NR_CPUS)
> +   return ARM_PSCI_RET_INVAL;
> +
> +   if (psci_state[*cpu] == PSCI_AFFINITY_LEVEL_ON)
> +   return ARM_PSCI_RET_ALREADY_ON;
> +
> +   if (psci_state[*cpu] == PSCI_AFFINITY_LEVEL_ON_PENDING)
> +   return ARM_PSCI_RET_ON_PENDING;
> +
> 

Re: [PATCH] riscv: ae350: Enable CCTL_SUEN

2022-12-21 Thread Rick Chen
Hi Bin

> On Wed, Dec 21, 2022 at 11:00 AM Rick Chen  wrote:
> >
> > CCTL operations are available to Supervisor/User-mode
> > software under the control of the mcache_ctl.CCTL_SUEN
> > control bit. Enable it to support Superviosr(and User)
>
> typo: Supervisor

OK, will fix it.

>
> > CCTL operations.
> >
> > Signed-off-by: Rick Chen 
> > ---
> >  arch/riscv/cpu/ax25/cpu.c | 4 
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c
> > index c4c2de2ef0..fc3239e1ac 100644
> > --- a/arch/riscv/cpu/ax25/cpu.c
> > +++ b/arch/riscv/cpu/ax25/cpu.c
> > @@ -17,11 +17,13 @@
> >
> >  #define V5_MCACHE_CTL_IC_EN_OFFSET  0
> >  #define V5_MCACHE_CTL_DC_EN_OFFSET  1
> > +#define V5_MCACHE_CTL_CCTL_SUEN_OFFSET 8
>
> nits: alignment seems wrong

OK, will fix it.

>
> >  #define V5_MCACHE_CTL_DC_COHEN_OFFSET  19
> >  #define V5_MCACHE_CTL_DC_COHSTA_OFFSET 20
> >
> >  #define V5_MCACHE_CTL_IC_ENBIT(V5_MCACHE_CTL_IC_EN_OFFSET)
> >  #define V5_MCACHE_CTL_DC_EN
> > BIT(V5_MCACHE_CTL_DC_EN_OFFSET)
> > +#define V5_MCACHE_CTL_CCTL_SUENBIT(V5_MCACHE_CTL_CCTL_SUEN_OFFSET)
>
> nits: alignment seems wrong

OK, will fix it.

Thanks for review.

Rick

>
> >  #define V5_MCACHE_CTL_DC_COHEN_EN   BIT(V5_MCACHE_CTL_DC_COHEN_OFFSET)
> >  #define V5_MCACHE_CTL_DC_COHSTA_EN  BIT(V5_MCACHE_CTL_DC_COHSTA_OFFSET)
> >
> > @@ -55,6 +57,8 @@ void harts_early_init(void)
> > mcache_ctl_val |= V5_MCACHE_CTL_IC_EN;
> > if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_EN))
> > mcache_ctl_val |= V5_MCACHE_CTL_DC_EN;
> > +   if (!(mcache_ctl_val & V5_MCACHE_CTL_CCTL_SUEN))
> > +   mcache_ctl_val |= V5_MCACHE_CTL_CCTL_SUEN;
> > csr_write(CSR_MCACHE_CTL, mcache_ctl_val);
> >
> > /*
> > --
>
> Regards,
> Bin


Re: Broken commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2

2022-12-21 Thread Tom Rini
On Fri, Dec 16, 2022 at 10:56:39PM +0100, Pali Rohár wrote:
> On Friday 05 August 2022 16:21:24 Pali Rohár wrote:
> > Broken is also commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2. Seems
> > that all kconfig migration changes done after that commit are broken.
> > 
> > I really do not have energy to investigate what and how was broken due
> > to incorrect kconfig migration.
> > 
> > 
> > I did simple test. Applied following change:
> > 
> > diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
> > index a6523753d5ca..489f24df0ab1 100644
> > --- a/include/configs/p1_p2_rdb_pc.h
> > +++ b/include/configs/p1_p2_rdb_pc.h
> > @@ -624,3 +624,7 @@ __stringify(__PCIE_RST_CMD)"\0"
> >  "bootm $norbootaddr - $norfdtaddr"
> >  
> >  #endif /* __CONFIG_H */
> > +
> > +#ifdef CONFIG_SDCARD
> > +#error
> > +#endif
> > 
> > And then called:
> > 
> > make CROSS_COMPILE=powerpc-linux-gnuspe- P2020RDB-PC_defconfig u-boot.bin
> > 
> > And it failed, even when this defconfig file is not SD card builds.
> 
> Tom, that commit d433c74eecdce1e4952ef4e8c712a9289c0dfcc2 is yours.
> Could you please look at it? Because it is a regressions which made P1
> and P2 broken. Based on the past experience it really does not make
> sense to wait for somebody who promised to do something as same
> situation is just repeating.
> 
> Above diff is a simple check to verify if code conversion is correct or
> not. If _before_ conversion CONFIG_SDCARD was not defined then also
> _after_ conversion this macro must not be defined. Right?

I dug through all of this again. I thought I understood what the right
answer was again for a moment, but I don't. You, however, understand
what platforms don't use PBL and what they use instead. I understand
half of the fix, which is to change:
choice
prompt "Freescale PBL load location"
depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \
|| TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) 
\
&& !CMD_NAND)

To, I think:
choice
prompt "Freescale PBL load location"
depends on RAMBOOT_PBL

Then introduce some new, not "SDCARD" symbol, for the P1/P2 platforms
that don't use PBL but instead the FSL_PREPBL_ESDHC_BOOT_SECTOR logic
you introduced before.

I say I almost thought I had it because I thought this would work:
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 24d3f1f20c25..59740b173b11 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -15,7 +15,7 @@ config CMD_ERRATA
 config FSL_PREPBL_ESDHC_BOOT_SECTOR
bool "Generate QorIQ pre-PBL eSDHC boot sector"
depends on MPC85xx
-   depends on SDCARD
+   depends on TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB
help
  With this option final image would have prepended QorIQ pre-PBL eSDHC
  boot sector suitable for SD card images. This boot sector instruct
diff --git a/boot/Kconfig b/boot/Kconfig
index 4a001bcee851..d1c9c5f25067 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -725,8 +725,7 @@ config RAMBOOT_PBL
 
 choice
prompt "Freescale PBL load location"
-   depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB \
-   || TARGET_P1020RDB_PC || TARGET_P1020RDB_PD || TARGET_P2020RDB) 
\
+   depends on RAMBOOT_PBL || ((TARGET_P1010RDB_PA || TARGET_P1010RDB_PB) \
&& !CMD_NAND)
 
 config SDCARD

But no one enables CONFIG_FSL_PREPBL_ESDHC_BOOT_SECTOR. But maybe that
just needs to be enabled on the platforms in question, and then the
first dependency change above is just dropping the SDCARD line? I really
don't know, and I'd be equally happy to just remove all of the P1*/P2*
boards if they don't boot and no one cares to fix them.

-- 
Tom


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Re: [PATCH u-boot] doc: board: qemu-ppce500: Update supported and unsupported

2022-12-21 Thread Bin Meng
On Thu, Dec 22, 2022 at 6:43 AM Pali Rohár  wrote:
>
> On Wednesday 21 December 2022 17:01:37 Bin Meng wrote:
> > On Wed, Dec 21, 2022 at 3:49 PM Pali Rohár  wrote:
> > >
> > > On Wednesday 21 December 2022 09:15:41 Bin Meng wrote:
> > > > On Wed, Dec 21, 2022 at 4:06 AM Pali Rohár  wrote:
> > > > >
> > > > > qemu can emulate also e500v1 core but cannot emulate CPUs from 
> > > > > Freescale
> > > > > PowerPC QorIQ T and P series.
> > > > >
> > > > > Signed-off-by: Pali Rohár 
> > > > > ---
> > > > >  doc/board/emulation/qemu-ppce500.rst | 8 +---
> > > > >  1 file changed, 5 insertions(+), 3 deletions(-)
> > > > >
> > > > > diff --git a/doc/board/emulation/qemu-ppce500.rst 
> > > > > b/doc/board/emulation/qemu-ppce500.rst
> > > > > index 5de0aaf55ded..10427cc56302 100644
> > > > > --- a/doc/board/emulation/qemu-ppce500.rst
> > > > > +++ b/doc/board/emulation/qemu-ppce500.rst
> > > > > @@ -7,7 +7,7 @@ QEMU PPC E500
> > > > >  QEMU for PPC supports a special 'ppce500' machine designed for 
> > > > > emulation and
> > > > >  virtualization purposes. This document describes how to run U-Boot 
> > > > > under it.
> > > > >
> > > > > -The QEMU ppce500 machine models a generic PowerPC E500 virtual 
> > > > > machine with
> > > > > +The QEMU ppce500 machine models a generic PowerPC e500 virtual 
> > > > > machine with
> > > > >  support for the VirtIO standard networking device connected to the 
> > > > > built-in
> > > > >  PCI host controller. Some common devices in the CCSBAR space are 
> > > > > modeled,
> > > > >  including MPIC, 16550A UART devices, GPIO, I2C and PCI host 
> > > > > controller with
> > > > > @@ -39,6 +39,7 @@ embedded DTB created by QEMU reflects the new 
> > > > > setting.
> > > > >  Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the 
> > > > > following
> > > > >  32-bit PowerPC CPUs:
> > > > >
> > > > > +* e500v1
> > > > >  * e500v2
> > > > >  * e500mc
> > > > >
> > > > > @@ -61,8 +62,9 @@ When U-Boot boots, you will notice the following::
> > > > >  This is because we only specified a core name to QEMU and it does 
> > > > > not have a
> > > > >  meaningful SVR value which represents an actual SoC that integrates 
> > > > > such core.
> > > > >  You can specify a real world SoC device that QEMU has built-in 
> > > > > support but all
> > > > > -these SoCs are e500v2 based MPC85xx series, hence you cannot test 
> > > > > anything
> > > > > -built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500).
> > > > > +these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot 
> > > > > test anything
> > > > > +built for P10xx/P2010/P2020 (e500v2), P2O4x/P304x/P40xx (e500mc), 
> > > > > P50xx/T10xx (e5500)
> > > >
> > > > typo: P2O4x
> > >
> > > Where is a typo? I wrote P204x (which should mean both P2040 and P2041).
> >
> > Is that 0 or O? It looks like an O.
>
> Ou. Now I see what you mean. I had to look at it 3 times to see that
> difference is between number zero and capital letter o. I have no idea
> why I typed here letter instead of number... maybe because these keys
> are near each other.
>
> Of course, it is zero not letter o. Sorry for this.
>
> Would you fix it locally, or should I send a new patch version?
>

Please send a new patch as I assume I am not the one to pick up this patch.

Regards,
Bin


[PATCH 10/10] arm: imx: imx8m: Add basic PSCI provider implementation

2022-12-21 Thread Marek Vasut
Implement basic PSCI provider to let OS turn CPU cores off and on,
power off and restart the system and determine PSCI version. This
is sufficient to remove the need for the ATF BL31 blob altogether.

To make use of this functionality, active the following Kconfig options:
  # CONFIG_PSCI_RESET is not set
  CONFIG_ARMV8_MULTIENTRY=y
  CONFIG_ARMV8_SET_SMPEN=y
  CONFIG_ARMV8_SPL_EXCEPTION_VECTORS=y
  CONFIG_ARMV8_EA_EL3_FIRST=y
  CONFIG_ARMV8_PSCI=y
  CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER=4
  CONFIG_ARMV8_SECURE_BASE=0x97
  CONFIG_ARM_SMCCC=y
  CONFIG_SYS_HAS_ARMV8_SECURE_BASE=y

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/mach-imx/imx8m/Kconfig  |   8 +
 arch/arm/mach-imx/imx8m/Makefile |   1 +
 arch/arm/mach-imx/imx8m/psci.c   | 288 +++
 3 files changed, 297 insertions(+)
 create mode 100644 arch/arm/mach-imx/imx8m/psci.c

diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 9e957e2de57..080c84f8163 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -27,6 +27,14 @@ config IMX8MP
 config SYS_SOC
default "imx8m"
 
+config SYS_HAS_ARMV8_SECURE_BASE
+   bool "Enable secure address for PSCI image"
+   depends on ARMV8_PSCI
+   help
+ PSCI image can be re-located to secure RAM.
+ If enabled, please also define the value for ARMV8_SECURE_BASE,
+ for i.MX8M, it could be some address in OCRAM.
+
 choice
prompt "NXP i.MX8M board select"
optional
diff --git a/arch/arm/mach-imx/imx8m/Makefile b/arch/arm/mach-imx/imx8m/Makefile
index d9dee894aae..abd5ddc1774 100644
--- a/arch/arm/mach-imx/imx8m/Makefile
+++ b/arch/arm/mach-imx/imx8m/Makefile
@@ -4,5 +4,6 @@
 
 obj-y += lowlevel_init.o
 obj-y += clock_slice.o soc.o
+obj-$(CONFIG_ARMV8_PSCI) += psci.o
 obj-$(CONFIG_IMX8MQ) += clock_imx8mq.o
 obj-$(CONFIG_IMX8MM)$(CONFIG_IMX8MN)$(CONFIG_IMX8MP) += clock_imx8mm.o
diff --git a/arch/arm/mach-imx/imx8m/psci.c b/arch/arm/mach-imx/imx8m/psci.c
new file mode 100644
index 000..62f0b768cfa
--- /dev/null
+++ b/arch/arm/mach-imx/imx8m/psci.c
@@ -0,0 +1,288 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * This file implements basic PSCI support for i.MX8M
+ *
+ * Copyright (C) 2022 Marek Vasut 
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define SNVS_LPCR  0x38
+#define SNVS_LPCR_TOP  BIT(6)
+#define SNVS_LPCR_DP_ENBIT(5)
+#define SNVS_LPCR_SRTC_ENV BIT(0)
+
+#define MPIDR_AFF0 GENMASK(7, 0)
+
+#define GPC_LPCR_A53_AD0x4
+#define EN_Cn_WFI_PDN(cpu) BIT(cpu) & 1) * 2) + (((cpu) & 2) * 
8)))
+#define GPC_PGC_nCTRL(cpu) (0x800 + ((cpu) * 0x40))
+#define PGC_PCRBIT(0)
+#define GPC_CPU_PGC_SW_PUP_REQ (IS_ENABLED(CONFIG_IMX8MP) ? 0xd0 : 
0xf0)
+#define COREn_A53_SW_PUP_REQ(cpu)  BIT(cpu)
+
+#define SRC_A53RCR10x8
+#define A53_COREn_ENABLE(n)BIT(n)
+#define SRC_GPR(n) (0x74 + ((n) * 4))
+
+/*
+ * Helper code
+ */
+static u8 psci_state[CONFIG_ARMV8_PSCI_NR_CPUS] __secure_data = {
+   PSCI_AFFINITY_LEVEL_ON,
+   PSCI_AFFINITY_LEVEL_OFF,
+   PSCI_AFFINITY_LEVEL_OFF,
+   PSCI_AFFINITY_LEVEL_OFF
+};
+
+int psci_update_dt(void *fdt)
+{
+   return 0;
+}
+
+__secure static void psci_set_state(int cpu, u8 state)
+{
+   psci_state[cpu] = state;
+   dsb();
+   isb();
+}
+
+__secure static s32 psci_cpu_on_validate_mpidr(u64 mpidr, u32 *cpu)
+{
+   *cpu = mpidr & MPIDR_AFF0;
+
+   if (mpidr & ~MPIDR_AFF0)
+   return ARM_PSCI_RET_INVAL;
+
+   if (*cpu >= CONFIG_ARMV8_PSCI_NR_CPUS)
+   return ARM_PSCI_RET_INVAL;
+
+   if (psci_state[*cpu] == PSCI_AFFINITY_LEVEL_ON)
+   return ARM_PSCI_RET_ALREADY_ON;
+
+   if (psci_state[*cpu] == PSCI_AFFINITY_LEVEL_ON_PENDING)
+   return ARM_PSCI_RET_ON_PENDING;
+
+   return ARM_PSCI_RET_SUCCESS;
+}
+
+__secure static void psci_cpu_on_write_entry_point(const u32 cpu, u64 
entry_point)
+{
+   const u64 ep = CONFIG_SPL_TEXT_BASE;
+
+   /* Trampoline target */
+   writeq(entry_point, CPU_RELEASE_ADDR);
+   /* RVBAR address HI */
+   writel((u32)(ep >> 24) & 0x,
+  (void *)SRC_BASE_ADDR + SRC_GPR(cpu * 2));
+   /* RVBAR address LO */
+   writel((u32)(ep >> 2) & 0x3f,
+  (void *)SRC_BASE_ADDR + SRC_GPR(cpu * 2 + 1));
+}
+
+__secure static void psci_cpu_on_power_on(const u32 cpu)
+{
+   

[PATCH 09/10] arm: imx: imx8m: Program CSU and TZASC if PSCI provider

2022-12-21 Thread Marek Vasut
In case U-Boot is the PSCI provider, it is necessary to correctly
program CSU and TZASC registers. Those are poorly documented, so
push in the correct values.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/include/asm/arch-imx8m/imx-regs.h |  1 +
 arch/arm/mach-imx/imx8m/soc.c  | 25 ++
 2 files changed, 26 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h 
b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 3034d280cc3..1559bf6d218 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -31,6 +31,7 @@
 #define CCM_BASE_ADDR  0x3038
 #define SRC_BASE_ADDR  0x3039
 #define GPC_BASE_ADDR  0x303A
+#define CSU_BASE_ADDR  0x303E
 
 #define SYSCNT_RD_BASE_ADDR0x306A
 #define SYSCNT_CMP_BASE_ADDR   0x306B
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 706ba8509da..99c41c654a1 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -561,6 +561,29 @@ static void imx8m_setup_snvs(void)
writel(0x, SNVS_BASE_ADDR + SNVS_LPSR);
 }
 
+static void imx8m_setup_csu_tzasc(void)
+{
+   const uintptr_t tzasc_base[4] = {
+   0x301f, 0x301f, 0x301f, 0x301f
+   };
+   int i, j;
+
+   if (!IS_ENABLED(CONFIG_ARMV8_PSCI))
+   return;
+
+   /* CSU */
+   for (i = 0; i < 64; i++)
+   writel(0x00ff00ff, (void *)CSU_BASE_ADDR + (4 * i));
+
+   /* TZASC */
+   for (j = 0; j < 4; j++) {
+   writel(0x, (void *)(tzasc_base[j]));
+   writel(0x, (void *)(tzasc_base[j]) + 0x4);
+   for (i = 0; i <= 0x10; i += 4)
+   writel(0, (void *)(tzasc_base[j]) + 0x40 + i);
+   }
+}
+
 int arch_cpu_init(void)
 {
struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
@@ -613,6 +636,8 @@ int arch_cpu_init(void)
 
imx8m_setup_snvs();
 
+   imx8m_setup_csu_tzasc();
+
return 0;
 }
 
-- 
2.35.1



[PATCH 08/10] arm: imx: imx8m: Define trampoline location if PSCI provider

2022-12-21 Thread Marek Vasut
The common code used to bring up secondary cores requires a final
jump location to be stored in some sort of memory location, define
this memory location to be the start of OCRAM, since it is available.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/include/asm/arch-imx8m/imx-regs.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h 
b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index cfd5479cd73..3034d280cc3 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -91,6 +91,10 @@
 #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK 0x7
 #define FEC_QUIRK_ENET_MAC
 
+#ifdef CONFIG_ARMV8_PSCI   /* Final jump location */
+#define CPU_RELEASE_ADDR   0x90
+#endif
+
 #define CAAM_ARB_BASE_ADDR  (0x0010)
 #define CAAM_ARB_END_ADDR   (0x00107FFF)
 #define CAAM_IPS_BASE_ADDR  (0x3090)
-- 
2.35.1



[PATCH 07/10] arm: imx: imx8m: Map RAM as NS if PSCI provider

2022-12-21 Thread Marek Vasut
In case U-Boot is a PSCI provider, map RAM explicitly as NS,
otherwise secondary cores crash with SError when attempting
to access RAM mapped as secure in EL2.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/mach-imx/imx8m/soc.c | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 96c6e69aae4..706ba8509da 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -100,6 +100,12 @@ void set_wdog_reset(struct wdog_regs *wdog)
setbits_le16(>wcr, WDOG_WDT_MASK | WDOG_WDZST_MASK);
 }
 
+#ifdef CONFIG_ARMV8_PSCI
+#define PTE_MAP_NS PTE_BLOCK_NS
+#else
+#define PTE_MAP_NS 0
+#endif
+
 static struct mm_region imx8m_mem_map[] = {
{
/* ROM */
@@ -122,7 +128,7 @@ static struct mm_region imx8m_mem_map[] = {
.phys = 0x18UL,
.size = 0x8000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-PTE_BLOCK_OUTER_SHARE
+PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
}, {
/* TCM */
.virt = 0x7CUL,
@@ -130,14 +136,14 @@ static struct mm_region imx8m_mem_map[] = {
.size = 0x8UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
 PTE_BLOCK_NON_SHARE |
-PTE_BLOCK_PXN | PTE_BLOCK_UXN
+PTE_BLOCK_PXN | PTE_BLOCK_UXN | PTE_MAP_NS
}, {
/* OCRAM */
.virt = 0x90UL,
.phys = 0x90UL,
.size = 0x20UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-PTE_BLOCK_OUTER_SHARE
+PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
}, {
/* AIPS */
.virt = 0xB0UL,
@@ -152,7 +158,7 @@ static struct mm_region imx8m_mem_map[] = {
.phys = 0x4000UL,
.size = PHYS_SDRAM_SIZE,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-PTE_BLOCK_OUTER_SHARE
+PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
 #ifdef PHYS_SDRAM_2_SIZE
}, {
/* DRAM2 */
@@ -160,7 +166,7 @@ static struct mm_region imx8m_mem_map[] = {
.phys = 0x1UL,
.size = PHYS_SDRAM_2_SIZE,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
-PTE_BLOCK_OUTER_SHARE
+PTE_BLOCK_OUTER_SHARE | PTE_MAP_NS
 #endif
}, {
/* empty entrie to split table entry 5 if needed when TEEs are 
used */
-- 
2.35.1



[PATCH 06/10] arm: imx: imx8m: Enable GICv3 support if PSCI provider

2022-12-21 Thread Marek Vasut
In case U-Boot is a PSCI provider, enable GICv3 support as this
is necessary to bring up secondary cores.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/include/asm/arch-imx8m/imx-regs.h | 3 +++
 arch/arm/mach-imx/imx8m/Kconfig| 1 +
 2 files changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h 
b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 20f4699a12b..cfd5479cd73 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -81,6 +81,9 @@
 #define MXS_GPMI_BASE  (APBH_DMA_ARB_BASE_ADDR + 0x02000)
 #define MXS_BCH_BASE   (APBH_DMA_ARB_BASE_ADDR + 0x04000)
 
+#define GICD_BASE  0x3880
+#define GICR_BASE  0x3888
+
 #define DDRC_DDR_SS_GPR0   0x3d00
 #define DDRC_IPS_BASE_ADDR(X)  (0x3d40 + ((X) * 0x200))
 #define DDR_CSD1_BASE_ADDR 0x4000
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 3313ea38832..9e957e2de57 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -2,6 +2,7 @@ if ARCH_IMX8M
 
 config IMX8M
bool
+   select GICV3 if ARMV8_PSCI
select HAS_CAAM
select ROM_UNIFIED_SECTIONS
select ARMV8_CRYPTO
-- 
2.35.1



[PATCH 05/10] arm: imx: imx8m: Only use ROM pointers if not PSCI provider

2022-12-21 Thread Marek Vasut
The ROM pointers are in fact populated by the ATF BL31 blob, in case
U-Boot itself if the PSCI provider, there is no ATF BL31 blob, hence
ignore the ROM pointers.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/mach-imx/imx8m/soc.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5e92f8143cf..96c6e69aae4 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -238,7 +238,7 @@ int dram_init(void)
return ret;
 
/* rom_pointer[1] contains the size of TEE occupies */
-   if (rom_pointer[1])
+   if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && rom_pointer[1])
gd->ram_size = sdram_size - rom_pointer[1];
else
gd->ram_size = sdram_size;
@@ -267,7 +267,7 @@ int dram_init_banksize(void)
}
 
gd->bd->bi_dram[bank].start = PHYS_SDRAM;
-   if (rom_pointer[1]) {
+   if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && rom_pointer[1]) {
phys_addr_t optee_start = (phys_addr_t)rom_pointer[0];
phys_size_t optee_size = (size_t)rom_pointer[1];
 
@@ -312,7 +312,7 @@ phys_size_t get_effective_memsize(void)
sdram_b1_size = sdram_size;
}
 
-   if (rom_pointer[1]) {
+   if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && rom_pointer[1]) {
/* We will relocate u-boot to Top of dram1. Tee 
position has two cases:
 * 1. At the top of dram1,  Then return the size 
removed optee size.
 * 2. In the middle of dram1, return the size of dram1.
@@ -344,7 +344,8 @@ phys_size_t board_get_usable_ram_top(phys_size_t total_size)
 * rom_pointer[1] stores the size TEE uses.
 * We need to reserve the memory region for TEE.
 */
-   if (rom_pointer[0] && rom_pointer[1] && top_addr > rom_pointer[0])
+   if (!IS_ENABLED(CONFIG_ARMV8_PSCI) && rom_pointer[0] &&
+   rom_pointer[1] && top_addr > rom_pointer[0])
top_addr = rom_pointer[0];
 
return top_addr;
-- 
2.35.1



[PATCH 04/10] arm: dts: imx8m: Require ATF BL31 blob only if not PSCI provider

2022-12-21 Thread Marek Vasut
In case U-Boot itself if the PSCI provider on i.MX8M, do not
require the ATF BL31 blob, as at that point the blob is useless
and would interfere with U-Boot operation.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/dts/imx8mm-u-boot.dtsi | 4 
 arch/arm/dts/imx8mn-u-boot.dtsi | 4 
 arch/arm/dts/imx8mp-u-boot.dtsi | 4 
 arch/arm/dts/imx8mq-u-boot.dtsi | 4 
 4 files changed, 16 insertions(+)

diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 60d49bc3d7b..25dc8e12dde 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -99,6 +99,7 @@
};
};
 
+#ifndef CONFIG_ARMV8_PSCI
atf {
arch = "arm64";
compression = "none";
@@ -112,6 +113,7 @@
type = "atf-bl31";
};
};
+#endif
 
binman_fip: fip {
arch = "arm64";
@@ -140,7 +142,9 @@
description = "NAME";
fdt = "fdt-SEQ";
firmware = "uboot";
+#ifndef CONFIG_ARMV8_PSCI
loadables = "atf";
+#endif
};
};
};
diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
index 95f45ad2522..b019b2341d6 100644
--- a/arch/arm/dts/imx8mn-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-u-boot.dtsi
@@ -161,6 +161,7 @@
};
};
 
+#ifndef CONFIG_ARMV8_PSCI
atf {
arch = "arm64";
compression = "none";
@@ -174,6 +175,7 @@
type = "atf-bl31";
};
};
+#endif
 
binman_fip: fip {
arch = "arm64";
@@ -202,7 +204,9 @@
description = "NAME";
fdt = "fdt-SEQ";
firmware = "uboot";
+#ifndef CONFIG_ARMV8_PSCI
loadables = "atf";
+#endif
};
};
};
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index f9883aa1336..9a3de8f6a07 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -120,6 +120,7 @@
};
};
 
+#ifndef CONFIG_ARMV8_PSCI
atf {
description = "ARM Trusted Firmware";
type = "firmware";
@@ -133,6 +134,7 @@
type = "atf-bl31";
};
};
+#endif
 
@fdt-SEQ {
description = "NAME";
@@ -152,7 +154,9 @@
description = "NAME";
fdt = "fdt-SEQ";
firmware = "uboot";
+#ifndef CONFIG_ARMV8_PSCI
loadables = "atf";
+#endif
};
};
};
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 8d385e8da4f..2bc9f413da0 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -114,6 +114,7 @@
};
};
 
+#ifndef CONFIG_ARMV8_PSCI
atf {
arch = "arm64";
compression = "none";
@@ -127,6 +128,7 @@
type = "blob-ext";
};
};
+#endif
 
fdt {
compression = "none";
@@ -147,7 +149,9 @@
description = "NAME";
fdt = 

[PATCH 03/10] arm: imx: Drop custom lowlevel_init

2022-12-21 Thread Marek Vasut
The custom lowlevel_init implementation is no longer necessary, since
it is responsible for routing and trapping SErrors in U-Boot in EL2,
which is implemented in common code since commit:
6c7691edd55 ("armv8: Always unmask SErrors")

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/mach-imx/Makefile   |  2 --
 arch/arm/mach-imx/lowlevel.S | 22 --
 2 files changed, 24 deletions(-)
 delete mode 100644 arch/arm/mach-imx/lowlevel.S

diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 61b4f4f8cd3..4dfc60eedc4 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -235,8 +235,6 @@ endif
 
 targets += $(addprefix ../../../,SPL spl/u-boot-spl.cfgout u-boot-dtb.cfgout 
u-boot.cfgout u-boot.uim spl/u-boot-nand-spl.imx)
 
-obj-$(CONFIG_ARM64) += lowlevel.o
-
 obj-$(CONFIG_MX5) += mx5/
 obj-$(CONFIG_MX6) += mx6/
 obj-$(CONFIG_MX7) += mx7/
diff --git a/arch/arm/mach-imx/lowlevel.S b/arch/arm/mach-imx/lowlevel.S
deleted file mode 100644
index 158fdb7d87b..000
--- a/arch/arm/mach-imx/lowlevel.S
+++ /dev/null
@@ -1,22 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2019 NXP
- */
-
-#include 
-
-ENTRY(lowlevel_init)
-   mrs x0, CurrentEL
-   cmp x0, #8
-   b.eq1f
-   ret
-1:
-   msr daifclr, #4
-
-   /* set HCR_EL2.AMO to catch SERROR */
-   mrs x0, hcr_el2
-   orr x0, x0, #0x20
-   msr hcr_el2, x0
-   isb
-   ret
-ENDPROC(lowlevel_init)
-- 
2.35.1



[PATCH 02/10] arm: psci: Fix RESET2 hook

2022-12-21 Thread Marek Vasut
The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/cpu/armv8/fwcall.c | 2 +-
 arch/arm/cpu/armv8/psci.S   | 2 ++
 arch/arm/include/asm/psci.h | 4 +++-
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv8/fwcall.c b/arch/arm/cpu/armv8/fwcall.c
index 16914dc1eed..87de09979b1 100644
--- a/arch/arm/cpu/armv8/fwcall.c
+++ b/arch/arm/cpu/armv8/fwcall.c
@@ -103,7 +103,7 @@ void __noreturn psci_system_reset2(u32 reset_level, u32 
cookie)
 {
struct pt_regs regs;
 
-   regs.regs[0] = ARM_PSCI_0_2_FN64_SYSTEM_RESET2;
+   regs.regs[0] = ARM_PSCI_1_1_FN64_SYSTEM_RESET2;
regs.regs[1] = PSCI_RESET2_TYPE_VENDOR | reset_level;
regs.regs[2] = cookie;
if (use_smc_for_psci)
diff --git a/arch/arm/cpu/armv8/psci.S b/arch/arm/cpu/armv8/psci.S
index 7ffc8dbadbe..1133518f16e 100644
--- a/arch/arm/cpu/armv8/psci.S
+++ b/arch/arm/cpu/armv8/psci.S
@@ -82,6 +82,7 @@ PSCI_DEFAULT(psci_node_hw_state_64)
 PSCI_DEFAULT(psci_system_suspend_64)
 PSCI_DEFAULT(psci_stat_residency_64)
 PSCI_DEFAULT(psci_stat_count_64)
+PSCI_DEFAULT(psci_system_reset2_64)
 
 .align 3
 _psci_64_table:
@@ -95,6 +96,7 @@ PSCI_TABLE(ARM_PSCI_1_0_FN64_NODE_HW_STATE, 
psci_node_hw_state_64)
 PSCI_TABLE(ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND, psci_system_suspend_64)
 PSCI_TABLE(ARM_PSCI_1_0_FN64_STAT_RESIDENCY, psci_stat_residency_64)
 PSCI_TABLE(ARM_PSCI_1_0_FN64_STAT_COUNT, psci_stat_count_64)
+PSCI_TABLE(ARM_PSCI_1_1_FN64_SYSTEM_RESET2, psci_system_reset2_64)
 PSCI_TABLE(0, 0)
 
 .macro psci_enter
diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 8b3fb872255..7343b941ef0 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -69,7 +69,6 @@
 #define ARM_PSCI_0_2_FN64_AFFINITY_INFOARM_PSCI_0_2_FN64(4)
 #define ARM_PSCI_0_2_FN64_MIGRATE  ARM_PSCI_0_2_FN64(5)
 #define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU  ARM_PSCI_0_2_FN64(7)
-#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2ARM_PSCI_0_2_FN64(18)
 
 /* PSCI 1.0 interface */
 #define ARM_PSCI_1_0_FN_PSCI_FEATURES  ARM_PSCI_0_2_FN(10)
@@ -87,6 +86,9 @@
 #define ARM_PSCI_1_0_FN64_STAT_RESIDENCY   ARM_PSCI_0_2_FN64(16)
 #define ARM_PSCI_1_0_FN64_STAT_COUNT   ARM_PSCI_0_2_FN64(17)
 
+/* PSCI 1.1 interface */
+#define ARM_PSCI_1_1_FN64_SYSTEM_RESET2ARM_PSCI_0_2_FN64(18)
+
 /* 1KB stack per core */
 #define ARM_PSCI_STACK_SHIFT   10
 #define ARM_PSCI_STACK_SIZE(1 << ARM_PSCI_STACK_SHIFT)
-- 
2.35.1



[PATCH 01/10] arm: psci: Add PSCI v1.1 macro

2022-12-21 Thread Marek Vasut
Add macro representing the PSCI v1.1 .

Signed-off-by: Marek Vasut 
---
Cc: "Ariel D'Alessandro" 
Cc: "NXP i.MX U-Boot Team" 
Cc: "Ying-Chun Liu (PaulLiu)" 
Cc: Adam Ford 
Cc: Andrejs Cainikovs 
Cc: Fabio Estevam 
Cc: Manoj Sai 
Cc: Marcel Ziswiler 
Cc: Michael Trimarchi 
Cc: Peng Fan 
Cc: Ricardo Salveti 
Cc: Simon Glass 
Cc: Stefano Babic 
Cc: Tim Harvey 
Cc: Ye Li 
---
 arch/arm/include/asm/psci.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h
index 67e9234066b..8b3fb872255 100644
--- a/arch/arm/include/asm/psci.h
+++ b/arch/arm/include/asm/psci.h
@@ -22,6 +22,7 @@
 #include 
 #endif
 
+#define ARM_PSCI_VER_1_1   (0x00010001)
 #define ARM_PSCI_VER_1_0   (0x0001)
 #define ARM_PSCI_VER_0_2   (0x0002)
 
-- 
2.35.1



Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Tom Rini
On Thu, Dec 22, 2022 at 12:20:01AM +0100, Mark Kettenis wrote:
> > Date: Wed, 21 Dec 2022 18:09:10 -0500
> > From: Tom Rini 
> > 
> > On Wed, Dec 21, 2022 at 11:42:56PM +0100, Mark Kettenis wrote:
> > > > Date: Wed, 21 Dec 2022 16:56:37 -0500
> > > > From: Tom Rini 
> > > > 
> > > > On Sat, Dec 17, 2022 at 11:14:41PM +0100, Mark Kettenis wrote:
> > > > > > From: Eugen Hristev 
> > > > > > Date: Thu, 15 Dec 2022 13:58:25 +0200
> > > > > > 
> > > > > > Newer DTC require that the DTB start address is aligned at 8 bytes.
> > > > > > In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with 
> > > > > > the
> > > > > > DTB, but there is no alignment/padding to the next 8byte aligned 
> > > > > > address.
> > > > > > This causes the board to fail booting, because the FDT will claim
> > > > > > that the DTB inside u-boot.bin is not a valid DTB, it will fail with
> > > > > > -FDT_ERR_ALIGNMENT.
> > > > > > To solve this, have the u-boot binary `_end` aligned with 8 bytes.
> > > > > > The objcopy in the Makefile will create the u-boot-nodtb.bin and it 
> > > > > > has to
> > > > > > be truncated to 8 bytes to correspond to the u-boot.map file which 
> > > > > > will
> > > > > > have the `_end` aligned to 8 bytes.
> > > > > > The lds files which use devicetrees have been changed to align the 
> > > > > > `_end`
> > > > > > tag with 8 bytes.
> > > > > > 
> > > > > > This patch is also a prerequisite to have the possibility to update 
> > > > > > the
> > > > > > dtc inside u-boot to newer versions (1.6.1+)
> > > > > > 
> > > > > > Signed-off-by: Eugen Hristev 
> > > > > > ---
> > > > > > Hi,
> > > > > > 
> > > > > > I could not test all affected boards, it's an impossible task.
> > > > > > I tried this on at91 boards which I have, and ran the CI on denx.
> > > > > > I cannot guarantee that no other boards are affected, so this patch 
> > > > > > is a bit
> > > > > > of an RFC.
> > > > > > If the u-boot-nodtb.bin does not have the size equal with the 
> > > > > > corresponding
> > > > > > one in u-boot.map, the binary_size_check will fail at build time 
> > > > > > with
> > > > > > something like this:
> > > > > > 
> > > > > > u-boot.map shows a binary size of 502684
> > > > > > but u-boot-nodtb.bin shows 502688
> > > > > > 
> > > > > > Thanks,
> > > > > > Eugen
> > > > > > 
> > > > > >  Makefile| 2 ++
> > > > > >  arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
> > > > > >  arch/arm/cpu/u-boot-spl.lds | 1 +
> > > > > >  arch/arm/cpu/u-boot.lds | 1 +
> > > > > >  arch/arm/lib/elf_arm_efi.lds| 5 +
> > > > > >  arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
> > > > > >  arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
> > > > > >  arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
> > > > > >  arch/mips/cpu/u-boot.lds| 2 +-
> > > > > >  arch/sandbox/cpu/u-boot.lds | 6 ++
> > > > > >  arch/sh/cpu/u-boot.lds  | 2 ++
> > > > > >  board/ti/am335x/u-boot.lds  | 1 +
> > > > > >  tools/binman/test/u_boot_binman_embed.lds   | 2 +-
> > > > > >  13 files changed, 25 insertions(+), 7 deletions(-)
> > > > > > 
> > > > > > diff --git a/Makefile b/Makefile
> > > > > > index 9d84f96481..b4d387bcce 100644
> > > > > > --- a/Makefile
> > > > > > +++ b/Makefile
> > > > > > @@ -1317,6 +1317,8 @@ endif
> > > > > >  
> > > > > >  u-boot-nodtb.bin: u-boot FORCE
> > > > > > $(call if_changed,objcopy_uboot)
> > > > > > +# Make sure the size is 8 byte-aligned.
> > > > > > +   @truncate -s %8 $@
> > > > > 
> > > > > $ truncate
> > > > > ksh: truncate: not found
> > > > > 
> > > > > In other words: truncate(1) isn't a standard UNIX utility and not
> > > > > present on OpenBSD for example.  It isn't part of POSIX and therefore
> > > > > its usage is unportable.
> > > > > 
> > > > > Please find a different solution.
> > > > 
> > > > Ah yes. Can this perhaps be done with dd? A bit of looking around
> > > > suggests that this might be a portable way to truncate a file to say 512
> > > > bytes:
> > > > dd if=/dev/urandom of=testfile bs=1 count=500
> > > > dd if=/dev/null of=testfile bs=1 count=512
> > > > 
> > > > And then hexdump or whatever to see that the last 12 bytes are zero. Can
> > > > you please test this on OpenBSD?  We'll need some shell work to get
> > > > current byte size and make it 8-byte aligned, but that should be
> > > > portable at least.  Thanks!
> > > 
> > > Hi Tom,
> > > 
> > > That results on a file with zero bytes on OpenBSD... but also on
> > > Linux.  Did you intend to write something different?  I can't
> > > immediately come up with a way to do this with dd(1).
> > 
> > Ah, I typod that, sorry!  I meant (and just re-checked):
> > dd if=/dev/urandom of=testfile bs=1 count=500
> > dd if=/dev/null of=testfile bs=1 seek=512
> > 
> > Which here does:
> > $ dd if=/dev/urandom of=testfile bs=1 count=500
> > 500+0 records in
> > 500+0 records 

Re: [PATCH v7 06/12] binman: Support new op-tee binary format

2022-12-21 Thread Simon Glass
Hi Jerome,

On Wed, 21 Dec 2022 at 07:39, Jerome Forissier
 wrote:
>
> Hi Simon,
>
> On 12/17/22 22:28, Simon Glass wrote:
> > OP-TEE has a format with a binary header that can be used instead of the
> > ELF file. With newer versions of OP-TEE this may be required on some
> > platforms.
> >
> > Add support for this in binman. First, add a method to obtain the ELF
> > sections from an entry, then use that in the FIT support. We then end up
> > with the ability to support both types of OP-TEE files, depending on which
> > one is passed in with the entry argument (TEE=xxx in the U-Boot build).
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > Changes in v7:
> > - Correct missing test coverage
> >
> > Changes in v6:
> > - Update op-tee to support new v1 binary header
>
> Thanks for the update. I'm trying to test this. How am I supposed to
> pass the BL31 and TEE binaries? Currently I build u-boot with:
>
>   BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot 
> CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc HOSTCC=gcc
>
> I applied the series onto the 'next' branch and built as usual but the board
> failed to boot so I suspect I am missing something.

Thanks for testing.

I seem to be missing setting the U-Boot load address. Also TEE is
supposed to be optional, I believe.

I pushed an updated series to u-boot-dm/fit-working so could you try
that (v8)? Also could you please include your board and console output
if/when it fails?

Regards,
Simon


Re: [PATCH v1 1/1] makefile: add multi_dtb_fit dep

2022-12-21 Thread Simon Glass
Hi Neil,

On Wed, 21 Dec 2022 at 07:07, Neal Frager  wrote:
>
> With certain gcc compilers, the u-boot.itb is built immediately after dtb
> generation.  If CONFIG_MULTI_DTB_FIT is used, it is possible that the
> fit-dtb.blob is not finished in time.
>
> This patch adds a necessary dependency to guarantee that the fit-dtb.blob
> is built before attempting to build the u-boot.itb.
>
> Signed-off-by: Neal Frager 
> ---
>  Makefile | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/Makefile b/Makefile
> index b96e2ffa15..682a5d94fd 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -1425,6 +1425,7 @@ MKIMAGEFLAGS_u-boot.itb += -B 0x8
>  ifdef U_BOOT_ITS
>  u-boot.itb: u-boot-nodtb.bin \
> $(if 
> $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX),dts/dt.dtb) \
> +   $(if $(CONFIG_MULTI_DTB_FIT),$(FINAL_DTB_CONTAINER)) \
> $(U_BOOT_ITS) FORCE
> $(call if_changed,mkfitimage)
> $(BOARD_SIZE_CHECK)
> --
> 2.17.1
>

Reviewed-by: Simon Glass 

I wonder if we should try to get this moved to binman?

Regards,
SImon


Re: [PATCH v3] video: ti: am335x: restore driver-model code

2022-12-21 Thread Simon Glass
On Wed, 21 Dec 2022 at 04:25, Dario Binacchi
 wrote:
>
> The commit 82f7b869f5d7a ("video: Drop CONFIG_AM335X_LCD") removed not
> only the LCD legacy implementation but also the code with driver model
> support. The patch restores the code with driver model support.
>
> Signed-off-by: Dario Binacchi 
>
> ---
>
> Changes in v3:
> - Remove the lcd.h include which I forgot to commit in v2.
>
> Changes in v2:
> - Collapse the two patches into one only.
> - Fix the compilation failure.
>
>  drivers/video/Kconfig   |   2 +
>  drivers/video/Makefile  |   1 +
>  drivers/video/ti/Kconfig|   8 +
>  drivers/video/ti/Makefile   |   6 +
>  drivers/video/ti/tilcdc-panel.c | 172 +
>  drivers/video/ti/tilcdc-panel.h |  14 ++
>  drivers/video/ti/tilcdc.c   | 425 
>  drivers/video/ti/tilcdc.h   |  38 +++
>  8 files changed, 666 insertions(+)
>  create mode 100644 drivers/video/ti/Kconfig
>  create mode 100644 drivers/video/ti/Makefile
>  create mode 100644 drivers/video/ti/tilcdc-panel.c
>  create mode 100644 drivers/video/ti/tilcdc-panel.h
>  create mode 100644 drivers/video/ti/tilcdc.c
>  create mode 100644 drivers/video/ti/tilcdc.h
>

Reviewed-by: Simon Glass 


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Mark Kettenis
> Date: Wed, 21 Dec 2022 18:09:10 -0500
> From: Tom Rini 
> 
> On Wed, Dec 21, 2022 at 11:42:56PM +0100, Mark Kettenis wrote:
> > > Date: Wed, 21 Dec 2022 16:56:37 -0500
> > > From: Tom Rini 
> > > 
> > > On Sat, Dec 17, 2022 at 11:14:41PM +0100, Mark Kettenis wrote:
> > > > > From: Eugen Hristev 
> > > > > Date: Thu, 15 Dec 2022 13:58:25 +0200
> > > > > 
> > > > > Newer DTC require that the DTB start address is aligned at 8 bytes.
> > > > > In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the
> > > > > DTB, but there is no alignment/padding to the next 8byte aligned 
> > > > > address.
> > > > > This causes the board to fail booting, because the FDT will claim
> > > > > that the DTB inside u-boot.bin is not a valid DTB, it will fail with
> > > > > -FDT_ERR_ALIGNMENT.
> > > > > To solve this, have the u-boot binary `_end` aligned with 8 bytes.
> > > > > The objcopy in the Makefile will create the u-boot-nodtb.bin and it 
> > > > > has to
> > > > > be truncated to 8 bytes to correspond to the u-boot.map file which 
> > > > > will
> > > > > have the `_end` aligned to 8 bytes.
> > > > > The lds files which use devicetrees have been changed to align the 
> > > > > `_end`
> > > > > tag with 8 bytes.
> > > > > 
> > > > > This patch is also a prerequisite to have the possibility to update 
> > > > > the
> > > > > dtc inside u-boot to newer versions (1.6.1+)
> > > > > 
> > > > > Signed-off-by: Eugen Hristev 
> > > > > ---
> > > > > Hi,
> > > > > 
> > > > > I could not test all affected boards, it's an impossible task.
> > > > > I tried this on at91 boards which I have, and ran the CI on denx.
> > > > > I cannot guarantee that no other boards are affected, so this patch 
> > > > > is a bit
> > > > > of an RFC.
> > > > > If the u-boot-nodtb.bin does not have the size equal with the 
> > > > > corresponding
> > > > > one in u-boot.map, the binary_size_check will fail at build time with
> > > > > something like this:
> > > > > 
> > > > > u-boot.map shows a binary size of 502684
> > > > > but u-boot-nodtb.bin shows 502688
> > > > > 
> > > > > Thanks,
> > > > > Eugen
> > > > > 
> > > > >  Makefile| 2 ++
> > > > >  arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
> > > > >  arch/arm/cpu/u-boot-spl.lds | 1 +
> > > > >  arch/arm/cpu/u-boot.lds | 1 +
> > > > >  arch/arm/lib/elf_arm_efi.lds| 5 +
> > > > >  arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
> > > > >  arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
> > > > >  arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
> > > > >  arch/mips/cpu/u-boot.lds| 2 +-
> > > > >  arch/sandbox/cpu/u-boot.lds | 6 ++
> > > > >  arch/sh/cpu/u-boot.lds  | 2 ++
> > > > >  board/ti/am335x/u-boot.lds  | 1 +
> > > > >  tools/binman/test/u_boot_binman_embed.lds   | 2 +-
> > > > >  13 files changed, 25 insertions(+), 7 deletions(-)
> > > > > 
> > > > > diff --git a/Makefile b/Makefile
> > > > > index 9d84f96481..b4d387bcce 100644
> > > > > --- a/Makefile
> > > > > +++ b/Makefile
> > > > > @@ -1317,6 +1317,8 @@ endif
> > > > >  
> > > > >  u-boot-nodtb.bin: u-boot FORCE
> > > > >   $(call if_changed,objcopy_uboot)
> > > > > +# Make sure the size is 8 byte-aligned.
> > > > > + @truncate -s %8 $@
> > > > 
> > > > $ truncate
> > > > ksh: truncate: not found
> > > > 
> > > > In other words: truncate(1) isn't a standard UNIX utility and not
> > > > present on OpenBSD for example.  It isn't part of POSIX and therefore
> > > > its usage is unportable.
> > > > 
> > > > Please find a different solution.
> > > 
> > > Ah yes. Can this perhaps be done with dd? A bit of looking around
> > > suggests that this might be a portable way to truncate a file to say 512
> > > bytes:
> > > dd if=/dev/urandom of=testfile bs=1 count=500
> > > dd if=/dev/null of=testfile bs=1 count=512
> > > 
> > > And then hexdump or whatever to see that the last 12 bytes are zero. Can
> > > you please test this on OpenBSD?  We'll need some shell work to get
> > > current byte size and make it 8-byte aligned, but that should be
> > > portable at least.  Thanks!
> > 
> > Hi Tom,
> > 
> > That results on a file with zero bytes on OpenBSD... but also on
> > Linux.  Did you intend to write something different?  I can't
> > immediately come up with a way to do this with dd(1).
> 
> Ah, I typod that, sorry!  I meant (and just re-checked):
> dd if=/dev/urandom of=testfile bs=1 count=500
> dd if=/dev/null of=testfile bs=1 seek=512
> 
> Which here does:
> $ dd if=/dev/urandom of=testfile bs=1 count=500
> 500+0 records in
> 500+0 records out
> 500 bytes copied, 0.00641125 s, 78.0 kB/s
> $ dd if=/dev/null of=testfile bs=1 seek=512
> 0+0 records in
> 0+0 records out
> 0 bytes copied, 0.000358246 s, 0.0 kB/s
> $ ls -l testfile
> -rw-rw-r-- 1 trini trini 512 Dec 21 18:07 testfile
> $ hexdump testfile | tail -n2
> 1f0 8cdd 300e    

[PATCH 00/14] fdt: Improvements for fdt and tracing

2022-12-21 Thread Simon Glass
This series aims to make it easier to measure boot performance,
particularly aimed at rockpro64. It includes the following:

- enabling bootstage on rockpro64 (TPL, SPL, U-Boot proper)
- minor fixes and tidy-ups for tracing
- minor FDT code tidy-ups

It also reverts a patch which slows down the boot by 30ms. This revert
was requested some time ago but with this series we have the data showing
the impact.

Changes in v1:
- Add detail of impact

Simon Glass (14):
  trace: Use notrace for short
  arm: Support trace on armv8
  tpm: Add a proper Kconfig option for crc8 in SPL
  fdt: Avoid exporting fdtdec_prepare_fdt()
  fdt: Drop ifdefs in fdtdec_prepare_fdt()
  fdt: Pass the device tree to fdtdec_prepare_fdt()
  fdt: Check for overlapping data and FDT
  trace: Move trace pointer to data section
  mkimage: Add a few more messages for FIT failures
  trace: Adjust flags in proftool
  trace: Update trace-format generator for newer version
  trace: Don't require TIMER_EARLY
  rockchip: Enable bootstage on rockpro64
  Revert "fdtdec: drop needlessly convoluted CONFIG_PHANDLE_CHECK_SEQ"

 arch/arm/cpu/armv7/s5p-common/timer.c   |  2 +-
 arch/arm/cpu/armv8/generic_timer.c  |  6 +-
 arch/arm/mach-exynos/include/mach/cpu.h |  6 +-
 arch/arm/mach-rockchip/tpl.c| 18 -
 arch/x86/include/asm/global_data.h  |  2 +-
 arch/x86/include/asm/msr.h  |  2 +-
 arch/x86/include/asm/u-boot-x86.h   |  2 +-
 common/spl/spl.c|  2 +-
 common/spl/spl_fit.c|  1 +
 configs/am65x_evm_a53_defconfig |  1 +
 configs/evb-ast2600_defconfig   |  1 +
 configs/rockpro64-rk3399_defconfig  |  8 +++
 configs/sama7g5ek_mmc1_defconfig|  1 +
 configs/sama7g5ek_mmc_defconfig |  1 +
 doc/develop/trace.rst   |  2 +-
 include/fdtdec.h|  9 ---
 lib/Kconfig | 26 ++-
 lib/Makefile|  3 +-
 lib/efi_loader/efi_freestanding.c   |  4 +-
 lib/fdtdec.c| 92 -
 lib/trace.c | 29 
 tools/fit_image.c   |  4 +-
 tools/image-host.c  |  6 +-
 tools/proftool.c| 43 +++-
 24 files changed, 175 insertions(+), 96 deletions(-)

-- 
2.39.0.314.g84b9a713c41-goog



Re: [PATCH 13/14] rockchip: Enable bootstage on rockpro64

2022-12-21 Thread Pali Rohár
On Wednesday 21 December 2022 16:08:27 Simon Glass wrote:
> This board is useful for benchmarking overall U-Boot performance. Enable
> the bootstage feature so we get a report.
> 
> Since this returns to the boot rom before finishing executing
> board_init_r() in SPL, add a few bootstage calls so that we can collect
> timing from TPL.
> 
> For the stash region, use a portion of SRAM, 64KB below the stack top.
> This allows the TPL image to be up to nearly 120KB (it is typically about
> 64KB). SPL normally runs from SDRAM at 0, so can use the same stash
> region.
> 
> Signed-off-by: Simon Glass 
> ---
> 
>  arch/arm/mach-rockchip/tpl.c   | 18 +++---
>  common/spl/spl.c   |  2 +-
>  configs/rockpro64-rk3399_defconfig |  8 
>  3 files changed, 24 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
> index ed46a9ad286..2b7f852a28f 100644
> --- a/arch/arm/mach-rockchip/tpl.c
> +++ b/arch/arm/mach-rockchip/tpl.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -70,15 +71,17 @@ void board_init_f(ulong dummy)
>   U_BOOT_TIME ")\n");
>  #endif
>  #endif
> + /* Init secure timer */
> + rockchip_stimer_init();
> +
> + puts("u_boot_first_phase(): ");
> + printhex8(u_boot_first_phase());
>   ret = spl_early_init();
>   if (ret) {
>   debug("spl_early_init() failed: %d\n", ret);
>   hang();
>   }
>  
> - /* Init secure timer */
> - rockchip_stimer_init();
> -
>   /* Init ARM arch timer */
>   if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
>   timer_init();
> @@ -93,6 +96,15 @@ void board_init_f(ulong dummy)
>  int board_return_to_bootrom(struct spl_image_info *spl_image,
>   struct spl_boot_device *bootdev)
>  {
> +#ifdef CONFIG_BOOTSTAGE_STASH
> + int ret;
> +
> + bootstage_mark_name(BOOTSTAGE_ID_END_TPL, "end tpl");
> + ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
> +   CONFIG_BOOTSTAGE_STASH_SIZE);
> + if (ret)
> + debug("Failed to stash bootstage: err=%d\n", ret);
> +#endif
>   back_to_bootrom(BROM_BOOT_NEXTSTAGE);
>  
>   return 0;
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index 1d2e8fda728..71cded774b8 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -910,7 +910,7 @@ void preloader_console_init(void)
>   gd->have_console = 1;
>  
>  #if CONFIG_IS_ENABLED(BANNER_PRINT)
> - puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
> + puts("\nxU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "

Why 'x'?

>U_BOOT_TIME " " U_BOOT_TZ ")\n");
>  #endif
>  #ifdef CONFIG_SPL_DISPLAY_PRINT
> diff --git a/configs/rockpro64-rk3399_defconfig 
> b/configs/rockpro64-rk3399_defconfig
> index 5b8d678f6bb..2f1ae156bd4 100644
> --- a/configs/rockpro64-rk3399_defconfig
> +++ b/configs/rockpro64-rk3399_defconfig
> @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x3F8000
>  CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
>  CONFIG_ROCKCHIP_RK3399=y
>  CONFIG_TARGET_ROCKPRO64_RK3399=y
> +CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e
>  CONFIG_DEBUG_UART_BASE=0xFF1A
>  CONFIG_DEBUG_UART_CLOCK=2400
>  CONFIG_SPL_SPI_FLASH_SUPPORT=y
> @@ -17,6 +18,12 @@ CONFIG_SYS_LOAD_ADDR=0x800800
>  CONFIG_DEBUG_UART=y
>  CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
>  CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
> +CONFIG_BOOTSTAGE=y
> +CONFIG_SPL_BOOTSTAGE=y
> +CONFIG_TPL_BOOTSTAGE=y
> +CONFIG_BOOTSTAGE_REPORT=y
> +CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
> +CONFIG_BOOTSTAGE_STASH=y
>  CONFIG_USE_PREBOOT=y
>  CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
>  CONFIG_DISPLAY_BOARDINFO_LATE=y
> @@ -40,6 +47,7 @@ CONFIG_CMD_PCI=y
>  CONFIG_CMD_USB=y
>  # CONFIG_CMD_SETEXPR is not set
>  CONFIG_CMD_TIME=y
> +CONFIG_CMD_BOOTSTAGE=y
>  CONFIG_SPL_OF_CONTROL=y
>  CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
> interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
>  CONFIG_ENV_IS_IN_SPI_FLASH=y
> -- 
> 2.39.0.314.g84b9a713c41-goog
> 


Re: [PATCH v8 13/13] treewide: Disable USE_SPL_FIT_GENERATOR by default

2022-12-21 Thread Tom Rini
On Wed, Dec 21, 2022 at 04:07:26PM -0700, Simon Glass wrote:
> This option is deprecated and only used by two boards. Enable it for just
> those two boards, so others don't accidentally enable it.
> 
> Signed-off-by: Simon Glass 

Wait, is this right? I thought when I had looked at this before the
outliers were two imx boards, which I believe have now been converted.
Is it really still in use on two xilinx platforms ?

-- 
Tom


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Re: [PATCH 03/14] tpm: Add a proper Kconfig option for crc8 in SPL

2022-12-21 Thread Pali Rohár
On Wednesday 21 December 2022 16:08:17 Simon Glass wrote:
> The current approach is a bit of a hack and only works for the tpm
> subsystem. Add a Kconfig so that crc8 can be enabled in SPL for other
> purposes.
> 
> Signed-off-by: Simon Glass 
> ---
> 
>  lib/Kconfig  | 17 +
>  lib/Makefile |  3 ++-
>  2 files changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/lib/Kconfig b/lib/Kconfig
> index def36f275ce..b51455a5f77 100644
> --- a/lib/Kconfig
> +++ b/lib/Kconfig
> @@ -422,6 +422,7 @@ config TPM
>  config SPL_TPM
>   bool "Trusted Platform Module (TPM) Support in SPL"
>   depends on SPL_DM
> + imply SPL_CRC8
>   help
> This enables support for TPMs which can be used to provide security
> features for your board. The TPM can be connected via LPC or I2C
> @@ -617,6 +618,22 @@ config SPL_MD5
> security applications, but it can be useful for providing a quick
> checksum of a block of data.
>  
> +config CRC8
> + def_bool y
> + help
> +   Enables CRC8 support in U-Boot. This is normally required. CRC8 is
> +   a simple and fast checksumming algorithm which does a bytewise
> +   checksum with feedback to produce an 8-bit result. The code is small
> +   and it does not require a lookup table (unlike CRC32).
> +
> +config SPL_CRC8
> + bool "Support CRC8 in SPL"

Should be there some symbol dependency on SPL?

> + help
> +   Enables CRC8 support in SPL. This is not normally required. CRC8 is
> +   a simple and fast checksumming algorithm which does a bytewise
> +   checksum with feedback to produce an 8-bit result. The code is small
> +   and it does not require a lookup table (unlike CRC32).
> +
>  config CRC32
>   def_bool y
>   help
> diff --git a/lib/Makefile b/lib/Makefile
> index d77b33e7f48..a282e40258c 100644
> --- a/lib/Makefile
> +++ b/lib/Makefile
> @@ -57,12 +57,13 @@ endif
>  
>  obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm-common.o
>  ifeq ($(CONFIG_$(SPL_TPL_)TPM),y)
> -obj-y += crc8.o
>  obj-$(CONFIG_TPM) += tpm_api.o
>  obj-$(CONFIG_TPM_V1) += tpm-v1.o
>  obj-$(CONFIG_TPM_V2) += tpm-v2.o
>  endif
>  
> +obj-$(CONFIG_$(SPL_TPL_)CRC8) += crc8.o
> +
>  obj-y += crypto/
>  
>  obj-$(CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE) += acpi/
> -- 
> 2.39.0.314.g84b9a713c41-goog
> 


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Tom Rini
On Wed, Dec 21, 2022 at 11:42:56PM +0100, Mark Kettenis wrote:
> > Date: Wed, 21 Dec 2022 16:56:37 -0500
> > From: Tom Rini 
> > 
> > On Sat, Dec 17, 2022 at 11:14:41PM +0100, Mark Kettenis wrote:
> > > > From: Eugen Hristev 
> > > > Date: Thu, 15 Dec 2022 13:58:25 +0200
> > > > 
> > > > Newer DTC require that the DTB start address is aligned at 8 bytes.
> > > > In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the
> > > > DTB, but there is no alignment/padding to the next 8byte aligned 
> > > > address.
> > > > This causes the board to fail booting, because the FDT will claim
> > > > that the DTB inside u-boot.bin is not a valid DTB, it will fail with
> > > > -FDT_ERR_ALIGNMENT.
> > > > To solve this, have the u-boot binary `_end` aligned with 8 bytes.
> > > > The objcopy in the Makefile will create the u-boot-nodtb.bin and it has 
> > > > to
> > > > be truncated to 8 bytes to correspond to the u-boot.map file which will
> > > > have the `_end` aligned to 8 bytes.
> > > > The lds files which use devicetrees have been changed to align the 
> > > > `_end`
> > > > tag with 8 bytes.
> > > > 
> > > > This patch is also a prerequisite to have the possibility to update the
> > > > dtc inside u-boot to newer versions (1.6.1+)
> > > > 
> > > > Signed-off-by: Eugen Hristev 
> > > > ---
> > > > Hi,
> > > > 
> > > > I could not test all affected boards, it's an impossible task.
> > > > I tried this on at91 boards which I have, and ran the CI on denx.
> > > > I cannot guarantee that no other boards are affected, so this patch is 
> > > > a bit
> > > > of an RFC.
> > > > If the u-boot-nodtb.bin does not have the size equal with the 
> > > > corresponding
> > > > one in u-boot.map, the binary_size_check will fail at build time with
> > > > something like this:
> > > > 
> > > > u-boot.map shows a binary size of 502684
> > > > but u-boot-nodtb.bin shows 502688
> > > > 
> > > > Thanks,
> > > > Eugen
> > > > 
> > > >  Makefile| 2 ++
> > > >  arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
> > > >  arch/arm/cpu/u-boot-spl.lds | 1 +
> > > >  arch/arm/cpu/u-boot.lds | 1 +
> > > >  arch/arm/lib/elf_arm_efi.lds| 5 +
> > > >  arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
> > > >  arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
> > > >  arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
> > > >  arch/mips/cpu/u-boot.lds| 2 +-
> > > >  arch/sandbox/cpu/u-boot.lds | 6 ++
> > > >  arch/sh/cpu/u-boot.lds  | 2 ++
> > > >  board/ti/am335x/u-boot.lds  | 1 +
> > > >  tools/binman/test/u_boot_binman_embed.lds   | 2 +-
> > > >  13 files changed, 25 insertions(+), 7 deletions(-)
> > > > 
> > > > diff --git a/Makefile b/Makefile
> > > > index 9d84f96481..b4d387bcce 100644
> > > > --- a/Makefile
> > > > +++ b/Makefile
> > > > @@ -1317,6 +1317,8 @@ endif
> > > >  
> > > >  u-boot-nodtb.bin: u-boot FORCE
> > > > $(call if_changed,objcopy_uboot)
> > > > +# Make sure the size is 8 byte-aligned.
> > > > +   @truncate -s %8 $@
> > > 
> > > $ truncate
> > > ksh: truncate: not found
> > > 
> > > In other words: truncate(1) isn't a standard UNIX utility and not
> > > present on OpenBSD for example.  It isn't part of POSIX and therefore
> > > its usage is unportable.
> > > 
> > > Please find a different solution.
> > 
> > Ah yes. Can this perhaps be done with dd? A bit of looking around
> > suggests that this might be a portable way to truncate a file to say 512
> > bytes:
> > dd if=/dev/urandom of=testfile bs=1 count=500
> > dd if=/dev/null of=testfile bs=1 count=512
> > 
> > And then hexdump or whatever to see that the last 12 bytes are zero. Can
> > you please test this on OpenBSD?  We'll need some shell work to get
> > current byte size and make it 8-byte aligned, but that should be
> > portable at least.  Thanks!
> 
> Hi Tom,
> 
> That results on a file with zero bytes on OpenBSD... but also on
> Linux.  Did you intend to write something different?  I can't
> immediately come up with a way to do this with dd(1).

Ah, I typod that, sorry!  I meant (and just re-checked):
dd if=/dev/urandom of=testfile bs=1 count=500
dd if=/dev/null of=testfile bs=1 seek=512

Which here does:
$ dd if=/dev/urandom of=testfile bs=1 count=500
500+0 records in
500+0 records out
500 bytes copied, 0.00641125 s, 78.0 kB/s
$ dd if=/dev/null of=testfile bs=1 seek=512
0+0 records in
0+0 records out
0 bytes copied, 0.000358246 s, 0.0 kB/s
$ ls -l testfile
-rw-rw-r-- 1 trini trini 512 Dec 21 18:07 testfile
$ hexdump testfile | tail -n2
1f0 8cdd 300e      
200

-- 
Tom


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[PATCH 13/14] rockchip: Enable bootstage on rockpro64

2022-12-21 Thread Simon Glass
This board is useful for benchmarking overall U-Boot performance. Enable
the bootstage feature so we get a report.

Since this returns to the boot rom before finishing executing
board_init_r() in SPL, add a few bootstage calls so that we can collect
timing from TPL.

For the stash region, use a portion of SRAM, 64KB below the stack top.
This allows the TPL image to be up to nearly 120KB (it is typically about
64KB). SPL normally runs from SDRAM at 0, so can use the same stash
region.

Signed-off-by: Simon Glass 
---

 arch/arm/mach-rockchip/tpl.c   | 18 +++---
 common/spl/spl.c   |  2 +-
 configs/rockpro64-rk3399_defconfig |  8 
 3 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c
index ed46a9ad286..2b7f852a28f 100644
--- a/arch/arm/mach-rockchip/tpl.c
+++ b/arch/arm/mach-rockchip/tpl.c
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -70,15 +71,17 @@ void board_init_f(ulong dummy)
U_BOOT_TIME ")\n");
 #endif
 #endif
+   /* Init secure timer */
+   rockchip_stimer_init();
+
+   puts("u_boot_first_phase(): ");
+   printhex8(u_boot_first_phase());
ret = spl_early_init();
if (ret) {
debug("spl_early_init() failed: %d\n", ret);
hang();
}
 
-   /* Init secure timer */
-   rockchip_stimer_init();
-
/* Init ARM arch timer */
if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
timer_init();
@@ -93,6 +96,15 @@ void board_init_f(ulong dummy)
 int board_return_to_bootrom(struct spl_image_info *spl_image,
struct spl_boot_device *bootdev)
 {
+#ifdef CONFIG_BOOTSTAGE_STASH
+   int ret;
+
+   bootstage_mark_name(BOOTSTAGE_ID_END_TPL, "end tpl");
+   ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
+ CONFIG_BOOTSTAGE_STASH_SIZE);
+   if (ret)
+   debug("Failed to stash bootstage: err=%d\n", ret);
+#endif
back_to_bootrom(BROM_BOOT_NEXTSTAGE);
 
return 0;
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 1d2e8fda728..71cded774b8 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -910,7 +910,7 @@ void preloader_console_init(void)
gd->have_console = 1;
 
 #if CONFIG_IS_ENABLED(BANNER_PRINT)
-   puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
+   puts("\nxU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - "
 U_BOOT_TIME " " U_BOOT_TZ ")\n");
 #endif
 #ifdef CONFIG_SPL_DISPLAY_PRINT
diff --git a/configs/rockpro64-rk3399_defconfig 
b/configs/rockpro64-rk3399_defconfig
index 5b8d678f6bb..2f1ae156bd4 100644
--- a/configs/rockpro64-rk3399_defconfig
+++ b/configs/rockpro64-rk3399_defconfig
@@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x3F8000
 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
 CONFIG_ROCKCHIP_RK3399=y
 CONFIG_TARGET_ROCKPRO64_RK3399=y
+CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e
 CONFIG_DEBUG_UART_BASE=0xFF1A
 CONFIG_DEBUG_UART_CLOCK=2400
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
@@ -17,6 +18,12 @@ CONFIG_SYS_LOAD_ADDR=0x800800
 CONFIG_DEBUG_UART=y
 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x30
+CONFIG_BOOTSTAGE=y
+CONFIG_SPL_BOOTSTAGE=y
+CONFIG_TPL_BOOTSTAGE=y
+CONFIG_BOOTSTAGE_REPORT=y
+CONFIG_SPL_BOOTSTAGE_RECORD_COUNT=10
+CONFIG_BOOTSTAGE_STASH=y
 CONFIG_USE_PREBOOT=y
 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
 CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -40,6 +47,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_TIME=y
+CONFIG_CMD_BOOTSTAGE=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names 
interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 CONFIG_ENV_IS_IN_SPI_FLASH=y
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 10/14] trace: Adjust flags in proftool

2022-12-21 Thread Simon Glass
The flags in this tool don't match the comments or help. Also the variable
names are quite confusing. Update them for consistency.

Signed-off-by: Simon Glass 
---

 tools/proftool.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/tools/proftool.c b/tools/proftool.c
index ea7d07a277e..0ba84d30c19 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -81,14 +81,15 @@ static void outf(int level, const char *fmt, ...)
 static void usage(void)
 {
fprintf(stderr,
-   "Usage: proftool -cds -v3  \n"
+   "Usage: proftool [-cmtv]  \n"
"\n"
"Commands\n"
"   dump-ftrace\t\tDump out textual data in ftrace format\n"
"\n"
"Options:\n"
+   "   -c \tSpecific config file\n"
"   -m \tSpecify Systen.map file\n"
-   "   -t \tSpecific trace data file (from U-Boot)\n"
+   "   -t \tSpecify trace data file (from U-Boot 'trace 
calls')\n"
"   -v <0-4>\tSpecify verbosity\n");
exit(EXIT_FAILURE);
 }
@@ -562,23 +563,23 @@ static int prof_tool(int argc, char *const argv[],
 int main(int argc, char *argv[])
 {
const char *map_fname = "System.map";
-   const char *prof_fname = NULL;
-   const char *trace_config_fname = NULL;
+   const char *trace_fname = NULL;
+   const char *config_fname = NULL;
int opt;
 
verbose = 2;
-   while ((opt = getopt(argc, argv, "m:p:t:v:")) != -1) {
+   while ((opt = getopt(argc, argv, "c:m:t:v:")) != -1) {
switch (opt) {
-   case 'm':
-   map_fname = optarg;
+   case 'c':
+   config_fname = optarg;
break;
 
-   case 'p':
-   prof_fname = optarg;
+   case 'm':
+   map_fname = optarg;
break;
 
case 't':
-   trace_config_fname = optarg;
+   trace_fname = optarg;
break;
 
case 'v':
@@ -594,6 +595,5 @@ int main(int argc, char *argv[])
usage();
 
debug("Debug enabled\n");
-   return prof_tool(argc, argv, prof_fname, map_fname,
-trace_config_fname);
+   return prof_tool(argc, argv, trace_fname, map_fname, config_fname);
 }
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 14/14] Revert "fdtdec: drop needlessly convoluted CONFIG_PHANDLE_CHECK_SEQ"

2022-12-21 Thread Simon Glass
The fdt_path_offset() function is slow since it must scan the tree.
This substantial overhead now applies to all boards.

The original code may not be ideal but it is fit for purpose and is only
needed on a few boards.

Reverting this reduces time to set up driver model by about 30ms.

Before revert:

Accumulated time:
47,170  dm_r
53,237  dm_spl
   572,986  dm_f

Accumulated time:
44,598  dm_r
50,347  dm_spl
   549,133  dm_f

This reverts commit 26f981f295d00351b6f0c69b5317b254b2361cc0.

Signed-off-by: Simon Glass 
---

Changes in v1:
- Add detail of impact

 configs/am65x_evm_a53_defconfig  | 1 +
 configs/evb-ast2600_defconfig| 1 +
 configs/sama7g5ek_mmc1_defconfig | 1 +
 configs/sama7g5ek_mmc_defconfig  | 1 +
 lib/Kconfig  | 7 +++
 lib/fdtdec.c | 7 +--
 6 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index 84ca386eafd..e4b936b6ebb 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -178,3 +178,4 @@ CONFIG_USB_GADGET_VENDOR_NUM=0x0451
 CONFIG_USB_GADGET_PRODUCT_NUM=0x6162
 CONFIG_USB_GADGET_DOWNLOAD=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_PHANDLE_CHECK_SEQ=y
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 11f3d57a8f4..ae84b4962a2 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -119,3 +119,4 @@ CONFIG_WDT=y
 CONFIG_SHA384=y
 CONFIG_HEXDUMP=y
 # CONFIG_EFI_LOADER is not set
+CONFIG_PHANDLE_CHECK_SEQ=y
diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig
index f004e448039..ecb4dfc7854 100644
--- a/configs/sama7g5ek_mmc1_defconfig
+++ b/configs/sama7g5ek_mmc1_defconfig
@@ -79,3 +79,4 @@ CONFIG_TIMER=y
 CONFIG_MCHP_PIT64B_TIMER=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER_HII is not set
+CONFIG_PHANDLE_CHECK_SEQ=y
diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig
index 5b42fc63f30..1d5bccd15b3 100644
--- a/configs/sama7g5ek_mmc_defconfig
+++ b/configs/sama7g5ek_mmc_defconfig
@@ -79,3 +79,4 @@ CONFIG_TIMER=y
 CONFIG_MCHP_PIT64B_TIMER=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER_HII is not set
+CONFIG_PHANDLE_CHECK_SEQ=y
diff --git a/lib/Kconfig b/lib/Kconfig
index 1643f7d878a..4e6c1a53da7 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -1044,6 +1044,13 @@ config LMB_RESERVED_REGIONS
  Define the number of supported reserved regions in the library logical
  memory blocks.
 
+config PHANDLE_CHECK_SEQ
+   bool "Enable phandle check while getting sequence number"
+   help
+ When there are multiple device tree nodes with same name,
+  enable this config option to distinguish them using
+ phandles in fdtdec_get_alias_seq() function.
+
 endmenu
 
 menu "FWU Multi Bank Updates"
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 8d5c68860ec..0827e16859f 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -519,8 +519,11 @@ int fdtdec_get_alias_seq(const void *blob, const char 
*base, int offset,
 * Adding an extra check to distinguish DT nodes with
 * same name
 */
-   if (offset != fdt_path_offset(blob, prop))
-   continue;
+   if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
+   if (fdt_get_phandle(blob, offset) !=
+   fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
+   continue;
+   }
 
val = trailing_strtol(name);
if (val != -1) {
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 12/14] trace: Don't require TIMER_EARLY

2022-12-21 Thread Simon Glass
Some platforms cannot honour this and don't need trace before relocation.
Use 'imply' instead, so boards can disable this.

Signed-off-by: Simon Glass 
---

 lib/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/Kconfig b/lib/Kconfig
index b51455a5f77..1643f7d878a 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -316,7 +316,7 @@ config BITREVERSE
 config TRACE
bool "Support for tracing of function calls and timing"
imply CMD_TRACE
-   select TIMER_EARLY
+   imply TIMER_EARLY
help
  Enables function tracing within U-Boot. This allows recording of call
  traces including timing information. The command can write data to
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 09/14] mkimage: Add a few more messages for FIT failures

2022-12-21 Thread Simon Glass
Add messages to make it clearer which part of the FIT creation is failing.
This can happen when an invalid 'algo' property is provided in the .its
file.

Signed-off-by: Simon Glass 
---

 tools/fit_image.c  | 4 +++-
 tools/image-host.c | 6 +-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/tools/fit_image.c b/tools/fit_image.c
index 923a9755b70..8a18b1b0ba9 100644
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -36,8 +36,10 @@ static int fit_add_file_data(struct image_tool_params 
*params, size_t size_inc,
 
tfd = mmap_fdt(params->cmdname, tmpfile, size_inc, , , true,
   false);
-   if (tfd < 0)
+   if (tfd < 0) {
+   fprintf(stderr, "Cannot map FDT file '%s'\n", tmpfile);
return -EIO;
+   }
 
if (params->keydest) {
struct stat dest_sbuf;
diff --git a/tools/image-host.c b/tools/image-host.c
index 4e0512be634..4a24dee8153 100644
--- a/tools/image-host.c
+++ b/tools/image-host.c
@@ -1292,8 +1292,12 @@ int fit_add_verification_data(const char *keydir, const 
char *keyfile,
ret = fit_image_add_verification_data(keydir, keyfile, keydest,
fit, noffset, comment, require_keys, engine_id,
cmdname, algo_name);
-   if (ret)
+   if (ret) {
+   printf("Can't add verification data for node '%s' 
(%s)\n",
+  fdt_get_name(fit, noffset, NULL),
+  fdt_strerror(ret));
return ret;
+   }
}
 
/* If there are no keys, we can't sign configurations */
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 11/14] trace: Update trace-format generator for newer version

2022-12-21 Thread Simon Glass
This now includes flags and the layout has changed slightly in recent
versions of Linux. Update the generator accordingly.

Signed-off-by: Simon Glass 
---

 tools/proftool.c | 19 +--
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/tools/proftool.c b/tools/proftool.c
index 0ba84d30c19..b66ea556486 100644
--- a/tools/proftool.c
+++ b/tools/proftool.c
@@ -163,7 +163,7 @@ static int read_data(FILE *fin, void *buff, int size)
if (!err)
return 1;
if (err != size) {
-   error("Cannot read profile file at pos %ld\n", ftell(fin));
+   error("Cannot read profile file at pos %lx\n", ftell(fin));
return -1;
}
return 0;
@@ -496,10 +496,17 @@ static int make_ftrace(void)
int missing_count = 0, skip_count = 0;
int i;
 
-   printf("# tracer: ftrace\n"
-   "#\n"
-   "#   TASK-PID   CPU#TIMESTAMP  FUNCTION\n"
-   "#  | |  |  | |\n");
+   printf("# tracer: function\n"
+ "#\n"
+ "# entries-in-buffer/entries-written: 140080/250280   #P:4\n"
+ "#\n"
+ "#  _-=> irqs-off\n"
+ "# / _=> need-resched\n"
+ "#| / _---=> hardirq/softirq\n"
+ "#|| / _--=> preempt-depth\n"
+ "#||| / delay\n"
+ "#   TASK-PID   CPU#  TIMESTAMP  FUNCTION\n"
+ "#  | |   |      | |\n");
for (i = 0, call = call_list; i < call_count; i++, call++) {
struct func_info *func = find_func_by_offset(call->func);
ulong time = call->flags & FUNCF_TIMESTAMP_MASK;
@@ -521,7 +528,7 @@ static int make_ftrace(void)
continue;
}
 
-   printf("%16s-%-5d [01] %lu.%06lu: ", "uboot", 1,
+   printf("%16s-%-5d [000]   %lu.%06lu: ", "uboot", 1,
   time / 100, time % 100);
 
out_func(call->func, 0, " <- ");
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 08/14] trace: Move trace pointer to data section

2022-12-21 Thread Simon Glass
This can be written before relocation. Move it to the data section, since
accessing BSS before relocation is not permitted.

Signed-off-by: Simon Glass 
---

 lib/trace.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/trace.c b/lib/trace.c
index 880d90ebd5c..b9dc6d2e4b5 100644
--- a/lib/trace.c
+++ b/lib/trace.c
@@ -40,7 +40,8 @@ struct trace_hdr {
int max_depth;
 };
 
-static struct trace_hdr *hdr;  /* Pointer to start of trace buffer */
+/* Pointer to start of trace buffer */
+static struct trace_hdr *hdr __section(".data");
 
 static inline uintptr_t __attribute__((no_instrument_function))
func_ptr_to_num(void *func_ptr)
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 05/14] fdt: Drop ifdefs in fdtdec_prepare_fdt()

2022-12-21 Thread Simon Glass
This function is a bit messy with several #ifdefs. Convert them to use C
for the conditions.

Rewrite the function comment since most of it is stale.

Signed-off-by: Simon Glass 
---

 lib/fdtdec.c | 32 +---
 1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6388bb8b897..891b274aa3c 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -586,30 +587,31 @@ int fdtdec_get_chosen_node(const void *blob, const char 
*name)
return fdt_path_offset(blob, prop);
 }
 
-/*
- * This function is a little odd in that it accesses global data. At some
- * point if the architecture board.c files merge this will make more sense.
- * Even now, it is common code.
+/**
+ * fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot
+ *
+ * If not, a message is printed to the console if the console is ready.
+ *
+ * Return: 0 if all ok, -ENOENT if not
  */
 static int fdtdec_prepare_fdt(void)
 {
if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
fdt_check_header(gd->fdt_blob)) {
-#ifdef CONFIG_SPL_BUILD
-   puts("Missing DTB\n");
-#else
-   printf("No valid device tree binary found at %p\n",
-  gd->fdt_blob);
-# ifdef DEBUG
-   if (gd->fdt_blob) {
-   printf("fdt_blob=%p\n", gd->fdt_blob);
+   if (spl_phase() <= PHASE_SPL) {
+   puts("Missing DTB\n");
+   } else {
+   printf("No valid device tree binary found at %p\n",
+  gd->fdt_blob);
+   if (_DEBUG && gd->fdt_blob) {
+   printf("fdt_blob=%p\n", gd->fdt_blob);
print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
 32, 0);
+   }
}
-# endif
-#endif
-   return -1;
+   return -ENOENT;
}
+
return 0;
 }
 
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 07/14] fdt: Check for overlapping data and FDT

2022-12-21 Thread Simon Glass
If the FDT overlaps with the data region of the image, or with the stack,
it can become corrupted before relocation. Add a check for this, behind a
debug flag, as it can be very confusing and time-consuming to debug.

Signed-off-by: Simon Glass 
---

 lib/fdtdec.c | 23 +++
 1 file changed, 23 insertions(+)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 03c9ceab773..8d5c68860ec 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1231,6 +1231,29 @@ static void *fdt_find_separate(void)
 #else
/* FDT is at end of image */
fdt_blob = (ulong *)&_end;
+
+   if (_DEBUG && !fdtdec_prepare_fdt(fdt_blob)) {
+   int stack_ptr;
+   const void *top = fdt_blob + fdt_totalsize(fdt_blob);
+
+   /*
+* Perform a sanity check on the memory layout. If this fails,
+* it indicates that the device tree is positioned above the
+* global data pointer or the stack pointer. This should not
+* happen.
+*
+* If this fails, check that SYS_INIT_SP_ADDR has enough space
+* below it for SYS_MALLOC_F_LEN and global_data, as well as the
+* stack, without overwriting the device tree or U-Boot itself.
+* Since the device tree is sitting at _end (the start of the
+* BSS region), we need the top of the device tree to be below
+* any memory allocated by board_init_f_alloc_reserve().
+*/
+   if (top > (void *)gd || top > (void *)_ptr) {
+   printf("FDT %p gd %p\n", fdt_blob, gd);
+   panic("FDT overlap");
+   }
+   }
 #endif
 
return fdt_blob;
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 06/14] fdt: Pass the device tree to fdtdec_prepare_fdt()

2022-12-21 Thread Simon Glass
This function uses gd->fdt_blob a lot and cannot be used to check any
other device tree. Use a parameter instead.

Signed-off-by: Simon Glass 
---

 lib/fdtdec.c | 22 +++---
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 891b274aa3c..03c9ceab773 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -590,23 +590,23 @@ int fdtdec_get_chosen_node(const void *blob, const char 
*name)
 /**
  * fdtdec_prepare_fdt() - Check we have a valid fdt available to control U-Boot
  *
+ * @blob: Blob to check
+ *
  * If not, a message is printed to the console if the console is ready.
  *
  * Return: 0 if all ok, -ENOENT if not
  */
-static int fdtdec_prepare_fdt(void)
+static int fdtdec_prepare_fdt(const void *blob)
 {
-   if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
-   fdt_check_header(gd->fdt_blob)) {
+   if (!blob || ((uintptr_t)blob & 3) || fdt_check_header(blob)) {
if (spl_phase() <= PHASE_SPL) {
puts("Missing DTB\n");
} else {
printf("No valid device tree binary found at %p\n",
-  gd->fdt_blob);
-   if (_DEBUG && gd->fdt_blob) {
-   printf("fdt_blob=%p\n", gd->fdt_blob);
-   print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
-32, 0);
+  blob);
+   if (_DEBUG && blob) {
+   printf("fdt_blob=%p\n", blob);
+   print_buffer((ulong)blob, blob, 4, 32, 0);
}
}
return -ENOENT;
@@ -623,7 +623,7 @@ int fdtdec_check_fdt(void)
 * FDT (prior to console ready) will need to make their own
 * arrangements and do their own checks.
 */
-   assert(!fdtdec_prepare_fdt());
+   assert(!fdtdec_prepare_fdt(gd->fdt_blob));
return 0;
 }
 
@@ -1668,7 +1668,7 @@ int fdtdec_setup(void)
if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
setup_multi_dtb_fit();
 
-   ret = fdtdec_prepare_fdt();
+   ret = fdtdec_prepare_fdt(gd->fdt_blob);
if (!ret)
ret = fdtdec_board_setup(gd->fdt_blob);
oftree_reset();
@@ -1700,7 +1700,7 @@ int fdtdec_resetup(int *rescan)
 
*rescan = 1;
gd->fdt_blob = fdt_blob;
-   return fdtdec_prepare_fdt();
+   return fdtdec_prepare_fdt(fdt_blob);
}
 
/*
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 03/14] tpm: Add a proper Kconfig option for crc8 in SPL

2022-12-21 Thread Simon Glass
The current approach is a bit of a hack and only works for the tpm
subsystem. Add a Kconfig so that crc8 can be enabled in SPL for other
purposes.

Signed-off-by: Simon Glass 
---

 lib/Kconfig  | 17 +
 lib/Makefile |  3 ++-
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/lib/Kconfig b/lib/Kconfig
index def36f275ce..b51455a5f77 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -422,6 +422,7 @@ config TPM
 config SPL_TPM
bool "Trusted Platform Module (TPM) Support in SPL"
depends on SPL_DM
+   imply SPL_CRC8
help
  This enables support for TPMs which can be used to provide security
  features for your board. The TPM can be connected via LPC or I2C
@@ -617,6 +618,22 @@ config SPL_MD5
  security applications, but it can be useful for providing a quick
  checksum of a block of data.
 
+config CRC8
+   def_bool y
+   help
+ Enables CRC8 support in U-Boot. This is normally required. CRC8 is
+ a simple and fast checksumming algorithm which does a bytewise
+ checksum with feedback to produce an 8-bit result. The code is small
+ and it does not require a lookup table (unlike CRC32).
+
+config SPL_CRC8
+   bool "Support CRC8 in SPL"
+   help
+ Enables CRC8 support in SPL. This is not normally required. CRC8 is
+ a simple and fast checksumming algorithm which does a bytewise
+ checksum with feedback to produce an 8-bit result. The code is small
+ and it does not require a lookup table (unlike CRC32).
+
 config CRC32
def_bool y
help
diff --git a/lib/Makefile b/lib/Makefile
index d77b33e7f48..a282e40258c 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -57,12 +57,13 @@ endif
 
 obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm-common.o
 ifeq ($(CONFIG_$(SPL_TPL_)TPM),y)
-obj-y += crc8.o
 obj-$(CONFIG_TPM) += tpm_api.o
 obj-$(CONFIG_TPM_V1) += tpm-v1.o
 obj-$(CONFIG_TPM_V2) += tpm-v2.o
 endif
 
+obj-$(CONFIG_$(SPL_TPL_)CRC8) += crc8.o
+
 obj-y += crypto/
 
 obj-$(CONFIG_$(SPL_TPL_)GENERATE_ACPI_TABLE) += acpi/
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 04/14] fdt: Avoid exporting fdtdec_prepare_fdt()

2022-12-21 Thread Simon Glass
This function is not used outside this file. Make it static.

Signed-off-by: Simon Glass 
---

 include/fdtdec.h |  9 -
 lib/fdtdec.c | 26 +-
 2 files changed, 13 insertions(+), 22 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 12355afd7fa..aa61a0fca1a 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -554,15 +554,6 @@ uint64_t fdtdec_get_uint64(const void *blob, int node, 
const char *prop_name,
  */
 int fdtdec_get_is_enabled(const void *blob, int node);
 
-/**
- * Make sure we have a valid fdt available to control U-Boot.
- *
- * If not, a message is printed to the console if the console is ready.
- *
- * Return: 0 if all ok, -1 if not
- */
-int fdtdec_prepare_fdt(void);
-
 /**
  * Checks that we have a valid fdt available to control U-Boot.
 
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 64c5b3da15e..6388bb8b897 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -586,24 +586,12 @@ int fdtdec_get_chosen_node(const void *blob, const char 
*name)
return fdt_path_offset(blob, prop);
 }
 
-int fdtdec_check_fdt(void)
-{
-   /*
-* We must have an FDT, but we cannot panic() yet since the console
-* is not ready. So for now, just assert(). Boards which need an early
-* FDT (prior to console ready) will need to make their own
-* arrangements and do their own checks.
-*/
-   assert(!fdtdec_prepare_fdt());
-   return 0;
-}
-
 /*
  * This function is a little odd in that it accesses global data. At some
  * point if the architecture board.c files merge this will make more sense.
  * Even now, it is common code.
  */
-int fdtdec_prepare_fdt(void)
+static int fdtdec_prepare_fdt(void)
 {
if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
fdt_check_header(gd->fdt_blob)) {
@@ -625,6 +613,18 @@ int fdtdec_prepare_fdt(void)
return 0;
 }
 
+int fdtdec_check_fdt(void)
+{
+   /*
+* We must have an FDT, but we cannot panic() yet since the console
+* is not ready. So for now, just assert(). Boards which need an early
+* FDT (prior to console ready) will need to make their own
+* arrangements and do their own checks.
+*/
+   assert(!fdtdec_prepare_fdt());
+   return 0;
+}
+
 int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
 {
const u32 *phandle;
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH 01/14] trace: Use notrace for short

2022-12-21 Thread Simon Glass
The attribute syntax is quite verbose. Use the macro provided for this
purpose.

Signed-off-by: Simon Glass 
---

 arch/arm/cpu/armv7/s5p-common/timer.c   |  2 +-
 arch/arm/mach-exynos/include/mach/cpu.h |  6 +++---
 arch/x86/include/asm/global_data.h  |  2 +-
 arch/x86/include/asm/msr.h  |  2 +-
 arch/x86/include/asm/u-boot-x86.h   |  2 +-
 common/spl/spl_fit.c|  1 +
 doc/develop/trace.rst   |  2 +-
 lib/efi_loader/efi_freestanding.c   |  4 ++--
 lib/trace.c | 26 +++--
 9 files changed, 22 insertions(+), 25 deletions(-)

diff --git a/arch/arm/cpu/armv7/s5p-common/timer.c 
b/arch/arm/cpu/armv7/s5p-common/timer.c
index 8533d04878c..65e3ec39ae3 100644
--- a/arch/arm/cpu/armv7/s5p-common/timer.c
+++ b/arch/arm/cpu/armv7/s5p-common/timer.c
@@ -86,7 +86,7 @@ unsigned long get_timer(unsigned long base)
return time_ms - base;
 }
 
-unsigned long __attribute__((no_instrument_function)) timer_get_us(void)
+unsigned long notrace timer_get_us(void)
 {
static unsigned long base_time_us;
 
diff --git a/arch/arm/mach-exynos/include/mach/cpu.h 
b/arch/arm/mach-exynos/include/mach/cpu.h
index fb5fdaf3ba8..dab148e3320 100644
--- a/arch/arm/mach-exynos/include/mach/cpu.h
+++ b/arch/arm/mach-exynos/include/mach/cpu.h
@@ -248,7 +248,7 @@ static inline char *s5p_get_cpu_name(void)
 }
 
 #define IS_SAMSUNG_TYPE(type, id)  \
-static inline int __attribute__((no_instrument_function)) cpu_is_##type(void) \
+static inline int notrace cpu_is_##type(void)  \
 {  \
return (s5p_cpu_id >> 12) == id;\
 }
@@ -257,7 +257,7 @@ IS_SAMSUNG_TYPE(exynos4, 0x4)
 IS_SAMSUNG_TYPE(exynos5, 0x5)
 
 #define IS_EXYNOS_TYPE(type, id)   \
-static inline int __attribute__((no_instrument_function)) \
+static inline int notrace  \
proid_is_##type(void)   \
 {  \
return s5p_cpu_id == id;\
@@ -272,7 +272,7 @@ IS_EXYNOS_TYPE(exynos5422, 0x5422)
 #define proid_is_exynos542x() (proid_is_exynos5420() || proid_is_exynos5422())
 
 #define SAMSUNG_BASE(device, base) \
-static inline unsigned long __attribute__((no_instrument_function)) \
+static inline unsigned long notrace\
samsung_get_base_##device(void) \
 {  \
if (cpu_is_exynos4()) { \
diff --git a/arch/x86/include/asm/global_data.h 
b/arch/x86/include/asm/global_data.h
index 23693f85a78..22d103df4ee 100644
--- a/arch/x86/include/asm/global_data.h
+++ b/arch/x86/include/asm/global_data.h
@@ -137,7 +137,7 @@ struct arch_global_data {
 
 #define DECLARE_GLOBAL_DATA_PTR   extern struct global_data *global_data_ptr
 # else
-static inline __attribute__((no_instrument_function)) gd_t *get_fs_gd_ptr(void)
+static inline notrace gd_t *get_fs_gd_ptr(void)
 {
gd_t *gd_ptr;
 
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 3e613de6cef..27764fc56cb 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -71,7 +71,7 @@ static inline unsigned long long native_read_tscp(unsigned 
int *aux)
 #define EAX_EDX_RET(val, low, high)"=A" (val)
 #endif
 
-static inline __attribute__((no_instrument_function))
+static inline notrace
unsigned long long native_read_msr(unsigned int msr)
 {
DECLARE_ARGS(val, low, high);
diff --git a/arch/x86/include/asm/u-boot-x86.h 
b/arch/x86/include/asm/u-boot-x86.h
index 4cf41e93541..8f38c2d1c60 100644
--- a/arch/x86/include/asm/u-boot-x86.h
+++ b/arch/x86/include/asm/u-boot-x86.h
@@ -108,7 +108,7 @@ voidboard_init_f_r(void) __attribute__ ((noreturn));
 int arch_misc_init(void);
 
 /* Read the time stamp counter */
-static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
+static inline notrace uint64_t rdtsc(void)
 {
uint32_t high, low;
__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 08da7fed88e..0e026bb3d8e 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -599,6 +599,7 @@ static int spl_fit_upload_fpga(struct spl_fit_info *ctx, 
int node,
debug("Ignoring compatible = %s property\n",
  compatible);
}
+   return 0;
 
ret = fpga_load(devnum, (void *)fpga_image->load_addr,
fpga_image->size, BIT_FULL, flags);
diff --git a/doc/develop/trace.rst b/doc/develop/trace.rst
index b22e068ef9e..5c7802da51a 100644
--- a/doc/develop/trace.rst
+++ b/doc/develop/trace.rst
@@ -185,7 +185,7 @@ this produces sensible results for your board. Suitable 
sources for
 this timer include high 

[PATCH 02/14] arm: Support trace on armv8

2022-12-21 Thread Simon Glass
Use the notrace attribute so that timer functions can be used when
tracing. This is required to avoid infinite loops when recording a trace.

Signed-off-by: Simon Glass 
---

 arch/arm/cpu/armv8/generic_timer.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv8/generic_timer.c 
b/arch/arm/cpu/armv8/generic_timer.c
index f27a74b9d09..8f83372cbca 100644
--- a/arch/arm/cpu/armv8/generic_timer.c
+++ b/arch/arm/cpu/armv8/generic_timer.c
@@ -17,7 +17,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /*
  * Generic timer implementation of get_tbclk()
  */
-unsigned long get_tbclk(void)
+unsigned long notrace get_tbclk(void)
 {
unsigned long cntfrq;
asm volatile("mrs %0, cntfrq_el0" : "=r" (cntfrq));
@@ -78,7 +78,7 @@ unsigned long timer_read_counter(void)
 /*
  * timer_read_counter() using the Arm Generic Timer (aka arch timer).
  */
-unsigned long timer_read_counter(void)
+unsigned long notrace timer_read_counter(void)
 {
unsigned long cntpct;
 
@@ -89,7 +89,7 @@ unsigned long timer_read_counter(void)
 }
 #endif
 
-uint64_t get_ticks(void)
+uint64_t notrace get_ticks(void)
 {
unsigned long ticks = timer_read_counter();
 
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH v8 13/13] treewide: Disable USE_SPL_FIT_GENERATOR by default

2022-12-21 Thread Simon Glass
This option is deprecated and only used by two boards. Enable it for just
those two boards, so others don't accidentally enable it.

Signed-off-by: Simon Glass 
---

(no changes since v6)

Changes in v6:
- Add new patch to disable USE_SPL_FIT_GENERATOR by default
- Add new patch to allow a binman entry to be marked absent

Changes in v3:
- Add support for writing sections in binman
- Rebase to master

Changes in v2:
- Drop patches previously applied
- Add various suggestions from Alper Nebi Yasak
- Add patches to refactor binman's FIT support

 boot/Kconfig | 5 +++--
 configs/am335x_evm_defconfig | 1 -
 configs/am335x_hs_evm_defconfig  | 1 -
 configs/am335x_hs_evm_uart_defconfig | 1 -
 configs/am43xx_evm_defconfig | 1 -
 configs/am43xx_evm_rtconly_defconfig | 1 -
 configs/am43xx_evm_usbhost_boot_defconfig| 1 -
 configs/am43xx_hs_evm_defconfig  | 1 -
 configs/am57xx_evm_defconfig | 1 -
 configs/am57xx_hs_evm_defconfig  | 1 -
 configs/am57xx_hs_evm_usb_defconfig  | 1 -
 configs/am65x_evm_a53_defconfig  | 1 -
 configs/am65x_evm_r5_defconfig   | 1 -
 configs/am65x_hs_evm_a53_defconfig   | 1 -
 configs/am65x_hs_evm_r5_defconfig| 1 -
 .../avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0_defconfig   | 1 +
 configs/cgtqmx8_defconfig| 1 -
 configs/chromebook_link64_defconfig  | 1 -
 configs/dh_imx6_defconfig| 1 -
 configs/display5_defconfig   | 1 -
 configs/display5_factory_defconfig   | 1 -
 configs/dra7xx_evm_defconfig | 1 -
 configs/dra7xx_hs_evm_defconfig  | 1 -
 configs/dra7xx_hs_evm_usb_defconfig  | 1 -
 configs/evb-ast2600_defconfig| 1 -
 configs/evb-rk3229_defconfig | 1 -
 configs/evb-rk3288_defconfig | 1 -
 configs/gwventana_emmc_defconfig | 1 -
 configs/gwventana_gw5904_defconfig   | 1 -
 configs/gwventana_nand_defconfig | 1 -
 configs/imx6qdl_icore_mipi_defconfig | 1 -
 configs/imx6qdl_icore_mmc_defconfig  | 1 -
 configs/imx6qdl_icore_rqs_defconfig  | 1 -
 configs/imx8mm-cl-iot-gate-optee_defconfig   | 1 -
 configs/imx8mm-cl-iot-gate_defconfig | 1 -
 configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 1 -
 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig| 1 -
 configs/imx8mm-mx8menlo_defconfig| 1 -
 configs/imx8mm_beacon_defconfig  | 1 -
 configs/imx8mm_data_modul_edm_sbc_defconfig  | 1 -
 configs/imx8mm_evk_defconfig | 1 -
 configs/imx8mm_evk_fspi_defconfig| 1 -
 configs/imx8mm_venice_defconfig  | 1 -
 configs/imx8mn_beacon_2g_defconfig   | 1 -
 configs/imx8mn_beacon_defconfig  | 1 -
 configs/imx8mn_bsh_smm_s2_defconfig  | 1 -
 configs/imx8mn_bsh_smm_s2pro_defconfig   | 1 -
 configs/imx8mn_ddr4_evk_defconfig| 1 -
 configs/imx8mn_evk_defconfig | 1 -
 configs/imx8mn_var_som_defconfig | 1 -
 configs/imx8mn_venice_defconfig  | 1 -
 configs/imx8mp-icore-mx8mp-edimm2.2_defconfig| 1 -
 configs/imx8mp_dhcom_pdk2_defconfig  | 1 -
 configs/imx8mp_evk_defconfig | 1 -
 configs/imx8mp_rsb3720a1_4G_defconfig| 1 -
 configs/imx8mp_rsb3720a1_6G_defconfig| 1 -
 configs/imx8mp_venice_defconfig  | 1 -
 configs/imx8mq_cm_defconfig  | 1 -
 configs/imx8mq_evk_defconfig | 1 -
 configs/imx8mq_phanbell_defconfig| 1 -
 configs/imx8qm_rom7720_a1_4G_defconfig   | 1 -
 configs/iot2050_defconfig| 1 -
 configs/j7200_evm_a72_defconfig  | 1 -
 configs/j7200_evm_r5_defconfig   | 1 -
 configs/j7200_hs_evm_a72_defconfig   | 1 -
 

[PATCH v8 12/13] rockchip: Drop the FIT generator script

2022-12-21 Thread Simon Glass
This is not used anymore. Drop it.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 Makefile   |   3 -
 arch/arm/mach-rockchip/make_fit_atf.py | 267 -
 boot/Kconfig   |   1 -
 3 files changed, 271 deletions(-)
 delete mode 100755 arch/arm/mach-rockchip/make_fit_atf.py

diff --git a/Makefile b/Makefile
index 4e7091779de..b5eca383820 100644
--- a/Makefile
+++ b/Makefile
@@ -1373,9 +1373,6 @@ $(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
 else
 ifneq ($(CONFIG_USE_SPL_FIT_GENERATOR),)
 U_BOOT_ITS := u-boot.its
-ifeq ($(CONFIG_SPL_FIT_GENERATOR),"arch/arm/mach-rockchip/make_fit_atf.py")
-U_BOOT_ITS_DEPS += u-boot
-endif
 $(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE
$(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \
$(patsubst %,arch/$(ARCH)/dts/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@
diff --git a/arch/arm/mach-rockchip/make_fit_atf.py 
b/arch/arm/mach-rockchip/make_fit_atf.py
deleted file mode 100755
index 08cfe9f51e9..000
--- a/arch/arm/mach-rockchip/make_fit_atf.py
+++ /dev/null
@@ -1,267 +0,0 @@
-#!/usr/bin/env python3
-"""
-# SPDX-License-Identifier: GPL-2.0+
-#
-# A script to generate FIT image source for rockchip boards
-# with ARM Trusted Firmware
-# and multiple device trees (given on the command line)
-#
-# usage: $0  [ [;
-
-   images {
-"""
-
-DT_UBOOT = """
-   uboot {
-   description = "U-Boot (64-bit)";
-   data = /incbin/("u-boot-nodtb.bin");
-   type = "standalone";
-   os = "U-Boot";
-   arch = "arm64";
-   compression = "none";
-   load = <0x%08x>;
-   };
-
-"""
-
-DT_IMAGES_NODE_END = """   };
-
-"""
-
-DT_END = "};"
-
-def append_bl31_node(file, atf_index, phy_addr, elf_entry):
-# Append BL31 DT node to input FIT dts file.
-data = 'bl31_0x%08x.bin' % phy_addr
-file.write('\t\tatf_%d {\n' % atf_index)
-file.write('\t\t\tdescription = \"ARM Trusted Firmware\";\n')
-file.write('\t\t\tdata = /incbin/("%s");\n' % data)
-file.write('\t\t\ttype = "firmware";\n')
-file.write('\t\t\tarch = "arm64";\n')
-file.write('\t\t\tos = "arm-trusted-firmware";\n')
-file.write('\t\t\tcompression = "none";\n')
-file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
-if atf_index == 1:
-file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
-file.write('\t\t};\n')
-file.write('\n')
-
-def append_tee_node(file, atf_index, phy_addr, elf_entry):
-# Append TEE DT node to input FIT dts file.
-data = 'tee_0x%08x.bin' % phy_addr
-file.write('\t\tatf_%d {\n' % atf_index)
-file.write('\t\t\tdescription = \"TEE\";\n')
-file.write('\t\t\tdata = /incbin/("%s");\n' % data)
-file.write('\t\t\ttype = "tee";\n')
-file.write('\t\t\tarch = "arm64";\n')
-file.write('\t\t\tos = "tee";\n')
-file.write('\t\t\tcompression = "none";\n')
-file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
-file.write('\t\t\tentry = <0x%08x>;\n' % elf_entry)
-file.write('\t\t};\n')
-file.write('\n')
-
-def append_fdt_node(file, dtbs):
-# Append FDT nodes.
-cnt = 1
-for dtb in dtbs:
-dtname = os.path.basename(dtb)
-file.write('\t\tfdt_%d {\n' % cnt)
-file.write('\t\t\tdescription = "%s";\n' % dtname)
-file.write('\t\t\tdata = /incbin/("%s");\n' % dtb)
-file.write('\t\t\ttype = "flat_dt";\n')
-file.write('\t\t\tcompression = "none";\n')
-file.write('\t\t};\n')
-file.write('\n')
-cnt = cnt + 1
-
-def append_conf_section(file, cnt, dtname, segments):
-file.write('\t\tconfig_%d {\n' % cnt)
-file.write('\t\t\tdescription = "%s";\n' % dtname)
-file.write('\t\t\tfirmware = "atf_1";\n')
-file.write('\t\t\tloadables = "uboot"')
-if segments > 1:
-file.write(',')
-for i in range(1, segments):
-file.write('"atf_%d"' % (i + 1))
-if i != (segments - 1):
-file.write(',')
-else:
-file.write(';\n')
-if segments <= 1:
-file.write(';\n')
-file.write('\t\t\tfdt = "fdt_%d";\n' % cnt)
-file.write('\t\t};\n')
-file.write('\n')
-
-def append_conf_node(file, dtbs, segments):
-# Append configeration nodes.
-cnt = 1
-file.write('\tconfigurations {\n')
-file.write('\t\tdefault = "config_1";\n')
-for dtb in dtbs:
-dtname = os.path.basename(dtb)
-append_conf_section(file, cnt, dtname, segments)
-cnt = cnt + 1
-file.write('\t};\n')
-file.write('\n')
-
-def generate_atf_fit_dts_uboot(fit_file, uboot_file_name):
-segments = unpack_elf(uboot_file_name)
-if len(segments) != 1:
-raise ValueError("Invalid u-boot ELF image '%s'" % uboot_file_name)
-index, entry, p_paddr, data = segments[0]
-fit_file.write(DT_UBOOT % p_paddr)
-
-def 

[PATCH v8 10/13] rockchip: Support building the all output files in binman

2022-12-21 Thread Simon Glass
Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:

   - tpl/u-boot-tpl-rockchip.bin if TPL is enabled
   - idbloader.img if either or both of SPL and TPL are enabled
   - u-boot.itb if SPL_FIT is enabled
   - u-boot-rockchip.bin if SPL is used, either using u-boot.itb when
 SPL_FIT is enabled or u-boot.img when it isn't

Note that the intermediate files are dropped with binman, since it
producing everything in one pass. This means that
tpl/u-boot-tpl-rockchip.bin is not created, for example.

Note that for some 32-bit rk3288 boards, rockchip-optee.dtsi is included.

Signed-off-by: Simon Glass 
---

Changes in v8:
- Make OP-TEE image optional
- Specify an entry address for U-Boot

Changes in v5:
- Rename blob to fit for puma and also SPI image

Changes in v3:
- Add an offset to the FIT description

Changes in v2:
- Rename op-tee to tee-os
- Drop use of .itb2

 arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi |  4 +-
 arch/arm/dts/rockchip-u-boot.dtsi   | 78 +++--
 2 files changed, 74 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi 
b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
index d2349ae90e2..088861dbf6d 100644
--- a/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
@@ -46,14 +46,14 @@
 
  {
simple-bin {
-   blob {
+   fit {
offset = <((CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR - 
64) * 512)>;
};
};
 
 #ifdef CONFIG_ROCKCHIP_SPI_IMAGE
simple-bin-spi {
-   blob {
+   fit {
/* same as u-boot,spl-payload-offset */
offset = <0x8>;
};
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi 
b/arch/arm/dts/rockchip-u-boot.dtsi
index fa094b00392..234fc5df433 100644
--- a/arch/arm/dts/rockchip-u-boot.dtsi
+++ b/arch/arm/dts/rockchip-u-boot.dtsi
@@ -30,14 +30,79 @@
};
};
 
-#ifdef CONFIG_ARM64
-   blob {
+#if defined(CONFIG_SPL_FIT) && defined(CONFIG_ARM64)
+   fit: fit {
+   description = "FIT image for U-Boot with bl31 (TF-A)";
+   #address-cells = <1>;
+   fit,fdt-list = "of-list";
filename = "u-boot.itb";
+   fit,external-offset = ;
+   offset = ;
+   images {
+   u-boot {
+   description = "U-Boot (64-bit)";
+   type = "standalone";
+   os = "U-Boot";
+   arch = "arm64";
+   compression = "none";
+   load = ;
+   entry = ;
+   u-boot-nodtb {
+   };
+   };
+
+   @atf-SEQ {
+   fit,operation = "split-elf";
+   description = "ARM Trusted Firmware";
+   type = "firmware";
+   arch = "arm64";
+   os = "arm-trusted-firmware";
+   compression = "none";
+   fit,load;
+   fit,entry;
+   fit,data;
+
+   atf-bl31 {
+   };
+   };
+   @tee-SEQ {
+   fit,operation = "split-elf";
+   description = "TEE";
+   type = "tee";
+   arch = "arm64";
+   os = "tee";
+   compression = "none";
+   fit,load;
+   fit,entry;
+   fit,data;
+
+   tee-os {
+   optional;
+   };
+   };
+
+   @fdt-SEQ {
+   description = "fdt-NAME";
+   compression = "none";
+   type = "flat_dt";
+   };
+   };
+
+   configurations {
+   default = "@config-DEFAULT-SEQ";
+

[PATCH v8 11/13] rockchip: Convert all boards to use binman

2022-12-21 Thread Simon Glass
Instead of the bash script, use binman to generate the FIT for arm64.

For 32-bit boards, use binman for all images, dropping the intermediate
files.

With this change, only Zynq is now using SPL_FIT_GENERATOR so update the
Kconfig rule accordingly.

Clean up the Makefile to the extent possible. Unfortunately, two boards
do not use SPL_FRAMEWORK so don't enable the u-boot.img rule:

   evb-rk3036
   kylin-rk3036

So a small remnant remains.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 Makefile | 8 +---
 boot/Kconfig | 2 +-
 2 files changed, 2 insertions(+), 8 deletions(-)

diff --git a/Makefile b/Makefile
index 8cd873fd5f4..4e7091779de 100644
--- a/Makefile
+++ b/Makefile
@@ -1006,14 +1006,9 @@ ifeq ($(CONFIG_INIT_SP_RELATIVE)$(CONFIG_OF_SEPARATE),yy)
 INPUTS-y += init_sp_bss_offset_check
 endif
 
-ifeq ($(CONFIG_ARCH_ROCKCHIP)$(CONFIG_SPL),yy)
-# Binman image dependencies
-ifeq ($(CONFIG_ARM64),y)
-INPUTS-y += u-boot.itb
-else
+ifeq ($(CONFIG_ARCH_ROCKCHIP)_$(CONFIG_SPL_FRAMEWORK),y_)
 INPUTS-y += u-boot.img
 endif
-endif
 
 INPUTS-$(CONFIG_X86) += u-boot-x86-start16.bin u-boot-x86-reset16.bin \
$(if $(CONFIG_SPL_X86_16BIT_INIT),spl/u-boot-spl.bin) \
@@ -1485,7 +1480,6 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
 u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE
$(call if_changed,pad_cat)
 
-
 ifeq ($(CONFIG_ARCH_LPC32XX)$(CONFIG_SPL),yy)
 MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE)
 
diff --git a/boot/Kconfig b/boot/Kconfig
index 668270cc660..2fec861acd3 100644
--- a/boot/Kconfig
+++ b/boot/Kconfig
@@ -277,7 +277,7 @@ config SPL_FIT_SOURCE
 
 config USE_SPL_FIT_GENERATOR
bool "Use a script to generate the .its script"
-   default y if SPL_FIT && (!ARCH_SUNXI && !RISCV)
+   default y if SPL_FIT && ARCH_ZYNQMP
 
 config SPL_FIT_GENERATOR
string ".its file generator script for U-Boot FIT image"
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH v8 07/13] binman: Support optional external blobs

2022-12-21 Thread Simon Glass
Some blobs are actually not necessary for the board to work correctly. Add
a property to allow this to be indicated. Missing optional blobs do not
cause a build failure.

Signed-off-by: Simon Glass 
---

Changes in v8:
- Move support for optional external blobs into this series
- Support optional FIT images

 tools/binman/binman.rst|  9 +
 tools/binman/control.py| 11 +++
 tools/binman/entry.py  | 25 +
 tools/binman/etype/blob.py |  2 +-
 tools/binman/etype/fit.py  | 11 ++-
 tools/binman/etype/section.py  | 14 +-
 tools/binman/ftest.py  | 10 ++
 tools/binman/test/266_blob_ext_opt.dts | 21 +
 8 files changed, 92 insertions(+), 11 deletions(-)
 create mode 100644 tools/binman/test/266_blob_ext_opt.dts

diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index 1ab6d012b83..391494907ab 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -689,6 +689,15 @@ no-expanded:
 `no-expanded` property disables this just for a single entry. Put the
 `no-expanded` boolean property in the node to select this behaviour.
 
+optional:
+External blobs are normally required to be present for the image to be
+built (but see `External blobs`_). This properly allows an entry to be
+optional, so that when it is cannot be found, this problem is ignored and
+an empty file is used for this blob. This should be used only when the blob
+is entirely optional and is not needed for correct operation of the image.
+Note that missing, optional blobs do not produce a non-zero exit code from
+binman, although it does show a warning about the missing external blob.
+
 The attributes supported for images and sections are described below. Several
 are similar to those for entries.
 
diff --git a/tools/binman/control.py b/tools/binman/control.py
index 07225381146..e64740094f6 100644
--- a/tools/binman/control.py
+++ b/tools/binman/control.py
@@ -594,12 +594,14 @@ def ProcessImage(image, update_fdt, write_map, 
get_contents=True,
 image.BuildImage()
 if write_map:
 image.WriteMap()
+
 missing_list = []
 image.CheckMissing(missing_list)
 if missing_list:
 tout.warning("Image '%s' is missing external blobs and is 
non-functional: %s" %
  (image.name, ' '.join([e.name for e in missing_list])))
 _ShowHelpForMissingBlobs(missing_list)
+
 faked_list = []
 image.CheckFakedBlobs(faked_list)
 if faked_list:
@@ -607,6 +609,15 @@ def ProcessImage(image, update_fdt, write_map, 
get_contents=True,
 "Image '%s' has faked external blobs and is non-functional: %s" %
 (image.name, ' '.join([os.path.basename(e.GetDefaultFilename())
for e in faked_list])))
+
+optional_list = []
+image.CheckOptional(optional_list)
+if optional_list:
+tout.warning(
+"Image '%s' is missing external blobs but is still functional: %s" 
%
+(image.name, ' '.join([e.name for e in optional_list])))
+_ShowHelpForMissingBlobs(optional_list)
+
 missing_bintool_list = []
 image.check_missing_bintools(missing_bintool_list)
 if missing_bintool_list:
diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index de51d295891..d73f3013405 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -73,7 +73,9 @@ class Entry(object):
 compress: Compression algoithm used (e.g. 'lz4'), 'none' if none
 orig_offset: Original offset value read from node
 orig_size: Original size value read from node
-missing: True if this entry is missing its contents
+missing: True if this entry is missing its contents. Note that if it is
+optional, this entry will not appear in the list generated by
+entry.CheckMissing() since it is considered OK for it to be 
missing.
 allow_missing: Allow children of this entry to be missing (used by
 subclasses such as Entry_section)
 allow_fake: Allow creating a dummy fake file if the blob file is not
@@ -95,6 +97,7 @@ class Entry(object):
 the entry itself, allowing it to vanish in certain circumstances.
 An absent entry is removed during processing so that it does not
 appear in the map
+optional (bool): True if this entry contains an optional external blob
 """
 fake_dir = None
 
@@ -138,6 +141,7 @@ class Entry(object):
 self.elf_fname = None
 self.auto_write_symbols = auto_write_symbols
 self.absent = False
+self.optional = False
 
 @staticmethod
 def FindEntryClass(etype, expanded):
@@ -289,6 +293,7 @@ class Entry(object):
 self.offset_unset = fdt_util.GetBool(self._node, 'offset-unset')
 self.extend_size = fdt_util.GetBool(self._node, 

[PATCH v8 09/13] rockchip: Use multiple-images for rk3399

2022-12-21 Thread Simon Glass
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.

Signed-off-by: Simon Glass 
---

(no changes since v5)

Changes in v5:
- Rename from 'Include binman script in 64-bit boards'
- Drop duplicate #include in rk3368-u-boot.dtsi
- Keep the name as fit for puma
- Drop redundant check for CONFIG_ROCKCHIP_SPI_IMAGE
- Drop imply of BINMAN in Kconfig (rely on ARCH_ROCKCHIP instead)

 arch/arm/dts/rk3399-u-boot.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
index 3c1a15fe51b..85a4f472d5d 100644
--- a/arch/arm/dts/rk3399-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-u-boot.dtsi
@@ -62,6 +62,7 @@
 
 #if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
  {
+   multiple-images;
rom {
filename = "u-boot.rom";
size = <0x40>;
@@ -82,7 +83,7 @@
};
};
 };
-#endif
+#endif /* CONFIG_ROCKCHIP_SPI_IMAGE */
 
  {
u-boot,dm-pre-reloc;
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH v8 08/13] rockchip: evb-rk3288: Drop raw-image support

2022-12-21 Thread Simon Glass
This boards uses SPL_FIT so does not need to support loading a raw image.
Drop it to avoid binman trying to insert a symbol which has no value.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 configs/evb-rk3288_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig
index 8f8d34c7038..6d3bb5a2944 100644
--- a/configs/evb-rk3288_defconfig
+++ b/configs/evb-rk3288_defconfig
@@ -29,6 +29,7 @@ CONFIG_SILENT_CONSOLE=y
 CONFIG_DISPLAY_BOARDINFO_LATE=y
 CONFIG_SPL_PAD_TO=0x7f8000
 CONFIG_SPL_NO_BSS_LIMIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_STACK=0xff718000
 CONFIG_SPL_STACK_R=y
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH v8 06/13] binman: Support new op-tee binary format

2022-12-21 Thread Simon Glass
OP-TEE has a format with a binary header that can be used instead of the
ELF file. With newer versions of OP-TEE this may be required on some
platforms.

Add support for this in binman. First, add a method to obtain the ELF
sections from an entry, then use that in the FIT support. We then end up
with the ability to support both types of OP-TEE files, depending on which
one is passed in with the entry argument (TEE=xxx in the U-Boot build).

Signed-off-by: Simon Glass 
---

(no changes since v7)

Changes in v7:
- Correct missing test coverage

Changes in v6:
- Update op-tee to support new v1 binary header

 tools/binman/entries.rst | 35 -
 tools/binman/entry.py| 13 +++
 tools/binman/etype/fit.py| 69 +---
 tools/binman/etype/section.py|  9 +++
 tools/binman/etype/tee_os.py | 68 +++-
 tools/binman/ftest.py| 83 
 tools/binman/test/263_tee_os_opt.dts | 22 ++
 tools/binman/test/264_tee_os_opt_fit.dts | 33 
 tools/binman/test/265_tee_os_opt_fit_bad.dts | 40 ++
 9 files changed, 340 insertions(+), 32 deletions(-)
 create mode 100644 tools/binman/test/263_tee_os_opt.dts
 create mode 100644 tools/binman/test/264_tee_os_opt_fit.dts
 create mode 100644 tools/binman/test/265_tee_os_opt_fit_bad.dts

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index b2ce7960d3b..a3e4493a44f 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -1508,12 +1508,45 @@ Entry: tee-os: Entry containing an OP-TEE Trusted OS 
(TEE) blob
 
 Properties / Entry arguments:
 - tee-os-path: Filename of file to read into entry. This is typically
-called tee-pager.bin
+called tee.bin or tee.elf
 
 This entry holds the run-time firmware, typically started by U-Boot SPL.
 See the U-Boot README for your architecture or board for how to use it. See
 https://github.com/OP-TEE/optee_os for more information about OP-TEE.
 
+Note that if the file is in ELF format, it must go in a FIT. In that case,
+this entry will mark itself as absent, providing the data only through the
+read_elf_segments() method.
+
+Marking this entry as absent means that it if is used in the wrong context
+it can be automatically dropped. Thus it is possible to add anb OP-TEE entry
+like this::
+
+binman {
+tee-os {
+};
+};
+
+and pass either an ELF or plain binary in with -a tee-os-path 
+and have binman do the right thing:
+
+   - include the entry if tee.bin is provided and it doesn't have the v1
+ header
+   - drop it otherwise
+
+When used within a FIT, we can do::
+
+binman {
+fit {
+tee-os {
+};
+};
+};
+
+which will split the ELF into separate nodes for each segment, if an ELF
+file is provide (see Flat Image Tree / FIT), or produce a single node if
+the binary v1 format is provided.
+
 
 
 .. _etype_text:
diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index 637aece3705..de51d295891 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -1290,3 +1290,16 @@ features to produce new behaviours.
 def mark_absent(self, msg):
 tout.info("Entry '%s' marked absent: %s" % (self._node.path, msg))
 self.absent = True
+
+def read_elf_segments(self):
+"""Read segments from an entry that can generate an ELF file
+
+Returns:
+tuple:
+list of segments, each:
+int: Segment number (0 = first)
+int: Start address of segment in memory
+bytes: Contents of segment
+int: entry address of ELF file
+"""
+return None
diff --git a/tools/binman/etype/fit.py b/tools/binman/etype/fit.py
index 8ad4f3a8a83..21c769a1cbe 100644
--- a/tools/binman/etype/fit.py
+++ b/tools/binman/etype/fit.py
@@ -540,41 +540,34 @@ class Entry_fit(Entry_section):
 else:
 self.Raise("Generator node requires 'fit,fdt-list' 
property")
 
-def _gen_split_elf(base_node, node, elf_data, missing):
+def _gen_split_elf(base_node, node, segments, entry_addr):
 """Add nodes for the ELF file, one per group of contiguous segments
 
 Args:
 base_node (Node): Template node from the binman definition
 node (Node): Node to replace (in the FIT being built)
-data (bytes): ELF-format data to process (may be empty)
-missing (bool): True if any of the data is missing
 
+segments, entry_addr
+
+data (bytes): ELF-format data to process (may be empty)
 """
-# If any pieces are missing, skip this. The missing entries will
-# show an error
-if not missing:
-try:
-segments, entry = 

[PATCH v8 03/13] binman: Update entry docs

2022-12-21 Thread Simon Glass
These have got out of data recently. Regenerate them.

Signed-off-by: Simon Glass 
---

(no changes since v7)

Changes in v7:
- Correct an rST formatting error

Changes in v6:
- Add new patch to update entry docs

 tools/binman/entries.rst  | 171 ++
 tools/binman/etype/mkimage.py |  28 +++---
 2 files changed, 169 insertions(+), 30 deletions(-)

diff --git a/tools/binman/entries.rst b/tools/binman/entries.rst
index 3dc32db8a54..b2ce7960d3b 100644
--- a/tools/binman/entries.rst
+++ b/tools/binman/entries.rst
@@ -216,9 +216,9 @@ This is a blob containing a device tree. The contents of 
the blob are
 obtained from the list of available device-tree files, managed by the
 'state' module.
 
-Additional Properties / Entry arguments:
-- prepend: Header type to use:
-length: 32-bit length header
+Additional attributes:
+prepend: Header used (e.g. 'length')
+
 
 
 .. _etype_blob_ext:
@@ -1178,11 +1178,13 @@ Properties / Entry arguments:
 - multiple-data-files: boolean to tell binman to pass all files as
   datafiles to mkimage instead of creating a temporary file the result
   of datafiles concatenation
+- filename: filename of output binary generated by mkimage
 
 The data passed to mkimage via the -d flag is collected from subnodes of the
 mkimage node, e.g.::
 
 mkimage {
+filename = "imximage.bin";
 args = "-n test -T imximage";
 
 u-boot-spl {
@@ -1190,13 +1192,14 @@ mkimage node, e.g.::
 };
 
 This calls mkimage to create an imximage with `u-boot-spl.bin` as the data
-file, which mkimage being called like this::
+file, with mkimage being called like this::
 
 mkimage -d  -n test -T imximage 
 
 The output from mkimage then becomes part of the image produced by
-binman. If you need to put mulitple things in the data file, you can use
-a section, or just multiple subnodes like this::
+binman but also is written into `imximage.bin` file. If you need to put
+multiple things in the data file, you can use a section, or just multiple
+subnodes like this::
 
 mkimage {
 args = "-n test -T imximage";
@@ -1208,17 +1211,20 @@ a section, or just multiple subnodes like this::
 };
 };
 
+Note that binman places the contents (here SPL and TPL) into a single file
+and passes that to mkimage using the -d option.
+
 To pass all datafiles untouched to mkimage::
 
 mkimage {
-args = "-n rk3399 -T rkspi";
-multiple-data-files;
+args = "-n rk3399 -T rkspi";
+multiple-data-files;
 
-u-boot-tpl {
-};
+u-boot-tpl {
+};
 
-u-boot-spl {
-};
+u-boot-spl {
+};
 };
 
 This calls mkimage to create a Rockchip RK3399-specific first stage
@@ -1242,17 +1248,17 @@ the 'data-to-imagename' property::
 
 mkimage {
 args = "-T imximage";
-data-to-imagename';
+data-to-imagename;
 
 u-boot-spl {
 };
 };
 
 That will pass the data to mkimage both as the data file (with -d) and as
-the image name (with -n).
-
+the image name (with -n). In both cases, a filename is passed as the
+argument, with the actual data being in that file.
 
-If need to pass different data in with -n, then use an imagename subnode::
+If need to pass different data in with -n, then use an `imagename` subnode::
 
 mkimage {
 args = "-T imximage";
@@ -1271,6 +1277,7 @@ This will pass in u-boot-spl as the input data and the 
.cfgout file as the
 -n data.
 
 
+
 .. _etype_opensbi:
 
 Entry: opensbi: RISC-V OpenSBI fw_dynamic blob
@@ -1478,6 +1485,10 @@ skip-at-start
 be written at offset 4 in the image file, since the first 16 bytes are
 skipped when writing.
 
+filename
+filename to write the unpadded section contents to within the output
+directory (None to skip this).
+
 Since a section is also an entry, it inherits all the properies of entries
 too.
 
@@ -2034,6 +2045,134 @@ Entry types that have a part to play in handling 
microcode:
 
 
 
+.. _etype_u_boot_vpl:
+
+Entry: u-boot-vpl: U-Boot VPL binary
+
+
+Properties / Entry arguments:
+- filename: Filename of u-boot-vpl.bin (default 'vpl/u-boot-vpl.bin')
+
+This is the U-Boot VPL (Verifying Program Loader) binary. This is a small
+binary which loads before SPL, typically into on-chip SRAM. It is
+responsible for locating, loading and jumping to SPL, the next-stage
+loader. Note that VPL is not relocatable so must be loaded to the correct
+address in SRAM, or written to run from the correct address if direct
+flash execution is possible (e.g. on x86 devices).
+
+SPL can access binman symbols at runtime. See:
+
+'Access to binman entry offsets at run time (symbols)'
+
+in the binman README for more information.
+
+The ELF file 'vpl/u-boot-vpl' must also be available for this to work, since
+binman uses that to look up symbols to write into the VPL binary.
+
+
+

[PATCH v8 04/13] binman: Support optional entries

2022-12-21 Thread Simon Glass
Support entries which can be optional depending on their contents. This
allows special entry types which appear in the image only when needed.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 tools/binman/binman.rst  | 22 ++
 tools/binman/control.py  |  1 +
 tools/binman/entry.py|  9 +
 tools/binman/etype/_testing.py   |  3 +++
 tools/binman/etype/section.py|  7 +++
 tools/binman/ftest.py|  5 +
 tools/binman/test/262_absent.dts | 20 
 7 files changed, 67 insertions(+)
 create mode 100644 tools/binman/test/262_absent.dts

diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index b091114fb91..1ab6d012b83 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -1012,6 +1012,28 @@ For the BSS case, a 'spl-bss-pad' entry arg controls 
whether it is present. All
 entry args are provided by the U-Boot Makefile.
 
 
+Optional entries
+
+
+Some entries need to exist only if certain conditions are met. For example, an
+entry may want to appear in the image only if a file has a particular format.
+Obviously the entry must exist in the image description for it to be processed
+at all, so a way needs to be found to have the entry remove itself.
+
+To handle this, when entry.ObtainContents() is called, the entry can call
+entry.mark_absent() to mark itself as absent, passing a suitable message as the
+reason.
+
+Any absent entries are dropped immediately after ObtainContents() has been
+called on all entries.
+
+It is not possible for an entry to mark itself absent at any other point in the
+processing. It must happen in the ObtainContents() method.
+
+The effect is as if the entry had never been present at all, since the image
+is packed without it and it disappears from the list of entries.
+
+
 Compression
 ---
 
diff --git a/tools/binman/control.py b/tools/binman/control.py
index 964c6984f9b..07225381146 100644
--- a/tools/binman/control.py
+++ b/tools/binman/control.py
@@ -552,6 +552,7 @@ def ProcessImage(image, update_fdt, write_map, 
get_contents=True,
 image.SetAllowMissing(allow_missing)
 image.SetAllowFakeBlob(allow_fake_blobs)
 image.GetEntryContents()
+image.drop_absent()
 image.GetEntryOffsets()
 
 # We need to pack the entries to figure out where everything
diff --git a/tools/binman/entry.py b/tools/binman/entry.py
index 1be31a05e00..637aece3705 100644
--- a/tools/binman/entry.py
+++ b/tools/binman/entry.py
@@ -91,6 +91,10 @@ class Entry(object):
 file, or is a binary file produced from an ELF file
 auto_write_symbols (bool): True to write ELF symbols into this entry's
 contents
+absent (bool): True if this entry is absent. This can be controlled by
+the entry itself, allowing it to vanish in certain circumstances.
+An absent entry is removed during processing so that it does not
+appear in the map
 """
 fake_dir = None
 
@@ -133,6 +137,7 @@ class Entry(object):
 self.comp_bintool = None
 self.elf_fname = None
 self.auto_write_symbols = auto_write_symbols
+self.absent = False
 
 @staticmethod
 def FindEntryClass(etype, expanded):
@@ -1281,3 +1286,7 @@ features to produce new behaviours.
 not_present.append(prop)
 if not_present:
 self.Raise(f"'{self.etype}' entry is missing properties: {' 
'.join(not_present)}")
+
+def mark_absent(self, msg):
+tout.info("Entry '%s' marked absent: %s" % (self._node.path, msg))
+self.absent = True
diff --git a/tools/binman/etype/_testing.py b/tools/binman/etype/_testing.py
index 69600487814..1c1efb21a44 100644
--- a/tools/binman/etype/_testing.py
+++ b/tools/binman/etype/_testing.py
@@ -63,6 +63,7 @@ class Entry__testing(Entry):
 
'bad-update-contents-twice')
 self.return_contents_later = fdt_util.GetBool(self._node,
  'return-contents-later')
+self.set_to_absent = fdt_util.GetBool(self._node, 'set-to-absent')
 
 # Set to True when the entry is ready to process the FDT.
 self.process_fdt_ready = False
@@ -119,6 +120,8 @@ class Entry__testing(Entry):
 if self.require_bintool_for_contents:
 if self.bintool_for_contents is None:
 self.Raise("Required bintool unusable in ObtainContents()")
+if self.set_to_absent:
+self.mark_absent('for testing purposes')
 return True
 
 def GetOffsets(self):
diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py
index 305155c8461..dcb7a062047 100644
--- a/tools/binman/etype/section.py
+++ b/tools/binman/etype/section.py
@@ -672,6 +672,9 @@ class Entry_section(Entry):
 
 def GetEntryContents(self, skip_entry=None):
 """Call ObtainContents() 

[PATCH v8 05/13] binman: Add a way to check for a valid ELF file

2022-12-21 Thread Simon Glass
Add a function which checks whether data is in ELF format or not. This
will be used by binman to check this for entries.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 tools/binman/elf.py  | 16 
 tools/binman/elf_test.py | 10 ++
 2 files changed, 26 insertions(+)

diff --git a/tools/binman/elf.py b/tools/binman/elf.py
index fe50bf542c3..2f4b7d1a08e 100644
--- a/tools/binman/elf.py
+++ b/tools/binman/elf.py
@@ -21,6 +21,7 @@ ELF_TOOLS = True
 try:
 from elftools.elf.elffile import ELFFile
 from elftools.elf.elffile import ELFError
+import elftools
 from elftools.elf.sections import SymbolTableSection
 except:  # pragma: no cover
 ELF_TOOLS = False
@@ -518,3 +519,18 @@ def read_loadable_segments(data):
 rend = start + segment['p_filesz']
 segments.append((i, segment['p_paddr'], data[start:rend]))
 return segments, entry
+
+def is_valid(data):
+"""Check if some binary data is a valid ELF file
+
+Args:
+data (bytes): Bytes to check
+
+Returns:
+bool: True if a valid Elf file, False if not
+"""
+try:
+DecodeElf(data, 0)
+return True
+except elftools.common.exceptions.ELFError:
+return False
diff --git a/tools/binman/elf_test.py b/tools/binman/elf_test.py
index 75b867c2be8..082a3e1d28c 100644
--- a/tools/binman/elf_test.py
+++ b/tools/binman/elf_test.py
@@ -348,6 +348,16 @@ class TestElf(unittest.TestCase):
 finally:
 elf.ELF_TOOLS = old_val
 
+def test_is_valid(self):
+"""Test is_valid()"""
+self.assertEqual(False, elf.is_valid(b''))
+self.assertEqual(False, elf.is_valid(b'1234'))
+
+fname = self.ElfTestFile('elf_sections')
+data = tools.read_file(fname)
+self.assertEqual(True, elf.is_valid(data))
+self.assertEqual(False, elf.is_valid(data[4:]))
+
 
 if __name__ == '__main__':
 unittest.main()
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH v8 02/13] binman: Tidy up comment in fit _gen_node

2022-12-21 Thread Simon Glass
Expand this comment to cover both cases that are supported.

Signed-off-by: Simon Glass 
---

(no changes since v1)

 tools/binman/etype/fit.py | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/tools/binman/etype/fit.py b/tools/binman/etype/fit.py
index 7860e2aeea3..8ad4f3a8a83 100644
--- a/tools/binman/etype/fit.py
+++ b/tools/binman/etype/fit.py
@@ -579,11 +579,17 @@ class Entry_fit(Entry_section):
 def _gen_node(base_node, node, depth, in_images, entry):
 """Generate nodes from a template
 
-This creates one node for each member of self._fdts using the
-provided template. If a property value contains 'NAME' it is
-replaced with the filename of the FDT. If a property value contains
-SEQ it is replaced with the node sequence number, where 1 is the
-first.
+This creates one or more nodes depending on the fit,operation being
+used.
+
+For OP_GEN_FDT_NODES it creates one node for each member of
+self._fdts using the provided template. If a property value 
contains
+'NAME' it is replaced with the filename of the FDT. If a property
+value contains SEQ it is replaced with the node sequence number,
+where 1 is the first.
+
+For OP_SPLIT_ELF it emits one node for each section in the ELF 
file.
+If the file is missing, nothing is generated.
 
 Args:
 base_node (Node): Base Node of the FIT (with 'description'
-- 
2.39.0.314.g84b9a713c41-goog



[PATCH v8 01/13] binman: Allow writing section contents to a file

2022-12-21 Thread Simon Glass
At present only the image (which is a section) has a filename. Move this
implementation to the entry_Section class so that any section can have a
filename. With this, the section data is written to a file.

This allows parts of an image to be written, along with the entire image.

Make a note that this can be used to include the contents of a section in
one image in another (later) image.

Signed-off-by: Simon Glass 
---

(no changes since v5)

Changes in v5:
- Update commit message to mention using parts of one image in another

 tools/binman/binman.rst |  5 +
 tools/binman/etype/section.py   | 12 +-
 tools/binman/ftest.py   | 14 
 tools/binman/image.py   |  3 ---
 tools/binman/test/261_section_fname.dts | 29 +
 5 files changed, 59 insertions(+), 4 deletions(-)
 create mode 100644 tools/binman/test/261_section_fname.dts

diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst
index e7b231e0712..b091114fb91 100644
--- a/tools/binman/binman.rst
+++ b/tools/binman/binman.rst
@@ -836,6 +836,11 @@ name-prefix:
 renamed to 'ro-u-boot' and 'rw-u-boot'. This can be useful to
 distinguish binaries with otherwise identical names.
 
+filename:
+This allows the contents of the section to be written to a file in the
+output directory. This can sometimes be useful to use the data in one
+section in different image, since there is currently no way to share data
+beteen images other than through files.
 
 Image Properties
 
diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py
index da561e2bcc7..305155c8461 100644
--- a/tools/binman/etype/section.py
+++ b/tools/binman/etype/section.py
@@ -144,6 +144,10 @@ class Entry_section(Entry):
 be written at offset 4 in the image file, since the first 16 bytes are
 skipped when writing.
 
+filename
+filename to write the unpadded section contents to within the output
+directory (None to skip this).
+
 Since a section is also an entry, it inherits all the properies of entries
 too.
 
@@ -163,6 +167,7 @@ class Entry_section(Entry):
 self._skip_at_start = None
 self._end_4gb = False
 self._ignore_missing = False
+self._filename = None
 
 def ReadNode(self):
 """Read properties from the section node"""
@@ -183,6 +188,8 @@ class Entry_section(Entry):
 self._skip_at_start = 0
 self._name_prefix = fdt_util.GetString(self._node, 'name-prefix')
 self.align_default = fdt_util.GetInt(self._node, 'align-default', 0)
+self._filename = fdt_util.GetString(self._node, 'filename',
+self._filename)
 
 self.ReadEntries()
 
@@ -348,7 +355,8 @@ class Entry_section(Entry):
 """Get the contents of an entry
 
 This builds the contents of the section, stores this as the contents of
-the section and returns it
+the section and returns it. If the section has a filename, the data is
+written there also.
 
 Args:
 required: True if the data must be present, False if it is OK to
@@ -363,6 +371,8 @@ class Entry_section(Entry):
 if data is None:
 return None
 self.SetContents(data)
+if self._filename:
+tools.write_file(tools.get_output_filename(self._filename), data)
 return data
 
 def GetOffsets(self):
diff --git a/tools/binman/ftest.py b/tools/binman/ftest.py
index 62ee86b9b75..c3cb32dca26 100644
--- a/tools/binman/ftest.py
+++ b/tools/binman/ftest.py
@@ -6077,5 +6077,19 @@ fdt fdtmapExtract the devicetree 
blob from the fdtmap
 'Cannot write symbols to an ELF file without Python elftools',
 str(exc.exception))
 
+def testSectionFilename(self):
+"""Check writing of section contents to a file"""
+data = self._DoReadFile('261_section_fname.dts')
+expected = (b'&&' + U_BOOT_DATA + b'&&&' +
+tools.get_bytes(ord('!'), 7) +
+U_BOOT_DATA + tools.get_bytes(ord('&'), 12))
+self.assertEqual(expected, data)
+
+sect_fname = tools.get_output_filename('outfile.bin')
+self.assertTrue(os.path.exists(sect_fname))
+sect_data = tools.read_file(sect_fname)
+self.assertEqual(U_BOOT_DATA, sect_data)
+
+
 if __name__ == "__main__":
 unittest.main()
diff --git a/tools/binman/image.py b/tools/binman/image.py
index 6d4bff58436..b84dd21e22a 100644
--- a/tools/binman/image.py
+++ b/tools/binman/image.py
@@ -94,9 +94,6 @@ class Image(section.Entry_section):
 
 def ReadNode(self):
 super().ReadNode()
-filename = fdt_util.GetString(self._node, 'filename')
-if filename:
-self._filename = filename
 self.allow_repack = fdt_util.GetBool(self._node, 'allow-repack')
 

[PATCH v8 00/13] binman: rockchip: Migrate from rockchip SPL_FIT_GENERATOR script

2022-12-21 Thread Simon Glass
At present rockchip 64-bit boards make use of a FIT-generator script
written in Python. The script supports splitting an ELF file into several
'loadable' nodes in the FIT. Binman does not current support this feature.

This series adds binman support for ELF splitting. This works by adding a
new 'fit,operation' property to the FIT subnodes, allowing this new way of
generating nodes.

It also provides support for optional entries, by allowing them to be
marked absent when the contents are obtained.

Some other fixes and improvements are needed along the way.

A new, common binman description is added for 64-bit boards which includes
the required u-boot.itb file.

The existing script is removed, so that only a few zynq boards are now
using a SPL_FIT_GENERATOR script:

   avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0
   xilinx_zynqmp_virt

Migration of those is hopefully in progress.

Note however that tools/k3_fit_atf.sh remains, used by a few boards that
enable CONFIG_TI_SECURE_DEVICE so this series is copied there too:

am335x_hs_evm
am335x_hs_evm_uart
am43xx_hs_evm
am57xx_hs_evm
am57xx_hs_evm_usb
am65x_hs_evm_a53
am65x_hs_evm_r5
dra7xx_hs_evm
dra7xx_hs_evm_usb
j721e_hs_evm_a72
j721e_hs_evm_r5
k2e_hs_evm
k2g_hs_evm
k2hk_hs_evm
k2l_hs_evm

Ivan Mikhaylov has sent a patch to help with these, but I need to take a
look at the testing side. In any case they should really be using binman
for the image generation.

This series is available at u-boot-dm/fit-working

Changes in v8:
- Move support for optional external blobs into this series
- Support optional FIT images
- Make OP-TEE image optional
- Specify an entry address for U-Boot

Changes in v7:
- Correct an rST formatting error
- Correct missing test coverage

Changes in v6:
- Add new patch to update entry docs
- Update op-tee to support new v1 binary header
- Add new patch to disable USE_SPL_FIT_GENERATOR by default
- Add new patch to allow a binman entry to be marked absent

Changes in v5:
- Update commit message to mention using parts of one image in another
- Rename from 'Include binman script in 64-bit boards'
- Drop duplicate #include in rk3368-u-boot.dtsi
- Keep the name as fit for puma
- Drop redundant check for CONFIG_ROCKCHIP_SPI_IMAGE
- Drop imply of BINMAN in Kconfig (rely on ARCH_ROCKCHIP instead)
- Rename blob to fit for puma and also SPI image

Changes in v3:
- Add an offset to the FIT description
- Add support for writing sections in binman
- Rebase to master

Changes in v2:
- Rename op-tee to tee-os
- Drop use of .itb2
- Drop patches previously applied
- Add various suggestions from Alper Nebi Yasak
- Add patches to refactor binman's FIT support

Simon Glass (13):
  binman: Allow writing section contents to a file
  binman: Tidy up comment in fit _gen_node
  binman: Update entry docs
  binman: Support optional entries
  binman: Add a way to check for a valid ELF file
  binman: Support new op-tee binary format
  binman: Support optional external blobs
  rockchip: evb-rk3288: Drop raw-image support
  rockchip: Use multiple-images for rk3399
  rockchip: Support building the all output files in binman
  rockchip: Convert all boards to use binman
  rockchip: Drop the FIT generator script
  treewide: Disable USE_SPL_FIT_GENERATOR by default

 Makefile  |  11 +-
 arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi   |   4 +-
 arch/arm/dts/rk3399-u-boot.dtsi   |   3 +-
 arch/arm/dts/rockchip-u-boot.dtsi |  78 -
 arch/arm/mach-rockchip/make_fit_atf.py| 267 --
 boot/Kconfig  |   6 +-
 configs/am335x_evm_defconfig  |   1 -
 configs/am335x_hs_evm_defconfig   |   1 -
 configs/am335x_hs_evm_uart_defconfig  |   1 -
 configs/am43xx_evm_defconfig  |   1 -
 configs/am43xx_evm_rtconly_defconfig  |   1 -
 configs/am43xx_evm_usbhost_boot_defconfig |   1 -
 configs/am43xx_hs_evm_defconfig   |   1 -
 configs/am57xx_evm_defconfig  |   1 -
 configs/am57xx_hs_evm_defconfig   |   1 -
 configs/am57xx_hs_evm_usb_defconfig   |   1 -
 configs/am65x_evm_a53_defconfig   |   1 -
 configs/am65x_evm_r5_defconfig|   1 -
 configs/am65x_hs_evm_a53_defconfig|   1 -
 configs/am65x_hs_evm_r5_defconfig |   1 -
 ...edev_cc_v1_0_ultrazedev_som_v1_0_defconfig |   1 +
 configs/cgtqmx8_defconfig |   1 -
 configs/chromebook_link64_defconfig   |   1 -
 configs/dh_imx6_defconfig |   1 -
 configs/display5_defconfig|   1 -
 configs/display5_factory_defconfig|   1 -
 configs/dra7xx_evm_defconfig  |   1 -
 configs/dra7xx_hs_evm_defconfig   |   1 -
 configs/dra7xx_hs_evm_usb_defconfig   |   1 -
 configs/evb-ast2600_defconfig |   1 -
 

[PATCH] doc: Use "changesets" not "csets" in statistics pages

2022-12-21 Thread Tom Rini
To make things more human readable, say "changesets from" rather than
"csets from" in all our historical pages here. Moving forward this has
been changed in our gitdm with b034e399e31a ("gitdm: fix typo csets").

Signed-off-by: Tom Rini 
---
 doc/develop/statistics/u-boot-stats-v1.3.0.rst   | 2 +-
 doc/develop/statistics/u-boot-stats-v1.3.1.rst   | 2 +-
 doc/develop/statistics/u-boot-stats-v1.3.2.rst   | 2 +-
 doc/develop/statistics/u-boot-stats-v1.3.3.rst   | 2 +-
 doc/develop/statistics/u-boot-stats-v1.3.4.rst   | 2 +-
 doc/develop/statistics/u-boot-stats-v2008.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2009.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2009.03.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2009.06.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2009.08.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2009.11.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2010.03.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2010.06.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2010.09.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2010.12.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2011.03.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2011.06.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2011.09.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2011.12.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2012.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2012.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2012.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2013.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2013.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2014.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2014.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2014.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2014.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2015.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2015.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2015.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2015.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2016.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2016.03.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2016.05.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2016.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2016.09.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2016.11.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2017.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2017.03.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2017.05.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2017.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2017.09.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2017.11.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2018.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2018.03.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2018.05.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2018.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2018.09.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2018.11.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2019.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2019.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2019.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2019.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2020.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2020.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2020.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2020.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2021.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2021.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2021.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2021.10.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2022.01.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2022.04.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2022.07.rst | 2 +-
 doc/develop/statistics/u-boot-stats-v2022.10.rst | 2 +-
 66 files changed, 66 insertions(+), 66 deletions(-)

diff --git a/doc/develop/statistics/u-boot-stats-v1.3.0.rst 
b/doc/develop/statistics/u-boot-stats-v1.3.0.rst
index c891468f2a02..cbf433f453e7 100644
--- a/doc/develop/statistics/u-boot-stats-v1.3.0.rst
+++ b/doc/develop/statistics/u-boot-stats-v1.3.0.rst
@@ -3,7 +3,7 @@
 Release Statistics for U-Boot v1.3.0
 
 
-* Processed 1153 csets from 102 developers
+* Processed 1153 changesets from 102 developers
 
 * 38 employers found
 
diff --git a/doc/develop/statistics/u-boot-stats-v1.3.1.rst 
b/doc/develop/statistics/u-boot-stats-v1.3.1.rst
index e6ddd5460ccf..6a5c592b007e 100644
--- a/doc/develop/statistics/u-boot-stats-v1.3.1.rst
+++ b/doc/develop/statistics/u-boot-stats-v1.3.1.rst
@@ -3,7 +3,7 @@
 Release Statistics for U-Boot v1.3.1
 
 
-* Processed 40 csets from 5 developers
+* Processed 40 changesets from 5 developers
 
 * 5 employers found
 
diff --git 

Re: [PATCH v2 1/1] gitdm: fix typo csets

2022-12-21 Thread Tom Rini
On Sun, 17 Jul 2022 17:50:21 +0200, Heinrich Schuchardt wrote:
> The output should be human readable.
> 
> %s/csets/changesets/
> 
> 

Applied, thanks!

[1/1] gitdm: fix typo csets
  commit: b034e399e31ae98d3ceae358ce5ae0141b3a3052

Best regards,
-- 
Tom



Re: [PATCH] dm: pinctrl: Revert "pinctrl: probe pinctrl drivers during post-bind"

2022-12-21 Thread Pali Rohár
On Wednesday 21 December 2022 07:27:39 Simon Glass wrote:
> This breaks chromebook_coral and it is also not how things should work. If
> a board needs to bind GPIOs as part of a pinctrl driver this can be done
> during the bind step, if needed.
> 
> We cannot probe pinctrl devices when binding as a rule, since it cannot be
> supported on some platforms.
> 
> The bind and probe steps are separate in U-Boot and they should remain
> separate.
> 
> This reverts commit f9ec791b5e24378b71590877499f8683d5f54dac.

Unfortunately reverting this patch would break other devices, mostly
A3720 based where pinctrl driver acts also as gpio driver. Because no
other caller then register gpio driver and so other drivers which parses
gpios from DT (which belongs to that gpio driver) will fail during
probe.

Also I think that pinctrl command would not work in this case if pinctrl
would not be probed.

> Signed-off-by: Simon Glass 
> ---
> 
>  drivers/pinctrl/pinctrl-uclass.c | 7 ---
>  1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-uclass.c 
> b/drivers/pinctrl/pinctrl-uclass.c
> index ce2d5ddf6d9..a1b85ca87e5 100644
> --- a/drivers/pinctrl/pinctrl-uclass.c
> +++ b/drivers/pinctrl/pinctrl-uclass.c
> @@ -403,13 +403,6 @@ static int __maybe_unused pinctrl_post_bind(struct 
> udevice *dev)
>  {
>   const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
>  
> - /*
> -  * Make sure that the pinctrl driver gets probed after binding
> -  * as some pinctrl drivers also register the GPIO driver during
> -  * probe, and if they are not probed GPIO-s are not registered.
> -  */
> - dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
> -
>   if (!ops) {
>   dev_dbg(dev, "ops is not set.  Do not bind.\n");
>   return -EINVAL;
> -- 
> 2.39.0.314.g84b9a713c41-goog
> 


Re: [PATCH] timer: orion-timer: Fix problem with early static variable

2022-12-21 Thread Tony Dinh
Hi Stefan,

On Wed, Dec 21, 2022 at 1:18 AM Stefan Roese  wrote:
>
> We've noticed that at least one Kirkwood board (Pogo v4) has problems
> with the new orion DM timer implementation. Debugging revealed that this
> issue is related with the static variable "early_init_done" which does
> not work correctly before relocation in all cases.
>
> This patch removes this static variable and replaces it's functionality
> via a function that detects if the timer is already initialized.
>
> Signed-off-by: Stefan Roese 
> Cc: Pali Rohár 
> Cc: Michael Walle 
> Cc: Tony Dinh 
> ---
>  drivers/timer/orion-timer.c | 10 +++---
>  1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/timer/orion-timer.c b/drivers/timer/orion-timer.c
> index d0eab3ce781d..6804bf0fa2cb 100644
> --- a/drivers/timer/orion-timer.c
> +++ b/drivers/timer/orion-timer.c
> @@ -23,15 +23,19 @@ struct orion_timer_priv {
>
>  #define MVEBU_TIMER_FIXED_RATE_25MHZ   2500
>
> -static bool early_init_done __section(".data") = false;
> +static bool early_init_done(void *base)
> +{
> +   if (readl(base + TIMER_CTRL) & TIMER0_EN)
> +   return true;
> +   return false;
> +}
>
>  /* Common functions for early (boot) and DM based timer */
>  static void orion_timer_init(void *base, enum input_clock_type type)
>  {
> /* Only init the timer once */
> -   if (early_init_done)
> +   if (early_init_done(base))
> return;
> -   early_init_done = true;
>
> writel(~0, base + TIMER0_VAL);
> writel(~0, base + TIMER0_RELOAD);
> --
> 2.39.0
>

I've tested with a couple Kirkwood boards, and they are working fine:
Pogo V4 (Kirkwood 88F6192) and Goflex Home (Kirkwood 88F6281). Note
that the Goflex Home does not have CONFIG_BOOTSTAGE (i.e. a regression
test, with a few sleep commands at the u-boot prompt).

Tested-by: Tony Dinh 

Thanks,
Tony


Re: [PATCH u-boot] doc: board: qemu-ppce500: Update supported and unsupported

2022-12-21 Thread Pali Rohár
On Wednesday 21 December 2022 17:01:37 Bin Meng wrote:
> On Wed, Dec 21, 2022 at 3:49 PM Pali Rohár  wrote:
> >
> > On Wednesday 21 December 2022 09:15:41 Bin Meng wrote:
> > > On Wed, Dec 21, 2022 at 4:06 AM Pali Rohár  wrote:
> > > >
> > > > qemu can emulate also e500v1 core but cannot emulate CPUs from Freescale
> > > > PowerPC QorIQ T and P series.
> > > >
> > > > Signed-off-by: Pali Rohár 
> > > > ---
> > > >  doc/board/emulation/qemu-ppce500.rst | 8 +---
> > > >  1 file changed, 5 insertions(+), 3 deletions(-)
> > > >
> > > > diff --git a/doc/board/emulation/qemu-ppce500.rst 
> > > > b/doc/board/emulation/qemu-ppce500.rst
> > > > index 5de0aaf55ded..10427cc56302 100644
> > > > --- a/doc/board/emulation/qemu-ppce500.rst
> > > > +++ b/doc/board/emulation/qemu-ppce500.rst
> > > > @@ -7,7 +7,7 @@ QEMU PPC E500
> > > >  QEMU for PPC supports a special 'ppce500' machine designed for 
> > > > emulation and
> > > >  virtualization purposes. This document describes how to run U-Boot 
> > > > under it.
> > > >
> > > > -The QEMU ppce500 machine models a generic PowerPC E500 virtual machine 
> > > > with
> > > > +The QEMU ppce500 machine models a generic PowerPC e500 virtual machine 
> > > > with
> > > >  support for the VirtIO standard networking device connected to the 
> > > > built-in
> > > >  PCI host controller. Some common devices in the CCSBAR space are 
> > > > modeled,
> > > >  including MPIC, 16550A UART devices, GPIO, I2C and PCI host controller 
> > > > with
> > > > @@ -39,6 +39,7 @@ embedded DTB created by QEMU reflects the new setting.
> > > >  Both qemu-system-ppc and qemu-system-ppc64 provide emulation for the 
> > > > following
> > > >  32-bit PowerPC CPUs:
> > > >
> > > > +* e500v1
> > > >  * e500v2
> > > >  * e500mc
> > > >
> > > > @@ -61,8 +62,9 @@ When U-Boot boots, you will notice the following::
> > > >  This is because we only specified a core name to QEMU and it does not 
> > > > have a
> > > >  meaningful SVR value which represents an actual SoC that integrates 
> > > > such core.
> > > >  You can specify a real world SoC device that QEMU has built-in support 
> > > > but all
> > > > -these SoCs are e500v2 based MPC85xx series, hence you cannot test 
> > > > anything
> > > > -built for P4080 (e500mc), P5020 (e5500) and T2080 (e6500).
> > > > +these SoCs are e500v1/e500v2 based MPC85xx series, hence you cannot 
> > > > test anything
> > > > +built for P10xx/P2010/P2020 (e500v2), P2O4x/P304x/P40xx (e500mc), 
> > > > P50xx/T10xx (e5500)
> > >
> > > typo: P2O4x
> >
> > Where is a typo? I wrote P204x (which should mean both P2040 and P2041).
> 
> Is that 0 or O? It looks like an O.

Ou. Now I see what you mean. I had to look at it 3 times to see that
difference is between number zero and capital letter o. I have no idea
why I typed here letter instead of number... maybe because these keys
are near each other.

Of course, it is zero not letter o. Sorry for this.

Would you fix it locally, or should I send a new patch version?

> >
> > > > +and T208x/T4080/T4160/T4240 (e6500).
> > > >
> > > >  By default a VirtIO standard PCI networking device is connected as an 
> > > > ethernet
> > > >  interface at PCI address 0.1.0, but we can switch that to an e1000 NIC 
> > > > by::
> > > > --
> 
> Regards,
> Bin


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Mark Kettenis
> Date: Wed, 21 Dec 2022 16:56:37 -0500
> From: Tom Rini 
> 
> On Sat, Dec 17, 2022 at 11:14:41PM +0100, Mark Kettenis wrote:
> > > From: Eugen Hristev 
> > > Date: Thu, 15 Dec 2022 13:58:25 +0200
> > > 
> > > Newer DTC require that the DTB start address is aligned at 8 bytes.
> > > In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the
> > > DTB, but there is no alignment/padding to the next 8byte aligned address.
> > > This causes the board to fail booting, because the FDT will claim
> > > that the DTB inside u-boot.bin is not a valid DTB, it will fail with
> > > -FDT_ERR_ALIGNMENT.
> > > To solve this, have the u-boot binary `_end` aligned with 8 bytes.
> > > The objcopy in the Makefile will create the u-boot-nodtb.bin and it has to
> > > be truncated to 8 bytes to correspond to the u-boot.map file which will
> > > have the `_end` aligned to 8 bytes.
> > > The lds files which use devicetrees have been changed to align the `_end`
> > > tag with 8 bytes.
> > > 
> > > This patch is also a prerequisite to have the possibility to update the
> > > dtc inside u-boot to newer versions (1.6.1+)
> > > 
> > > Signed-off-by: Eugen Hristev 
> > > ---
> > > Hi,
> > > 
> > > I could not test all affected boards, it's an impossible task.
> > > I tried this on at91 boards which I have, and ran the CI on denx.
> > > I cannot guarantee that no other boards are affected, so this patch is a 
> > > bit
> > > of an RFC.
> > > If the u-boot-nodtb.bin does not have the size equal with the 
> > > corresponding
> > > one in u-boot.map, the binary_size_check will fail at build time with
> > > something like this:
> > > 
> > > u-boot.map shows a binary size of 502684
> > > but u-boot-nodtb.bin shows 502688
> > > 
> > > Thanks,
> > > Eugen
> > > 
> > >  Makefile| 2 ++
> > >  arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
> > >  arch/arm/cpu/u-boot-spl.lds | 1 +
> > >  arch/arm/cpu/u-boot.lds | 1 +
> > >  arch/arm/lib/elf_arm_efi.lds| 5 +
> > >  arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
> > >  arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
> > >  arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
> > >  arch/mips/cpu/u-boot.lds| 2 +-
> > >  arch/sandbox/cpu/u-boot.lds | 6 ++
> > >  arch/sh/cpu/u-boot.lds  | 2 ++
> > >  board/ti/am335x/u-boot.lds  | 1 +
> > >  tools/binman/test/u_boot_binman_embed.lds   | 2 +-
> > >  13 files changed, 25 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/Makefile b/Makefile
> > > index 9d84f96481..b4d387bcce 100644
> > > --- a/Makefile
> > > +++ b/Makefile
> > > @@ -1317,6 +1317,8 @@ endif
> > >  
> > >  u-boot-nodtb.bin: u-boot FORCE
> > >   $(call if_changed,objcopy_uboot)
> > > +# Make sure the size is 8 byte-aligned.
> > > + @truncate -s %8 $@
> > 
> > $ truncate
> > ksh: truncate: not found
> > 
> > In other words: truncate(1) isn't a standard UNIX utility and not
> > present on OpenBSD for example.  It isn't part of POSIX and therefore
> > its usage is unportable.
> > 
> > Please find a different solution.
> 
> Ah yes. Can this perhaps be done with dd? A bit of looking around
> suggests that this might be a portable way to truncate a file to say 512
> bytes:
> dd if=/dev/urandom of=testfile bs=1 count=500
> dd if=/dev/null of=testfile bs=1 count=512
> 
> And then hexdump or whatever to see that the last 12 bytes are zero. Can
> you please test this on OpenBSD?  We'll need some shell work to get
> current byte size and make it 8-byte aligned, but that should be
> portable at least.  Thanks!

Hi Tom,

That results on a file with zero bytes on OpenBSD... but also on
Linux.  Did you intend to write something different?  I can't
immediately come up with a way to do this with dd(1).

Cheers,

Mark


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Pali Rohár
On Wednesday 21 December 2022 14:47:48 eugen.hris...@microchip.com wrote:
> On the other hand , what you are saying Pali, that objcopy trims 
> trailing zeros, and your platform is broken, hence you are aligning to 4 
> bytes, I do not think that alignment to 4 bytes is the solution.

Yes, it is not the proper solution but at that time binary was already
broken and I did not find at that time better fix for it to have again
working u-boot build.

> So I would be against what you did , to align to 4 bytes. If the DTB is 
> appended at the wrong position (somehow this is happening in my case as 
> well), we should have U-boot (and your platform) look up the DTB at the 
> right position , where it's supposed to be placed. And not move the DTB 
> to a 4 byte alignment just because Uboot searches the DTB there.
> In the future if the DTC requires all DTBs to be aligned to 8 bytes as a 
> hard rule, your solution is again not right. We would have to have the 
> DTB aligned to 8 and the code to lookup the DTB in the right position.
> 
> So looking up the _end and placing the DTB directly there might be a 
> better way to solve all the problems we are facing (as you actually 
> suggested )

Yes, for me it looks like a better solution which fixes both problems.
And allows to put DTB at any position or alignment. Then alignment
could be changed also for mpc85xx to 8 or 128 bytes...


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Tom Rini
On Sat, Dec 17, 2022 at 11:14:41PM +0100, Mark Kettenis wrote:
> > From: Eugen Hristev 
> > Date: Thu, 15 Dec 2022 13:58:25 +0200
> > 
> > Newer DTC require that the DTB start address is aligned at 8 bytes.
> > In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the
> > DTB, but there is no alignment/padding to the next 8byte aligned address.
> > This causes the board to fail booting, because the FDT will claim
> > that the DTB inside u-boot.bin is not a valid DTB, it will fail with
> > -FDT_ERR_ALIGNMENT.
> > To solve this, have the u-boot binary `_end` aligned with 8 bytes.
> > The objcopy in the Makefile will create the u-boot-nodtb.bin and it has to
> > be truncated to 8 bytes to correspond to the u-boot.map file which will
> > have the `_end` aligned to 8 bytes.
> > The lds files which use devicetrees have been changed to align the `_end`
> > tag with 8 bytes.
> > 
> > This patch is also a prerequisite to have the possibility to update the
> > dtc inside u-boot to newer versions (1.6.1+)
> > 
> > Signed-off-by: Eugen Hristev 
> > ---
> > Hi,
> > 
> > I could not test all affected boards, it's an impossible task.
> > I tried this on at91 boards which I have, and ran the CI on denx.
> > I cannot guarantee that no other boards are affected, so this patch is a bit
> > of an RFC.
> > If the u-boot-nodtb.bin does not have the size equal with the corresponding
> > one in u-boot.map, the binary_size_check will fail at build time with
> > something like this:
> > 
> > u-boot.map shows a binary size of 502684
> > but u-boot-nodtb.bin shows 502688
> > 
> > Thanks,
> > Eugen
> > 
> >  Makefile| 2 ++
> >  arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
> >  arch/arm/cpu/u-boot-spl.lds | 1 +
> >  arch/arm/cpu/u-boot.lds | 1 +
> >  arch/arm/lib/elf_arm_efi.lds| 5 +
> >  arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
> >  arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
> >  arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
> >  arch/mips/cpu/u-boot.lds| 2 +-
> >  arch/sandbox/cpu/u-boot.lds | 6 ++
> >  arch/sh/cpu/u-boot.lds  | 2 ++
> >  board/ti/am335x/u-boot.lds  | 1 +
> >  tools/binman/test/u_boot_binman_embed.lds   | 2 +-
> >  13 files changed, 25 insertions(+), 7 deletions(-)
> > 
> > diff --git a/Makefile b/Makefile
> > index 9d84f96481..b4d387bcce 100644
> > --- a/Makefile
> > +++ b/Makefile
> > @@ -1317,6 +1317,8 @@ endif
> >  
> >  u-boot-nodtb.bin: u-boot FORCE
> > $(call if_changed,objcopy_uboot)
> > +# Make sure the size is 8 byte-aligned.
> > +   @truncate -s %8 $@
> 
> $ truncate
> ksh: truncate: not found
> 
> In other words: truncate(1) isn't a standard UNIX utility and not
> present on OpenBSD for example.  It isn't part of POSIX and therefore
> its usage is unportable.
> 
> Please find a different solution.

Ah yes. Can this perhaps be done with dd? A bit of looking around
suggests that this might be a portable way to truncate a file to say 512
bytes:
dd if=/dev/urandom of=testfile bs=1 count=500
dd if=/dev/null of=testfile bs=1 count=512

And then hexdump or whatever to see that the last 12 bytes are zero. Can
you please test this on OpenBSD?  We'll need some shell work to get
current byte size and make it 8-byte aligned, but that should be
portable at least.  Thanks!

-- 
Tom


signature.asc
Description: PGP signature


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Tom Rini
On Thu, Dec 15, 2022 at 07:00:51AM -0800, Simon Glass wrote:
> Hi Eugen,
> 
> On Thu, 15 Dec 2022 at 06:37,  wrote:
> >
> > On 12/15/22 16:24, Simon Glass wrote:
> > > Hi Eugen,
> > >
> > > On Thu, 15 Dec 2022 at 03:58, Eugen Hristev  
> > > wrote:
> > >>
> > >> Newer DTC require that the DTB start address is aligned at 8 bytes.
> > >> In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the
> > >> DTB, but there is no alignment/padding to the next 8byte aligned address.
> > >> This causes the board to fail booting, because the FDT will claim
> > >> that the DTB inside u-boot.bin is not a valid DTB, it will fail with
> > >> -FDT_ERR_ALIGNMENT.
> > >> To solve this, have the u-boot binary `_end` aligned with 8 bytes.
> > >> The objcopy in the Makefile will create the u-boot-nodtb.bin and it has 
> > >> to
> > >> be truncated to 8 bytes to correspond to the u-boot.map file which will
> > >> have the `_end` aligned to 8 bytes.
> > >> The lds files which use devicetrees have been changed to align the `_end`
> > >> tag with 8 bytes.
> > >>
> > >> This patch is also a prerequisite to have the possibility to update the
> > >> dtc inside u-boot to newer versions (1.6.1+)
> > >>
> > >> Signed-off-by: Eugen Hristev 
> > >> ---
> > >> Hi,
> > >>
> > >> I could not test all affected boards, it's an impossible task.
> > >> I tried this on at91 boards which I have, and ran the CI on denx.
> > >> I cannot guarantee that no other boards are affected, so this patch is a 
> > >> bit
> > >> of an RFC.
> > >> If the u-boot-nodtb.bin does not have the size equal with the 
> > >> corresponding
> > >> one in u-boot.map, the binary_size_check will fail at build time with
> > >> something like this:
> > >>
> > >> u-boot.map shows a binary size of 502684
> > >> but u-boot-nodtb.bin shows 502688
> > >>
> > >> Thanks,
> > >> Eugen
> > >>
> > >>   Makefile| 2 ++
> > >>   arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
> > >>   arch/arm/cpu/u-boot-spl.lds | 1 +
> > >>   arch/arm/cpu/u-boot.lds | 1 +
> > >>   arch/arm/lib/elf_arm_efi.lds| 5 +
> > >>   arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
> > >>   arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
> > >>   arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
> > >>   arch/mips/cpu/u-boot.lds| 2 +-
> > >>   arch/sandbox/cpu/u-boot.lds | 6 ++
> > >>   arch/sh/cpu/u-boot.lds  | 2 ++
> > >>   board/ti/am335x/u-boot.lds  | 1 +
> > >>   tools/binman/test/u_boot_binman_embed.lds   | 2 +-
> > >>   13 files changed, 25 insertions(+), 7 deletions(-)
> > >>
> > >> diff --git a/Makefile b/Makefile
> > >> index 9d84f96481..b4d387bcce 100644
> > >> --- a/Makefile
> > >> +++ b/Makefile
> > >> @@ -1317,6 +1317,8 @@ endif
> > >>
> > >>   u-boot-nodtb.bin: u-boot FORCE
> > >>  $(call if_changed,objcopy_uboot)
> > >> +# Make sure the size is 8 byte-aligned.
> > >> +   @truncate -s %8 $@
> > >>  $(BOARD_SIZE_CHECK)
> > >
> > > I agree this line is needed, since otherwise we will only get 4-byte
> > > alignment. But it would be better if we could have the linker scripts
> > > fill bytes out to the required alignment. Is that possible?
> > >
> > > Reviewed-by: Simon Glass 
> > >
> > > Regards,
> > > Simon
> >
> >
> > Hi Simon,
> >
> > I tried to check the objcopy option --pad-to , to use it at the time of
> > objcopy, but this requires a real number to be passed to it.
> > And this number could only be found by inspecting the u-boot.map file,
> > since u-boot-nodtb.bin still does not exist.
> > And if we pad to the size specified in u-boot.map, then
> > binary_size_check does not make much sense anymore, as we will basically
> > use the same information to fit the file, and it will always pass with a
> > success. (even if we would pad many more bytes than 4 )
> > Hence it would lose it's purpose ( binary_size_check ), which I think
> > was created to make sure no objects were lost when doing objcopy and
> > creating the u-boot-nodtb.bin file.
> 
> Yes, I was more thinking of something like:
> 
> fill {
> . = ALIGN(8);
> QUAD(0)
> };
> 
> in the link script, or something that actually writes the padding bytes.
> 
> >
> > On a side note, do you think I covered all the implied lds files ? I
> > would hate to break someone's boards.
> 
> If CI passes you should be able to rely on the binary size check.
> 
> >
> > And also, P.S. : I would require to have the same change when building a
> > FIT image with mkimage... all subimages inside a FIT must be aligned to
> > 8 bytes. However mkimage only aligns the start address and header of the
> > FIT (-B option). Out of your knowledge, is this possible and where could
> > I have a look to do this change ?
> 
> I lean towards the view that this 8-byte alignment is a bad idea.

I'm still working my way through this thread, but, the 8-byte
requirement 

Re: Converting to DM SERIAL for Kirkwood boards

2022-12-21 Thread Tony Dinh
Hi Stefan,

On Wed, Dec 21, 2022 at 1:29 AM Stefan Roese  wrote:
>
> Hi Pali,
>
> On 12/20/22 09:07, Pali Rohár wrote:
> > On Tuesday 20 December 2022 07:20:15 Stefan Roese wrote:
> >> Hi Tony,
> >>
> >> On 12/20/22 02:36, Tony Dinh wrote:
> >>> Hi Stefan,
> >>>
> >>> On Mon, Dec 19, 2022 at 4:06 PM Tony Dinh  wrote:
> 
>  Hi Stefan,
> 
>  On Mon, Dec 19, 2022 at 1:22 PM Tony Dinh  wrote:
> >
> > Hi Stefan,
> >
> > On Sun, Dec 18, 2022 at 11:29 PM Stefan Roese  wrote:
> >>
> >> Hi Tony,
> >>
> >> On 12/19/22 07:17, Stefan Roese wrote:
> >>
> >> 
> >>
>  git checkout 37bb396669b27aa62fe8bc5eeb6bfde92e09c2d3
>  Previous HEAD position was 3b44b3fdf2 arm: mvebu: Add support for
>  programming LD0 and LD1 eFuse
>  HEAD is now at 37bb396669 timer: orion-timer: Only init timer once
> 
>  This is where the Pogo V4 was frozen during boot. Among the Kirkwood
>  boards that I have and used for testing, it is the only one that has
>  CONFIG_BOOTSTAGE=y.
> >>>
> >>> Thanks for testing and git bi-secting.
> >>>
>  Should I create a new post for would like to continue this topic here
>  in this thread?
> >>>
> >>> Let me check, if I can find the root cause and this problem quickly. 
> >>> If
> >>> not, then we should probably disable CONFIG_BOOTSTAGE on the Pogo v4 
> >>> for
> >>> a short while until we've fixed this issue.
> >>
> >> I fail to spot the problem with this small commit 37bb396669b27a. I can
> >> also not reproduce this on my Armada XP board - it uses SPL though, 
> >> this
> >> might make a difference.
> >>
> >> Could you perhaps apply this attached debug patch and make sure, that
> >> you have DEBUG_UART enabled in your Pogo v4 config. And boot into the
> >> resulting image.
> >
> > Here is the kwboot log with DEBUG_UART. Note that number 322322 below
> > is part of the log.
> >
> > 322322
> >
> > U-Boot 2023.01-rc3-00057-g9bd3d354a1-dirty (Dec 19 2022 - 01:29:21 
> > -0800)
> > Pogoplug V4
> >
> > SoC:   Kirkwood 88F6281_A1
> > Model: Cloud Engines PogoPlug Series 4
> > DRAM:  128 MiB
> > 322322322Core:  19 devices, 15 uclasses, devicetree: separate
> > NAND:  4
> >
> 
>  Going a bit further with your debug patch, I've added more prints.
> 
> static void orion_timer_init(void *base, enum input_clock_type type)
> {
>    /* Only init the timer once */
>  -   if (early_init_done)
>  +   if (early_init_done) {
>  +   printch('6'); // test-only
>    return;
>  +   }
> 
>  And the boot log below shows somehow the early_init_done is already
>  true by the time the orion_timer_init is called. Pretty weird, to say
>  the least!
> 
>  --BEGIN LOG--
>  3262632626
> 
>  U-Boot 2023.01-rc4-dirty (Dec 19 2022 - 15:35:26 -0800)
>  Pogoplug V4
> 
>  SoC:   Kirkwood 88F6281_A1
>  Model: Cloud Engines PogoPlug Series 4
>  DRAM:  128 MiB
>  326263262632626Core:  19 devices, 15 uclasses, devicetree: separate
>  NAND:  456
>  --END LOG--
> 
> >>>
> >>> I tried this change in drivers/timer/orion-timer.c and it seems to
> >>> work consistently.
> >>>
> >>> -static bool early_init_done __section(".data") = false;
> >>> +static bool early_init_done = false;
> >>>
> >>> I still can't see why it would make a difference. Why does the
> >>> __section macro not work? does the reallocation timing have anything
> >>> to do with this variable being of the wrong value?
> >>
> >> Hmmm, so we might have a problem with memory being overwritten? You
> >> should perhaps where the sections (especially data) are located and
> >> where the stack etc is located. I suggest to also enable DEBUG in
> >> board_f/c.c to see a bit more of the addresses being used.
> >>
> >> Thanks,
> >> Stefan
> >
> > Maybe similar issue as with mbus or atsha?
> > https://lore.kernel.org/u-boot/20220810124609.5765-1-p...@kernel.org/
> > https://lore.kernel.org/u-boot/20220408143015.23163-2-p...@kernel.org/
> >
> > static variables do not work correctly _before_ u-boot relocation. You
> > should avoid usage global OR static variables in code which may be
> > called before relocation. And on some boards are all global, static and
> > bss variables read-only (those which use execute-in-place, e.g. ppc
> > flash).
>
> Thanks for the input. Frankly, I was always a bit hesitant when using
> early static variables. Also with moving them into the data segment.
> Even though this seems to work on some platforms AFAICT.
>
> I've prepared a patch getting rid of this variable by introducing a
> function instead. Tested successfully on my Armada XP platform.
>
> Tony, could you (and perhaps others as well?) test with this new patch,
> if 

Re: [u-boot][PATCH v2 8/8] mtd: rawnand: omap_elm: u-boot driver model support

2022-12-21 Thread Michael Nazzareno Trimarchi
Hi

On Wed, Dec 21, 2022 at 8:57 PM Roger Quadros  wrote:
>
> Hi Michael,
>
> On 21/12/2022 19:56, Michael Nazzareno Trimarchi wrote:
> > Hi Roger
> >
> > On Tue, Dec 20, 2022 at 11:22 AM Roger Quadros  wrote:
> >>
> >> Support u-boot driver model. We still retain
> >> support legacy way of doing things if ELM_BASE
> >> is defined in 
> >>
> >> We could completely get rid of that if all
> >> platforms defining ELM_BASE get rid of that definition
> >> and enable CONFIG_SYS_NAND_SELF_INIT and are verified
> >> to work.
> >>
> >> Signed-off-by: Roger Quadros 
> >> ---
> >
> > When you post please include the relative changelog
>
> I put the changelog in the cover-letter.
>

My bad, I'm always start from patch 1 and look on changes in every single patch

Michael

>
> cheers,
> -roger
>
> >
> > Michael
> >
> >>  drivers/mtd/nand/raw/omap_elm.c   | 35 ++-
> >>  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |  6 
> >>  drivers/mtd/nand/raw/omap_gpmc.c  | 12 ++-
> >>  3 files changed, 51 insertions(+), 2 deletions(-)
> >>  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
> >>
> >> diff --git a/drivers/mtd/nand/raw/omap_elm.c 
> >> b/drivers/mtd/nand/raw/omap_elm.c
> >> index 35c6dd1f1bc..e528a5348d5 100644
> >> --- a/drivers/mtd/nand/raw/omap_elm.c
> >> +++ b/drivers/mtd/nand/raw/omap_elm.c
> >> @@ -15,9 +15,14 @@
> >>  #include 
> >>  #include 
> >>  #include 
> >> -#include 
> >>  #include 
> >>
> >> +#include 
> >> +#include 
> >> +#include 
> >> +
> >> +#include "omap_elm.h"
> >> +
> >>  #define DRIVER_NAME"omap-elm"
> >>  #define ELM_DEFAULT_POLY (0)
> >>
> >> @@ -180,6 +185,7 @@ void elm_reset(void)
> >> ;
> >>  }
> >>
> >> +#ifdef ELM_BASE
> >>  /**
> >>   * elm_init - Initialize ELM module
> >>   *
> >> @@ -191,3 +197,30 @@ void elm_init(void)
> >> elm_cfg = (struct elm *)ELM_BASE;
> >> elm_reset();
> >>  }
> >> +#endif
> >> +
> >> +static int elm_probe(struct udevice *dev)
> >> +{
> >> +#ifndef ELM_BASE
> >> +   struct resource res;
> >> +
> >> +   dev_read_resource(dev, 0, );
> >> +   elm_cfg = devm_ioremap(dev, res.start, resource_size());
> >> +   elm_reset();
> >> +#endif
> >> +
> >> +   return 0;
> >> +}
> >> +
> >> +static const struct udevice_id elm_ids[] = {
> >> +   { .compatible = "ti,am3352-elm" },
> >> +   { .compatible = "ti,am64-elm" },
> >> +   { }
> >> +};
> >> +
> >> +U_BOOT_DRIVER(gpmc_elm) = {
> >> +   .name   = DRIVER_NAME,
> >> +   .id = UCLASS_MTD,
> >> +   .of_match   = elm_ids,
> >> +   .probe  = elm_probe,
> >> +};
> >> diff --git a/include/linux/mtd/omap_elm.h b/drivers/mtd/nand/raw/omap_elm.h
> >> similarity index 97%
> >> rename from include/linux/mtd/omap_elm.h
> >> rename to drivers/mtd/nand/raw/omap_elm.h
> >> index f3db00d55de..a7f7bacb154 100644
> >> --- a/include/linux/mtd/omap_elm.h
> >> +++ b/drivers/mtd/nand/raw/omap_elm.h
> >> @@ -74,6 +74,12 @@ int elm_check_error(u8 *syndrome, enum bch_level 
> >> bch_type, u32 *error_count,
> >> u32 *error_locations);
> >>  int elm_config(enum bch_level level);
> >>  void elm_reset(void);
> >> +#ifdef ELM_BASE
> >>  void elm_init(void);
> >> +#else
> >> +static inline void elm_init(void)
> >> +{
> >> +}
> >> +#endif
> >>  #endif /* __ASSEMBLY__ */
> >>  #endif /* __ASM_ARCH_ELM_H */
> >> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c 
> >> b/drivers/mtd/nand/raw/omap_gpmc.c
> >> index ed6cdf93ad0..9692b78da3c 100644
> >> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> >> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> >> @@ -20,7 +20,8 @@
> >>  #include 
> >>  #include 
> >>  #include 
> >> -#include 
> >> +
> >> +#include "omap_elm.h"
> >>
> >>  #ifndef GPMC_MAX_CS
> >>  #define GPMC_MAX_CS4
> >> @@ -1249,6 +1250,15 @@ void board_nand_init(void)
> >> struct udevice *dev;
> >> int ret;
> >>
> >> +#ifdef CONFIG_NAND_OMAP_ELM
> >> +   ret = uclass_get_device_by_driver(UCLASS_MTD,
> >> + DM_DRIVER_GET(gpmc_elm), );
> >> +   if (ret && ret != -ENODEV) {
> >> +   pr_err("%s: Failed to get ELM device: %d\n", __func__, 
> >> ret);
> >> +   return;
> >> +   }
> >> +#endif
> >> +
> >> ret = uclass_get_device_by_driver(UCLASS_MTD,
> >>   DM_DRIVER_GET(gpmc_nand), );
> >> if (ret && ret != -ENODEV)
> >> --
> >> 2.34.1
> >>
> >
> >



-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com


Re: [u-boot][PATCH v2 8/8] mtd: rawnand: omap_elm: u-boot driver model support

2022-12-21 Thread Roger Quadros
Hi Michael,

On 21/12/2022 19:56, Michael Nazzareno Trimarchi wrote:
> Hi Roger
> 
> On Tue, Dec 20, 2022 at 11:22 AM Roger Quadros  wrote:
>>
>> Support u-boot driver model. We still retain
>> support legacy way of doing things if ELM_BASE
>> is defined in 
>>
>> We could completely get rid of that if all
>> platforms defining ELM_BASE get rid of that definition
>> and enable CONFIG_SYS_NAND_SELF_INIT and are verified
>> to work.
>>
>> Signed-off-by: Roger Quadros 
>> ---
> 
> When you post please include the relative changelog

I put the changelog in the cover-letter.


cheers,
-roger

> 
> Michael
> 
>>  drivers/mtd/nand/raw/omap_elm.c   | 35 ++-
>>  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |  6 
>>  drivers/mtd/nand/raw/omap_gpmc.c  | 12 ++-
>>  3 files changed, 51 insertions(+), 2 deletions(-)
>>  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
>>
>> diff --git a/drivers/mtd/nand/raw/omap_elm.c 
>> b/drivers/mtd/nand/raw/omap_elm.c
>> index 35c6dd1f1bc..e528a5348d5 100644
>> --- a/drivers/mtd/nand/raw/omap_elm.c
>> +++ b/drivers/mtd/nand/raw/omap_elm.c
>> @@ -15,9 +15,14 @@
>>  #include 
>>  #include 
>>  #include 
>> -#include 
>>  #include 
>>
>> +#include 
>> +#include 
>> +#include 
>> +
>> +#include "omap_elm.h"
>> +
>>  #define DRIVER_NAME"omap-elm"
>>  #define ELM_DEFAULT_POLY (0)
>>
>> @@ -180,6 +185,7 @@ void elm_reset(void)
>> ;
>>  }
>>
>> +#ifdef ELM_BASE
>>  /**
>>   * elm_init - Initialize ELM module
>>   *
>> @@ -191,3 +197,30 @@ void elm_init(void)
>> elm_cfg = (struct elm *)ELM_BASE;
>> elm_reset();
>>  }
>> +#endif
>> +
>> +static int elm_probe(struct udevice *dev)
>> +{
>> +#ifndef ELM_BASE
>> +   struct resource res;
>> +
>> +   dev_read_resource(dev, 0, );
>> +   elm_cfg = devm_ioremap(dev, res.start, resource_size());
>> +   elm_reset();
>> +#endif
>> +
>> +   return 0;
>> +}
>> +
>> +static const struct udevice_id elm_ids[] = {
>> +   { .compatible = "ti,am3352-elm" },
>> +   { .compatible = "ti,am64-elm" },
>> +   { }
>> +};
>> +
>> +U_BOOT_DRIVER(gpmc_elm) = {
>> +   .name   = DRIVER_NAME,
>> +   .id = UCLASS_MTD,
>> +   .of_match   = elm_ids,
>> +   .probe  = elm_probe,
>> +};
>> diff --git a/include/linux/mtd/omap_elm.h b/drivers/mtd/nand/raw/omap_elm.h
>> similarity index 97%
>> rename from include/linux/mtd/omap_elm.h
>> rename to drivers/mtd/nand/raw/omap_elm.h
>> index f3db00d55de..a7f7bacb154 100644
>> --- a/include/linux/mtd/omap_elm.h
>> +++ b/drivers/mtd/nand/raw/omap_elm.h
>> @@ -74,6 +74,12 @@ int elm_check_error(u8 *syndrome, enum bch_level 
>> bch_type, u32 *error_count,
>> u32 *error_locations);
>>  int elm_config(enum bch_level level);
>>  void elm_reset(void);
>> +#ifdef ELM_BASE
>>  void elm_init(void);
>> +#else
>> +static inline void elm_init(void)
>> +{
>> +}
>> +#endif
>>  #endif /* __ASSEMBLY__ */
>>  #endif /* __ASM_ARCH_ELM_H */
>> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c 
>> b/drivers/mtd/nand/raw/omap_gpmc.c
>> index ed6cdf93ad0..9692b78da3c 100644
>> --- a/drivers/mtd/nand/raw/omap_gpmc.c
>> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
>> @@ -20,7 +20,8 @@
>>  #include 
>>  #include 
>>  #include 
>> -#include 
>> +
>> +#include "omap_elm.h"
>>
>>  #ifndef GPMC_MAX_CS
>>  #define GPMC_MAX_CS4
>> @@ -1249,6 +1250,15 @@ void board_nand_init(void)
>> struct udevice *dev;
>> int ret;
>>
>> +#ifdef CONFIG_NAND_OMAP_ELM
>> +   ret = uclass_get_device_by_driver(UCLASS_MTD,
>> + DM_DRIVER_GET(gpmc_elm), );
>> +   if (ret && ret != -ENODEV) {
>> +   pr_err("%s: Failed to get ELM device: %d\n", __func__, ret);
>> +   return;
>> +   }
>> +#endif
>> +
>> ret = uclass_get_device_by_driver(UCLASS_MTD,
>>   DM_DRIVER_GET(gpmc_nand), );
>> if (ret && ret != -ENODEV)
>> --
>> 2.34.1
>>
> 
> 


Re: [PATCH] arm: mach-k3: j721e: Add platform data for main_uart2

2022-12-21 Thread Bryan Brattlof
Hi Bhavya!

On December 19, 2022 thus sayeth Bhavya Kapoor:
> Add platform clock and powerdomain data for main_uart2 in J721e. This
> data is used by the driver to register main_uart2 device clocks and
> powerdomains for J721e.
> 
> Signed-off-by: Bhavya Kapoor 
> ---
>  arch/arm/mach-k3/j721e/clk-data.c | 7 +--
>  arch/arm/mach-k3/j721e/dev-data.c | 3 ++-
>  2 files changed, 7 insertions(+), 3 deletions(-)
>

I know there are a lot of changes coming up for the clock tree on all of 
our j7* devices. Would you be comfortable if we held off on this until 
we can get all the other changes lined up?

~Bryan


Re: [u-boot][PATCH v2 8/8] mtd: rawnand: omap_elm: u-boot driver model support

2022-12-21 Thread Michael Nazzareno Trimarchi
Hi Roger

On Tue, Dec 20, 2022 at 11:22 AM Roger Quadros  wrote:
>
> Support u-boot driver model. We still retain
> support legacy way of doing things if ELM_BASE
> is defined in 
>
> We could completely get rid of that if all
> platforms defining ELM_BASE get rid of that definition
> and enable CONFIG_SYS_NAND_SELF_INIT and are verified
> to work.
>
> Signed-off-by: Roger Quadros 
> ---

When you post please include the relative changelog

Michael

>  drivers/mtd/nand/raw/omap_elm.c   | 35 ++-
>  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |  6 
>  drivers/mtd/nand/raw/omap_gpmc.c  | 12 ++-
>  3 files changed, 51 insertions(+), 2 deletions(-)
>  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
>
> diff --git a/drivers/mtd/nand/raw/omap_elm.c b/drivers/mtd/nand/raw/omap_elm.c
> index 35c6dd1f1bc..e528a5348d5 100644
> --- a/drivers/mtd/nand/raw/omap_elm.c
> +++ b/drivers/mtd/nand/raw/omap_elm.c
> @@ -15,9 +15,14 @@
>  #include 
>  #include 
>  #include 
> -#include 
>  #include 
>
> +#include 
> +#include 
> +#include 
> +
> +#include "omap_elm.h"
> +
>  #define DRIVER_NAME"omap-elm"
>  #define ELM_DEFAULT_POLY (0)
>
> @@ -180,6 +185,7 @@ void elm_reset(void)
> ;
>  }
>
> +#ifdef ELM_BASE
>  /**
>   * elm_init - Initialize ELM module
>   *
> @@ -191,3 +197,30 @@ void elm_init(void)
> elm_cfg = (struct elm *)ELM_BASE;
> elm_reset();
>  }
> +#endif
> +
> +static int elm_probe(struct udevice *dev)
> +{
> +#ifndef ELM_BASE
> +   struct resource res;
> +
> +   dev_read_resource(dev, 0, );
> +   elm_cfg = devm_ioremap(dev, res.start, resource_size());
> +   elm_reset();
> +#endif
> +
> +   return 0;
> +}
> +
> +static const struct udevice_id elm_ids[] = {
> +   { .compatible = "ti,am3352-elm" },
> +   { .compatible = "ti,am64-elm" },
> +   { }
> +};
> +
> +U_BOOT_DRIVER(gpmc_elm) = {
> +   .name   = DRIVER_NAME,
> +   .id = UCLASS_MTD,
> +   .of_match   = elm_ids,
> +   .probe  = elm_probe,
> +};
> diff --git a/include/linux/mtd/omap_elm.h b/drivers/mtd/nand/raw/omap_elm.h
> similarity index 97%
> rename from include/linux/mtd/omap_elm.h
> rename to drivers/mtd/nand/raw/omap_elm.h
> index f3db00d55de..a7f7bacb154 100644
> --- a/include/linux/mtd/omap_elm.h
> +++ b/drivers/mtd/nand/raw/omap_elm.h
> @@ -74,6 +74,12 @@ int elm_check_error(u8 *syndrome, enum bch_level bch_type, 
> u32 *error_count,
> u32 *error_locations);
>  int elm_config(enum bch_level level);
>  void elm_reset(void);
> +#ifdef ELM_BASE
>  void elm_init(void);
> +#else
> +static inline void elm_init(void)
> +{
> +}
> +#endif
>  #endif /* __ASSEMBLY__ */
>  #endif /* __ASM_ARCH_ELM_H */
> diff --git a/drivers/mtd/nand/raw/omap_gpmc.c 
> b/drivers/mtd/nand/raw/omap_gpmc.c
> index ed6cdf93ad0..9692b78da3c 100644
> --- a/drivers/mtd/nand/raw/omap_gpmc.c
> +++ b/drivers/mtd/nand/raw/omap_gpmc.c
> @@ -20,7 +20,8 @@
>  #include 
>  #include 
>  #include 
> -#include 
> +
> +#include "omap_elm.h"
>
>  #ifndef GPMC_MAX_CS
>  #define GPMC_MAX_CS4
> @@ -1249,6 +1250,15 @@ void board_nand_init(void)
> struct udevice *dev;
> int ret;
>
> +#ifdef CONFIG_NAND_OMAP_ELM
> +   ret = uclass_get_device_by_driver(UCLASS_MTD,
> + DM_DRIVER_GET(gpmc_elm), );
> +   if (ret && ret != -ENODEV) {
> +   pr_err("%s: Failed to get ELM device: %d\n", __func__, ret);
> +   return;
> +   }
> +#endif
> +
> ret = uclass_get_device_by_driver(UCLASS_MTD,
>   DM_DRIVER_GET(gpmc_nand), );
> if (ret && ret != -ENODEV)
> --
> 2.34.1
>


-- 
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
mich...@amarulasolutions.com
__

Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
i...@amarulasolutions.com
www.amarulasolutions.com


Re: Pull request for efi-2023-01-rc5

2022-12-21 Thread Tom Rini
On Tue, Dec 20, 2022 at 05:21:29PM +0100, Heinrich Schuchardt wrote:

> The following changes since commit 2243922edca9f56a9d5519b9d6e36f5d7a18434d:
> 
>   Prepare v2023.01-rc4 (2022-12-19 08:45:26 -0500)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-efi.git
> tags/efi-2023-01-rc5
> 
> for you to fetch changes up to ad50ca5019ae2b4f6ad5ffb4d62808b640f7b8aa:
> 
>   eficonfig: EFI_VARIABLE_APPEND_WRITE is not set for null key (2022-12-20
> 16:06:48 +0100)
> 
> Gitlab CI showed no issues:
> https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/14471
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: Pull request for tpm-20122022

2022-12-21 Thread Tom Rini
On Tue, Dec 20, 2022 at 09:45:53AM +0200, Ilias Apalodimas wrote:

> Hi Tom,
> 
> The following changes since commit 2243922edca9f56a9d5519b9d6e36f5d7a18434d:
> 
>   Prepare v2023.01-rc4 (2022-12-19 08:45:26 -0500)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-tpm/ tags/tpm-20122022
> 
> for you to fetch changes up to 33ba80303e93869c439828dd289fb8ef64ed3bfc:
> 
>   tpm2: ftpm: open session with privileged ree login (2022-12-20 09:37:36 
> +0200)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 0/2] Enable distroboot as a boot option for am62x

2022-12-21 Thread Bryan Brattlof
Hi Martyn!

On December 20, 2022 thus sayeth Martyn Welch:
> The am62x config currently doesn't enable distroboot as an option for
> booting. Add this as a further option after the existing mechanisms have
> failed.
> 
> Whilst working on this it was found that boot detection was failing on
> the am625-sk when attempting to boot from raw offsets on an SD card.
> Boot mode is updated to correctly detect the boot mode from the SoC boot
> config.
> 
> Martyn Welch (2):
>   arm64:mach-k3 am625_init: Correct boot mode detection
>   configs: Enable distroboot on am625

Reviewed-by: Bryan Brattlof 

I'm excited to start getting rid of these custom boot scripts

I was looking at 'Standard Boot'[0] as my solution :)

~Bryan

[0] https://u-boot.readthedocs.io/en/latest/develop/bootstd.html


Re: [PATCH 1/3] dt-bindings: mfd: add at91-usart.h from Linux

2022-12-21 Thread Eugen.Hristev
On 11/25/22 10:29, Claudiu Beznea - M18063 wrote:
> On 25.11.2022 09:54, Eugen Hristev wrote:
>> Copy include file dt-bindings/mfd/at91-usart.h from Linux
>>
>> Signed-off-by: Eugen Hristev 
> 
> Reviewed-by: Claudiu Beznea 
> 

Applied series to u-boot-at91/next , thanks !



Re: [PATCH] ARM: dts: at91: sama5d2: fix wrong interrupt-cells property

2022-12-21 Thread Eugen.Hristev
On 12/12/22 12:07, Claudiu Beznea - M18063 wrote:
> On 12.12.2022 11:59, Eugen Hristev wrote:
>> The PMC node is not an interrupt provider, so it must not have
>> interrupt-cells.
>>
>> This fixes the warning (on newer DTC):
>> arch/arm/dts/sama5d2.dtsi:82.22-602.6: Warning (interrupt_provider): 
>> /ahb/apb/pmc@f0014000: '#interrupt-cells' found, but node is not an 
>> interrupt provider
>>
>> Fixes: 2c4b2dd289 ("ARM: at91/dt: Add device tree for SAMA5D2 Xplained")
>> Signed-off-by: Eugen Hristev 
> 
> Reviewed-by: Claudiu Beznea 
> 
> 

Applied to u-boot-at91/next




Re: [PATCH] ARM: mach-at91: add support for sama7g5 chip id and extended id definition

2022-12-21 Thread Eugen.Hristev
On 12/2/22 09:47, Mihai Sain wrote:
> Add SAMA7G5 series chip id definitions to align with linux SoC driver.
> Add support for SAMA7G5 System-In-Package (SIP):
> SAMA7G54D1G, SAMA7G54D2G, SAMA7G54D4G.
> 
> Signed-off-by: Mihai Sain 
> ---


Applied to u-boot-at91/next , thanks !


Re: [PATCH] lds: align u-boot-nodtb with 8 bytes boundary

2022-12-21 Thread Eugen.Hristev
On 12/18/22 01:59, Pali Rohár wrote:
> On Saturday 17 December 2022 23:54:40 Pali Rohár wrote:
>> On Saturday 17 December 2022 23:04:08 Pali Rohár wrote:
>>> On Saturday 17 December 2022 14:40:44 Simon Glass wrote:
 Hi Pali,

 On Thu, 15 Dec 2022 at 16:13, Pali Rohár  wrote:
>
> On Thursday 15 December 2022 06:24:16 Simon Glass wrote:
>> Hi Eugen,
>>
>> On Thu, 15 Dec 2022 at 03:58, Eugen Hristev 
>>  wrote:
>>>
>>> Newer DTC require that the DTB start address is aligned at 8 bytes.
>>> In the u-boot.bin case, the u-boot-nodtb.bin is concatenated with the
>>> DTB, but there is no alignment/padding to the next 8byte aligned 
>>> address.
>>> This causes the board to fail booting, because the FDT will claim
>>> that the DTB inside u-boot.bin is not a valid DTB, it will fail with
>>> -FDT_ERR_ALIGNMENT.
>>> To solve this, have the u-boot binary `_end` aligned with 8 bytes.
>>> The objcopy in the Makefile will create the u-boot-nodtb.bin and it has 
>>> to
>>> be truncated to 8 bytes to correspond to the u-boot.map file which will
>>> have the `_end` aligned to 8 bytes.
>>> The lds files which use devicetrees have been changed to align the 
>>> `_end`
>>> tag with 8 bytes.
>>>
>>> This patch is also a prerequisite to have the possibility to update the
>>> dtc inside u-boot to newer versions (1.6.1+)
>>>
>>> Signed-off-by: Eugen Hristev 
>>> ---
>>> Hi,
>>>
>>> I could not test all affected boards, it's an impossible task.
>>> I tried this on at91 boards which I have, and ran the CI on denx.
>>> I cannot guarantee that no other boards are affected, so this patch is 
>>> a bit
>>> of an RFC.
>>> If the u-boot-nodtb.bin does not have the size equal with the 
>>> corresponding
>>> one in u-boot.map, the binary_size_check will fail at build time with
>>> something like this:
>>>
>>> u-boot.map shows a binary size of 502684
>>> but u-boot-nodtb.bin shows 502688
>>>
>>> Thanks,
>>> Eugen
>>>
>>>   Makefile| 2 ++
>>>   arch/arm/cpu/armv8/u-boot.lds   | 4 ++--
>>>   arch/arm/cpu/u-boot-spl.lds | 1 +
>>>   arch/arm/cpu/u-boot.lds | 1 +
>>>   arch/arm/lib/elf_arm_efi.lds| 5 +
>>>   arch/arm/mach-at91/arm926ejs/u-boot-spl.lds | 2 +-
>>>   arch/arm/mach-at91/armv7/u-boot-spl.lds | 2 +-
>>>   arch/arm/mach-zynq/u-boot-spl.lds   | 2 +-
>>>   arch/mips/cpu/u-boot.lds| 2 +-
>>>   arch/sandbox/cpu/u-boot.lds | 6 ++
>>>   arch/sh/cpu/u-boot.lds  | 2 ++
>>>   board/ti/am335x/u-boot.lds  | 1 +
>>>   tools/binman/test/u_boot_binman_embed.lds   | 2 +-
>>>   13 files changed, 25 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/Makefile b/Makefile
>>> index 9d84f96481..b4d387bcce 100644
>>> --- a/Makefile
>>> +++ b/Makefile
>>> @@ -1317,6 +1317,8 @@ endif
>>>
>>>   u-boot-nodtb.bin: u-boot FORCE
>>>  $(call if_changed,objcopy_uboot)
>>> +# Make sure the size is 8 byte-aligned.
>>> +   @truncate -s %8 $@
>>>  $(BOARD_SIZE_CHECK)
>>
>> I agree this line is needed, since otherwise we will only get 4-byte
>> alignment.
>
> Hello! I do not fully agree that this line is needed.
>
> The whole issue is about DTB binary and its offset. So code/Makefile
> which construct u-boot.bin should be fixed and not u-boot-nodtb.bin.

 While I agree that is true in theory, im practice we do actually need
 the _image_binary_end symbol to point to the right place. It is
 hopelessly confusing if u-boot-nodtb.bin is shorter than indicated by
 that symbol, and this is why we have binary_size_check

 So I believe that padding u-boot-nodtb.bin is the best solution.

 With binman we can fairly easily pad to solve the problem, e.g. by
 always adding 'align = <8>' to dtb entries, but when using 'cat' to
 put images together, it is much easier if the original image has an
 aligned size.
>>>
>>> I think that we should write rules to produce u-boot*.bin binaries of
>>> correct size (as it is written in ELF metadata) and not "workarounding"
>>> it by "truncate -s %8" command or "align = <8>" binman directive.
>>>
>>> Either by reading correct size from ELF or MAP file and then manually
>>> calling "truncate -s" or by issuing objcopy or "fixing" linker / script
>>> to do it.
>>>
>>> And it is because position where DTB file starts is already defined in
>>> linker script. And this should be source of the truth.
>>>
>>> So I'm fine with fixing also u-boot-nodtb.bin target but not by
>>> "@truncate -s %8 $@" rule.
>>>
>
>> But it would be better if we could have the linker scripts

Re: [PATCH v7 06/12] binman: Support new op-tee binary format

2022-12-21 Thread Jerome Forissier
Hi Simon,

On 12/17/22 22:28, Simon Glass wrote:
> OP-TEE has a format with a binary header that can be used instead of the
> ELF file. With newer versions of OP-TEE this may be required on some
> platforms.
> 
> Add support for this in binman. First, add a method to obtain the ELF
> sections from an entry, then use that in the FIT support. We then end up
> with the ability to support both types of OP-TEE files, depending on which
> one is passed in with the entry argument (TEE=xxx in the U-Boot build).
> 
> Signed-off-by: Simon Glass 
> ---
> 
> Changes in v7:
> - Correct missing test coverage
> 
> Changes in v6:
> - Update op-tee to support new v1 binary header

Thanks for the update. I'm trying to test this. How am I supposed to
pass the BL31 and TEE binaries? Currently I build u-boot with:

  BL31=/path/to/bl31.elf TEE=/path/to/tee.bin make -C u-boot 
CROSS_COMPILE=aarch64-linux-gnu- CC=aarch64-linux-gnu-gcc HOSTCC=gcc

I applied the series onto the 'next' branch and built as usual but the board
failed to boot so I suspect I am missing something.

Thanks,
-- 
Jerome


[PATCH] dm: pinctrl: Revert "pinctrl: probe pinctrl drivers during post-bind"

2022-12-21 Thread Simon Glass
This breaks chromebook_coral and it is also not how things should work. If
a board needs to bind GPIOs as part of a pinctrl driver this can be done
during the bind step, if needed.

We cannot probe pinctrl devices when binding as a rule, since it cannot be
supported on some platforms.

The bind and probe steps are separate in U-Boot and they should remain
separate.

This reverts commit f9ec791b5e24378b71590877499f8683d5f54dac.

Signed-off-by: Simon Glass 
---

 drivers/pinctrl/pinctrl-uclass.c | 7 ---
 1 file changed, 7 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-uclass.c b/drivers/pinctrl/pinctrl-uclass.c
index ce2d5ddf6d9..a1b85ca87e5 100644
--- a/drivers/pinctrl/pinctrl-uclass.c
+++ b/drivers/pinctrl/pinctrl-uclass.c
@@ -403,13 +403,6 @@ static int __maybe_unused pinctrl_post_bind(struct udevice 
*dev)
 {
const struct pinctrl_ops *ops = pinctrl_get_ops(dev);
 
-   /*
-* Make sure that the pinctrl driver gets probed after binding
-* as some pinctrl drivers also register the GPIO driver during
-* probe, and if they are not probed GPIO-s are not registered.
-*/
-   dev_or_flags(dev, DM_FLAG_PROBE_AFTER_BIND);
-
if (!ops) {
dev_dbg(dev, "ops is not set.  Do not bind.\n");
return -EINVAL;
-- 
2.39.0.314.g84b9a713c41-goog



Bootargs in RPI not working

2022-12-21 Thread Sai Kiran Kumar Reddy Y
Hi,

I have U-Boot 2022.10 version. I am trying to boot Raspberry Pi(Model 3B+)
using U-Boot. In the U-Boot terminal when I set kernel command-line
arguments, using "setenv bootargs root=/dev/mmblk0p3 ro rootwait
console=serial0,115200 console=tty1", the Kernel is not loaded. Following
are the messages I get on the U-boot terminal

" EFI stub: Booting Linux Kernel...
EFI stub: EFI_RING_PROTOCOL unavailable
EFI stub: Using DTB from configuration table
EFI stub: exiting boot services..."

When I do not add any bootargs variables to U-Boot environment, Pi boots
with Linux. Am I missing something? I am not able to figure out the reason
for this. Could you help me with this?



-- 
Regards,
Sai Kiran.


[PATCH v1 1/1] makefile: add multi_dtb_fit dep

2022-12-21 Thread Neal Frager
With certain gcc compilers, the u-boot.itb is built immediately after dtb
generation.  If CONFIG_MULTI_DTB_FIT is used, it is possible that the
fit-dtb.blob is not finished in time.

This patch adds a necessary dependency to guarantee that the fit-dtb.blob
is built before attempting to build the u-boot.itb.

Signed-off-by: Neal Frager 
---
 Makefile | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Makefile b/Makefile
index b96e2ffa15..682a5d94fd 100644
--- a/Makefile
+++ b/Makefile
@@ -1425,6 +1425,7 @@ MKIMAGEFLAGS_u-boot.itb += -B 0x8
 ifdef U_BOOT_ITS
 u-boot.itb: u-boot-nodtb.bin \
$(if 
$(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_SANDBOX),dts/dt.dtb) \
+   $(if $(CONFIG_MULTI_DTB_FIT),$(FINAL_DTB_CONTAINER)) \
$(U_BOOT_ITS) FORCE
$(call if_changed,mkfitimage)
$(BOARD_SIZE_CHECK)
-- 
2.17.1



[PATCH V2 12/12] include: configs: Update env for selecting right dtb

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Now that single defconfig shall be used for booting J721S2 EVM and
AM68 SK, the default device tree will not work for selecting dtb for
kernel. Update the findfdt env to select right dtb based on
board_name env variable.

Signed-off-by: Sinthu Raja 
---
 include/configs/j721s2_evm.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/configs/j721s2_evm.h b/include/configs/j721s2_evm.h
index 932d7d3c8c..715f03048a 100644
--- a/include/configs/j721s2_evm.h
+++ b/include/configs/j721s2_evm.h
@@ -32,6 +32,10 @@
"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"  \
"findfdt="  \
"setenv name_fdt ${default_device_tree};"   \
+   "if test $board_name = j721s2; then "   \
+   "setenv name_fdt k3-j721s2-common-proc-board.dtb; fi;" \
+   "if test $board_name = am68-sk; then "  \
+   "setenv name_fdt k3-am68-sk-base-board.dtb; fi;"\
"setenv fdtfile ${name_fdt}\0"  \
"name_kern=Image\0" \
"console=ttyS2,115200n8\0"  \
-- 
2.36.1



[PATCH V2 11/12] arm: dts: k3-am68-sk: Add r5 specific dt support

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Add initial support for AM68 SK device tree that runs on R5.

Signed-off-by: Sinthu Raja 
---
 arch/arm/dts/Makefile |   1 +
 arch/arm/dts/k3-am68-sk-r5-base-board.dts | 194 ++
 2 files changed, 195 insertions(+)
 create mode 100644 arch/arm/dts/k3-am68-sk-r5-base-board.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6d49b7..be6e7b4e79 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1250,6 +1250,7 @@ dtb-$(CONFIG_SOC_K3_J721E) += 
k3-j721e-common-proc-board.dtb \
  k3-j721e-sk.dtb \
  k3-j721e-r5-sk.dtb
 dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
+  k3-am68-sk-r5-base-board.dtb\
   k3-j721s2-common-proc-board.dtb\
   k3-j721s2-r5-common-proc-board.dtb
 dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
diff --git a/arch/arm/dts/k3-am68-sk-r5-base-board.dts 
b/arch/arm/dts/k3-am68-sk-r5-base-board.dts
new file mode 100644
index 00..46ee6c4422
--- /dev/null
+++ b/arch/arm/dts/k3-am68-sk-r5-base-board.dts
@@ -0,0 +1,194 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+
+#include "k3-am68-sk-som.dtsi"
+#include "k3-j721s2-ddr-evm-lp4-4266.dtsi"
+#include "k3-j721s2-ddr.dtsi"
+
+/ {
+   chosen {
+   firmware-loader = _loader0;
+   stdout-path = _uart8;
+   tick-timer = 
+   };
+
+   aliases {
+   remoteproc0 = 
+   remoteproc1 = _0;
+   };
+
+   fs_loader0: fs_loader@0 {
+   compatible = "u-boot,fs-loader";
+   u-boot,dm-pre-reloc;
+   };
+
+   a72_0: a72@0 {
+   compatible = "ti,am654-rproc";
+   reg = <0x0 0x00a9 0x0 0x10>;
+   power-domains = <_pds 61 TI_SCI_PD_EXCLUSIVE>,
+   <_pds 202 TI_SCI_PD_EXCLUSIVE>;
+   resets = <_reset 202 0>;
+   clocks = <_clks 61 1>;
+   assigned-clocks = <_clks 61 1>, <_clks 202 0>;
+   assigned-clock-parents = <_clks 61 2>;
+   assigned-clock-rates = <2>, <20>;
+   ti,sci = <>;
+   ti,sci-proc-id = <32>;
+   ti,sci-host-id = <10>;
+   u-boot,dm-spl;
+   };
+
+   clk_200mhz: dummy_clock_200mhz {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <2>;
+   u-boot,dm-spl;
+   };
+
+   clk_19_2mhz: dummy_clock_19_2mhz {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <1920>;
+   u-boot,dm-spl;
+   };
+};
+
+_mcu_wakeup {
+   sa3_secproxy: secproxy@4488 {
+   u-boot,dm-spl;
+   compatible = "ti,am654-secure-proxy";
+   reg = <0x0 0x4488 0x0 0x2>,
+ <0x0 0x4486 0x0 0x2>,
+ <0x0 0x4360 0x0 0x1>;
+   reg-names = "rt", "scfg", "target_data";
+   #mbox-cells = <1>;
+   };
+
+   mcu_secproxy: secproxy@2a38 {
+   compatible = "ti,am654-secure-proxy";
+   reg = <0x0 0x2a38 0x0 0x8>,
+ <0x0 0x2a40 0x0 0x8>,
+ <0x0 0x2a48 0x0 0x8>;
+   reg-names = "rt", "scfg", "target_data";
+   #mbox-cells = <1>;
+   u-boot,dm-spl;
+   };
+
+   sysctrler: sysctrler {
+   compatible = "ti,am654-system-controller";
+   mboxes= <_secproxy 4>, <_secproxy 5>, <_secproxy 5>;
+   mbox-names = "tx", "rx", "boot_notify";
+   u-boot,dm-spl;
+   };
+
+   dm_tifs: dm-tifs {
+   compatible = "ti,j721e-dm-sci";
+   ti,host-id = <3>;
+   ti,secure-host;
+   mbox-names = "rx", "tx";
+   mboxes= <_secproxy 21>,
+   <_secproxy 23>;
+   u-boot,dm-spl;
+   };
+};
+
+_pmx0 {
+   main_uart8_pins_default: main-uart8-pins-default {
+   pinctrl-single,pins = <
+   J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) 
SPI0_CS1.UART8_RXD */
+   J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) 
SPI0_CLK.UART8_TXD */
+   >;
+   };
+
+   main_mmc1_pins_default: main-mmc1-pins-default {
+   pinctrl-single,pins = <
+   J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
+   J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
+   J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
+   J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* 

[PATCH V2 10/12] arm: dts: Add support for A72 specific AM68 Starter Kit Base Board

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja 
---
 arch/arm/dts/Makefile |   3 +-
 .../arm/dts/k3-am68-sk-base-board-u-boot.dtsi | 150 
 arch/arm/dts/k3-am68-sk-base-board.dts| 353 ++
 3 files changed, 505 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
 create mode 100644 arch/arm/dts/k3-am68-sk-base-board.dts

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 43951a7731..6d49b7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1249,7 +1249,8 @@ dtb-$(CONFIG_SOC_K3_J721E) += 
k3-j721e-common-proc-board.dtb \
  k3-j7200-r5-common-proc-board.dtb \
  k3-j721e-sk.dtb \
  k3-j721e-r5-sk.dtb
-dtb-$(CONFIG_SOC_K3_J721S2) += k3-j721s2-common-proc-board.dtb\
+dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
+  k3-j721s2-common-proc-board.dtb\
   k3-j721s2-r5-common-proc-board.dtb
 dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
  k3-am642-r5-evm.dtb \
diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi 
b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
new file mode 100644
index 00..12faaae59b
--- /dev/null
+++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+   chosen {
+   stdout-path = "serial2:115200n8";
+   tick-timer = 
+   };
+
+   aliases {
+   serial0 = _uart0;
+   serial1 = _uart0;
+   serial2 = _uart8;
+   i2c0 = _i2c0;
+   i2c1 = _i2c0;
+   i2c2 = _i2c1;
+   i2c3 = _i2c0;
+   ethernet0 = _port1;
+   mmc1 = _sdhci1;
+   };
+};
+
+_i2c0 {
+   u-boot,dm-spl;
+};
+
+_main {
+   u-boot,dm-spl;
+};
+
+_navss {
+   u-boot,dm-spl;
+};
+
+_mcu_wakeup {
+   u-boot,dm-spl;
+
+   timer1: timer@4040 {
+   compatible = "ti,omap5430-timer";
+   reg = <0x0 0x4040 0x0 0x80>;
+   ti,timer-alwon;
+   clock-frequency = <25000>;
+   u-boot,dm-spl;
+   };
+
+   chipid@4314 {
+   u-boot,dm-spl;
+   };
+};
+
+_navss {
+   u-boot,dm-spl;
+};
+
+_ringacc {
+   reg =   <0x0 0x2b80 0x0 0x40>,
+   <0x0 0x2b00 0x0 0x40>,
+   <0x0 0x2859 0x0 0x100>,
+   <0x0 0x2a50 0x0 0x4>,
+   <0x0 0x2844 0x0 0x4>;
+   reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+   u-boot,dm-spl;
+};
+
+_udmap {
+   reg =   <0x0 0x285c 0x0 0x100>,
+   <0x0 0x284c 0x0 0x4000>,
+   <0x0 0x2a80 0x0 0x4>,
+   <0x0 0x284a 0x0 0x4000>,
+   <0x0 0x2aa0 0x0 0x4>,
+   <0x0 0x2840 0x0 0x2000>;
+   reg-names = "gcfg", "rchan", "rchanrt", "tchan",
+   "tchanrt", "rflow";
+   u-boot,dm-spl;
+};
+
+_proxy_main {
+   u-boot,dm-spl;
+};
+
+ {
+   u-boot,dm-spl;
+   k3_sysreset: sysreset-controller {
+   compatible = "ti,sci-sysreset";
+   u-boot,dm-spl;
+   };
+};
+
+_pmx0 {
+   u-boot,dm-spl;
+};
+
+_uart8_pins_default {
+   u-boot,dm-spl;
+};
+
+_mmc1_pins_default {
+   u-boot,dm-spl;
+};
+
+_pmx0 {
+   u-boot,dm-spl;
+};
+
+_pds {
+   u-boot,dm-spl;
+};
+
+_clks {
+   u-boot,dm-spl;
+};
+
+_reset {
+   u-boot,dm-spl;
+};
+
+_uart8 {
+   u-boot,dm-spl;
+};
+
+_uart0 {
+   u-boot,dm-spl;
+};
+
+_uart0 {
+   u-boot,dm-spl;
+};
+
+_cpsw {
+   reg = <0x0 0x4600 0x0 0x20>,
+ <0x0 0x40f00200 0x0 0x8>;
+   reg-names = "cpsw_nuss", "mac_efuse";
+   /delete-property/ ranges;
+
+   cpsw-phy-sel@40f04040 {
+   compatible = "ti,am654-cpsw-phy-sel";
+   reg= <0x0 0x40f04040 0x0 0x4>;
+   reg-names = "gmii-sel";
+   };
+};
+
+_sdhci0 {
+   status = "disabled";
+};
+
+_sdhci1 {
+   u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts 
b/arch/arm/dts/k3-am68-sk-base-board.dts
new file mode 100644
index 00..8fc03324ab
--- /dev/null
+++ b/arch/arm/dts/k3-am68-sk-base-board.dts
@@ -0,0 +1,353 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ 

[PATCH V2 08/12] board: ti: j721s2: Add board_init and support for selecting DT based on EEPROM

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Add the board_init_f API for SPL and run the platform-required SoC 
initialization.

Add the functionality for board name-based DTB selection from FIT within SPL. 
This
will make it easier to utilise one defconfig for both the EVM and the SK.

Signed-off-by: Sinthu Raja 
---

Changes in V2:
=
Address review comments:
- Move board_init and board detection API to board specific file.

 board/ti/j721s2/evm.c | 66 +++
 1 file changed, 66 insertions(+)

diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 7e448bd51c..7f0ad38b91 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "../common/board_detect.h"
 
@@ -202,3 +203,68 @@ int board_late_init(void)
 void spl_board_init(void)
 {
 }
+
+#ifdef CONFIG_SPL_OF_LIST
+void do_dt_magic(void)
+{
+int ret, rescan, mmc_dev = -1;
+static struct mmc *mmc;
+
+if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
+do_board_detect();
+
+/*
+ * Board detection has been done.
+ * Let us see if another dtb wouldn't be a better match
+ * for our board
+ */
+if (IS_ENABLED(CONFIG_CPU_V7R)) {
+ret = fdtdec_resetup();
+if (!ret && rescan) {
+dm_uninit();
+dm_init_and_scan(true);
+}
+}
+
+/*
+ * Because of multi DTB configuration, the MMC device has
+ * to be re-initialized after reconfiguring FDT inorder to
+ * boot from MMC. Do this when boot mode is MMC and ROM has
+ * not loaded SYSFW.
+ */
+switch (spl_boot_device()) {
+case BOOT_DEVICE_MMC1:
+mmc_dev = 0;
+break;
+case BOOT_DEVICE_MMC2:
+case BOOT_DEVICE_MMC2_2:
+mmc_dev = 1;
+break;
+}
+
+if (mmc_dev > 0 && !check_rom_loaded_sysfw()) {
+ret = mmc_init_device(mmc_dev);
+if (!ret) {
+mmc = find_mmc_device(mmc_dev);
+if (mmc) {
+ret = mmc_init(mmc);
+if (ret) {
+printf("mmc init failed with error: 
%d\n", ret);
+}
+}
+}
+}
+}
+#endif
+
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong dummy)
+{
+   k3_spl_init();
+#ifdef CONFIG_SPL_OF_LIST
+   do_dt_magic();
+#endif
+   k3_mem_init();
+
+}
+#endif
-- 
2.36.1



[PATCH V2 09/12] arm: dts: Add initial support for AM68 Starter Kit System on Module

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.

AM68 SK supports the following interfaces:
* 16 GB LPDDR4 RAM
* x1 Gigabit Ethernet interface
* x1 USB 3.1 Type-C port
* x2 USB 3.1 Type-A ports
* x1 PCIe M.2 M Key
* 512 Mbit OSPI flash
* x2 CSI2 Camera interface (RPi and TI Camera connector)
* 40-pin Raspberry Pi GPIO header

SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.

Schematics: https://www.ti.com/lit/zip/SPRR463
TRM: http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Sinthu Raja 
---

The Kerenl DTSI are under review and waiting to get merged.
Kernel Link: 
https://lore.kernel.org/linux-arm-kernel/20221115154832.19759-4-sinthu.r...@ti.com/T/#mbfef0638ffc4ecfa71304014efc03131b2b925a9

 arch/arm/dts/k3-am68-sk-som.dtsi | 127 +++
 1 file changed, 127 insertions(+)
 create mode 100644 arch/arm/dts/k3-am68-sk-som.dtsi

diff --git a/arch/arm/dts/k3-am68-sk-som.dtsi b/arch/arm/dts/k3-am68-sk-som.dtsi
new file mode 100644
index 00..cb1c58fcd1
--- /dev/null
+++ b/arch/arm/dts/k3-am68-sk-som.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/dts-v1/;
+
+#include "k3-j721s2.dtsi"
+#include 
+
+/ {
+   memory@8000 {
+   device_type = "memory";
+   /* 16 GB RAM */
+   reg = <0x00 0x8000 0x00 0x8000>,
+ <0x08 0x8000 0x03 0x8000>;
+   };
+
+   /* Reserving memory regions still pending */
+   reserved_memory: reserved-memory {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ranges;
+
+   secure_ddr: optee@9e80 {
+   reg = <0x00 0x9e80 0x00 0x0180>;
+   alignment = <0x1000>;
+   no-map;
+   };
+   };
+};
+
+_cluster0 {
+   status = "disabled";
+};
+
+_cluster1 {
+   status = "disabled";
+};
+
+_cluster2 {
+   status = "disabled";
+};
+
+_cluster3 {
+   status = "disabled";
+};
+
+_cluster4 {
+   status = "disabled";
+};
+
+_cluster5 {
+   status = "disabled";
+};
+
+_cluster6 {
+   status = "disabled";
+};
+
+_cluster7 {
+   status = "disabled";
+};
+
+_cluster8 {
+   status = "disabled";
+};
+
+_cluster9 {
+   status = "disabled";
+};
+
+_cluster10 {
+   status = "disabled";
+};
+
+_cluster11 {
+   status = "disabled";
+};
+
+_cluster0 {
+   status = "disabled";
+};
+
+_cluster1 {
+   status = "disabled";
+};
+
+_cluster2 {
+   status = "disabled";
+};
+
+_cluster3 {
+   status = "disabled";
+};
+
+_cluster4 {
+   status = "disabled";
+};
+
+_cluster5 {
+   status = "disabled";
+};
+
+_cluster6 {
+   status = "disabled";
+};
+
+_cluster7 {
+   status = "disabled";
+};
+
+_cluster8 {
+   status = "disabled";
+};
+
+_cluster9 {
+   status = "disabled";
+};
+
+_cluster10 {
+   status = "disabled";
+};
+
+_cluster11 {
+   status = "disabled";
+};
-- 
2.36.1



[PATCH V2 07/12] arch: mach-k3: Update board specific API name to K3 generic API name

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Although the board_init_f API initialises the SoC, the API name is
incorrectly specified and misleads the functionality. This file should
only include k3-specific functionality. Change the API's name to something
more K3-specific and separate the function to make it more modular.

Signed-off-by: Sinthu Raja 
---
 arch/arm/mach-k3/include/mach/sys_proto.h |  3 +++
 arch/arm/mach-k3/j721s2_init.c| 13 -
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-k3/include/mach/sys_proto.h 
b/arch/arm/mach-k3/include/mach/sys_proto.h
index 60287b261c..3d3d90d02d 100644
--- a/arch/arm/mach-k3/include/mach/sys_proto.h
+++ b/arch/arm/mach-k3/include/mach/sys_proto.h
@@ -19,4 +19,7 @@ int fdt_disable_node(void *blob, char *node_path);
 bool soc_is_j721e(void);
 bool soc_is_j7200(void);
 
+void k3_spl_init(void);
+void k3_mem_init(void);
+bool check_rom_loaded_sysfw(void);
 #endif
diff --git a/arch/arm/mach-k3/j721s2_init.c b/arch/arm/mach-k3/j721s2_init.c
index 0206b01d9e..60fbbce683 100644
--- a/arch/arm/mach-k3/j721s2_init.c
+++ b/arch/arm/mach-k3/j721s2_init.c
@@ -93,7 +93,7 @@ static void store_boot_info_from_rom(void)
   sizeof(struct rom_extended_boot_data));
 }
 
-void board_init_f(ulong dummy)
+void k3_spl_init()
 {
struct udevice *dev;
int ret;
@@ -154,6 +154,17 @@ void board_init_f(ulong dummy)
 
/* Output System Firmware version info */
k3_sysfw_print_ver();
+}
+
+bool check_rom_loaded_sysfw(void)
+{
+   return is_rom_loaded_sysfw();
+}
+
+void k3_mem_init()
+{
+   struct udevice *dev;
+   int ret;
 
if (IS_ENABLED(CONFIG_TARGET_J721S2_R5_EVM)) {
ret = uclass_get_device_by_name(UCLASS_MISC, "msmc", );
-- 
2.36.1



[PATCH V2 06/12] oboard: ti: j721s2: Add support for detecting multiple device trees

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.

Also restrict multpile EEPROM reads by verifying if EEPROM is already
read

Signed-off-by: Sinthu Raja 
---

Address review comments:
- Remove support for detecting multiple device trees using different DTB

V1: 
https://patchwork.ozlabs.org/project/uboot/patch/20221027104846.11820-7-sinthu.r...@ti.com/

 board/ti/j721s2/evm.c | 30 --
 1 file changed, 20 insertions(+), 10 deletions(-)

diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 88470e4d71..7e448bd51c 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -72,16 +72,6 @@ int dram_init_banksize(void)
return 0;
 }
 
-#ifdef CONFIG_SPL_LOAD_FIT
-int board_fit_config_name_match(const char *name)
-{
-   if (!strcmp(name, "k3-j721s2-common-proc-board"))
-   return 0;
-
-   return -1;
-}
-#endif
-
 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 int ft_board_setup(void *blob, struct bd_info *bd)
 {
@@ -111,6 +101,9 @@ int do_board_detect(void)
 {
int ret;
 
+   if (board_ti_was_eeprom_read())
+   return 0;
+
ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
 CONFIG_EEPROM_CHIP_ADDRESS);
if (ret) {
@@ -179,6 +172,23 @@ static void setup_serial(void)
 }
 #endif
 
+#ifdef CONFIG_SPL_LOAD_FIT
+int board_fit_config_name_match(const char *name)
+{
+   bool eeprom_read = board_ti_was_eeprom_read();
+
+   if (!eeprom_read || board_is_j721s2_som()) {
+   if (!strcmp(name, "k3-j721s2-common-proc-board"))
+   return 0;
+   } else if (!eeprom_read || board_is_am68_sk_som()) {
+   if (!strcmp(name, "k3-am68-sk-base-board"))
+   return 0;
+   }
+
+   return -1;
+}
+#endif
+
 int board_late_init(void)
 {
if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT)) {
-- 
2.36.1



[PATCH V2 05/12] board: ti: j721s2: Enable support for reading EEPROM at next alternate address

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.

Signed-off-by: Sinthu Raja 
---
 board/ti/j721s2/evm.c | 12 +---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index de885085b3..88470e4d71 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -113,9 +113,15 @@ int do_board_detect(void)
 
ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
 CONFIG_EEPROM_CHIP_ADDRESS);
-   if (ret)
-   pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
-  CONFIG_EEPROM_CHIP_ADDRESS, ret);
+   if (ret) {
+   printf("EEPROM not available at 0x%02x, trying to read at 
0x%02x\n",
+  CONFIG_EEPROM_CHIP_ADDRESS, CONFIG_EEPROM_CHIP_ADDRESS + 
1);
+   ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
+CONFIG_EEPROM_CHIP_ADDRESS + 
1);
+   if (ret)
+   pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
+   CONFIG_EEPROM_CHIP_ADDRESS + 1, ret);
+   }
 
return ret;
 }
-- 
2.36.1



[PATCH V2 04/12] board: ti: j721s2: Add support to update board_name for am68-sk

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Update setup_board_eeprom_env() to choose the right board name
for am68-sk.

Signed-off-by: Sinthu Raja 
---

Changes in V2:
=
Address review comments:
- Move board_is_xxx within CONFIG_TI_I2C_BOARD_DETECT block to maintain the 
"mini" U-Boot concept for this SoC.

V1: 
https://patchwork.ozlabs.org/project/uboot/patch/20221027104846.11820-5-sinthu.r...@ti.com/

 board/ti/j721s2/evm.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index e09adc8ad3..de885085b3 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -26,8 +26,6 @@
 
 #include "../common/board_detect.h"
 
-#define board_is_j721s2_som()  board_ti_k3_is("J721S2X-PM1-SOM")
-
 DECLARE_GLOBAL_DATA_PTR;
 
 int board_init(void)
@@ -101,6 +99,14 @@ int ft_board_setup(void *blob, struct bd_info *bd)
 #endif
 
 #ifdef CONFIG_TI_I2C_BOARD_DETECT
+/* 
+ * Functions specific to EVM and SK designs of J721S2/AM68 family.
+ */
+
+#define board_is_j721s2_som()  board_ti_k3_is("J721S2X-PM1-SOM")
+
+#define board_is_am68_sk_som() board_ti_k3_is("AM68-SK-SOM")
+
 int do_board_detect(void)
 {
int ret;
@@ -136,6 +142,8 @@ static void setup_board_eeprom_env(void)
 
if (board_is_j721s2_som())
name = "j721s2";
+   else if (board_is_am68_sk_som())
+   name = "am68-sk";
else
printf("Unidentified board claims %s in eeprom header\n",
   board_ti_get_name());
-- 
2.36.1



[PATCH V2 03/12] configs: j721s2_evm: Enable configs to store env in MMC FAT partition

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

J721S2 EVM used to store env on eMMC, since EVM and SK uses same
defconfig and there is no eMMC on SK, we need to keep env in an
interface which available on both EVM and SK. So, save env in FAT
partition of MMC SD Card.

Enable defconfigs relevant for storing env on FAT partition of MMC.

Signed-off-by: Sinthu Raja 
---
 configs/j721s2_evm_a72_defconfig | 3 ++-
 configs/j721s2_evm_r5_defconfig  | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index 75b4e52238..1db5b47a24 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -92,7 +92,8 @@ CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_OF_LIST="k3-j721s2-common-proc-board k3-am68-sk-base-board"
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_ENV_OVERWRITE=y
-CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_IS_IN_FAT=y
+CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
 CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index 7418dc2900..f7805e83e0 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -88,6 +88,7 @@ CONFIG_SPL_MULTI_DTB_FIT=y
 CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board k3-am68-sk-r5-base-board"
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_OVERWRITE=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_REGMAP=y
-- 
2.36.1



[PATCH V2 01/12] configs: j721s2_evm_r5: Enable support for building multiple dtbs into FIT

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. This will help to use same
defconfig for both EVM and SK.

Signed-off-by: Sinthu Raja 
---
 configs/j721s2_evm_r5_defconfig | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index 2de5d87bdb..7418dc2900 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -84,6 +84,9 @@ CONFIG_CMD_TIME=y
 CONFIG_CMD_FAT=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
+CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board k3-am68-sk-r5-base-board"
+CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_SPL_DM=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
-- 
2.36.1



[PATCH V2 02/12] configs: j721s2_evm_a72: Enable support for building multiple dtbs into FIT

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Enable configs for building multiple dtbs into a single fit image
and load the right dtb for next stage. Add k3-am68-sk-base-board
dtb along with evm dtb inside DTB FIT image. This helps to use same
defconfig for both EVM and SK

Signed-off-by: Sinthu Raja 
---
 configs/j721s2_evm_a72_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index 2b2f80c4aa..75b4e52238 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -89,6 +89,7 @@ CONFIG_CMD_UBI=y
 CONFIG_OF_CONTROL=y
 CONFIG_SPL_OF_CONTROL=y
 CONFIG_SPL_MULTI_DTB_FIT=y
+CONFIG_OF_LIST="k3-j721s2-common-proc-board k3-am68-sk-base-board"
 CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
-- 
2.36.1



[PATCH V2 00/12] AM68: Add support for AM68 Starter Kit

2022-12-21 Thread Sinthu Raja
From: Sinthu Raja 

Hi All,
This series of patch add initial support for AM68 starter kit.
Design files can be referrred from https://www.ti.com/lit/zip/SPRR463

Refer below link to J721S2/AM68 Technical Reference Manual for further details:
http://www.ti.com/lit/pdf/spruj28

Link to kerenl patches:
https://lore.kernel.org/linux-arm-kernel/20221115154832.19759-4-sinthu.r...@ti.com/T/#mff5847ea8cdef49337d224b7147f877bcc833aee

Changes in V2:
=
Address review comments:
- Remove support for detecting multiple device trees using different DTB
- Remove board specific API from K3 generic file 
(arch/arm/mach-k3/j721s2_init.c) and moved to board specific file 
(board/ti/j721s2/evm.c).
  * arch: mach-k3: Update board specific API name to K3 generic API name
  * board: ti: j721s2: Add board_init and support for selecting DT based
on EEPROM
- Move board_is_xxx within CONFIG_TI_I2C_BOARD_DETECT block to maintain the 
"mini" U-Boot concept for this SoC.

V1: 
https://patchwork.ozlabs.org/project/uboot/cover/20221027104846.11820-1-sinthu.r...@ti.com/

Sinthu Raja (12):
  configs: j721s2_evm_r5: Enable support for building multiple dtbs into
FIT
  configs: j721s2_evm_a72: Enable support for building multiple dtbs
into FIT
  configs: j721s2_evm: Enable configs to store env in MMC FAT partition
  board: ti: j721s2: Add support to update board_name for am68-sk
  board: ti: j721s2: Enable support for reading EEPROM at next alternate
address
  oboard: ti: j721s2: Add support for detecting multiple device trees
  arch: mach-k3: Update board specific API name to K3 generic API name
  board: ti: j721s2: Add board_init and support for selecting DT based
on EEPROM
  arm: dts: Add initial support for AM68 Starter Kit System on Module
  arm: dts: Add support for A72 specific AM68 Starter Kit Base Board
  arm: dts: k3-am68-sk: Add r5 specific dt support
  include: configs: Update env for selecting right dtb

 arch/arm/dts/Makefile |   4 +-
 .../arm/dts/k3-am68-sk-base-board-u-boot.dtsi | 150 
 arch/arm/dts/k3-am68-sk-base-board.dts| 353 ++
 arch/arm/dts/k3-am68-sk-r5-base-board.dts | 194 ++
 arch/arm/dts/k3-am68-sk-som.dtsi  | 127 +++
 arch/arm/mach-k3/include/mach/sys_proto.h |   3 +
 arch/arm/mach-k3/j721s2_init.c|  13 +-
 board/ti/j721s2/evm.c | 120 +-
 configs/j721s2_evm_a72_defconfig  |   4 +-
 configs/j721s2_evm_r5_defconfig   |   4 +
 include/configs/j721s2_evm.h  |   4 +
 11 files changed, 958 insertions(+), 18 deletions(-)
 create mode 100644 arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
 create mode 100644 arch/arm/dts/k3-am68-sk-base-board.dts
 create mode 100644 arch/arm/dts/k3-am68-sk-r5-base-board.dts
 create mode 100644 arch/arm/dts/k3-am68-sk-som.dtsi

-- 
2.36.1



[PATCH 3/3] eficonfig: add vertical scroll support

2022-12-21 Thread Masahisa Kojima
The current eficonfig menu does not support vertical scroll,
so it can not display the menu entries greater than
the console row size.

This commit add the vertial scroll support.
The console size is retrieved by
SIMPLE_TEXT_OUTPUT_PROTOCOL.QueryMode() service, then
calculates the row size for menu entry by subtracting
menu header and description row size from the console row size.
"start" and "end" are added in the efimenu structure.
"start" keeps the menu entry index at the top, "end" keeps
the bottom menu entry index. item_data_print() menu function
only draws the menu entry between "start" and "end".

Signed-off-by: Masahisa Kojima 
---
 cmd/eficonfig.c  | 79 
 include/efi_config.h |  4 +++
 include/efi_loader.h |  1 +
 3 files changed, 70 insertions(+), 14 deletions(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index c2c6c01c3b..9b64fc4826 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -29,8 +29,13 @@ static char eficonfig_change_boot_order_desc[] =
"  Press SPACE to activate or deactivate the entry\n"
"  Select [Save] to complete, ESC/CTRL+C to quit";
 
+static struct efi_simple_text_output_protocol *cout;
+static int avail_row;
+
 #define EFICONFIG_DESCRIPTION_MAX 32
 #define EFICONFIG_OPTIONAL_DATA_MAX 64
+#define EFICONFIG_MENU_HEADER_ROW_NUM 3
+#define EFICONFIG_MENU_DESC_ROW_NUM 5
 
 /**
  * struct eficonfig_filepath_info - structure to be used to store file path
@@ -156,18 +161,16 @@ void eficonfig_print_entry(void *data)
struct eficonfig_entry *entry = data;
int reverse = (entry->efi_menu->active == entry->num);
 
-   /* TODO: support scroll or page for many entries */
+   if (entry->efi_menu->start > entry->num || entry->efi_menu->end < 
entry->num)
+   return;
 
-   /*
-* Move cursor to line where the entry will be drawn (entry->num)
-* First 3 lines(menu header) + 1 empty line
-*/
-   printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
+   printf(ANSI_CURSOR_POSITION, (entry->num - entry->efi_menu->start) +
+  EFICONFIG_MENU_HEADER_ROW_NUM + 1, 7);
 
if (reverse)
puts(ANSI_COLOR_REVERSE);
 
-   printf("%s", entry->title);
+   printf(ANSI_CLEAR_LINE "%s", entry->title);
 
if (reverse)
puts(ANSI_COLOR_RESET);
@@ -190,8 +193,8 @@ void eficonfig_display_statusline(struct menu *m)
   ANSI_CURSOR_POSITION ANSI_CLEAR_LINE ANSI_CURSOR_POSITION
   "%s"
   ANSI_CLEAR_LINE_TO_END,
-  1, 1, entry->efi_menu->menu_header, entry->efi_menu->count + 5, 
1,
-  entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc);
+  1, 1, entry->efi_menu->menu_header, avail_row + 4, 1,
+  avail_row + 5, 1, entry->efi_menu->menu_desc);
 }
 
 /**
@@ -213,13 +216,23 @@ char *eficonfig_choice_entry(void *data)
 
switch (key) {
case KEY_UP:
-   if (efi_menu->active > 0)
+   if (efi_menu->active > 0) {
--efi_menu->active;
+   if (efi_menu->start > efi_menu->active) {
+   efi_menu->start--;
+   efi_menu->end--;
+   }
+   }
/* no menu key selected, regenerate menu */
return NULL;
case KEY_DOWN:
-   if (efi_menu->active < efi_menu->count - 1)
+   if (efi_menu->active < efi_menu->count - 1) {
++efi_menu->active;
+   if (efi_menu->end < efi_menu->active) {
+   efi_menu->start++;
+   efi_menu->end++;
+   }
+   }
/* no menu key selected, regenerate menu */
return NULL;
case KEY_SELECT:
@@ -399,6 +412,8 @@ efi_status_t eficonfig_process_common(struct efimenu 
*efi_menu,
 
efi_menu->delay = -1;
efi_menu->active = 0;
+   efi_menu->start = 0;
+   efi_menu->end = avail_row - 1;
 
if (menu_header) {
efi_menu->menu_header = strdup(menu_header);
@@ -1865,7 +1880,11 @@ static void eficonfig_print_change_boot_order_entry(void 
*data)
struct eficonfig_entry *entry = data;
int reverse = (entry->efi_menu->active == entry->num);
 
-   printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
+   if (entry->efi_menu->start > entry->num || entry->efi_menu->end < 
entry->num)
+   return;
+
+   printf(ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
+  (entry->num - entry->efi_menu->start) + 
EFICONFIG_MENU_HEADER_ROW_NUM + 1, 7);
 
if (reverse)

[PATCH 2/3] eficonfig: refactor change boot order implementation

2022-12-21 Thread Masahisa Kojima
This commit removes the change boot order specific
menu implementation. The change boot order implementation
calls eficonfig_process_common() same as other menus.

The change boot order menu requires own item_data_print
and item_choice implementation, but display_statusline
function can be a same function as other menus.

Signed-off-by: Masahisa Kojima 
---
 cmd/eficonfig.c | 236 +---
 1 file changed, 143 insertions(+), 93 deletions(-)

diff --git a/cmd/eficonfig.c b/cmd/eficonfig.c
index 39ee766a7b..c2c6c01c3b 100644
--- a/cmd/eficonfig.c
+++ b/cmd/eficonfig.c
@@ -24,6 +24,11 @@ static struct efi_simple_text_input_protocol *cin;
 char eficonfig_menu_desc[] =
"  Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quit";
 
+static char eficonfig_change_boot_order_desc[] =
+   "  Press UP/DOWN to move, +/- to change orde\n"
+   "  Press SPACE to activate or deactivate the entry\n"
+   "  Select [Save] to complete, ESC/CTRL+C to quit";
+
 #define EFICONFIG_DESCRIPTION_MAX 32
 #define EFICONFIG_OPTIONAL_DATA_MAX 64
 
@@ -105,6 +110,17 @@ struct eficonfig_boot_order_data {
bool active;
 };
 
+/**
+ * struct eficonfig_save_boot_order_data - structure to be used to change boot 
order
+ *
+ * @efi_menu:  pointer to efimenu structure
+ * @selected:  flag to indicate user selects "Save" entry
+ */
+struct eficonfig_save_boot_order_data {
+   struct efimenu *efi_menu;
+   bool selected;
+};
+
 /**
  * eficonfig_print_msg() - print message
  *
@@ -173,10 +189,9 @@ void eficonfig_display_statusline(struct menu *m)
  "\n%s\n"
   ANSI_CURSOR_POSITION ANSI_CLEAR_LINE ANSI_CURSOR_POSITION
   "%s"
-  ANSI_CLEAR_LINE_TO_END ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
+  ANSI_CLEAR_LINE_TO_END,
   1, 1, entry->efi_menu->menu_header, entry->efi_menu->count + 5, 
1,
-  entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc,
-  entry->efi_menu->count + 7, 1);
+  entry->efi_menu->count + 6, 1, entry->efi_menu->menu_desc);
 }
 
 /**
@@ -1841,63 +1856,44 @@ out:
 }
 
 /**
- * eficonfig_display_change_boot_order() - display the BootOrder list
+ * eficonfig_print_change_boot_order_entry() - print the boot option entry
  *
- * @efi_menu:  pointer to the efimenu structure
- * Return: status code
+ * @data:  pointer to the data associated with each menu entry
  */
-static void eficonfig_display_change_boot_order(struct efimenu *efi_menu)
+static void eficonfig_print_change_boot_order_entry(void *data)
 {
-   bool reverse;
-   struct list_head *pos, *n;
-   struct eficonfig_entry *entry;
-
-   printf(ANSI_CLEAR_CONSOLE ANSI_CURSOR_POSITION
-  "\n  ** Change Boot Order **\n"
-  ANSI_CURSOR_POSITION
-  "  Press UP/DOWN to move, +/- to change order"
-  ANSI_CURSOR_POSITION
-  "  Press SPACE to activate or deactivate the entry"
-  ANSI_CURSOR_POSITION
-  "  Select [Save] to complete, ESC/CTRL+C to quit"
-  ANSI_CURSOR_POSITION ANSI_CLEAR_LINE,
-  1, 1, efi_menu->count + 5, 1, efi_menu->count + 6, 1,
-  efi_menu->count + 7, 1,  efi_menu->count + 8, 1);
-
-   /* draw boot option list */
-   list_for_each_safe(pos, n, _menu->list) {
-   entry = list_entry(pos, struct eficonfig_entry, list);
-   reverse = (entry->num == efi_menu->active);
+   struct eficonfig_entry *entry = data;
+   int reverse = (entry->efi_menu->active == entry->num);
 
-   printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
+   printf(ANSI_CURSOR_POSITION, entry->num + 4, 7);
 
-   if (reverse)
-   puts(ANSI_COLOR_REVERSE);
+   if (reverse)
+   puts(ANSI_COLOR_REVERSE);
 
-   if (entry->num < efi_menu->count - 2) {
-   if (((struct eficonfig_boot_order_data 
*)entry->data)->active)
-   printf("[*]  ");
-   else
-   printf("[ ]  ");
-   }
+   if (entry->num < entry->efi_menu->count - 2) {
+   if (((struct eficonfig_boot_order_data *)entry->data)->active)
+   printf("[*]  ");
+   else
+   printf("[ ]  ");
+   }
 
-   printf("%s", entry->title);
+   printf("%s", entry->title);
 
-   if (reverse)
-   puts(ANSI_COLOR_RESET);
-   }
+   if (reverse)
+   puts(ANSI_COLOR_RESET);
 }
 
 /**
- * eficonfig_choice_change_boot_order() - handle the BootOrder update
+ * eficonfig_choice_change_boot_order() - user key input handler
  *
- * @efi_menu:  pointer to the efimenu structure
- * Return: status code
+ * @data:  pointer to the menu entry
+ * Return: key string to identify the 

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