Re: [PATCH v3 5/7] rng: stm32: add error concealment sequence
On 9/19/23 17:27, Gatien Chevallier wrote:
> Seed errors can occur when using the hardware RNG. Implement the
> sequences to handle them. This avoids irrecoverable RNG state.
>
> Try to conceal seed errors when possible. If, despite the error
> concealing tries, a seed error is still present, then return an error.
>
> A clock error does not compromise the hardware block and data can
> still be read from RNG_DR. Just warn that the RNG clock is too slow
> and clear RNG_SR.
>
> Signed-off-by: Gatien Chevallier
> Reviewed-by: Patrick Delaunay
> ---
> Changes in V2:
> - Added Patrick's tag
>
> drivers/rng/stm32_rng.c | 163 ++--
> 1 file changed, 140 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c
> index f943acd7d2..b1a790b217 100644
> --- a/drivers/rng/stm32_rng.c
> +++ b/drivers/rng/stm32_rng.c
> @@ -32,6 +32,8 @@
>
> #define RNG_DR 0x08
>
> +#define RNG_NB_RECOVER_TRIES 3
> +
> /*
> * struct stm32_rng_data - RNG compat data
> *
> @@ -52,45 +54,160 @@ struct stm32_rng_plat {
> bool ced;
> };
>
> +/*
> + * Extracts from the STM32 RNG specification when RNG supports CONDRST.
> + *
> + * When a noise source (or seed) error occurs, the RNG stops generating
> + * random numbers and sets to “1” both SEIS and SECS bits to indicate
> + * that a seed error occurred. (...)
> + *
> + * 1. Software reset by writing CONDRST at 1 and at 0 (see bitfield
> + * description for details). This step is needed only if SECS is set.
> + * Indeed, when SEIS is set and SECS is cleared it means RNG performed
> + * the reset automatically (auto-reset).
> + * 2. If SECS was set in step 1 (no auto-reset) wait for CONDRST
> + * to be cleared in the RNG_CR register, then confirm that SEIS is
> + * cleared in the RNG_SR register. Otherwise just clear SEIS bit in
> + * the RNG_SR register.
> + * 3. If SECS was set in step 1 (no auto-reset) wait for SECS to be
> + * cleared by RNG. The random number generation is now back to normal.
> + */
> +static int stm32_rng_conceal_seed_error_cond_reset(struct stm32_rng_plat
> *pdata)
> +{
> + u32 sr = readl_relaxed(pdata->base + RNG_SR);
> + u32 cr = readl_relaxed(pdata->base + RNG_CR);
> + int err;
> +
> + if (sr & RNG_SR_SECS) {
> + /* Conceal by resetting the subsystem (step 1.) */
> + writel_relaxed(cr | RNG_CR_CONDRST, pdata->base + RNG_CR);
> + writel_relaxed(cr & ~RNG_CR_CONDRST, pdata->base + RNG_CR);
> + } else {
> + /* RNG auto-reset (step 2.) */
> + writel_relaxed(sr & ~RNG_SR_SEIS, pdata->base + RNG_SR);
> + return 0;
> + }
> +
> + err = readl_relaxed_poll_timeout(pdata->base + RNG_SR, sr, !(sr &
> RNG_CR_CONDRST), 10);
> + if (err) {
> + log_err("%s: timeout %x\n", __func__, sr);
> + return err;
> + }
> +
> + /* Check SEIS is cleared (step 2.) */
> + if (readl_relaxed(pdata->base + RNG_SR) & RNG_SR_SEIS)
> + return -EINVAL;
> +
> + err = readl_relaxed_poll_timeout(pdata->base + RNG_SR, sr, !(sr &
> RNG_SR_SECS), 10);
> + if (err) {
> + log_err("%s: timeout %x\n", __func__, sr);
> + return err;
> + }
> +
> + return 0;
> +}
> +
> +/*
> + * Extracts from the STM32 RNG specification, when CONDRST is not supported
> + *
> + * When a noise source (or seed) error occurs, the RNG stops generating
> + * random numbers and sets to “1” both SEIS and SECS bits to indicate
> + * that a seed error occurred. (...)
> + *
> + * The following sequence shall be used to fully recover from a seed
> + * error after the RNG initialization:
> + * 1. Clear the SEIS bit by writing it to “0”.
> + * 2. Read out 12 words from the RNG_DR register, and discard each of
> + * them in order to clean the pipeline.
> + * 3. Confirm that SEIS is still cleared. Random number generation is
> + * back to normal.
> + */
> +static int stm32_rng_conceal_seed_error_sw_reset(struct stm32_rng_plat
> *pdata)
> +{
> + uint i = 0;
> + u32 sr = readl_relaxed(pdata->base + RNG_SR);
> +
> + writel_relaxed(sr & ~RNG_SR_SEIS, pdata->base + RNG_SR);
> +
> + for (i = 12; i != 0; i--)
> + (void)readl_relaxed(pdata->base + RNG_DR);
> +
> + if (readl_relaxed(pdata->base + RNG_SR) & RNG_SR_SEIS)
> + return -EINVAL;
> +
> + return 0;
> +}
> +
> +static int stm32_rng_conceal_seed_error(struct stm32_rng_plat *pdata)
> +{
> + log_debug("Concealing RNG seed error\n");
> +
> + if (pdata->data->has_cond_reset)
> + return stm32_rng_conceal_seed_error_cond_reset(pdata);
> + else
> + return stm32_rng_conceal_seed_error_sw_reset(pdata);
> +};
> +
> static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
> {
> - int retval, i;
> - u32 sr, count, reg;
> + int retval;
> + u32 sr, reg;
> size_t increment;
>
Re: [PATCH v3 4/7] rng: stm32: add RNG clock frequency restraint
On 9/19/23 17:27, Gatien Chevallier wrote:
> In order to ensure a good RNG quality and compatibility with
> certified RNG configuration, add RNG clock frequency restraint.
>
> Signed-off-by: Gatien Chevallier
> Reviewed-by: Patrick Delaunay
> ---
> Changes in V2:
> - Added Patrick's tag
>
> drivers/rng/stm32_rng.c | 43 -
> 1 file changed, 38 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c
> index ada5d92214..f943acd7d2 100644
> --- a/drivers/rng/stm32_rng.c
> +++ b/drivers/rng/stm32_rng.c
> @@ -18,10 +18,11 @@
> #include
> #include
>
> -#define RNG_CR 0x00
> -#define RNG_CR_RNGEN BIT(2)
> -#define RNG_CR_CED BIT(5)
> -#define RNG_CR_CONDRST BIT(30)
> +#define RNG_CR 0x00
> +#define RNG_CR_RNGEN BIT(2)
> +#define RNG_CR_CED BIT(5)
> +#define RNG_CR_CLKDIV_SHIFT 16
> +#define RNG_CR_CONDRST BIT(30)
>
> #define RNG_SR 0x04
> #define RNG_SR_SEIS BIT(6)
> @@ -31,7 +32,15 @@
>
> #define RNG_DR 0x08
>
> +/*
> + * struct stm32_rng_data - RNG compat data
> + *
> + * @max_clock_rate: Max RNG clock frequency, in Hertz
> + * @has_cond_reset: True if conditionnal reset is supported
> + *
> + */
> struct stm32_rng_data {
> + uint max_clock_rate;
> bool has_cond_reset;
> };
>
> @@ -87,6 +96,26 @@ static int stm32_rng_read(struct udevice *dev, void *data,
> size_t len)
> return 0;
> }
>
> +static uint stm32_rng_clock_freq_restrain(struct stm32_rng_plat *pdata)
> +{
> + ulong clock_rate = 0;
> + uint clock_div = 0;
> +
> + clock_rate = clk_get_rate(&pdata->clk);
> +
> + /*
> + * Get the exponent to apply on the CLKDIV field in RNG_CR register.
> + * No need to handle the case when clock-div > 0xF as it is physically
> + * impossible.
> + */
> + while ((clock_rate >> clock_div) > pdata->data->max_clock_rate)
> + clock_div++;
> +
> + log_debug("RNG clk rate : %lu\n", clk_get_rate(&pdata->clk) >>
> clock_div);
> +
> + return clock_div;
> +}
> +
> static int stm32_rng_init(struct stm32_rng_plat *pdata)
> {
> int err;
> @@ -99,7 +128,9 @@ static int stm32_rng_init(struct stm32_rng_plat *pdata)
> cr = readl(pdata->base + RNG_CR);
>
> if (pdata->data->has_cond_reset) {
> - cr |= RNG_CR_CONDRST;
> + uint clock_div = stm32_rng_clock_freq_restrain(pdata);
> +
> + cr |= RNG_CR_CONDRST | (clock_div << RNG_CR_CLKDIV_SHIFT);
> if (pdata->ced)
> cr &= ~RNG_CR_CED;
> else
> @@ -186,10 +217,12 @@ static const struct dm_rng_ops stm32_rng_ops = {
>
> static const struct stm32_rng_data stm32mp13_rng_data = {
> .has_cond_reset = true,
> + .max_clock_rate = 4800,
> };
>
> static const struct stm32_rng_data stm32_rng_data = {
> .has_cond_reset = false,
> + .max_clock_rate = 300,
> };
>
> static const struct udevice_id stm32_rng_match[] = {
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH v3 3/7] rng: stm32: Implement configurable RNG clock error detection
On 9/19/23 17:27, Gatien Chevallier wrote:
> RNG clock error detection is now enabled if the "clock-error-detect"
> property is set in the device tree.
>
> Signed-off-by: Gatien Chevallier
> Reviewed-by: Patrick Delaunay
> ---
> Changes in V2:
> - Added Patrick's tag
>
> drivers/rng/stm32_rng.c | 22 +-
> 1 file changed, 17 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/rng/stm32_rng.c b/drivers/rng/stm32_rng.c
> index 89da78c6c8..ada5d92214 100644
> --- a/drivers/rng/stm32_rng.c
> +++ b/drivers/rng/stm32_rng.c
> @@ -40,6 +40,7 @@ struct stm32_rng_plat {
> struct clk clk;
> struct reset_ctl rst;
> const struct stm32_rng_data *data;
> + bool ced;
> };
>
> static int stm32_rng_read(struct udevice *dev, void *data, size_t len)
> @@ -97,25 +98,34 @@ static int stm32_rng_init(struct stm32_rng_plat *pdata)
>
> cr = readl(pdata->base + RNG_CR);
>
> - /* Disable CED */
> - cr |= RNG_CR_CED;
> if (pdata->data->has_cond_reset) {
> cr |= RNG_CR_CONDRST;
> + if (pdata->ced)
> + cr &= ~RNG_CR_CED;
> + else
> + cr |= RNG_CR_CED;
> writel(cr, pdata->base + RNG_CR);
> cr &= ~RNG_CR_CONDRST;
> + cr |= RNG_CR_RNGEN;
> writel(cr, pdata->base + RNG_CR);
> err = readl_poll_timeout(pdata->base + RNG_CR, cr,
>(!(cr & RNG_CR_CONDRST)), 1);
> if (err)
> return err;
> + } else {
> + if (pdata->ced)
> + cr &= ~RNG_CR_CED;
> + else
> + cr |= RNG_CR_CED;
> +
> + cr |= RNG_CR_RNGEN;
> +
> + writel(cr, pdata->base + RNG_CR);
> }
>
> /* clear error indicators */
> writel(0, pdata->base + RNG_SR);
>
> - cr |= RNG_CR_RNGEN;
> - writel(cr, pdata->base + RNG_CR);
> -
> err = readl_poll_timeout(pdata->base + RNG_SR, sr,
>sr & RNG_SR_DRDY, 1);
> return err;
> @@ -165,6 +175,8 @@ static int stm32_rng_of_to_plat(struct udevice *dev)
> if (err)
> return err;
>
> + pdata->ced = dev_read_bool(dev, "clock-error-detect");
> +
> return 0;
> }
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH v3 2/7] configs: default activate CONFIG_RNG_STM32 for STM32MP13x platforms
On 9/19/23 17:27, Gatien Chevallier wrote: > Default embed this configuration. If OP-TEE PTA RNG is exposed, it means > that the RNG is managed by the secure world. Therefore, the RNG node > should be disabled in the device tree as an access would be denied > by the hardware firewall. > > Signed-off-by: Gatien Chevallier > Reviewed-by: Patrick Delaunay > --- > Changes in V2: > - Added Patrick's tag > > configs/stm32mp13_defconfig | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig > index 82b62744f6..4a899c85de 100644 > --- a/configs/stm32mp13_defconfig > +++ b/configs/stm32mp13_defconfig > @@ -65,6 +65,7 @@ CONFIG_DM_REGULATOR_GPIO=y > CONFIG_DM_REGULATOR_SCMI=y > CONFIG_RESET_SCMI=y > CONFIG_DM_RNG=y > +CONFIG_RNG_STM32=y > CONFIG_DM_RTC=y > CONFIG_RTC_STM32=y > CONFIG_SERIAL_RX_BUFFER=y Reviewed-by: Patrice Chotard Thanks Patrice
Re: [PATCH v3 1/7] rng: stm32: rename STM32 RNG driver
On 9/19/23 17:27, Gatien Chevallier wrote:
> Rename the RNG driver as it is usable by other STM32 platforms
> than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
> CONFIG_RNG_STM32
>
> Signed-off-by: Gatien Chevallier
> Reviewed-by: Grzegorz Szymaszek
> Reviewed-by: Patrick Delaunay
> ---
>
> Changes in V2:
> - Added ARCH_STM32 in the "depends on" section of the
> RNG_STM32 configuration field.
> - Added Grzegorz's tag and discarded Patrick's and
> Heinrich's as there's a modification
>
> Changes in V2:
> - Added Patrick's tag. Discarded Heinrich's as patch's
> content has changed.
>
> MAINTAINERS | 2 +-
> configs/stm32mp15_basic_defconfig | 2 +-
> configs/stm32mp15_defconfig | 2 +-
> configs/stm32mp15_trusted_defconfig | 2 +-
> drivers/rng/Kconfig | 8
> drivers/rng/Makefile| 2 +-
> drivers/rng/{stm32mp1_rng.c => stm32_rng.c} | 0
> 7 files changed, 9 insertions(+), 9 deletions(-)
> rename drivers/rng/{stm32mp1_rng.c => stm32_rng.c} (100%)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 0a10a436bc..a3bffa63d5 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -621,7 +621,7 @@ F:drivers/ram/stm32mp1/
> F: drivers/remoteproc/stm32_copro.c
> F: drivers/reset/stm32-reset.c
> F: drivers/rng/optee_rng.c
> -F: drivers/rng/stm32mp1_rng.c
> +F: drivers/rng/stm32_rng.c
> F: drivers/rtc/stm32_rtc.c
> F: drivers/serial/serial_stm32.*
> F: drivers/spi/stm32_qspi.c
> diff --git a/configs/stm32mp15_basic_defconfig
> b/configs/stm32mp15_basic_defconfig
> index 9ea5aaa714..29b869cf34 100644
> --- a/configs/stm32mp15_basic_defconfig
> +++ b/configs/stm32mp15_basic_defconfig
> @@ -150,7 +150,7 @@ CONFIG_DM_REGULATOR_STM32_VREFBUF=y
> CONFIG_DM_REGULATOR_STPMIC1=y
> CONFIG_REMOTEPROC_STM32_COPRO=y
> CONFIG_DM_RNG=y
> -CONFIG_RNG_STM32MP1=y
> +CONFIG_RNG_STM32=y
> CONFIG_DM_RTC=y
> CONFIG_RTC_STM32=y
> CONFIG_SERIAL_RX_BUFFER=y
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index 4d0a81f8a8..b061a83f9d 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -123,7 +123,7 @@ CONFIG_DM_REGULATOR_SCMI=y
> CONFIG_REMOTEPROC_STM32_COPRO=y
> CONFIG_RESET_SCMI=y
> CONFIG_DM_RNG=y
> -CONFIG_RNG_STM32MP1=y
> +CONFIG_RNG_STM32=y
> CONFIG_DM_RTC=y
> CONFIG_RTC_STM32=y
> CONFIG_SERIAL_RX_BUFFER=y
> diff --git a/configs/stm32mp15_trusted_defconfig
> b/configs/stm32mp15_trusted_defconfig
> index 0a7d862485..b51eefe652 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -123,7 +123,7 @@ CONFIG_DM_REGULATOR_STPMIC1=y
> CONFIG_REMOTEPROC_STM32_COPRO=y
> CONFIG_RESET_SCMI=y
> CONFIG_DM_RNG=y
> -CONFIG_RNG_STM32MP1=y
> +CONFIG_RNG_STM32=y
> CONFIG_DM_RTC=y
> CONFIG_RTC_STM32=y
> CONFIG_SERIAL_RX_BUFFER=y
> diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> index 5deb5db5b7..24666bff98 100644
> --- a/drivers/rng/Kconfig
> +++ b/drivers/rng/Kconfig
> @@ -48,11 +48,11 @@ config RNG_OPTEE
> accessible to normal world but reserved and used by the OP-TEE
> to avoid the weakness of a software PRNG.
>
> -config RNG_STM32MP1
> - bool "Enable random number generator for STM32MP1"
> - depends on ARCH_STM32MP
> +config RNG_STM32
> + bool "Enable random number generator for STM32"
> + depends on ARCH_STM32 || ARCH_STM32MP
> help
> - Enable STM32MP1 rng driver.
> + Enable STM32 rng driver.
>
> config RNG_ROCKCHIP
> bool "Enable random number generator for rockchip crypto rng"
> diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
> index 78f61051ac..192f911e15 100644
> --- a/drivers/rng/Makefile
> +++ b/drivers/rng/Makefile
> @@ -9,7 +9,7 @@ obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o
> obj-$(CONFIG_RNG_MSM) += msm_rng.o
> obj-$(CONFIG_RNG_NPCM) += npcm_rng.o
> obj-$(CONFIG_RNG_OPTEE) += optee_rng.o
> -obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o
> +obj-$(CONFIG_RNG_STM32) += stm32_rng.o
> obj-$(CONFIG_RNG_ROCKCHIP) += rockchip_rng.o
> obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
> obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o
> diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32_rng.c
> similarity index 100%
> rename from drivers/rng/stm32mp1_rng.c
> rename to drivers/rng/stm32_rng.c
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [RFC PATCH 4/5] ARM: dts: stm32: support display on stm32f469-disco board
On 9/3/23 22:57, Dario Binacchi wrote:
> Add support to Orise Tech OTM8009A display on stm32f469-disco board.
>
> It was necessary to retrieve the framebuffer address from the device tree
> because the address returned by the video-uclass driver pointed to a memory
> area that was not usable.
>
> Furthermore, unlike Linux, the DSI driver requires the LTDC clock to be
> properly probed. Hence, the changes made to the DSI node in
> stm32f469-disco-u-boot.dtsi.
>
> Signed-off-by: Dario Binacchi
> ---
>
> arch/arm/dts/stm32f469-disco-u-boot.dtsi | 4 +++
> configs/stm32f469-discovery_defconfig| 13 +
> drivers/video/stm32/stm32_ltdc.c | 37 +++-
> 3 files changed, 53 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> index 8e781c5a7b23..47ba9fa4a783 100644
> --- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> +++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
> @@ -92,7 +92,9 @@
>
> &dsi {
> clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>,
> + <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>,
><&clk_hse>;
> + clock-names = "pclk", "px_clk", "ref";
> };
>
> &gpioa {
> @@ -140,6 +142,8 @@
> };
>
> + bootph-all;
> +
> clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>;
> };
>
> diff --git a/configs/stm32f469-discovery_defconfig
> b/configs/stm32f469-discovery_defconfig
> index 35d18d58be6f..9796b8f2d9a5 100644
> --- a/configs/stm32f469-discovery_defconfig
> +++ b/configs/stm32f469-discovery_defconfig
> @@ -21,6 +21,7 @@ CONFIG_CMD_GPT=y
> # CONFIG_RANDOM_UUID is not set
> CONFIG_CMD_MMC=y
> # CONFIG_CMD_SETEXPR is not set
> +CONFIG_CMD_BMP=y
> CONFIG_CMD_CACHE=y
> CONFIG_CMD_TIMER=y
> # CONFIG_ISO_PARTITION is not set
> @@ -40,3 +41,15 @@ CONFIG_SPI_FLASH_STMICRO=y
> CONFIG_SPI=y
> CONFIG_DM_SPI=y
> CONFIG_STM32_QSPI=y
> +CONFIG_VIDEO=y
> +CONFIG_BACKLIGHT_GPIO=y
> +CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
> +CONFIG_VIDEO_STM32=y
> +CONFIG_VIDEO_STM32_DSI=y
> +CONFIG_VIDEO_STM32_MAX_XRES=480
> +CONFIG_VIDEO_STM32_MAX_YRES=800
> +CONFIG_BMP_16BPP=y
> +CONFIG_BMP_24BPP=y
> +CONFIG_BMP_32BPP=y
> +CONFIG_DM_REGULATOR=y
> +CONFIG_DM_REGULATOR_FIXED=y
> diff --git a/drivers/video/stm32/stm32_ltdc.c
> b/drivers/video/stm32/stm32_ltdc.c
> index f48badc517a8..428b0addc43c 100644
> --- a/drivers/video/stm32/stm32_ltdc.c
> +++ b/drivers/video/stm32/stm32_ltdc.c
> @@ -494,6 +494,34 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv
> *priv, ulong fb_addr)
> setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
> }
>
> +#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
We want to avoid this kind of #define specific to a particular target
> +static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint
> size,
> + uint align)
> +{
> + phys_addr_t cpu;
> + dma_addr_t bus;
> + u64 dma_size;
> + int ret;
> +
> + ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size);
> + if (ret) {
> + dev_err(dev, "failed to get dma address\n");
> + return ret;
> + }
> +
> + *base = bus + 0x100 - ALIGN(size, align);
Why adding 0x100 ? avoid to insert const whithout any description and use a
#define instead.
> + return 0;
> +}
> +#else
> +static int stm32_ltdc_get_fb_addr(struct udevice *dev, ulong *base, uint
> size,
> + uint align)
> +{
> + /* Delegate framebuffer allocation to video-uclass */
> + *base = 0;
> + return 0;
> +}
> +#endif
> +
> static int stm32_ltdc_probe(struct udevice *dev)
> {
> struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
> @@ -504,7 +532,7 @@ static int stm32_ltdc_probe(struct udevice *dev)
> struct display_timing timings;
> struct clk pclk;
> struct reset_ctl rst;
> - ulong rate;
> + ulong rate, fb_base;
> int ret;
>
> priv->regs = dev_read_addr_ptr(dev);
> @@ -604,6 +632,13 @@ static int stm32_ltdc_probe(struct udevice *dev)
> priv->crop_h = timings.vactive.typ;
> priv->alpha = 0xFF;
>
> + ret = stm32_ltdc_get_fb_addr(dev, &fb_base, uc_plat->size,
> + uc_plat->align);
> + if (ret)
> + return ret;
> +
> + uc_plat->base = fb_base;
> +
It breaks display on stm32f746-disco and also on stm32f769-disco.
Thanks
Patrice
> dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
> timings.hactive.typ, timings.vactive.typ,
> VNBITS(priv->l2bpp), uc_plat->base);
Re: [PATCH] configs: stm32f769-disco: Enable VIDEO_LOGO flag
On 8/29/23 17:24, Patrick DELAUNAY wrote:
> Hi,
>
> On 8/25/23 18:24, Patrice Chotard wrote:
>> The patch removes the legacy mode of displaying the ST logo and adopts
>> the approach introduced by the commit 284b08fb51b6 ("board: stm32mp1: add
>> splash screen with stmicroelectronics logo").
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> configs/stm32f769-disco_defconfig | 2 +-
>> configs/stm32f769-disco_spl_defconfig | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/configs/stm32f769-disco_defconfig
>> b/configs/stm32f769-disco_defconfig
>> index 72ef133fe4a..20dbb1af630 100644
>> --- a/configs/stm32f769-disco_defconfig
>> +++ b/configs/stm32f769-disco_defconfig
>> @@ -56,6 +56,7 @@ CONFIG_SPI=y
>> CONFIG_DM_SPI=y
>> CONFIG_STM32_QSPI=y
>> CONFIG_VIDEO=y
>> +CONFIG_VIDEO_LOGO=y
>> CONFIG_BACKLIGHT_GPIO=y
>> CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
>> CONFIG_VIDEO_STM32=y
>> @@ -64,7 +65,6 @@ CONFIG_VIDEO_STM32_MAX_XRES=480
>> CONFIG_VIDEO_STM32_MAX_YRES=800
>> CONFIG_SPLASH_SCREEN=y
>> CONFIG_SPLASH_SCREEN_ALIGN=y
>> -CONFIG_VIDEO_BMP_RLE8=y
>> CONFIG_BMP_16BPP=y
>> CONFIG_BMP_24BPP=y
>> CONFIG_BMP_32BPP=y
>> diff --git a/configs/stm32f769-disco_spl_defconfig
>> b/configs/stm32f769-disco_spl_defconfig
>> index dd17cad7362..a5298e7cdc1 100644
>> --- a/configs/stm32f769-disco_spl_defconfig
>> +++ b/configs/stm32f769-disco_spl_defconfig
>> @@ -82,6 +82,7 @@ CONFIG_DM_SPI=y
>> CONFIG_STM32_QSPI=y
>> CONFIG_SPL_TIMER=y
>> CONFIG_VIDEO=y
>> +CONFIG_VIDEO_LOGO=y
>> CONFIG_BACKLIGHT_GPIO=y
>> CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
>> CONFIG_VIDEO_STM32=y
>> @@ -90,7 +91,6 @@ CONFIG_VIDEO_STM32_MAX_XRES=480
>> CONFIG_VIDEO_STM32_MAX_YRES=800
>> CONFIG_SPLASH_SCREEN=y
>> CONFIG_SPLASH_SCREEN_ALIGN=y
>> -CONFIG_VIDEO_BMP_RLE8=y
>> CONFIG_BMP_16BPP=y
>> CONFIG_BMP_24BPP=y
>> CONFIG_BMP_32BPP=y
>
>
>
>
> Reviewed-by: Patrick Delaunay
>
> Thanks
> Patrick
>
>
Apply on stm32/next
Patrice
Re: [PATCH v3 6/6] arm: dts: k3-j721e: Sync with v6.6-rc1
Hi Manorit On 27/09/23 09:45, Manorit Chawdhry wrote: Hi Neha, On 19:03-20230926, Neha Malcom Francis wrote: Hi Nishanth [..] diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts b/arch/arm/dts/k3-j721e-r5-sk.dts index 1cc64d07f7..0274465fa4 100644 --- a/arch/arm/dts/k3-j721e-r5-sk.dts +++ b/arch/arm/dts/k3-j721e-r5-sk.dts Unrelated to this patch: I noticed also that the DDR configuration for J721e-sk is stale (0.6 rev of DDR tool Vs 0.10 for EVM) For SK's R5 dts and u-boot.dtsi: The above pattern of comments from EVM repeat on SK as well, I will skip repeating the comments. [...] Thanks for reviewing, all are valid points. Regarding why clock-frequency is mentioned for a bunch of peripherals, I will be looking into it and accordingly posting v4. Not sure but could be that the clk-data.c is not populated with those specified clocks with frequencies due to which we have to provide them here. I could see that autogen does allow us to set some fixed clock frequency so maybe that might be it. Regards, Manorit If it's not already accounted in clk-data.c I can change it using autogen as suggested, thanks! Thanking You Neha Malcom Francis -- Thanking You Neha Malcom Francis
Re: [RFC PATCH v2 0/8] ATF and OP-TEE Firewalling for K3 devices.
Hi Andrew, On 09:25-20230926, Andrew Davis wrote: > On 9/26/23 2:58 AM, Manorit Chawdhry wrote: > > K3 devices have firewalls that are used to prevent illegal accesses to > > memory regions that are deemed secure. The series prevents the illegal > > accesses to ATF and OP-TEE regions that are present in different K3 > > devices. > > > > AM62AX and AM64X are currently in hold due to some firewall > > configurations that our System Controller (TIFS) needs to handle. > > > > Signed-off-by: Manorit Chawdhry > > --- > > You have mixed tabs and spaces in the .dtsi patches. Thanks for this, would be sending a v3 with the fixes. Regards, Manorit > > Andrew > > > Changes in v2: > > > > Andrew: > > - Make the firewall DTS more readable with CONSTANTS > > > > Neha: > > - Move GetHexOctet to dtoc for common usage > > - Update the documentation in ti-secure > > - s/indentifier/identifier/ > > - Add firewall binman test > > > > - Remove slave firewall multiple background regions > >( Single firewall region works fine ) > > - Add a check in the subnodes to check for the node.name 'firewall' > > - Change firewall indexing with id and region number so that it is easy > >to purge out firewalls and we don't need to redo the numbering. > > - Add information for all the firewalls. > > - Link to v1: > > https://lore.kernel.org/u-boot/20230905-binman-firewalling-v1-0-3894520bf...@ti.com/ > > > > --- > > Manorit Chawdhry (8): > >dtoc: openssl: Add GetHexOctet method > >binman: ti-secure: Add support for firewalling entities > >binman: ftest: Add test for ti-secure firewall node > >binman: k3: add k3-security.h and include it in k3-binman.dtsi > >binman: j721e: Add firewall configurations for atf > >binman: am62x: Add firewalling configurations > >binman: j721s2: Add firewall configurations > >binman: j7200: Add firewall configurations > > > > arch/arm/dts/k3-am625-sk-binman.dtsi | 49 +++ > > arch/arm/dts/k3-binman.dtsi | 2 + > > arch/arm/dts/k3-j7200-binman.dtsi| 137 ++ > > arch/arm/dts/k3-j721e-binman.dtsi| 183 > > > > arch/arm/dts/k3-j721s2-binman.dtsi | 206 > > +++ > > arch/arm/dts/k3-security.h | 58 > > tools/binman/btool/openssl.py| 16 ++- > > tools/binman/etype/ti_secure.py | 85 +++ > > tools/binman/etype/x509_cert.py | 3 +- > > tools/binman/ftest.py| 12 ++ > > tools/binman/test/311_ti_secure_firewall.dts | 28 > > tools/dtoc/fdt_util.py | 20 +++ > > 12 files changed, 796 insertions(+), 3 deletions(-) > > --- > > base-commit: 2fe4b54556ea6271237b35de68dc458bfceab94c > > change-id: 20230724-binman-firewalling-65ecdb23ec0a > > > > Best regards,
Re: [PATCH v3 6/6] arm: dts: k3-j721e: Sync with v6.6-rc1
Hi Neha, On 19:03-20230926, Neha Malcom Francis wrote: > Hi Nishanth > [..] > > > diff --git a/arch/arm/dts/k3-j721e-r5-sk.dts > > > b/arch/arm/dts/k3-j721e-r5-sk.dts > > > index 1cc64d07f7..0274465fa4 100644 > > > --- a/arch/arm/dts/k3-j721e-r5-sk.dts > > > +++ b/arch/arm/dts/k3-j721e-r5-sk.dts > > > > Unrelated to this patch: I noticed also that the DDR configuration for > > J721e-sk is stale (0.6 rev of DDR tool Vs 0.10 for EVM) > > > > > > For SK's R5 dts and u-boot.dtsi: > > The above pattern of comments from EVM repeat on SK as well, I will skip > > repeating the comments. > > > > [...] > > > > Thanks for reviewing, all are valid points. Regarding why clock-frequency is > mentioned for a bunch of peripherals, I will be looking into it and > accordingly posting v4. Not sure but could be that the clk-data.c is not populated with those specified clocks with frequencies due to which we have to provide them here. I could see that autogen does allow us to set some fixed clock frequency so maybe that might be it. Regards, Manorit > > Thanking You > Neha Malcom Francis
Re: [PATCH 2/3] net: bootp: BOOTP/DHCPv4 retransmission improvements
Hi,
On Mon, 25 Sep 2023 13:29:34 -0700 seanedm...@linux.microsoft.com wrote:
> From: Sean Edmond
>
> This patch introduces 3 improvements to align with RFC 951:
> - retransmission backoff interval maximum is configurable
> - initial retranmission backoff interval is configurable
> - transaction ID is kept the same for each BOOTP/DHCPv4 request
>
> In applications where thousands of nodes are serviced by a single DHCP
> server, maximizing the retransmission backoff interval at 2 seconds (the
> current u-boot default) exerts high pressure on the DHCP server and
> network layer.
>
> RFC 951 “7.2. Client Retransmission Strategy” states that the
> retransmission backoff interval should maximize at 60 seconds. This
> patch allows the interval to be configurable using the environment
> variable "bootpretransmitperiodmax"
>
> The initial retranmission backoff period defaults to 250ms, which is
> also too small for these scenarios with many clients. This patch makes
> the initial retransmission interval to be configurable using the
> environment variable "bootpretransmitperiodinit".
>
> Also, on a retransmission it is not expected for the transaction ID to
> change (only the 'secs' field should be updated). Let's save the
> transaction ID and use the same transaction ID for each BOOTP/DHCPv4
> exchange.
>
> Signed-off-by: Sean Edmond
> ---
> net/bootp.c | 63 +++--
> 1 file changed, 47 insertions(+), 16 deletions(-)
>
> diff --git a/net/bootp.c b/net/bootp.c
> index 013d54c7ed..7248536cc4 100644
> --- a/net/bootp.c
> +++ b/net/bootp.c
> @@ -42,6 +42,17 @@
> */
> #define TIMEOUT_MS ((3 + (CONFIG_NET_RETRY_COUNT * 5)) * 1000)
>
> +/*
> + * According to rfc951 : 7.2. Client Retransmission Strategy
> + * "After the 'average' backoff reaches about 60 seconds, it should be
> + * increased no further, but still randomized."
> + *
> + * U-Boot has saturated this backoff at 2 seconds for a long time.
> + * To modify, set the environment variable "bootpretransmitperiodmax"
> + */
> +#define RETRANSMIT_PERIOD_MAX_MS 2000
> +#define RETRANSMIT_PERIOD_INIT_MS250
> +
> #define PORT_BOOTPS 67 /* BOOTP server UDP port */
> #define PORT_BOOTPC 68 /* BOOTP client UDP port */
>
> @@ -56,6 +67,7 @@
> u32 bootp_ids[CFG_BOOTP_ID_CACHE_SIZE];
> unsigned int bootp_num_ids;
> int bootp_try;
> +u32 bootp_id;
> ulongbootp_start;
> ulongbootp_timeout;
> char net_nis_domain[32] = {0,}; /* Our NIS domain */
> @@ -63,6 +75,7 @@ char net_hostname[32] = {0,}; /* Our hostname */
> char net_root_path[CONFIG_BOOTP_MAX_ROOT_PATH_LEN] = {0,}; /* Our bootpath */
>
> static ulong time_taken_max;
> +static u32 retransmit_period_max_ms;
>
> #if defined(CONFIG_CMD_DHCP)
> static dhcp_state_t dhcp_state = INIT;
> @@ -417,8 +430,8 @@ static void bootp_timeout_handler(void)
> }
> } else {
> bootp_timeout *= 2;
> - if (bootp_timeout > 2000)
> - bootp_timeout = 2000;
> + if (bootp_timeout > retransmit_period_max_ms)
> + bootp_timeout = retransmit_period_max_ms;
> net_set_timeout_handler(bootp_timeout, bootp_timeout_handler);
> bootp_request();
> }
> @@ -714,10 +727,18 @@ static int bootp_extended(u8 *e)
>
> void bootp_reset(void)
> {
> + char *ep; /* Environment pointer */
> +
> bootp_num_ids = 0;
> bootp_try = 0;
> bootp_start = get_timer(0);
> - bootp_timeout = 250;
> +
> + ep = env_get("bootpretransmitperiodinit");
> + if (ep)
> + bootp_timeout = dectoul(ep, NULL);
> + else
> + bootp_timeout = RETRANSMIT_PERIOD_INIT_MS;
> +
bootp_timeout = env_get_ulong("bootpretransmitperiodinit", 0,
RETRANSMIT_PERIOD_INIT_MS);
does the same...
> }
>
> void bootp_request(void)
> @@ -729,7 +750,6 @@ void bootp_request(void)
> #ifdef CONFIG_BOOTP_RANDOM_DELAY
> ulong rand_ms;
> #endif
> - u32 bootp_id;
> struct in_addr zero_ip;
> struct in_addr bcast_ip;
> char *ep; /* Environment pointer */
> @@ -745,6 +765,12 @@ void bootp_request(void)
> else
> time_taken_max = TIMEOUT_MS;
>
> + ep = env_get("bootpretransmitperiodmax");
> + if (ep)
> + retransmit_period_max_ms = dectoul(ep, NULL);
> + else
> + retransmit_period_max_ms = RETRANSMIT_PERIOD_MAX_MS;
> +
see above
Lothar Waßmann
[PATCH v2 2/2] DONOTMERGE: arm: dts: k3-j7200-binman: Enable split mode for MCU R5
Set boot core-opts to enable split mode for MCU R5 cluster by default. This patch serves to demonstrate how this can be done. Signed-off-by: Neha Malcom Francis --- arch/arm/dts/k3-j7200-binman.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/dts/k3-j7200-binman.dtsi b/arch/arm/dts/k3-j7200-binman.dtsi index 14f7dea65e..025a0bd071 100644 --- a/arch/arm/dts/k3-j7200-binman.dtsi +++ b/arch/arm/dts/k3-j7200-binman.dtsi @@ -55,6 +55,7 @@ <&combined_dm_cfg>, <&sysfw_inner_cert>; combined; dm-data; + core-opts = <2>; sysfw-inner-cert; keyfile = "custMpk.pem"; sw-rev = <1>; @@ -100,6 +101,7 @@ <&combined_dm_cfg_fs>, <&sysfw_inner_cert_fs>; combined; dm-data; + core-opts = <2>; sysfw-inner-cert; keyfile = "custMpk.pem"; sw-rev = <1>; @@ -146,6 +148,7 @@ <&combined_tifs_cfg_gp>, <&combined_dm_cfg_gp>; combined; dm-data; + core-opts = <2>; content-sbl = <&u_boot_spl_unsigned>; load = <0x41c0>; content-sysfw = <&ti_fs_gp>; -- 2.34.1
[PATCH v2 1/2] binman: openssl: x509: ti_secure_rom: Add support for bootcore_opts
According to the TRMs of K3 platform of devices, the ROM boot image
format specifies a "Core Options Field" that provides the capability to
set the boot core in lockstep when set to 0 or to split mode when set
to 2. Add support for providing the same from the binman DTS. Also
modify existing test case for ensuring future coverage.
Signed-off-by: Neha Malcom Francis
---
Link to J721E TRM: https://www.ti.com/lit/zip/spruil1
Section 4.5.4.1 Boot Info
tools/binman/btool/openssl.py | 6 --
tools/binman/etype/ti_secure_rom.py | 12 ++--
tools/binman/etype/x509_cert.py | 3 ++-
tools/binman/test/297_ti_secure_rom.dts | 1 +
4 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/tools/binman/btool/openssl.py b/tools/binman/btool/openssl.py
index aad3b61ae2..86cc56fbd7 100644
--- a/tools/binman/btool/openssl.py
+++ b/tools/binman/btool/openssl.py
@@ -155,6 +155,7 @@ authInPlace = INTEGER:2
C, ST, L, O, OU, CN and emailAddress
cert_type (int): Certification type
bootcore (int): Booting core
+bootcore_opts(int): Booting core option (split/lockstep mode)
load_addr (int): Load address of image
sha (int): Hash function
@@ -225,7 +226,7 @@ emailAddress =
{req_dist_name_dict['emailAddress']}
imagesize_sbl, hashval_sbl, load_addr_sysfw, imagesize_sysfw,
hashval_sysfw, load_addr_sysfw_data, imagesize_sysfw_data,
hashval_sysfw_data, sysfw_inner_cert_ext_boot_block,
- dm_data_ext_boot_block):
+ dm_data_ext_boot_block, bootcore_opts):
"""Create a certificate
Args:
@@ -241,6 +242,7 @@ emailAddress =
{req_dist_name_dict['emailAddress']}
bootcore (int): Booting core
load_addr (int): Load address of image
sha (int): Hash function
+bootcore_opts (int): Boot core option (split/lockstep mode)
Returns:
str: Tool output
@@ -285,7 +287,7 @@ sysfw_data=SEQUENCE:sysfw_data
[sbl]
compType = INTEGER:1
bootCore = INTEGER:16
-compOpts = INTEGER:0
+compOpts = INTEGER:{bootcore_opts}
destAddr = FORMAT:HEX,OCT:{load_addr:08x}
compSize = INTEGER:{imagesize_sbl}
shaType = OID:{sha_type}
diff --git a/tools/binman/etype/ti_secure_rom.py
b/tools/binman/etype/ti_secure_rom.py
index 9a7ac9e9e0..780f132ea5 100644
--- a/tools/binman/etype/ti_secure_rom.py
+++ b/tools/binman/etype/ti_secure_rom.py
@@ -32,6 +32,7 @@ class Entry_ti_secure_rom(Entry_x509_cert):
- core: core on which bootloader runs, valid cores are 'secure' and
'public'
- content: phandle of SPL in case of legacy bootflow or phandles of
component binaries
in case of combined bootflow
+- bootcore_opts (optional): split-mode (0) or lockstep mode (1) set to
0 by default
The following properties are only for generating a combined bootflow
binary:
- sysfw-inner-cert: boolean if binary contains sysfw inner certificate
@@ -69,6 +70,7 @@ class Entry_ti_secure_rom(Entry_x509_cert):
self.sw_rev = fdt_util.GetInt(self._node, 'sw-rev', 1)
self.sha = fdt_util.GetInt(self._node, 'sha', 512)
self.core = fdt_util.GetString(self._node, 'core', 'secure')
+self.bootcore_opts = fdt_util.GetInt(self._node, 'core-opts')
self.key_fname = self.GetEntryArgsOrProps([
EntryArg('keyfile', str)], required=True)[0]
if self.combined:
@@ -103,11 +105,14 @@ class Entry_ti_secure_rom(Entry_x509_cert):
else:
self.cert_type = 2
self.bootcore = 0
-self.bootcore_opts = 32
+if self.bootcore_opts is None:
+self.bootcore_opts = 32
else:
self.cert_type = 1
self.bootcore = 16
-self.bootcore_opts = 0
+if self.bootcore_opts is None:
+self.bootcore_opts = 0
+
return super().GetCertificate(required=required, type='rom')
def CombinedGetCertificate(self, required):
@@ -126,6 +131,9 @@ class Entry_ti_secure_rom(Entry_x509_cert):
self.num_comps = 3
self.sha_type = SHA_OIDS[self.sha]
+if self.bootcore_opts is None:
+self.bootcore_opts = 0
+
# sbl
self.content = fdt_util.GetPhandleList(self._node, 'content-sbl')
input_data_sbl = self.GetContents(required)
diff --git a/tools/binman/etype/x509_cert.py b/tools/binman/etype/x509_cert.py
index d028cfe38c..fc0bb12278 100644
--- a/tools/binman/etype/x509_cert.py
+++ b/tools/binman/etype/x509_cert.py
@@ -136,7 +136,8 @@ class Entry_x509_cert(Entry_collection):
imagesize_sysfw_data=self.imagesize_sysfw_data,
hashval_sysfw_data=self.hashval_sysfw_data,
sysfw_inner_cert_ext_boot_block=self.sysfw_inner_cert_ext_boot_block,
-dm_data_ext_boot_bl
[PATCH v2 0/2] Enable split mode in binman
This series extends the functionality of ti-secure-rom entry type in binman to support enabling of split mode vs. the default lockstep mode via changing the field in the x509 certificate. A DONOTMERGE patch is added to give an example of how this can be done via the binman.dtsi Changes since v2: - Udit: - included TRM link in commit message - added DONOTMERGE patch showing example Neha Malcom Francis (2): binman: openssl: x509: ti_secure_rom: Add support for bootcore_opts DONOTMERGE: arm: dts: k3-j7200-binman: Enable split mode for MCU R5 arch/arm/dts/k3-j7200-binman.dtsi | 3 +++ tools/binman/btool/openssl.py | 6 -- tools/binman/etype/ti_secure_rom.py | 12 ++-- tools/binman/etype/x509_cert.py | 3 ++- tools/binman/test/297_ti_secure_rom.dts | 1 + 5 files changed, 20 insertions(+), 5 deletions(-) -- 2.34.1
Re: [PATCH 2/2] configs: rockchip: add DOS_PARTITION to RK3308 boards defconfig
Hi Massimo, This patch is fine to me, but you can merge these two patch into one, because they are all rk3308 boards. And if you have more than one patch, it'd better to use --in-reply-to for follow up patches so that the mail system know this is a patch set and grab them together. Thanks, - Kever On 2023/9/3 01:15, Massimo Pegorer wrote: Without DOS_PARTITION support U-Boot is not able to boot an OS stored into an SD card with MBR partitions table. This is still a quite common case, so add DOS_PARTITION (only for U-Boot proper build) to Rockchip RK3308 EVB and Firefly roc-rk3308-cc board: they are the only RK boards missing of DOS_PARTITION. Signed-off-by: Massimo Pegorer --- configs/evb-rk3308_defconfig| 2 +- configs/roc-cc-rk3308_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index a13a809c1e..c6472a2c9c 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -47,7 +47,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SLEEP is not set -# CONFIG_DOS_PARTITION is not set +# CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 CONFIG_SPL_OF_CONTROL=y diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 9a789b212f..ca92b8f744 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -47,7 +47,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y # CONFIG_CMD_ITEST is not set # CONFIG_CMD_SETEXPR is not set # CONFIG_CMD_SLEEP is not set -# CONFIG_DOS_PARTITION is not set +# CONFIG_SPL_DOS_PARTITION is not set # CONFIG_ISO_PARTITION is not set CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 CONFIG_SPL_OF_CONTROL=y
Re: [PATCH 7/7] configs: rockchip: Enable ethernet driver on RK3588 boards
On 2023/8/7 08:08, Jonas Karlman wrote: Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK3588 boards that have an enabled gmac node and drop ETH_DESIGNWARE and GMAC_ROCKCHIP for remaining RK3588 boards. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Thanks, - Kever --- configs/evb-rk3588_defconfig | 5 +++-- configs/neu6a-io-rk3588_defconfig | 2 -- configs/neu6b-io-rk3588_defconfig | 2 -- configs/rock5a-rk3588s_defconfig | 6 +++--- 4 files changed, 6 insertions(+), 9 deletions(-) diff --git a/configs/evb-rk3588_defconfig b/configs/evb-rk3588_defconfig index f49c2ca686a8..0b7b4f2f627a 100644 --- a/configs/evb-rk3588_defconfig +++ b/configs/evb-rk3588_defconfig @@ -58,8 +58,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/configs/neu6a-io-rk3588_defconfig b/configs/neu6a-io-rk3588_defconfig index 09729a0ea429..d5301c630b2a 100644 --- a/configs/neu6a-io-rk3588_defconfig +++ b/configs/neu6a-io-rk3588_defconfig @@ -53,8 +53,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/configs/neu6b-io-rk3588_defconfig b/configs/neu6b-io-rk3588_defconfig index c7bc3b1965f0..b13c9b5db1b0 100644 --- a/configs/neu6b-io-rk3588_defconfig +++ b/configs/neu6b-io-rk3588_defconfig @@ -53,8 +53,6 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y diff --git a/configs/rock5a-rk3588s_defconfig b/configs/rock5a-rk3588s_defconfig index 6cbd9817c528..bccdb1e3ecd6 100644 --- a/configs/rock5a-rk3588s_defconfig +++ b/configs/rock5a-rk3588s_defconfig @@ -11,7 +11,6 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-rock-5a" CONFIG_ROCKCHIP_RK3588=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y -CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x100 CONFIG_TARGET_ROCK5A_RK3588=y @@ -59,8 +58,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_SPL_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y
Re: [PATCH 6/7] configs: rockchip: Enable ethernet driver on RK356x boards
On 2023/8/7 08:08, Jonas Karlman wrote: Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that have an enabled gmac node. Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Thanks, - Kever --- configs/evb-rk3568_defconfig | 5 +++-- configs/nanopi-r5s-rk3568_defconfig | 3 +++ configs/odroid-m1-rk3568_defconfig| 3 +++ configs/quartz64-a-rk3566_defconfig | 3 +++ configs/quartz64-b-rk3566_defconfig | 3 +++ configs/radxa-cm3-io-rk3566_defconfig | 6 -- configs/rock-3a-rk3568_defconfig | 5 +++-- configs/soquartz-blade-rk3566_defconfig | 3 +++ configs/soquartz-cm4-rk3566_defconfig | 3 +++ configs/soquartz-model-a-rk3566_defconfig | 3 +++ 10 files changed, 31 insertions(+), 6 deletions(-) diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index 5f3fab7304c2..43431ecdfed6 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -58,8 +58,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_DM_PMIC=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_RK8XX=y diff --git a/configs/nanopi-r5s-rk3568_defconfig b/configs/nanopi-r5s-rk3568_defconfig index c278ce083d9a..2736d382a352 100644 --- a/configs/nanopi-r5s-rk3568_defconfig +++ b/configs/nanopi-r5s-rk3568_defconfig @@ -65,6 +65,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_RTL8169=y CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y diff --git a/configs/odroid-m1-rk3568_defconfig b/configs/odroid-m1-rk3568_defconfig index 3dda5c1f9170..96b4e9ecdaff 100644 --- a/configs/odroid-m1-rk3568_defconfig +++ b/configs/odroid-m1-rk3568_defconfig @@ -82,6 +82,9 @@ CONFIG_SF_DEFAULT_BUS=4 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_MTD=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y diff --git a/configs/quartz64-a-rk3566_defconfig b/configs/quartz64-a-rk3566_defconfig index 6853cd6c44b4..bf4d4cd2b8ed 100644 --- a/configs/quartz64-a-rk3566_defconfig +++ b/configs/quartz64-a-rk3566_defconfig @@ -81,6 +81,9 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_MOTORCOMM=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y diff --git a/configs/quartz64-b-rk3566_defconfig b/configs/quartz64-b-rk3566_defconfig index aa29fff14643..358687ab5d7f 100644 --- a/configs/quartz64-b-rk3566_defconfig +++ b/configs/quartz64-b-rk3566_defconfig @@ -79,6 +79,9 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y diff --git a/configs/radxa-cm3-io-rk3566_defconfig b/configs/radxa-cm3-io-rk3566_defconfig index f89777184ceb..4b606dcb8e94 100644 --- a/configs/radxa-cm3-io-rk3566_defconfig +++ b/configs/radxa-cm3-io-rk3566_defconfig @@ -47,6 +47,7 @@ CONFIG_CMD_REGULATOR=y CONFIG_SPL_OF_CONTROL=y CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -59,8 +60,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y CONFIG_SPL_PINCTRL=y diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig index 409aa95acf06..28d157dbd7a7 100644 --- a/configs/rock-3a-rk3568_defconfig +++ b/configs/rock-3a-rk3568_defconfig @@ -77,8 +77,9 @@ CONFIG_SF_DEFAULT_BUS=4 CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_XTX=y -CONFIG_ETH_DESIGNWARE=y -CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DWC_ETH_QOS=y +CONFIG_DWC_ETH_QOS_ROCKCHIP=y CONFIG_NVME_PCI=y CONFIG_PCIE_DW_ROCKCHIP=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y diff --git a/configs/soquartz-blade-rk3566_defconfig b/configs/soquartz-blade-rk3566_defconfig index 181c284e73e9..1d993a5b71b0 100644 --- a/configs/soquartz-blade-rk3566_defconfig +++ b/configs/soquartz-blade-rk3566_defconfig @@ -67,6 +67,9 @@ CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_SDM
Re: [PATCH 5/7] net: dwc_eth_qos_rockchip: Add support for RK3588
On 2023/8/7 08:08, Jonas Karlman wrote:
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3588.
rk_gmac_ops was ported from linux commits:
2f2b60a0ec28 ("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588")
88619e77b33d ("net: stmmac: rk3588: Allow multiple gmac controller")
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Cc: David Wu
Cc: Sebastian Reichel
Cc: Benjamin Gaignard
---
drivers/net/dwc_eth_qos.c | 4 +
drivers/net/dwc_eth_qos_rockchip.c | 182 -
2 files changed, 182 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 9fb98a2c3c74..dc04416865dd 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1712,6 +1712,10 @@ static const struct udevice_id eqos_ids[] = {
.compatible = "rockchip,rk3568-gmac",
.data = (ulong)&eqos_rockchip_config
},
+ {
+ .compatible = "rockchip,rk3588-gmac",
+ .data = (ulong)&eqos_rockchip_config
+ },
#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_QCOM)
{
diff --git a/drivers/net/dwc_eth_qos_rockchip.c
b/drivers/net/dwc_eth_qos_rockchip.c
index c8abe351fc3e..34020496bde6 100644
--- a/drivers/net/dwc_eth_qos_rockchip.c
+++ b/drivers/net/dwc_eth_qos_rockchip.c
@@ -20,6 +20,7 @@ struct rk_gmac_ops {
int tx_delay, int rx_delay);
int (*set_to_rmii)(struct udevice *dev);
int (*set_gmac_speed)(struct udevice *dev);
+ void (*set_clock_selection)(struct udevice *dev, bool enable);
u32 regs[3];
};
@@ -27,7 +28,9 @@ struct rockchip_platform_data {
struct reset_ctl_bulk resets;
const struct rk_gmac_ops *ops;
int id;
+ bool clock_input;
struct regmap *grf;
+ struct regmap *php_grf;
};
#define HIWORD_UPDATE(val, mask, shift) \
@@ -121,6 +124,137 @@ static int rk3568_set_gmac_speed(struct udevice *dev)
return 0;
}
+/* sys_grf */
+#define RK3588_GRF_GMAC_CON7 0x031c
+#define RK3588_GRF_GMAC_CON8 0x0320
+#define RK3588_GRF_GMAC_CON9 0x0324
+
+#define RK3588_GMAC_RXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 3)
+#define RK3588_GMAC_RXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 3)
+#define RK3588_GMAC_TXCLK_DLY_ENABLE(id) GRF_BIT(2 * (id) + 2)
+#define RK3588_GMAC_TXCLK_DLY_DISABLE(id) GRF_CLR_BIT(2 * (id) + 2)
+
+#define RK3588_GMAC_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 8)
+#define RK3588_GMAC_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0xFF, 0)
+
+/* php_grf */
+#define RK3588_GRF_GMAC_CON0 0x0008
+#define RK3588_GRF_CLK_CON10x0070
+
+#define RK3588_GMAC_PHY_INTF_SEL_RGMII(id) \
+ (GRF_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_CLR_BIT(5 +
(id) * 6))
+#define RK3588_GMAC_PHY_INTF_SEL_RMII(id) \
+ (GRF_CLR_BIT(3 + (id) * 6) | GRF_CLR_BIT(4 + (id) * 6) | GRF_BIT(5 +
(id) * 6))
+
+#define RK3588_GMAC_CLK_RMII_MODE(id) GRF_BIT(5 * (id))
+#define RK3588_GMAC_CLK_RGMII_MODE(id) GRF_CLR_BIT(5 * (id))
+
+#define RK3588_GMAC_CLK_SELET_CRU(id) GRF_BIT(5 * (id) + 4)
+#define RK3588_GMAC_CLK_SELET_IO(id) GRF_CLR_BIT(5 * (id) + 4)
+
+#define RK3588_GMAC_CLK_RMII_DIV2(id) GRF_BIT(5 * (id) + 2)
+#define RK3588_GMAC_CLK_RMII_DIV20(id) GRF_CLR_BIT(5 * (id) + 2)
+
+#define RK3588_GMAC_CLK_RGMII_DIV1(id) \
+ (GRF_CLR_BIT(5 * (id) + 2) | GRF_CLR_BIT(5 * (id) + 3))
+#define RK3588_GMAC_CLK_RGMII_DIV5(id) \
+ (GRF_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))
+#define RK3588_GMAC_CLK_RGMII_DIV50(id)\
+ (GRF_CLR_BIT(5 * (id) + 2) | GRF_BIT(5 * (id) + 3))
+
+#define RK3588_GMAC_CLK_RMII_GATE(id) GRF_BIT(5 * (id) + 1)
+#define RK3588_GMAC_CLK_RMII_NOGATE(id)GRF_CLR_BIT(5 * (id) +
1)
+
+static int rk3588_set_to_rgmii(struct udevice *dev,
+ int tx_delay, int rx_delay)
+{
+ struct eth_pdata *pdata = dev_get_plat(dev);
+ struct rockchip_platform_data *data = pdata->priv_pdata;
+ u32 offset_con, id = data->id;
+
+ offset_con = data->id == 1 ? RK3588_GRF_GMAC_CON9 :
+RK3588_GRF_GMAC_CON8;
+
+ regmap_write(data->php_grf, RK3588_GRF_GMAC_CON0,
+RK3588_GMAC_PHY_INTF_SEL_RGMII(id));
+
+ regmap_write(data->php_grf, RK3588_GRF_CLK_CON1,
+RK3588_GMAC_CLK_RGMII_MODE(id));
+
+ regmap_write(data->grf, RK3588_GRF_GMAC_CON7,
+RK3588_GMAC_RXCLK_DLY_ENABLE(id) |
+RK3588_GMAC_TXCLK_DLY_ENABLE(id));
+
+ regmap_write(data->grf, offset_con,
+RK3588_GMAC_CLK_RX_DL_CFG(rx_delay) |
+RK
Re: [PATCH 4/7] net: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568
On 2023/8/7 08:08, Jonas Karlman wrote:
Add a new glue driver for Rockchip SoCs, i.e RK3568, with a GMAC based
on Synopsys DWC Ethernet QoS IP.
rk_gmac_ops was ported from linux commit:
3bb3d6b1c195 ("net: stmmac: Add RK3566/RK3568 SoC support")
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Cc: David Wu
Cc: Ezequiel Garcia
---
drivers/net/Kconfig| 8 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 8 +-
drivers/net/dwc_eth_qos.h | 2 +
drivers/net/dwc_eth_qos_rockchip.c | 348 +
5 files changed, 365 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/dwc_eth_qos_rockchip.c
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 0ed39a61e4de..29304fd77759 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -225,6 +225,14 @@ config DWC_ETH_QOS_IMX
The Synopsys Designware Ethernet QOS IP block with the specific
configuration used in IMX soc.
+config DWC_ETH_QOS_ROCKCHIP
+ bool "Synopsys DWC Ethernet QOS device support for Rockchip SoCs"
+ depends on DWC_ETH_QOS
+ select DM_ETH_PHY
+ help
+ The Synopsys Designware Ethernet QOS IP block with specific
+ configuration used in Rockchip SoCs.
+
config DWC_ETH_QOS_STM32
bool "Synopsys DWC Ethernet QOS device support for STM32"
depends on DWC_ETH_QOS
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index d4af253b6f28..1d444f5b4a69 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_DRIVER_DM9000) += dm9000x.o
obj-$(CONFIG_DSA_SANDBOX) += dsa_sandbox.o
obj-$(CONFIG_DWC_ETH_QOS) += dwc_eth_qos.o
obj-$(CONFIG_DWC_ETH_QOS_IMX) += dwc_eth_qos_imx.o
+obj-$(CONFIG_DWC_ETH_QOS_ROCKCHIP) += dwc_eth_qos_rockchip.o
obj-$(CONFIG_DWC_ETH_QOS_QCOM) += dwc_eth_qos_qcom.o
obj-$(CONFIG_DWC_ETH_QOS_STARFIVE) += dwc_eth_qos_starfive.o
obj-$(CONFIG_E1000) += e1000.o
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 24fb3fac1f12..9fb98a2c3c74 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1707,7 +1707,12 @@ static const struct udevice_id eqos_ids[] = {
.data = (ulong)&eqos_imx_config
},
#endif
-
+#if IS_ENABLED(CONFIG_DWC_ETH_QOS_ROCKCHIP)
+ {
+ .compatible = "rockchip,rk3568-gmac",
+ .data = (ulong)&eqos_rockchip_config
+ },
+#endif
#if IS_ENABLED(CONFIG_DWC_ETH_QOS_QCOM)
{
.compatible = "qcom,qcs404-ethqos",
@@ -1720,7 +1725,6 @@ static const struct udevice_id eqos_ids[] = {
.data = (ulong)&eqos_jh7110_config
},
#endif
-
{ }
};
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index 06a082da72ef..e3222e1e17e5 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -82,6 +82,7 @@ struct eqos_mac_regs {
#define EQOS_MAC_MDIO_ADDRESS_PA_SHIFT21
#define EQOS_MAC_MDIO_ADDRESS_RDA_SHIFT 16
#define EQOS_MAC_MDIO_ADDRESS_CR_SHIFT8
+#define EQOS_MAC_MDIO_ADDRESS_CR_100_150 1
#define EQOS_MAC_MDIO_ADDRESS_CR_20_352
#define EQOS_MAC_MDIO_ADDRESS_CR_250_300 5
#define EQOS_MAC_MDIO_ADDRESS_SKAPBIT(4)
@@ -287,5 +288,6 @@ void eqos_flush_buffer_generic(void *buf, size_t size);
int eqos_null_ops(struct udevice *dev);
extern struct eqos_config eqos_imx_config;
+extern struct eqos_config eqos_rockchip_config;
extern struct eqos_config eqos_qcom_config;
extern struct eqos_config eqos_jh7110_config;
diff --git a/drivers/net/dwc_eth_qos_rockchip.c
b/drivers/net/dwc_eth_qos_rockchip.c
new file mode 100644
index ..c8abe351fc3e
--- /dev/null
+++ b/drivers/net/dwc_eth_qos_rockchip.c
@@ -0,0 +1,348 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "dwc_eth_qos.h"
+
+struct rk_gmac_ops {
+ const char *compatible;
+ int (*set_to_rgmii)(struct udevice *dev,
+ int tx_delay, int rx_delay);
+ int (*set_to_rmii)(struct udevice *dev);
+ int (*set_gmac_speed)(struct udevice *dev);
+ u32 regs[3];
+};
+
+struct rockchip_platform_data {
+ struct reset_ctl_bulk resets;
+ const struct rk_gmac_ops *ops;
+ int id;
+ struct regmap *grf;
+};
+
+#define HIWORD_UPDATE(val, mask, shift) \
+ ((val) << (shift) | (mask) << ((shift) + 16))
+
+#define GRF_BIT(nr)(BIT(nr) | BIT((nr) + 16))
+#define GRF_CLR_BIT(nr)(BIT((nr) + 16))
+
+#define RK3568_GRF_GMAC0_CON0 0x0380
+#define RK3568_GRF_GMAC0_CON1 0x0384
+#define RK3568_GRF_GMAC1_CON0 0x0388
+#define RK3568_GRF_GMAC1_CON1 0x038c
+
Re: [PATCH 3/7] net: dwc_eth_qos: Stop spam of RX packet not available message
On 2023/8/7 08:08, Jonas Karlman wrote:
Remove spam of RX packet not available debug messages when waiting to
receive a packet.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/net/dwc_eth_qos.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 7565e716823a..24fb3fac1f12 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1193,14 +1193,12 @@ static int eqos_recv(struct udevice *dev, int flags,
uchar **packetp)
struct eqos_desc *rx_desc;
int length;
- debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
-
rx_desc = eqos_get_desc(eqos, eqos->rx_desc_idx, true);
eqos->config->ops->eqos_inval_desc(rx_desc);
- if (rx_desc->des3 & EQOS_DESC3_OWN) {
- debug("%s: RX packet not available\n", __func__);
+ if (rx_desc->des3 & EQOS_DESC3_OWN)
return -EAGAIN;
- }
+
+ debug("%s(dev=%p, flags=%x):\n", __func__, dev, flags);
*packetp = eqos->rx_dma_buf +
(eqos->rx_desc_idx * EQOS_MAX_PACKET_SIZE);
Re: [PATCH 2/7] net: dwc_eth_qos: Return error code when start fails
On 2023/8/7 08:08, Jonas Karlman wrote:
Return error code when phy_connect fails or no link can be established.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/net/dwc_eth_qos.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 555eaee3bbc3..7565e716823a 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -811,6 +811,7 @@ static int eqos_start(struct udevice *dev)
if (!eqos->phy) {
pr_err("phy_connect() failed");
+ ret = -ENODEV;
goto err_stop_resets;
}
@@ -838,6 +839,7 @@ static int eqos_start(struct udevice *dev)
if (!eqos->phy->link) {
pr_err("No link");
+ ret = -EAGAIN;
goto err_shutdown_phy;
}
Re: [PATCH 1/7] net: dwc_eth_qos: Drop unused rx_pkt from eqos_priv
On 2023/8/7 08:08, Jonas Karlman wrote:
rx_pkt is allocated and not used for anything, remove it.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/net/dwc_eth_qos.c | 11 ---
drivers/net/dwc_eth_qos.h | 1 -
2 files changed, 12 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index 1e92bd9ca9c0..555eaee3bbc3 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
@@ -1314,22 +1314,12 @@ static int eqos_probe_resources_core(struct udevice
*dev)
}
debug("%s: rx_dma_buf=%p\n", __func__, eqos->rx_dma_buf);
- eqos->rx_pkt = malloc(EQOS_MAX_PACKET_SIZE);
- if (!eqos->rx_pkt) {
- debug("%s: malloc(rx_pkt) failed\n", __func__);
- ret = -ENOMEM;
- goto err_free_rx_dma_buf;
- }
- debug("%s: rx_pkt=%p\n", __func__, eqos->rx_pkt);
-
eqos->config->ops->eqos_inval_buffer(eqos->rx_dma_buf,
EQOS_MAX_PACKET_SIZE * EQOS_DESCRIPTORS_RX);
debug("%s: OK\n", __func__);
return 0;
-err_free_rx_dma_buf:
- free(eqos->rx_dma_buf);
err_free_tx_dma_buf:
free(eqos->tx_dma_buf);
err_free_descs:
@@ -1348,7 +1338,6 @@ static int eqos_remove_resources_core(struct udevice *dev)
debug("%s(dev=%p):\n", __func__, dev);
- free(eqos->rx_pkt);
free(eqos->rx_dma_buf);
free(eqos->tx_dma_buf);
eqos_free_descs(eqos->rx_descs);
diff --git a/drivers/net/dwc_eth_qos.h b/drivers/net/dwc_eth_qos.h
index a6b719af809f..06a082da72ef 100644
--- a/drivers/net/dwc_eth_qos.h
+++ b/drivers/net/dwc_eth_qos.h
@@ -273,7 +273,6 @@ struct eqos_priv {
unsigned int desc_per_cacheline;
void *tx_dma_buf;
void *rx_dma_buf;
- void *rx_pkt;
bool started;
bool reg_access_ok;
bool clk_ck_enabled;
Re: [PATCH 2/2] rockchip: rk356x-u-boot: Add bootph-all to i2c0_xfer pinctrl node
On 2023/8/4 05:02, Jonas Karlman wrote:
A RK8XX PMIC is typically using i2c0 on RK356x devices. Add bootph-all
to required pinctrl nodes to simplify use of the prevent booting on
power plug-in option in SPL.
With the following Kconfig options and nodes in u-boot.dtsi the prevent
booting on power plug-in option can work in SPL.
CONFIG_ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON=y
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_PINCTRL=y
CONFIG_SPL_PMIC_RK8XX=y
&i2c0 {
bootph-pre-ram;
};
&rk817 {
bootph-pre-ram;
regulators {
bootph-pre-ram;
};
};
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x-u-boot.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi
index d21b18205220..fe7de0dd4bc8 100644
--- a/arch/arm/dts/rk356x-u-boot.dtsi
+++ b/arch/arm/dts/rk356x-u-boot.dtsi
@@ -64,6 +64,10 @@
bootph-all;
};
+&pcfg_pull_none_smt {
+ bootph-all;
+};
+
&pcfg_pull_none {
bootph-all;
};
@@ -100,6 +104,10 @@
bootph-all;
};
+&i2c0_xfer {
+ bootph-all;
+};
+
&sdmmc0_bus4 {
bootph-all;
};
Re: [PATCH 2/2] rockchip: rk3568-nanopi-r5: Enable PCIe on NanoPi R5C and R5S
On 2023/8/3 03:49, Jonas Karlman wrote:
Enable missing PCIe Kconfig options now that PCIe bifurcation is fixed
to make use of the two on-board RTL8125B and the M.2 slot on NanoPi R5C
and NanoPi R5S.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi | 4
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 4
configs/nanopi-r5c-rk3568_defconfig| 5 +
configs/nanopi-r5s-rk3568_defconfig| 6 ++
4 files changed, 19 insertions(+)
diff --git a/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
index fe5bc6af4765..c0798e950bb5 100644
--- a/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-nanopi-r5c-u-boot.dtsi
@@ -1,3 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "rk3568-nanopi-r5s-u-boot.dtsi"
+
+&pcie3x2 {
+ /delete-property/ vpcie3v3-supply;
+};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
index 094e5af6a757..880f8ff91fcb 100644
--- a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
@@ -14,6 +14,10 @@
};
};
+&pcie3x1 {
+ /delete-property/ vpcie3v3-supply;
+};
+
&sdhci {
cap-mmc-highspeed;
mmc-ddr-1_8v;
diff --git a/configs/nanopi-r5c-rk3568_defconfig
b/configs/nanopi-r5c-rk3568_defconfig
index badac5805ddb..833cff0e457d 100644
--- a/configs/nanopi-r5c-rk3568_defconfig
+++ b/configs/nanopi-r5c-rk3568_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=2400
CONFIG_ARCH_ROCKCHIP=y
CONFIG_TEXT_BASE=0x00a0
@@ -17,6 +18,7 @@ CONFIG_SPL_STACK=0x40
CONFIG_DEBUG_UART_BASE=0xFE66
CONFIG_DEBUG_UART_CLOCK=2400
CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -39,6 +41,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
@@ -62,6 +65,8 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_RTL8169=y
+CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
diff --git a/configs/nanopi-r5s-rk3568_defconfig
b/configs/nanopi-r5s-rk3568_defconfig
index fdcb0c266d83..c278ce083d9a 100644
--- a/configs/nanopi-r5s-rk3568_defconfig
+++ b/configs/nanopi-r5s-rk3568_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_SYS_HAS_NONCACHED_MEMORY=y
CONFIG_COUNTER_FREQUENCY=2400
CONFIG_ARCH_ROCKCHIP=y
CONFIG_TEXT_BASE=0x00a0
@@ -17,6 +18,7 @@ CONFIG_SPL_STACK=0x40
CONFIG_DEBUG_UART_BASE=0xFE66
CONFIG_DEBUG_UART_CLOCK=2400
CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
@@ -39,6 +41,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
@@ -62,6 +65,9 @@ CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_RTL8169=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_SPL_PINCTRL=y
Re: [PATCH 1/2] rockchip: rk3568-nanopi-r5: Update defconfig for NanoPi R5C and R5S
On 2023/8/3 03:49, Jonas Karlman wrote:
Update and sync Kconfig options for NanoPi R5C and NanoPi R5S with other
RK3568 boards.
SPL_FIT_SIGNATURE is enabled to add a checksum validation of the FIT
payload, also add LEGACY_IMAGE_FORMAT to keep boot scripts working.
OF_SPL_REMOVE_PROPS, SPL_DM_SEQ_ALIAS and SPL_PINCTRL change ensure
pinctrl for eMMC, SD-card and UART2 is applied in SPL.
MMC_HS200_SUPPORT and SPL counterpart is enabled to speed up eMMC load
times from on-board eMMC 5.1 modules.
Drop remaining unused or unsupported options to sync with other RK3568
boards.
Also sync device tree from linux v6.4 and drop u-boot,spl-boot-order and
use the default from rk356x-u-boot.dtsi.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
The addition of SPL_FIT_SIGNATURE add an important integrity check that
slow down boot time by a second or two. Enabled D-cache in SPL make the
added boot time negligible, see RFC patch [1].
[1]
https://patchwork.ozlabs.org/project/uboot/patch/20230702110055.3686457-1-jo...@kwiboo.se/
arch/arm/dts/rk3568-nanopi-r5c.dts | 2 +-
arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi | 6 +-
configs/nanopi-r5c-rk3568_defconfig| 13 +++--
configs/nanopi-r5s-rk3568_defconfig| 13 +++--
4 files changed, 20 insertions(+), 14 deletions(-)
diff --git a/arch/arm/dts/rk3568-nanopi-r5c.dts
b/arch/arm/dts/rk3568-nanopi-r5c.dts
index f70ca9f0470a..c718b8dbb9c6 100644
--- a/arch/arm/dts/rk3568-nanopi-r5c.dts
+++ b/arch/arm/dts/rk3568-nanopi-r5c.dts
@@ -106,7 +106,7 @@
rockchip-key {
reset_button_pin: reset-button-pin {
- rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
diff --git a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
index 0ecca85b2067..094e5af6a757 100644
--- a/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-nanopi-r5s-u-boot.dtsi
@@ -11,7 +11,6 @@
/ {
chosen {
stdout-path = &uart2;
- u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
};
};
@@ -29,3 +28,8 @@
bootph-all;
status = "okay";
};
+
+&vcc5v0_usb_host {
+ /delete-property/ regulator-always-on;
+ /delete-property/ regulator-boot-on;
+};
diff --git a/configs/nanopi-r5c-rk3568_defconfig
b/configs/nanopi-r5c-rk3568_defconfig
index 201b21ad77e3..badac5805ddb 100644
--- a/configs/nanopi-r5c-rk3568_defconfig
+++ b/configs/nanopi-r5c-rk3568_defconfig
@@ -20,7 +20,9 @@ CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5c.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -43,8 +45,9 @@ CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent
assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks
assigned-clock-rates assigned-clock-parents"
CONFIG_SPL_DM_WARN=y
+CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
CONFIG_SPL_CLK=y
@@ -52,19 +55,18 @@ CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_HS200_SUPPORT=y
+CONFIG_SPL_MMC_HS200_SUPPORT=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
-CONFIG_ETH_DESIGNWARE=y
-CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
-CONFIG_POWER_DOMAIN=y
+CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
-CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_SPL_RAM=y
@@ -72,7 +74,6 @@ CONFIG_BAUDRATE=150
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550_MEM32=y
CONFIG_SYSRESET=y
-CONFIG_SYSRESET_PSCI=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/nanopi-r5s-rk3568_defconfig
b/configs/nanopi-r5s-rk3568_defconfig
index 67b28430709e..fdcb0c266d83 100644
--- a/configs/nanopi-r5s-rk3568_defconfig
+++ b/configs/nanopi-r5s-rk3568_defconfig
@@ -20,7 +20,9 @@ CONFIG_SYS_LOAD_ADDR=0xc00800
CONFIG_DEBUG_UART=y
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-nanopi-r5s.dtb"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
@@ -43,8 +45,9 @@ CONFIG_CMD_REGULATOR=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
-CONFIG_OF_SPL_REMOVE_PROPS="pinctrl
Re: [PATCH v2 5/5] rockchip: board: Add minimal generic RK3566/RK3568 board
On 2023/8/22 06:30, Jonas Karlman wrote:
Add a minimal generic RK3566/RK3568 board that only have eMMC and SDMMC
enabled. This defconfig can be used to boot from eMMC or SD-card on most
RK3566/RK3568 boards that follow reference board design.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- New patch
arch/arm/dts/rk3568-generic-u-boot.dtsi | 14 ++
arch/arm/dts/rk3568-generic.dts | 38 +++
board/rockchip/evb_rk3568/MAINTAINERS | 7 +++
configs/generic-rk3568_defconfig| 64 +
doc/board/rockchip/rockchip.rst | 1 +
5 files changed, 124 insertions(+)
create mode 100644 arch/arm/dts/rk3568-generic-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-generic.dts
create mode 100644 configs/generic-rk3568_defconfig
diff --git a/arch/arm/dts/rk3568-generic-u-boot.dtsi
b/arch/arm/dts/rk3568-generic-u-boot.dtsi
new file mode 100644
index ..90022580a13b
--- /dev/null
+++ b/arch/arm/dts/rk3568-generic-u-boot.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ };
+};
+
+&uart2 {
+ bootph-pre-ram;
+ clock-frequency = <2400>;
+};
diff --git a/arch/arm/dts/rk3568-generic.dts b/arch/arm/dts/rk3568-generic.dts
new file mode 100644
index ..1006ea55bb98
--- /dev/null
+++ b/arch/arm/dts/rk3568-generic.dts
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Minimal generic DT for RK3566/RK3568 with eMMC and SD-card enabled
+ */
+
+/dts-v1/;
+#include "rk356x.dtsi"
+
+/ {
+ model = "Generic RK3566/RK3568";
+ compatible = "rockchip,rk3568";
+
+ chosen: chosen {
+ stdout-path = "serial2:150n8";
+ };
+};
+
+&sdhci {
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
+ status = "okay";
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd>;
+ status = "okay";
+};
+
+&uart2 {
+ status = "okay";
+};
diff --git a/board/rockchip/evb_rk3568/MAINTAINERS
b/board/rockchip/evb_rk3568/MAINTAINERS
index cc9eb432a8b5..fa8d1190931d 100644
--- a/board/rockchip/evb_rk3568/MAINTAINERS
+++ b/board/rockchip/evb_rk3568/MAINTAINERS
@@ -7,6 +7,13 @@ F: configs/evb-rk3568_defconfig
F:arch/arm/dts/rk3568-evb-u-boot.dtsi
F:arch/arm/dts/rk3568-evb.dts
+GENERIC-RK3568
+M: Jonas Karlman
+S: Maintained
+F: configs/generic-rk3568_defconfig
+F: arch/arm/dts/rk3568-generic.dts
+F: arch/arm/dts/rk3568-generic-u-boot.dtsi
+
LUBANCAT-2
M:Andy Yan
S:Maintained
diff --git a/configs/generic-rk3568_defconfig b/configs/generic-rk3568_defconfig
new file mode 100644
index ..8f0a9c8c449f
--- /dev/null
+++ b/configs/generic-rk3568_defconfig
@@ -0,0 +1,64 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=2400
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_TEXT_BASE=0x00a0
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0
+CONFIG_DEFAULT_DEVICE_TREE="rk3568-generic"
+CONFIG_ROCKCHIP_RK3568=y
+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
+CONFIG_SPL_SERIAL=y
+CONFIG_SPL_STACK_R_ADDR=0x60
+CONFIG_SPL_STACK=0x40
+CONFIG_DEBUG_UART_BASE=0xFE66
+CONFIG_DEBUG_UART_CLOCK=2400
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-generic.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x4
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400
+CONFIG_SPL_BSS_MAX_SIZE=0x4000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+CONFIG_SPL_STACK_R=y
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent
assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_MISC=y
+# CONFIG_ROCKCHIP_IODOMAIN is not set
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=150
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_SYSRESET=y
+CONFIG_ERRNO
Re: [PATCH v2 4/5] rockchip: Port IO-domain driver for RK3568 from linux
On 2023/8/22 06:30, Jonas Karlman wrote:
Port the Rockchip IO-domain driver for RK3568 from linux.
The driver auto probe after bind to configure IO-domain based on the
regulator voltage. Compared to the linux driver this driver is not
notified about regulator voltage changes and only configure IO-domain
based on the initial voltage autoset by the regulator.
It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage
and IO-domain may end up out of sync.
Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add
rk3568 support").
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
---
Cc: Jianqun Xu
Cc: Heiko Stuebner
Cc: Doug Anderson
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- Add probe after bind comment
- Drop parenthesis
- Collect r-b tag
drivers/misc/Kconfig | 9 ++
drivers/misc/Makefile | 1 +
drivers/misc/rockchip-io-domain.c | 167 ++
3 files changed, 177 insertions(+)
create mode 100644 drivers/misc/rockchip-io-domain.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index b9f5c7a37aed..d160ce693939 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -101,6 +101,15 @@ config ROCKCHIP_OTP
addressing and a length or through child-nodes that are generated
based on the e-fuse map retrieved from the DTS.
+config ROCKCHIP_IODOMAIN
+ bool "Rockchip IO-domain driver support"
+ depends on DM_REGULATOR && ARCH_ROCKCHIP
+ default y if ROCKCHIP_RK3568
+ help
+ Enable support for IO-domains in Rockchip SoCs. It is necessary
+ for the IO-domain setting of the SoC to match the voltage supplied
+ by the regulators.
+
config SIFIVE_OTP
bool "SiFive eMemory OTP driver"
depends on MISC
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index fd8805f34bd9..b67b82358a6c 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_SANDBOX) += qfw_sandbox.o
endif
obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
obj-$(CONFIG_ROCKCHIP_OTP) += rockchip-otp.o
+obj-$(CONFIG_$(SPL_TPL_)ROCKCHIP_IODOMAIN) += rockchip-io-domain.o
obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
obj-$(CONFIG_SIFIVE_OTP) += sifive-otp.o
obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
diff --git a/drivers/misc/rockchip-io-domain.c
b/drivers/misc/rockchip-io-domain.c
new file mode 100644
index ..3f6227f993f9
--- /dev/null
+++ b/drivers/misc/rockchip-io-domain.c
@@ -0,0 +1,167 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Rockchip IO Voltage Domain driver
+ *
+ * Ported from linux drivers/soc/rockchip/io-domain.c
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define MAX_SUPPLIES 16
+
+/*
+ * The max voltage for 1.8V and 3.3V come from the Rockchip datasheet under
+ * "Recommended Operating Conditions" for "Digital GPIO". When the typical
+ * is 3.3V the max is 3.6V. When the typical is 1.8V the max is 1.98V.
+ *
+ * They are used like this:
+ * - If the voltage on a rail is above the "1.8" voltage (1.98V) we'll tell the
+ * SoC we're at 3.3.
+ * - If the voltage on a rail is above the "3.3" voltage (3.6V) we'll consider
+ * that to be an error.
+ */
+#define MAX_VOLTAGE_1_8198
+#define MAX_VOLTAGE_3_3360
+
+#define RK3568_PMU_GRF_IO_VSEL00x0140
+#define RK3568_PMU_GRF_IO_VSEL10x0144
+#define RK3568_PMU_GRF_IO_VSEL20x0148
+
+struct rockchip_iodomain_soc_data {
+ int grf_offset;
+ const char *supply_names[MAX_SUPPLIES];
+ int (*write)(struct regmap *grf, int idx, int uV);
+};
+
+static int rk3568_iodomain_write(struct regmap *grf, int idx, int uV)
+{
+ u32 is_3v3 = uV > MAX_VOLTAGE_1_8;
+ u32 val0, val1;
+ int b;
+
+ switch (idx) {
+ case 0: /* pmuio1 */
+ break;
+ case 1: /* pmuio2 */
+ b = idx;
+ val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
+ b = idx + 4;
+ val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
+
+ regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val0);
+ regmap_write(grf, RK3568_PMU_GRF_IO_VSEL2, val1);
+ break;
+ case 3: /* vccio2 */
+ break;
+ case 2: /* vccio1 */
+ case 4: /* vccio3 */
+ case 5: /* vccio4 */
+ case 6: /* vccio5 */
+ case 7: /* vccio6 */
+ case 8: /* vccio7 */
+ b = idx - 1;
+ val0 = BIT(16 + b) | (is_3v3 ? 0 : BIT(b));
+ val1 = BIT(16 + b) | (is_3v3 ? BIT(b) : 0);
+
+ regmap_write(grf, RK3568_PMU_GRF_IO_VSEL0, val0);
+ regmap_write(grf, RK3568_PMU_GRF_IO_VSEL1, val1);
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static const struct rockchip_iodomain_soc_dat
Re: [PATCH v2 3/5] regulator: rk8xx: Return correct voltage for switchout converters
On 2023/8/22 06:30, Jonas Karlman wrote:
From: shengfei Xu
The voltage value for switchout converters is always reported as 0 uV.
When the switch is enabled, it's voltage is same as input supply.
Fix this by implementing get_value for switchout converters.
Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic")
Signed-off-by: shengfei Xu
[jo...@kwiboo.se: fix checkpatch error, update commit message]
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- New patch
drivers/power/regulator/rk8xx.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index 9444daa85c19..e80bd6c37230 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -1032,6 +1032,25 @@ static int switch_get_suspend_enable(struct udevice *dev)
*/
static int switch_get_value(struct udevice *dev)
{
+ static const char * const supply_name_rk809[] = {
+ "vcc9-supply",
+ "vcc8-supply",
+ };
+ struct rk8xx_priv *priv = dev_get_priv(dev->parent);
+ struct udevice *supply;
+ int id = dev->driver_data - 1;
+
+ if (!switch_get_enable(dev))
+ return 0;
+
+ if (priv->variant == RK809_ID) {
+ if (!uclass_get_device_by_phandle(UCLASS_REGULATOR,
+ dev->parent,
+ supply_name_rk809[id],
+ &supply))
+ return regulator_get_value(supply);
+ }
+
return 0;
}
Re: [PATCH v2 2/5] regulator: rk8xx: Return correct voltage for buck converters
On 2023/8/22 06:30, Jonas Karlman wrote:
From: Joseph Chen
Information from the first range group is always used to calculate the
voltage returned for buck converters. This may result in wrong voltage
reported back to the regulator_get_value caller.
Traverse all the possible BUCK ranges to fix this issue.
Fixes: addd062beacc ("power: pmic: rk816: support rk816 pmic")
Fixes: b62280745e55 ("power: pmic: rk805: support rk805 pmic")
Fixes: b4a35574b38d ("power: pmic: rk817: support rk817 pmic")
Fixes: ee30068fa574 ("power: pmic: rk809: support rk809 pmic")
Signed-off-by: Joseph Chen
[jo...@kwiboo.se: fix checkpatch error, simplify buck get_value, update commit
message]
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- Simplify locating correct rk8xx_reg_info
- Update max_sel to include range up to and including vsel_mask
- Drop range_num
- Collect r-b tag
drivers/power/regulator/rk8xx.c | 76 +
1 file changed, 40 insertions(+), 36 deletions(-)
diff --git a/drivers/power/regulator/rk8xx.c b/drivers/power/regulator/rk8xx.c
index e95640a39b0a..9444daa85c19 100644
--- a/drivers/power/regulator/rk8xx.c
+++ b/drivers/power/regulator/rk8xx.c
@@ -88,62 +88,63 @@ struct rk8xx_reg_info {
u8 config_reg;
u8 vsel_mask;
u8 min_sel;
+ u8 max_sel;
};
static const struct rk8xx_reg_info rk808_buck[] = {
- { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, },
- { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, },
- { 712500, 12500, NA,NA,
REG_BUCK3_CONFIG, RK808_BUCK_VSEL_MASK, },
- { 180, 10, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL,
REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, },
+ { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f },
+ { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK808_BUCK_VSEL_MASK, 0x00, 0x3f },
+ { NA, NA,NA, NA,
REG_BUCK3_CONFIG,NA, NA, NA },
+ { 180, 10, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL,
REG_BUCK4_CONFIG, RK808_BUCK4_VSEL_MASK, 0x00, 0x0f },
};
static const struct rk8xx_reg_info rk816_buck[] = {
/* buck 1 */
- { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
- { 180, 20, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
- { 230, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
+ { 712500, 12500, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b },
+ { 180, 20, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e },
+ { 230, 0, REG_BUCK1_ON_VSEL, REG_BUCK1_SLP_VSEL,
REG_BUCK1_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f },
/* buck 2 */
- { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, },
- { 180, 20, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, },
- { 230, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, },
+ { 712500, 12500, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x00, 0x3b },
+ { 180, 20, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3c, 0x3e },
+ { 230, 0, REG_BUCK2_ON_VSEL, REG_BUCK2_SLP_VSEL,
REG_BUCK2_CONFIG, RK818_BUCK_VSEL_MASK, 0x3f, 0x3f },
/* buck 3 */
- { 712500, 12500, NA,NA,
REG_BUCK3_CONFIG, RK818_BUCK_VSEL_MASK, },
+ { NA, NA,NA, NA,
REG_BUCK3_CONFIG,NA, NA, NA },
/* buck 4 */
- { 80, 10, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL,
REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, },
+ { 80, 10, REG_BUCK4_ON_VSEL, REG_BUCK4_SLP_VSEL,
REG_BUCK4_CONFIG, RK818_BUCK4_VSEL_MASK, 0x00, 0x1f },
};
static const struct rk8xx_reg_info rk809_buck5[] = {
/* buck 5 */
- { 150, 0, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA,
RK809_BUCK5_VSEL_MASK, 0x00, },
- { 180, 20, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA,
RK809_BUCK5_VSEL_MASK, 0x01, },
- { 280, 20, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA,
RK809_BUCK5_VSEL_MASK, 0x04, },
- { 330, 30, RK809_BUCK5_CONFIG(0), RK809_BUCK5_CONFIG(1), NA,
RK809_BUCK5_VSEL_MASK, 0x06, },
+ { 150, 0, RK809_BUCK5_CONFIG(0), RK809_B
Re: [PATCH v2 1/5] power: regulator: Only run autoset once for each regulator
On 2023/8/22 06:30, Jonas Karlman wrote:
With the commit 4fcba5d556b4 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.
Calling regulator_autoset multiple times on a fixed regulator increase
the enable count for each call, resulting in an unbalanced enable count.
Introduce a AUTOSET_DONE flag and use it to mark that autoset has run
for the regulator. Return -EALREADY on any subsequent call to autoset.
This fixes so that the enable count is only ever increased by one per
regulator for autoset.
Fixes: 4fcba5d556b4 ("regulator: implement basic reference counter")
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Cc: Svyatoslav Ryhel
---
v2:
- No change
drivers/power/regulator/regulator-uclass.c | 18 ++
include/power/regulator.h | 1 +
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/power/regulator/regulator-uclass.c
b/drivers/power/regulator/regulator-uclass.c
index 3a6ba69f6d5f..77d101f262e2 100644
--- a/drivers/power/regulator/regulator-uclass.c
+++ b/drivers/power/regulator/regulator-uclass.c
@@ -293,6 +293,9 @@ int regulator_autoset(struct udevice *dev)
uc_pdata = dev_get_uclass_plat(dev);
+ if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_DONE)
+ return -EALREADY;
+
ret = regulator_set_suspend_enable(dev, uc_pdata->suspend_on);
if (ret == -ENOSYS)
ret = 0;
@@ -306,11 +309,15 @@ int regulator_autoset(struct udevice *dev)
return ret;
}
- if (!uc_pdata->always_on && !uc_pdata->boot_on)
- return -EMEDIUMTYPE;
+ if (!uc_pdata->always_on && !uc_pdata->boot_on) {
+ ret = -EMEDIUMTYPE;
+ goto out;
+ }
- if (uc_pdata->type == REGULATOR_TYPE_FIXED)
- return regulator_set_enable(dev, true);
+ if (uc_pdata->type == REGULATOR_TYPE_FIXED) {
+ ret = regulator_set_enable(dev, true);
+ goto out;
+ }
if (uc_pdata->flags & REGULATOR_FLAG_AUTOSET_UV)
ret = regulator_set_value(dev, uc_pdata->min_uV);
@@ -322,6 +329,9 @@ int regulator_autoset(struct udevice *dev)
if (!ret)
ret = regulator_set_enable(dev, true);
+out:
+ uc_pdata->flags |= REGULATOR_FLAG_AUTOSET_DONE;
+
return ret;
}
diff --git a/include/power/regulator.h b/include/power/regulator.h
index ff1bfc2435ae..200652cb3d7a 100644
--- a/include/power/regulator.h
+++ b/include/power/regulator.h
@@ -134,6 +134,7 @@ struct dm_regulator_mode {
enum regulator_flag {
REGULATOR_FLAG_AUTOSET_UV = 1 << 0,
REGULATOR_FLAG_AUTOSET_UA = 1 << 1,
+ REGULATOR_FLAG_AUTOSET_DONE = 1 << 2,
};
/**
Re: [PATCH v2 7/7] rockchip: rk3568-radxa-e25: Enable pcie3x1 node
On 2023/8/3 03:04, Jonas Karlman wrote:
Enable mini PCIe slot, pcie3x1 node, now that the PCIe PHY driver
support bifurcation.
A pinctrl is assigned for reset-gpios or the device may freeze running
pci enum and nothing is connected to the mini PCIe slot.
Also drop the AHCI_PCI Kconfig option as this option is not required for
a functional M.2 SATA drive slot.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- No change
arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 11 +--
configs/radxa-e25-rk3568_defconfig| 1 -
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
index 572bdc5665b1..1136f0bb3b81 100644
--- a/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
+++ b/arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi
@@ -8,9 +8,16 @@
};
};
-/* PCIe PHY driver in U-Boot does not support bifurcation */
&pcie3x1 {
- status = "disabled";
+ pinctrl-0 = <&pcie30x1_reset_h>;
+};
+
+&pinctrl {
+ pcie {
+ pcie30x1_reset_h: pcie30x1-reset-h {
+ rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&sdhci {
diff --git a/configs/radxa-e25-rk3568_defconfig
b/configs/radxa-e25-rk3568_defconfig
index a905100a794d..2dfff6af3bd1 100644
--- a/configs/radxa-e25-rk3568_defconfig
+++ b/configs/radxa-e25-rk3568_defconfig
@@ -54,7 +54,6 @@ CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent
assigned-clocks assigne
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_SPL_REGMAP=y
CONFIG_SPL_SYSCON=y
-CONFIG_AHCI_PCI=y
CONFIG_DWC_AHCI=y
CONFIG_SPL_CLK=y
CONFIG_ROCKCHIP_GPIO=y
Re: [PATCH v2 6/7] phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588
On 2023/8/3 03:04, Jonas Karlman wrote:
Route signal from comb PHY instead of PCIe3 PHY to PCIe1l0 and PCIe1l1.
Fixes use of pcie2x1l0 on ROCK 5B.
Code imported from mainline linux driver.
Fixes: c5b4a012bca8 ("phy: rockchip: naneng-combphy: Support rk3588")
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- New patch
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
index d5408ccac976..9ca66bf8db92 100644
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -61,6 +61,8 @@ struct rockchip_combphy_grfcfg {
struct combphy_reg pipe_con1_for_sata;
struct combphy_reg pipe_sgmii_mac_sel;
struct combphy_reg pipe_xpcs_phy_ready;
+ struct combphy_reg pipe_pcie1l0_sel;
+ struct combphy_reg pipe_pcie1l1_sel;
struct combphy_reg u3otg0_port_en;
struct combphy_reg u3otg1_port_en;
};
@@ -435,6 +437,8 @@ static int rk3588_combphy_cfg(struct rockchip_combphy_priv
*priv)
param_write(priv->phy_grf, &cfg->con1_for_pcie, true);
param_write(priv->phy_grf, &cfg->con2_for_pcie, true);
param_write(priv->phy_grf, &cfg->con3_for_pcie, true);
+ param_write(priv->pipe_grf, &cfg->pipe_pcie1l0_sel, true);
+ param_write(priv->pipe_grf, &cfg->pipe_pcie1l1_sel, true);
break;
case PHY_TYPE_USB3:
param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false);
@@ -507,6 +511,8 @@ static const struct rockchip_combphy_grfcfg
rk3588_combphy_grfcfgs = {
/* pipe-grf */
.pipe_con0_for_sata = { 0x, 11, 5, 0x00, 0x22 },
.pipe_con1_for_sata = { 0x, 2, 0, 0x00, 0x2 },
+ .pipe_pcie1l0_sel = { 0x0100, 0, 0, 0x01, 0x0 },
+ .pipe_pcie1l1_sel = { 0x0100, 1, 1, 0x01, 0x0 },
};
static const struct rockchip_combphy_cfg rk3588_combphy_cfgs = {
Re: [PATCH v2 5/7] phy: rockchip: snps-pcie3: Add support for RK3588
On 2023/8/3 03:04, Jonas Karlman wrote:
Add support for the RK3588 variant to the driver.
Code imported almost 1:1 from mainline linux driver.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- No change
.../phy/rockchip/phy-rockchip-snps-pcie3.c| 85 +++
1 file changed, 85 insertions(+)
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
index 642819b1f672..a4392daf4c92 100644
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -27,6 +27,17 @@
#define RK3568_BIFURCATION_LANE_0_1 BIT(0)
+/* Register for RK3588 */
+#define PHP_GRF_PCIESEL_CON0x100
+#define RK3588_PCIE3PHY_GRF_CMN_CON0 0x0
+#define RK3588_PCIE3PHY_GRF_PHY0_STATUS1 0x904
+#define RK3588_PCIE3PHY_GRF_PHY1_STATUS1 0xa04
+#define RK3588_SRAM_INIT_DONE(reg) (reg & BIT(0))
+
+#define RK3588_BIFURCATION_LANE_0_1BIT(0)
+#define RK3588_BIFURCATION_LANE_2_3BIT(1)
+#define RK3588_LANE_AGGREGATIONBIT(2)
+
/**
* struct rockchip_p3phy_priv - RK DW PCIe PHY state
*
@@ -40,6 +51,7 @@
struct rockchip_p3phy_priv {
void __iomem *mmio;
struct regmap *phy_grf;
+ struct regmap *pipe_grf;
struct reset_ctl p30phy;
struct clk_bulk clks;
int num_lanes;
@@ -93,6 +105,66 @@ static const struct rockchip_p3phy_ops rk3568_ops = {
.phy_init = rockchip_p3phy_rk3568_init,
};
+static int rockchip_p3phy_rk3588_init(struct phy *phy)
+{
+ struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
+ u32 reg = 0;
+ u8 mode = 0;
+ int ret;
+
+ /* Deassert PCIe PMA output clamp mode */
+ regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0,
+BIT(8) | BIT(24));
+
+ /* Set bifurcation if needed */
+ for (int i = 0; i < priv->num_lanes; i++) {
+ if (!priv->lanes[i])
+ mode |= (BIT(i) << 3);
+
+ if (priv->lanes[i] > 1)
+ mode |= (BIT(i) >> 1);
+ }
+
+ if (!mode) {
+ reg = RK3588_LANE_AGGREGATION;
+ } else {
+ if (mode & (BIT(0) | BIT(1)))
+ reg |= RK3588_BIFURCATION_LANE_0_1;
+
+ if (mode & (BIT(2) | BIT(3)))
+ reg |= RK3588_BIFURCATION_LANE_2_3;
+ }
+
+ regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0,
+(0x7 << 16) | reg);
+
+ /* Set pcie1ln_sel in PHP_GRF_PCIESEL_CON */
+ reg = (mode & (BIT(6) | BIT(7))) >> 6;
+ if (reg)
+ regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON,
+(reg << 16) | reg);
+
+ reset_deassert(&priv->p30phy);
+ udelay(1);
+
+ ret = regmap_read_poll_timeout(priv->phy_grf,
+ RK3588_PCIE3PHY_GRF_PHY0_STATUS1,
+ reg, RK3588_SRAM_INIT_DONE(reg),
+ 0, 500);
+ ret |= regmap_read_poll_timeout(priv->phy_grf,
+ RK3588_PCIE3PHY_GRF_PHY1_STATUS1,
+ reg, RK3588_SRAM_INIT_DONE(reg),
+ 0, 500);
+ if (ret)
+ dev_err(phy->dev, "lock failed 0x%x\n", reg);
+
+ return ret;
+}
+
+static const struct rockchip_p3phy_ops rk3588_ops = {
+ .phy_init = rockchip_p3phy_rk3588_init,
+};
+
static int rochchip_p3phy_init(struct phy *phy)
{
struct rockchip_p3phy_ops *ops =
@@ -139,6 +211,15 @@ static int rockchip_p3phy_probe(struct udevice *dev)
return PTR_ERR(priv->phy_grf);
}
+ if (device_is_compatible(dev, "rockchip,rk3588-pcie3-phy")) {
+ priv->pipe_grf =
+ syscon_regmap_lookup_by_phandle(dev,
"rockchip,pipe-grf");
+ if (IS_ERR(priv->pipe_grf)) {
+ dev_err(dev, "failed to find rockchip,pipe_grf
regmap\n");
+ return PTR_ERR(priv->pipe_grf);
+ }
+ }
+
ret = dev_read_size(dev, "data-lanes");
if (ret > 0) {
priv->num_lanes = ret / sizeof(u32);
@@ -181,6 +262,10 @@ static const struct udevice_id rockchip_p3phy_of_match[] =
{
.compatible = "rockchip,rk3568-pcie3-phy",
.data = (ulong)&rk3568_ops,
},
+ {
+ .compatible = "rockchip,rk3588-pcie3-phy",
+ .data = (ulong)&rk3588_ops,
+ },
{ },
};
Re: [PATCH v2 4/7] phy: rockchip: snps-pcie3: Add bifurcation support for RK3568
On 2023/8/3 03:04, Jonas Karlman wrote:
Configure aggregation or bifurcation mode on RK3568 based on the value
of data-lanes property.
Code imported almost 1:1 from mainline linux driver.
Fixes: 6ec62b6ca698 ("phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY")
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- Add fixes tag
.../phy/rockchip/phy-rockchip-snps-pcie3.c| 65 +--
1 file changed, 59 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
index b76b5386bef0..642819b1f672 100644
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -16,9 +16,16 @@
#include
#include
-#define GRF_PCIE30PHY_CON1 0x4
-#define GRF_PCIE30PHY_CON6 0x18
-#define GRF_PCIE30PHY_CON9 0x24
+/* Register for RK3568 */
+#define GRF_PCIE30PHY_CON1 0x4
+#define GRF_PCIE30PHY_CON6 0x18
+#define GRF_PCIE30PHY_CON9 0x24
+#define GRF_PCIE30PHY_DA_OCM (BIT(15) | BIT(31))
+#define GRF_PCIE30PHY_STATUS0 0x80
+#define GRF_PCIE30PHY_WR_EN(0xf << 16)
+#define SRAM_INIT_DONE(reg)(reg & BIT(14))
+
+#define RK3568_BIFURCATION_LANE_0_1BIT(0)
/**
* struct rockchip_p3phy_priv - RK DW PCIe PHY state
@@ -27,12 +34,16 @@
* @phy_grf: The regmap for controlling pipe signal
* @p30phy: The reset signal for PHY
* @clks: The clocks for PHY
+ * @num_lanes: The number of lane to controller mappings
+ * @lanes: The lane to controller mapping
*/
struct rockchip_p3phy_priv {
void __iomem *mmio;
struct regmap *phy_grf;
struct reset_ctl p30phy;
struct clk_bulk clks;
+ int num_lanes;
+ u32 lanes[4];
};
struct rockchip_p3phy_ops {
@@ -42,15 +53,40 @@ struct rockchip_p3phy_ops {
static int rockchip_p3phy_rk3568_init(struct phy *phy)
{
struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
+ bool bifurcation = false;
+ int ret;
+ u32 reg;
/* Deassert PCIe PMA output clamp mode */
- regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
-(0x1 << 15) | (0x1 << 31));
+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, GRF_PCIE30PHY_DA_OCM);
+
+ for (int i = 0; i < priv->num_lanes; i++) {
+ if (priv->lanes[i] > 1)
+ bifurcation = true;
+ }
+
+ /* Set bifurcation if needed, and it doesn't care RC/EP */
+ if (bifurcation) {
+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,
+GRF_PCIE30PHY_WR_EN | RK3568_BIFURCATION_LANE_0_1);
+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1,
+GRF_PCIE30PHY_DA_OCM);
+ } else {
+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,
+GRF_PCIE30PHY_WR_EN &
~RK3568_BIFURCATION_LANE_0_1);
+ }
reset_deassert(&priv->p30phy);
udelay(1);
- return 0;
+ ret = regmap_read_poll_timeout(priv->phy_grf,
+ GRF_PCIE30PHY_STATUS0,
+ reg, SRAM_INIT_DONE(reg),
+ 0, 500);
+ if (ret)
+ dev_err(phy->dev, "lock failed 0x%x\n", reg);
+
+ return ret;
}
static const struct rockchip_p3phy_ops rk3568_ops = {
@@ -103,6 +139,23 @@ static int rockchip_p3phy_probe(struct udevice *dev)
return PTR_ERR(priv->phy_grf);
}
+ ret = dev_read_size(dev, "data-lanes");
+ if (ret > 0) {
+ priv->num_lanes = ret / sizeof(u32);
+ if (priv->num_lanes < 2 ||
+ priv->num_lanes > ARRAY_SIZE(priv->lanes)) {
+ dev_err(dev, "unsupported data-lanes property size\n");
+ return -EINVAL;
+ }
+
+ ret = dev_read_u32_array(dev, "data-lanes", priv->lanes,
+priv->num_lanes);
+ if (ret) {
+ dev_err(dev, "failed to read data-lanes property\n");
+ return ret;
+ }
+ }
+
ret = reset_get_by_name(dev, "phy", &priv->p30phy);
if (ret) {
dev_err(dev, "no phy reset control specified\n");
Re: [PATCH v2 3/7] phy: rockchip: snps-pcie3: Refactor to use a phy_init ops
On 2023/8/3 03:04, Jonas Karlman wrote:
Add a phy_init ops in preparation for upcoming support of a RK3588
variant in the driver.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- No change
.../phy/rockchip/phy-rockchip-snps-pcie3.c| 40 +++
1 file changed, 32 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
index 3053543a3329..b76b5386bef0 100644
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -35,8 +35,32 @@ struct rockchip_p3phy_priv {
struct clk_bulk clks;
};
+struct rockchip_p3phy_ops {
+ int (*phy_init)(struct phy *phy);
+};
+
+static int rockchip_p3phy_rk3568_init(struct phy *phy)
+{
+ struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
+
+ /* Deassert PCIe PMA output clamp mode */
+ regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
+(0x1 << 15) | (0x1 << 31));
+
+ reset_deassert(&priv->p30phy);
+ udelay(1);
+
+ return 0;
+}
+
+static const struct rockchip_p3phy_ops rk3568_ops = {
+ .phy_init = rockchip_p3phy_rk3568_init,
+};
+
static int rochchip_p3phy_init(struct phy *phy)
{
+ struct rockchip_p3phy_ops *ops =
+ (struct rockchip_p3phy_ops *)dev_get_driver_data(phy->dev);
struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
int ret;
@@ -47,14 +71,11 @@ static int rochchip_p3phy_init(struct phy *phy)
reset_assert(&priv->p30phy);
udelay(1);
- /* Deassert PCIe PMA output clamp mode */
- regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9,
-(0x1 << 15) | (0x1 << 31));
-
- reset_deassert(&priv->p30phy);
- udelay(1);
+ ret = ops->phy_init(phy);
+ if (ret)
+ clk_disable_bulk(&priv->clks);
- return 0;
+ return ret;
}
static int rochchip_p3phy_exit(struct phy *phy)
@@ -103,7 +124,10 @@ static struct phy_ops rochchip_p3phy_ops = {
};
static const struct udevice_id rockchip_p3phy_of_match[] = {
- { .compatible = "rockchip,rk3568-pcie3-phy" },
+ {
+ .compatible = "rockchip,rk3568-pcie3-phy",
+ .data = (ulong)&rk3568_ops,
+ },
{ },
};
Re: [PATCH v2 2/7] phy: rockchip: snps-pcie3: Refactor to use clk_bulk API
On 2023/8/3 03:04, Jonas Karlman wrote:
Change to use clk_bulk API and syscon_regmap_lookup_by_phandle to
simplify in preparation for upcoming support of a RK3588 variant.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- No change
.../phy/rockchip/phy-rockchip-snps-pcie3.c| 58 +++
1 file changed, 9 insertions(+), 49 deletions(-)
diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
index 66c75f98e6d1..3053543a3329 100644
--- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
+++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c
@@ -26,17 +26,13 @@
* @mmio: The base address of PHY internal registers
* @phy_grf: The regmap for controlling pipe signal
* @p30phy: The reset signal for PHY
- * @ref_clk_m: The reference clock of M for PHY
- * @ref_clk_n: The reference clock of N for PHY
- * @pclk: The clock for accessing PHY blocks
+ * @clks: The clocks for PHY
*/
struct rockchip_p3phy_priv {
void __iomem *mmio;
struct regmap *phy_grf;
struct reset_ctl p30phy;
- struct clk ref_clk_m;
- struct clk ref_clk_n;
- struct clk pclk;
+ struct clk_bulk clks;
};
static int rochchip_p3phy_init(struct phy *phy)
@@ -44,18 +40,10 @@ static int rochchip_p3phy_init(struct phy *phy)
struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
int ret;
- ret = clk_enable(&priv->ref_clk_m);
- if (ret < 0 && ret != -ENOSYS)
+ ret = clk_enable_bulk(&priv->clks);
+ if (ret)
return ret;
- ret = clk_enable(&priv->ref_clk_n);
- if (ret < 0 && ret != -ENOSYS)
- goto err_ref;
-
- ret = clk_enable(&priv->pclk);
- if (ret < 0 && ret != -ENOSYS)
- goto err_pclk;
-
reset_assert(&priv->p30phy);
udelay(1);
@@ -67,21 +55,13 @@ static int rochchip_p3phy_init(struct phy *phy)
udelay(1);
return 0;
-err_pclk:
- clk_disable(&priv->ref_clk_n);
-err_ref:
- clk_disable(&priv->ref_clk_m);
-
- return ret;
}
static int rochchip_p3phy_exit(struct phy *phy)
{
struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev);
- clk_disable(&priv->ref_clk_m);
- clk_disable(&priv->ref_clk_n);
- clk_disable(&priv->pclk);
+ clk_disable_bulk(&priv->clks);
reset_assert(&priv->p30phy);
return 0;
@@ -90,21 +70,13 @@ static int rochchip_p3phy_exit(struct phy *phy)
static int rockchip_p3phy_probe(struct udevice *dev)
{
struct rockchip_p3phy_priv *priv = dev_get_priv(dev);
- struct udevice *syscon;
int ret;
priv->mmio = dev_read_addr_ptr(dev);
if (!priv->mmio)
return -EINVAL;
- ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev,
- "rockchip,phy-grf", &syscon);
- if (ret) {
- pr_err("unable to find syscon device for rockchip,phy-grf\n");
- return ret;
- }
-
- priv->phy_grf = syscon_get_regmap(syscon);
+ priv->phy_grf = syscon_regmap_lookup_by_phandle(dev,
"rockchip,phy-grf");
if (IS_ERR(priv->phy_grf)) {
dev_err(dev, "failed to find rockchip,phy_grf regmap\n");
return PTR_ERR(priv->phy_grf);
@@ -116,22 +88,10 @@ static int rockchip_p3phy_probe(struct udevice *dev)
return ret;
}
- ret = clk_get_by_name(dev, "refclk_m", &priv->ref_clk_m);
+ ret = clk_get_bulk(dev, &priv->clks);
if (ret) {
- dev_err(dev, "failed to find ref clock M\n");
- return PTR_ERR(&priv->ref_clk_m);
- }
-
- ret = clk_get_by_name(dev, "refclk_n", &priv->ref_clk_n);
- if (ret) {
- dev_err(dev, "failed to find ref clock N\n");
- return PTR_ERR(&priv->ref_clk_n);
- }
-
- ret = clk_get_by_name(dev, "pclk", &priv->pclk);
- if (ret) {
- dev_err(dev, "failed to find pclk\n");
- return PTR_ERR(&priv->pclk);
+ dev_err(dev, "failed to get clocks\n");
+ return ret;
}
return 0;
Re: [PATCH 1/1] riscv: enable CONFIG_DEBUG_UART by default
Hi Heinrich,
On Tue, Sep 26, 2023 at 10:38:48AM +0200, Heinrich Schuchardt wrote:
> On 9/26/23 09:53, Leo Liang wrote:
> > Hi Heinrich,
> >
> > On Sat, Sep 23, 2023 at 01:35:26AM +0200, Heinrich Schuchardt wrote:
> > > Most boards don't enable the pre-console buffer. So we will not see any
> > > early messages. OpenSBI 1.3 provides us with the debug console extension
> > > that can fill this gap.
> > >
> > > For S-Mode U-Boot enable CONFIG_DEBUG_UART by default.
> > >
> > > Signed-off-by: Heinrich Schuchardt
> > > ---
> > > arch/riscv/Kconfig | 1 +
> > > 1 file changed, 1 insertion(+)
> > >
> > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > > index 1c62c2345b..06fae7ebe8 100644
> > > --- a/arch/riscv/Kconfig
> > > +++ b/arch/riscv/Kconfig
> > > @@ -141,6 +141,7 @@ config RISCV_MMODE
> > > config RISCV_SMODE
> > > bool "Supervisor"
> > > + imply DEBUG_UART
> >
> > This patch will cause the following compilation warnings.
> > Could you take a look at them ?
> >
> > It seems that some configuration values will not be set
> > if we imply DEBUG_UART.
> >
> > u-boot$ make qemu-riscv64_spl_defconfig
> >HOSTCC scripts/basic/fixdep
> >HOSTCC scripts/kconfig/conf.o
> >YACCscripts/kconfig/zconf.tab.c
> >LEX scripts/kconfig/zconf.lex.c
> >HOSTCC scripts/kconfig/zconf.tab.o
> >HOSTLD scripts/kconfig/conf
> > #
> > # configuration written to .config
> > #
> >
>
> Hello Leo,
>
> thanks for testing.
>
> > u-boot$ make ARCH_FLAGS="-march=rv64imafdc" -j`nproc`
>
> This does not work with a current gcc.
> arch/riscv/lib/cache.c:12: Error: unrecognized opcode `fence.i', extension
> `zifencei' required
>
> > scripts/kconfig/conf --syncconfig Kconfig
> > .config:78:warning: symbol value '' invalid for DEBUG_UART_BASE
>
> Please, observe:
>
> origin/next lacks these patches
>
> d14222e7c152 ("risc-v: implement DBCN write byte")
> dfe08374943c ("risc-v: implement DBCN based debug console")
>
> You must add these when testing the current patch.
>
> On Ubuntu 23.10 I have been running
>
> export CROSS_COMPILE=riscv64-linux-gnu-
> make clean
> make qemu-riscv64_spl_defconfig
> make -j8
>
> for origin/master and the current patch. I did not see any warning.
>
> Same for origin/next and all three patches applied.
>
> We have
>
> config DEBUG_UART_BASE
> hex "Base address of UART"
> depends on DEBUG_UART
> default 0 if DEBUG_SBI_CONSOLE
>
> since 41f7be73344.
>
> I don't see any issues in
> https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/17882
> (origin/master + this patch).
>
> Best regards
>
> Heinrich
Totally Got it! Thanks for the detailed explanation!
Best regards,
Leo
>
> > .config:79:warning: symbol value '' invalid for DEBUG_UART_CLOCK
> > .config:1347:warning: symbol value '' invalid for SPL_DEBUG_UART_BASE
> > ...
> >
> > Best regards,
> > Leo
> >
> > > help
> > > Choose this option to build U-Boot for RISC-V S-Mode.
> > > --
> > > 2.40.1
> > >
>
Re: [PATCH v2 1/7] pci: pcie_dw_rockchip: Configure number of lanes and link width speed
On 2023/8/3 03:04, Jonas Karlman wrote:
Set number of lanes and link width speed control register based on the
num-lanes property.
Code imported almost 1:1 from dw_pcie_setup in mainline linux.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- No change
drivers/pci/pcie_dw_rockchip.c | 58 +-
1 file changed, 50 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/pcie_dw_rockchip.c b/drivers/pci/pcie_dw_rockchip.c
index 1a35fae5c3a8..bc4635f67136 100644
--- a/drivers/pci/pcie_dw_rockchip.c
+++ b/drivers/pci/pcie_dw_rockchip.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -43,6 +44,7 @@ struct rk_pcie {
struct reset_ctl_bulk rsts;
struct gpio_descrst_gpio;
u32 gen;
+ u32 num_lanes;
};
/* Parameters for the waiting for iATU enabled routine */
@@ -152,12 +154,13 @@ static inline void rk_pcie_writel_apb(struct rk_pcie
*rk_pcie, u32 reg,
* rk_pcie_configure() - Configure link capabilities and speed
*
* @rk_pcie: Pointer to the PCI controller state
- * @cap_speed: The capabilities and speed to configure
*
* Configure the link capabilities and speed in the PCIe root complex.
*/
-static void rk_pcie_configure(struct rk_pcie *pci, u32 cap_speed)
+static void rk_pcie_configure(struct rk_pcie *pci)
{
+ u32 val;
+
dw_pcie_dbi_write_enable(&pci->dw, true);
/* Disable BAR 0 and BAR 1 */
@@ -167,11 +170,49 @@ static void rk_pcie_configure(struct rk_pcie *pci, u32
cap_speed)
PCI_BASE_ADDRESS_1);
clrsetbits_le32(pci->dw.dbi_base + PCIE_LINK_CAPABILITY,
- TARGET_LINK_SPEED_MASK, cap_speed);
+ TARGET_LINK_SPEED_MASK, pci->gen);
clrsetbits_le32(pci->dw.dbi_base + PCIE_LINK_CTL_2,
- TARGET_LINK_SPEED_MASK, cap_speed);
+ TARGET_LINK_SPEED_MASK, pci->gen);
+
+ /* Set the number of lanes */
+ val = readl(pci->dw.dbi_base + PCIE_PORT_LINK_CONTROL);
+ val &= ~PORT_LINK_FAST_LINK_MODE;
+ val |= PORT_LINK_DLL_LINK_EN;
+ val &= ~PORT_LINK_MODE_MASK;
+ switch (pci->num_lanes) {
+ case 1:
+ val |= PORT_LINK_MODE_1_LANES;
+ break;
+ case 2:
+ val |= PORT_LINK_MODE_2_LANES;
+ break;
+ case 4:
+ val |= PORT_LINK_MODE_4_LANES;
+ break;
+ default:
+ dev_err(pci->dw.dev, "num-lanes %u: invalid value\n",
pci->num_lanes);
+ goto out;
+ }
+ writel(val, pci->dw.dbi_base + PCIE_PORT_LINK_CONTROL);
+
+ /* Set link width speed control register */
+ val = readl(pci->dw.dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL);
+ val &= ~PORT_LOGIC_LINK_WIDTH_MASK;
+ switch (pci->num_lanes) {
+ case 1:
+ val |= PORT_LOGIC_LINK_WIDTH_1_LANES;
+ break;
+ case 2:
+ val |= PORT_LOGIC_LINK_WIDTH_2_LANES;
+ break;
+ case 4:
+ val |= PORT_LOGIC_LINK_WIDTH_4_LANES;
+ break;
+ }
+ writel(val, pci->dw.dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL);
+out:
dw_pcie_dbi_write_enable(&pci->dw, false);
}
@@ -231,11 +272,10 @@ static int is_link_up(struct rk_pcie *priv)
* rk_pcie_link_up() - Wait for the link to come up
*
* @rk_pcie: Pointer to the PCI controller state
- * @cap_speed: Desired link speed
*
* Return: 1 (true) for active line and negetive (false) for no link (timeout)
*/
-static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
+static int rk_pcie_link_up(struct rk_pcie *priv)
{
int retries;
@@ -245,7 +285,7 @@ static int rk_pcie_link_up(struct rk_pcie *priv, u32 cap_speed)
}
/* DW pre link configurations */
- rk_pcie_configure(priv, cap_speed);
+ rk_pcie_configure(priv);
rk_pcie_disable_ltssm(priv);
rk_pcie_link_status_clear(priv);
@@ -341,7 +381,7 @@ static int rockchip_pcie_init_port(struct udevice *dev)
rk_pcie_writel_apb(priv, 0x0, 0xf00040);
pcie_dw_setup_host(&priv->dw);
- ret = rk_pcie_link_up(priv, priv->gen);
+ ret = rk_pcie_link_up(priv);
if (ret < 0)
goto err_link_up;
@@ -419,6 +459,8 @@ static int rockchip_pcie_parse_dt(struct udevice *dev)
priv->gen = dev_read_u32_default(dev, "max-link-speed",
LINK_SPEED_GEN_3);
+ priv->num_lanes = dev_read_u32_default(dev, "num-lanes", 1);
+
return 0;
rockchip_pcie_parse_dt_err_phy_get_by_index:
Re: [PATCH v5] board: rockchip: Add Bananapi R2Pro Board
On 2023/9/21 02:40, Frank Wunderlich wrote:
From: Frank Wunderlich
Add Bananapi R2 Pro board.
tested:
- sdcard
- both front usb-ports
- sata
- wan-port
lan-ports are connected to mt7531 switch where driver needs to be
separated from mtk ethernet-driver.
Signed-off-by: Frank Wunderlich
Reviewed-by: Kever Yang
Thanks,
- Kever
---
because iodomain is different to evb and now iodomain driver is sent as
patch we need to separate between EVB and R2Pro else board can be bricked.
ethernet support depends on these series from jonas:
rockchip: Port IO-domain driver for RK3568 from linux
https://patchwork.ozlabs.org/project/uboot/cover/20230821223020.3918620-1-jo...@kwiboo.se/
and
rockchip: Add GMAC support for RK3568 and RK3588
https://patchwork.ozlabs.org/project/uboot/cover/20230807000817.1701012-1-jo...@kwiboo.se/
---
v5:
- add line break in description
- reorder in makefile
- drop special dts-handling
(deletion of switchnode, disable of usb and gmac0)
- add MAINTAINERS entry
- changes to defconfig suggested by jonas
- remove "pinctrl-0 pinctrl-names" from CONFIG_OF_SPL_REMOVE_PROPS
- add CONFIG_SPL_DM_SEQ_ALIAS=y
- add CONFIG_SPL_PINCTRL=y
- remove CONFIG_USB_UHCI_HCD
- enable EFI_LOADER (defaults to y)
- drop CONFIG_SYSRESET_PSCI (reset works without)
v4:
- add r2pro board to readme
- update r2pro dts to linux version
- remove switch node from linux dts
- disable gmac0 because switch driver does not work yet
to solve timeout error:
ethernet@fe2a Waiting for PHY auto negotiation to complete.
TIMEOUT!
phy_startup() failed: -110FAILED: -110ethernet@fe01 Waiting for PHY auto
nee
- cleanup r2pro u-boot.dtsi like jonas suggests
- update and reorder defconfig based on jonas suggestions
- dts: disable usb_host0_ohci because of error on usb-start
scanning bus usb@fd84 for devices...
ERROR: USB-error: DEVICENOTRESPONDING: Device did not respond to token (IN)
or did
not provide a handshake (OUT) (5)
unable to get device descriptor (error=-1)
- pcie is not yet working, so not adding these options
rockchip_pcie3phy phy@fe8c: lock failed 0x689
rockchip_pcie3phy phy@fe8c: PHY: Failed to init phy@fe8c: -110.
pcie_dw_rockchip pcie@fe27: failed to init phy (ret=-110)
rockchip_pcie3phy phy@fe8c: lock failed 0x689
rockchip_pcie3phy phy@fe8c: PHY: Failed to init phy@fe8c: -110.
pcie_dw_rockchip pcie@fe28: failed to init phy (ret=-110)
- emmc not tested as it is empty on my board because it breaks sdcard boot
- rename dts and defconfig (add minus sign)
- enable efi_loader in defconfig
v3:
- disable gmac0 as switch-driver is not yet ready to attach to the mac
v2:
- drop switch-node for now as u-boot driver works differently to linux
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi | 19 +
arch/arm/dts/rk3568-bpi-r2-pro.dts | 852 +
board/rockchip/evb_rk3568/MAINTAINERS | 7 +
configs/bpi-r2-pro-rk3568_defconfig| 94 +++
doc/board/rockchip/rockchip.rst| 1 +
6 files changed, 974 insertions(+)
create mode 100644 arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
create mode 100644 arch/arm/dts/rk3568-bpi-r2-pro.dts
create mode 100644 configs/bpi-r2-pro-rk3568_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157b1..016eb5556513 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -177,6 +177,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \
rk3566-soquartz-blade.dtb \
rk3566-soquartz-cm4.dtb \
rk3566-soquartz-model-a.dtb \
+ rk3568-bpi-r2-pro.dtb \
rk3568-evb.dtb \
rk3568-lubancat-2.dtb \
rk3568-nanopi-r5c.dtb \
diff --git a/arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
b/arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
new file mode 100644
index ..60a3b21f2d45
--- /dev/null
+++ b/arch/arm/dts/rk3568-bpi-r2-pro-u-boot.dtsi
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#include "rk356x-u-boot.dtsi"
+
+/ {
+ chosen {
+ stdout-path = &uart2;
+ };
+};
+
+&uart2 {
+ clock-frequency = <2400>;
+ bootph-pre-ram;
+ status = "okay";
+};
+
diff --git a/arch/arm/dts/rk3568-bpi-r2-pro.dts
b/arch/arm/dts/rk3568-bpi-r2-pro.dts
new file mode 100644
index ..f9127ddfbb7d
--- /dev/null
+++ b/arch/arm/dts/rk3568-bpi-r2-pro.dts
@@ -0,0 +1,852 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Author: Frank Wunderlich
+ *
+ */
+
+/dts-v1/;
+#include
+#include
+#include
+#include
+#include "rk3568.dtsi"
+
+/ {
+ model = "Bananapi-R2 Pro (RK3568) DDR4 Board";
+ compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568";
+
+ aliases {
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
+ mmc0 = &sdmmc0;
+
Re: [PATCH v2 0/7] rockchip: rk3568: Fix use of PCIe bifurcation
Hi Jonas, Basically these patches are feature update and should be merge and send in next MW. I have question about PCIe bifurcation, does this also merged in linux kernel? I do check the status in kernel mailing list but forget to feedback with you, I didn't see the pcie node in rk3588 dtsi. I have a little bit confuse about how the phy init for different controller: eg: if the hardware use pcie3 phy as 2lane + 1 lane + 1 lane, how to write pcie/phy dts? Thanks, - Kever On 2023/9/26 05:30, Jonas Karlman wrote: Hi Kever, It would be nice to get some feedback and plans for this and the following series :-) rockchip: rk3568: Fix use of PCIe bifurcation (this series) https://patchwork.ozlabs.org/cover/1816140/ rockchip: rk3568-nanopi-r5: Add missing PCIe options https://patchwork.ozlabs.org/cover/1816147/ rockchip: Port IO-domain driver for RK3568 from linux https://patchwork.ozlabs.org/cover/1823769/ I also plan to send a v2 with small update based on the little feedback I got on the following: rockchip: Add GMAC support for RK3568 and RK3588 https://patchwork.ozlabs.org/cover/1817469/ Regards, Jonas On 2023-08-02 21:04, Jonas Karlman wrote: This series add support for use of PCIe bifurcation on RK3568, and as a bonus support for the RK3588 PHY is also included. With PCIe bifurcation supported it is possible to enable PCIe on more RK3568 boards, e.g. on NanoPi R5C and NanoPi R5S. This series only include fixing the mini PCIe slot on Radxa E25. Most parts of this series was imported almost 1:1 from mainline linux. Patch 1 fixes configuration of number of lanes in pcie_dw_rockchip. Patch 2-3 refactor the snps-pcie3 phy driver. Patch 4 add bifurcation support for RK3568. Patch 5 add support for RK3588 to snps-pcie3 driver. Patch 6 fixes use of pcie2x1l0 on ROCK 5B. Patch 7 enables the mini PCIe slot on Radxa E25. Changes in v2: - Fix use of signal from comb PHY on RK3588 - Add fixes tag The RK3588 PHY part was tested on a ROCK 5B together with device tree files picked from Sebastian Reichel's rk3588 branch at [1]. Patches in this series is also aviliable at [2]. [1] https://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-misc.git/tree/?h=rk3588 [2] https://github.com/Kwiboo/u-boot-rockchip/commits/rk35xx-pcie-bifurcation-v2 Jonas Karlman (7): pci: pcie_dw_rockchip: Configure number of lanes and link width speed phy: rockchip: snps-pcie3: Refactor to use clk_bulk API phy: rockchip: snps-pcie3: Refactor to use a phy_init ops phy: rockchip: snps-pcie3: Add bifurcation support for RK3568 phy: rockchip: snps-pcie3: Add support for RK3588 phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588 rockchip: rk3568-radxa-e25: Enable pcie3x1 node arch/arm/dts/rk3568-radxa-e25-u-boot.dtsi | 11 +- configs/radxa-e25-rk3568_defconfig| 1 - drivers/pci/pcie_dw_rockchip.c| 58 - .../rockchip/phy-rockchip-naneng-combphy.c| 6 + .../phy/rockchip/phy-rockchip-snps-pcie3.c| 230 ++ 5 files changed, 241 insertions(+), 65 deletions(-)
Re: [PATCH] mmc: Add SPL_MMC_PWRSEQ to fix link issue when building SPL
On 2023/9/26 05:55, Jonas Karlman wrote:
With MMC_PWRSEQ enabled the following link issue may happen when
building SPL and SPL_PWRSEQ is not enabled.
aarch64-linux-gnu-ld.bfd: drivers/mmc/meson_gx_mmc.o: in function
`meson_mmc_probe':
drivers/mmc/meson_gx_mmc.c:295: undefined reference to `pwrseq_set_power'
Fix this by adding a SPL_MMC_PWRSEQ Kconfig option used to enable mmc
pwrseq support in SPL.
Also add depends on DM_GPIO to fix following link issue:
aarch64-linux-gnu-ld.bfd: drivers/mmc/mmc-pwrseq.o: in function
`mmc_pwrseq_set_power':
drivers/mmc/mmc-pwrseq.c:26: undefined reference to `gpio_request_by_name'
aarch64-linux-gnu-ld.bfd: drivers/mmc/mmc-pwrseq.c:29: undefined reference
to `dm_gpio_set_value'
aarch64-linux-gnu-ld.bfd: drivers/mmc/mmc-pwrseq.c:31: undefined reference
to `dm_gpio_set_value'
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mmc/Kconfig | 10 +-
drivers/mmc/Makefile | 2 +-
drivers/mmc/meson_gx_mmc.c| 2 +-
drivers/mmc/rockchip_dw_mmc.c | 2 +-
include/mmc.h | 4 ++--
5 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index de01b9687bad..a9931d39412d 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -20,11 +20,19 @@ config MMC_WRITE
config MMC_PWRSEQ
bool "HW reset support for eMMC"
- depends on PWRSEQ
+ depends on PWRSEQ && DM_GPIO
help
Ths select Hardware reset support aka pwrseq-emmc for eMMC
devices.
+config SPL_MMC_PWRSEQ
+ bool "HW reset support for eMMC in SPL"
+ depends on SPL_PWRSEQ && SPL_DM_GPIO
+ default y if MMC_PWRSEQ
+ help
+ Ths select Hardware reset support aka pwrseq-emmc for eMMC
+ devices in SPL.
+
config MMC_BROKEN_CD
bool "Poll for broken card detection case"
help
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 2c65c4765ab2..0a79dd058bef 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -11,7 +11,7 @@ obj-$(CONFIG_$(SPL_TPL_)BOOTSTD) += mmc_bootdev.o
endif
obj-$(CONFIG_$(SPL_TPL_)MMC_WRITE) += mmc_write.o
-obj-$(CONFIG_MMC_PWRSEQ) += mmc-pwrseq.o
+obj-$(CONFIG_$(SPL_)MMC_PWRSEQ) += mmc-pwrseq.o
obj-$(CONFIG_MMC_SDHCI_ADMA_HELPERS) += sdhci-adma.o
ifndef CONFIG_$(SPL_)BLK
diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
index fcf4f03d1e24..0825c0a2a838 100644
--- a/drivers/mmc/meson_gx_mmc.c
+++ b/drivers/mmc/meson_gx_mmc.c
@@ -288,7 +288,7 @@ static int meson_mmc_probe(struct udevice *dev)
mmc_set_clock(mmc, cfg->f_min, MMC_CLK_ENABLE);
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
/* Enable power if needed */
ret = mmc_pwrseq_get_power(dev, cfg);
if (!ret) {
diff --git a/drivers/mmc/rockchip_dw_mmc.c b/drivers/mmc/rockchip_dw_mmc.c
index 72c820ee6330..ad4529d6afa8 100644
--- a/drivers/mmc/rockchip_dw_mmc.c
+++ b/drivers/mmc/rockchip_dw_mmc.c
@@ -145,7 +145,7 @@ static int rockchip_dwmmc_probe(struct udevice *dev)
host->fifo_mode = priv->fifo_mode;
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
/* Enable power if needed */
ret = mmc_pwrseq_get_power(dev, &plat->cfg);
if (!ret) {
diff --git a/include/mmc.h b/include/mmc.h
index 1022db3ffa7c..9aef31ea5deb 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -590,7 +590,7 @@ struct mmc_config {
uint f_max;
uint b_max;
unsigned char part_type;
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
struct udevice *pwr_dev;
#endif
};
@@ -808,7 +808,7 @@ int mmc_deinit(struct mmc *mmc);
*/
int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg);
-#ifdef CONFIG_MMC_PWRSEQ
+#if CONFIG_IS_ENABLED(MMC_PWRSEQ)
/**
* mmc_pwrseq_get_power() - get a power device from device tree
*
[PATCH v12] Boot var automatic management for removable medias
From: Raymond Mao
Changes for complying to EFI spec §3.5.1.1
'Removable Media Boot Behavior'.
Boot variables can be automatically generated during a removable
media is probed. At the same time, unused boot variables will be
detected and removed.
Please note that currently the function 'efi_disk_remove' has no
ability to distinguish below two scenarios
a) Unplugging of a removable media under U-Boot
b) U-Boot exiting and booting an OS
Thus currently the boot variables management is not added into
'efi_disk_remove' to avoid boot options being added/erased
repeatedly under scenario b) during power cycles
See TODO comments under function 'efi_disk_remove' for more details
The original efi_secboot tests expect that BootOrder EFI variable
is not defined. With this commit, the BootOrder EFI variable is
automatically added when the disk is detected. The original efi_secboot
tests end up with unexpected failure.
The efi_secboot tests need to be modified to clear the BootOrder
EFI variable at the beginning of each test.
Co-developed-by: Masahisa Kojima
Signed-off-by: Masahisa Kojima
Signed-off-by: Raymond Mao
Reviewed-by: Heinrich Schuchardt
Reviewed-by: Ilias Apalodimas
---
lib/efi_loader/efi_disk.c | 18 ++
lib/efi_loader/efi_setup.c | 7 +++
test/py/tests/test_efi_secboot/test_signed.py | 9 +
.../test_efi_secboot/test_signed_intca.py | 3 +++
.../py/tests/test_efi_secboot/test_unsigned.py | 3 +++
5 files changed, 40 insertions(+)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index f0d76113b0..b808a7fe62 100644
--- a/lib/efi_loader/efi_disk.c
+++ b/lib/efi_loader/efi_disk.c
@@ -690,6 +690,13 @@ int efi_disk_probe(void *ctx, struct event *event)
return -1;
}
+ /* only do the boot option management when UEFI sub-system is
initialized */
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) && efi_obj_list_initialized
== EFI_SUCCESS) {
+ ret = efi_bootmgr_update_media_device_boot_option();
+ if (ret != EFI_SUCCESS)
+ return -1;
+ }
+
return 0;
}
@@ -742,6 +749,17 @@ int efi_disk_remove(void *ctx, struct event *event)
dev_tag_del(dev, DM_TAG_EFI);
return 0;
+
+ /*
+* TODO A flag to distinguish below 2 different scenarios of this
+* function call is needed:
+* a) Unplugging of a removable media under U-Boot
+* b) U-Boot exiting and booting an OS
+* In case of scenario a), efi_bootmgr_update_media_device_boot_option()
+* needs to be invoked here to update the boot options and remove the
+* unnecessary ones.
+*/
+
}
/**
diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
index 58d4e13402..69c8b27730 100644
--- a/lib/efi_loader/efi_setup.c
+++ b/lib/efi_loader/efi_setup.c
@@ -245,6 +245,13 @@ efi_status_t efi_init_obj_list(void)
if (ret != EFI_SUCCESS)
goto out;
+ if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) {
+ /* update boot option after variable service initialized */
+ ret = efi_bootmgr_update_media_device_boot_option();
+ if (ret != EFI_SUCCESS)
+ goto out;
+ }
+
/* Define supported languages */
ret = efi_init_platform_lang();
if (ret != EFI_SUCCESS)
diff --git a/test/py/tests/test_efi_secboot/test_signed.py
b/test/py/tests/test_efi_secboot/test_signed.py
index ca52e853d8..b77b60e223 100644
--- a/test/py/tests/test_efi_secboot/test_signed.py
+++ b/test/py/tests/test_efi_secboot/test_signed.py
@@ -28,6 +28,7 @@ class TestEfiSignedImage(object):
# Test Case 1a, run signed image if no PK
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
+'setenv -e -nv -bs -rt BootOrder',
'efidebug boot add -b 1 HELLO1 host 0:1 /helloworld.efi.signed
-s ""',
'efidebug boot next 1',
'bootefi bootmgr'])
@@ -52,6 +53,7 @@ class TestEfiSignedImage(object):
# Test Case 2a, db is not yet installed
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
+'setenv -e -nv -bs -rt BootOrder',
'fatload host 0:1 400 KEK.auth',
'setenv -e -nv -bs -rt -at -i 400:$filesize KEK',
'fatload host 0:1 400 PK.auth',
@@ -96,6 +98,7 @@ class TestEfiSignedImage(object):
# Test Case 3a, rejected by dbx
output = u_boot_console.run_command_list([
'host bind 0 %s' % disk_img,
+'setenv -e -nv -bs -rt BootOrder',
'fatload host 0:1 400 db.auth',
'setenv -e -nv -bs -rt -at -i 400:$filesize dbx',
'fatload host 0:1 400 KEK.auth',
@@ -132,6
Re: [PATCH v11] Boot var automatic management for removable medias
Hi Ilias,
On Wed, 27 Sept 2023 at 03:52, Ilias Apalodimas
wrote:
>
> On Wed, 20 Sept 2023 at 11:41, Masahisa Kojima
> wrote:
> >
> > From: Raymond Mao
> >
> > Changes for complying to EFI spec §3.5.1.1
> > 'Removable Media Boot Behavior'.
> > Boot variables can be automatically generated during a removable
> > media is probed. At the same time, unused boot variables will be
> > detected and removed.
> >
> > Please note that currently the function 'efi_disk_remove' has no
> > ability to distinguish below two scenarios
> > a) Unplugging of a removable media under U-Boot
> > b) U-Boot exiting and booting an OS
> > Thus currently the boot variables management is not added into
> > 'efi_disk_remove' to avoid boot options being added/erased
> > repeatedly under scenario b) during power cycles
> > See TODO comments under function 'efi_disk_remove' for more details
> >
> > The original efi_secboot tests expect that BootOrder EFI variable
> > is not defined. With this commit, the BootOrder EFI variable is
> > automatically added when the disk is detected. The original efi_secboot
> > tests end up with unexpected failure.
> > The efi_secboot tests need to be modified to clear the BootOrder
> > EFI variable at the beginning of each test.
> >
> > Signed-off-by: Raymond Mao
> > Signed-off-by: Masahisa Kojima
> > Reviewed-by: Heinrich Schuchardt
> > ---
> > lib/efi_loader/efi_disk.c | 18 ++
> > lib/efi_loader/efi_setup.c | 7 +++
> > test/py/tests/test_efi_secboot/test_signed.py | 9 +
> > .../test_efi_secboot/test_signed_intca.py | 3 +++
> > .../py/tests/test_efi_secboot/test_unsigned.py | 3 +++
> > 5 files changed, 40 insertions(+)
> >
> > diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> > index f0d76113b0..b808a7fe62 100644
> > --- a/lib/efi_loader/efi_disk.c
> > +++ b/lib/efi_loader/efi_disk.c
> > @@ -690,6 +690,13 @@ int efi_disk_probe(void *ctx, struct event *event)
> > return -1;
> > }
> >
> > + /* only do the boot option management when UEFI sub-system is
> > initialized */
> > + if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) &&
> > efi_obj_list_initialized == EFI_SUCCESS) {
> > + ret = efi_bootmgr_update_media_device_boot_option();
> > + if (ret != EFI_SUCCESS)
> > + return -1;
> > + }
> > +
> > return 0;
> > }
> >
> > @@ -742,6 +749,17 @@ int efi_disk_remove(void *ctx, struct event *event)
> > dev_tag_del(dev, DM_TAG_EFI);
> >
> > return 0;
> > +
> > + /*
> > +* TODO A flag to distinguish below 2 different scenarios of this
> > +* function call is needed:
> > +* a) Unplugging of a removable media under U-Boot
> > +* b) U-Boot exiting and booting an OS
> > +* In case of scenario a),
> > efi_bootmgr_update_media_device_boot_option()
> > +* needs to be invoked here to update the boot options and remove
> > the
> > +* unnecessary ones.
> > +*/
> > +
> > }
> >
> > /**
> > diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
> > index 58d4e13402..69c8b27730 100644
> > --- a/lib/efi_loader/efi_setup.c
> > +++ b/lib/efi_loader/efi_setup.c
> > @@ -245,6 +245,13 @@ efi_status_t efi_init_obj_list(void)
> > if (ret != EFI_SUCCESS)
> > goto out;
> >
> > + if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) {
> > + /* update boot option after variable service initialized */
> > + ret = efi_bootmgr_update_media_device_boot_option();
> > + if (ret != EFI_SUCCESS)
> > + goto out;
> > + }
> > +
> > /* Define supported languages */
> > ret = efi_init_platform_lang();
> > if (ret != EFI_SUCCESS)
> > diff --git a/test/py/tests/test_efi_secboot/test_signed.py
> > b/test/py/tests/test_efi_secboot/test_signed.py
> > index ca52e853d8..b77b60e223 100644
> > --- a/test/py/tests/test_efi_secboot/test_signed.py
> > +++ b/test/py/tests/test_efi_secboot/test_signed.py
> > @@ -28,6 +28,7 @@ class TestEfiSignedImage(object):
> > # Test Case 1a, run signed image if no PK
> > output = u_boot_console.run_command_list([
> > 'host bind 0 %s' % disk_img,
> > +'setenv -e -nv -bs -rt BootOrder',
> > 'efidebug boot add -b 1 HELLO1 host 0:1
> > /helloworld.efi.signed -s ""',
> > 'efidebug boot next 1',
> > 'bootefi bootmgr'])
> > @@ -52,6 +53,7 @@ class TestEfiSignedImage(object):
> > # Test Case 2a, db is not yet installed
> > output = u_boot_console.run_command_list([
> > 'host bind 0 %s' % disk_img,
> > +'setenv -e -nv -bs -rt BootOrder',
> > 'fatload host 0:1 400 KEK.auth',
> > 'setenv -e -nv -bs -rt -at -i 4
Re: [PATCH 09/15] blk: blkmap: Support mapping to device of any block size
Hi Tobias,
On Wed, Sep 27, 2023 at 3:29 AM Tobias Waldekranz wrote:
>
> On tis, sep 26, 2023 at 16:43, Bin Meng wrote:
> > At present if a device to map has a block size other than 512,
> > the blkmap map process just fails. There is no reason why we
> > can't just use the block size of the mapped device.
>
> Won't this be very confusing to the user?
I don't see any confusion.
>
> The blkmap device uses a fixed block size of 512:
>
> https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/block/blkmap.c?ref_type=heads#L393
Yes, the blkmap device was originally created with a fixed block size
of 512, and that's fine.
>
> So if I map a slice of a 4k device into a blkmap, then
>
> blkmap read 0x8000 0 1
>
> would copy 4k instead of 512 bytes from the lower device to 0x8000,
> even though the blkmap reports a block size of 512.
>
> It seems to me that the expected behavior would be that only the first
> 512 bytes would be copied in the command above.
No, the blkmap block size was later updated to match the real
underlying device parameter during the map process. So it will copy
all 4k to 0x8000.
>
> >
> > Signed-off-by: Bin Meng
> > ---
> >
> > drivers/block/blkmap.c | 10 +-
> > 1 file changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/block/blkmap.c b/drivers/block/blkmap.c
> > index f6acfa8927..149a4cac3e 100644
> > --- a/drivers/block/blkmap.c
> > +++ b/drivers/block/blkmap.c
> > @@ -171,11 +171,11 @@ int blkmap_map_linear(struct udevice *dev, lbaint_t
> > blknr, lbaint_t blkcnt,
> >
> > bd = dev_get_uclass_plat(bm->blk);
> > lbd = dev_get_uclass_plat(lblk);
> > - if (lbd->blksz != bd->blksz)
> > - /* We could support block size translation, but we
> > - * don't yet.
> > - */
>
> Hence this comment ^
This comment was completely removed with the new updates. There is no
need to do any block size translation. We could just use whatever
block size the lower device is using, hence this patch.
>
> > - return -EINVAL;
> > + if (lbd->blksz != bd->blksz) {
> > + /* update to match the mapped device */
> > + bd->blksz = lbd->blksz;
> > + bd->log2blksz = LOG2(bd->blksz);
> > + }
> >
> > linear = malloc(sizeof(*linear));
> > if (!linear)
> > --
Regards,
Bin
OF: fdt: Ignoring memory range 0x40000000 - 0x80000000
Hello. The project that I've been working on since 2 years is to enable KVM (with the support of libvirt and virt-manager) on a recent version of Linux and of its kernel on the old but still nice ARM Chromebook model xe303c12. My goal is to virtualize FreeBSD 13.2 for armV7. I've almost completed the project. At today I'm using Ubuntu 22.04 (but it works also with Devuan 5) ; KVM is enabled ; libvirt 9.7.0 and virt-manager are working great. And I've almost been able to virtualize FreeBSD. Almost because I've found a problem that I need to fix or the whole project will die. Ubuntu recognizes only 1 GB of memory free,but the ARM Chromebook has 2 GB of memory soldered to the mobo. So,1 GB of memory has been lost during the transition from the first project I tried to enable KVM with an old kernel (and ubuntu) version,that you can find here : http://www.virtualopensystems.com/en/solutions/guides/kvm-on-chromebook/#setting-up-the-boot-medium and my project,which uses a more recent kernel version (5.4) and ubuntu version (22.04). I think that when I have recompiled the kernel,I've lost some kernel entries that are enabled on the 3.13 kernel used by the developers at the Virtual Open System. Well,I have no idea about which entries my kernel config are missing. I have checked the available memory for the OS giving the command : # free -m If I don't recover 1 GB of memory,I can't virtualize FreeBSD,because only 1 GB is a very small amount of memory to be able to run the host and the guest OS. So,can someone help me to find which kernel entries I should add to have all the 2 GB of memory available ? Virtual Open System offers it's own kernel config file,that I have saved here : https://pastebin.ubuntu.com/p/j4B54TChKD/ using their kernel config file I see that I have a total of 2 GB of memory available (I spend 400 mb to load Linux,so only 600 remains ; it's not good. In Fact I get a lot of qemu crashes), but If I use my config file the OS starts with only 1 GB. I want also share two kernel config files : 1) the kernel 3.13 dmesg log file where 2 GB is recognized,here : https://pastebin.ubuntu.com/p/gsw9SM4zY3/ 2) the kernel 5.4 dmesg log file where only 1 GB is recognized,here : https://pastebin.ubuntu.com/p/W6Mgj4jGg2/ I've compared the dmesg logs (kernel 3.13 vs kernel 5.4 config files) and I think this is the reason why I have only 1 GB of memory available : * OF: fdt: Ignoring memory range 0x4000 - 0x8000* This line is not present on the kernel 3.13 dmesg log file,but it is on the kernel 5.4 dmesg log file. The dtb file generation seems involved. What do you think ? I'm trying to understand what to do to fix this problem. Can you give me some suggestions ? thanks -- Mario.
Enable thumb on AT91?
Hi Eugen, I noticed that several AT91 boards are quite close to their SPL size limit. For example, sama5d27_wlsom1_ek_mmc is just 173 bytes short of its limit and doesn't even git with older GCCs. I looked at the datasheet for that processor, and noticed that it has thumb support. Have you considered enabling SYS_THUMB_BUILD? This shrinks SPL by around 30%. I don't have a board to test with, so I don't know if there are any technical reasons blocking this. --Sean
[PATCH v7 2/2] schemas: Add some common reserved-memory usages
It is common to split firmware into 'Platform Init', which does the
initial hardware setup and a "Payload" which selects the OS to be booted.
Thus an handover interface is required between these two pieces.
Where UEFI boot-time services are not available, but UEFI firmware is
present on either side of this interface, information about memory usage
and attributes must be presented to the "Payload" in some form.
This aims to provide an small schema addition for the memory mapping
needed to keep these two pieces working together well.
Signed-off-by: Simon Glass
---
Changes in v7:
- Rename acpi-reclaim to acpi
- Drop individual mention of when memory can be reclaimed
- Rewrite the item descriptions
- Add back the UEFI text (with trepidation)
Changes in v6:
- Drop mention of UEFI
- Use compatible strings instead of node names
Changes in v5:
- Drop the memory-map node (should have done that in v4)
- Tidy up schema a bit
Changes in v4:
- Make use of the reserved-memory node instead of creating a new one
Changes in v3:
- Reword commit message again
- cc a lot more people, from the FFI patch
- Split out the attributes into the /memory nodes
Changes in v2:
- Reword commit message
.../reserved-memory/common-reserved.yaml | 71 +++
1 file changed, 71 insertions(+)
create mode 100644 dtschema/schemas/reserved-memory/common-reserved.yaml
diff --git a/dtschema/schemas/reserved-memory/common-reserved.yaml
b/dtschema/schemas/reserved-memory/common-reserved.yaml
new file mode 100644
index 000..f7fbdfd
--- /dev/null
+++ b/dtschema/schemas/reserved-memory/common-reserved.yaml
@@ -0,0 +1,71 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reserved-memory/common-reserved.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Common memory reservations
+
+description: |
+ Specifies that the reserved memory region can be used for the purpose
+ indicated by its compatible string.
+
+ Clients may reuse this reserved memory if they understand what it is for,
+ subject to the notes below.
+
+maintainers:
+ - Simon Glass
+
+allOf:
+ - $ref: reserved-memory.yaml
+
+properties:
+ compatible:
+description: |
+ This describes some common memory reservations, with the compatible
+ string indicating what it is used for:
+
+ acpi: Advanced Configuration and Power Interface (ACPI) tables
+ acpi-nvs: ACPI Non-Volatile-Sleeping Memory (NVS). This is reserved by
+ the firmware for its use and is required to be saved and restored
+ across an NVS sleep
+ boot-code: Contains code used for booting which is not needed by the
OS
+ boot-code: Contains data used for booting which is not needed by the
OS
+ runtime-code: Contains code used for interacting with the system when
+ running the OS
+ runtime-data: Contains data used for interacting with the system when
+ running the OS
+
+enum:
+ - acpi
+ - acpi-nvs
+ - boot-code
+ - boot-data
+ - runtime-code
+ - runtime-data
+
+ reg:
+description: region of memory that is reserved for the purpose indicated
+ by the compatible string.
+
+required:
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+reserved-memory {
+#address-cells = <1>;
+#size-cells = <1>;
+
+reserved@1234 {
+compatible = "boot-code";
+reg = <0x1234 0x0080>;
+};
+
+reserved@4321 {
+compatible = "boot-data";
+reg = <0x4321 0x0080>;
+};
+};
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v7 1/2] schemas: memory: Add ECC properties
Some memories provide ECC detection and/or correction. For software which wants to check memory, it is helpful to see which regions provide this feature. Add this as a property of the /memory nodes, since it presumably follows the hardware-level memory system. Signed-off-by: Simon Glass --- Changes in v7: - Drop unnecessary | - Add a blank line between properties Changes in v6: - Use a number of bits instead of a string property - Fix inidcates typo Changes in v5: - Redo to make this property specific to ECC - Provide properties both for detection and correction Changes in v3: - Add new patch to update the /memory nodes dtschema/schemas/memory.yaml | 13 + 1 file changed, 13 insertions(+) diff --git a/dtschema/schemas/memory.yaml b/dtschema/schemas/memory.yaml index 1d74410..b3bf3c9 100644 --- a/dtschema/schemas/memory.yaml +++ b/dtschema/schemas/memory.yaml @@ -35,6 +35,19 @@ patternProperties: For the purpose of identification, each NUMA node is associated with a unique token known as a node id. + ecc-detection-bits: +default: 0 +description: | + If present, this indicates the number of bits of memory error which + can be detected and reported by the Error-Correction Code (ECC) memory + subsystem (typically 0, 1 or 2). + + ecc-correction-bits: +default: 0 +description: | + If present, this indicates the number of bits of memory error which + can be corrected by the Error-Correction Code (ECC) memory subsystem + (typically 0, 1 or 2). required: - device_type -- 2.42.0.515.g380fc7ccd1-goog
Re: bootstd: Scanning for USB bootflow will remove existing SCSI bootflow
Hi Simon, On Tue, Sep 26, 2023 at 4:37 AM Simon Glass wrote: > > Hi Tony, > > On Mon, 25 Sept 2023 at 14:02, Tony Dinh wrote: > > > > Hi Simon, > > > > Here is an observation during testing the bootflow command. > > > > If there is a SCSI bootflow, scanning for USB bootflow will remove that > > existing > > SCSI bootflow. To bring it back, I scanned for SCSI bootflow again, and it > > was > > back to normal. Perhaps there is some kind of indexing problem? > > Yes that's right. The 'botflow scan' command is not additive. The > first thing it does is removing existing bootflows. Thanks for clarifying that. I assumed it is additive, because the existing USB bootflow was not removed when I did a "bootflow scan scsi" immediately after (see the end of the log). Thanks, Tony > > > > > Please see the log below after the break. > > > > All the best, > > Tony > > > > === > > > > > > U-Boot 2023.10-rc4-tld-1-00044-g9c21b2a350-dirty (Sep 18 2023 - 12:16:59 > > -0700) > > Thecus N2350 > > > > > > > > N2350 > env def -a > > ## Resetting to default environment > > > > N2350 > bootflow scan scsi > > pcie0.0: Link down > > pcie1.0: Link down > > scanning bus for devices... > > SATA link 0 timeout. > > Target spinup took 0 ms. > > AHCI 0001. 32 slots 2 ports 6 Gbps 0x3 impl SATA mode > > flags: 64bit ncq led only pmp fbss pio slum part sxs > > Device 0: (1:0) Vendor: ATA Prod.: ST750LX003-1AC15 Rev: SM12 > > Type: Hard Disk > > Capacity: 715404.8 MB = 698.6 GB (1465149168 x 512) > > ** File not found /boot/boot.bmp ** > > > > N2350 > bootflow l > > Showing all bootflows > > Seq Method State UclassPart Name Filename > > --- --- -- > > > > 0 script ready scsi 1 ahci_scsi.id1lun0.bootdev > > /boot/boot.scr > > --- --- -- > > > > (1 bootflow, 1 valid) > > > > N2350 > bootflow scan usb > > Bus usb@58000: USB EHCI 1.00 > > Bus usb3@f: MVEBU XHCI INIT controller @ 0xf10f4000 > > Register 2000120 NbrPorts 2 > > Starting the controller > > USB XHCI 1.00 > > Bus usb3@f8000: MVEBU XHCI INIT controller @ 0xf10fc000 > > Register 2000120 NbrPorts 2 > > Starting the controller > > USB XHCI 1.00 > > scanning bus usb@58000 for devices... 1 USB Device(s) found > > scanning bus usb3@f for devices... 1 USB Device(s) found > > scanning bus usb3@f8000 for devices... 2 USB Device(s) found > > ** File not found /boot/boot.bmp ** > > > > N2350 > bootflow l > > Showing all bootflows > > Seq Method State UclassPart Name Filename > > --- --- -- > > > > 0 script ready usb_mass_1 usb_mass_storage.lun0.boo > > /boot/boot.scr > > --- --- -- > > > > (1 bootflow, 1 valid) > > > > N2350 > bootflow scan scsi > > ** File not found /boot/boot.bmp ** > > ** File not found /boot/boot.bmp ** > > > > N2350 > bootflow l > > Showing all bootflows > > Seq Method State UclassPart Name Filename > > --- --- -- > > > > 0 script ready scsi 1 ahci_scsi.id1lun0.bootdev > > /boot/boot.scr > > 1 script ready usb_mass_1 usb_mass_storage.lun0.boo > > /boot/boot.scr > > --- --- -- > > > > (2 bootflows, 2 valid) > > > > > > Regards, > Simon
Re: [PATCH 09/15] blk: blkmap: Support mapping to device of any block size
On tis, sep 26, 2023 at 16:43, Bin Meng wrote:
> At present if a device to map has a block size other than 512,
> the blkmap map process just fails. There is no reason why we
> can't just use the block size of the mapped device.
Won't this be very confusing to the user?
The blkmap device uses a fixed block size of 512:
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/block/blkmap.c?ref_type=heads#L393
So if I map a slice of a 4k device into a blkmap, then
blkmap read 0x8000 0 1
would copy 4k instead of 512 bytes from the lower device to 0x8000,
even though the blkmap reports a block size of 512.
It seems to me that the expected behavior would be that only the first
512 bytes would be copied in the command above.
>
> Signed-off-by: Bin Meng
> ---
>
> drivers/block/blkmap.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/block/blkmap.c b/drivers/block/blkmap.c
> index f6acfa8927..149a4cac3e 100644
> --- a/drivers/block/blkmap.c
> +++ b/drivers/block/blkmap.c
> @@ -171,11 +171,11 @@ int blkmap_map_linear(struct udevice *dev, lbaint_t
> blknr, lbaint_t blkcnt,
>
> bd = dev_get_uclass_plat(bm->blk);
> lbd = dev_get_uclass_plat(lblk);
> - if (lbd->blksz != bd->blksz)
> - /* We could support block size translation, but we
> - * don't yet.
> - */
Hence this comment ^
> - return -EINVAL;
> + if (lbd->blksz != bd->blksz) {
> + /* update to match the mapped device */
> + bd->blksz = lbd->blksz;
> + bd->log2blksz = LOG2(bd->blksz);
> + }
>
> linear = malloc(sizeof(*linear));
> if (!linear)
> --
> 2.25.1
Re: Trying to boot custom kernel on Wink Hub (i.MX28)
WARNING: unmet direct dependencies detected for PL01X_SERIAL Depends on [n]: SERIAL [=y] && DM_SERIAL [=n] Selected by [y]: - TARGET_IMX28WINKHUB [=y] && WARNING: unmet direct dependencies detected for PL01X_SERIAL Depends on [n]: SERIAL [=y] && DM_SERIAL [=n] Selected by [y]: - TARGET_IMX28WINKHUB [=y] && I also tried building and booting your latest version, but just got "LLC". I'll try putting a logic analyser on the UART pins to see if anything else shows up, but I didn't see anything else on the USB-UART at 115200. Where are the LLC characters coming from? It's a little tricky to grep the source for a single character :-( Rogan On Tue, 26 Sept 2023 at 18:47, Fabio Estevam wrote: > > Hi Rogan, > > On Tue, Sep 26, 2023 at 1:01 AM Rogan Dawes wrote: > > > > Hi Fabio, > > > > That prints "LLC", but does not print "Pref". > > What happens if you unselect DM_SERIAL like this: > > --- a/configs/imx28-wink-hub_defconfig > +++ b/configs/imx28-wink-hub_defconfig > @@ -58,4 +58,3 @@ CONFIG_DM_REGULATOR=y > CONFIG_DM_REGULATOR_FIXED=y > CONFIG_DM_REGULATOR_GPIO=y > CONFIG_RTC_MXS=y > -CONFIG_DM_SERIAL=y
Re: [PATCH v11] Boot var automatic management for removable medias
On Wed, 20 Sept 2023 at 11:41, Masahisa Kojima
wrote:
>
> From: Raymond Mao
>
> Changes for complying to EFI spec §3.5.1.1
> 'Removable Media Boot Behavior'.
> Boot variables can be automatically generated during a removable
> media is probed. At the same time, unused boot variables will be
> detected and removed.
>
> Please note that currently the function 'efi_disk_remove' has no
> ability to distinguish below two scenarios
> a) Unplugging of a removable media under U-Boot
> b) U-Boot exiting and booting an OS
> Thus currently the boot variables management is not added into
> 'efi_disk_remove' to avoid boot options being added/erased
> repeatedly under scenario b) during power cycles
> See TODO comments under function 'efi_disk_remove' for more details
>
> The original efi_secboot tests expect that BootOrder EFI variable
> is not defined. With this commit, the BootOrder EFI variable is
> automatically added when the disk is detected. The original efi_secboot
> tests end up with unexpected failure.
> The efi_secboot tests need to be modified to clear the BootOrder
> EFI variable at the beginning of each test.
>
> Signed-off-by: Raymond Mao
> Signed-off-by: Masahisa Kojima
> Reviewed-by: Heinrich Schuchardt
> ---
> lib/efi_loader/efi_disk.c | 18 ++
> lib/efi_loader/efi_setup.c | 7 +++
> test/py/tests/test_efi_secboot/test_signed.py | 9 +
> .../test_efi_secboot/test_signed_intca.py | 3 +++
> .../py/tests/test_efi_secboot/test_unsigned.py | 3 +++
> 5 files changed, 40 insertions(+)
>
> diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
> index f0d76113b0..b808a7fe62 100644
> --- a/lib/efi_loader/efi_disk.c
> +++ b/lib/efi_loader/efi_disk.c
> @@ -690,6 +690,13 @@ int efi_disk_probe(void *ctx, struct event *event)
> return -1;
> }
>
> + /* only do the boot option management when UEFI sub-system is
> initialized */
> + if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR) &&
> efi_obj_list_initialized == EFI_SUCCESS) {
> + ret = efi_bootmgr_update_media_device_boot_option();
> + if (ret != EFI_SUCCESS)
> + return -1;
> + }
> +
> return 0;
> }
>
> @@ -742,6 +749,17 @@ int efi_disk_remove(void *ctx, struct event *event)
> dev_tag_del(dev, DM_TAG_EFI);
>
> return 0;
> +
> + /*
> +* TODO A flag to distinguish below 2 different scenarios of this
> +* function call is needed:
> +* a) Unplugging of a removable media under U-Boot
> +* b) U-Boot exiting and booting an OS
> +* In case of scenario a),
> efi_bootmgr_update_media_device_boot_option()
> +* needs to be invoked here to update the boot options and remove the
> +* unnecessary ones.
> +*/
> +
> }
>
> /**
> diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c
> index 58d4e13402..69c8b27730 100644
> --- a/lib/efi_loader/efi_setup.c
> +++ b/lib/efi_loader/efi_setup.c
> @@ -245,6 +245,13 @@ efi_status_t efi_init_obj_list(void)
> if (ret != EFI_SUCCESS)
> goto out;
>
> + if (IS_ENABLED(CONFIG_CMD_BOOTEFI_BOOTMGR)) {
> + /* update boot option after variable service initialized */
> + ret = efi_bootmgr_update_media_device_boot_option();
> + if (ret != EFI_SUCCESS)
> + goto out;
> + }
> +
> /* Define supported languages */
> ret = efi_init_platform_lang();
> if (ret != EFI_SUCCESS)
> diff --git a/test/py/tests/test_efi_secboot/test_signed.py
> b/test/py/tests/test_efi_secboot/test_signed.py
> index ca52e853d8..b77b60e223 100644
> --- a/test/py/tests/test_efi_secboot/test_signed.py
> +++ b/test/py/tests/test_efi_secboot/test_signed.py
> @@ -28,6 +28,7 @@ class TestEfiSignedImage(object):
> # Test Case 1a, run signed image if no PK
> output = u_boot_console.run_command_list([
> 'host bind 0 %s' % disk_img,
> +'setenv -e -nv -bs -rt BootOrder',
> 'efidebug boot add -b 1 HELLO1 host 0:1
> /helloworld.efi.signed -s ""',
> 'efidebug boot next 1',
> 'bootefi bootmgr'])
> @@ -52,6 +53,7 @@ class TestEfiSignedImage(object):
> # Test Case 2a, db is not yet installed
> output = u_boot_console.run_command_list([
> 'host bind 0 %s' % disk_img,
> +'setenv -e -nv -bs -rt BootOrder',
> 'fatload host 0:1 400 KEK.auth',
> 'setenv -e -nv -bs -rt -at -i 400:$filesize KEK',
> 'fatload host 0:1 400 PK.auth',
> @@ -96,6 +98,7 @@ class TestEfiSignedImage(object):
> # Test Case 3a, rejected by dbx
> output = u_boot_console.run_command_list([
> 'host bind 0 %s' % disk_img,
> +'seten
Re: [PATCH v4 13/44] spl: Use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN
On 9/26/23 10:14, Simon Glass wrote:
> Use the new SPL/TPL/VPL_SYS_MALLOC_F symbols to determine whether the
> malloc pool exists.
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Add new patch to use SYS_MALLOC_F instead of SYS_MALLOC_F_LEN
>
> Kconfig | 9 -
> arch/arm/lib/bdinfo.c| 2 +-
> arch/mips/cpu/start.S| 4 ++--
> arch/mips/mach-mtmips/mt7621/spl/start.S | 4 ++--
> arch/powerpc/cpu/mpc83xx/start.S | 2 +-
> arch/powerpc/cpu/mpc85xx/start.S | 4 ++--
> arch/sandbox/cpu/start.c | 2 +-
> arch/sh/lib/start.S | 4 ++--
> common/Makefile | 6 +-
> common/board_f.c | 2 +-
> common/board_r.c | 2 +-
> common/dlmalloc.c| 12 ++--
> common/init/board_init.c | 4 ++--
> common/spl/spl.c | 6 +++---
> include/asm-generic/global_data.h| 2 +-
> lib/asm-offsets.c| 2 +-
> 16 files changed, 31 insertions(+), 36 deletions(-)
>
> diff --git a/Kconfig b/Kconfig
> index 690ccdb93c4e..57afe597b0c8 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -307,8 +307,7 @@ config SPL_SYS_MALLOC_F
>
> config SPL_SYS_MALLOC_F_LEN
> hex "Size of malloc() pool in SPL"
> - depends on SYS_MALLOC_F && SPL
> - default 0x0 if !SPL_FRAMEWORK
> + depends on SPL_SYS_MALLOC_F
> default 0x2800 if RCAR_GEN3
> default 0x2000 if IMX8MQ
> default SYS_MALLOC_F_LEN
> @@ -332,7 +331,7 @@ config TPL_SYS_MALLOC_F
>
> config TPL_SYS_MALLOC_F_LEN
> hex "Size of malloc() pool in TPL"
> - depends on SYS_MALLOC_F && TPL
> + depends on TPL_SYS_MALLOC_F
> default SPL_SYS_MALLOC_F_LEN
> help
> Sets the size of the malloc() pool in TPL. This is used for
> @@ -366,8 +365,8 @@ config VPL_SYS_MALLOC_F
>
> config VPL_SYS_MALLOC_F_LEN
> hex "Size of malloc() pool in VPL before relocation"
> - depends on SYS_MALLOC_F && VPL
> - default SYS_MALLOC_F_LEN
> + depends on VPL_SYS_MALLOC_F
> + default SPL_SYS_MALLOC_F_LEN
> help
> Sets the size of the malloc() pool in VPL. This is used for
> driver model and other features, which must allocate memory for
> diff --git a/arch/arm/lib/bdinfo.c b/arch/arm/lib/bdinfo.c
> index 5e6eaad968d6..b88b01eefdcd 100644
> --- a/arch/arm/lib/bdinfo.c
> +++ b/arch/arm/lib/bdinfo.c
> @@ -57,7 +57,7 @@ void arch_print_bdinfo(void)
> #ifdef CONFIG_BOARD_TYPES
> printf("Board Type = %ld\n", gd->board_type);
> #endif
> -#if CONFIG_VAL(SYS_MALLOC_F_LEN)
> +#if CONFIG_IS_ENABLED(SYS_MALLOC_F)
> printf("Early malloc usage: %lx / %x\n", gd->malloc_ptr,
> CONFIG_VAL(SYS_MALLOC_F_LEN));
> #endif
> diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
> index 2acc21d5871c..a95c95bc7832 100644
> --- a/arch/mips/cpu/start.S
> +++ b/arch/mips/cpu/start.S
> @@ -46,7 +46,7 @@
> sp, sp, GD_SIZE # reserve space for gd
> and sp, sp, t0 # force 16 byte alignment
> movek0, sp # save gd pointer
> -#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \
> +#if CONFIG_IS_ENABLED(SYS_MALLOC_F) && \
> !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F)
> li t2, CONFIG_VAL(SYS_MALLOC_F_LEN)
> PTR_SUBU \
> @@ -63,7 +63,7 @@
> blt t0, t1, 1b
>nop
>
> -#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \
> +#if CONFIG_IS_ENABLED(SYS_MALLOC_F) && \
> !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F)
> PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
> #endif
> diff --git a/arch/mips/mach-mtmips/mt7621/spl/start.S
> b/arch/mips/mach-mtmips/mt7621/spl/start.S
> index d2f9c031cbae..d56e624f3131 100644
> --- a/arch/mips/mach-mtmips/mt7621/spl/start.S
> +++ b/arch/mips/mach-mtmips/mt7621/spl/start.S
> @@ -37,7 +37,7 @@
> sp, sp, GD_SIZE # reserve space for gd
> and sp, sp, t0 # force 16 byte alignment
> movek0, sp # save gd pointer
> -#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \
> +#if CONFIG_IS_ENABLED(SYS_MALLOC_F) && \
> !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F)
> li t2, CONFIG_VAL(SYS_MALLOC_F_LEN)
> PTR_SUBU \
> @@ -54,7 +54,7 @@
> blt t0, t1, 1b
>nop
>
> -#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \
> +#if CONFIG_IS_ENABLED(SYS_MALLOC_F) && \
> !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F)
> PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset
> #endif
> diff --git a/arch/powerpc/cpu/mpc83xx/start.S
> b/arch/powerpc/cpu/mpc83xx/start.S
> index 6749263da8a2..d72d3147f63d 100644
> --- a/arch/powerpc/cpu/mpc83xx/start.S
> +++ b/arch/powerpc/cpu/mpc83xx/start.S
> @@ -244,7 +244,7 @@ in_flash:
> cmplw r3, r4
> bne 1b
Re: [PATCH] dt-bindings: mtd: Add a schema for binman
On Tue, Sep 26, 2023 at 2:48 AM Miquel Raynal wrote: > > Hello, > > > > > > > These are firmware bindings, as indicated, but I > > > > > > took them out of the /firmware node since that is for a different > > > > > > purpose. Rob suggested that partitions was a good place. We have > > > > > > fwupd > > > > > > using DT to hold the firmware-update information, so I expect it > > > > > > will > > > > > > move to use these bindings too. > > > > > > > > > > I would definitely use fixed partitions as that's what you need then: > > > > > registering where everything starts and ends. If you have "in-band" > > > > > meta data you might require a compatible, but I don't think you > > > > > do, in this case you should probably carry the content through a label > > > > > (which will become the partition name) and we can discuss additional > > > > > properties if needed. > > > > > > > > I believe I am going to need a compatible string at the 'partitions' > > > > level to indicate that this is the binman scheme. But we can leave > > > > that until later. > > > > > > Perhaps: > > > > > > compatible = "binman", "fixed-partitions"; > > > > > > Though I don't understand why binman couldn't just understand what > > > "fixed-partitions" means rather than "binman". > > > > Well so long as we don't add any binman things in here, you are right. > > > > But the eventual goal is parity with current Binman functionality, > > which writes the entire (augmented) description to the DT, allowing > > tools to rebuild / repack / replace pieces later, maintaining the same > > alignment constraints, etc. I am assuming that properties like 'align > > = <16>' would not fit with fixed-partitions. > > I am personally not bothered by this kind of properties. But if we plan > on adding too much properties, I will advise to indeed use another name > than fixed-partitions (or add the "binman" secondary compatible) > otherwise it's gonna be hard to support in the code while still > restraining as much as we can the other partition schema. Agreed. It's a trade off. I think we need enough to understand the problem (not just presented with a solution), agree on the general solution/direction, and then discuss specific additions. > > But if we don't preserve > > these properties then Binman cannot do repacking reliably. Perhaps for > > now I could put the augmented DT in its own section somewhere, but I > > am just not sure if that will work in a real system. E.g. with VBE the > > goal is to use the DT to figure out how to access the firmware, update > > it, etc. VBE? > > Is it not possible to have my own node with whatever things Binman > > needs in it (subject to review of course)? i.e. could we discuss how > > to encode it, but argue less about whether things are needed? I > > kind-of feel I know what is needed, since I wrote the tool. What we don't need is the same information in 2 places for the DTB used at runtime. If the binman node is removed, do whatever you want. If you want to keep it at runtime, then it's got to extend what we already have. I don't think anyone is disagreeing about whether specific information is needed or not. > > > > So you are suggesting 'label' for the contents. Rob suggested > > > > 'compatible' [1], so what should I do? > > > > > > "label" is for consumption by humans, not tools/software. Compatible > > > values are documented, label values are not. Though the partition > > > stuff started out using label long ago and it's evolved to preferring > > > compatible. > > > > OK so we are agreed that we are going with 'compatible'. > > Still strongly disagree here. Miquel is right. I was confused here. "label" is still pretty much used for what the image is. Though we do have "u-boot,env" for both it seems. My position on "label" stands. To the extent we have images for common components, I think we should standardize the names. Certainly if tools rely on the names, then they should be documented. > My understanding is that a compatible carries how the content is > organized, and how this maybe specific (like you have in-band meta data > data that needs to be parsed in a specific way or in your case > additional specific properties in the DT which give more context about > how the data is stored). But the real content of the partition, ie. if > it contains a firmware, the kernel or some user data does not belong to > the compatible. > > I.e: > - The first byte of my partition gives the compression algorithm: > -> compatible = "compressed-partition-foo"; > or > -> compatible = "fixed-partitions" + compression-algorithm = "foo"; > - The partition contains a picture of my dog: > -> label = "my dog is beautiful" > but certainly not > -> compatible = "my-dog"; IMO, compatible in this case should convey "JPEG image" or similar. > I don't see why, for the binman schema, we could not constrain the > labels? Yes, but those should follow what we already have. "u-boot" for example rather than "data,u-b
Re: Trying to boot custom kernel on Wink Hub (i.MX28)
Hi Rogan, On Tue, Sep 26, 2023 at 1:01 AM Rogan Dawes wrote: > > Hi Fabio, > > That prints "LLC", but does not print "Pref". What happens if you unselect DM_SERIAL like this: --- a/configs/imx28-wink-hub_defconfig +++ b/configs/imx28-wink-hub_defconfig @@ -58,4 +58,3 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_RTC_MXS=y -CONFIG_DM_SERIAL=y
Re: [PATCH 0/3] BOOTP/DHCPv4 enhancements
Hi Sean, > In our datacenter application, a single DHCP server is servicing 36000+ > clients. > Improvements are required to the DHCPv4 retransmission behavior to align with > RFC and ensure less pressure is exerted on the server: > - retransmission backoff interval maximum is configurable > (environment variable bootpretransmitperiodmax) > - initial retransmission backoff interval is configurable > (environment variable bootpretransmitperiodinit) > - transaction ID is kept the same for each BOOTP/DHCPv4 request > (not recreated on each retry) Might be also worth looking at the series adding LWIP support [1] and see what impact that may have on this too. Peter [1] https://lists.denx.de/pipermail/u-boot/2023-September/531716.html > For our application we'll use: > - bootpretransmitperiodmax=16000 > - bootpretransmitperiodinit=2000 > > A new configuration BOOTP_RANDOM_XID has been added to enable a randomized > BOOTP/DHCPv4 transaction ID. > > Add functionality for DHCPv4 sending/parsing option 209 (PXE config file). > Enabled with Kconfig BOOTP_PXE_DHCP_OPTION. Note, this patch was > submitted previously but this latest version has been enhanced to > avoid a possible double free(). > > Sean Edmond (3): > net: Get pxe config file from dhcp option 209 > net: bootp: BOOTP/DHCPv4 retransmission improvements > net: bootp: add config option BOOTP_RANDOM_XID > > cmd/Kconfig | 11 +++ > cmd/pxe.c | 10 +++ > net/bootp.c | 85 +++-- > 3 files changed, 91 insertions(+), 15 deletions(-) > > -- > 2.40.0 >
[PATCH v2 3/3] board: Add support for Conclusive KSTR-SAMA5D27
Introduce support for Conclusive KSTR-SAMA5D27 Single Board Computer.
Co-developed-by: Jakub Klama
Signed-off-by: Jakub Klama
Co-developed-by: Marcin Jabrzyk
Signed-off-by: Marcin Jabrzyk
Signed-off-by: Artur Rojek
---
v2: - remove redundant license text from at91-kstr-sama5d27.dts
- when defining properties in .dts, reference nodes by labels
- drop nodes for usb0 and pmic, as these aren't used by drivers
- switch i2c to flexcom driver and make the necessary dts changes
- sort includes in at91-kstr-sama5d27.dts alphabetically
arch/arm/dts/Makefile | 3 +
arch/arm/dts/at91-kstr-sama5d27.dts | 131 ++
arch/arm/mach-at91/Kconfig| 13 +
board/conclusive/kstr-sama5d27/Kconfig| 15 ++
board/conclusive/kstr-sama5d27/MAINTAINERS| 8 +
board/conclusive/kstr-sama5d27/Makefile | 5 +
.../conclusive/kstr-sama5d27/kstr-sama5d27.c | 234 ++
configs/kstr_sama5d27_defconfig | 80 ++
include/configs/kstr-sama5d27.h | 15 ++
9 files changed, 504 insertions(+)
create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts
create mode 100644 board/conclusive/kstr-sama5d27/Kconfig
create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS
create mode 100644 board/conclusive/kstr-sama5d27/Makefile
create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c
create mode 100644 configs/kstr_sama5d27_defconfig
create mode 100644 include/configs/kstr-sama5d27.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157b1..8e4d33c01912 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1198,6 +1198,9 @@ dtb-$(CONFIG_TARGET_SAMA5D27_SOM1_EK) += \
dtb-$(CONFIG_TARGET_SAMA5D27_WLSOM1_EK) += \
at91-sama5d27_wlsom1_ek.dtb
+dtb-$(CONFIG_TARGET_KSTR_SAMA5D27) += \
+ at91-kstr-sama5d27.dtb
+
dtb-$(CONFIG_TARGET_SAMA5D2_ICP) += \
at91-sama5d2_icp.dtb
diff --git a/arch/arm/dts/at91-kstr-sama5d27.dts
b/arch/arm/dts/at91-kstr-sama5d27.dts
new file mode 100644
index ..fe9ec7e5bbc3
--- /dev/null
+++ b/arch/arm/dts/at91-kstr-sama5d27.dts
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0+ OR X11
+/*
+ * at91-kstr-sama5d27.dts - Device Tree file for Conclusive KSTR-SAMA5D27 board
+ *
+ * Copyright (C) 2019-2023 Conclusive Engineering Sp. z o. o.
+ *
+ */
+/dts-v1/;
+
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+#include
+#include
+#include
+
+/ {
+ model = "Conclusive KSTR-SAMA5D27";
+ compatible = "conclusive,kstr-sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ bootph-all;
+ stdout-path = &uart1;
+ };
+};
+
+&main_xtal {
+ clock-frequency = <1200>;
+};
+
+&sdmmc0 {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default
&pinctrl_sdmmc0_ck_cd_default>;
+ status = "okay";
+ bootph-all;
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+ status = "okay";
+ bootph-all;
+};
+
+&macb0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>;
+ phy-mode = "rmii";
+ status = "okay";
+
+ ethernet-phy@0 {
+ reg = <0x0>;
+ reset-gpios = <&pioA 44 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&flx4 {
+ atmel,flexcom-mode = ;
+ status = "okay";
+};
+
+&i2c6 {
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx4_i2c>;
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "microchip,24c32", "atmel,24c32";
+ reg = <0x50>;
+ read-only;
+ pagesize = <32>;
+ status = "okay";
+ };
+};
+
+&pioA {
+ pinctrl {
+ pinctrl_uart1_default: uart1_default {
+ pinmux = ,
+;
+ bias-disable;
+ bootph-all;
+ };
+
+ pinctrl_macb0_phy_irq: macb0_phy_irq {
+ pinmux = ;
+ bias-disable;
+ bootph-all;
+ };
+
+ pinctrl_macb0_rmii: macb0_rmii {
+ pinmux = ,
+,
+,
+,
+,
+,
+,
+,
+,
+;
+ bias-disable;
+ bootph-all;
+ };
+
+ pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
+ pinmux = ,
+,
+,
+
[PATCH v2 2/3] arm: dts: at91: sama5: Add flexcom4 node
Set up flexcom4 for Microchip SAMA5D27 SoC and prepare it for usage in
I2C mode.
Signed-off-by: Artur Rojek
---
v2: new patch
arch/arm/dts/sama5d2.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index dd6468ed96aa..819564fdd5bb 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -781,6 +781,26 @@
status = "disabled";
};
+ flx4: flexcom@fc018000 {
+ compatible = "atmel,sama5d2-flexcom";
+ reg = <0xfc018000 0x200>;
+ clocks = <&flx4_clk>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0xfc018000 0x800>;
+ status = "disabled";
+
+ i2c6: i2c@600 {
+ compatible = "atmel,sama5d2-i2c";
+ reg = <0x600 0x200>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&flx4_clk>;
+ clock-names = "i2c6_clk";
+ status = "disabled";
+ };
+ };
+
aic: interrupt-controller@fc02 {
#interrupt-cells = <3>;
compatible = "atmel,sama5d2-aic";
--
2.42.0
[PATCH v2 1/3] common: add prototype & rename populate_serial_number()
Rename populate_serial_number() to a more descriptive
eeprom_read_serial() and provide the missing function prototype.
This is useful for boards that wish to read their serial number from
EEPROM at init.
Signed-off-by: Artur Rojek
---
v2: - rename the function
- move function documentation from .c file to the prototype location
cmd/tlv_eeprom.c | 14 +-
include/init.h | 14 ++
2 files changed, 15 insertions(+), 13 deletions(-)
diff --git a/cmd/tlv_eeprom.c b/cmd/tlv_eeprom.c
index 79796394c5c8..47c127ca4950 100644
--- a/cmd/tlv_eeprom.c
+++ b/cmd/tlv_eeprom.c
@@ -1088,19 +1088,7 @@ int mac_read_from_eeprom(void)
return 0;
}
-/**
- * populate_serial_number - read the serial number from EEPROM
- *
- * This function reads the serial number from the EEPROM and sets the
- * appropriate environment variable.
- *
- * The environment variable is only set if it has not been set
- * already. This ensures that any user-saved variables are never
- * overwritten.
- *
- * This function must be called after relocation.
- */
-int populate_serial_number(int devnum)
+int eeprom_read_serial(int devnum)
{
char serialstr[257];
int eeprom_index;
diff --git a/include/init.h b/include/init.h
index 3bf30476a2e0..f18f3b9961d8 100644
--- a/include/init.h
+++ b/include/init.h
@@ -283,6 +283,20 @@ void board_init_r(struct global_data *id, ulong dest_addr)
int cpu_init_r(void);
int last_stage_init(void);
int mac_read_from_eeprom(void);
+
+/**
+ * eeprom_read_serial - read the serial number from EEPROM
+ *
+ * This function reads the serial number from the EEPROM and sets the
+ * appropriate environment variable.
+ *
+ * The environment variable is only set if it has not been set
+ * already. This ensures that any user-saved variables are never
+ * overwritten.
+ *
+ * This function must be called after relocation.
+ */
+int eeprom_read_serial(int devnum);
int set_cpu_clk_info(void);
int update_flash_size(int flash_size);
int arch_early_init_r(void);
--
2.42.0
[PATCH v2 0/3] Conclusive KSTR-SAMA5D27 support
Hi all, this is v2 of the Conclusive KSTR-SAMA5D27 support series. Patch [1/3] now also renames the EEPROM serial number function and moves its documentation from .c file to the .h. We should be fine doing that, as - to my knowledge - no other part of U-Boot seems to be using this symbol, as evidenced by the missing prototype. Patch [2/3] is new. It is the direct result of moving i2c as a child of flexcom (see below). Patch [3/3] now also addresses multiple dts issues. In particular, all node access is now being done through label references, unused nodes have been removed, and the i2c now goes explicitly through flexcom. Artur Rojek (3): common: add prototype & rename populate_serial_number() arm: dts: at91: sama5: Add flexcom4 node board: Add support for Conclusive KSTR-SAMA5D27 arch/arm/dts/Makefile | 3 + arch/arm/dts/at91-kstr-sama5d27.dts | 131 ++ arch/arm/dts/sama5d2.dtsi | 20 ++ arch/arm/mach-at91/Kconfig| 13 + board/conclusive/kstr-sama5d27/Kconfig| 15 ++ board/conclusive/kstr-sama5d27/MAINTAINERS| 8 + board/conclusive/kstr-sama5d27/Makefile | 5 + .../conclusive/kstr-sama5d27/kstr-sama5d27.c | 234 ++ cmd/tlv_eeprom.c | 14 +- configs/kstr_sama5d27_defconfig | 80 ++ include/configs/kstr-sama5d27.h | 15 ++ include/init.h| 14 ++ 12 files changed, 539 insertions(+), 13 deletions(-) create mode 100644 arch/arm/dts/at91-kstr-sama5d27.dts create mode 100644 board/conclusive/kstr-sama5d27/Kconfig create mode 100644 board/conclusive/kstr-sama5d27/MAINTAINERS create mode 100644 board/conclusive/kstr-sama5d27/Makefile create mode 100644 board/conclusive/kstr-sama5d27/kstr-sama5d27.c create mode 100644 configs/kstr_sama5d27_defconfig create mode 100644 include/configs/kstr-sama5d27.h -- 2.42.0
Re: [PATCH] test/py: sleep: Add a test for the time command
On Tue, Sep 26, 2023 at 05:08:35PM +0530, Love Kumar wrote:
> Execute "time ", and validate that it gives the approximately
> the correct amount of command execution time.
>
> Signed-off-by: Love Kumar
> ---
> test/py/tests/test_sleep.py | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/test/py/tests/test_sleep.py b/test/py/tests/test_sleep.py
> index 392af29db224..388f544d07df 100644
> --- a/test/py/tests/test_sleep.py
> +++ b/test/py/tests/test_sleep.py
> @@ -41,3 +41,23 @@ def test_sleep(u_boot_console):
> if not u_boot_console.config.gdbserver:
> # margin is hopefully enough to account for any system overhead.
> assert elapsed < (sleep_time + sleep_margin)
> +
> +def test_time(u_boot_console):
> +"""Test the time command, and validate that it gives approximately the
> +correct amount of command execution time."""
> +
> +sleep_skip = u_boot_console.config.env.get("env__sleep_accurate", True)
> +if not sleep_skip:
> +pytest.skip("sleep is not accurate")
> +
> +if u_boot_console.config.buildconfig.get("config_cmd_misc", "n") != "y":
We should use @pytest.mark.buildconfigspec('cmd_misc') on the function
def itself.
--
Tom
signature.asc
Description: PGP signature
[PATCH v1 6/6] board: st: common: cleanup dfu support
From: Patrick Delaunay
split the file stm32mp_dfu.c in two files to simplify the Makefile
- stm32mp_dfu.c: required by CONFIG_SET_DFU_ALT_INFO
- stm32mp_dfu_virt.c: required by CONFIG_DFU_VIRT for stm32prog
command or VIRT device for PMIC for CONFIG_SET_DFU_ALT_INFO.
This patch also remove some remaining #ifdef CONFIG
and avoid compilation error when CONFIG_SET_DFU_ALT_INFO is not
activated.
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
board/st/common/Makefile | 1 +
board/st/common/stm32mp_dfu.c | 103 ++---
board/st/common/stm32mp_dfu_virt.c | 99 +++
3 files changed, 104 insertions(+), 99 deletions(-)
create mode 100644 board/st/common/stm32mp_dfu_virt.c
diff --git a/board/st/common/Makefile b/board/st/common/Makefile
index c9608297261..b01245e4b48 100644
--- a/board/st/common/Makefile
+++ b/board/st/common/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_PMIC_STPMIC1) += stpmic1.o
ifeq ($(CONFIG_ARCH_STM32MP),y)
obj-$(CONFIG_SET_DFU_ALT_INFO) += stm32mp_dfu.o
+obj-$(CONFIG_$(SPL_)DFU_VIRT) += stm32mp_dfu_virt.o
endif
obj-$(CONFIG_TYPEC_STUSB160X) += stusb160x.o
diff --git a/board/st/common/stm32mp_dfu.c b/board/st/common/stm32mp_dfu.c
index 1cf4a3d5fa1..1ab27a91544 100644
--- a/board/st/common/stm32mp_dfu.c
+++ b/board/st/common/stm32mp_dfu.c
@@ -13,7 +13,6 @@
#include
#include
#include
-#include
#define DFU_ALT_BUF_LEN SZ_1K
@@ -147,108 +146,14 @@ void set_dfu_alt_info(char *interface, char *devstr)
board_get_alt_info_mtd(mtd, buf);
}
- if (IS_ENABLED(CONFIG_DFU_VIRT) &&
- IS_ENABLED(CMD_STM32PROG_USB)) {
- strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
+ if (IS_ENABLED(CONFIG_DFU_VIRT)) {
+ /* virtual device id 0 is aligned with stm32mp_dfu_virt.c */
+ strlcat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
- strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
+ strlcat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
}
env_set("dfu_alt_info", buf);
puts("DFU alt info setting: done\n");
}
-
-#if CONFIG_IS_ENABLED(DFU_VIRT)
-#include
-#include
-
-static int dfu_otp_read(u64 offset, u8 *buffer, long *size)
-{
- struct udevice *dev;
- int ret;
-
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(stm32mp_bsec),
- &dev);
- if (ret)
- return ret;
-
- ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
- if (ret >= 0) {
- *size = ret;
- ret = 0;
- }
-
- return 0;
-}
-
-static int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
-{
- int ret;
-#ifdef CONFIG_PMIC_STPMIC1
- struct udevice *dev;
-
- ret = uclass_get_device_by_driver(UCLASS_MISC,
- DM_DRIVER_GET(stpmic1_nvm),
- &dev);
- if (ret)
- return ret;
-
- ret = misc_read(dev, 0xF8 + offset, buffer, *size);
- if (ret >= 0) {
- *size = ret;
- ret = 0;
- }
- if (ret == -EACCES) {
- *size = 0;
- ret = 0;
- }
-#else
- log_err("PMIC update not supported");
- ret = -EOPNOTSUPP;
-#endif
-
- return ret;
-}
-
-int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
-void *buf, long *len)
-{
- switch (dfu->data.virt.dev_num) {
- case 0x0:
- return dfu_otp_read(offset, buf, len);
- case 0x1:
- return dfu_pmic_read(offset, buf, len);
- }
-
- if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) &&
- dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
- return stm32prog_read_medium_virt(dfu, offset, buf, len);
-
- *len = 0;
- return 0;
-}
-
-int dfu_write_medium_virt(struct dfu_entity *dfu, u64 offset,
- void *buf, long *len)
-{
- if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) &&
- dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
- return stm32prog_write_medium_virt(dfu, offset, buf, len);
-
- return -EOPNOTSUPP;
-}
-
-int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
-{
- if (IS_ENABLED(CONFIG_CMD_STM32PROG_USB) &&
- dfu->data.virt.dev_num >= STM32PROG_VIRT_FIRST_DEV_NUM)
- return stm32prog_get_medium_size_virt(dfu, size);
-
- *size = SZ_1K;
-
- return 0;
-}
-
-#endif
diff --git a/board/st/common/stm32mp_dfu_virt.c
b/board/st/common/stm32mp_dfu_virt.c
new file mode 100644
index 000..f0f99605796
--- /dev/null
+++ b/board/st/common/stm32mp_dfu_virt.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0-or-l
[PATCH v1 5/6] configs: stm32mp13: add support of usb boot
From: Patrick Delaunay Add support of USB key boot in distro boot command. Signed-off-by: Patrick Delaunay Signed-off-by: Patrice Chotard --- include/configs/stm32mp13_common.h | 9 - 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/include/configs/stm32mp13_common.h b/include/configs/stm32mp13_common.h index d36fbf00548..5b0658ced92 100644 --- a/include/configs/stm32mp13_common.h +++ b/include/configs/stm32mp13_common.h @@ -35,9 +35,16 @@ #define BOOT_TARGET_MMC1(func) #endif +#ifdef CONFIG_CMD_USB +#define BOOT_TARGET_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_USB(func) +#endif + #define BOOT_TARGET_DEVICES(func) \ BOOT_TARGET_MMC1(func) \ - BOOT_TARGET_MMC0(func) + BOOT_TARGET_MMC0(func) \ + BOOT_TARGET_USB(func) /* * default bootcmd for stm32mp13: -- 2.25.1
[PATCH v1 1/6] ARM: dts: stm32mp: alignment with v6.6-rc1
Device tree alignment with Linux kernel v6.6.rc1.
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp131.dtsi | 52 +--
arch/arm/dts/stm32mp135f-dk.dts | 68 ++--
arch/arm/dts/stm32mp15-pinctrl.dtsi | 364 +-
arch/arm/dts/stm32mp15-scmi.dtsi | 7 +-
arch/arm/dts/stm32mp151.dtsi | 34 +-
arch/arm/dts/stm32mp157.dtsi | 15 +-
arch/arm/dts/stm32mp157a-dk1-scmi.dts | 7 +-
...157a-microgea-stm32mp1-microdev2.0-of7.dts | 3 +
arch/arm/dts/stm32mp157c-dk2-scmi.dts | 7 +-
arch/arm/dts/stm32mp157c-dk2.dts | 30 +-
arch/arm/dts/stm32mp157c-ed1-scmi.dts | 7 +-
arch/arm/dts/stm32mp157c-ed1.dts | 24 +-
arch/arm/dts/stm32mp157c-ev1-scmi.dts | 7 +-
arch/arm/dts/stm32mp157c-ev1.dts | 34 +-
arch/arm/dts/stm32mp15xx-dkx.dtsi | 42 +-
include/dt-bindings/clock/stm32mp1-clks.h | 2 +-
include/dt-bindings/clock/stm32mp13-clks.h| 2 +-
.../regulator/st,stm32mp13-regulator.h| 42 ++
include/dt-bindings/reset/stm32mp1-resets.h | 2 +-
include/dt-bindings/reset/stm32mp13-resets.h | 2 +-
20 files changed, 585 insertions(+), 166 deletions(-)
create mode 100644 include/dt-bindings/regulator/st,stm32mp13-regulator.h
diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
index d23bbc3639d..ac90fcbf0c0 100644
--- a/arch/arm/dts/stm32mp131.dtsi
+++ b/arch/arm/dts/stm32mp131.dtsi
@@ -33,6 +33,8 @@
optee {
method = "smc";
compatible = "linaro,optee-tz";
+ interrupt-parent = <&intc>;
+ interrupts = ;
};
scmi: scmi {
@@ -50,6 +52,28 @@
reg = <0x16>;
#reset-cells = <1>;
};
+
+ scmi_voltd: protocol@17 {
+ reg = <0x17>;
+
+ scmi_regu: regulators {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ scmi_reg11: regulator@0 {
+ reg = ;
+ regulator-name = "reg11";
+ };
+ scmi_reg18: regulator@1 {
+ reg = ;
+ regulator-name = "reg18";
+ };
+ scmi_usb33: regulator@2 {
+ reg = ;
+ regulator-name = "usb33";
+ };
+ };
+ };
};
};
@@ -76,28 +100,6 @@
always-on;
};
- /* PWR 1v1, 1v8 and 3v3 regulators defined as fixed, waiting for SCMI */
- reg11: reg11 {
- compatible = "regulator-fixed";
- regulator-name = "reg11";
- regulator-min-microvolt = <110>;
- regulator-max-microvolt = <110>;
- };
-
- reg18: reg18 {
- compatible = "regulator-fixed";
- regulator-name = "reg18";
- regulator-min-microvolt = <180>;
- regulator-max-microvolt = <180>;
- };
-
- usb33: usb33 {
- compatible = "regulator-fixed";
- regulator-name = "usb33";
- regulator-min-microvolt = <330>;
- regulator-max-microvolt = <330>;
- };
-
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -799,7 +801,7 @@
g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
dr_mode = "otg";
otg-rev = <0x200>;
- usb33d-supply = <&usb33>;
+ usb33d-supply = <&scmi_usb33>;
status = "disabled";
};
@@ -1329,8 +1331,8 @@
reg = <0x5a006000 0x1000>;
clocks = <&rcc USBPHY_K>;
resets = <&rcc USBPHY_R>;
- vdda1v1-supply = <®11>;
- vdda1v8-supply = <®18>;
+ vdda1v1-supply = <&scmi_reg11>;
+ vdda1v8-supply = <&scmi_reg18>;
status = "disabled";
usbphyc_port0: usb-phy@0 {
diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts
index f0900ca672b..eea740d097c 100644
--- a/arch/arm/dts/stm32mp135f-dk.dts
+++ b/arch/arm/dts/stm32mp135f-dk.dts
[PATCH v1 4/6] configs: stm32mp13: activate command stm32prog
From: Patrick Delaunay
Activate the command stm32prog with CONFIG_CMD_STM32MPROG.
The CONFIG_SET_DFU_ALT_INFO is also activated to support
the required weak functions for the DFU virtual backen defined in
board/st/common/stm32mp_dfu.c.
Signed-off-by: Patrick Delaunay
Signed-off-by: Patrice Chotard
---
configs/stm32mp13_defconfig| 2 ++
include/configs/stm32mp13_common.h | 4
2 files changed, 6 insertions(+)
diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig
index f962d0eab97..2d87792a9cb 100644
--- a/configs/stm32mp13_defconfig
+++ b/configs/stm32mp13_defconfig
@@ -11,6 +11,7 @@ CONFIG_DDR_CACHEABLE_SIZE=0x800
CONFIG_CMD_STM32KEY=y
CONFIG_TARGET_ST_STM32MP13x=y
CONFIG_ENV_OFFSET_REDUND=0x94
+CONFIG_CMD_STM32PROG=y
# CONFIG_ARMV7_NONSEC is not set
CONFIG_SYS_LOAD_ADDR=0xc200
CONFIG_SYS_MEMTEST_START=0xc000
@@ -51,6 +52,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=-1
CONFIG_ENV_MMC_USE_DT=y
CONFIG_CLK_SCMI=y
+CONFIG_SET_DFU_ALT_INFO=y
CONFIG_GPIO_HOG=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
diff --git a/include/configs/stm32mp13_common.h
b/include/configs/stm32mp13_common.h
index 7c59c69e0bd..d36fbf00548 100644
--- a/include/configs/stm32mp13_common.h
+++ b/include/configs/stm32mp13_common.h
@@ -41,10 +41,14 @@
/*
* default bootcmd for stm32mp13:
+ * for serial/usb: execute the stm32prog command
* for mmc boot (eMMC, SD card), distro boot on the same mmc device
*/
#define STM32MP_BOOTCMD "bootcmd_stm32mp=" \
"echo \"Boot over ${boot_device}${boot_instance}!\";" \
+ "if test ${boot_device} = serial || test ${boot_device} = usb;" \
+ "then stm32prog ${boot_device} ${boot_instance}; " \
+ "else " \
"run env_check;" \
"if test ${boot_device} = mmc;" \
"then env set boot_targets \"mmc${boot_instance}\"; fi;" \
--
2.25.1
[PATCH v1 3/6] configs: stm32mp13: Enable USB related flags
Enable USB related flags. Signed-off-by: Patrice Chotard --- configs/stm32mp13_defconfig | 18 ++ 1 file changed, 18 insertions(+) diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index 82b62744f6d..f962d0eab97 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -32,6 +32,8 @@ CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_LSBLK=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_CMD_CACHE=y CONFIG_CMD_EFIDEBUG=y CONFIG_CMD_TIME=y @@ -58,6 +60,8 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_STM32_SDMMC2=y CONFIG_MTD=y CONFIG_DM_MTD=y +CONFIG_PHY=y +CONFIG_PHY_STM32_USBPHYC=y CONFIG_PINCONF=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y @@ -72,6 +76,20 @@ CONFIG_SYSRESET_PSCI=y CONFIG_TEE=y CONFIG_OPTEE=y # CONFIG_OPTEE_TA_AVB is not set +CONFIG_USB=y +CONFIG_DM_USB_GADGET=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_ONBOARD_HUB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics" +CONFIG_USB_GADGET_VENDOR_NUM=0x0483 +CONFIG_USB_GADGET_PRODUCT_NUM=0x5720 +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_ERRNO_STR=y # CONFIG_LMB_USE_MAX_REGIONS is not set CONFIG_LMB_MEMORY_REGIONS=2 -- 2.25.1
[PATCH v1 2/6] ARM: dts: stm32: force b-session-valid for otg on stm32mp135f-dk board
From: Fabrice Gasnier
stm32mp135f-dk board has a type-c connector to retrieve the connection
state. For now, simply force an active peripheral mode in u-boot for
flashing.
Signed-off-by: Fabrice Gasnier
Signed-off-by: Patrice Chotard
---
arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
index 48605ff8bbe..ba0c02489d1 100644
--- a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
@@ -38,3 +38,7 @@
bootph-all;
};
};
+
+&usbotg_hs {
+ u-boot,force-b-session-valid;
+};
--
2.25.1
[PATCH v1 0/6] stm32mp: DT and config update
DT synchronization with kernel v6.6-rc1 for stm32mp Enable USB support for stm32mp13 Enable command stm32prog for stm32mp13 Enable USB boot support for stm32mp13 Force b-session-valid for otg on stm32mp135f-dk board Cleanup dfu support for stm32mp Fabrice Gasnier (1): ARM: dts: stm32: force b-session-valid for otg on stm32mp135f-dk board Patrice Chotard (2): ARM: dts: stm32mp: alignment with v6.6-rc1 configs: stm32mp13: Enable USB related flags Patrick Delaunay (3): configs: stm32mp13: activate command stm32prog configs: stm32mp13: add support of usb boot board: st: common: cleanup dfu support arch/arm/dts/stm32mp131.dtsi | 52 +-- arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 4 + arch/arm/dts/stm32mp135f-dk.dts | 68 ++-- arch/arm/dts/stm32mp15-pinctrl.dtsi | 364 +- arch/arm/dts/stm32mp15-scmi.dtsi | 7 +- arch/arm/dts/stm32mp151.dtsi | 34 +- arch/arm/dts/stm32mp157.dtsi | 15 +- arch/arm/dts/stm32mp157a-dk1-scmi.dts | 7 +- ...157a-microgea-stm32mp1-microdev2.0-of7.dts | 3 + arch/arm/dts/stm32mp157c-dk2-scmi.dts | 7 +- arch/arm/dts/stm32mp157c-dk2.dts | 30 +- arch/arm/dts/stm32mp157c-ed1-scmi.dts | 7 +- arch/arm/dts/stm32mp157c-ed1.dts | 24 +- arch/arm/dts/stm32mp157c-ev1-scmi.dts | 7 +- arch/arm/dts/stm32mp157c-ev1.dts | 34 +- arch/arm/dts/stm32mp15xx-dkx.dtsi | 42 +- board/st/common/Makefile | 1 + board/st/common/stm32mp_dfu.c | 103 + board/st/common/stm32mp_dfu_virt.c| 99 + configs/stm32mp13_defconfig | 20 + include/configs/stm32mp13_common.h| 13 +- include/dt-bindings/clock/stm32mp1-clks.h | 2 +- include/dt-bindings/clock/stm32mp13-clks.h| 2 +- .../regulator/st,stm32mp13-regulator.h| 42 ++ include/dt-bindings/reset/stm32mp1-resets.h | 2 +- include/dt-bindings/reset/stm32mp13-resets.h | 2 +- 26 files changed, 725 insertions(+), 266 deletions(-) create mode 100644 board/st/common/stm32mp_dfu_virt.c create mode 100644 include/dt-bindings/regulator/st,stm32mp13-regulator.h -- 2.25.1
Re: [PATCH v4 05/44] spl: mx6: powerpc: Drop the condition on timer_init()
Le 26/09/2023 à 16:14, Simon Glass a écrit :
> It doesn't make sense to have some boards do this differently. Drop the
> condition in the hope that the maintainers can figure out any run-time
> problems.
>
> This has been tested on qemu-ppce500
>
This was added by commit ea8256f072 ("SPL: Port SPL framework to
powerpc"), and the commit log explains why.
Then commit 70e2aaf380 ("board_f: powerpc: Use timer_init() instead of
init_timebase()") brought timer_init() to powerpc.
All timer_init() does is to reset the timebase register to 0 instead of
leaving a potentially random value. That should just be fine.
Therefore this change should be ok for powerpc.
Acked-by: Christophe Leroy
>
> Signed-off-by: Simon Glass
> ---
>
> (no changes since v3)
>
> Changes in v3:
> - Mention testing on qemu-ppce500
>
> Changes in v2:
> - Explicitly copy two maintainers as it seems only Mario was auto-cc'd
>
> common/spl/spl.c | 6 --
> 1 file changed, 6 deletions(-)
>
> diff --git a/common/spl/spl.c b/common/spl/spl.c
> index 5cc86288145b..4233390d7de2 100644
> --- a/common/spl/spl.c
> +++ b/common/spl/spl.c
> @@ -762,13 +762,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
> if (spl_init())
> hang();
> }
> -#if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6)
> - /*
> - * timer_init() does not exist on PPC systems. The timer is initialized
> - * and enabled (decrementer) in interrupt_init() here.
> - */
> timer_init();
> -#endif
> if (CONFIG_IS_ENABLED(BLOBLIST)) {
> ret = bloblist_init();
> if (ret) {
Re: [RFC PATCH v2 0/8] ATF and OP-TEE Firewalling for K3 devices.
On 9/26/23 2:58 AM, Manorit Chawdhry wrote: K3 devices have firewalls that are used to prevent illegal accesses to memory regions that are deemed secure. The series prevents the illegal accesses to ATF and OP-TEE regions that are present in different K3 devices. AM62AX and AM64X are currently in hold due to some firewall configurations that our System Controller (TIFS) needs to handle. Signed-off-by: Manorit Chawdhry --- You have mixed tabs and spaces in the .dtsi patches. Andrew Changes in v2: Andrew: - Make the firewall DTS more readable with CONSTANTS Neha: - Move GetHexOctet to dtoc for common usage - Update the documentation in ti-secure - s/indentifier/identifier/ - Add firewall binman test - Remove slave firewall multiple background regions ( Single firewall region works fine ) - Add a check in the subnodes to check for the node.name 'firewall' - Change firewall indexing with id and region number so that it is easy to purge out firewalls and we don't need to redo the numbering. - Add information for all the firewalls. - Link to v1: https://lore.kernel.org/u-boot/20230905-binman-firewalling-v1-0-3894520bf...@ti.com/ --- Manorit Chawdhry (8): dtoc: openssl: Add GetHexOctet method binman: ti-secure: Add support for firewalling entities binman: ftest: Add test for ti-secure firewall node binman: k3: add k3-security.h and include it in k3-binman.dtsi binman: j721e: Add firewall configurations for atf binman: am62x: Add firewalling configurations binman: j721s2: Add firewall configurations binman: j7200: Add firewall configurations arch/arm/dts/k3-am625-sk-binman.dtsi | 49 +++ arch/arm/dts/k3-binman.dtsi | 2 + arch/arm/dts/k3-j7200-binman.dtsi| 137 ++ arch/arm/dts/k3-j721e-binman.dtsi| 183 arch/arm/dts/k3-j721s2-binman.dtsi | 206 +++ arch/arm/dts/k3-security.h | 58 tools/binman/btool/openssl.py| 16 ++- tools/binman/etype/ti_secure.py | 85 +++ tools/binman/etype/x509_cert.py | 3 +- tools/binman/ftest.py| 12 ++ tools/binman/test/311_ti_secure_firewall.dts | 28 tools/dtoc/fdt_util.py | 20 +++ 12 files changed, 796 insertions(+), 3 deletions(-) --- base-commit: 2fe4b54556ea6271237b35de68dc458bfceab94c change-id: 20230724-binman-firewalling-65ecdb23ec0a Best regards,
Re: [PATCHv10 01/15] submodule: add lwIP as git submodule
On Tue, Sep 26, 2023 at 08:16:35AM -0600, Simon Glass wrote: > Hi Tom, > > On Tue, 26 Sept 2023 at 07:41, Tom Rini wrote: > > > > On Tue, Sep 26, 2023 at 05:37:25AM -0600, Simon Glass wrote: > > > Hi Maxim, > > > > > > On Tue, 26 Sept 2023 at 03:43, Maxim Uvarov > > > wrote: > > > > > > > > add external lwIP library as a git submodule. > > > > Use STABLE-2_2_0_RELEASE tag. > > > > > > > > Signed-off-by: Maxim Uvarov > > > > --- > > > > .gitmodules| 3 +++ > > > > net/lwip/lwip-external | 1 + > > > > 2 files changed, 4 insertions(+) > > > > create mode 100644 .gitmodules > > > > create mode 16 net/lwip/lwip-external > > > > Do you have comments on the rest of the series? > > Not yet, but I should be able to review the rest in a few days. My > main comments before were minor - return codes, tests, error checking. OK, thanks. I don't know how exactly I want to proceed with the core of lwip itself, but that doesn't block reviewing and testing the rest of it as we'll move forward with it one way or another. -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 2/2] test: lmb: Add test for coalescing and overlap range
On Tue, 26 Sept 2023 at 05:25, Udit Kumar wrote: > > Add test case for an address range which is coalescing with one of > range and overlapping with next range > > Cc: Simon Glass > Signed-off-by: Udit Kumar > --- > test/lib/lmb.c | 13 - > 1 file changed, 12 insertions(+), 1 deletion(-) > Reviewed-by: Simon Glass
Re: [PATCHv10 01/15] submodule: add lwIP as git submodule
Hi Tom, On Tue, 26 Sept 2023 at 07:41, Tom Rini wrote: > > On Tue, Sep 26, 2023 at 05:37:25AM -0600, Simon Glass wrote: > > Hi Maxim, > > > > On Tue, 26 Sept 2023 at 03:43, Maxim Uvarov wrote: > > > > > > add external lwIP library as a git submodule. > > > Use STABLE-2_2_0_RELEASE tag. > > > > > > Signed-off-by: Maxim Uvarov > > > --- > > > .gitmodules| 3 +++ > > > net/lwip/lwip-external | 1 + > > > 2 files changed, 4 insertions(+) > > > create mode 100644 .gitmodules > > > create mode 16 net/lwip/lwip-external > > Do you have comments on the rest of the series? Not yet, but I should be able to review the rest in a few days. My main comments before were minor - return codes, tests, error checking. Regards, Simon
[PATCH v4 41/44] spl: Add C-based runtime detection of SPL
The spl_phase() function indicates whether U-Boot is in SPL and before
or after relocation. But sometimes it is useful to check for SPL with
zero code-size impact. Since spl_phase() checks the global_data flags,
it does add a few bytes.
Add a new spl_in_proper() function to check if U-Boot proper is
running, regardless of the relocation status.
Signed-off-by: Simon Glass
---
Changes in v4:
- Add new patch with C-based runtime detection of SPL
include/spl.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/spl.h b/include/spl.h
index e958ace2cc62..a3510edecf24 100644
--- a/include/spl.h
+++ b/include/spl.h
@@ -132,6 +132,16 @@ static inline enum u_boot_phase spl_phase(void)
#endif
}
+/* returns true if in U-Boot proper, false if in SPL */
+static inline bool spl_in_proper(void)
+{
+#ifdef CONFIG_SPL_BUILD
+ return false;
+#endif
+
+ return true;
+}
+
/**
* spl_prev_phase() - Figure out the previous U-Boot phase
*
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 44/44] pci: serial: Support reading PCI-register size with base
The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.
Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.
A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.
Signed-off-by: Simon Glass
---
Changes in v4:
- Avoid reading size except in SPL
arch/sandbox/dts/test.dts | 6 +++---
drivers/core/fdtaddr.c | 6 +++---
drivers/core/ofnode.c | 11 ---
drivers/core/read.c | 6 --
drivers/core/util.c | 2 +-
drivers/pci/pci-uclass.c| 2 +-
drivers/pci/pci_mvebu.c | 3 ++-
drivers/pci/pci_tegra.c | 2 +-
drivers/pci/pcie_mediatek.c | 4 ++--
drivers/serial/ns16550.c| 16 +++-
include/dm/fdtaddr.h| 3 ++-
include/dm/ofnode.h | 4 +++-
include/dm/read.h | 8 +---
include/ns16550.h | 4 +++-
include/serial.h| 2 ++
test/dm/pci.c | 14 ++
16 files changed, 61 insertions(+), 32 deletions(-)
diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 9a863ea732ff..e58cb9c08722 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -1123,8 +1123,8 @@
pci@1,0 {
compatible = "pci-generic";
/* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
- reg = <0x02000814 0 0 0 0
- 0x01000810 0 0 0 0>;
+ reg = <0x02000814 0 0 0x80 0
+ 0x01000810 0 0 0xc0 0>;
sandbox,emul = <&swap_case_emul0_1>;
};
p2sb-pci@2,0 {
@@ -1151,7 +1151,7 @@
pci@1f,0 {
compatible = "pci-generic";
/* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
- reg = <0x0100f810 0 0 0 0>;
+ reg = <0x0100f810 0 0 0x100 0>;
sandbox,emul = <&swap_case_emul0_1f>;
};
};
diff --git a/drivers/core/fdtaddr.c b/drivers/core/fdtaddr.c
index 546db675aaf6..b79d138c4196 100644
--- a/drivers/core/fdtaddr.c
+++ b/drivers/core/fdtaddr.c
@@ -215,7 +215,7 @@ void *devfdt_map_physmem(const struct udevice *dev,
unsigned long size)
return map_physmem(addr, size, MAP_NOCACHE);
}
-fdt_addr_t devfdt_get_addr_pci(const struct udevice *dev)
+fdt_addr_t devfdt_get_addr_pci(const struct udevice *dev, fdt_size_t *sizep)
{
ulong addr;
@@ -226,12 +226,12 @@ fdt_addr_t devfdt_get_addr_pci(const struct udevice *dev)
int ret;
ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_MEM32,
- "reg", &pci_addr);
+ "reg", &pci_addr, sizep);
if (ret) {
/* try if there is any i/o-mapped register */
ret = ofnode_read_pci_addr(dev_ofnode(dev),
FDT_PCI_SPACE_IO, "reg",
- &pci_addr);
+ &pci_addr, sizep);
if (ret)
return FDT_ADDR_T_NONE;
}
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 18d2eb0f1186..29a429451020 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1270,7 +1270,8 @@ const uint8_t *ofnode_read_u8_array_ptr(ofnode node,
const char *propname,
}
int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space type,
-const char *propname, struct fdt_pci_addr *addr)
+const char *propname, struct fdt_pci_addr *addr,
+fdt_size_t *size)
{
const fdt32_t *cell;
int len;
@@ -1298,14 +1299,18 @@ int ofnode_read_pci_addr(ofnode node, enum
fdt_pci_space type,
(ulong)fdt32_to_cpu(cell[1]),
(ulong)fdt32_to_cpu(cell[2]));
if ((fdt32_to_cpu(*cell) & type) == type) {
+ const unaligned_fdt64_t *ptr;
+
addr->phys_hi = fdt32_to_cpu(cell[0]);
addr->phys_mid = fdt32_to_cpu(cell[1]);
addr->phys_lo = fdt32_to_cpu(cell[2]);
+ ptr = (const unaligned_fdt64_t *)(cell + 3);
+ if (size)
+ *size = fdt64_to_cpu(*ptr);
break;
}
- cell += (FDT_PCI_ADDR_CELLS +
-
[PATCH v4 35/44] sandbox: Only read the state if we have a state file
We should not read this unless requested. Make it conditional on the
option being provided.
Add some debugging to show the state being written.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/sandbox/cpu/start.c | 8 +---
arch/sandbox/cpu/state.c | 1 +
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index 8582f05162fa..2c8a72590b55 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -522,9 +522,11 @@ int sandbox_main(int argc, char *argv[])
state->ram_buf_fname = NULL;
}
- ret = sandbox_read_state(state, state->state_fname);
- if (ret)
- goto err;
+ if (state->read_state && state->state_fname) {
+ ret = sandbox_read_state(state, state->state_fname);
+ if (ret)
+ goto err;
+ }
if (state->handle_signals) {
ret = os_setup_signal_handlers();
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c
index fcc0028ff4a2..e38bb248b7ff 100644
--- a/arch/sandbox/cpu/state.c
+++ b/arch/sandbox/cpu/state.c
@@ -521,6 +521,7 @@ int state_uninit(void)
printf("Failed to write sandbox state\n");
return -1;
}
+ log_debug("Wrote state to file '%s'\n", state->ram_buf_fname);
}
/* Delete this at the last moment so as not to upset gdb too much */
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 43/44] dm: core: Tweak device_is_on_pci_bus() for code size
This function cannot return true if PCI is not enabled, since no PCI
devices will have been bound. Add a check for this to reduce code size
where it is used.
Signed-off-by: Simon Glass
---
Changes in v4:
- Add new patch to tweak device_is_on_pci_bus() for code size
include/dm/device.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/dm/device.h b/include/dm/device.h
index e54cb6bca415..add67f9ec06f 100644
--- a/include/dm/device.h
+++ b/include/dm/device.h
@@ -1005,7 +1005,8 @@ int dev_enable_by_path(const char *path);
*/
static inline bool device_is_on_pci_bus(const struct udevice *dev)
{
- return dev->parent && device_get_uclass_id(dev->parent) == UCLASS_PCI;
+ return CONFIG_IS_ENABLED(PCI) && dev->parent &&
+ device_get_uclass_id(dev->parent) == UCLASS_PCI;
}
/**
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 42/44] serial: Drop ns16550 serial_getinfo() in SPL
This is typically not needed in SPL/TPL and increases the code size. Drop it. Signed-off-by: Simon Glass --- Changes in v4: - Add new patch to drop ns16550 serial_getinfo() in SPL drivers/serial/ns16550.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index eab9537fbae5..5ca2828ae853 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -472,6 +473,10 @@ static int ns16550_serial_getinfo(struct udevice *dev, struct ns16550 *const com_port = dev_get_priv(dev); struct ns16550_plat *plat = com_port->plat; + /* save code size */ + if (!spl_in_proper()) + return -ENOSYS; + info->type = SERIAL_CHIP_16550_COMPATIBLE; #ifdef CONFIG_SYS_NS16550_PORT_MAPPED info->addr_space = SERIAL_ADDRESS_SPACE_IO; -- 2.42.0.515.g380fc7ccd1-goog
[PATCH v4 39/44] fdt: Allow the devicetree to come from a bloblist
Standard passage provides for a bloblist to be passed from one firmware
phase to the next. That can be used to pass the devicetree along as well.
Add an option to support this.
Tests for this will be added as part of the Universal Payload work.
Signed-off-by: Simon Glass
---
Changes in v4:
- Use an #ifdef to avoid adding a string
Changes in v2:
- No changes as it still seems unclear what should be done
common/bloblist.c | 1 +
doc/develop/devicetree/control.rst | 3 ++
dts/Kconfig| 8 ++
include/bloblist.h | 5
include/fdtdec.h | 3 +-
lib/fdtdec.c | 46 ++
6 files changed, 53 insertions(+), 13 deletions(-)
diff --git a/common/bloblist.c b/common/bloblist.c
index a22f6c12b0c7..b07ede11cfe2 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -48,6 +48,7 @@ static struct tag_name {
{ BLOBLISTT_ACPI_TABLES, "ACPI tables for x86" },
{ BLOBLISTT_SMBIOS_TABLES, "SMBIOS tables for x86" },
{ BLOBLISTT_VBOOT_CTX, "Chrome OS vboot context" },
+ { BLOBLISTT_CONTROL_FDT, "Control FDT" },
/* BLOBLISTT_PROJECT_AREA */
{ BLOBLISTT_U_BOOT_SPL_HANDOFF, "SPL hand-off" },
diff --git a/doc/develop/devicetree/control.rst
b/doc/develop/devicetree/control.rst
index cbb65c9b177f..56e00090166f 100644
--- a/doc/develop/devicetree/control.rst
+++ b/doc/develop/devicetree/control.rst
@@ -108,6 +108,9 @@ If CONFIG_OF_BOARD is defined, a board-specific routine
will provide the
devicetree at runtime, for example if an earlier bootloader stage creates
it and passes it to U-Boot.
+If CONFIG_OF_BLOBLIST is defined, the devicetree comes from a bloblist passed
+from a previous stage.
+
If CONFIG_SANDBOX is defined, then it will be read from a file on
startup. Use the -d flag to U-Boot to specify the file to read, -D for the
default and -T for the test devicetree, used to run sandbox unit tests.
diff --git a/dts/Kconfig b/dts/Kconfig
index 9152f5885e9a..6c1edbddb57b 100644
--- a/dts/Kconfig
+++ b/dts/Kconfig
@@ -105,6 +105,14 @@ config OF_EMBED
endchoice
+config OF_BLOBLIST
+ bool "DTB is provided by a bloblist"
+ help
+ Select this to read the devicetree from the bloblist. This allows
+ using a bloblist to transfer the devicetree between U-Boot phases.
+ The devicetree is stored in the bloblist by an early phase so that
+ U-Boot can read it.
+
config OF_BOARD
bool "Provided by the board (e.g a previous loader) at runtime"
default y if SANDBOX || OF_HAS_PRIOR_STAGE
diff --git a/include/bloblist.h b/include/bloblist.h
index 080cc46a1266..e16d122f4fb1 100644
--- a/include/bloblist.h
+++ b/include/bloblist.h
@@ -103,6 +103,11 @@ enum bloblist_tag_t {
BLOBLISTT_ACPI_TABLES = 0x104, /* ACPI tables for x86 */
BLOBLISTT_SMBIOS_TABLES = 0x105, /* SMBIOS tables for x86 */
BLOBLISTT_VBOOT_CTX = 0x106,/* Chromium OS verified boot context */
+ /*
+* Devicetree for use by firmware. On some platforms this is passed to
+* the OS also
+*/
+ BLOBLISTT_CONTROL_FDT = 0x107,
/*
* Project-specific tags are permitted here. Projects can be open source
diff --git a/include/fdtdec.h b/include/fdtdec.h
index bd1149f46d08..1888c4645619 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -72,7 +72,7 @@ struct bd_info;
* U-Boot is packaged as an ELF file, e.g. for debugging purposes
* @FDTSRC_ENV: Provided by the fdtcontroladdr environment variable. This
should
* be used for debugging/development only
- * @FDTSRC_NONE: No devicetree at all
+ * @FDTSRC_BLOBLIST: Provided by a bloblist from an earlier phase
*/
enum fdt_source_t {
FDTSRC_SEPARATE,
@@ -80,6 +80,7 @@ enum fdt_source_t {
FDTSRC_BOARD,
FDTSRC_EMBED,
FDTSRC_ENV,
+ FDTSRC_BLOBLIST,
};
/*
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 7a6916764835..99837517623f 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -7,7 +7,11 @@
*/
#ifndef USE_HOSTCC
+
+#define LOG_CATEGORY LOGC_DT
+
#include
+#include
#include
#include
#include
@@ -87,6 +91,9 @@ static const char *const fdt_src_name[] = {
[FDTSRC_BOARD] = "board",
[FDTSRC_EMBED] = "embed",
[FDTSRC_ENV] = "env",
+#if CONFIG_IS_ENABLED(BLOBLIST)
+ [FDTSRC_BLOBLIST] = "bloblist",
+#endif
};
const char *fdtdec_get_srcname(void)
@@ -1666,20 +1673,35 @@ int fdtdec_setup(void)
int ret;
/* The devicetree is typically appended to U-Boot */
- if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
- gd->fdt_blob = fdt_find_separate();
- gd->fdt_src = FDTSRC_SEPARATE;
- } else { /* embed dtb in ELF file for testing / development */
- gd->fdt_blob = dtb_dt_embedded();
- gd->fdt_src = FDTSRC_EMBED;
- }
-
- /* Allow the board to override t
[PATCH v4 40/44] command: Include a required header in command.h
This uses ARRAY_SIZE() but does not include the header file which declares it. Fix this, so that command.h can be included without common.h Signed-off-by: Simon Glass --- (no changes since v1) include/command.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/command.h b/include/command.h index ae7bb4a30b05..8aebf7a95bf8 100644 --- a/include/command.h +++ b/include/command.h @@ -15,6 +15,9 @@ #include +/* For ARRAY_SIZE() */ +#include + #ifndef NULL #define NULL 0 #endif -- 2.42.0.515.g380fc7ccd1-goog
[PATCH v4 38/44] bloblist: Add missing name
Add a missing bloblist name.
Signed-off-by: Simon Glass
---
Changes in v4:
- Split all new bloblist names into a separate patch
common/bloblist.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/common/bloblist.c b/common/bloblist.c
index 6f2a4577708d..a22f6c12b0c7 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -51,6 +51,7 @@ static struct tag_name {
/* BLOBLISTT_PROJECT_AREA */
{ BLOBLISTT_U_BOOT_SPL_HANDOFF, "SPL hand-off" },
+ { BLOBLISTT_VBE, "VBE" },
{ BLOBLISTT_U_BOOT_VIDEO, "SPL video handoff" },
/* BLOBLISTT_VENDOR_AREA */
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 37/44] bloblist: Support initing from multiple places
Typically the bloblist is set up after the devicetree is present. This
makes sense because bloblist may use malloc() to allocate the space it
needs.
However sometimes the devicetree itself may be present in the bloblist.
In that case it is at a known location in memory so we can init the
bloblist very early, before devicetree.
Add a flag to indicate whether the bloblist has been inited. Add a
function to init it only if needed. Use that in the init sequence.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/bloblist.c | 13 -
common/board_f.c | 4 +---
include/asm-generic/global_data.h | 4
include/bloblist.h| 18 ++
4 files changed, 35 insertions(+), 4 deletions(-)
diff --git a/common/bloblist.c b/common/bloblist.c
index 2144b10e1d04..6f2a4577708d 100644
--- a/common/bloblist.c
+++ b/common/bloblist.c
@@ -476,6 +476,17 @@ int bloblist_init(void)
log_debug("Found existing bloblist size %lx at %lx\n", size,
addr);
}
+ if (ret)
+ return log_msg_ret("ini", ret);
+ gd->flags |= GD_FLG_BLOBLIST_READY;
+
+ return 0;
+}
- return ret;
+int bloblist_maybe_init(void)
+{
+ if (CONFIG_IS_ENABLED(BLOBLIST) && !(gd->flags & GD_FLG_BLOBLIST_READY))
+ return bloblist_init();
+
+ return 0;
}
diff --git a/common/board_f.c b/common/board_f.c
index 99c2a43c1961..d4d7d01f8f6e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -841,9 +841,7 @@ static const init_fnc_t init_sequence_f[] = {
log_init,
initf_bootstage,/* uses its own timer, so does not need DM */
event_init,
-#ifdef CONFIG_BLOBLIST
- bloblist_init,
-#endif
+ bloblist_maybe_init,
setup_spl_handoff,
#if defined(CONFIG_CONSOLE_RECORD_INIT_F)
console_record_init,
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index 937fb12516c1..e8c6412e3f8d 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -693,6 +693,10 @@ enum gd_flags {
* the memory used to holds its tables has been mapped out.
*/
GD_FLG_DM_DEAD = 0x40,
+ /**
+* @GD_FLG_BLOBLIST_READY: bloblist is ready for use
+*/
+ GD_FLG_BLOBLIST_READY = 0x80,
};
#endif /* __ASSEMBLY__ */
diff --git a/include/bloblist.h b/include/bloblist.h
index 7ea72c6bd46d..080cc46a1266 100644
--- a/include/bloblist.h
+++ b/include/bloblist.h
@@ -413,8 +413,26 @@ void bloblist_reloc(void *to, uint to_size, void *from,
uint from_size);
* standard passage. The size is detected automatically so CONFIG_BLOBLIST_SIZE
* can be 0.
*
+ * Sets GD_FLG_BLOBLIST_READY in global_data flags on success
+ *
* Return: 0 if OK, -ve on error
*/
int bloblist_init(void);
+#if CONFIG_IS_ENABLED(BLOBLIST)
+/**
+ * bloblist_maybe_init() - Init the bloblist system if not already done
+ *
+ * Calls bloblist_init() if the GD_FLG_BLOBLIST_READY flag is not et
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int bloblist_maybe_init(void);
+#else
+static inline int bloblist_maybe_init(void)
+{
+ return 0;
+}
+#endif /* BLOBLIST */
+
#endif /* __BLOBLIST_H */
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 36/44] sandbox: Move the bloblist down a little in memory
Move this down by 4KB so that it is large enough to hold the devicetree. Also fix up the devicetree address in the documetation while we are here. Signed-off-by: Simon Glass --- (no changes since v1) common/Kconfig | 2 +- doc/arch/sandbox/sandbox.rst | 4 ++-- test/lib/kconfig.c | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/common/Kconfig b/common/Kconfig index 21eaa5e815f9..5e79b5422178 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1012,7 +1012,7 @@ endchoice config BLOBLIST_ADDR hex "Address of bloblist" - default 0xc000 if SANDBOX + default 0xb000 if SANDBOX depends on BLOBLIST_FIXED help Sets the address of the bloblist, set up by the first part of U-Boot diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index a3631de74932..23902dee89e7 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -614,8 +614,8 @@ that are mapped into that memory: === === Addr Config Usage === === - 0 CONFIG_SYS_FDT_LOAD_ADDR Device tree - c000 CONFIG_BLOBLIST_ADDR Blob list +100 CONFIG_SYS_FDT_LOAD_ADDR Device tree + b000 CONFIG_BLOBLIST_ADDR Blob list 1 CFG_MALLOC_F_ADDR Early memory allocation f CONFIG_PRE_CON_BUF_ADDRPre-console buffer 10 CONFIG_TRACE_EARLY_ADDREarly trace buffer (if enabled). Also used diff --git a/test/lib/kconfig.c b/test/lib/kconfig.c index 76225ba8ffa9..3914f699659f 100644 --- a/test/lib/kconfig.c +++ b/test/lib/kconfig.c @@ -22,9 +22,9 @@ static int lib_test_is_enabled(struct unit_test_state *uts) ut_asserteq(0, CONFIG_IS_ENABLED(OF_PLATDATA)); ut_asserteq(0, CONFIG_IS_ENABLED(_UNDEFINED)); - ut_asserteq(0xc000, + ut_asserteq(0xb000, IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED, CONFIG_BLOBLIST_ADDR)); - ut_asserteq(0xc000, + ut_asserteq(0xb000, CONFIG_IF_ENABLED_INT(BLOBLIST_FIXED, BLOBLIST_ADDR)); /* -- 2.42.0.515.g380fc7ccd1-goog
[PATCH v4 34/44] sandbox: Init the EC properly even if no state file is available
This currently relies on sandbox attempting to read a state file. At
present it always does, even when there is no state file, in which case it
fails, but still inits the EC.
That is a bug, so update this driver to set the current image always, even
if no state is read.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/misc/cros_ec_sandbox.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/misc/cros_ec_sandbox.c b/drivers/misc/cros_ec_sandbox.c
index 8dbe0b188a48..1201535f4af4 100644
--- a/drivers/misc/cros_ec_sandbox.c
+++ b/drivers/misc/cros_ec_sandbox.c
@@ -81,6 +81,7 @@ struct ec_pwm_channel {
/**
* struct ec_state - Information about the EC state
*
+ * @valid: true if this struct contains valid state data
* @vbnv_context: Vboot context data stored by EC
* @ec_config: FDT config information about the EC (e.g. flashmap)
* @flash_data: Contents of flash memory
@@ -95,6 +96,7 @@ struct ec_pwm_channel {
* @pwm: Information per PWM channel
*/
struct ec_state {
+ bool valid;
u8 vbnv_context[EC_VBNV_BLOCK_SIZE_V2];
struct fdt_cros_ec ec_config;
uint8_t *flash_data;
@@ -145,6 +147,7 @@ static int cros_ec_read_state(const void *blob, int node)
memcpy(ec->flash_data, prop, len);
debug("%s: Loaded EC flash data size %#x\n", __func__, len);
}
+ ec->valid = true;
return 0;
}
@@ -589,6 +592,7 @@ static int process_cmd(struct ec_state *ec,
printf(" ** Unknown EC command %#02x\n", req_hdr->command);
return -1;
}
+ debug(" - EC command %#0x, result %d\n", req_hdr->command, len);
return len;
}
@@ -675,7 +679,10 @@ int cros_ec_probe(struct udevice *dev)
ofnode node;
int err;
- memcpy(ec, &s_state, sizeof(*ec));
+ if (s_state.valid)
+ memcpy(ec, &s_state, sizeof(*ec));
+ else
+ ec->current_image = EC_IMAGE_RO;
err = cros_ec_decode_ec_flash(dev, &ec->ec_config);
if (err) {
debug("%s: Cannot device EC flash\n", __func__);
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 33/44] sandbox: Move reading the RAM buffer into a better place
This should not happen in the argument-parsing function. Move it to the
main program.
Add some debugging for reading/writing.
Signed-off-by: Simon Glass
---
(no changes since v1)
arch/sandbox/cpu/start.c | 19 +++
arch/sandbox/cpu/state.c | 1 +
2 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
index bbd9e77afed9..8582f05162fa 100644
--- a/arch/sandbox/cpu/start.c
+++ b/arch/sandbox/cpu/start.c
@@ -272,17 +272,9 @@ SANDBOX_CMDLINE_OPT_SHORT(program, 'p', 1, "U-Boot program
name");
static int sandbox_cmdline_cb_memory(struct sandbox_state *state,
const char *arg)
{
- int err;
-
/* For now assume we always want to write it */
state->write_ram_buf = true;
state->ram_buf_fname = arg;
-
- err = os_read_ram_buf(arg);
- if (err) {
- printf("Failed to read RAM buffer '%s': %d\n", arg, err);
- return err;
- }
state->ram_buf_read = true;
return 0;
@@ -512,6 +504,17 @@ int sandbox_main(int argc, char *argv[])
if (os_parse_args(state, argc, argv))
return 1;
+ if (state->ram_buf_fname) {
+ ret = os_read_ram_buf(state->ram_buf_fname);
+ if (ret) {
+ printf("Failed to read RAM buffer '%s': %d\n",
+ state->ram_buf_fname, ret);
+ } else {
+ state->ram_buf_read = true;
+ log_debug("Read RAM buffer from '%s'\n",
state->ram_buf_fname);
+ }
+ }
+
/* Remove old memory file if required */
if (state->ram_buf_rm && state->ram_buf_fname) {
os_unlink(state->ram_buf_fname);
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c
index d67834988fd4..fcc0028ff4a2 100644
--- a/arch/sandbox/cpu/state.c
+++ b/arch/sandbox/cpu/state.c
@@ -513,6 +513,7 @@ int state_uninit(void)
printf("Failed to write RAM buffer\n");
return err;
}
+ log_debug("Wrote RAM to file '%s'\n", state->ram_buf_fname);
}
if (state->write_state) {
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 32/44] dm: core: Add tests for oftree_path()
Add a few simple tests for getting the root node, since this is handled
as a special case in the implementation.
Signed-off-by: Simon Glass
---
(no changes since v1)
test/dm/ofnode.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index e078a9755a83..a5bc43aea4e7 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -228,6 +228,9 @@ static int dm_test_ofnode_read(struct unit_test_state *uts)
ofnode node;
int size;
+ node = oftree_path(oftree_default(), "/");
+ ut_assert(ofnode_valid(node));
+
node = ofnode_path("/a-test");
ut_assert(ofnode_valid(node));
@@ -256,6 +259,9 @@ static int dm_test_ofnode_read_ot(struct unit_test_state
*uts)
ofnode node;
int size;
+ node = oftree_path(otree, "/");
+ ut_assert(ofnode_valid(node));
+
node = oftree_path(otree, "/node/subnode");
ut_assert(ofnode_valid(node));
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 31/44] dm: core: Support writing a 64-bit value
Add support for writing a single 64-bit value into a property.
Repurpose the existing tests to handle this case too.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/core/ofnode.c | 17 -
include/dm/ofnode.h | 10 ++
test/dm/ofnode.c | 15 +--
3 files changed, 39 insertions(+), 3 deletions(-)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 4dcb3dd1c037..18d2eb0f1186 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1621,7 +1621,22 @@ int ofnode_write_u32(ofnode node, const char *propname,
u32 value)
return -ENOMEM;
*val = cpu_to_fdt32(value);
- return ofnode_write_prop(node, propname, val, sizeof(value), false);
+ return ofnode_write_prop(node, propname, val, sizeof(value), true);
+}
+
+int ofnode_write_u64(ofnode node, const char *propname, u64 value)
+{
+ fdt64_t *val;
+
+ assert(ofnode_valid(node));
+
+ log_debug("%s = %llx", propname, (unsigned long long)value);
+ val = malloc(sizeof(*val));
+ if (!val)
+ return -ENOMEM;
+ *val = cpu_to_fdt64(value);
+
+ return ofnode_write_prop(node, propname, val, sizeof(value), true);
}
int ofnode_write_bool(ofnode node, const char *propname, bool value)
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index ebea29d32afc..ef1437cc5562 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1461,6 +1461,16 @@ int ofnode_write_string(ofnode node, const char
*propname, const char *value);
*/
int ofnode_write_u32(ofnode node, const char *propname, u32 value);
+/**
+ * ofnode_write_u64() - Set an integer property of an ofnode
+ *
+ * @node: The node for whose string property should be set
+ * @propname: The name of the string property to set
+ * @value: The new value of the 64-bit integer property
+ * Return: 0 if successful, -ve on error
+ */
+int ofnode_write_u64(ofnode node, const char *propname, u64 value);
+
/**
* ofnode_write_bool() - Set a boolean property of an ofnode
*
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 9477f791d649..e078a9755a83 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -1009,7 +1009,8 @@ static int dm_test_ofnode_u32_array(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_u32_array, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
-static int dm_test_ofnode_read_u64(struct unit_test_state *uts)
+/* test ofnode_read_u64() and ofnode_write_u64() */
+static int dm_test_ofnode_u64(struct unit_test_state *uts)
{
ofnode node;
u64 val;
@@ -1018,6 +1019,10 @@ static int dm_test_ofnode_read_u64(struct
unit_test_state *uts)
ut_assert(ofnode_valid(node));
ut_assertok(ofnode_read_u64(node, "int64-value", &val));
ut_asserteq_64(0x, val);
+ ut_assertok(ofnode_write_u64(node, "new-int64-value", 0x9876543210));
+ ut_assertok(ofnode_read_u64(node, "new-int64-value", &val));
+ ut_asserteq_64(0x9876543210, val);
+
ut_asserteq(-EINVAL, ofnode_read_u64(node, "missing", &val));
ut_assertok(ofnode_read_u64_index(node, "int64-array", 0, &val));
@@ -1028,9 +1033,15 @@ static int dm_test_ofnode_read_u64(struct
unit_test_state *uts)
ofnode_read_u64_index(node, "int64-array", 2, &val));
ut_asserteq(-EINVAL, ofnode_read_u64_index(node, "missing", 0, &val));
+ ut_assertok(ofnode_write_u64(node, "int64-array", 0x9876543210));
+ ut_assertok(ofnode_read_u64_index(node, "int64-array", 0, &val));
+ ut_asserteq_64(0x9876543210, val);
+ ut_asserteq(-EOVERFLOW,
+ ofnode_read_u64_index(node, "int64-array", 1, &val));
+
return 0;
}
-DM_TEST(dm_test_ofnode_read_u64, UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_u64, UT_TESTF_SCAN_FDT);
static int dm_test_ofnode_add_subnode(struct unit_test_state *uts)
{
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 30/44] dm: core: Support writing a boolean
Add functions to write a boolean property. This involves deleting it if
the value is false.
Add a new ofnode_has_property() as well. Add a comment about the behaviour
of of_read_property() when the property value is empty.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/core/ofnode.c | 36 ++--
include/dm/ofnode.h | 32 +++-
test/dm/ofnode.c | 25 +
3 files changed, 90 insertions(+), 3 deletions(-)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 39ba480c8f88..4dcb3dd1c037 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -491,12 +491,12 @@ u64 ofnode_read_u64_default(ofnode node, const char
*propname, u64 def)
bool ofnode_read_bool(ofnode node, const char *propname)
{
- const void *prop;
+ bool prop;
assert(ofnode_valid(node));
debug("%s: %s: ", __func__, propname);
- prop = ofnode_get_property(node, propname, NULL);
+ prop = ofnode_has_property(node, propname);
debug("%s\n", prop ? "true" : "false");
@@ -1168,6 +1168,14 @@ const void *ofnode_get_property(ofnode node, const char
*propname, int *lenp)
propname, lenp);
}
+bool ofnode_has_property(ofnode node, const char *propname)
+{
+ if (ofnode_is_np(node))
+ return of_find_property(ofnode_to_np(node), propname, NULL);
+ else
+ return ofnode_get_property(node, propname, NULL);
+}
+
int ofnode_first_property(ofnode node, struct ofprop *prop)
{
prop->node = node;
@@ -1616,6 +1624,30 @@ int ofnode_write_u32(ofnode node, const char *propname,
u32 value)
return ofnode_write_prop(node, propname, val, sizeof(value), false);
}
+int ofnode_write_bool(ofnode node, const char *propname, bool value)
+{
+ if (value)
+ return ofnode_write_prop(node, propname, NULL, 0, false);
+ else
+ return ofnode_delete_prop(node, propname);
+}
+
+int ofnode_delete_prop(ofnode node, const char *propname)
+{
+ if (ofnode_is_np(node)) {
+ struct property *prop;
+ int len;
+
+ prop = of_find_property(ofnode_to_np(node), propname, &len);
+ if (prop)
+ return of_remove_property(ofnode_to_np(node), prop);
+ return 0;
+ } else {
+ return fdt_delprop(ofnode_to_fdt(node), ofnode_to_offset(node),
+ propname);
+ }
+}
+
int ofnode_set_enabled(ofnode node, bool value)
{
assert(ofnode_valid(node));
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index a8605fb718b2..ebea29d32afc 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1037,10 +1037,19 @@ int ofnode_decode_panel_timing(ofnode node,
* @node: node to read
* @propname: property to read
* @lenp: place to put length on success
- * Return: pointer to property, or NULL if not found
+ * Return: pointer to property value, or NULL if not found or empty
*/
const void *ofnode_get_property(ofnode node, const char *propname, int *lenp);
+/**
+ * ofnode_has_property() - check if a node has a named property
+ *
+ * @node: node to read
+ * @propname: property to read
+ * Return: true if the property exists in the node, false if not
+ */
+bool ofnode_has_property(ofnode node, const char *propname);
+
/**
* ofnode_first_property()- get the reference of the first property
*
@@ -1452,6 +1461,27 @@ int ofnode_write_string(ofnode node, const char
*propname, const char *value);
*/
int ofnode_write_u32(ofnode node, const char *propname, u32 value);
+/**
+ * ofnode_write_bool() - Set a boolean property of an ofnode
+ *
+ * This either adds or deleted a property with a zero-length value
+ *
+ * @node: The node for whose string property should be set
+ * @propname: The name of the string property to set
+ * @value: The new value of the boolean property
+ * Return: 0 if successful, -ve on error
+ */
+int ofnode_write_bool(ofnode node, const char *propname, bool value);
+
+/**
+ * ofnode_delete_prop() - Delete a property
+ *
+ * @node: Node containing the property to delete
+ * @propname: Name of property to delete
+ * Return: 0 if successful, -ve on error
+ */
+int ofnode_delete_prop(ofnode node, const char *propname);
+
/**
* ofnode_set_enabled() - Enable or disable a device tree node given by its
* ofnode
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index ceeb8e57791e..9477f791d649 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -1480,3 +1480,28 @@ static int dm_test_oftree_to_fdt(struct unit_test_state
*uts)
return 0;
}
DM_TEST(dm_test_oftree_to_fdt, UT_TESTF_SCAN_FDT);
+
+/* test ofnode_read_bool() and ofnode_write_bool() */
+static int dm_test_bool(struct unit_test_state *uts)
+{
+ const char *propname = "missing-bool-value";
+ ofnode node;
+
[PATCH v4 29/44] dm: core: Add a way to convert a devicetree to a dtb
Add a way to flatten a devicetree into binary form. For livetree this
involves generating the devicetree using fdt_property() and other calls.
For flattree it simply involves providing the buffer containing the tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/core/ofnode.c | 18 +++
include/dm/ofnode.h | 13 +
include/of_live.h | 10
lib/of_live.c | 122 ++
test/dm/ofnode.c | 24 +
5 files changed, 187 insertions(+)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index a5efedf6af32..39ba480c8f88 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -243,6 +243,24 @@ int oftree_new(oftree *treep)
#endif /* OFNODE_MULTI_TREE */
+int oftree_to_fdt(oftree tree, struct abuf *buf)
+{
+ int ret;
+
+ if (of_live_active()) {
+ ret = of_live_flatten(ofnode_to_np(oftree_root(tree)), buf);
+ if (ret)
+ return log_msg_ret("flt", ret);
+ } else {
+ void *fdt = oftree_lookup_fdt(tree);
+
+ abuf_init(buf);
+ abuf_set(buf, fdt, fdt_totalsize(fdt));
+ }
+
+ return 0;
+}
+
/**
* ofnode_from_tree_offset() - get an ofnode from a tree offset (flat tree)
*
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index f1ee02cd837f..a8605fb718b2 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -17,6 +17,7 @@
/* Enable checks to protect against invalid calls */
#undef OF_CHECKS
+struct abuf;
struct resource;
#include
@@ -136,6 +137,18 @@ static inline ofnode noffset_to_ofnode(ofnode other_node,
int of_offset)
*/
int oftree_new(oftree *treep);
+/**
+ * oftree_to_fdt() - Convert an oftree to a flat FDT
+ *
+ * @tree: tree to flatten (if livetree) or copy (if not)
+ * @buf: Returns inited buffer containing the newly created flat tree. Note
+ * that for flat tree the buffer is not allocated. In either case the caller
+ * must call abut_uninit() to free any memory used by @buf
+ * Return: 0 on success, -ENOMEM if out of memory, other -ve value for any
other
+ * error
+ */
+int oftree_to_fdt(oftree tree, struct abuf *buf);
+
/**
* ofnode_to_np() - convert an ofnode to a live DT node pointer
*
diff --git a/include/of_live.h b/include/of_live.h
index 81cb9bd13e2c..67bd5f02c744 100644
--- a/include/of_live.h
+++ b/include/of_live.h
@@ -9,6 +9,7 @@
#ifndef _OF_LIVE_H
#define _OF_LIVE_H
+struct abuf;
struct device_node;
/**
@@ -54,4 +55,13 @@ void of_live_free(struct device_node *root);
*/
int of_live_create_empty(struct device_node **rootp);
+/**
+ * of_live_flatten() - Create an FDT from a hierarchical tree
+ *
+ * @root: Root node of tree to convert
+ * @buf: Buffer to return the tree (inited by this function)
+ * Return: 0 if OK, -ENOMEM if out of memory
+ */
+int of_live_flatten(const struct device_node *root, struct abuf *buf);
+
#endif
diff --git a/lib/of_live.c b/lib/of_live.c
index e4eee3855476..812c488f6067 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -8,13 +8,21 @@
* Copyright (c) 2017 Google, Inc
*/
+#define LOG_CATEGORY LOGC_DT
+
#include
+#include
#include
#include
#include
#include
#include
#include
+#include
+
+enum {
+ BUF_STEP= SZ_64K,
+};
static void *unflatten_dt_alloc(void **mem, unsigned long size,
unsigned long align)
@@ -355,3 +363,117 @@ int of_live_create_empty(struct device_node **rootp)
return 0;
}
+
+static int check_space(int ret, struct abuf *buf)
+{
+ if (ret == -FDT_ERR_NOSPACE) {
+ if (!abuf_realloc_inc(buf, BUF_STEP))
+ return log_msg_ret("spc", -ENOMEM);
+ ret = fdt_resize(abuf_data(buf), abuf_data(buf),
+abuf_size(buf));
+ if (ret)
+ return log_msg_ret("res", -EFAULT);
+
+ return -EAGAIN;
+ }
+
+ return 0;
+}
+
+/**
+ * flatten_node() - Write out the node and its properties into a flat tree
+ */
+static int flatten_node(struct abuf *buf, const struct device_node *node)
+{
+ const struct device_node *np;
+ const struct property *pp;
+ int ret;
+
+ ret = fdt_begin_node(abuf_data(buf), node->name);
+ ret = check_space(ret, buf);
+ if (ret == -EAGAIN) {
+ ret = fdt_begin_node(abuf_data(buf), node->name);
+ if (ret) {
+ log_debug("Internal error a %d\n", ret);
+ return -EFAULT;
+ }
+ }
+ if (ret)
+ return log_msg_ret("beg", ret);
+
+ /* First write out the properties */
+ for (pp = node->properties; !ret && pp; pp = pp->next) {
+ ret = fdt_property(abuf_data(buf), pp->name, pp->value,
+ pp->length);
+ ret = check_space(ret, buf);
+ if (ret ==
[PATCH v4 28/44] dm: core: Add a way to delete a node
Add a function to delete a node in an existing tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/core/of_access.c | 65
drivers/core/ofnode.c| 23 ++
include/dm/of_access.h | 18 +++
include/dm/ofnode.h | 13
test/dm/ofnode.c | 31 +++
5 files changed, 150 insertions(+)
diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 1bb4d8eab709..c8db743f5298 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -1040,3 +1040,68 @@ int of_add_subnode(struct device_node *parent, const
char *name, int len,
return 0;
}
+
+int __of_remove_property(struct device_node *np, struct property *prop)
+{
+ struct property **next;
+
+ for (next = &np->properties; *next; next = &(*next)->next) {
+ if (*next == prop)
+ break;
+ }
+ if (!*next)
+ return -ENODEV;
+
+ /* found the node */
+ *next = prop->next;
+
+ return 0;
+}
+
+int of_remove_property(struct device_node *np, struct property *prop)
+{
+ int rc;
+
+ mutex_lock(&of_mutex);
+
+ rc = __of_remove_property(np, prop);
+
+ mutex_unlock(&of_mutex);
+
+ return rc;
+}
+
+int of_remove_node(struct device_node *to_remove)
+{
+ struct device_node *parent = to_remove->parent;
+ struct device_node *np, *prev;
+
+ if (!parent)
+ return -EPERM;
+ prev = NULL;
+ __for_each_child_of_node(parent, np) {
+ if (np == to_remove)
+ break;
+ prev = np;
+ }
+ if (!np)
+ return -EFAULT;
+
+ /* if there is a previous node, link it to this one's sibling */
+ if (prev)
+ prev->sibling = np->sibling;
+ else
+ parent->child = np->sibling;
+
+ /*
+* don't free it, since if this is an unflattened tree, all the memory
+* was alloced in one block; this pointer will be somewhere in the
+* middle of that
+*
+* TODO(s...@chromium.org): Consider marking nodes as 'allocated'?
+*
+* free(np);
+*/
+
+ return 0;
+}
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 403ee06ad94b..a5efedf6af32 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1779,6 +1779,29 @@ int ofnode_add_subnode(ofnode node, const char *name,
ofnode *subnodep)
return ret; /* 0 or -EEXIST */
}
+int ofnode_delete(ofnode *nodep)
+{
+ ofnode node = *nodep;
+ int ret;
+
+ assert(ofnode_valid(node));
+ if (ofnode_is_np(node)) {
+ ret = of_remove_node(ofnode_to_np(node));
+ } else {
+ void *fdt = ofnode_to_fdt(node);
+ int offset = ofnode_to_offset(node);
+
+ ret = fdt_del_node(fdt, offset);
+ if (ret)
+ ret = -EFAULT;
+ }
+ if (ret)
+ return ret;
+ *nodep = ofnode_null();
+
+ return 0;
+}
+
int ofnode_copy_props(ofnode dst, ofnode src)
{
struct ofprop prop;
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 9361d0a87bfb..de740d44674c 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -597,4 +597,22 @@ int of_write_prop(struct device_node *np, const char
*propname, int len,
int of_add_subnode(struct device_node *node, const char *name, int len,
struct device_node **subnodep);
+/**
+ * of_remove_property() - Remove a property from a node
+ *
+ * @np: Node to remove from
+ * @prop: Pointer to property to remove
+ * Return 0 if OK, -ENODEV if the property could not be found in the node
+ */
+int of_remove_property(struct device_node *np, struct property *prop);
+
+/**
+ * of_remove_node() - Remove a node from the tree
+ *
+ * @to_remove: Node to remove
+ * Return: 0 if OK, -EPERM if it is the root node (wWhich cannot be removed),
+ * -ENOENT if the tree is broken (to_remove is not a child of its parent)
+ */
+int of_remove_node(struct device_node *to_remove);
+
#endif
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 7eb04accd62c..f1ee02cd837f 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1635,4 +1635,17 @@ int ofnode_copy_props(ofnode dst, ofnode src);
int ofnode_copy_node(ofnode dst_parent, const char *name, ofnode src,
ofnode *nodep);
+/**
+ * ofnode_delete() - Delete a node
+ *
+ * Delete a node from the tree
+ *
+ * @nodep: Pointer to node to delete (set to ofnode_null() on success)
+ * Return: 0 if OK, -ENOENT if the node does not exist, -EPERM if it is the
root
+ * node (wWhich cannot be removed), -EFAULT if the tree is broken (to_remove is
+ * not a child of its parent),
+ *
+ */
+int ofnode_delete(ofnode *nodep);
+
#endif
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 5459a9afbb99..845
[PATCH v4 27/44] dm: core: Add a way to copy a node
Add a function to copy a node to another place under a new name. This is
useful at least for testing, since copying a test node with existing
properties is easier than writing the code to generate it all afresh.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/core/ofnode.c | 20 ++
include/dm/ofnode.h | 15 +++
test/dm/ofnode.c | 63 +++
3 files changed, 98 insertions(+)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index d2bdb8b9af1c..403ee06ad94b 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1802,3 +1802,23 @@ int ofnode_copy_props(ofnode dst, ofnode src)
return 0;
}
+
+int ofnode_copy_node(ofnode dst_parent, const char *name, ofnode src,
+ofnode *nodep)
+{
+ ofnode node;
+ int ret;
+
+ ret = ofnode_add_subnode(dst_parent, name, &node);
+ if (ret) {
+ if (ret == -EEXIST)
+ *nodep = node;
+ return log_msg_ret("add", ret);
+ }
+ ret = ofnode_copy_props(node, src);
+ if (ret)
+ return log_msg_ret("cpy", ret);
+ *nodep = node;
+
+ return 0;
+}
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 0b96ab34ede0..7eb04accd62c 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1620,4 +1620,19 @@ int ofnode_add_subnode(ofnode parent, const char *name,
ofnode *nodep);
*/
int ofnode_copy_props(ofnode dst, ofnode src);
+/**
+ * ofnode_copy_node() - Copy a node to another place
+ *
+ * If a node with this name already exists in dst_parent, this returns an
+ * .error
+ *
+ * @dst_parent: Parent of the newly copied node
+ * @name: Name to give the new node
+ * @src: Source node to copy
+ * @nodep: Returns the new node, or the existing node if there is one
+ * Return: 0 if OK, -EEXIST if dst_parent already has a node with this parent
+ */
+int ofnode_copy_node(ofnode dst_parent, const char *name, ofnode src,
+ofnode *nodep);
+
#endif
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 594116e3c045..5459a9afbb99 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -1362,3 +1362,66 @@ static int dm_test_oftree_new(struct unit_test_state
*uts)
return 0;
}
DM_TEST(dm_test_oftree_new, UT_TESTF_SCAN_FDT);
+
+static int check_copy_node(struct unit_test_state *uts, ofnode dst, ofnode src,
+ ofnode *nodep)
+{
+ u32 reg[2], val;
+ ofnode node;
+
+ ut_assertok(ofnode_copy_node(dst, "copy-test", src, &node));
+
+ ut_assertok(ofnode_read_u32(node, "ping-expect", &val));
+ ut_asserteq(3, val);
+
+ ut_asserteq_str("denx,u-boot-fdt-test",
+ ofnode_read_string(node, "compatible"));
+
+ /* check that a property with the same name is overwritten */
+ ut_assertok(ofnode_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)));
+ ut_asserteq(3, reg[0]);
+ ut_asserteq(1, reg[1]);
+
+ /* reset the compatible so the live tree does not change */
+ ut_assertok(ofnode_write_string(node, "compatible", "nothing"));
+ *nodep = node;
+
+ return 0;
+}
+
+static int dm_test_ofnode_copy_node(struct unit_test_state *uts)
+{
+ ofnode src, dst, node, try;
+
+ /*
+* These nodes are chosen so that the src node is before the destination
+* node in the tree. This doesn't matter with livetree, but with
+* flattree any attempt to insert a property earlier in the tree will
+* mess up the offsets after it.
+*/
+ src = ofnode_path("/b-test");
+ dst = ofnode_path("/some-bus");
+
+ ut_assertok(check_copy_node(uts, dst, src, &node));
+
+ /* check trying to copy over an existing node */
+ ut_asserteq(-EEXIST, ofnode_copy_node(dst, "copy-test", src, &try));
+ ut_asserteq(try.of_offset, node.of_offset);
+
+ return 0;
+}
+DM_TEST(dm_test_ofnode_copy_node, UT_TESTF_SCAN_FDT);
+
+/* test ofnode_copy_node() with the 'other' tree */
+static int dm_test_ofnode_copy_node_ot(struct unit_test_state *uts)
+{
+ oftree otree = get_other_oftree(uts);
+ ofnode src, dst, node;
+
+ src = ofnode_path("/b-test");
+ dst = oftree_path(otree, "/node/subnode2");
+ ut_assertok(check_copy_node(uts, dst, src, &node));
+
+ return 0;
+}
+DM_TEST(dm_test_ofnode_copy_node_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 26/44] dm: core: Add a function to create an empty tree
Provide a function to create a new, empty tree.
Signed-off-by: Simon Glass
---
(no changes since v1)
drivers/core/ofnode.c | 56 +++
include/dm/ofnode.h | 9 +++
include/of_live.h | 8 +++
lib/of_live.c | 19 +++
test/dm/ofnode.c | 16 +
5 files changed, 104 insertions(+), 4 deletions(-)
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 515396c62f49..d2bdb8b9af1c 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -47,6 +47,17 @@ static int oftree_find(const void *fdt)
return -1;
}
+static int check_tree_count(void)
+{
+ if (oftree_count == CONFIG_OFNODE_MULTI_TREE_MAX) {
+ log_warning("Too many registered device trees (max %d)\n",
+ CONFIG_OFNODE_MULTI_TREE_MAX);
+ return -E2BIG;
+ }
+
+ return 0;
+}
+
static oftree oftree_ensure(void *fdt)
{
oftree tree;
@@ -69,11 +80,8 @@ static oftree oftree_ensure(void *fdt)
if (gd->flags & GD_FLG_RELOC) {
i = oftree_find(fdt);
if (i == -1) {
- if (oftree_count == CONFIG_OFNODE_MULTI_TREE_MAX) {
- log_warning("Too many registered device trees
(max %d)\n",
- CONFIG_OFNODE_MULTI_TREE_MAX);
+ if (check_tree_count())
return oftree_null();
- }
/* register the new tree */
i = oftree_count++;
@@ -92,6 +100,41 @@ static oftree oftree_ensure(void *fdt)
return tree;
}
+int oftree_new(oftree *treep)
+{
+ oftree tree = oftree_null();
+ int ret;
+
+ if (of_live_active()) {
+ struct device_node *root;
+
+ ret = of_live_create_empty(&root);
+ if (ret)
+ return log_msg_ret("liv", ret);
+ tree = oftree_from_np(root);
+ } else {
+ const int size = 1024;
+ void *fdt;
+
+ ret = check_tree_count();
+ if (ret)
+ return log_msg_ret("fla", ret);
+
+ /* register the new tree with a small size */
+ fdt = malloc(size);
+ if (!fdt)
+ return log_msg_ret("fla", -ENOMEM);
+ ret = fdt_create_empty_tree(fdt, size);
+ if (ret)
+ return log_msg_ret("fla", -EINVAL);
+ oftree_list[oftree_count++] = fdt;
+ tree.fdt = fdt;
+ }
+ *treep = tree;
+
+ return 0;
+}
+
void oftree_dispose(oftree tree)
{
if (of_live_active())
@@ -193,6 +236,11 @@ static inline int oftree_find(const void *fdt)
return 0;
}
+int oftree_new(oftree *treep)
+{
+ return -ENOSYS;
+}
+
#endif /* OFNODE_MULTI_TREE */
/**
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 32917f661557..0b96ab34ede0 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -127,6 +127,15 @@ static inline ofnode noffset_to_ofnode(ofnode other_node,
int of_offset)
#endif /* OFNODE_MULTI_TREE */
+/**
+ * oftree_new() - Create a new, empty tree
+ *
+ * @treep: Returns a pointer to the tree, on success
+ * Returns: 0 on success, -ENOMEM if out of memory, -E2BIG if !OF_LIVE and
+ * there are too many (flattrees) already
+ */
+int oftree_new(oftree *treep);
+
/**
* ofnode_to_np() - convert an ofnode to a live DT node pointer
*
diff --git a/include/of_live.h b/include/of_live.h
index 05e86ac06b1a..81cb9bd13e2c 100644
--- a/include/of_live.h
+++ b/include/of_live.h
@@ -46,4 +46,12 @@ int unflatten_device_tree(const void *blob, struct
device_node **mynodes);
*/
void of_live_free(struct device_node *root);
+/**
+ * of_live_create_empty() - Create a new, empty tree
+ *
+ * @rootp: Returns the root node of the created tree
+ * Return: 0 if OK, -ENOMEM if out of memory
+ */
+int of_live_create_empty(struct device_node **rootp);
+
#endif
diff --git a/lib/of_live.c b/lib/of_live.c
index 25f7af61061e..e4eee3855476 100644
--- a/lib/of_live.c
+++ b/lib/of_live.c
@@ -336,3 +336,22 @@ void of_live_free(struct device_node *root)
/* the tree is stored as a contiguous block of memory */
free(root);
}
+
+int of_live_create_empty(struct device_node **rootp)
+{
+ struct device_node *root;
+
+ root = calloc(1, sizeof(struct device_node));
+ if (!root)
+ return -ENOMEM;
+ root->name = strdup("");
+ if (!root->name) {
+ free(root);
+ return -ENOMEM;
+ }
+ root->type = "";
+ root->full_name = "";
+ *rootp = root;
+
+ return 0;
+}
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 3bf97761d1ee..594116e3c045 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -1346,3 +1346,19 @@ static in
[PATCH v4 25/44] dm: core: Tidy up comments in the ofnode tests
Add comments to the functions where the test name does not indicate what
is being tested. Rename functions in a few cases, so that a search for the
function will also file its test.
Signed-off-by: Simon Glass
---
(no changes since v1)
test/dm/ofnode.c | 46 +++---
1 file changed, 39 insertions(+), 7 deletions(-)
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 6f21d66a95ef..3bf97761d1ee 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -91,6 +91,7 @@ void free_oftree(oftree tree)
free(tree.np);
}
+/* test ofnode_device_is_compatible() */
static int dm_test_ofnode_compatible(struct unit_test_state *uts)
{
ofnode root_node = ofnode_path("/");
@@ -134,6 +135,7 @@ static int dm_test_ofnode_get_by_phandle(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_get_by_phandle, UT_TESTF_SCAN_PDATA |
UT_TESTF_SCAN_FDT);
+/* test oftree_get_by_phandle() with a the 'other' oftree */
static int dm_test_ofnode_get_by_phandle_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -188,6 +190,7 @@ static int dm_test_ofnode_by_prop_value(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_by_prop_value, UT_TESTF_SCAN_FDT);
+/* test ofnode_by_prop_value() with a the 'other' oftree */
static int dm_test_ofnode_by_prop_value_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -200,6 +203,7 @@ static int dm_test_ofnode_by_prop_value_ot(struct
unit_test_state *uts)
DM_TEST(dm_test_ofnode_by_prop_value_ot,
UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+/* test ofnode_read_fmap_entry() */
static int dm_test_ofnode_fmap(struct unit_test_state *uts)
{
struct fmap_entry entry;
@@ -215,6 +219,7 @@ static int dm_test_ofnode_fmap(struct unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_fmap, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+/* test ofnode_read_prop() */
static int dm_test_ofnode_read(struct unit_test_state *uts)
{
const u32 *val;
@@ -241,6 +246,7 @@ static int dm_test_ofnode_read(struct unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_read, UT_TESTF_SCAN_FDT);
+/* test ofnode_read_prop() with the 'other' tree */
static int dm_test_ofnode_read_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -260,6 +266,7 @@ static int dm_test_ofnode_read_ot(struct unit_test_state
*uts)
}
DM_TEST(dm_test_ofnode_read_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
+/* test ofnode_count_/parse_phandle_with_args() */
static int dm_test_ofnode_phandle(struct unit_test_state *uts)
{
struct ofnode_phandle_args args;
@@ -335,6 +342,7 @@ static int dm_test_ofnode_phandle(struct unit_test_state
*uts)
}
DM_TEST(dm_test_ofnode_phandle, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+/* test ofnode_count_/parse_phandle_with_args() with 'other' tree */
static int dm_test_ofnode_phandle_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -363,6 +371,7 @@ static int dm_test_ofnode_phandle_ot(struct unit_test_state
*uts)
}
DM_TEST(dm_test_ofnode_phandle_ot, UT_TESTF_OTHER_FDT);
+/* test ofnode_read_chosen_string/node/prop() */
static int dm_test_ofnode_read_chosen(struct unit_test_state *uts)
{
const char *str;
@@ -392,6 +401,7 @@ static int dm_test_ofnode_read_chosen(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_read_chosen, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+/* test ofnode_get_aliases_node/prop() */
static int dm_test_ofnode_read_aliases(struct unit_test_state *uts)
{
const void *val;
@@ -435,6 +445,7 @@ static int dm_test_ofnode_get_child_count(struct
unit_test_state *uts)
DM_TEST(dm_test_ofnode_get_child_count,
UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+/* test ofnode_get_child_count() with 'other' tree */
static int dm_test_ofnode_get_child_count_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -469,6 +480,7 @@ static int dm_test_ofnode_is_enabled(struct unit_test_state
*uts)
}
DM_TEST(dm_test_ofnode_is_enabled, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+/* test ofnode_is_enabled() with 'other' tree */
static int dm_test_ofnode_is_enabled_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -482,6 +494,7 @@ static int dm_test_ofnode_is_enabled_ot(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_is_enabled_ot, UT_TESTF_OTHER_FDT);
+/* test ofnode_get_addr/size() */
static int dm_test_ofnode_get_reg(struct unit_test_state *uts)
{
ofnode node;
@@ -518,6 +531,7 @@ static int dm_test_ofnode_get_reg(struct unit_test_state
*uts)
}
DM_TEST(dm_test_ofnode_get_reg, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+/* test ofnode_get_addr() with 'other' tree */
static int dm_test_ofnode_get_reg_ot(struct unit_test_state *uts)
{
oftree otree = get_other_oftree(uts);
@@ -552,6 +566,7 @@ static int dm_test_ofnode_get_path(struct unit_test_stat
[PATCH v4 24/44] dm: core: Ensure we run flattree tests on ofnode
We need the UT_TESTF_SCAN_FDT flag set for these tests to run with flat
tree. In some cases it is missing, so add it.
Signed-off-by: Simon Glass
---
(no changes since v1)
test/dm/ofnode.c | 33 ++---
1 file changed, 18 insertions(+), 15 deletions(-)
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index dee71ee5e545..6f21d66a95ef 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -114,7 +114,7 @@ static int dm_test_ofnode_compatible_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_compatible_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_compatible_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_get_by_phandle(struct unit_test_state *uts)
{
@@ -146,7 +146,8 @@ static int dm_test_ofnode_get_by_phandle_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_get_by_phandle_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_get_by_phandle_ot,
+ UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int check_prop_values(struct unit_test_state *uts, ofnode start,
const char *propname, const char *propval,
@@ -196,7 +197,8 @@ static int dm_test_ofnode_by_prop_value_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_by_prop_value_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_by_prop_value_ot,
+ UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_fmap(struct unit_test_state *uts)
{
@@ -237,7 +239,7 @@ static int dm_test_ofnode_read(struct unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_read, UT_TESTF_SCAN_PDATA | UT_TESTF_SCAN_FDT);
+DM_TEST(dm_test_ofnode_read, UT_TESTF_SCAN_FDT);
static int dm_test_ofnode_read_ot(struct unit_test_state *uts)
{
@@ -256,7 +258,7 @@ static int dm_test_ofnode_read_ot(struct unit_test_state
*uts)
return 0;
}
-DM_TEST(dm_test_ofnode_read_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_read_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_phandle(struct unit_test_state *uts)
{
@@ -452,7 +454,8 @@ static int dm_test_ofnode_get_child_count_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_get_child_count_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_get_child_count_ot,
+ UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_is_enabled(struct unit_test_state *uts)
{
@@ -526,7 +529,7 @@ static int dm_test_ofnode_get_reg_ot(struct unit_test_state
*uts)
return 0;
}
-DM_TEST(dm_test_ofnode_get_reg_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_get_reg_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_get_path(struct unit_test_state *uts)
{
@@ -566,7 +569,7 @@ static int dm_test_ofnode_get_path_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_get_path_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_get_path_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_conf(struct unit_test_state *uts)
{
@@ -581,7 +584,7 @@ static int dm_test_ofnode_conf(struct unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_conf, 0);
+DM_TEST(dm_test_ofnode_conf, UT_TESTF_SCAN_FDT);
static int dm_test_ofnode_options(struct unit_test_state *uts)
{
@@ -665,7 +668,7 @@ static int dm_test_ofnode_string(struct unit_test_state
*uts)
return 0;
}
-DM_TEST(dm_test_ofnode_string, 0);
+DM_TEST(dm_test_ofnode_string, UT_TESTF_SCAN_FDT);
static int dm_test_ofnode_string_err(struct unit_test_state *uts)
{
@@ -736,7 +739,7 @@ static int dm_test_ofnode_get_phy(struct unit_test_state
*uts)
return 0;
}
-DM_TEST(dm_test_ofnode_get_phy, 0);
+DM_TEST(dm_test_ofnode_get_phy, UT_TESTF_SCAN_FDT);
/**
* make_ofnode_fdt() - Create an FDT for testing with ofnode
@@ -920,7 +923,7 @@ static int dm_test_ofnode_write_copy_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_write_copy_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_write_copy_ot, UT_TESTF_SCAN_FDT | UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_u32(struct unit_test_state *uts)
{
@@ -1122,7 +1125,7 @@ static int dm_test_ofnode_by_compatible_ot(struct
unit_test_state *uts)
return 0;
}
-DM_TEST(dm_test_ofnode_by_compatible_ot, UT_TESTF_OTHER_FDT);
+DM_TEST(dm_test_ofnode_by_compatible_ot, UT_TESTF_SCAN_FDT |
UT_TESTF_OTHER_FDT);
static int dm_test_ofnode_find_subnode(struct unit_test_state *uts)
{
@@ -1291,7 +1294,7 @@ static int dm_test_livetree_align(struct unit_test_state
*uts)
return 0;
}
-DM_TEST(dm_test_livetree_align, UT_TESTF_LIVE_TREE);
+DM_TEST(dm_test_livetree_align, UT_TESTF_SCAN_FDT | UT_TESTF_LIVE_TREE);
/* check that it is possible to load an arbitrary livetree */
static int dm_test_livetree_ensure(struct unit_test_state *uts)
@@ -1310,4 +1313,4 @@ static int dm_test_livetree_ensure(struct unit_test_state
*uts)
return 0;
}
[PATCH v4 23/44] dm: core: Reverse the argument order in ofnode_copy_props()
Follow the order used by memcpy() as it may be less confusing.
Signed-off-by: Simon Glass
---
(no changes since v1)
boot/vbe_request.c| 2 +-
boot/vbe_simple_os.c | 2 +-
drivers/core/ofnode.c | 2 +-
include/dm/ofnode.h | 6 +++---
test/dm/ofnode.c | 9 -
5 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/boot/vbe_request.c b/boot/vbe_request.c
index 2f218d4bf97c..917251afa1ca 100644
--- a/boot/vbe_request.c
+++ b/boot/vbe_request.c
@@ -187,7 +187,7 @@ static int bootmeth_vbe_ft_fixup(void *ctx, struct event
*event)
ret = ofnode_add_subnode(dest_parent, name, &dest);
if (ret && ret != -EEXIST)
return log_msg_ret("add", ret);
- ret = ofnode_copy_props(node, dest);
+ ret = ofnode_copy_props(dest, node);
if (ret)
return log_msg_ret("cp", ret);
diff --git a/boot/vbe_simple_os.c b/boot/vbe_simple_os.c
index 3285e438a568..84626cdeaf24 100644
--- a/boot/vbe_simple_os.c
+++ b/boot/vbe_simple_os.c
@@ -94,7 +94,7 @@ static int bootmeth_vbe_simple_ft_fixup(void *ctx, struct
event *event)
/* Copy over the vbe properties for fwupd */
log_debug("Fixing up: %s\n", dev->name);
- ret = ofnode_copy_props(dev_ofnode(dev), subnode);
+ ret = ofnode_copy_props(subnode, dev_ofnode(dev));
if (ret)
return log_msg_ret("cp", ret);
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 2cafa7bca5b3..515396c62f49 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -1731,7 +1731,7 @@ int ofnode_add_subnode(ofnode node, const char *name,
ofnode *subnodep)
return ret; /* 0 or -EEXIST */
}
-int ofnode_copy_props(ofnode src, ofnode dst)
+int ofnode_copy_props(ofnode dst, ofnode src)
{
struct ofprop prop;
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 06c969c61fe8..32917f661557 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1598,7 +1598,7 @@ int ofnode_add_subnode(ofnode parent, const char *name,
ofnode *nodep);
/**
* ofnode_copy_props() - copy all properties from one node to another
*
- * Makes a copy of all properties from the source note in the destination node.
+ * Makes a copy of all properties from the source node to the destination node.
* Existing properties in the destination node remain unchanged, except that
* any with the same name are overwritten, including changing the size of the
* property.
@@ -1606,9 +1606,9 @@ int ofnode_add_subnode(ofnode parent, const char *name,
ofnode *nodep);
* For livetree, properties are copied / allocated, so the source tree does not
* need to be present afterwards.
*
+ * @dst: Destination node to write properties to
* @src: Source node to read properties from
- * @dst: Destination node to write properties too
*/
-int ofnode_copy_props(ofnode src, ofnode dst);
+int ofnode_copy_props(ofnode dst, ofnode src);
#endif
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index d71faac0ee43..dee71ee5e545 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -1209,12 +1209,11 @@ static int dm_test_ofnode_too_many(struct
unit_test_state *uts)
}
DM_TEST(dm_test_ofnode_too_many, UT_TESTF_SCAN_FDT);
-static int check_copy_props(struct unit_test_state *uts, ofnode src,
- ofnode dst)
+static int check_copy_props(struct unit_test_state *uts, ofnode dst, ofnode
src)
{
u32 reg[2], val;
- ut_assertok(ofnode_copy_props(src, dst));
+ ut_assertok(ofnode_copy_props(dst, src));
ut_assertok(ofnode_read_u32(dst, "ping-expect", &val));
ut_asserteq(3, val);
@@ -1246,7 +1245,7 @@ static int dm_test_ofnode_copy_props(struct
unit_test_state *uts)
src = ofnode_path("/b-test");
dst = ofnode_path("/some-bus");
- ut_assertok(check_copy_props(uts, src, dst));
+ ut_assertok(check_copy_props(uts, dst, src));
/* check a property that is in the destination already */
ut_asserteq_str("mux0", ofnode_read_string(dst, "mux-control-names"));
@@ -1262,7 +1261,7 @@ static int dm_test_ofnode_copy_props_ot(struct
unit_test_state *uts)
src = ofnode_path("/b-test");
dst = oftree_path(otree, "/node/subnode2");
- ut_assertok(check_copy_props(uts, src, dst));
+ ut_assertok(check_copy_props(uts, dst, src));
return 0;
}
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 21/44] spl: Use the correct FIT_..._PROP constants
Rather than open-coding the property names, use the existing constants
provided for this purpose. This better aligns the simple-FIT code with
the full FIT implementation.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/spl/spl_fit.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 12bd00694ab8..762828544f6f 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -44,7 +44,7 @@ static int find_node_from_desc(const void *fit, int node,
const char *str)
for (child = fdt_first_subnode(fit, node); child >= 0;
child = fdt_next_subnode(fit, child)) {
int len;
- const char *desc = fdt_getprop(fit, child, "description", &len);
+ const char *desc = fdt_getprop(fit, child, FIT_DESC_PROP, &len);
if (!desc)
continue;
@@ -476,10 +476,11 @@ static int spl_fit_record_loadable(const struct
spl_fit_info *ctx, int index,
node = spl_fit_get_image_node(ctx, "loadables", index);
ret = fdt_record_loadable(blob, index, name, image->load_addr,
- image->size, image->entry_point,
- fdt_getprop(ctx->fit, node, "type", NULL),
- fdt_getprop(ctx->fit, node, "os", NULL),
- fdt_getprop(ctx->fit, node, "arch", NULL));
+ image->size, image->entry_point,
+ fdt_getprop(ctx->fit, node, FIT_TYPE_PROP, NULL),
+ fdt_getprop(ctx->fit, node, FIT_OS_PROP, NULL),
+ fdt_getprop(ctx->fit, node, FIT_ARCH_PROP, NULL));
+
return ret;
}
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 22/44] spl: Move bloblist writing until the image is known
The bloblist should not be finalised until the image is fully set up.
This allows any final handoff information to be included in the bloblist.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/spl/spl.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index f3cbd6cef8a7..f7608f14e365 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -728,18 +728,6 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
}
spl_perform_fixups(&spl_image);
- if (CONFIG_IS_ENABLED(HANDOFF)) {
- ret = write_spl_handoff();
- if (ret)
- printf(SPL_TPL_PROMPT
- "SPL hand-off write failed (err=%d)\n", ret);
- }
- if (CONFIG_IS_ENABLED(BLOBLIST)) {
- ret = bloblist_finish();
- if (ret)
- printf("Warning: Failed to finish bloblist (ret=%d)\n",
- ret);
- }
os = spl_image.os;
if (os == IH_OS_U_BOOT) {
@@ -786,6 +774,18 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
dev->name, rc);
}
}
+ if (CONFIG_IS_ENABLED(HANDOFF)) {
+ ret = write_spl_handoff();
+ if (ret)
+ printf(SPL_TPL_PROMPT
+ "SPL hand-off write failed (err=%d)\n", ret);
+ }
+ if (CONFIG_IS_ENABLED(BLOBLIST)) {
+ ret = bloblist_finish();
+ if (ret)
+ printf("Warning: Failed to finish bloblist (ret=%d)\n",
+ ret);
+ }
spl_board_prepare_for_boot();
jump_to_image_no_args(&spl_image);
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 20/44] spl: Move the full FIT code to spl_fit.c
For some reason this code was put in the main spl.c file. Move it out
to the FIT implementation where it belongs.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/spl/spl.c | 108 +++
common/spl/spl_fit.c | 93 +
include/spl.h| 11 +
3 files changed, 111 insertions(+), 101 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index e8044b821635..f3cbd6cef8a7 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -260,102 +260,6 @@ void spl_set_header_raw_uboot(struct spl_image_info
*spl_image)
}
#endif
-#if CONFIG_IS_ENABLED(LOAD_FIT_FULL)
-/* Parse and load full fitImage in SPL */
-static int spl_load_fit_image(struct spl_image_info *spl_image,
- const struct legacy_img_hdr *header)
-{
- struct bootm_headers images;
- const char *fit_uname_config = NULL;
- uintptr_t fdt_hack;
- const char *uname;
- ulong fw_data = 0, dt_data = 0, img_data = 0;
- ulong fw_len = 0, dt_len = 0, img_len = 0;
- int idx, conf_noffset;
- int ret;
-
-#ifdef CONFIG_SPL_FIT_SIGNATURE
- images.verify = 1;
-#endif
- ret = fit_image_load(&images, (ulong)header,
-NULL, &fit_uname_config,
-IH_ARCH_DEFAULT, IH_TYPE_STANDALONE, -1,
-FIT_LOAD_OPTIONAL, &fw_data, &fw_len);
- if (ret >= 0) {
- printf("DEPRECATED: 'standalone = ' property.");
- printf("Please use either 'firmware =' or 'kernel ='\n");
- } else {
- ret = fit_image_load(&images, (ulong)header, NULL,
-&fit_uname_config, IH_ARCH_DEFAULT,
-IH_TYPE_FIRMWARE, -1, FIT_LOAD_OPTIONAL,
-&fw_data, &fw_len);
- }
-
- if (ret < 0) {
- ret = fit_image_load(&images, (ulong)header, NULL,
-&fit_uname_config, IH_ARCH_DEFAULT,
-IH_TYPE_KERNEL, -1, FIT_LOAD_OPTIONAL,
-&fw_data, &fw_len);
- }
-
- if (ret < 0)
- return ret;
-
- spl_image->size = fw_len;
- spl_image->entry_point = fw_data;
- spl_image->load_addr = fw_data;
- if (fit_image_get_os(header, ret, &spl_image->os))
- spl_image->os = IH_OS_INVALID;
- spl_image->name = genimg_get_os_name(spl_image->os);
-
- debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n",
- spl_image->name, spl_image->load_addr, spl_image->size);
-
-#ifdef CONFIG_SPL_FIT_SIGNATURE
- images.verify = 1;
-#endif
- ret = fit_image_load(&images, (ulong)header, NULL, &fit_uname_config,
- IH_ARCH_DEFAULT, IH_TYPE_FLATDT, -1,
- FIT_LOAD_OPTIONAL, &dt_data, &dt_len);
- if (ret >= 0) {
- spl_image->fdt_addr = (void *)dt_data;
-
- if (spl_image->os == IH_OS_U_BOOT) {
- /* HACK: U-Boot expects FDT at a specific address */
- fdt_hack = spl_image->load_addr + spl_image->size;
- fdt_hack = (fdt_hack + 3) & ~3;
- debug("Relocating FDT to %p\n", spl_image->fdt_addr);
- memcpy((void *)fdt_hack, spl_image->fdt_addr, dt_len);
- }
- }
-
- conf_noffset = fit_conf_get_node((const void *)header,
-fit_uname_config);
- if (conf_noffset < 0)
- return 0;
-
- for (idx = 0;
-uname = fdt_stringlist_get((const void *)header, conf_noffset,
- FIT_LOADABLE_PROP, idx,
- NULL), uname;
-idx++)
- {
-#ifdef CONFIG_SPL_FIT_SIGNATURE
- images.verify = 1;
-#endif
- ret = fit_image_load(&images, (ulong)header,
-&uname, &fit_uname_config,
-IH_ARCH_DEFAULT, IH_TYPE_LOADABLE, -1,
-FIT_LOAD_OPTIONAL_NON_ZERO,
-&img_data, &img_len);
- if (ret < 0)
- return ret;
- }
-
- return 0;
-}
-#endif
-
__weak int spl_parse_board_header(struct spl_image_info *spl_image,
const struct spl_boot_device *bootdev,
const void *image_header, size_t size)
@@ -375,12 +279,14 @@ int spl_parse_image_header(struct spl_image_info
*spl_image,
const struct spl_boot_device *bootdev,
const struct legacy_img_hdr *header)
{
-#if CONFIG_IS_ENABLED(LOAD_FIT_FULL)
- int ret = spl_load_fit_image(spl_image, header);
+ int ret;
- if
[PATCH v4 19/44] spl: Rename spl_load_fit_image() to load_simple_fit()
We have two functions called spl_load_fit_image(), one in spl.c and one in
spl_fit.c
Rename the second one, to indicate that it relates to simple FIT parsing,
rather than the full version.
Signed-off-by: Simon Glass
---
(no changes since v1)
common/spl/spl_fit.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/common/spl/spl_fit.c b/common/spl/spl_fit.c
index 1fb17217dc3a..48bc4d77411a 100644
--- a/common/spl/spl_fit.c
+++ b/common/spl/spl_fit.c
@@ -208,7 +208,7 @@ static int get_aligned_image_size(struct spl_load_info
*info, int data_size,
}
/**
- * spl_load_fit_image(): load the image described in a certain FIT node
+ * load_simple_fit(): load the image described in a certain FIT node
* @info: points to information about the device to load data from
* @sector:the start sector of the FIT image on the device
* @ctx: points to the FIT context structure
@@ -221,9 +221,9 @@ static int get_aligned_image_size(struct spl_load_info
*info, int data_size,
*
* Return: 0 on success or a negative error number.
*/
-static int spl_load_fit_image(struct spl_load_info *info, ulong sector,
- const struct spl_fit_info *ctx, int node,
- struct spl_image_info *image_info)
+static int load_simple_fit(struct spl_load_info *info, ulong sector,
+ const struct spl_fit_info *ctx, int node,
+ struct spl_image_info *image_info)
{
int offset;
size_t length;
@@ -386,8 +386,7 @@ static int spl_fit_append_fdt(struct spl_image_info
*spl_image,
else
return node;
} else {
- ret = spl_load_fit_image(info, sector, ctx, node,
-&image_info);
+ ret = load_simple_fit(info, sector, ctx, node, &image_info);
if (ret < 0)
return ret;
}
@@ -426,8 +425,8 @@ static int spl_fit_append_fdt(struct spl_image_info
*spl_image,
__func__);
}
image_info.load_addr = (ulong)tmpbuffer;
- ret = spl_load_fit_image(info, sector, ctx,
-node, &image_info);
+ ret = load_simple_fit(info, sector, ctx, node,
+ &image_info);
if (ret < 0)
break;
@@ -617,7 +616,7 @@ static int spl_fit_load_fpga(struct spl_fit_info *ctx,
warn_deprecated("'fpga' property in config node. Use 'loadables'");
/* Load the image and set up the fpga_image structure */
- ret = spl_load_fit_image(info, sector, ctx, node, &fpga_image);
+ ret = load_simple_fit(info, sector, ctx, node, &fpga_image);
if (ret) {
printf("%s: Cannot load the FPGA: %i\n", __func__, ret);
return ret;
@@ -742,7 +741,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
}
/* Load the image and set up the spl_image structure */
- ret = spl_load_fit_image(info, sector, &ctx, node, spl_image);
+ ret = load_simple_fit(info, sector, &ctx, node, spl_image);
if (ret)
return ret;
@@ -783,7 +782,7 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
continue;
image_info.load_addr = 0;
- ret = spl_load_fit_image(info, sector, &ctx, node, &image_info);
+ ret = load_simple_fit(info, sector, &ctx, node, &image_info);
if (ret < 0) {
printf("%s: can't load image loadables index %d (ret =
%d)\n",
__func__, index, ret);
--
2.42.0.515.g380fc7ccd1-goog
[PATCH v4 18/44] spl: Remove #ifdefs with BOOTSTAGE
This feature has some helpers in its header file so that its functions
resolve to nothing when the feature is disabled. Add a few more and use
these to simplify the code.
With this there are no more #ifdefs in board_init_r()
Signed-off-by: Simon Glass
---
Changes in v4:
- Take account of CONFIG_BOOTSTAGE_STASH for stashing, to avoid size inc
common/bootstage.c | 14 ++
common/spl/spl.c| 15 +++
include/bootstage.h | 22 ++
3 files changed, 39 insertions(+), 12 deletions(-)
diff --git a/common/bootstage.c b/common/bootstage.c
index 326c40f1561f..a68d883c684c 100644
--- a/common/bootstage.c
+++ b/common/bootstage.c
@@ -502,6 +502,20 @@ int bootstage_unstash(const void *base, int size)
return 0;
}
+int _bootstage_stash_default(void)
+{
+ return bootstage_stash(map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR, 0),
+ CONFIG_BOOTSTAGE_STASH_SIZE);
+}
+
+int _bootstage_unstash_default(void)
+{
+ const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
+ CONFIG_BOOTSTAGE_STASH_SIZE);
+
+ return bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
+}
+
int bootstage_get_size(void)
{
struct bootstage_data *data = gd->bootstage;
diff --git a/common/spl/spl.c b/common/spl/spl.c
index 2c36caa856fa..e8044b821635 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -542,17 +542,11 @@ static int spl_common_init(bool setup_malloc)
ret);
return ret;
}
-#ifdef CONFIG_BOOTSTAGE_STASH
if (!u_boot_first_phase()) {
- const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
- CONFIG_BOOTSTAGE_STASH_SIZE);
-
- ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
+ ret = bootstage_unstash_default();
if (ret)
- debug("%s: Failed to unstash bootstage: ret=%d\n",
- __func__, ret);
+ log_debug("Failed to unstash bootstage: ret=%d\n", ret);
}
-#endif /* CONFIG_BOOTSTAGE_STASH */
bootstage_mark_name(get_bootstage_id(true),
spl_phase_name(spl_phase()));
#if CONFIG_IS_ENABLED(LOG)
@@ -870,12 +864,9 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
gd_malloc_ptr(), gd_malloc_ptr() / 1024);
bootstage_mark_name(get_bootstage_id(false), "end phase");
-#ifdef CONFIG_BOOTSTAGE_STASH
- ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR,
- CONFIG_BOOTSTAGE_STASH_SIZE);
+ ret = bootstage_stash_default();
if (ret)
debug("Failed to stash bootstage: err=%d\n", ret);
-#endif
if (IS_ENABLED(CONFIG_SPL_VIDEO_REMOVE)) {
struct udevice *dev;
diff --git a/include/bootstage.h b/include/bootstage.h
index 685939ccffc0..f9376c320c96 100644
--- a/include/bootstage.h
+++ b/include/bootstage.h
@@ -244,6 +244,8 @@ void show_boot_progress(int val);
#ifdef ENABLE_BOOTSTAGE
+#include
+
/* This is the full bootstage implementation */
/**
@@ -452,6 +454,26 @@ static inline int bootstage_init(bool first)
#endif /* ENABLE_BOOTSTAGE */
+/* helpers for SPL */
+int _bootstage_stash_default(void);
+int _bootstage_unstash_default(void);
+
+static inline int bootstage_stash_default(void)
+{
+ if (CONFIG_IS_ENABLED(BOOTSTAGE) && IS_ENABLED(CONFIG_BOOTSTAGE_STASH))
+ return _bootstage_stash_default();
+
+ return 0;
+}
+
+static inline int bootstage_unstash_default(void)
+{
+ if (CONFIG_IS_ENABLED(BOOTSTAGE) && IS_ENABLED(CONFIG_BOOTSTAGE_STASH))
+ return _bootstage_unstash_default();
+
+ return 0;
+}
+
/* Helper macro for adding a bootstage to a line of code */
#define BOOTSTAGE_MARKER() \
bootstage_mark_code(__FILE__, __func__, __LINE__)
--
2.42.0.515.g380fc7ccd1-goog
