Re: [PATCH v2 12/32] board: dragonboard410c: upstream DT compat
On Tue, 19 Dec 2023 at 21:34, Caleb Connolly wrote:
>
> Use the root compatible strings from upstream Linux, add missing
> '#clock-cells' property to the gcc node.
>
> Adjust some of the msm8916/apq8016 drivers to use the correct upstream
> compatible properties and DT bindings.
>
> This prepares us to switch to upstream DT in a future patch.
>
> Signed-off-by: Caleb Connolly
> ---
> arch/arm/dts/dragonboard410c.dts | 25 +++-
> board/qualcomm/dragonboard410c/dragonboard410c.c | 93 +++-
> doc/device-tree-bindings/usb/ehci-msm.txt| 10 --
> drivers/clk/qcom/clock-apq8016.c | 7 +-
> drivers/phy/qcom/msm8916-usbh-phy.c | 4 +-
> drivers/pinctrl/qcom/pinctrl-apq8016.c | 2 +-
> drivers/usb/host/ehci-msm.c | 24 ++-
> include/dt-bindings/clock/qcom,gcc-msm8916.h | 179
> +++
> 8 files changed, 248 insertions(+), 96 deletions(-)
>
> diff --git a/arch/arm/dts/dragonboard410c.dts
> b/arch/arm/dts/dragonboard410c.dts
> index c395e6cc0427..453642b25705 100644
> --- a/arch/arm/dts/dragonboard410c.dts
> +++ b/arch/arm/dts/dragonboard410c.dts
> @@ -12,7 +12,7 @@
>
> / {
> model = "Qualcomm Technologies, Inc. Dragonboard 410c";
> - compatible = "qcom,dragonboard", "qcom,apq8016-sbc";
> + compatible = "qcom,apq8016-sbc", "qcom,apq8016";
> qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>;
> qcom,board-id = <0x10018 0x0>;
> #address-cells = <0x2>;
> @@ -79,6 +79,7 @@
> reg = <0x180 0x8>;
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> + #clock-cells = <0x1>;
> };
>
> serial@78b {
> @@ -91,15 +92,25 @@
> };
>
> ehci@78d9000 {
> - compatible = "qcom,ehci-host";
> + compatible = "qcom,ci-hdrc";
> reg = <0x78d9000 0x400>;
> phys = <&ehci_phy>;
> - };
>
> - ehci_phy: ehci_phy@78d9000 {
> - compatible = "qcom,apq8016-usbphy";
> - reg = <0x78d9000 0x400>;
> - #phy-cells = <0>;
> + ulpi {
> + usb_hs_phy: phy {
> + compatible =
> "qcom,usb-hs-phy-msm8916",
> +"qcom,usb-hs-phy";
> + #phy-cells = <0>;
> + clocks = <&xo_board>, <&gcc
> GCC_USB2A_PHY_SLEEP_CLK>;
> + clock-names = "ref", "sleep";
> + resets = <&gcc GCC_USB2A_PHY_BCR>,
> <&usb 0>;
> + reset-names = "phy", "por";
> + qcom,init-seq = /bits/ 8 <0x0 0x44>,
> +<0x1 0x6b>,
> +<0x2 0x24>,
> +<0x3 0x13>;
> + };
> + };
> };
>
> sdhci@07824000 {
> diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c
> b/board/qualcomm/dragonboard410c/dragonboard410c.c
> index 350e0e9e20aa..1adac07569ae 100644
> --- a/board/qualcomm/dragonboard410c/dragonboard410c.c
> +++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
> @@ -9,6 +9,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -23,84 +24,32 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -int dram_init(void)
> -{
> - gd->ram_size = PHYS_SDRAM_1_SIZE;
> -
> - return 0;
> -}
> -
> -int dram_init_banksize(void)
> -{
> - gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> -
> - return 0;
> -}
> +#define USB_HUB_RESET_GPIO 2
> +#define USB_SW_SELECT_GPIO 3
>
> int board_usb_init(int index, enum usb_init_type init)
> {
> - static struct udevice *pmic_gpio;
> - static struct gpio_desc hub_reset, usb_sel;
> - int ret = 0, node;
> + struct udevice *usb;
> + int ret = 0;
>
> - if (!pmic_gpio) {
> - ret = uclass_get_device_by_name(UCLASS_GPIO,
> - "pm8916_gpios@c000",
> - &pmic_gpio);
> - if (ret < 0) {
> - printf("Failed to find pm8916_gpios@c000 node.\n");
> - return ret;
> - }
> + /* USB device */
> + ret = device_find_global_by_ofnode(ofnode_path("/soc/usb"), &usb);
> + if (ret) {
> + printf("Cannot find USB devi
Re: [PATCH v2 31/32] board: qcs404-evb: drop board code
Hi Caleb,
On Tue, 19 Dec 2023 at 21:34, Caleb Connolly wrote:
>
> This board is entirely supported by the generic arch code and DTS. The
> board code used to handle turning on the vbus regulator, however this is
> now handled via DT.
>
> With this, the board specific defconfig is also no longer needed, so
> drop it as well.
I would like to understand how the board specific bits are to be
handled going forward. One of the examples for QCS404 derived board
uses I2C eeprom to save the ethernet MAC address. How should one
configure that via this generic target?
Would you expect arch/arm/mach-snapdragon/board.c to hold that code?
Or we should have a separate defconfig and board support code for
that?
BTW, qcs404-evb does provide networking support but at the time when I
added its support the network port was broken. It may very well be the
case that someone tries to enable networking on qcs404-evb in the
future.
The same holds true for how we should add support for fastboot mode
entry on a button press when U-boot starts as a first stage
bootloader.
It's always good to see generalization coming in but that should come
with alternate methods to support existing board needs.
-Sumit
>
> Signed-off-by: Caleb Connolly
> ---
> board/qualcomm/qcs404-evb/Makefile | 6
> board/qualcomm/qcs404-evb/qcs404-evb.c | 49 -
> configs/qcs404evb_defconfig| 56
> --
> 3 files changed, 111 deletions(-)
>
> diff --git a/board/qualcomm/qcs404-evb/Makefile
> b/board/qualcomm/qcs404-evb/Makefile
> deleted file mode 100644
> index 4665827e0859..
> --- a/board/qualcomm/qcs404-evb/Makefile
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -# (C) Copyright 2022 Sumit Garg
> -#
> -
> -obj-y += qcs404-evb.o
> diff --git a/board/qualcomm/qcs404-evb/qcs404-evb.c
> b/board/qualcomm/qcs404-evb/qcs404-evb.c
> deleted file mode 100644
> index 1a4b1f97a3ae..
> --- a/board/qualcomm/qcs404-evb/qcs404-evb.c
> +++ /dev/null
> @@ -1,49 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Board init file for QCS404-EVB
> - *
> - * (C) Copyright 2022 Sumit Garg
> - */
> -
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -#include
> -
> -DECLARE_GLOBAL_DATA_PTR;
> -
> -void qcom_board_init(void)
> -{
> - struct udevice *pmic_gpio;
> - struct gpio_desc usb_vbus_boost_pin;
> - int ret, node;
> -
> - ret = uclass_get_device_by_name(UCLASS_GPIO,
> - "pms405_gpios@c000",
> - &pmic_gpio);
> - if (ret < 0) {
> - printf("Failed to find pms405_gpios@c000 node.\n");
> - return;
> - }
> -
> - node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pmic_gpio),
> - "usb_vbus_boost_pin");
> - if (node < 0) {
> - printf("Failed to find usb_hub_reset_pm dt node.\n");
> - return;
> - }
> - ret = gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
> -&usb_vbus_boost_pin, 0);
> - if (ret < 0) {
> - printf("Failed to request usb_hub_reset_pm gpio.\n");
> - return;
> - }
> -
> - dm_gpio_set_dir_flags(&usb_vbus_boost_pin,
> - GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
> -}
> diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig
> deleted file mode 100644
> index 7daaa449ffbd..
> --- a/configs/qcs404evb_defconfig
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_SYS_BOARD="qcs404-evb"
> -CONFIG_SKIP_LOWLEVEL_INIT=y
> -CONFIG_COUNTER_FREQUENCY=1900
> -CONFIG_POSITION_INDEPENDENT=y
> -CONFIG_ARCH_SNAPDRAGON=y
> -CONFIG_DEFAULT_DEVICE_TREE="qcs404-evb"
> -CONFIG_IDENT_STRING="\nQualcomm QCS404-EVB"
> -CONFIG_SYS_LOAD_ADDR=0x8000
> -CONFIG_FIT=y
> -CONFIG_FIT_VERBOSE=y
> -CONFIG_BOOTDELAY=5
> -CONFIG_USE_BOOTARGS=y
> -CONFIG_BOOTARGS="earlycon ignore_loglevel root= clk_ignore_unused"
> -CONFIG_SAVE_PREV_BL_FDT_ADDR=y
> -CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
> -# CONFIG_DISPLAY_CPUINFO is not set
> -CONFIG_HUSH_PARSER=y
> -CONFIG_SYS_MAXARGS=64
> -CONFIG_SYS_CBSIZE=512
> -CONFIG_CMD_GPIO=y
> -CONFIG_CMD_GPT=y
> -CONFIG_CMD_MMC=y
> -CONFIG_CMD_PART=y
> -CONFIG_CMD_USB=y
> -CONFIG_CMD_EXT2=y
> -CONFIG_CMD_EXT4=y
> -CONFIG_CMD_EXT4_WRITE=y
> -CONFIG_CMD_FAT=y
> -CONFIG_CMD_FS_GENERIC=y
> -# CONFIG_NET is not set
> -CONFIG_CLK=y
> -CONFIG_CLK_QCOM_QCS404=y
> -CONFIG_MSM_GPIO=y
> -CONFIG_QCOM_PMIC_GPIO=y
> -CONFIG_MISC=y
> -CONFIG_MMC_HS400_SUPPORT=y
> -CONFIG_MMC_SDHCI=y
> -CONFIG_MMC_SDHCI_ADMA=y
> -CONFIG_MMC_SDHCI_MSM=y
> -CONFIG_PHY=y
> -CONFIG_PHY_QCOM_USB_HS_28NM=y
> -CONFIG_PHY_QCOM_USB_SS=y
> -CONFIG_PINCTRL=y
> -CONFIG_PINCTRL_QCOM_QCS404=y
> -CONFIG_DM_PMIC=y
> -CONFIG_PMIC_QCO
Re: [PATCH 00/13] arm: exynos: Add E850-96 board
Hi,
2023년 12월 19일 (화) 07:07, Sam Protsenko 님이 작성:
> On Tue, Dec 12, 2023 at 9:16 PM Sam Protsenko
> wrote:
> >
> > NOTE: This patch series depends on "pinctrl: exynos: Prepare for other
> > SoCs support" series [1]. It should be applied first.
> >
> > Add Exynos850 SoC and WinLink's E850-96 board support. A short overview
> > of series additions and modifications:
> > * USI driver: configures UART block
> > * PMU driver: connects AP UART lines to uart1 pins)
> > * Exynos850 clock driver: generates UART clocks
> > * Exynos850 pinctrl driver: mux UART pins
> > * serial_s5p: UART driver
> > * Exynos850 SoC: dtsi files and MMU maps
> > * E850-96 board: dts files, defconfig, board file and doc
> >
> > Most of the code was borrowed from mainline Linux kernel (where this
> > board is already enabled) and adapted for U-Boot. Preliminary
> > preparation for this series includes next patches / series (already
> > merged):
> >
> > * commit 585a2aaac2ac ("arm: exynos: Include missing CPU header in
> > soc.c")
> > * commit c9ab9f30c8e4 ("arm: exynos: Include missing CPU header in
> > gpio.h")
> > * commit 11bd2787deff ("watchdog: s5p_wdt: Include missing CPU
> > header")
> > * commit 08cfa971a717 ("exynos: Avoid duplicate reset_cpu with
> > SYSRESET enabled")
> > * commit f655090901dc ("clk: exynos: Add header guard for clk-pll.h")
> > * commit 2227f4c0afed ("serial: s5p: Fix clk_get_by_index() error code
> > check")
> > * commit a0615ffc99a5 ("serial: s5p: Remove common.h inclusion")
> > * commit 5ad21de6bae0 ("serial: s5p: Use livetree API to get "id"
> > property")
> > * commit e79f630dbf67 ("serial: s5p: Use named constants for register
> > values")
> > * commit a627f2802a71 ("serial: s5p: Improve coding style")
> > * commit 33e7ca5a9b6a ("serial: s5p: Use dev_read_addr_ptr() to get
> > base address")
> > * commit 6219b47c4d91 ("board: samsung: Fix SYS_CONFIG_NAME configs in
> > axy17lte Kconfig")
> > * commit 470682ace1e0 ("configs: Remove unneeded SYS_CONFIG_NAME from
> > a*y17lte defconfigs")
> >
> > and series [1] (dependency) is still pending.
> >
> > For more detailed description please see the board documentation (added
> > in PATCH #12) and corresponding commit messages.
> >
> > [1] https://lists.denx.de/pipermail/u-boot/2023-November/539033.html
> >
> > Sam Protsenko (13):
> > dt-bindings: soc: samsung: Add Exynos USI
> > dt-bindings: soc: samsung: Add Exynos PMU
> > dt-bindings: clock: Add Exynos850 clock controller
> > soc: samsung: Add Exynos USI driver
> > soc: samsung: Add Exynos PMU driver
> > clk: exynos: Move pll code into clk-exynos7420
> > clk: exynos: Add Samsung clock framework
> > clk: exynos: Add Exynos850 clock driver
> > pinctrl: exynos: Add pinctrl support for Exynos850
> > serial: s5p: Add Exynos850 compatible
> > arm: exynos: Add Exynos850 SoC support
> > board: samsung: Add support for E850-96 board
> > MAINTAINERS: Add new Samsung subsystems
> >
> > MAINTAINERS | 25 +
> > arch/arm/dts/Makefile |1 +
> > arch/arm/dts/exynos-pinctrl.h | 79 +
> > arch/arm/dts/exynos850-e850-96-u-boot.dtsi| 37 +
> > arch/arm/dts/exynos850-e850-96.dts| 273
> > arch/arm/dts/exynos850-pinctrl.dtsi | 663 +
> > arch/arm/dts/exynos850.dtsi | 809 +++
> > arch/arm/mach-exynos/Kconfig | 28 +-
> > arch/arm/mach-exynos/mmu-arm64.c | 34 +
> > board/samsung/e850-96/Kconfig | 16 +
> > board/samsung/e850-96/MAINTAINERS |9 +
> > board/samsung/e850-96/Makefile|6 +
> > board/samsung/e850-96/e850-96.c | 22 +
> > configs/e850-96_defconfig | 21 +
> > doc/board/samsung/e850-96.rst | 87 ++
> > .../img/exynos850-boot-architecture.svg | 1283 +
> > doc/board/samsung/index.rst |1 +
> > .../clock/samsung,exynos850-clock.yaml| 307
> > .../soc/samsung/exynos-pmu.yaml | 85 ++
> > .../soc/samsung/exynos-usi.yaml | 162 +++
> > drivers/clk/exynos/Kconfig|7 +
> > drivers/clk/exynos/Makefile | 11 +-
> > drivers/clk/exynos/clk-exynos7420.c | 25 +-
> > drivers/clk/exynos/clk-exynos850.c| 189 +++
> > drivers/clk/exynos/clk-pll.c | 167 ++-
> > drivers/clk/exynos/clk-pll.h | 16 +-
> > drivers/clk/exynos/clk.c | 121 ++
> > drivers/clk/exynos/clk.h | 228 +++
> > drivers/pi
Re: [PATCH v2 00/32] Qualcomm generic board support
On Thu, 21 Dec 2023 at 21:08, Caleb Connolly wrote: > > > > On 20/12/2023 13:07, Sumit Garg wrote: > > Hi Caleb, > > Hi Sumit, > > [...] > > >> > >> == Upstream DT == > >> > >> All Qualcomm boards have had their devicetree files replaced with the > >> upstream versions. Previous patch series made the necessary driver > >> adjustments to fully support the upstream DT format. All future > >> Qualcomm boards should use upstream DTS by default. > >> > >> Once Sumit's work to import dt-rebasing has been merged, we will drop > >> the imported DT and bindings again. > > > > Since there is consensus building in the U-Boot community to use DT > > rebasing subtree, I would suggest you rebase your work on top of [1]. > > You can take an amlogic SoC patch [2] as a reference and see > > corresponding value-add. I don't see the point of unnecessary churn if > > there is consensus we agree upon. > > > I designed this so that we can just delete the imported stuff once the > dt-rebasing series is merged. Importing a few files and deleting them > later is not really a big deal, so please let's not block fixing > Qualcomm support on this tangentially related series. Fair enough, I think I can live with that for the time being. Let me give this series a spin on QCS404. -Sumit > > Thanks, > > > > > [1] > > https://lore.kernel.org/all/20231214135103.1606605-1-sumit.g...@linaro.org/ > > [2] > > https://lore.kernel.org/all/20231214135103.1606605-8-sumit.g...@linaro.org/ > > > >> > > -- > // Caleb (they/them)
[PATCH v2 7/8] dts: meson-gxbb: Switch to using upstream DT
Although there were still some variations in board DTS files based on meson-gxbb SoC but I think those were minor differences from upstream and shouldn't impact boot on these devices. So switch to upstream DT via mirroring amlogic/ directory from devicetree-rebasing/src/arm64/amlogic/ directory. And thereby directly building DTB from there including *-u-boot.dtsi files from arch/$(ARCH)/dts/ directory. Reviewed-by: Neil Armstrong Signed-off-by: Sumit Garg --- configs/nanopi-k2_defconfig | 3 ++- configs/odroid-c2_defconfig | 3 ++- configs/p200_defconfig| 3 ++- configs/p201_defconfig| 3 ++- configs/videostrong-kii-pro_defconfig | 3 ++- configs/wetek-hub_defconfig | 3 ++- configs/wetek-play2_defconfig | 3 ++- dts/arch/arm64/Makefile | 9 + dts/arch/arm64/amlogic| 1 + 9 files changed, 24 insertions(+), 7 deletions(-) create mode 12 dts/arch/arm64/amlogic diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index 41dbf7981f8..3db296916e9 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-nanopi-k2" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 5f9f323e06e..65857ff478c 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-odroidc2" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/p200_defconfig b/configs/p200_defconfig index cd579ef5f14..c1792db51fd 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-p200" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/p201_defconfig b/configs/p201_defconfig index b2f0a0ccdb4..202e1da5bcc 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -7,7 +7,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-p201" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/videostrong-kii-pro_defconfig b/configs/videostrong-kii-pro_defconfig index 3eda8f14a21..d09333d3b96 100644 --- a/configs/videostrong-kii-pro_defconfig +++ b/configs/videostrong-kii-pro_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-kii-pro" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-kii-pro" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/wetek-hub_defconfig b/configs/wetek-hub_defconfig index fd92b041e73..73f3d4aad5d 100644 --- a/configs/wetek-hub_defconfig +++ b/configs/wetek-hub_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-hub" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-wetek-hub" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/configs/wetek-play2_defconfig b/configs/wetek-play2_defconfig index b887419a6ba..26f57b4214a 100644 --- a/configs/wetek-play2_defconfig +++ b/configs/wetek-play2_defconfig @@ -6,7 +6,8 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-wetek-play2" +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="amlogic/meson-gxbb-wetek-play2" CONFIG_OF_LIBFDT_OVERLAY=y CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 diff --git a/dts/arch/arm64/Makefile b/dts/arch/arm64/Makefile index 16e9fea622d..d548584cf5c 100644 --- a/dts/arch/arm64/Makefile +++ b/dts/arch/arm64/Makefile @@ -1,5 +1,14 @@ # SPDX-License-Identifier: GPL-2.0+ +dtb-$(CONFIG_ARCH_MESON) += \ + amlogic/meson-gxbb-kii-pro.dtb \ + amlogic/meson-gxbb-nan
[PATCH v2 8/8] dts: meson-gxbb: Drop redundant devicetree files
Since meson-gxbb based boards switched to using upstream DT, so drop
redundant files from arch/arm/dts directory. Only *-u-boot.dtsi files
kept in arch/arm/dts directory for these boards.
Signed-off-by: Sumit Garg
---
arch/arm/dts/Makefile | 8 -
arch/arm/dts/meson-gxbb-kii-pro.dts | 140
arch/arm/dts/meson-gxbb-nanopi-k2.dts | 415
arch/arm/dts/meson-gxbb-odroidc2.dts| 418
arch/arm/dts/meson-gxbb-p200.dts| 100 ---
arch/arm/dts/meson-gxbb-p201.dts| 26 -
arch/arm/dts/meson-gxbb-p20x.dtsi | 250 ---
arch/arm/dts/meson-gxbb-wetek-hub.dts | 58 --
arch/arm/dts/meson-gxbb-wetek-play2.dts | 119
arch/arm/dts/meson-gxbb-wetek.dtsi | 292
arch/arm/dts/meson-gxbb.dtsi| 856
11 files changed, 2682 deletions(-)
delete mode 100644 arch/arm/dts/meson-gxbb-kii-pro.dts
delete mode 100644 arch/arm/dts/meson-gxbb-nanopi-k2.dts
delete mode 100644 arch/arm/dts/meson-gxbb-odroidc2.dts
delete mode 100644 arch/arm/dts/meson-gxbb-p200.dts
delete mode 100644 arch/arm/dts/meson-gxbb-p201.dts
delete mode 100644 arch/arm/dts/meson-gxbb-p20x.dtsi
delete mode 100644 arch/arm/dts/meson-gxbb-wetek-hub.dts
delete mode 100644 arch/arm/dts/meson-gxbb-wetek-play2.dts
delete mode 100644 arch/arm/dts/meson-gxbb-wetek.dtsi
delete mode 100644 arch/arm/dts/meson-gxbb.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 5fc888680b3..45bd1166029 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -212,14 +212,6 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-a1-ad401.dtb \
meson-axg-s400.dtb \
meson-axg-jethome-jethub-j100.dtb \
- meson-gxbb-kii-pro.dtb \
- meson-gxbb-nanopi-k2.dtb \
- meson-gxbb-odroidc2.dtb \
- meson-gxbb-nanopi-k2.dtb \
- meson-gxbb-p200.dtb \
- meson-gxbb-p201.dtb \
- meson-gxbb-wetek-hub.dtb \
- meson-gxbb-wetek-play2.dtb \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxl-s905w-jethome-jethub-j80.dtb \
diff --git a/arch/arm/dts/meson-gxbb-kii-pro.dts
b/arch/arm/dts/meson-gxbb-kii-pro.dts
deleted file mode 100644
index e238f1f1012..000
--- a/arch/arm/dts/meson-gxbb-kii-pro.dts
+++ /dev/null
@@ -1,140 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Mohammad Rasim
- */
-
-/dts-v1/;
-
-#include "meson-gxbb-p20x.dtsi"
-#include
-#include
-#include
-#include
-
-/ {
- compatible = "videostrong,kii-pro", "amlogic,meson-gxbb";
- model = "Videostrong KII Pro";
-
- spdif_dit: audio-codec-0 {
- #sound-dai-cells = <0>;
- compatible = "linux,spdif-dit";
- status = "okay";
- sound-name-prefix = "DIT";
- };
-
- leds {
- compatible = "gpio-leds";
- led {
- gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_LOW>;
- color = ;
- function = LED_FUNCTION_STATUS;
- default-state = "off";
- };
- };
-
- gpio-keys-polled {
- compatible = "gpio-keys-polled";
- poll-interval = <20>;
-
- button-reset {
- label = "reset";
- linux,code = ;
- gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
- };
- };
-
- sound {
- compatible = "amlogic,gx-sound-card";
- model = "KII-PRO";
- assigned-clocks = <&clkc CLKID_MPLL0>,
- <&clkc CLKID_MPLL1>,
- <&clkc CLKID_MPLL2>;
- assigned-clock-parents = <0>, <0>, <0>;
- assigned-clock-rates = <294912000>,
- <270950400>,
- <393216000>;
-
- dai-link-0 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>;
- };
-
- dai-link-1 {
- sound-dai = <&aiu AIU_CPU CPU_SPDIF_FIFO>;
- };
-
- dai-link-2 {
- sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>;
- dai-format = "i2s";
- mclk-fs = <256>;
-
- codec-0 {
- sound-dai = <&aiu AIU_HDMI CTRL_I2S>;
- };
- };
-
- dai-link-3 {
- sound-dai = <&aiu AIU_CPU CPU_SPDIF_ENCODER>;
-
- codec-0 {
- sound-dai = <&spdif_dit>;
- };
- };
-
- dai-link-4 {
- sound-dai = <&aiu AIU_HDMI CTRL_OUT>;
-
- codec-0 {
- sound-dai = <&hdmi_tx>;
-
[PATCH v2 6/8] MAINTAINERS: Add myself as devicetree-rebasing maintainer
Reviewed-by: Simon Glass Signed-off-by: Sumit Garg --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 969514468cb..253092c345c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -951,6 +951,12 @@ F: cmd/cyclic.c F: common/cyclic.c F: include/cyclic.h +DEVICETREE REBASING SUBTREE +M: Sumit Garg +S: Maintained +F: devicetree-rebasing/ +F: dts/arch/ + DFU M: Lukasz Majewski M: Mattijs Korpershoek -- 2.34.1
[PATCH v2 5/8] doc: devicetree: Updates for devicetree-rebasing subtree
Encourage SoC/board maintainers to migrate to using devicetree-rebasing subtree and maintain a regular sync with Linux kernel devicetree files and bindings. Along with that add documentation regarding how to run DT bindings schema checks. Signed-off-by: Sumit Garg --- doc/develop/devicetree/control.rst | 108 +++-- 1 file changed, 86 insertions(+), 22 deletions(-) diff --git a/doc/develop/devicetree/control.rst b/doc/develop/devicetree/control.rst index cbb65c9b177..7c15f6d8c19 100644 --- a/doc/develop/devicetree/control.rst +++ b/doc/develop/devicetree/control.rst @@ -1,5 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0+ .. sectionauthor:: Copyright 2011 The Chromium OS Authors +.. Copyright 2023 Linaro Ltd. Devicetree Control in U-Boot @@ -22,12 +23,11 @@ for three reasons: hierarchical format - It is fairly efficient to read incrementally -The arch//dts directories contains a Makefile for building the devicetree -blob and embedding it in the U-Boot image. This is useful since it allows -U-Boot to configure itself according to what it finds there. If you have -a number of similar boards with different peripherals, you can describe -the features of each board in the devicetree file, and have a single -generic source base. +The U-Boot Makefile infrastructure allows for building the devicetree blob +and embedding it in the U-Boot image. This is useful since it allows U-Boot +to configure itself according to what it finds there. If you have a number +of similar boards with different peripherals, you can describe the features +of each board in the devicetree file, and have a single generic source base. To enable this feature, add CONFIG_OF_CONTROL to your board config file. @@ -68,8 +68,21 @@ a binary file. U-Boot adds its own `fdtgrep` for creating subsets of the file. Where do I get a devicetree file for my board? -- -You may find that the Linux kernel has a suitable file. Look in the -kernel source in arch//boot/dts. +Linux kernel Git repository has been the place where devicetree files along +with devicetree bindings are stored and maintained. There is devicetee-rebasing +(dtrepo_) which maintains a forked copy of devicetree files along with bindings +at every Linux kernel major release or intermideate release candidates. + +In order to maintain devicetree files sync, U-Boot maintains a Git subtree for +devicetee-rebasing repo as `devicetee-rebasing/` sub-directory. It is regularly +kept updated with every new kernel major release via subtree pull as follows:: + +git subtree pull --prefix devicetree-rebasing \ + git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git \ + --squash + +You may find that the `devicetee-rebasing/` sub-directory has a suitable +devicetree file for your board. Look in `devicetree-rebasing/src//`. If not you might find other boards with suitable files that you can modify to your needs. Look in the board directories for files with a @@ -81,18 +94,21 @@ Failing that, you could write one from scratch yourself! Configuration - -Use:: +Traditionally, U-Boot placed copies of devicetree source files from Linux +kernel into `arch//dts/.dts` which can be selected via:: - #define CONFIG_DEFAULT_DEVICE_TREE "" +#define CONFIG_DEFAULT_DEVICE_TREE "" -to set the filename of the devicetree source. Then put your devicetree -file into:: +However, it has become combersome over time for each SoC/board maintainer to +keep devicetree files in sync with Linux kernel. Thereby, SoC/board maintainers +are encouraged to migrate to use mirrored copies from `devicetree-rebasing/` +into `dts/arch//` via:: - arch//dts/.dts +#define CONFIG_OF_UPSTREAM=y +#define CONFIG_DEFAULT_DEVICE_TREE "/" -This should include your CPU or SOC's devicetree file, placed in -`arch//dts`, and then make any adjustments required using a u-boot-dtsi -file for your board. +This should include your CPU or SOC's devicetree file. On top of that any U-Boot +specific tweaks (see: dttweaks_) can be made for your board. If CONFIG_OF_EMBED is defined, then it will be picked up and built into the U-Boot image (including u-boot.bin). This is suitable for debugging @@ -156,8 +172,9 @@ ways: Adding tweaks for U-Boot -It is strongly recommended that devicetree files in U-Boot are an exact copy of -those in Linux, so that it is easy to sync them up from time to time. +With devicetee-rebasing Git subtree, it is ensured that devicetree files in +U-Boot are an exact copy of those in Linux kernel via mirroring into +`dts/arch//`. U-Boot is of course a very different project from Linux, e.g. it operates under much more restrictive memory and code-size constraints. Where Linux may use a @@ -170,8 +187,8 @@ constraints are even more extreme and the devicetree is shrunk to remove unwanted nodes, or even tu
[PATCH v2 4/8] dts: Add alternative location for upstream DTB builds
Allow platform owners to mirror devicetree files from devitree-rebasing directory into dts/arch/$(ARCH) (special case for dts/arch/arm64). Then build then along with any *-u-boot.dtsi file present in arch/$(ARCH)/dts directory. This will help easy migration for platforms which currently are compliant with upstream Linux kernel devicetree files. Signed-off-by: Sumit Garg --- dts/Kconfig | 11 +++ dts/Makefile| 17 ++--- dts/arch/arm64/Makefile | 14 ++ 3 files changed, 39 insertions(+), 3 deletions(-) create mode 100644 dts/arch/arm64/Makefile diff --git a/dts/Kconfig b/dts/Kconfig index 00c0aeff893..e58c1c6f2ab 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -85,6 +85,17 @@ config OF_LIVE enables a live tree which is available after relocation, and can be adjusted as needed. +config OF_UPSTREAM + bool "Enable use of devicetree imported from Linux kernel release" + help + Traditionally, U-Boot platforms used to have their custom devicetree + files or copy devicetree files from Linux kernel which are hard to + maintain and can usually get out-of-sync from Linux kernel. This + option enables platforms to migrate to devicetree-rebasing repo where + a regular sync will be maintained every major Linux kernel release + cycle. However, platforms can still have some custom u-boot specific + bits maintained as part of *-u-boot.dtsi files. + choice prompt "Provider of DTB for DT control" depends on OF_CONTROL diff --git a/dts/Makefile b/dts/Makefile index 3437e54033d..68daaf45ec7 100644 --- a/dts/Makefile +++ b/dts/Makefile @@ -10,10 +10,20 @@ ifeq ($(DEVICE_TREE),) DEVICE_TREE := unset endif +ifeq ($(CONFIG_OF_UPSTREAM),y) +ifeq ($(CONFIG_ARM64),y) +dt_dir := dts/arch/arm64 +else +dt_dir := dts/arch/$(ARCH) +endif +else +dt_dir := arch/$(ARCH)/dts +endif + ifneq ($(EXT_DTB),) DTB := $(EXT_DTB) else -DTB := arch/$(ARCH)/dts/$(DEVICE_TREE).dtb +DTB := $(dt_dir)/$(DEVICE_TREE).dtb endif $(obj)/dt-$(SPL_NAME).dtb: dts/dt.dtb $(objtree)/tools/fdtgrep FORCE @@ -41,7 +51,7 @@ $(DTB): arch-dtbs PHONY += arch-dtbs arch-dtbs: - $(Q)$(MAKE) $(build)=arch/$(ARCH)/dts dtbs + $(Q)$(MAKE) $(build)=$(dt_dir) dtbs ifeq ($(CONFIG_SPL_BUILD),y) obj-$(CONFIG_OF_EMBED) := dt-spl.dtb.o @@ -65,4 +75,5 @@ clean-files := dt.dtb.S # Let clean descend into dts directories subdir- += ../arch/arc/dts ../arch/arm/dts ../arch/m68k/dts ../arch/microblaze/dts \ ../arch/mips/dts ../arch/nios2/dts ../arch/powerpc/dts ../arch/riscv/dts \ - ../arch/sandbox/dts ../arch/sh/dts ../arch/x86/dts ../arch/xtensa/dts + ../arch/sandbox/dts ../arch/sh/dts ../arch/x86/dts ../arch/xtensa/dts\ + ./arch/arm64 ./arch/$(ARCH) diff --git a/dts/arch/arm64/Makefile b/dts/arch/arm64/Makefile new file mode 100644 index 000..16e9fea622d --- /dev/null +++ b/dts/arch/arm64/Makefile @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0+ + +include $(srctree)/scripts/Makefile.dts + +targets += $(dtb-y) + +# Add any required device tree compiler flags here +DTC_FLAGS += -a 0x8 + +PHONY += dtbs +dtbs: $(addprefix $(obj)/, $(dtb-y)) + @: + +clean-files := */*.dtb */*.dtbo */*_HS -- 2.34.1
[PATCH v2 3/8] scripts/Makefile.lib: Statically define *-u-boot.dtsi files location
Allow u-boot to build DTB from a different directory tree such that
*-u-boot.dtsi files can be included from a common location. Currently
that location is arch/$(ARCH)/dts/, so statically define that common
location.
This is needed for platform owners to start building DTB files from
devicetree-rebasing directory but still being able to include
*-u-boot.dtsi files.
Signed-off-by: Sumit Garg
---
scripts/Makefile.lib | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 27b9437027c..09330421856 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -159,18 +159,20 @@ cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS)
$(UBOOTINCLUDE) \
ld_flags = $(KBUILD_LDFLAGS) $(ldflags-y) $(LDFLAGS_$(@F))
# Try these files in order to find the U-Boot-specific .dtsi include file
-u_boot_dtsi_options = $(strip $(wildcard $(dir $<)$(basename $(notdir
$<))-u-boot.dtsi) \
- $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \
- $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \
- $(wildcard $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \
- $(wildcard $(dir $<)u-boot.dtsi))
+u_boot_dtsi_loc = $(srctree)/arch/$(ARCH)/dts/
+
+u_boot_dtsi_options = $(strip $(wildcard $(u_boot_dtsi_loc)$(basename $(notdir
$<))-u-boot.dtsi) \
+ $(wildcard $(u_boot_dtsi_loc)$(subst
$\",,$(CONFIG_SYS_SOC))-u-boot.dtsi) \
+ $(wildcard $(u_boot_dtsi_loc)$(subst
$\",,$(CONFIG_SYS_CPU))-u-boot.dtsi) \
+ $(wildcard $(u_boot_dtsi_loc)$(subst
$\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi) \
+ $(wildcard $(u_boot_dtsi_loc)u-boot.dtsi))
u_boot_dtsi_options_raw = $(warning Automatic .dtsi inclusion: options: \
- $(dir $<)$(basename $(notdir $<))-u-boot.dtsi \
- $(dir $<)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \
- $(dir $<)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \
- $(dir $<)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \
- $(dir $<)u-boot.dtsi ... \
+ $(u_boot_dtsi_loc)$(basename $(notdir $<))-u-boot.dtsi \
+ $(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_SOC))-u-boot.dtsi \
+ $(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_CPU))-u-boot.dtsi \
+ $(u_boot_dtsi_loc)$(subst $\",,$(CONFIG_SYS_VENDOR))-u-boot.dtsi \
+ $(u_boot_dtsi_loc)u-boot.dtsi ... \
found: $(if $(u_boot_dtsi_options),"$(u_boot_dtsi_options)",nothing!))
# Uncomment for debugging
@@ -190,6 +192,7 @@ dtsi_include_list += $(CONFIG_DEVICE_TREE_INCLUDES)
dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc\
$(UBOOTINCLUDE) \
-I$(dir $<) \
+-I$(u_boot_dtsi_loc) \
-I$(srctree)/arch/$(ARCH)/dts/include \
-I$(srctree)/include\
-D__ASSEMBLY__ \
@@ -328,7 +331,7 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \
echo '$(pound)include "$(f)"' >> $(pre-tmp);) \
$(HOSTCC) -E $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp)
$(pre-tmp) ; \
$(DTC) -O dtb -o $@ -b 0 \
- -i $(dir $<) $(DTC_FLAGS) \
+ -i $(dir $<) -i $(u_boot_dtsi_loc) $(DTC_FLAGS) \
-d $(depfile).dtc.tmp $(dtc-tmp) || \
(echo "Check $(shell pwd)/$(pre-tmp) for errors" && false) \
; \
--
2.34.1
[PATCH v2 2/8] Makefile: Add support for DT bindings schema checks
This adds the build infrastructure for checking DT binding schema documents and validating dtb files using the binding schema. Here we use devicetree-rebasing directory to provide the DT bindings. Dependency: --- The DT schema project must be installed in order to validate the DT schema binding documents and validate DTS files using the DT schema. The DT schema project can be installed with pip:: pip3 install dtschema Note that 'dtschema' installation requires 'swig' and Python development files installed first. On Debian/Ubuntu systems:: apt install swig python3-dev Testing: Build dts files and check using DT binding schema: $ make dtbs_check Optionally, DT_SCHEMA_FILES can be passed in with a schema file(s) to use for validation. This makes it easier to find and fix errors generated by a specific schema. Note, at this point dtbs_check is an optional build target as there are many warnings generated due to custom DT properties used by many platforms in u-boot. It is expected with these checks that compliance with DT bindings to take place. Once that's done it can be added to CI builds to remain compliant with DT bindings. Signed-off-by: Sumit Garg --- Makefile | 20 ++-- scripts/Makefile.lib | 17 +++-- 2 files changed, 33 insertions(+), 4 deletions(-) diff --git a/Makefile b/Makefile index 750bbdb1b71..d8d168cd4c3 100644 --- a/Makefile +++ b/Makefile @@ -1158,12 +1158,28 @@ endif @# disabling OF_BOARD. $(call cmd,ofcheck,$(KCONFIG_CONFIG)) -PHONY += dtbs +PHONY += dtbs dtbs_check dtbs: dts/dt.dtb @: -dts/dt.dtb: u-boot +dts/dt.dtb: dtbs_prepare u-boot $(Q)$(MAKE) $(build)=dts dtbs +dtbs_prepare: prepare3 + +ifneq ($(filter dtbs_check, $(MAKECMDGOALS)),) +export CHECK_DTBS=y +endif + +ifneq ($(CHECK_DTBS),) +dtbs_prepare: dt_binding_check +endif + +dtbs_check: dt_binding_check dtbs + +DT_BINDING_DIR := devicetree-rebasing/Bindings +dt_binding_check: scripts_dtc + $(Q)$(MAKE) $(build)=$(DT_BINDING_DIR) $(DT_BINDING_DIR)/processed-schema.json + quiet_cmd_copy = COPY$@ cmd_copy = cp $< $@ diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 16bbc277a9f..27b9437027c 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -356,8 +356,21 @@ endif dtsi_include_list_deps = $(addprefix $(obj)/,$(subst $(quote),,$(dtsi_include_list))) -$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) FORCE - $(call if_changed_dep,dtc) +ifneq ($(CHECK_DTBS),) +DT_CHECKER ?= dt-validate +DT_CHECKER_FLAGS ?= $(if $(DT_SCHEMA_FILES),-l $(DT_SCHEMA_FILES),-m) +DT_BINDING_DIR := devicetree-rebasing/Bindings +DT_TMP_SCHEMA := $(objtree)/$(DT_BINDING_DIR)/processed-schema.json + +quiet_cmd_dtb = DTC_CHK $@ + cmd_dtb = $(cmd_dtc) ; $(DT_CHECKER) $(DT_CHECKER_FLAGS) -u $(srctree)/$(DT_BINDING_DIR) -p $(DT_TMP_SCHEMA) $@ || true +else +quiet_cmd_dtb = $(quiet_cmd_dtc) + cmd_dtb = $(cmd_dtc) +endif + +$(obj)/%.dtb: $(src)/%.dts $(DTC) $(dtsi_include_list_deps) $(DT_TMP_SCHEMA) FORCE + $(call if_changed_dep,dtb) pre-tmp = $(subst $(comma),_,$(dot-target).pre.tmp) dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp) -- 2.34.1
[PATCH v2 1/8] CI: Exclude devicetree-rebasing subtree for CONFIG checks
Since devicetree-rebasing is an external repo with its own coding style, exclude it from Azure and gitlab CI CONFIG checks. Signed-off-by: Sumit Garg --- .azure-pipelines.yml | 3 ++- .gitlab-ci.yml | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index d6f3fa423c6..f100c4493e6 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -65,7 +65,8 @@ stages: # have no matches. - script: git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_' :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h - :^include/linux/kconfig.h :^tools/ && exit 1 || exit 0 + :^include/linux/kconfig.h :^tools/ :^devicetree-rebasing/ && + exit 1 || exit 0 - job: docs displayName: 'Build documentation' diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index fee165198ae..96ca9f72bbc 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -161,7 +161,8 @@ check for new CONFIG symbols outside Kconfig: # have no matches. - git grep -E '^#[[:blank:]]*(define|undef)[[:blank:]]*CONFIG_' :^doc/ :^arch/arm/dts/ :^scripts/kconfig/lkc.h -:^include/linux/kconfig.h :^tools/ && exit 1 || exit 0 +:^include/linux/kconfig.h :^tools/ :^devicetree-rebasing/ && +exit 1 || exit 0 # build documentation docs: -- 2.34.1
[PATCH v2 0/8] An effort to bring DT bindings compliance within U-Boot
Changes in v2: -- - Patch #1: excluded gitab CI config check and added commit description. - Patch #3: s/UBOOT_DTSI_LOC/u_boot_dtsi_loc/ - Patch #4: s/DEVICE_TREE_LOC/dt_dir/ and s/U-boot/U-Boot/ - Patch #5: s/U-boot/U-Boot/ - Patch #6 and #7: Picked up review tags Prerequisite This patch series requires devicetree-rebasing git repo to be added as a subtree to the main U-Boot repo via: $ git subtree add --prefix devicetree-rebasing \ git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git \ v6.6-dts --squash Background -- This effort started while I was reviewing patch series corresponding to Qcom platforms [1] which was about to import modified devicetree source files from Linux kernel. I suppose keeping devicetree files sync with Linux kernel without any DT bindings schema validation has been a pain for U-Boot SoC/platform maintainers. There has been past discussions about a single DT repo but that hasn't come up and Linux kernel remained the place where DT source files as well as bindings are placed and maintained. However, Linux kernel DT maintainers proposed [2] for U-Boot to rather use devicetree-rebasing repo [3] which is a forked copy from Linux kernel for DT source files as well as bindings. It is tagged at every Linux kernel major release or intermideate release candidates. So here I have tried to reuse that to bring DT bingings compliance as well as a standard way to maintain a regular sync of DT source files with Linux kernel. In order to maintain devicetree files sync, U-Boot will maintains a Git subtree for devicetee-rebasing repo as `devicetee-rebasing/` sub-directory. It will be regularly updated with every new kernel major release via subtree pull as follows: $ git subtree pull --prefix devicetree-rebasing \ git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git \ --squash The RFC/prototype for this series has been discussed with Linux DT maintainers as well as U-Boot maintainers here [4]. Now we would like to reach out to wider U-Boot community to seek feedback. [1] https://lore.kernel.org/all/CAFA6WYMLUD9cnkr=r0uur+1uetmkkjm2zddmjtxb3nmrlk+...@mail.gmail.com/ [2] https://lore.kernel.org/all/cal_jsqkejv2tsgmt+0zio7_qbbfhtycbgnhjhypkdfzfo9j...@mail.gmail.com/ [3] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git/ [4] https://github.com/u-boot/u-boot/pull/451 Changes --- Traditionally, U-Boot placed copies of devicetree source files from Linux kernel into `arch//dts/.dts`, which can be selected via: CONFIG_DEFAULT_DEVICE_TREE "" SoC/board maintainers are encouraged to migrate to using mirrored copies from `devicetree-rebasing/` into `dts/arch//` via: CONFIG_OF_UPSTREAM=y CONFIG_DEFAULT_DEVICE_TREE "/" An example have been shown for Amlogic meson-gxbb SoC and corresponding derived boards via patch #7 and #8. Devicetree bindings schema checks - With devicetee-rebasing Git subtree, the devicetree bindings are also regularly synced with Linux kernel as `devicetree-rebasing/Bindings/` sub-directory. This allows U-Boot to run devicetree bindings schema checks which will bring compliance to U-Boot core/drivers regarding usage of devicetree. Dependencies The DT schema project must be installed in order to validate the DT schema binding documents and validate DTS files using the DT schema. The DT schema project can be installed with pip: $ pip3 install dtschema Note that 'dtschema' installation requires 'swig' and Python development files installed first. On Debian/Ubuntu systems: $ apt install swig python3-dev Several executables (dt-doc-validate, dt-mk-schema, dt-validate) will be installed. Ensure they are in your PATH (~/.local/bin by default). Recommended is also to install yamllint (used by dtschema when present). Running checks -- In order to perform validation of DTB files, use the ``dtbs_check`` target: $ make dtbs_check It is also possible to run checks with a subset of matching schema files by setting the ``DT_SCHEMA_FILES`` variable to 1 or more specific schema files or patterns (partial match of a fixed string). Each file or pattern should be separated by ':'. $ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml:rtc.yaml $ make dtbs_check DT_SCHEMA_FILES=/gpio/ $ make dtbs_check DT_SCHEMA_FILES=trivial-devices.yaml Sumit Garg (8): CI: Exclude devicetree-rebasing subtree for CONFIG checks Makefile: Add support for DT bindings schema checks scripts/Makefile.lib: Statically define *-u-boot.dtsi files location dts: Add alternative location for upstream DTB builds doc: devicetree: Updates for devicetree-rebasing subtree MAINTAINERS: Add myself as devicetree-rebasing maintainer dts: meson-gxbb: Switch to using upstream DT dts: meson-gxbb: Drop redundant devicetree files .azure-pipelines.yml| 3 +- .gitlab-ci.yml
[PATCH v2 9/9] mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID
From: Takahiro Kuwano
Infineon(Cypress) S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with
Octal interface. It is a dual-die package parts and has same features
with existing S28 series.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-ids.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index f86e7ff8e5..949ceee375 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -370,6 +370,7 @@ const struct flash_info spi_nor_ids[] = {
{ INFO("s28hl01gt", 0x345a1b, 0, 256 * 1024, 512,
SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hs512t", 0x345b1a, 0, 256 * 1024, 256,
SPI_NOR_OCTAL_DTR_READ) },
{ INFO("s28hs01gt", 0x345b1b, 0, 256 * 1024, 512,
SPI_NOR_OCTAL_DTR_READ) },
+ { INFO("s28hs02gt", 0x345b1c, 0, 256 * 1024, 1024,
SPI_NOR_OCTAL_DTR_READ) },
#endif
#endif
#ifdef CONFIG_SPI_FLASH_SST/* SST */
--
2.34.1
[PATCH v2 8/9] mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()
From: Takahiro Kuwano
Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with spansion_read/write_any_reg().
And finally, we must mask CFR2V[7:4] when changing dummy cycles, as
CFR2V[7] indicates current addressing mode and that should be 1 (4-byte
address mode) for multi-die package parts.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 54 +-
include/linux/mtd/spi-nor.h| 1 +
2 files changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 22b5999a87..860b11fd95 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3535,48 +3535,48 @@ static struct spi_nor_fixups s25fl256l_fixups = {
*/
static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor)
{
- struct spi_mem_op op;
+ u32 addr;
u8 buf;
- u8 addr_width = 3;
int ret;
- /* Use 24 dummy cycles for memory array reads. */
ret = write_enable(nor);
if (ret)
return ret;
- buf = SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
- op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG,
1),
- SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR2V,
1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_OUT(1, &buf, 1));
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret) {
- dev_warn(nor->dev,
-"failed to set default memory latency value: %d\n",
-ret);
- return ret;
- }
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
- return ret;
+ /* Use 24 dummy cycles for memory array reads. */
+ for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
+ ret = spansion_read_any_reg(nor,
+ addr + SPINOR_REG_CYPRESS_CFR2V, 0,
+ &buf);
+ if (ret)
+ return ret;
+ buf &= ~SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASK;
+ buf |= SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24;
+ ret = spansion_write_any_reg(nor,
+addr + SPINOR_REG_CYPRESS_CFR2V,
+buf);
+ if (ret) {
+ dev_warn(nor->dev, "failed to set default memory
latency value: %d\n", ret);
+ return ret;
+ }
+ }
nor->read_dummy = 24;
- /* Set the octal and DTR enable bits. */
ret = write_enable(nor);
if (ret)
return ret;
+ /* Set the octal and DTR enable bits. */
buf = SPINOR_REG_CYPRESS_CFR5_OCT_DTR_EN;
- op = (struct spi_mem_op)SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG,
1),
- SPI_MEM_OP_ADDR(addr_width, SPINOR_REG_CYPRESS_CFR5V,
1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_OUT(1, &buf, 1));
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret) {
- dev_warn(nor->dev, "Failed to enable octal DTR mode\n");
- return ret;
+ for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
+ ret = spansion_write_any_reg(nor,
+addr + SPINOR_REG_CYPRESS_CFR5V,
+buf);
+ if (ret) {
+ dev_warn(nor->dev, "Failed to enable octal DTR mode\n");
+ return ret;
+ }
}
return 0;
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 8a94e12037..d1dbf3eadb 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -185,6 +185,7 @@
#define SPINOR_REG_CYPRESS_STR1V 0x0080
#define SPINOR_REG_CYPRESS_CFR1V 0x0082
#define SPINOR_REG_CYPRESS_CFR2V 0x0083
+#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_MASKGENMASK(3, 0)
#define SPINOR_REG_CYPRESS_CFR2_MEMLAT_11_24 0xb
#define SPINOR_REG_CYPRESS_CFR3V 0x0084
#define SPINOR_REG_CYPRESS_CFR3_PGSZ BIT(4) /* Page size. */
--
2.34.1
[PATCH v2 7/9] mtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28
From: Takahiro Kuwano
s28hx_t_post_bfpt_fixup() fixes erase opcode, erase size, and page size.
s25_post_bfpt_fixup() is doing same thing including multi-die support.
We can consolidate s28hx_t_post_bfpt_fixup() and s25_post_bfpt_fixup()
into one named s25_s28_post_bfpt_fixup().
In s25_s28_post_bfpt_fixup(), set_4byte() is called to force the device to
be 4-byte addressing mode. In S28HS02GT datasheet, the B7 opcode is missing
but it works actually (confirmed).
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 52 --
1 file changed, 6 insertions(+), 46 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 0bc43d3d21..22b5999a87 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3426,10 +3426,10 @@ static void s25_default_init(struct spi_nor *nor)
nor->setup = s25_s28_setup;
}
-static int s25_post_bfpt_fixup(struct spi_nor *nor,
- const struct sfdp_parameter_header *header,
- const struct sfdp_bfpt *bfpt,
- struct spi_nor_flash_parameter *params)
+static int s25_s28_post_bfpt_fixup(struct spi_nor *nor,
+ const struct sfdp_parameter_header *header,
+ const struct sfdp_bfpt *bfpt,
+ struct spi_nor_flash_parameter *params)
{
int ret;
u32 addr;
@@ -3503,7 +3503,7 @@ static void s25_post_sfdp_fixup(struct spi_nor *nor,
static struct spi_nor_fixups s25_fixups = {
.default_init = s25_default_init,
- .post_bfpt = s25_post_bfpt_fixup,
+ .post_bfpt = s25_s28_post_bfpt_fixup,
.post_sfdp = s25_post_sfdp_fixup,
};
@@ -3619,50 +3619,10 @@ static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,
params->rdsr_addr_nbytes = 4;
}
-static int s28hx_t_post_bfpt_fixup(struct spi_nor *nor,
- const struct sfdp_parameter_header
*bfpt_header,
- const struct sfdp_bfpt *bfpt,
- struct spi_nor_flash_parameter *params)
-{
- struct spi_mem_op op;
- u8 buf;
- u8 addr_width = 3;
- int ret;
-
- /*
-* The BFPT table advertises a 512B page size but the page size is
-* actually configurable (with the default being 256B). Read from
-* CFR3V[4] and set the correct size.
-*/
- op = (struct spi_mem_op)
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
- SPI_MEM_OP_ADDR(addr_width,
SPINOR_REG_CYPRESS_CFR3V, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_IN(1, &buf, 1));
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret)
- return ret;
-
- if (buf & SPINOR_REG_CYPRESS_CFR3_PGSZ)
- params->page_size = 512;
- else
- params->page_size = 256;
-
- /*
-* The BFPT advertises that it supports 4k erases, and the datasheet
-* says the same. But 4k erases did not work when testing. So, use 256k
-* erases for now.
-*/
- nor->erase_opcode = SPINOR_OP_SE_4B;
- nor->mtd.erasesize = 0x4;
-
- return 0;
-}
-
static struct spi_nor_fixups s28hx_t_fixups = {
.default_init = s28hx_t_default_init,
.post_sfdp = s28hx_t_post_sfdp_fixup,
- .post_bfpt = s28hx_t_post_bfpt_fixup,
+ .post_bfpt = s25_s28_post_bfpt_fixup,
};
#endif /* CONFIG_SPI_FLASH_S28HX_T */
--
2.34.1
[PATCH v2 6/9] mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28
From: Takahiro Kuwano
s28hx_t_setup() only checks sector layout setting. To support multi-die
package parts like S28HS02GT, it needs to check device size and assign
ready() hook for multi-die package parts. These are covered in s25_setup()
so we can consolidate s28hx_t_setup() and s25_setup() into one named
s25_s28_setup().
spi_nor_wait_till_ready() at the beginning of s28hx_t_setup() can be
removed since there is no op that makes device busy state before setup.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 41 --
1 file changed, 4 insertions(+), 37 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index fe5579db4d..0bc43d3d21 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3375,8 +3375,8 @@ static int s25_s28_erase_non_uniform(struct spi_nor *nor,
loff_t addr)
SZ_128K);
}
-static int s25_setup(struct spi_nor *nor, const struct flash_info *info,
-const struct spi_nor_flash_parameter *params)
+static int s25_s28_setup(struct spi_nor *nor, const struct flash_info *info,
+const struct spi_nor_flash_parameter *params)
{
int ret;
u8 cr;
@@ -3423,7 +3423,7 @@ static int s25_setup(struct spi_nor *nor, const struct
flash_info *info,
static void s25_default_init(struct spi_nor *nor)
{
- nor->setup = s25_setup;
+ nor->setup = s25_s28_setup;
}
static int s25_post_bfpt_fixup(struct spi_nor *nor,
@@ -3582,43 +3582,10 @@ static int spi_nor_cypress_octal_dtr_enable(struct
spi_nor *nor)
return 0;
}
-static int s28hx_t_setup(struct spi_nor *nor, const struct flash_info *info,
-const struct spi_nor_flash_parameter *params)
-{
- struct spi_mem_op op;
- u8 buf;
- u8 addr_width = 3;
- int ret;
-
- ret = spi_nor_wait_till_ready(nor);
- if (ret)
- return ret;
-
- /*
-* Check CFR3V to check if non-uniform sector mode is selected. If it
-* is, set the erase hook to the non-uniform erase procedure.
-*/
- op = (struct spi_mem_op)
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
- SPI_MEM_OP_ADDR(addr_width,
- SPINOR_REG_CYPRESS_CFR3V, 1),
- SPI_MEM_OP_NO_DUMMY,
- SPI_MEM_OP_DATA_IN(1, &buf, 1));
-
- ret = spi_mem_exec_op(nor->spi, &op);
- if (ret)
- return ret;
-
- if (!(buf & SPINOR_REG_CYPRESS_CFR3_UNISECT))
- nor->erase = s25_s28_erase_non_uniform;
-
- return spi_nor_default_setup(nor, info, params);
-}
-
static void s28hx_t_default_init(struct spi_nor *nor)
{
nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable;
- nor->setup = s28hx_t_setup;
+ nor->setup = s25_s28_setup;
}
static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,
--
2.34.1
[PATCH v2 5/9] mtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode
From: Takahiro Kuwano
s25_mdp_ready() handles status polling for multi-die package parts that
requires to read and check status register for each die. To support
S28HS02GT(dual-die package with Octal DTR support), rename function and
use nor->rdsr_dummy in octal DTR mode.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 20e82aaa65..fe5579db4d 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3340,13 +3340,13 @@ static struct spi_nor_fixups s25fs_s_fixups = {
.post_sfdp = s25fs_s_post_sfdp_fixup,
};
-static int s25_mdp_ready(struct spi_nor *nor)
+static int s25_s28_mdp_ready(struct spi_nor *nor)
{
u32 addr;
int ret;
for (addr = 0; addr < nor->mtd.size; addr += SZ_128M) {
- ret = spansion_sr_ready(nor, addr, 0);
+ ret = spansion_sr_ready(nor, addr, nor->rdsr_dummy);
if (!ret)
return ret;
}
@@ -3416,7 +3416,7 @@ static int s25_setup(struct spi_nor *nor, const struct
flash_info *info,
* all dies' status via read any register.
*/
if (nor->mtd.size > SZ_128M)
- nor->ready = s25_mdp_ready;
+ nor->ready = s25_s28_mdp_ready;
return spi_nor_default_setup(nor, info, params);
}
--
2.34.1
[PATCH v2 4/9] mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28
From: Takahiro Kuwano Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode. Instead, it supports CLPEF(0x82) which has the same functionality as CLSR. spansion_sr_ready() is for multi-die package parts including S28HS02GT, so we need to use CLPEF instead of CLSR. This change does not affect to S25x02GT which uses spansion_sr_ready() as S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30). Signed-off-by: Takahiro Kuwano --- drivers/mtd/spi/spi-nor-core.c | 2 +- include/linux/mtd/spi-nor.h| 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 3f761b9b9e..20e82aaa65 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -752,7 +752,7 @@ static int spansion_sr_ready(struct spi_nor *nor, u32 addr_base, u8 dummy) else dev_dbg(nor->dev, "Programming Error occurred\n"); - nor->write_reg(nor, SPINOR_OP_CLSR, NULL, 0); + nor->write_reg(nor, SPINOR_OP_CYPRESS_CLPEF, NULL, 0); return -EIO; } diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ebe38306a1..8a94e12037 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -180,6 +180,7 @@ /* For Cypress flash. */ #define SPINOR_OP_RD_ANY_REG 0x65/* Read any register */ #define SPINOR_OP_WR_ANY_REG 0x71/* Write any register */ +#define SPINOR_OP_CYPRESS_CLPEF0x82/* Clear P/E err flag */ #define SPINOR_REG_CYPRESS_ARCFN 0x0006 #define SPINOR_REG_CYPRESS_STR1V 0x0080 #define SPINOR_REG_CYPRESS_CFR1V 0x0082 -- 2.34.1
[PATCH v2 3/9] mtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode
From: Takahiro Kuwano
In Infineon multi-die package parts, we need to use Read Any Register op
to read status register in 2nd or further die. Infineon S28HS02GT is
dual-die package and supports Octal DTR interface. To support this,
spansion_read_any_reg() needs to be reworked. Implementation is similar
to existing read_sr() that already supports Octal DTR mode.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 34 +-
1 file changed, 29 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index f62a2f2008..3f761b9b9e 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -331,12 +331,36 @@ static int spansion_read_any_reg(struct spi_nor *nor, u32
addr, u8 dummy,
u8 *val)
{
struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
- SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 1),
- SPI_MEM_OP_DUMMY(dummy / 8, 1),
- SPI_MEM_OP_DATA_IN(1, NULL, 1));
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 0),
+ SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 0),
+ SPI_MEM_OP_DUMMY(dummy, 0),
+ SPI_MEM_OP_DATA_IN(1, NULL, 0));
+ u8 buf[2];
+ int ret;
+
+ spi_nor_setup_op(nor, &op, nor->reg_proto);
+
+ /*
+* In Octal DTR mode, the number of address bytes is always 4 regardless
+* of addressing mode setting.
+*/
+ if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR)
+ op.addr.nbytes = 4;
+
+ /*
+* We don't want to read only one byte in DTR mode. So, read 2 and then
+* discard the second byte.
+*/
+ if (spi_nor_protocol_is_dtr(nor->reg_proto))
+ op.data.nbytes = 2;
- return spi_nor_read_write_reg(nor, &op, val);
+ ret = spi_nor_read_write_reg(nor, &op, buf);
+ if (ret)
+ return ret;
+
+ *val = buf[0];
+
+ return 0;
}
static int spansion_write_any_reg(struct spi_nor *nor, u32 addr, u8 val)
--
2.34.1
[PATCH v2 2/9] mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28
From: Takahiro Kuwano
s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 13 +++--
include/linux/mtd/spi-nor.h| 1 -
2 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index a2ef65cf6f..f62a2f2008 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -3344,7 +3344,7 @@ static int s25_quad_enable(struct spi_nor *nor)
return 0;
}
-static int s25_erase_non_uniform(struct spi_nor *nor, loff_t addr)
+static int s25_s28_erase_non_uniform(struct spi_nor *nor, loff_t addr)
{
/* Support 32 x 4KB sectors at bottom */
return spansion_erase_non_uniform(nor, addr, SPINOR_OP_BE_4K_4B, 0,
@@ -3385,7 +3385,7 @@ static int s25_setup(struct spi_nor *nor, const struct
flash_info *info,
if (ret)
return ret;
if (!(cr & SPINOR_REG_CYPRESS_CFR3_UNISECT))
- nor->erase = s25_erase_non_uniform;
+ nor->erase = s25_s28_erase_non_uniform;
/*
* For the multi-die package parts, the ready() hook is needed to check
@@ -3558,13 +3558,6 @@ static int spi_nor_cypress_octal_dtr_enable(struct
spi_nor *nor)
return 0;
}
-static int s28hx_t_erase_non_uniform(struct spi_nor *nor, loff_t addr)
-{
- /* Factory default configuration: 32 x 4 KiB sectors at bottom. */
- return spansion_erase_non_uniform(nor, addr, SPINOR_OP_S28_SE_4K,
- 0, SZ_128K);
-}
-
static int s28hx_t_setup(struct spi_nor *nor, const struct flash_info *info,
const struct spi_nor_flash_parameter *params)
{
@@ -3593,7 +3586,7 @@ static int s28hx_t_setup(struct spi_nor *nor, const
struct flash_info *info,
return ret;
if (!(buf & SPINOR_REG_CYPRESS_CFR3_UNISECT))
- nor->erase = s28hx_t_erase_non_uniform;
+ nor->erase = s25_s28_erase_non_uniform;
return spi_nor_default_setup(nor, info, params);
}
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index f9a55c8e74..ebe38306a1 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -180,7 +180,6 @@
/* For Cypress flash. */
#define SPINOR_OP_RD_ANY_REG 0x65/* Read any register */
#define SPINOR_OP_WR_ANY_REG 0x71/* Write any register */
-#define SPINOR_OP_S28_SE_4K0x21
#define SPINOR_REG_CYPRESS_ARCFN 0x0006
#define SPINOR_REG_CYPRESS_STR1V 0x0080
#define SPINOR_REG_CYPRESS_CFR1V 0x0082
--
2.34.1
[PATCH v2 1/9] mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28
From: Takahiro Kuwano
Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.
Signed-off-by: Takahiro Kuwano
---
drivers/mtd/spi/spi-nor-core.c | 26 ++
include/linux/mtd/spi-nor.h| 11 +++
2 files changed, 17 insertions(+), 20 deletions(-)
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 9a1801ba93..a2ef65cf6f 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -331,7 +331,7 @@ static int spansion_read_any_reg(struct spi_nor *nor, u32
addr, u8 dummy,
u8 *val)
{
struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDAR, 1),
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1),
SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 1),
SPI_MEM_OP_DUMMY(dummy / 8, 1),
SPI_MEM_OP_DATA_IN(1, NULL, 1));
@@ -342,7 +342,7 @@ static int spansion_read_any_reg(struct spi_nor *nor, u32
addr, u8 dummy,
static int spansion_write_any_reg(struct spi_nor *nor, u32 addr, u8 val)
{
struct spi_mem_op op =
- SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRAR, 1),
+ SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WR_ANY_REG, 1),
SPI_MEM_OP_ADDR(nor->addr_mode_nbytes, addr, 1),
SPI_MEM_OP_NO_DUMMY,
SPI_MEM_OP_DATA_OUT(1, NULL, 1));
@@ -714,7 +714,7 @@ static int set_4byte(struct spi_nor *nor, const struct
flash_info *info,
*/
static int spansion_sr_ready(struct spi_nor *nor, u32 addr_base, u8 dummy)
{
- u32 reg_addr = addr_base + SPINOR_REG_ADDR_STR1V;
+ u32 reg_addr = addr_base + SPINOR_REG_CYPRESS_STR1V;
u8 sr;
int ret;
@@ -1856,7 +1856,7 @@ static int macronix_quad_enable(struct spi_nor *nor)
static int spansion_quad_enable_volatile(struct spi_nor *nor, u32 addr_base,
u8 dummy)
{
- u32 addr = addr_base + SPINOR_REG_ADDR_CFR1V;
+ u32 addr = addr_base + SPINOR_REG_CYPRESS_CFR1V;
u8 cr;
int ret;
@@ -3263,11 +3263,11 @@ static int s25fs_s_setup(struct spi_nor *nor, const
struct flash_info *info,
* Read CR3V to check if uniform sector is selected. If not, assign an
* erase hook that supports non-uniform erase.
*/
- ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_CFR3V,
+ ret = spansion_read_any_reg(nor, SPINOR_REG_CYPRESS_CFR3V,
S25FS_S_RDAR_DUMMY, &cfr3v);
if (ret)
return ret;
- if (!(cfr3v & CFR3V_UNHYSA))
+ if (!(cfr3v & SPINOR_REG_CYPRESS_CFR3_UNISECT))
nor->erase = s25fs_s_erase_non_uniform;
return spi_nor_default_setup(nor, info, params);
@@ -3366,7 +3366,8 @@ static int s25_setup(struct spi_nor *nor, const struct
flash_info *info,
* uniform 128KB only due to complexity of non-uniform layout.
*/
if (nor->info->id[4] == S25FS256T_ID4) {
- ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_ARCFN, 8, &cr);
+ ret = spansion_read_any_reg(nor, SPINOR_REG_CYPRESS_ARCFN, 8,
+ &cr);
if (ret)
return ret;
@@ -3380,10 +3381,10 @@ static int s25_setup(struct spi_nor *nor, const struct
flash_info *info,
* Read CFR3V to check if uniform sector is selected. If not, assign an
* erase hook that supports non-uniform erase.
*/
- ret = spansion_read_any_reg(nor, SPINOR_REG_ADDR_CFR3V, 0, &cr);
+ ret = spansion_read_any_reg(nor, SPINOR_REG_CYPRESS_CFR3V, 0, &cr);
if (ret)
return ret;
- if (!(cr & CFR3V_UNHYSA))
+ if (!(cr & SPINOR_REG_CYPRESS_CFR3_UNISECT))
nor->erase = s25_erase_non_uniform;
/*
@@ -3444,12 +3445,13 @@ static int s25_post_bfpt_fixup(struct spi_nor *nor,
* dies are configured to 512B buffer.
*/
for (addr = 0; addr < params->size; addr += SZ_128M) {
- ret = spansion_read_any_reg(nor, addr + SPINOR_REG_ADDR_CFR3V,
- 0, &cfr3v);
+ ret = spansion_read_any_reg(nor,
+ addr + SPINOR_REG_CYPRESS_CFR3V, 0,
+ &cfr3v);
if (ret)
return ret;
- if (!(cfr3v & CFR3V_PGMBUF)) {
+ if (!(cfr3v & SPINOR_REG_CYPRESS_CFR3_PGSZ)) {
params->page_size = 256;
return 0;
}
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index 2861b73edb..f9a55c8e74 100644
--- a
[PATCH v2 0/9] mtd: spi-nor: Add support for Infineon S28HS02GT
From: Takahiro Kuwano Infineon S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with Octal interface. It is a dual-die package parts and has same features with existing S28 series. The goal of this series of patches is to add S28HS02GT support. Before adding device ID to the table, some reworks are done to simplify the support structure for all other S25Hx-T and S28Hx-T families. Tested newly added S28HS02GT and other S25Hx-T and S28Hx-T devices on Zynq-7000 platform with Infineon SPI controller. Only summary datasheet is available on web. https://www.infineon.com/dgdl/Infineon-S28HS02GT_S28HS04GT_S28HL02GT_S28HL04GT_2Gb_4Gb_SEMPER_Flash_Octal_interface_1.8V_3.0V-DataSheet-v01_00-EN.pdf?fileId=8ac78c8c7e7124d1017f0631e33714d9 Please send an email to me for full version of the datasheet. Changes in v2: - Rebased Takahiro Kuwano (9): mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28 mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28 mtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28 mtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28 mtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28 mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable() mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID drivers/mtd/spi/spi-nor-core.c | 224 + drivers/mtd/spi/spi-nor-ids.c | 1 + include/linux/mtd/spi-nor.h| 14 +-- 3 files changed, 91 insertions(+), 148 deletions(-) -- 2.34.1
Re: [PATCH 0/8] An effort to bring DT bindings compliance within U-boot
On Thu, 21 Dec 2023 at 20:48, Simon Glass wrote: > > Hi, > > On Thu, Dec 21, 2023 at 3:03 PM Tom Rini wrote: > > > > On Thu, Dec 14, 2023 at 07:20:55PM +0530, Sumit Garg wrote: > > > > > Prerquisite > > > --- > > > > > > This patch series requires devicetree-rebasing git repo to be added as a > > > subtree to the main U-boot repo via: > > > > > > $ git subtree add --prefix devicetree-rebasing \ > > > > > > git://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git > > > \ > > > v6.6-dts --squash > > > > So, I've played with subtree a little and I think this is the right way > > forward in these cases. If anyone wants to take a look at how this works > > in practice, take a look at: > > https://source.denx.de/u-boot/u-boot/-/commits/WIP/u-boot-with-devicetree-rebasing-since-v6.1/?ref_type=heads > > In that tree I started with the v6.1-dts tag, sync'd all the configs (to > > have an example of a normal commit) and then did a merge of each tag > > until v6.6-dts, so provide some history. And git log looks like what I > > want to see, the squash commit has clear references to what we are > > getting and I make a merge commit that says what I did. If you pull the > > tree and checkout the branch, all the code is right there already, > > nothing further to do. Same with tarball releases. The only thing I > > don't like is the size growth there, but we'll reclaim some of it when > > we delete our obsolete bindings, and then obsolete dts files. > > I spent a bit of time with subtree as well, as part of reviewing this > series, using the instructions Sumit provided. It seems OK to me. We > have to accept that it adds code and there will be changes/churn, but > it is not too different to accepting patches on those files within > U-Boot. We will bring in files which U-Boot doesn't use, but U-Boot > does support a good proportion of the boards supported by Linux, so I > don't see that as a big cost. > > From my experimentation, subtrees seem to have no impact on buildman, > which is great. Am I missing anything? No it shouldn't cause any regression on existing tools/CI/build systems. It is just a version controlled way of importing third party source code as a tarball. > > I still worry about the board-level 'switch' between U-Boot DT and > upstream ones. I believe that should be at the SoC level instead. > Probably I wasn't clear enough in my earlier replies but this series motivates for a SoC level switch only. Patch #7 is essentially a switch for Amlogic meson-gxbb SoC and its derived boards. -Sumit > > > > Maxim, please switch (back, sorry!) to subtree for the next lwIP > > patchset and just not in the prerequisite steps what the subtree command > > is, and make sure the docs have an example of what future re-sync > > "subtree pull" commands should look like. For CI testing, you'll have to > > do that to start with and just not include that patch in the ML part. > > Regards, > Simon
Re: [PATCH v3 00/22] Complete decoupling of bootm logic from commands
On Fri, 15 Dec 2023 20:14:04 -0700, Simon Glass wrote: > This series continues refactoring the bootm code to allow it to be used > with CONFIG_COMMAND disabled. The OS-handling code is refactored and > a new bootm_run() function is created to run through the bootm stages. > This completes the work. > > A booti_go() function is created also, in case it proves useful, but at > last for now standard boot does not use this. > > [...] Applied to u-boot/next, thanks! -- Tom
[PATCH v2 1/1] fw_env: autodetect NAND erase size and env sectors
From: Anthony Loiseau
As already done for NOR chips, if device ESIZE and ENVSECTORS static
configurations are both zero, then autodetect them at runtime.
Cc: Joe Hershberger
cc: Stefan Agner
cc: Rasmus Villemoes
Signed-off-by: Anthony Loiseau
---
tools/env/README | 3 +++
tools/env/fw_env.c | 11 +--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/tools/env/README b/tools/env/README
index 480a893202..b8c6a7e197 100644
--- a/tools/env/README
+++ b/tools/env/README
@@ -58,6 +58,9 @@ DEVICEx_ENVSECTORS defines the number of sectors that may be
used for
this environment instance. On NAND this is used to limit the range
within which bad blocks are skipped, on NOR it is not used.
+If DEVICEx_ESIZE and DEVICEx_ENVSECTORS are both zero, then a runtime
+detection is attempted for NOR and NAND mtd types.
+
To prevent losing changes to the environment and to prevent confusing the MTD
drivers, a lock file at /run/fw_printenv.lock is used to serialize access
to the environment.
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index c9a8774ace..9f57f19d80 100644
--- a/tools/env/fw_env.c
+++ b/tools/env/fw_env.c
@@ -1659,8 +1659,15 @@ static int check_device_config(int dev)
}
DEVTYPE(dev) = mtdinfo.type;
if (DEVESIZE(dev) == 0 && ENVSECTORS(dev) == 0 &&
- mtdinfo.type == MTD_NORFLASH)
- DEVESIZE(dev) = mtdinfo.erasesize;
+ mtdinfo.erasesize > 0) {
+ if (mtdinfo.type == MTD_NORFLASH)
+ DEVESIZE(dev) = mtdinfo.erasesize;
+ else if (mtdinfo.type == MTD_NANDFLASH) {
+ DEVESIZE(dev) = mtdinfo.erasesize;
+ ENVSECTORS(dev) =
+ mtdinfo.size / mtdinfo.erasesize;
+ }
+ }
if (DEVESIZE(dev) == 0)
/* Assume the erase size is the same as the env-size */
DEVESIZE(dev) = ENVSIZE(dev);
--
2.11.0
[PATCH v2 0/1] fw_env: auto-detect NAND characteristics
From: Anthony Loiseau Hello, Here is a patch proposal which modifies fw_env so NAND chip erase size as well as environment sector counts are guessed at runtime if they are both statically configured as zero. This actually extends a previous similar behavior which was NOR-specific, useful when a same RootFS is executed with several flash chips, see e282c422e0b. Be aware that I did not test this exact patch for real. I extracted it from my older u-boot-flsc 2016 tree on which it works well, and built it using a sandbox configuration, without running it. I only checked my gcc was happy with those lines (no warnings added). My feeling is that this patch is small enough to feel confident it will work on master as it worked on my old tree. Opened to any reviews or requests, best rergards, Anthony Loiseau v1: initial buggy submission (broken thread) stephan toradex email no more valid v2: fix cover letter use another email for Stefan cc Rasmus (author of the changed lines) Cc: Joe Hershberger cc: Stefan Agner cc: Rasmus Villemoes Signed-off-by: Anthony Loiseau Anthony Loiseau (1): fw_env: autodetect NAND erase size and env sectors tools/env/README | 3 +++ tools/env/fw_env.c | 11 +-- 2 files changed, 12 insertions(+), 2 deletions(-) -- 2.11.0
[PATCH v3] pci: Enable dm_pci_map_bar() for 64-bit BARs
Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT.
Reviewed-by: Philip Oberfichtner
Reviewed-by: Simon Glass
Signed-off-by: Moritz Fischer
---
Changes from V2:
- Turned IS_ENABLED() into #if defined to allow
building on platforms that don't define
CONFIG_SYS_PCI_64BIT
Changes from V1:
- Reworded commit message / typo
---
drivers/pci/pci-uclass.c | 12
include/pci.h| 4 ++--
2 files changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index e0d01f6a85..04c82d3884 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1611,6 +1611,18 @@ void *dm_pci_map_bar(struct udevice *dev, int bar,
size_t offset, size_t len,
dm_pci_read_config32(udev, bar, &bar_response);
pci_bus_addr = (pci_addr_t)(bar_response & ~0xf);
+#if defined(CONFIG_SYS_PCI_64BIT)
+ /*
+* This assumes that dm_pciauto_setup_device() will allocate
+* a 64-bit address if CONFIG_SYS_PCI_64BIT is enabled and
+* the device advertises that it supports it.
+*/
+ if (bar_response & PCI_BASE_ADDRESS_MEM_TYPE_64) {
+ dm_pci_read_config32(udev, bar + 4, &bar_response);
+ pci_bus_addr |= (pci_addr_t)bar_response << 32;
+ }
+#endif /* CONFIG_SYS_PCI_64BIT */
+
if (~((pci_addr_t)0) - pci_bus_addr < offset)
return NULL;
diff --git a/include/pci.h b/include/pci.h
index 2f5eb30b83..0d1ac7b015 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -1350,8 +1350,8 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev,
phys_addr_t addr, size_t len,
*
* Looks up a base address register and finds the physical memory address
* that corresponds to it.
- * Can be used for 32b BARs 0-5 on type 0 functions and for 32b BARs 0-1 on
- * type 1 functions.
+ * Can be used for 32b/64b BARs 0-5 on type 0 functions and for 32b BARs 0-1
+ * on type 1 functions.
* Can also be used on type 0 functions that support Enhanced Allocation for
* 32b/64b BARs. Note that duplicate BEI entries are not supported.
*
--
2.43.0.472.g3155946c3a-goog
Re: [PATCH v2 RESEND] pci: Enable dm_pci_map_bar() for 64-bit BARs
Tom, On Thu, Dec 21, 2023 at 9:53 AM Tom Rini wrote: > > On Sun, Dec 17, 2023 at 12:52:09AM +, Moritz Fischer wrote: > > > Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT. > > > > Reviewed-by: Philip Oberfichtner > > Reviewed-by: Simon Glass > > Signed-off-by: Moritz Fischer > > This causes a failure to build on qemu_arm and a number of other > platforms, thanks. Argh, yes, I got got by the IS_ENABLED(). Switching it to #if defined(CONFIG_SYS_PCI_64BIT) makes it work. Sorry, let me resend this. - Moritz
Re: [PATCH] lib: rsa: Print detailed error info in rsa_engine_init() on engine resolution failure
On Thu, Dec 14, 2023 at 05:54:17PM +0100, Csókás Bence wrote: > Signed-off-by: Csókás Bence > Reviewed-by: Tom Rini Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] board/keymile/kmcent2: fix update-nor indentation
On Tue, Dec 12, 2023 at 03:39:27PM +0100, Tomas Alvarez Vanoli wrote: > variable was indented as part of the value of the previous variable. > > Signed-off-by: Tomas Alvarez Vanoli > Signed-off-by: Holger Brunck Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 3/3] iommu: add qcom-hyp-smmu
On Mon, Dec 11, 2023 at 06:41:42PM +, Caleb Connolly wrote: > Add a basic implementation of the ARM SMMU. This driver is intended for > use on Qualcomm platforms where the SMMU has been configured by a previous > bootloader, cannot be turned off, and doesn't support BYPASS streams. > It keeps all existing stream mappings and only creates new ones for stream > ids that aren't already configured. > > This driver is necessary to support peripherals that perform DMA which > weren't configured by the previous stage bootloader (for example USB). > It works by allocating a context bank using identity mapping (as U-Boot > doesn't use virtual addresses). > > Signed-off-by: Caleb Connolly Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 2/3] iommu: add a connect op
On Mon, Dec 11, 2023 at 06:41:41PM +, Caleb Connolly wrote: > Add an optional iommu callback to be invoked before a device probes. > This can be used to configure the IOMMU in preparation for the device > (e.g. by allocating a context bank) > > Signed-off-by: Caleb Connolly Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 1/3] iommu: fix compilation when CONFIG_PCI disabled
On Mon, Dec 11, 2023 at 06:41:40PM +, Caleb Connolly wrote: > The dev_pci_iommu_enable() function is only available when CONFIG_PCI is > enabled, replace the runtime check with a preprocessor one to fix > compilation with pci disabled. > > Signed-off-by: Caleb Connolly Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v1] configs: verdin-am62: Disable SPL FIT Overlay
On Mon, Dec 11, 2023 at 02:45:20PM +0100, Francesco Dolcini wrote: > From: Francesco Dolcini > > Disable CONFIG_SPL_LOAD_FIT_APPLY_OVERLAY, this is not required nor used > on verdin am62, disable it to save precious binary size. > > Update defconfig using savedefconfig, this adds CONFIG_OF_LIBFDT_OVERLAY > explicitly. > > Signed-off-by: Francesco Dolcini > Acked-by: Marcel Ziswiler Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] boot: add support for fdt_fixup command in environment
On Mon, Dec 11, 2023 at 12:03:17PM +0100, Matthias Schiffer wrote: > The "fdt" command is convenient for making small changes to the OS FDT, > especially during development. This is easy when the kernel and FDT are > loaded separately, but can be cumbersome for FIT images, requiring to > unpack the image, manually apply overlays, etc. > > Add an option to execute a command "fdt_fixup" from the environment at > the beginning of image_setup_libfdt() (after overlays are applied, and > before the other fixups). > > Signed-off-by: Matthias Schiffer > Reviewed-by: Simon Glass Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH] include: env: ti: ti_common: Run main_cpsw0_qsgmii_phyinit conditionally
On Mon, Dec 11, 2023 at 04:12:09PM +0530, Siddharth Vadapalli wrote: > From: Manorit Chawdhry > > The main_cpsw0_qsgmii_phyinit command is defined only for certain TI > SoCs which have the do_main_cpsw0_qsgmii_phyinit variable set. > > Add a check to ensure that the main_cpsw0_qsgmii_phyinit command is run > only for such SoCs. > > Signed-off-by: Manorit Chawdhry > Signed-off-by: Siddharth Vadapalli > Reviewed-by: Tom Rini > Reviewed-by: Mattijs Korpershoek Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH v2] fs: Fix SPL build if FS_LOADER is enabled
On Thu, Nov 16, 2023 at 10:46:12PM +0530, Mayuresh Chitale wrote: > If FS_LOADER is enabled for the SPL then the build fails with the error: > > fs/fs.o:(.data.rel.fstypes+0x128): > undefined reference to `smh_fs_set_blk_dev' > fs/fs.o:(.data.rel.fstypes+0x140): > undefined reference to `smh_fs_size' > fs/fs.o:(.data.rel.fstypes+0x148): > undefined reference to `smh_fs_read' > fs/fs.o:(.data.rel.fstypes+0x150): > undefined reference to `smh_fs_write' > > Fix the error by populating the semihosting entry in the fs_types array > only for non-SPL builds. > > Signed-off-by: Mayuresh Chitale > Reviewed-by: Tom Rini > Reviewed-by: Sean Anderson Applied to u-boot/next, thanks! -- Tom signature.asc Description: PGP signature
Re: [PATCH 00/26] sync am65x device tree with Linux v6.7-rc1
On Thu, Dec 21, 2023 at 11:43:46AM -0600, Bryan Brattlof wrote: > Hello Everyone! > > This series gets the am65x booting again along with syncing the device > tree files with v6.7-rc1 Linux. > > The bulk of these patches unify the WKUP SPL board file with the arm64 > files to make future syncs from Linux much easier. In the end the DTBs > should look a lot like what the DTBs look like for the am64x which > is fairly similar to the am65x. > > For those interested in what UART boot looks like: >https://paste.sr.ht/~bryanb/7df8a645dc548912cd806abd5ecab967ef3287bc > > Thanks for reviewing and happy holidays > ~Bryan For the series, Tested-by: Tom Rini Nishanth, does this path work for you? -- Tom signature.asc Description: PGP signature
Re: [PATCH v3 4/6] siemens: board: clean up draco products vs common
On Mon, Dec 18, 2023 at 09:59:13AM +0100, Enrico Leto wrote: > The common folder was initialially created for the common parts of the > products based on draco-am355x board family. These are the product > lines 'pxm2', 'rut' and the base line named 'draco'! > > Adding the new capricorn-imx8 board family, common was enhanced without > cleanup. > > Move all am355x specifics to a new file 'board_am335x'. > > Reviewed-by: Alexander Sverdlin > Signed-off-by: Enrico Leto For this series, I see a few different failure to builds now: https://source.denx.de/u-boot/u-boot/-/jobs/759652 https://source.denx.de/u-boot/u-boot/-/jobs/759653 -- Tom signature.asc Description: PGP signature
Re: [PATCH v2 RESEND] pci: Enable dm_pci_map_bar() for 64-bit BARs
On Sun, Dec 17, 2023 at 12:52:09AM +, Moritz Fischer wrote: > Allow dm_pci_map_bar() usage on systems with CONFIG_SYS_PCI_64BIT. > > Reviewed-by: Philip Oberfichtner > Reviewed-by: Simon Glass > Signed-off-by: Moritz Fischer This causes a failure to build on qemu_arm and a number of other platforms, thanks. -- Tom signature.asc Description: PGP signature
[PATCH 20/26] arm: dts: k3-am654: remove duplicate mdio
With the Linux and U-Boot board dtb files unified, we now have a
duplicate mdio node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index e84cf0bf16b27..1b99517e51678 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -154,15 +154,6 @@
/delete-property/ assigned-clock-parents;
};
-&davinci_mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
- /* TODO: phy reset:
TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
- ti,rx-internal-delay = ;
- ti,fifo-depth = ;
- };
-};
-
&mcu_cpsw {
reg = <0x0 0x4600 0x0 0x20>,
<0x0 0x40f00200 0x0 0x2>;
--
2.43.0
[PATCH 17/26] arm: dts: k3-am654: remove duplicate wkup_i2c0
With the Linux and U-Boot board dtb files unified, we now have a
duplicate wkup_i2c0 node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 25 -
1 file changed, 25 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index c4096d1b754c4..19691d26e6fe4 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -112,13 +112,6 @@
>;
};
- wkup_i2c0_pins_default: wkup-i2c0-pins-default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7)
WKUP_I2C0_SCL */
- AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6)
WKUP_I2C0_SDA */
- >;
- };
-
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x, PIN_OUTPUT, 0) /* (V1)
MCU_OSPI0_CLK */
@@ -176,24 +169,6 @@
/delete-property/ power-domains;
};
-&wkup_i2c0 {
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_i2c0_pins_default>;
- clock-frequency = <40>;
-
- vdd_mpu: tps62363@60 {
- compatible = "ti,tps62363";
- reg = <0x60>;
- regulator-name = "VDD_MPU";
- regulator-min-microvolt = <50>;
- regulator-max-microvolt = <177>;
- regulator-always-on;
- regulator-boot-on;
- ti,vsel0-state-high;
- ti,vsel1-state-high;
- };
-};
-
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
--
2.43.0
[PATCH 01/26] configs: am65x_evm_r5: enable driver for fixed regulators
Some of the regulators we need to successfully boot are fixed regulators. Enable the driver to properly probe them. Signed-off-by: Bryan Brattlof --- configs/am65x_evm_r5_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index b2f1e721b36d0..b892f2eb8c5f9 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -118,6 +118,8 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_TPS62360=y -- 2.43.0
[PATCH 26/26] arm: dts: k3-am654: convert bootph-pre-ram to bootph-all
Many nodes are reused between WKUP SPL, MAIN SPL, and U-Boot. Using
bootph-pre-ram is causing these nodes to be present in SPL builds but
pruned away during the U-Boot build. Convert these nodes to bootph-all
so they will remain no matter which dtb build is happening.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 78 ++--
1 file changed, 39 insertions(+), 39 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index a9b2d0d2a3036..770c7d129339f 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -18,159 +18,159 @@
};
&vtt_supply {
- bootph-pre-ram;
+ bootph-all;
};
&cbass_main {
- bootph-pre-ram;
+ bootph-all;
};
&main_navss {
- bootph-pre-ram;
+ bootph-all;
};
&cbass_mcu {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_navss {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_ringacc {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_udmap {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_gpio0 {
- bootph-pre-ram;
+ bootph-all;
};
&secure_proxy_main {
- bootph-pre-ram;
+ bootph-all;
};
&cbass_wakeup {
- bootph-pre-ram;
+ bootph-all;
chipid@4314 {
- bootph-pre-ram;
+ bootph-all;
};
};
&dmsc {
- bootph-pre-ram;
+ bootph-all;
};
&k3_pds {
- bootph-pre-ram;
+ bootph-all;
};
&k3_clks {
- bootph-pre-ram;
+ bootph-all;
};
&k3_reset {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_uart0 {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_uart0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_uart0 {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_vtm0 {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_pmx0 {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_uart0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&ddr_vtt_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_uart0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_i2c0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&mcu_fss0_ospi0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&main_pmx0 {
- bootph-pre-ram;
+ bootph-all;
};
&main_uart0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&main_mmc0_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&main_mmc1_pins_default {
- bootph-pre-ram;
+ bootph-all;
};
&main_pmx1 {
- bootph-pre-ram;
+ bootph-all;
};
&sdhci0 {
- bootph-pre-ram;
+ bootph-all;
};
&sdhci1 {
- bootph-pre-ram;
+ bootph-all;
};
&wkup_i2c0 {
- bootph-pre-ram;
+ bootph-all;
};
&vdd_mpu {
- bootph-pre-ram;
+ bootph-all;
};
&ospi0 {
- bootph-pre-ram;
+ bootph-all;
flash@0 {
- bootph-pre-ram;
+ bootph-all;
};
};
&dwc3_0 {
- bootph-pre-ram;
+ bootph-all;
};
&scm_conf {
- bootph-pre-ram;
+ bootph-all;
};
&fss {
- bootph-pre-ram;
+ bootph-all;
};
&pru0_0 {
--
2.43.0
[PATCH 09/26] arm: dts: k3-am654: remove duplicate timer
timer1 is really just the mcu_timer0 node redefined for the WKUP SPL.
Remove the timer1 and replace it with the mcu_timer0 from the Linux
device tree we imported into U-Boot.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 12
arch/arm/dts/k3-am654-r5-base-board.dts | 29 ++--
2 files changed, 26 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 7ec65f8fa98aa..9cd8c353c515b 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -5,6 +5,18 @@
#include "k3-am65x-binman.dtsi"
+/ {
+ chosen {
+ tick-timer = &mcu_timer0;
+ };
+};
+
+&mcu_timer0 {
+ ti,timer-alwon;
+ clock-frequency = <2500>;
+ bootph-all;
+};
+
&vtt_supply {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 3e94cfccd4321..3b27ad842532c 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -26,11 +26,6 @@
usb1 = &usb1;
};
- chosen {
- stdout-path = "serial2:115200n8";
- tick-timer = &timer1;
- };
-
a53_0: a53@0 {
compatible = "ti,am654-rproc";
reg = <0x0 0x00a9 0x0 0x10>;
@@ -47,16 +42,6 @@
};
};
-&cbass_main {
- timer1: timer@4040 {
- compatible = "ti,omap5430-timer";
- reg = <0x0 0x4040 0x0 0x80>;
- ti,timer-alwon;
- clock-frequency = <2500>;
- bootph-all;
- };
-};
-
&cbass_mcu {
mcu_secproxy: secproxy@2838 {
compatible = "ti,am654-secure-proxy";
@@ -108,6 +93,20 @@
};
};
+/* timer init is called as part of rproc_start() while
+ * starting System Firmware, so any clock/power-domain
+ * operations will fail as SYSFW is not yet up and running.
+ * Delete all clock/power-domain properties to avoid
+ * timer init failure.
+ * This is an always on timer at 20MHz.
+ */
+&mcu_timer0 {
+ /delete-property/ clocks;
+ /delete-property/ assigned-clocks;
+ /delete-property/ assigned-clock-parents;
+ /delete-property/ power-domains;
+};
+
&dmsc {
mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
mbox-names = "tx", "rx", "notify";
--
2.43.0
[PATCH 02/26] configs: am65x_evm_a53: disable CONSOLE_MUX
We do not have a need to share a single console with the evaluation
board and disabling this option reduces the complexity of configuring
the consoles. Disable CONSOLE_MUX
Signed-off-by: Bryan Brattlof
---
configs/am65x_evm_a53_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig
index f4369865bf665..4d95e3bd29630 100644
--- a/configs/am65x_evm_a53_defconfig
+++ b/configs/am65x_evm_a53_defconfig
@@ -36,7 +36,6 @@ CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_SYSTEM_SETUP=y
CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run
boot_rprocs; if test ${boot_fit} -eq 1; then run get_fit_${boot}; run
get_overlaystring; run run_fit; else; run get_kern_${boot}; run
get_fdt_${boot}; run get_overlay_${boot}; run run_kern; fi;"
CONFIG_LOGLEVEL=7
-CONFIG_CONSOLE_MUX=y
CONFIG_SPL_MAX_SIZE=0x58000
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
CONFIG_SPL_BSS_START_ADDR=0x80a0
--
2.43.0
[PATCH 13/26] arm: dts: k3-am654: remove duplicate mcu_uart0 node
With the Linux and U-Boot board dtb files unified we now have a
duplicate mcu_uart0 node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 12
1 file changed, 12 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 47d152cbd4b6d..8c14472f9b463 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -18,7 +18,6 @@
ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
- serial1 = &mcu_uart0;
serial2 = &main_uart0;
spi0 = &ospi0;
spi1 = &ospi1;
@@ -96,8 +95,6 @@
};
&mcu_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mcu_uart0_pins_default>;
clock-frequency = <4800>;
/delete-property/ power-domains;
status = "okay";
@@ -123,15 +120,6 @@
>;
};
- mcu_uart0_pins_default: mcu_uart0_pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) /* (P4)
MCU_OSPI1_D1.MCU_UART0_RXD */
- AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) /* (P5)
MCU_OSPI1_D2.MCU_UART0_TXD */
- AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) /* (P1)
MCU_OSPI1_D3.MCU_UART0_CTSn */
- AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) /* (N3)
MCU_OSPI1_CSn1.MCU_UART0_RTSn */
- >;
- };
-
wkup_i2c0_pins_default: wkup-i2c0-pins-default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7)
WKUP_I2C0_SCL */
--
2.43.0
[PATCH 16/26] arm: dts: k3-am654: remove duplicate sdhci1 pinmux node
With the Linux and U-Boot board dtb files unified, we now have a
duplicate sdhci1 pinmux node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 22 +++---
1 file changed, 7 insertions(+), 15 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 856917bdfaa5d..c4096d1b754c4 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -137,19 +137,6 @@
};
&main_pmx0 {
- main_mmc1_pins_default: main_mmc1_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /*
(C27) MMC1_CLK */
- AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0)/*
(C28) MMC1_CMD */
- AM65X_IOPAD(0x02d0, PIN_INPUT_PULLUP, 0)/*
(D28) MMC1_DAT0 */
- AM65X_IOPAD(0x02cc, PIN_INPUT_PULLUP, 0)/*
(E27) MMC1_DAT1 */
- AM65X_IOPAD(0x02c8, PIN_INPUT_PULLUP, 0)/*
(D26) MMC1_DAT2 */
- AM65X_IOPAD(0x02c4, PIN_INPUT_PULLUP, 0)/*
(D27) MMC1_DAT3 */
- AM65X_IOPAD(0x02dc, PIN_INPUT_PULLUP, 0)/*
(B24) MMC1_SDCD */
- AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /*
(C24) MMC1_SDWP */
- >;
- };
-
usb0_pins_default: usb0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9)
USB0_DRVVBUS */
@@ -176,12 +163,17 @@
/delete-property/ power-domains;
};
+/* MMC is probed to pull in firmware, so any clock
+ * or power-domain operation will fail as we do not
+ * have the firmware running at this point. Delete the
+ * power-domain properties to avoid making calls to
+ * SYSFW before it is loaded. Public ROM has already
+ * set it up for us anyway.
+ */
&sdhci1 {
clock-names = "clk_xin";
clocks = <&clk_200mhz>;
- pinctrl-0 = <&main_mmc1_pins_default>;
/delete-property/ power-domains;
- ti,driver-strength-ohm = <50>;
};
&wkup_i2c0 {
--
2.43.0
[PATCH 15/26] arm: dts: k3-am654: remove duplicate sdhci0 pinmux node
With the Linux and U-Boot board dtb files unified, we now have
a duplicate sdhci0 pinmux node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 25 +++--
1 file changed, 7 insertions(+), 18 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 66953eb5581ae..856917bdfaa5d 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -137,22 +137,6 @@
};
&main_pmx0 {
- main_mmc0_pins_default: main_mmc0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /*
(B25) MMC0_CLK */
- AM65X_IOPAD(0x01aC, PIN_INPUT_PULLUP, 0)/*
(B27) MMC0_CMD */
- AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0)/*
(A26) MMC0_DAT0 */
- AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0)/*
(E25) MMC0_DAT1 */
- AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0)/*
(C26) MMC0_DAT2 */
- AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0)/*
(A25) MMC0_DAT3 */
- AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0)/*
(E24) MMC0_DAT4 */
- AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0)/*
(A24) MMC0_DAT5 */
- AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0)/*
(B26) MMC0_DAT6 */
- AM65X_IOPAD(0x0188, PIN_INPUT_PULLUP, 0)/*
(D25) MMC0_DAT7 */
- AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /*
(C25) MMC0_DS */
- >;
- };
-
main_mmc1_pins_default: main_mmc1_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /*
(C27) MMC1_CLK */
@@ -179,12 +163,17 @@
pinctrl-0 = <&wkup_vtt_pins_default>;
};
+/* MMC is probed to pull in firmware, so any clock
+ * or power-domain operation will fail as we do not
+ * have the firmware running at this point. Delete the
+ * power-domain properties to avoid making calls to
+ * SYSFW before it is loaded. Public ROM has already
+ * set it up for us anyway.
+ */
&sdhci0 {
clock-names = "clk_xin";
clocks = <&clk_200mhz>;
- pinctrl-0 = <&main_mmc0_pins_default>;
/delete-property/ power-domains;
- ti,driver-strength-ohm = <50>;
};
&sdhci1 {
--
2.43.0
[PATCH 21/26] arm: dts: k3-am654: remove duplicate vtt pinmux
With the Linux and U-Boot board dtb files unified, we now have a
duplicate vtt_pinmux node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 2 +-
arch/arm/dts/k3-am654-r5-base-board.dts | 10 --
2 files changed, 1 insertion(+), 11 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 104cb2e559f2f..a9b2d0d2a3036 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -101,7 +101,7 @@
bootph-pre-ram;
};
-&wkup_vtt_pins_default {
+&ddr_vtt_pins_default {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 1b99517e51678..b4aa904e9bb4d 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -101,18 +101,8 @@
vdd-supply-4 = <&vdd_mpu>;
};
-&wkup_pmx0 {
- wkup_vtt_pins_default: wkup_vtt_pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /*
WKUP_GPIO0_28 */
- >;
- };
-};
-
&memorycontroller {
vtt-supply = <&vtt_supply>;
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_vtt_pins_default>;
};
/* MMC is probed to pull in firmware, so any clock
--
2.43.0
[PATCH 03/26] arm: dts: k3-am654-r5: Merge board file and U-Boot overlay
The R5 board file for U-Boot should be the same as the board file copied
from Linux with a few alterations to work with the R5's view of the SoC.
First we need to unify the R5 board file and it's U-Boot overlay before
we can unify the Linux board file with this one.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 1 -
.../dts/k3-am654-r5-base-board-u-boot.dtsi| 208 --
arch/arm/dts/k3-am654-r5-base-board.dts | 124 ++-
3 files changed, 119 insertions(+), 214 deletions(-)
delete mode 100644 arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 11d83927ac525..f29cecf870bcd 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -3,7 +3,6 @@
* Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
*/
-#include "k3-am654-r5-base-board-u-boot.dtsi"
#include "k3-am65x-binman.dtsi"
&pru0_0 {
diff --git a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
deleted file mode 100644
index 286604576e028..0
--- a/arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi
+++ /dev/null
@@ -1,208 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/
- */
-
-#include
-#include
-#include "k3-am65x-binman.dtsi"
-
-/ {
- chosen {
- stdout-path = "serial2:115200n8";
- };
-
- aliases {
- serial2 = &main_uart0;
- ethernet0 = &cpsw_port1;
- usb0 = &usb0;
- usb1 = &usb1;
- spi0 = &ospi0;
- spi1 = &ospi1;
- };
-};
-
-&cbass_main{
- bootph-pre-ram;
- main_navss: bus@3080 {
- bootph-pre-ram;
- };
-};
-
-&cbass_mcu {
- bootph-pre-ram;
-
- mcu_navss: bus@2838 {
- bootph-pre-ram;
-
- ringacc@2b80 {
- reg = <0x0 0x2b80 0x0 0x40>,
- <0x0 0x2b00 0x0 0x40>,
- <0x0 0x2859 0x0 0x100>,
- <0x0 0x2a50 0x0 0x4>,
- <0x0 0x2844 0x0 0x4>;
- reg-names = "rt", "fifos", "proxy_gcfg",
"proxy_target", "cfg";
- bootph-pre-ram;
- ti,dma-ring-reset-quirk;
- };
-
- dma-controller@285c {
- reg = <0x0 0x285c 0x0 0x100>,
- <0x0 0x284c 0x0 0x4000>,
- <0x0 0x2a80 0x0 0x4>,
- <0x0 0x284a 0x0 0x4000>,
- <0x0 0x2aa0 0x0 0x4>,
- <0x0 0x2840 0x0 0x2000>;
- reg-names = "gcfg", "rchan", "rchanrt", "tchan",
- "tchanrt", "rflow";
- bootph-pre-ram;
- };
- };
-};
-
-&cbass_wakeup {
- bootph-pre-ram;
-
- chipid@4314 {
- bootph-pre-ram;
- };
-};
-
-&secure_proxy_main {
- bootph-pre-ram;
-};
-
-&dmsc {
- bootph-pre-ram;
- k3_sysreset: sysreset-controller {
- compatible = "ti,sci-sysreset";
- bootph-pre-ram;
- };
-};
-
-&k3_pds {
- bootph-pre-ram;
-};
-
-&k3_clks {
- bootph-pre-ram;
-};
-
-&k3_reset {
- bootph-pre-ram;
-};
-
-&wkup_pmx0 {
- bootph-pre-ram;
-
- wkup_i2c0_pins_default {
- bootph-pre-ram;
- };
-};
-
-&main_pmx0 {
- bootph-pre-ram;
- usb0_pins_default: usb0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9)
USB0_DRVVBUS */
- >;
- bootph-pre-ram;
- };
-};
-
-&main_uart0_pins_default {
- bootph-pre-ram;
-};
-
-&main_pmx1 {
- bootph-pre-ram;
-};
-
-&wkup_pmx0 {
- mcu-fss0-ospi0-pins-default {
- bootph-pre-ram;
- };
-};
-
-&main_uart0 {
- bootph-pre-ram;
-};
-
-&main_mmc0_pins_default {
- bootph-pre-ram;
-};
-
-&main_mmc1_pins_default {
- bootph-pre-ram;
-};
-
-&sdhci0 {
- bootph-pre-ram;
-};
-
-&sdhci1 {
- bootph-pre-ram;
-};
-
-&davinci_mdio {
- phy0: ethernet-phy@0 {
- reg = <0>;
- /* TODO: phy reset:
TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
- ti,rx-internal-delay = ;
- ti,fifo-depth = ;
- };
-};
-
-&mcu_cpsw {
- reg = <0x0 0x4600 0x0 0x20>,
- <0x0 0x40f00200 0x0 0x2>;
- reg-names = "cpsw_nuss", "mac_efuse";
- /delete-property/ ranges;
-
- cpsw-phy-sel@40f
[PATCH 25/26] arm: dts: k3-am65: remove duplicate mcu secure proxy node
With the Linux and U-Boot board dtb files unified, we now have a
duplicate mcu secure proxy node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 057853fa3c285..ed890f61e3ea9 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -39,22 +39,15 @@
};
};
-&cbass_mcu {
- mcu_secproxy: secproxy@2838 {
- compatible = "ti,am654-secure-proxy";
- reg = <0x0 0x2a38 0x0 0x8>,
- <0x0 0x2a40 0x0 0x8>,
- <0x0 0x2a48 0x0 0x8>;
- reg-names = "rt", "scfg", "target_data";
- #mbox-cells = <1>;
- bootph-pre-ram;
- };
+&secure_proxy_mcu {
+ status = "okay";
+ bootph-pre-ram;
};
&cbass_wakeup {
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
- mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
+ mboxes= <&secure_proxy_mcu 4>, <&secure_proxy_mcu 5>;
mbox-names = "tx", "rx";
bootph-pre-ram;
};
@@ -75,7 +68,9 @@
};
&dmsc {
- mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
+ mboxes = <&secure_proxy_mcu 8>,
+<&secure_proxy_mcu 6>,
+<&secure_proxy_mcu 5>;
mbox-names = "tx", "rx", "notify";
ti,host-id = <4>;
ti,secure-host;
--
2.43.0
[PATCH 14/26] arm: dts: k3-am654: remove duplicate main_uart0
With the Linux and U-Boot board dtb files unified, we now have a
duplicate main_uart0 node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 17 -
1 file changed, 17 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 8c14472f9b463..66953eb5581ae 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -18,7 +18,6 @@
ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
- serial2 = &main_uart0;
spi0 = &ospi0;
spi1 = &ospi1;
usb0 = &usb0;
@@ -100,13 +99,6 @@
status = "okay";
};
-&main_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&main_uart0_pins_default>;
- power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
- status = "okay";
-};
-
&wkup_vtm0 {
compatible = "ti,am654-vtm", "ti,am654-avs";
vdd-supply-3 = <&vdd_mpu>;
@@ -145,15 +137,6 @@
};
&main_pmx0 {
- main_uart0_pins_default: main-uart0-pins-default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11)
UART0_RXD */
- AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11)
UART0_TXD */
- AM65X_IOPAD(0x01ec, PIN_INPUT, 0) /* (AG11)
UART0_CTSn */
- AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11)
UART0_RTSn */
- >;
- };
-
main_mmc0_pins_default: main_mmc0_pins_default {
pinctrl-single,pins = <
AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /*
(B25) MMC0_CLK */
--
2.43.0
[PATCH 07/26] arm: dts: k3-am654: remove duplicate vtt_supply
With the Linux and U-Boot board dtb files unified we now have a
duplicate vtt_supply node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 9 -
1 file changed, 9 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index bc7291a1adb60..d55ddb83837f3 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -46,15 +46,6 @@
ti,sci-host-id = <10>;
bootph-pre-ram;
};
-
- vtt_supply: vtt_supply {
- compatible = "regulator-gpio";
- regulator-name = "vtt";
- regulator-min-microvolt = <0>;
- regulator-max-microvolt = <330>;
- gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
- states = <0 0x0 330 0x1>;
- };
};
&cbass_main {
--
2.43.0
[PATCH 06/26] arm: dts: k3-am654: include a53 board dtb for r5 build
To make things as organized as possible, start from the Libux board dtbs
and apply all properties needed for U-Boot in our *-u-boot.dtsi file for
the MAIN SPL and U-Boot builds.
We can then include these files for the WKUP SPL build making further
edits to the needed properties and nodes for the WKUP SPL bootloader's
view of the am65x.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 2 +-
arch/arm/dts/k3-am654-r5-base-board.dts | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 0ecd7a56ebdbb..7ec65f8fa98aa 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -97,7 +97,7 @@
bootph-pre-ram;
};
-&wkup_i2c_pins_default {
+&wkup_i2c0_pins_default {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 821c7dcb5e936..bc7291a1adb60 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -5,7 +5,8 @@
/dts-v1/;
-#include "k3-am654.dtsi"
+#include "k3-am654-base-board.dts"
+#include "k3-am654-base-board-u-boot.dtsi"
#include "k3-am654-base-board-ddr4-1600MTs.dtsi"
#include "k3-am654-ddr.dtsi"
--
2.43.0
[PATCH 24/26] arm: dts: k3-am654: move dummy_clock to root node
The dummy_clock node is used to help the drivers probe the IO needed to
setup consoles and boot media to load firmware into the SoC.
This dummy_clock isn't a device that exists nor does it exist in the
mcu domain. So move it from cbass_mcu to the root node to avoid any
confusion.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index b84fdb5d86482..057853fa3c285 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -30,6 +30,13 @@
ti,sci-host-id = <10>;
bootph-pre-ram;
};
+
+ clk_200mhz: dummy_clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <2>;
+ bootph-pre-ram;
+ };
};
&cbass_mcu {
@@ -51,13 +58,6 @@
mbox-names = "tx", "rx";
bootph-pre-ram;
};
-
- clk_200mhz: dummy_clock {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <2>;
- bootph-pre-ram;
- };
};
/* timer init is called as part of rproc_start() while
--
2.43.0
[PATCH 10/26] arm: dts: k3-am654: remove duplicate mcu_ringacc
With the Linux and U-Boot board dtb files unified, we now have a
duplicate mcu_ringacc node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 10 --
1 file changed, 10 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 3b27ad842532c..cb25db7a3afd0 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -54,16 +54,6 @@
};
mcu_navss: bus@2838 {
- ringacc@2b80 {
- reg = <0x0 0x2b80 0x0 0x40>,
- <0x0 0x2b00 0x0 0x40>,
- <0x0 0x2859 0x0 0x100>,
- <0x0 0x2a50 0x0 0x4>,
- <0x0 0x2844 0x0 0x4>;
- reg-names = "rt", "fifos", "proxy_gcfg",
"proxy_target", "cfg";
- ti,dma-ring-reset-quirk;
- };
-
dma-controller@285c {
reg = <0x0 0x285c 0x0 0x100>,
<0x0 0x284c 0x0 0x4000>,
--
2.43.0
[PATCH 22/26] arm: dts: k3-am654: remove duplicate root properties
With the Linux and U-Boot board dtb files unified, we have duplicate
properties in the root node. Remove them
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index b4aa904e9bb4d..4d543d430a4b0 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -11,9 +11,6 @@
#include "k3-am654-ddr.dtsi"
/ {
- compatible = "ti,am654-evm", "ti,am654";
- model = "Texas Instruments AM654 R5 Base Board";
-
aliases {
ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
--
2.43.0
[PATCH 19/26] arm: dts: k3-am654: remove usb0
The pinmux for usb0 is missing from the Linux board dtb file. Remove it
until we can introduce it in Linux
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 12
arch/arm/dts/k3-am654-r5-base-board.dts | 29
2 files changed, 41 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 645241da322a5..104cb2e559f2f 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -133,10 +133,6 @@
bootph-pre-ram;
};
-&usb0_pins_default {
- bootph-pre-ram;
-};
-
&main_pmx1 {
bootph-pre-ram;
};
@@ -169,14 +165,6 @@
bootph-pre-ram;
};
-&usb0_phy {
- bootph-pre-ram;
-};
-
-&usb0 {
- bootph-pre-ram;
-};
-
&scm_conf {
bootph-pre-ram;
};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index af2a8a15b5533..e84cf0bf16b27 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -18,8 +18,6 @@
ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
- usb0 = &usb0;
- usb1 = &usb1;
};
a53_0: a53@0 {
@@ -111,14 +109,6 @@
};
};
-&main_pmx0 {
- usb0_pins_default: usb0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9)
USB0_DRVVBUS */
- >;
- };
-};
-
&memorycontroller {
vtt-supply = <&vtt_supply>;
pinctrl-names = "default";
@@ -156,14 +146,6 @@
<0x0 0x5000 0x0 0x800>;
};
-&main_pmx0 {
- usb0_pins_default: usb0_pins_default {
- pinctrl-single,pins = <
- AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9)
USB0_DRVVBUS */
- >;
- };
-};
-
&dwc3_0 {
status = "okay";
/delete-property/ clocks;
@@ -172,17 +154,6 @@
/delete-property/ assigned-clock-parents;
};
-&usb0_phy {
- status = "okay";
- /delete-property/ clocks;
-};
-
-&usb0 {
- pinctrl-names = "default";
- pinctrl-0 = <&usb0_pins_default>;
- dr_mode = "peripheral";
-};
-
&davinci_mdio {
phy0: ethernet-phy@0 {
reg = <0>;
--
2.43.0
[PATCH 23/26] arm: dts: k3-am654: remove un-needed aliases
These aliases are not needed in U-Boot. Remove them
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 4d543d430a4b0..b84fdb5d86482 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -12,7 +12,6 @@
/ {
aliases {
- ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
};
--
2.43.0
[PATCH 04/26] arm: dts: k3-am654: pull in dtb update from Linux
Pull in dtb updates for the am654 base board from v6.7-rc1 of Linux
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am65-main.dtsi | 342 ++-
arch/arm/dts/k3-am65-mcu.dtsi| 156 ++--
arch/arm/dts/k3-am65-wakeup.dtsi | 10 +-
arch/arm/dts/k3-am65.dtsi| 19 +-
arch/arm/dts/k3-am654-base-board.dts | 301 ++-
arch/arm/dts/k3-am654.dtsi | 7 +
6 files changed, 626 insertions(+), 209 deletions(-)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index ba4e5d3e1ed7a..5ebb87f467de5 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -35,7 +35,10 @@
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x00 0x0180 0x00 0x1>, /* GICD */
- <0x00 0x0188 0x00 0x9>; /* GICR */
+ <0x00 0x0188 0x00 0x9>, /* GICR */
+ <0x00 0x6f00 0x00 0x2000>,/* GICC */
+ <0x00 0x6f01 0x00 0x1000>,/* GICH */
+ <0x00 0x6f02 0x00 0x2000>;/* GICV */
/*
* vcpumntirq:
* virtual CPU interface maintenance interrupt
@@ -88,6 +91,7 @@
clock-frequency = <4800>;
current-speed = <115200>;
power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_uart1: serial@281 {
@@ -96,6 +100,7 @@
interrupts = ;
clock-frequency = <4800>;
power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_uart2: serial@282 {
@@ -104,29 +109,47 @@
interrupts = ;
clock-frequency = <4800>;
power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
crypto: crypto@4e0 {
compatible = "ti,am654-sa2ul";
reg = <0x0 0x4e0 0x0 0x1200>;
- power-domains = <&k3_pds 136 TI_SCI_PD_EXCLUSIVE>;
+ power-domains = <&k3_pds 136 TI_SCI_PD_SHARED>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x04e0 0x00 0x04e0 0x0 0x3>;
- dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
- <&main_udmap 0x4001>;
+ dmas = <&main_udmap 0xc001>, <&main_udmap 0x4002>,
+ <&main_udmap 0x4003>;
dma-names = "tx", "rx1", "rx2";
- dma-coherent;
rng: rng@4e1 {
compatible = "inside-secure,safexcel-eip76";
reg = <0x0 0x4e1 0x0 0x7d>;
interrupts = ;
- clocks = <&k3_clks 136 1>;
+ status = "disabled"; /* Used by OP-TEE */
};
};
+ /* TIMERIO pad input CTRLMMR_TIMER*_CTRL registers */
+ main_timerio_input: pinctrl@104200 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x104200 0x0 0x30>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x001ff>;
+ };
+
+ /* TIMERIO pad output CTCTRLMMR_TIMERIO*_CTRL registers */
+ main_timerio_output: pinctrl@104280 {
+ compatible = "pinctrl-single";
+ reg = <0x0 0x104280 0x0 0x20>;
+ #pinctrl-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0x000f>;
+ };
+
main_pmx0: pinctrl@11c000 {
compatible = "pinctrl-single";
reg = <0x0 0x11c000 0x0 0x2e4>;
@@ -152,6 +175,7 @@
clock-names = "fck";
clocks = <&k3_clks 110 1>;
power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_i2c1: i2c@201 {
@@ -163,6 +187,7 @@
clock-names = "fck";
clocks = <&k3_clks 111 1>;
power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_i2c2: i2c@202 {
@@ -174,6 +199,7 @@
clock-names = "fck";
clocks = <&k3_clks 112 1>;
power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
main_i2c3: i2c@203 {
@@ -185,6 +211,7 @@
clock-names = "fck";
clocks = <&k3_clks 113 1>;
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
+ status = "disabled";
};
ecap0: pwm@310 {
@@ -194,6 +221,7 @@
[PATCH 12/26] arm: dts: k3-am654: add needed regs to udmap nodes
Ethernet is one of a few IPs in U-Boot that depend on DMA to operate.
However there are a few missing registers ranges in the udmap nodes
need to properly setup DMA for the am65x.
A fix has been added to the Linux kernel[0] to add these ranges however
they have not made it to a Linux tag. To keep DMA operational until the
next DT sync from Linux, add these ranges to the *-u-boot.dtsi with a
note for our future selves.
[0] https://lore.kernel.org/r/20231213135138.929517-2-vigne...@ti.com
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index 9cd8c353c515b..645241da322a5 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -260,3 +260,35 @@
&mcu_r5fss0 {
ti,cluster-mode = <0>;
};
+
+/* The DMA driver requires a few extra register ranges
+ * which are missing for the am65x. A patch has been
+ * sent and will be synced after the v6.8-rc1 linux
+ * tag is published
+ */
+&main_udmap {
+ reg = <0x0 0x3115 0x0 0x100>,
+ <0x0 0x3400 0x0 0x10>,
+ <0x0 0x3500 0x0 0x10>,
+ <0x0 0x30b0 0x0 0x1>,
+ <0x0 0x30c0 0x0 0x1>,
+ <0x0 0x30d0 0x0 0x8000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt",
+ "tchan", "rchan", "rflow";
+};
+
+/* The DMA driver requires a few extra register ranges
+ * which are missing for the am65x. A patch has been
+ * sent and will be synced after the v6.8-rc1 linux
+ * tag is published
+ */
+&mcu_udmap {
+ reg = <0x0 0x285c 0x0 0x100>,
+ <0x0 0x2a80 0x0 0x4>,
+ <0x0 0x2aa0 0x0 0x4>,
+ <0x0 0x284a 0x0 0x4000>,
+ <0x0 0x284c 0x0 0x4000>,
+ <0x0 0x2840 0x0 0x2000>;
+ reg-names = "gcfg", "rchanrt", "tchanrt",
+ "tchan", "rchan", "rflow";
+};
--
2.43.0
[PATCH 00/26] sync am65x device tree with Linux v6.7-rc1
Hello Everyone! This series gets the am65x booting again along with syncing the device tree files with v6.7-rc1 Linux. The bulk of these patches unify the WKUP SPL board file with the arm64 files to make future syncs from Linux much easier. In the end the DTBs should look a lot like what the DTBs look like for the am64x which is fairly similar to the am65x. For those interested in what UART boot looks like: https://paste.sr.ht/~bryanb/7df8a645dc548912cd806abd5ecab967ef3287bc Thanks for reviewing and happy holidays ~Bryan Bryan Brattlof (26): configs: am65x_evm_r5: enable driver for fixed regulators configs: am65x_evm_a53: disable CONSOLE_MUX arm: dts: k3-am654-r5: Merge board file and U-Boot overlay arm: dts: k3-am654: pull in dtb update from Linux arm: dts: k3-am654: copy bootph properties to a53 dts arm: dts: k3-am654: include a53 board dtb for r5 build arm: dts: k3-am654: remove duplicate vtt_supply arm: dts: k3-am654: remove duplicate wkup_uart0 arm: dts: k3-am654: remove duplicate timer arm: dts: k3-am654: remove duplicate mcu_ringacc arm: dts: k3-am654: remove duplicate mcu_udmap arm: dts: k3-am654: add needed regs to udmap nodes arm: dts: k3-am654: remove duplicate mcu_uart0 node arm: dts: k3-am654: remove duplicate main_uart0 arm: dts: k3-am654: remove duplicate sdhci0 pinmux node arm: dts: k3-am654: remove duplicate sdhci1 pinmux node arm: dts: k3-am654: remove duplicate wkup_i2c0 arm: dts: k3-am654: remove duplicate ospi0 node arm: dts: k3-am654: remove usb0 arm: dts: k3-am654: remove duplicate mdio arm: dts: k3-am654: remove duplicate vtt pinmux arm: dts: k3-am654: remove duplicate root properties arm: dts: k3-am654: remove un-needed aliases arm: dts: k3-am654: move dummy_clock to root node arm: dts: k3-am65: remove duplicate mcu secure proxy node arm: dts: k3-am654: convert bootph-pre-ram to bootph-all arch/arm/dts/k3-am65-main.dtsi| 342 +++--- arch/arm/dts/k3-am65-mcu.dtsi | 156 +++- arch/arm/dts/k3-am65-wakeup.dtsi | 10 +- arch/arm/dts/k3-am65.dtsi | 19 +- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 201 +- arch/arm/dts/k3-am654-base-board.dts | 301 +-- .../dts/k3-am654-r5-base-board-u-boot.dtsi| 208 --- arch/arm/dts/k3-am654-r5-base-board.dts | 298 +++ arch/arm/dts/k3-am654.dtsi| 7 + configs/am65x_evm_a53_defconfig | 1 - configs/am65x_evm_r5_defconfig| 2 + 11 files changed, 887 insertions(+), 658 deletions(-) delete mode 100644 arch/arm/dts/k3-am654-r5-base-board-u-boot.dtsi base-commit: 2c9ee3f22603083ef0c4b808cf92645e5417156a -- 2.43.0
[PATCH 18/26] arm: dts: k3-am654: remove duplicate ospi0 node
With the Linux and U-Boot board dtb files unified, we now have a
duplicate ospi0 node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 37 -
1 file changed, 37 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 19691d26e6fe4..af2a8a15b5533 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -18,8 +18,6 @@
ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
- spi0 = &ospi0;
- spi1 = &ospi1;
usb0 = &usb0;
usb1 = &usb1;
};
@@ -111,22 +109,6 @@
AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /*
WKUP_GPIO0_28 */
>;
};
-
- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x, PIN_OUTPUT, 0) /* (V1)
MCU_OSPI0_CLK */
- AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2)
MCU_OSPI0_DQS */
- AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4)
MCU_OSPI0_D0 */
- AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5)
MCU_OSPI0_D1 */
- AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2)
MCU_OSPI0_D2 */
- AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3)
MCU_OSPI0_D3 */
- AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4)
MCU_OSPI0_D4 */
- AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5)
MCU_OSPI0_D5 */
- AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2)
MCU_OSPI0_D6 */
- AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3)
MCU_OSPI0_D7 */
- AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4)
MCU_OSPI0_CSn0 */
- >;
- };
};
&main_pmx0 {
@@ -170,27 +152,8 @@
};
&ospi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
- bootph-pre-ram;
-
reg = <0x0 0x4704 0x0 0x100>,
<0x0 0x5000 0x0 0x800>;
-
- flash@0{
- compatible = "jedec,spi-nor";
- reg = <0x0>;
- spi-tx-bus-width = <1>;
- spi-rx-bus-width = <8>;
- spi-max-frequency = <5000>;
- cdns,tshsl-ns = <60>;
- cdns,tsd2d-ns = <60>;
- cdns,tchsh-ns = <60>;
- cdns,tslch-ns = <60>;
- cdns,read-delay = <0>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
};
&main_pmx0 {
--
2.43.0
[PATCH 11/26] arm: dts: k3-am654: remove duplicate mcu_udmap
With the Linux and U-Boot board dtb files unified, we now have a
duplicate mcu_udmap node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 13 -
1 file changed, 13 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index cb25db7a3afd0..47d152cbd4b6d 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -52,19 +52,6 @@
#mbox-cells = <1>;
bootph-pre-ram;
};
-
- mcu_navss: bus@2838 {
- dma-controller@285c {
- reg = <0x0 0x285c 0x0 0x100>,
- <0x0 0x284c 0x0 0x4000>,
- <0x0 0x2a80 0x0 0x4>,
- <0x0 0x284a 0x0 0x4000>,
- <0x0 0x2aa0 0x0 0x4>,
- <0x0 0x2840 0x0 0x2000>;
- reg-names = "gcfg", "rchan", "rchanrt", "tchan",
- "tchanrt", "rflow";
- };
- };
};
&cbass_wakeup {
--
2.43.0
[PATCH 05/26] arm: dts: k3-am654: copy bootph properties to a53 dts
In order to unify the R5 board dtb file with the Linux board dtb file,
we will need to copy all bootph-pre-ram properties to the *-u-boot.dtsi
overlay.
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 168 +++
arch/arm/dts/k3-am654-r5-base-board.dts | 83 -
2 files changed, 168 insertions(+), 83 deletions(-)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index f29cecf870bcd..0ecd7a56ebdbb 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -5,6 +5,174 @@
#include "k3-am65x-binman.dtsi"
+&vtt_supply {
+ bootph-pre-ram;
+};
+
+&cbass_main {
+ bootph-pre-ram;
+};
+
+&main_navss {
+ bootph-pre-ram;
+};
+
+&cbass_mcu {
+ bootph-pre-ram;
+};
+
+&mcu_navss {
+ bootph-pre-ram;
+};
+
+&mcu_ringacc {
+ bootph-pre-ram;
+};
+
+&mcu_udmap {
+ bootph-pre-ram;
+};
+
+&wkup_gpio0 {
+ bootph-pre-ram;
+};
+
+&secure_proxy_main {
+ bootph-pre-ram;
+};
+
+&cbass_wakeup {
+ bootph-pre-ram;
+
+ chipid@4314 {
+ bootph-pre-ram;
+ };
+};
+
+&dmsc {
+ bootph-pre-ram;
+};
+
+&k3_pds {
+ bootph-pre-ram;
+};
+
+&k3_clks {
+ bootph-pre-ram;
+};
+
+&k3_reset {
+ bootph-pre-ram;
+};
+
+&wkup_uart0 {
+ bootph-pre-ram;
+};
+
+&mcu_uart0 {
+ bootph-pre-ram;
+};
+
+&main_uart0 {
+ bootph-pre-ram;
+};
+
+&wkup_vtm0 {
+ bootph-pre-ram;
+};
+
+&wkup_pmx0 {
+ bootph-pre-ram;
+};
+
+&wkup_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&wkup_vtt_pins_default {
+ bootph-pre-ram;
+};
+
+&mcu_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&wkup_i2c_pins_default {
+ bootph-pre-ram;
+};
+
+&mcu_fss0_ospi0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_pmx0 {
+ bootph-pre-ram;
+};
+
+&main_uart0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_mmc0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_mmc1_pins_default {
+ bootph-pre-ram;
+};
+
+&usb0_pins_default {
+ bootph-pre-ram;
+};
+
+&main_pmx1 {
+ bootph-pre-ram;
+};
+
+&sdhci0 {
+ bootph-pre-ram;
+};
+
+&sdhci1 {
+ bootph-pre-ram;
+};
+
+&wkup_i2c0 {
+ bootph-pre-ram;
+};
+
+&vdd_mpu {
+ bootph-pre-ram;
+};
+
+&ospi0 {
+ bootph-pre-ram;
+
+ flash@0 {
+ bootph-pre-ram;
+ };
+};
+
+&dwc3_0 {
+ bootph-pre-ram;
+};
+
+&usb0_phy {
+ bootph-pre-ram;
+};
+
+&usb0 {
+ bootph-pre-ram;
+};
+
+&scm_conf {
+ bootph-pre-ram;
+};
+
+&fss {
+ bootph-pre-ram;
+};
+
&pru0_0 {
remoteproc-name = "pru0_0";
};
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index d75c7bf3fe662..821c7dcb5e936 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -53,13 +53,10 @@
regulator-max-microvolt = <330>;
gpios = <&wkup_gpio0 28 GPIO_ACTIVE_HIGH>;
states = <0 0x0 330 0x1>;
- bootph-pre-ram;
};
};
&cbass_main {
- bootph-pre-ram;
-
timer1: timer@4040 {
compatible = "ti,omap5430-timer";
reg = <0x0 0x4040 0x0 0x80>;
@@ -67,15 +64,9 @@
clock-frequency = <2500>;
bootph-all;
};
-
- main_navss: bus@3080 {
- bootph-pre-ram;
- };
};
&cbass_mcu {
- bootph-pre-ram;
-
mcu_secproxy: secproxy@2838 {
compatible = "ti,am654-secure-proxy";
reg = <0x0 0x2a38 0x0 0x8>,
@@ -87,8 +78,6 @@
};
mcu_navss: bus@2838 {
- bootph-pre-ram;
-
ringacc@2b80 {
reg = <0x0 0x2b80 0x0 0x40>,
<0x0 0x2b00 0x0 0x40>,
@@ -96,7 +85,6 @@
<0x0 0x2a50 0x0 0x4>,
<0x0 0x2844 0x0 0x4>;
reg-names = "rt", "fifos", "proxy_gcfg",
"proxy_target", "cfg";
- bootph-pre-ram;
ti,dma-ring-reset-quirk;
};
@@ -109,34 +97,11 @@
<0x0 0x2840 0x0 0x2000>;
reg-names = "gcfg", "rchan", "rchanrt", "tchan",
"tchanrt", "rflow";
- bootph-pre-ram;
};
};
};
-&k3_pds {
- bootph-pre-ram;
-};
-
-&k3_clks {
- bootph-pre-ram;
-};
-
-&k3_reset {
- bootph-pre-ram;
-};
-
-&wkup_gpio0 {
- bootph-pre-ram;
-};
-
-&secure_proxy_main {
- bootph-pre-ram;
-};
-
&cbass_wakeup {
- bootph-pre-ram;
-
sysctrler: sysctrler {
compatible = "ti,am654-system-controller";
[PATCH 08/26] arm: dts: k3-am654: remove duplicate wkup_uart0
With the Linux and U-Boot board files unified, we now have a duplicate
wkup_uart0 node. Remove it
Signed-off-by: Bryan Brattlof
---
arch/arm/dts/k3-am654-r5-base-board.dts | 12
1 file changed, 12 deletions(-)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index d55ddb83837f3..3e94cfccd4321 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -18,7 +18,6 @@
ethernet0 = &cpsw_port1;
remoteproc0 = &sysctrler;
remoteproc1 = &a53_0;
- serial0 = &wkup_uart0;
serial1 = &mcu_uart0;
serial2 = &main_uart0;
spi0 = &ospi0;
@@ -117,8 +116,6 @@
};
&wkup_uart0 {
- pinctrl-names = "default";
- pinctrl-0 = <&wkup_uart0_pins_default>;
status = "okay";
};
@@ -144,15 +141,6 @@
};
&wkup_pmx0 {
- wkup_uart0_pins_default: wkup_uart0_pins_default {
- pinctrl-single,pins = <
- AM65X_WKUP_IOPAD(0x00a0, PIN_INPUT, 0) /* (AB1)
WKUP_UART0_RXD */
- AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 0) /* (AB5)
WKUP_UART0_TXD */
- AM65X_WKUP_IOPAD(0x00c8, PIN_INPUT, 1) /* (AC2)
WKUP_GPIO0_6.WKUP_UART0_CTSn */
- AM65X_WKUP_IOPAD(0x00cc, PIN_OUTPUT, 1) /* (AC1)
WKUP_GPIO0_7.WKUP_UART0_RTSn */
- >;
- };
-
wkup_vtt_pins_default: wkup_vtt_pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0040, PIN_OUTPUT_PULLUP, 7) /*
WKUP_GPIO0_28 */
--
2.43.0
[PATCH V3 6/6] nvmem: layouts: add U-Boot env layout
From: Rafał Miłecki
Move all generic (NVMEM devices independent) code from NVMEM device
driver to NVMEM layout driver. Then add a simple NVMEM layout code on
top of it.
Thanks to proper layout it's possible to support U-Boot env data stored
on any kind of NVMEM device.
For backward compatibility with old DT bindings we need to keep old
NVMEM device driver functional. To avoid code duplication export and
reuse a parsing function.
Signed-off-by: Rafał Miłecki
Reviewed-by: Miquel Raynal
---
V2: Support new compatibles & use device_get_match_data() helper
V3: Use imperative in commit body
IMPORTANT:
This is based on top of the:
[PATCH v6.8 1/2] nvmem: layouts: refactor .add_cells() callback arguments
MAINTAINERS| 1 +
drivers/nvmem/Kconfig | 3 +-
drivers/nvmem/layouts/Kconfig | 11 ++
drivers/nvmem/layouts/Makefile | 1 +
drivers/nvmem/layouts/u-boot-env.c | 204 +
drivers/nvmem/layouts/u-boot-env.h | 15 +++
drivers/nvmem/u-boot-env.c | 158 +-
7 files changed, 235 insertions(+), 158 deletions(-)
create mode 100644 drivers/nvmem/layouts/u-boot-env.c
create mode 100644 drivers/nvmem/layouts/u-boot-env.h
diff --git a/MAINTAINERS b/MAINTAINERS
index b589218605b4..1f7e6d74cd51 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -22282,6 +22282,7 @@ U-BOOT ENVIRONMENT VARIABLES
M: Rafał Miłecki
S: Maintained
F: Documentation/devicetree/bindings/nvmem/u-boot,env.yaml
+F: drivers/nvmem/layouts/u-boot-env.c
F: drivers/nvmem/u-boot-env.c
UACCE ACCELERATOR FRAMEWORK
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 283134498fbc..d2c384f58028 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -363,8 +363,7 @@ config NVMEM_SUNXI_SID
config NVMEM_U_BOOT_ENV
tristate "U-Boot environment variables support"
depends on OF && MTD
- select CRC32
- select GENERIC_NET_UTILS
+ select NVMEM_LAYOUT_U_BOOT_ENV
help
U-Boot stores its setup as environment variables. This driver adds
support for verifying & exporting such data. It also exposes variables
diff --git a/drivers/nvmem/layouts/Kconfig b/drivers/nvmem/layouts/Kconfig
index 9c6e672fc350..5e586dfebe47 100644
--- a/drivers/nvmem/layouts/Kconfig
+++ b/drivers/nvmem/layouts/Kconfig
@@ -26,6 +26,17 @@ config NVMEM_LAYOUT_ONIE_TLV
If unsure, say N.
+config NVMEM_LAYOUT_U_BOOT_ENV
+ tristate "U-Boot environment variables layout"
+ select CRC32
+ select GENERIC_NET_UTILS
+ help
+ U-Boot stores its setup as environment variables. This driver adds
+ support for verifying & exporting such data. It also exposes variables
+ as NVMEM cells so they can be referenced by other drivers.
+
+ If unsure, say N.
+
endmenu
endif
diff --git a/drivers/nvmem/layouts/Makefile b/drivers/nvmem/layouts/Makefile
index 2974bd7d33ed..4940c9db0665 100644
--- a/drivers/nvmem/layouts/Makefile
+++ b/drivers/nvmem/layouts/Makefile
@@ -5,3 +5,4 @@
obj-$(CONFIG_NVMEM_LAYOUT_SL28_VPD) += sl28vpd.o
obj-$(CONFIG_NVMEM_LAYOUT_ONIE_TLV) += onie-tlv.o
+obj-$(CONFIG_NVMEM_LAYOUT_U_BOOT_ENV) += u-boot-env.o
diff --git a/drivers/nvmem/layouts/u-boot-env.c
b/drivers/nvmem/layouts/u-boot-env.c
new file mode 100644
index ..dcd2ffed503c
--- /dev/null
+++ b/drivers/nvmem/layouts/u-boot-env.c
@@ -0,0 +1,204 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (C) 2022 - 2023 Rafał Miłecki
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "u-boot-env.h"
+
+struct u_boot_env_image_single {
+ __le32 crc32;
+ uint8_t data[];
+} __packed;
+
+struct u_boot_env_image_redundant {
+ __le32 crc32;
+ u8 mark;
+ uint8_t data[];
+} __packed;
+
+struct u_boot_env_image_broadcom {
+ __le32 magic;
+ __le32 len;
+ __le32 crc32;
+ DECLARE_FLEX_ARRAY(uint8_t, data);
+} __packed;
+
+static int u_boot_env_read_post_process_ethaddr(void *context, const char *id,
int index,
+ unsigned int offset, void *buf,
size_t bytes)
+{
+ u8 mac[ETH_ALEN];
+
+ if (bytes != 3 * ETH_ALEN - 1)
+ return -EINVAL;
+
+ if (!mac_pton(buf, mac))
+ return -EINVAL;
+
+ if (index)
+ eth_addr_add(mac, index);
+
+ ether_addr_copy(buf, mac);
+
+ return 0;
+}
+
+static int u_boot_env_parse_cells(struct device *dev, struct nvmem_device
*nvmem, uint8_t *buf,
+ size_t data_offset, size_t data_len)
+{
+ char *data = buf + data_offset;
+ char *var, *value, *eq;
+
+ for (var = data;
+var < data + data_len && *var;
+var = value + strlen(value) + 1) {
+ struct nvmem_cell_info info = {};
+
+ eq = strchr(var, '=');
+
[PATCH V3 5/6] nvmem: u-boot-env: improve coding style
From: Rafał Miłecki
1. Prefer kzalloc() over kcalloc()
See memory-allocation.rst which says: "to be on the safe side it's
best to use routines that set memory to zero, like kzalloc()"
2. Drop dev_err() for u_boot_env_add_cells() fail
It can fail only on -ENOMEM. We don't want to print error then.
3. Add extra "crc32_addr" variable
It makes code reading header's crc32 easier to understand / review.
Signed-off-by: Rafał Miłecki
Reviewed-by: Miquel Raynal
---
V2: New patch with suggestions from Miquel
drivers/nvmem/u-boot-env.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c
index 111905189341..befbab156cda 100644
--- a/drivers/nvmem/u-boot-env.c
+++ b/drivers/nvmem/u-boot-env.c
@@ -132,6 +132,7 @@ static int u_boot_env_parse(struct u_boot_env *priv)
size_t crc32_data_offset;
size_t crc32_data_len;
size_t crc32_offset;
+ __le32 *crc32_addr;
size_t data_offset;
size_t data_len;
size_t dev_size;
@@ -143,7 +144,7 @@ static int u_boot_env_parse(struct u_boot_env *priv)
dev_size = nvmem_dev_size(nvmem);
- buf = kcalloc(1, dev_size, GFP_KERNEL);
+ buf = kzalloc(dev_size, GFP_KERNEL);
if (!buf) {
err = -ENOMEM;
goto err_out;
@@ -175,7 +176,8 @@ static int u_boot_env_parse(struct u_boot_env *priv)
data_offset = offsetof(struct u_boot_env_image_broadcom, data);
break;
}
- crc32 = le32_to_cpu(*(__le32 *)(buf + crc32_offset));
+ crc32_addr = (__le32 *)(buf + crc32_offset);
+ crc32 = le32_to_cpu(*crc32_addr);
crc32_data_len = dev_size - crc32_data_offset;
data_len = dev_size - data_offset;
@@ -188,8 +190,6 @@ static int u_boot_env_parse(struct u_boot_env *priv)
buf[dev_size - 1] = '\0';
err = u_boot_env_add_cells(priv, buf, data_offset, data_len);
- if (err)
- dev_err(dev, "Failed to add cells: %d\n", err);
err_kfree:
kfree(buf);
--
2.35.3
[PATCH V3 4/6] nvmem: u-boot-env: use nvmem device helpers
From: Rafał Miłecki
Use nvmem_dev_size() and nvmem_device_read() to make this driver less
mtd dependent.
Signed-off-by: Rafał Miłecki
Reviewed-by: Miquel Raynal
---
V2: Don't introduce memleak when handling nvmem_device_read() failures
V3: Split PATCH 3/3 into two
drivers/nvmem/u-boot-env.c | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c
index dd9d0ad22712..111905189341 100644
--- a/drivers/nvmem/u-boot-env.c
+++ b/drivers/nvmem/u-boot-env.c
@@ -127,27 +127,34 @@ static int u_boot_env_add_cells(struct u_boot_env *priv,
uint8_t *buf,
static int u_boot_env_parse(struct u_boot_env *priv)
{
+ struct nvmem_device *nvmem = priv->nvmem;
struct device *dev = priv->dev;
size_t crc32_data_offset;
size_t crc32_data_len;
size_t crc32_offset;
size_t data_offset;
size_t data_len;
+ size_t dev_size;
uint32_t crc32;
uint32_t calc;
- size_t bytes;
uint8_t *buf;
+ int bytes;
int err;
- buf = kcalloc(1, priv->mtd->size, GFP_KERNEL);
+ dev_size = nvmem_dev_size(nvmem);
+
+ buf = kcalloc(1, dev_size, GFP_KERNEL);
if (!buf) {
err = -ENOMEM;
goto err_out;
}
- err = mtd_read(priv->mtd, 0, priv->mtd->size, &bytes, buf);
- if ((err && !mtd_is_bitflip(err)) || bytes != priv->mtd->size) {
- dev_err(dev, "Failed to read from mtd: %d\n", err);
+ bytes = nvmem_device_read(nvmem, 0, dev_size, buf);
+ if (bytes < 0) {
+ err = bytes;
+ goto err_kfree;
+ } else if (bytes != dev_size) {
+ err = -EIO;
goto err_kfree;
}
@@ -169,8 +176,8 @@ static int u_boot_env_parse(struct u_boot_env *priv)
break;
}
crc32 = le32_to_cpu(*(__le32 *)(buf + crc32_offset));
- crc32_data_len = priv->mtd->size - crc32_data_offset;
- data_len = priv->mtd->size - data_offset;
+ crc32_data_len = dev_size - crc32_data_offset;
+ data_len = dev_size - data_offset;
calc = crc32(~0, buf + crc32_data_offset, crc32_data_len) ^ ~0L;
if (calc != crc32) {
@@ -179,7 +186,7 @@ static int u_boot_env_parse(struct u_boot_env *priv)
goto err_kfree;
}
- buf[priv->mtd->size - 1] = '\0';
+ buf[dev_size - 1] = '\0';
err = u_boot_env_add_cells(priv, buf, data_offset, data_len);
if (err)
dev_err(dev, "Failed to add cells: %d\n", err);
--
2.35.3
[PATCH V3 3/6] nvmem: u-boot-env: use nvmem_add_one_cell() nvmem subsystem helper
From: Rafał Miłecki
Simplify adding NVMEM cells.
Signed-off-by: Rafał Miłecki
Reviewed-by: Miquel Raynal
---
V3: Split PATCH 3/3 into two
drivers/nvmem/u-boot-env.c | 55 +++---
1 file changed, 21 insertions(+), 34 deletions(-)
diff --git a/drivers/nvmem/u-boot-env.c b/drivers/nvmem/u-boot-env.c
index c4ae94af4af7..dd9d0ad22712 100644
--- a/drivers/nvmem/u-boot-env.c
+++ b/drivers/nvmem/u-boot-env.c
@@ -23,13 +23,10 @@ enum u_boot_env_format {
struct u_boot_env {
struct device *dev;
+ struct nvmem_device *nvmem;
enum u_boot_env_format format;
struct mtd_info *mtd;
-
- /* Cells */
- struct nvmem_cell_info *cells;
- int ncells;
};
struct u_boot_env_image_single {
@@ -94,43 +91,36 @@ static int u_boot_env_read_post_process_ethaddr(void
*context, const char *id, i
static int u_boot_env_add_cells(struct u_boot_env *priv, uint8_t *buf,
size_t data_offset, size_t data_len)
{
+ struct nvmem_device *nvmem = priv->nvmem;
struct device *dev = priv->dev;
char *data = buf + data_offset;
char *var, *value, *eq;
- int idx;
-
- priv->ncells = 0;
- for (var = data; var < data + data_len && *var; var += strlen(var) + 1)
- priv->ncells++;
-
- priv->cells = devm_kcalloc(dev, priv->ncells, sizeof(*priv->cells),
GFP_KERNEL);
- if (!priv->cells)
- return -ENOMEM;
- for (var = data, idx = 0;
+ for (var = data;
var < data + data_len && *var;
-var = value + strlen(value) + 1, idx++) {
+var = value + strlen(value) + 1) {
+ struct nvmem_cell_info info = {};
+
eq = strchr(var, '=');
if (!eq)
break;
*eq = '\0';
value = eq + 1;
- priv->cells[idx].name = devm_kstrdup(dev, var, GFP_KERNEL);
- if (!priv->cells[idx].name)
+ info.name = devm_kstrdup(dev, var, GFP_KERNEL);
+ if (!info.name)
return -ENOMEM;
- priv->cells[idx].offset = data_offset + value - data;
- priv->cells[idx].bytes = strlen(value);
- priv->cells[idx].np = of_get_child_by_name(dev->of_node,
priv->cells[idx].name);
+ info.offset = data_offset + value - data;
+ info.bytes = strlen(value);
+ info.np = of_get_child_by_name(dev->of_node, info.name);
if (!strcmp(var, "ethaddr")) {
- priv->cells[idx].raw_len = strlen(value);
- priv->cells[idx].bytes = ETH_ALEN;
- priv->cells[idx].read_post_process =
u_boot_env_read_post_process_ethaddr;
+ info.raw_len = strlen(value);
+ info.bytes = ETH_ALEN;
+ info.read_post_process =
u_boot_env_read_post_process_ethaddr;
}
- }
- if (WARN_ON(idx != priv->ncells))
- priv->ncells = idx;
+ nvmem_add_one_cell(nvmem, &info);
+ }
return 0;
}
@@ -209,7 +199,6 @@ static int u_boot_env_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct u_boot_env *priv;
- int err;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
@@ -224,17 +213,15 @@ static int u_boot_env_probe(struct platform_device *pdev)
return PTR_ERR(priv->mtd);
}
- err = u_boot_env_parse(priv);
- if (err)
- return err;
-
config.dev = dev;
- config.cells = priv->cells;
- config.ncells = priv->ncells;
config.priv = priv;
config.size = priv->mtd->size;
- return PTR_ERR_OR_ZERO(devm_nvmem_register(dev, &config));
+ priv->nvmem = devm_nvmem_register(dev, &config);
+ if (IS_ERR(priv->nvmem))
+ return PTR_ERR(priv->nvmem);
+
+ return u_boot_env_parse(priv);
}
static const struct of_device_id u_boot_env_of_match_table[] = {
--
2.35.3
[PATCH V3 2/6] nvmem: core: add nvmem_dev_size() helper
From: Rafał Miłecki
This is required by layouts that need to read whole NVMEM content. It's
especially useful for NVMEM devices without hardcoded layout (like
U-Boot environment data block).
Signed-off-by: Rafał Miłecki
Reviewed-by: Miquel Raynal
---
drivers/nvmem/core.c | 13 +
include/linux/nvmem-consumer.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/nvmem/core.c b/drivers/nvmem/core.c
index 4ed54076346d..980123fb4dde 100644
--- a/drivers/nvmem/core.c
+++ b/drivers/nvmem/core.c
@@ -2163,6 +2163,19 @@ const char *nvmem_dev_name(struct nvmem_device *nvmem)
}
EXPORT_SYMBOL_GPL(nvmem_dev_name);
+/**
+ * nvmem_dev_size() - Get the size of a given nvmem device.
+ *
+ * @nvmem: nvmem device.
+ *
+ * Return: size of the nvmem device.
+ */
+size_t nvmem_dev_size(struct nvmem_device *nvmem)
+{
+ return nvmem->size;
+}
+EXPORT_SYMBOL_GPL(nvmem_dev_size);
+
static int __init nvmem_init(void)
{
int ret;
diff --git a/include/linux/nvmem-consumer.h b/include/linux/nvmem-consumer.h
index 2d306fa13b1a..34c0e58dfa26 100644
--- a/include/linux/nvmem-consumer.h
+++ b/include/linux/nvmem-consumer.h
@@ -81,6 +81,7 @@ int nvmem_device_cell_write(struct nvmem_device *nvmem,
struct nvmem_cell_info *info, void *buf);
const char *nvmem_dev_name(struct nvmem_device *nvmem);
+size_t nvmem_dev_size(struct nvmem_device *nvmem);
void nvmem_add_cell_lookups(struct nvmem_cell_lookup *entries,
size_t nentries);
--
2.35.3
[PATCH V3 1/6] dt-bindings: nvmem: layouts: add U-Boot environment variables layout
From: Rafał Miłecki
U-Boot env data is a way of storing firmware variables. It's a format
that can be used of top of various storage devices. Its binding should
be an NVMEM layout instead of a standalone device.
This patch adds layout binding which allows using it on top of MTD NVMEM
device as well as any other. At the same time it deprecates the old
combined binding.
Signed-off-by: Rafał Miłecki
---
V2: Add "-layout" suffix to compatibles to avoid conflict
.../nvmem/layouts/u-boot,env-layout.yaml | 55 +++
.../devicetree/bindings/nvmem/u-boot,env.yaml | 6 ++
2 files changed, 61 insertions(+)
create mode 100644
Documentation/devicetree/bindings/nvmem/layouts/u-boot,env-layout.yaml
diff --git
a/Documentation/devicetree/bindings/nvmem/layouts/u-boot,env-layout.yaml
b/Documentation/devicetree/bindings/nvmem/layouts/u-boot,env-layout.yaml
new file mode 100644
index ..3b4d8f2a44e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/layouts/u-boot,env-layout.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/layouts/u-boot,env-layout.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVMEM layout of U-Boot environment variables
+
+maintainers:
+ - Rafał Miłecki
+
+description:
+ U-Boot uses environment variables to store device parameters and
+ configuration. They may be used for booting process, setup or keeping end
user
+ info.
+
+ Data is stored using U-Boot specific formats (variant specific header and NUL
+ separated key-value pairs).
+
+properties:
+ compatible:
+oneOf:
+ - description: A standalone env data block
+const: u-boot,env-layout
+ - description: Two redundant blocks with active one flagged
+const: u-boot,env-redundant-bool-layout
+ - description: Two redundant blocks with active having higher counter
+const: u-boot,env-redundant-count-layout
+ - description: Broadcom's variant with custom header
+const: brcm,env-layout
+
+additionalProperties: false
+
+examples:
+ - |
+partitions {
+compatible = "fixed-partitions";
+#address-cells = <1>;
+#size-cells = <1>;
+
+partition@0 {
+reg = <0x0 0x4>;
+label = "u-boot";
+read-only;
+};
+
+partition@4 {
+reg = <0x4 0x1>;
+label = "u-boot-env";
+
+nvmem-layout {
+compatible = "u-boot,env-layout";
+};
+};
+};
diff --git a/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml
b/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml
index 9c36afc7084b..6c2a3ca5f051 100644
--- a/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml
+++ b/Documentation/devicetree/bindings/nvmem/u-boot,env.yaml
@@ -26,9 +26,15 @@ description: |
Variables can be defined as NVMEM device subnodes.
+ Introduction of NVMEM layouts exposed a limitation of this binding design.
+ Description of NVMEM data content should be separated from NVMEM devices.
+ Since the introduction of U-Boot env data layout this binding is deprecated.
+
maintainers:
- Rafał Miłecki
+deprecated: true
+
properties:
compatible:
oneOf:
--
2.35.3
Re: [v2 01/16] qe: Add to linux/immap_qe.h
On Thu, 14 Dec 2023 13:16:43 -0500, Tom Rini wrote: > Given how we define QE_MURAM_SIZE today, this header needs to have > added to it. > > Applied to u-boot/next, thanks! -- Tom
Re: [PATCH] global: Restrict use of '#include '
On Thu, 14 Dec 2023 07:16:54 -0500, Tom Rini wrote: > In general terms, we -include include/linux/kconfig.h and so normal > U-Boot code does not need to also #include it. However, for code which > is shared with userspace we may need to add it so that either our full > config is available or so that macros such as CONFIG_IS_ENABLED() can be > evaluated. In this case make sure that we guard these includes with a > test for USE_HOSTCC so that it clear as to why we're doing this. > > [...] Applied to u-boot/next, thanks! -- Tom
RE: [PATCH v7 2/2] schemas: Add some common reserved-memory usages
Hi Ard, Please see my reply below inline and let me know your thoughts. Thanks, Chasel > -Original Message- > From: Ard Biesheuvel > Sent: Thursday, December 21, 2023 6:31 AM > To: Chiu, Chasel > Cc: Simon Glass ; devicet...@vger.kernel.org; Mark Rutland > ; Rob Herring ; Tan, Lean Sheng > ; lkml ; Dhaval > Sharma ; Brune, Maximilian > ; Yunhui Cui ; > Dong, Guo ; Tom Rini ; ron minnich > ; Guo, Gua ; linux- > a...@vger.kernel.org; U-Boot Mailing List > Subject: Re: [PATCH v7 2/2] schemas: Add some common reserved-memory > usages > > On Tue, 28 Nov 2023 at 21:31, Chiu, Chasel wrote: > > > > > > > > > > > -Original Message- > > > From: Ard Biesheuvel > > > Sent: Tuesday, November 28, 2023 10:08 AM > > > To: Chiu, Chasel > > > Cc: Simon Glass ; devicet...@vger.kernel.org; Mark > > > Rutland ; Rob Herring ; Tan, > > > Lean Sheng ; lkml > > > ; Dhaval Sharma ; > > > Brune, Maximilian ; Yunhui Cui > > > ; Dong, Guo ; Tom Rini > > > ; ron minnich ; Guo, Gua > > > ; linux- a...@vger.kernel.org; U-Boot Mailing > > > List > > > Subject: Re: [PATCH v7 2/2] schemas: Add some common reserved-memory > > > usages > > > > > > You are referring to a 2000 line patch so it is not 100% clear where to > > > look tbh. > > > > > > > > > On Tue, 21 Nov 2023 at 19:37, Chiu, Chasel wrote: > > > > > > > > > > > > In PR, UefiPayloadPkg/Library/FdtParserLib/FdtParserLib.c, line > > > > 268 is for > > > related example code. > > > > > > > > > > That refers to a 'memory-allocation' node, right? How does that > > > relate to the 'reserved-memory' node? > > > > > > And crucially, how does this clarify in which way "runtime-code" and > > > "runtime- data" reservations are being used? > > > > > > Since the very beginning of this discussion, I have been asking > > > repeatedly for examples that describe the wider context in which these > reservations are used. > > > The "runtime" into runtime-code and runtime-data means that these > > > regions have a special significance to the operating system, not > > > just to the next bootloader stage. So I want to understand exactly > > > why it is necessary to describe these regions in a way where the > > > operating system might be expected to interpret this information and act > upon it. > > > > > > > > > I think runtime code and data today are mainly for supporting UEFI runtime > services - some BIOS functions for OS to utilize, OS may follow below ACPI > spec to > treat them as reserved range: > > https://uefi.org/specs/ACPI/6.5/15_System_Address_Map_Interfaces.html# > > uefi-memory-types-and-mapping-to-acpi-address-range-types > > > > Like I mentioned earlier, that PR is still in early phase and has not > > reflected all > the required changes yet, but the idea is to build > gEfiMemoryTypeInformationGuid HOB from FDT reserved-memory nodes. > > UEFI generic Payload has DxeMain integrated, however Memory Types are > platform-specific, for example, some platforms may need bigger runtime memory > for their implementation, that's why we want such FDT reserved-memory node to > tell DxeMain. > > > > > The Payload flow will be like this: > > Payload creates built-in default MemoryTypes table -> > > FDT reserved-memory node to override if required (this also ensures the > same memory map cross boots so ACPI S4 works) -> > > Build gEfiMemoryTypeInformationGuid HOB by "platfom specific" > MemoryTypes Table -> > > DxeMain/GCD to consume this MemoryTypes table and setup memory > service -> > > Install memory types table to UEFI system table.Configuration > > table... > > > > Note: if Payload built-in default MemoryTypes table works fine for the > > platform, then FDT reserved-memory node does not need to provide such > 'usage' compatible strings. (optional) This FDT node could allow > flexibility/compatibility without rebuilding Payload binary. > > > > Not sure if I answered all your questions, please highlight which area you > > need > more information. > > > > The gEfiMemoryTypeInformationGuid HOB typically carries platform defaults, and > the actual memory type information is kept in a non-volatile EFI variable, > which > gets updated when the memory usage changes. Is this different for > UefiPayloadPkg? > > (For those among the cc'ees less versed in EFI/EDK2: when you get the 'config > changed -rebooting' message from the boot firmware, it typically means that > this > memory type table has changed, and a reboot is necessary.) > > So the platform init needs to read this variable, or get the information in a > different way. I assume it is the payload, not the platform init that updates > the > variable when necessary. This means the information flows from payload(n) to > platform init(n+1), where n is a monotonic index tracking consecutive boots > of the > system. > > Can you explain how the DT fits into this? How are the runtime-code and > runtime-data memory reservation nodes under /reserved-memory used to > implement this inform
Re: [PATCH v2 03/32] mmc: msm_sdhci: use modern clock handling
On 19/12/2023 17:04, Caleb Connolly wrote:
Use the clk_* helper functions and the correct property name for clocks.
Signed-off-by: Caleb Connolly
---
drivers/mmc/msm_sdhci.c | 69 -
1 file changed, 46 insertions(+), 23 deletions(-)
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c
index 604f9c3ff99c..863e6007a905 100644
--- a/drivers/mmc/msm_sdhci.c
+++ b/drivers/mmc/msm_sdhci.c
@@ -44,6 +44,7 @@ struct msm_sdhc_plat {
struct msm_sdhc {
struct sdhci_host host;
void *base;
+ struct clk_bulk clks;
};
struct msm_sdhc_variant_info {
@@ -54,36 +55,56 @@ DECLARE_GLOBAL_DATA_PTR;
static int msm_sdc_clk_init(struct udevice *dev)
{
- int node = dev_of_offset(dev);
- uint clk_rate = fdtdec_get_uint(gd->fdt_blob, node, "clock-frequency",
- 40);
- uint clkd[2]; /* clk_id and clk_no */
- int clk_offset;
- struct udevice *clk_dev;
- struct clk clk;
- int ret;
+ struct msm_sdhc *prv = dev_get_priv(dev);
+ ofnode node = dev_ofnode(dev);
+ uint clk_rate;
+ int ret, i = 0, n_clks;
+ const char *clk_name;
- ret = fdtdec_get_int_array(gd->fdt_blob, node, "clock", clkd, 2);
+ ret = ofnode_read_u32(node, "clock-frequency", &clk_rate);
if (ret)
- return ret;
+ clk_rate = 40;
- clk_offset = fdt_node_offset_by_phandle(gd->fdt_blob, clkd[0]);
- if (clk_offset < 0)
- return clk_offset;
-
- ret = uclass_get_device_by_of_offset(UCLASS_CLK, clk_offset, &clk_dev);
- if (ret)
+ ret = clk_get_bulk(dev, &prv->clks);
+ if (ret) {
+ debug("Couldn't get mmc clocks: %d\n", ret);
return ret;
+ }
- clk.id = clkd[1];
- ret = clk_request(clk_dev, &clk);
- if (ret < 0)
+ ret = clk_enable_bulk(&prv->clks);
+ if (ret) {
+ debug("Couldn't enable mmc clocks: %d\n", ret);
return ret;
+ }
- ret = clk_set_rate(&clk, clk_rate);
- clk_free(&clk);
- if (ret < 0)
- return ret;
+ /* If clock-names is unspecified, then the first clock is the core
clock */
+ if (!ofnode_get_property(node, "clock-names", &n_clks)) {
+ if (!clk_set_rate(&prv->clks.clks[0], clk_rate)) {
+ printf("Couldn't set core clock rate: %d\n", ret);
+ return -EINVAL;
+ }
+ }
+
+ /* Find the index of the "core" clock */
+ while (i < n_clks) {
+ ofnode_read_string_index(node, "clock-names", i, &clk_name);
+ if (!strcmp(clk_name, "core"))
+ break;
+ i++;
+ }
+
+ if (i >= prv->clks.count) {
+ printf("Couldn't find core clock (index %d but only have %d
clocks)\n", i,
+ prv->clks.count);
+ return -EINVAL;
+ }
+
+ /* The clock is already enabled by the clk_bulk above */
+ ret = clk_set_rate(&prv->clks.clks[i], clk_rate);
+ if (!ret) {
+ printf("Couldn't set core clock rate: %d\n", ret);
+ return -EINVAL;
+ }
return 0;
}
@@ -188,6 +209,8 @@ static int msm_sdc_remove(struct udevice *dev)
if (!var_info->mci_removed)
writel(0, priv->base + SDCC_MCI_HC_MODE);
+ clk_release_bulk(&priv->clks);
+
return 0;
}
Looks better like this!
Reviewed-by: Neil Armstrong
Re: [PATCH v2 06/32] serial: msm: add debug UART
On 19/12/2023 17:04, Caleb Connolly wrote:
Introduce support for early debugging.
Signed-off-by: Caleb Connolly
---
drivers/serial/Kconfig | 8
drivers/serial/serial_msm.c | 32
2 files changed, 40 insertions(+)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 81fdac047824..20713812c839 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -304,6 +304,14 @@ config DEBUG_UART_S5P
will need to provide parameters to make this work. The driver will
be available until the real driver-model serial is running.
+config DEBUG_UART_MSM
+ bool "Qualcomm QUP UART debug"
+ depends on ARCH_SNAPDRAGON
+ help
+ Select this to enable a debug UART using the serial_msm driver. You
+ will need to provide parameters to make this work. The driver will
+ be available until the real driver-model serial is running.
I'm confused, perhaps the config should be named DEBUG_UART_MSM_QUP ?
+
config DEBUG_UART_MSM_GENI
bool "Qualcomm snapdragon"
depends on ARCH_SNAPDRAGON
diff --git a/drivers/serial/serial_msm.c b/drivers/serial/serial_msm.c
index a22623c316ed..19a5a3a788f7 100644
--- a/drivers/serial/serial_msm.c
+++ b/drivers/serial/serial_msm.c
@@ -253,3 +253,35 @@ U_BOOT_DRIVER(serial_msm) = {
.probe = msm_serial_probe,
.ops= &msm_serial_ops,
};
+
+#ifdef CONFIG_DEBUG_UART_MSM
+
+static struct msm_serial_data init_serial_data = {
+ .base = CONFIG_VAL(DEBUG_UART_BASE),
+ .clk_bit_rate = UART_DM_CLK_RX_TX_BIT_RATE,
+};
+
+#include
+
+static inline void _debug_uart_init(void)
+{
+ uart_dm_init(&init_serial_data);
+}
+
+static inline void _debug_uart_putc(int ch)
+{
+ struct msm_serial_data *priv = &init_serial_data;
+
+ while (!(readl(priv->base + UARTDM_SR) & UARTDM_SR_TX_EMPTY) &&
+ !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY))
+ ;
+
+ writel(UARTDM_CR_CMD_RESET_TX_READY, priv->base + UARTDM_CR);
+
+ writel(1, priv->base + UARTDM_NCF_TX);
+ writel(ch, priv->base + UARTDM_TF);
+}
+
+DEBUG_UART_FUNCS
+
+#endif
Re: [PATCH v2 32/32] MAINTAINERS: Qualcomm: add some missing paths
On 19/12/2023 17:04, Caleb Connolly wrote: Add drivers and DTS files, as well as regex matches for qcom/qualcomm/snapdragon. Signed-off-by: Caleb Connolly --- MAINTAINERS | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 8cd102eaa070..b41801078c94 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -571,18 +571,22 @@ M:Caleb Connolly M:Neil Armstrong R:Sumit Garg S:Maintained -F: arch/arm/mach-snapdragon/ -F: drivers/button/button-qcom-pmic.c -F: drivers/clk/qcom/ +F: arch/arm/dts/msm8*.dtsi +F: arch/arm/dts/pm8???.dtsi +F: arch/arm/dts/pms405.dtsi +F: arch/arm/dts/sdm845.dtsi +F: drivers/*/*/pm8???-* F:drivers/gpio/msm_gpio.c F:drivers/mmc/msm_sdhci.c F:drivers/phy/msm8916-usbh-phy.c -F: drivers/pinctrl/qcom/ F:drivers/serial/serial_msm.c F:drivers/serial/serial_msm_geni.c F:drivers/smem/msm_smem.c F:drivers/spmi/spmi-msm.c F:drivers/usb/host/ehci-msm.c +N: qcom +N: snapdragon +N: qualcomm ARM STI M:Patrice Chotard Reviewed-by: Neil Armstrong
Re: [PATCH v2 31/32] board: qcs404-evb: drop board code
On 19/12/2023 17:04, Caleb Connolly wrote:
This board is entirely supported by the generic arch code and DTS. The
board code used to handle turning on the vbus regulator, however this is
now handled via DT.
With this, the board specific defconfig is also no longer needed, so
drop it as well.
Signed-off-by: Caleb Connolly
---
board/qualcomm/qcs404-evb/Makefile | 6
board/qualcomm/qcs404-evb/qcs404-evb.c | 49 -
configs/qcs404evb_defconfig| 56 --
3 files changed, 111 deletions(-)
diff --git a/board/qualcomm/qcs404-evb/Makefile
b/board/qualcomm/qcs404-evb/Makefile
deleted file mode 100644
index 4665827e0859..
--- a/board/qualcomm/qcs404-evb/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2022 Sumit Garg
-#
-
-obj-y += qcs404-evb.o
diff --git a/board/qualcomm/qcs404-evb/qcs404-evb.c
b/board/qualcomm/qcs404-evb/qcs404-evb.c
deleted file mode 100644
index 1a4b1f97a3ae..
--- a/board/qualcomm/qcs404-evb/qcs404-evb.c
+++ /dev/null
@@ -1,49 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Board init file for QCS404-EVB
- *
- * (C) Copyright 2022 Sumit Garg
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void qcom_board_init(void)
-{
- struct udevice *pmic_gpio;
- struct gpio_desc usb_vbus_boost_pin;
- int ret, node;
-
- ret = uclass_get_device_by_name(UCLASS_GPIO,
- "pms405_gpios@c000",
- &pmic_gpio);
- if (ret < 0) {
- printf("Failed to find pms405_gpios@c000 node.\n");
- return;
- }
-
- node = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(pmic_gpio),
- "usb_vbus_boost_pin");
- if (node < 0) {
- printf("Failed to find usb_hub_reset_pm dt node.\n");
- return;
- }
- ret = gpio_request_by_name_nodev(offset_to_ofnode(node), "gpios", 0,
-&usb_vbus_boost_pin, 0);
- if (ret < 0) {
- printf("Failed to request usb_hub_reset_pm gpio.\n");
- return;
- }
-
- dm_gpio_set_dir_flags(&usb_vbus_boost_pin,
- GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
-}
diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig
deleted file mode 100644
index 7daaa449ffbd..
--- a/configs/qcs404evb_defconfig
+++ /dev/null
@@ -1,56 +0,0 @@
-CONFIG_ARM=y
-CONFIG_SYS_BOARD="qcs404-evb"
-CONFIG_SKIP_LOWLEVEL_INIT=y
-CONFIG_COUNTER_FREQUENCY=1900
-CONFIG_POSITION_INDEPENDENT=y
-CONFIG_ARCH_SNAPDRAGON=y
-CONFIG_DEFAULT_DEVICE_TREE="qcs404-evb"
-CONFIG_IDENT_STRING="\nQualcomm QCS404-EVB"
-CONFIG_SYS_LOAD_ADDR=0x8000
-CONFIG_FIT=y
-CONFIG_FIT_VERBOSE=y
-CONFIG_BOOTDELAY=5
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="earlycon ignore_loglevel root= clk_ignore_unused"
-CONFIG_SAVE_PREV_BL_FDT_ADDR=y
-CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y
-# CONFIG_DISPLAY_CPUINFO is not set
-CONFIG_HUSH_PARSER=y
-CONFIG_SYS_MAXARGS=64
-CONFIG_SYS_CBSIZE=512
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_GPT=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_PART=y
-CONFIG_CMD_USB=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
-# CONFIG_NET is not set
-CONFIG_CLK=y
-CONFIG_CLK_QCOM_QCS404=y
-CONFIG_MSM_GPIO=y
-CONFIG_QCOM_PMIC_GPIO=y
-CONFIG_MISC=y
-CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_ADMA=y
-CONFIG_MMC_SDHCI_MSM=y
-CONFIG_PHY=y
-CONFIG_PHY_QCOM_USB_HS_28NM=y
-CONFIG_PHY_QCOM_USB_SS=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_QCOM_QCS404=y
-CONFIG_DM_PMIC=y
-CONFIG_PMIC_QCOM=y
-CONFIG_MSM_SERIAL=y
-CONFIG_SPMI_MSM=y
-CONFIG_USB=y
-CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
-CONFIG_USB_DWC3=y
-CONFIG_USB_DWC3_GENERIC=y
-CONFIG_USB_STORAGE=y
-CONFIG_LMB_MAX_REGIONS=64
Yeah ! code removal !
Reviewed-by: Neil Armstrong
Re: [PATCH v2 30/32] dts: qcs404-evb: replace with upstream DT
On 19/12/2023 17:04, Caleb Connolly wrote: Drop the U-Boot specific DTS in favour of upstream. We'll only include the -4000 variant as that is what U-Boot already supported. Signed-off-by: Caleb Connolly --- arch/arm/dts/Makefile|2 +- arch/arm/dts/pms405.dtsi | 149 +++ arch/arm/dts/qcs404-evb-4000-u-boot.dtsi | 26 + arch/arm/dts/qcs404-evb-4000.dts | 96 ++ arch/arm/dts/qcs404-evb-uboot.dtsi | 30 - arch/arm/dts/qcs404-evb.dts | 390 --- arch/arm/dts/qcs404-evb.dtsi | 389 +++ arch/arm/dts/qcs404.dtsi | 1829 ++ 8 files changed, 2490 insertions(+), 421 deletions(-) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 29/32] dt-bindings: import headers for qcs404
On 19/12/2023 17:04, Caleb Connolly wrote: Import the headers needed for QCS404-evb. Signed-off-by: Caleb Connolly --- include/dt-bindings/clock/qcom,turingcc-qcs404.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/include/dt-bindings/clock/qcom,turingcc-qcs404.h b/include/dt-bindings/clock/qcom,turingcc-qcs404.h new file mode 100644 index ..838faef57c67 --- /dev/null +++ b/include/dt-bindings/clock/qcom,turingcc-qcs404.h @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019, Linaro Ltd + */ + +#ifndef _DT_BINDINGS_CLK_TURING_QCS404_H +#define _DT_BINDINGS_CLK_TURING_QCS404_H + +#define TURING_Q6SS_Q6_AXIM_CLK0 +#define TURING_Q6SS_AHBM_AON_CLK 1 +#define TURING_WRAPPER_AON_CLK 2 +#define TURING_Q6SS_AHBS_AON_CLK 3 +#define TURING_WRAPPER_QOS_AHBS_AON_CLK4 + +#endif Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 28/32] dts: msm8996: replace with upstream DTS
On 19/12/2023 17:04, Caleb Connolly wrote: Drop the U-Boot specific dragonboard820c.dts file in favour of the upstream apq8096-db820c.dts and an additional -u-boot.dtsi with the U-Boot specific additions. Signed-off-by: Caleb Connolly --- arch/arm/dts/Makefile |2 +- arch/arm/dts/apq8096-db820c-u-boot.dtsi | 10 + arch/arm/dts/apq8096-db820c.dts | 1137 + arch/arm/dts/dragonboard820c-uboot.dtsi | 32 - arch/arm/dts/dragonboard820c.dts| 153 -- arch/arm/dts/msm8996.dtsi | 3884 +++ configs/dragonboard820c_defconfig |2 +- 7 files changed, 5033 insertions(+), 187 deletions(-) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: fw_env: auto-detect NAND characteristics
Hi Anthony, On Thu, Dec 21, 2023 at 1:18 PM Anthony Loiseau wrote: > > Hello, > > Please find attached a patch proposal which modifies fw_env so NAND chip Your patch did not come. Could you please send it via git send-email? Also, run ./scripts/get_maintainer.pl 0001-your.patch and Cc the maintainers when submitting it. Thanks
Re: [PATCH v2 27/32] dts: dragonboard820c: use correct bindings for clocks
On 19/12/2023 17:04, Caleb Connolly wrote:
Don't use hardcoded clock IDs, use the IDs from the dt-bindings to be
compatible with upstream.
Signed-off-by: Caleb Connolly
---
arch/arm/dts/dragonboard820c.dts | 5 +++--
drivers/clk/qcom/clock-apq8096.c | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/dragonboard820c.dts b/arch/arm/dts/dragonboard820c.dts
index 86b7f83d36d6..282c37e28f42 100644
--- a/arch/arm/dts/dragonboard820c.dts
+++ b/arch/arm/dts/dragonboard820c.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "skeleton64.dtsi"
+#include
/ {
model = "Qualcomm Technologies, Inc. DB820c";
@@ -78,7 +79,7 @@
blsp2_uart2: serial@75b {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x75b 0x1000>;
- clocks = <&gcc 4>;
+ clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>;
clock-names = "core";
pinctrl-names = "uart";
pinctrl-0 = <&blsp8_uart>;
@@ -89,7 +90,7 @@
reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
index = <0x0>;
bus-width = <4>;
- clock = <&gcc 0>;
+ clock = <&gcc GCC_SDCC1_APPS_CLK>;
clock-frequency = <2>;
};
diff --git a/drivers/clk/qcom/clock-apq8096.c b/drivers/clk/qcom/clock-apq8096.c
index 1e6fdb5cd42d..a4731613c5e0 100644
--- a/drivers/clk/qcom/clock-apq8096.c
+++ b/drivers/clk/qcom/clock-apq8096.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
#include "clock-qcom.h"
@@ -107,10 +108,10 @@ static ulong apq8096_clk_set_rate(struct clk *clk, ulong rate)
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
switch (clk->id) {
- case 0: /* SDC1 */
+ case GCC_SDCC1_APPS_CLK: /* SDC1 */
return clk_init_sdc(priv, rate);
break;
- case 4: /*UART2*/
+ case GCC_BLSP2_UART2_APPS_CLK: /*UART2*/
return clk_init_uart(priv);
default:
return 0;
Reviewed-by: Neil Armstrong
Re: [PATCH v2 26/32] dts: msm8996: import PMIC dtsi files
On 19/12/2023 17:04, Caleb Connolly wrote: Import PM8994 and PMI8994 DTSI files in preparation for switching MSM8996 boards to upstream DTS. Signed-off-by: Caleb Connolly --- arch/arm/dts/pm8994.dtsi | 152 ++ arch/arm/dts/pmi8994.dtsi | 65 2 files changed, 217 insertions(+) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 25/32] dt-bindings: import headers for MSM8996
On 19/12/2023 17:04, Caleb Connolly wrote: Import dt-binding headers for MSM8996/APQ8096 from Linux. Signed-off-by: Caleb Connolly --- include/dt-bindings/clock/qcom,gcc-msm8996.h | 360 + include/dt-bindings/clock/qcom,mmcc-msm8996.h | 295 + .../dt-bindings/interconnect/qcom,msm8996-cbf.h| 12 + include/dt-bindings/interconnect/qcom,msm8996.h| 163 ++ include/dt-bindings/sound/qcom,wcd9335.h | 15 + 5 files changed, 845 insertions(+) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 24/32] dts: msm8916: replace with upstream DTS
On 19/12/2023 17:04, Caleb Connolly wrote: Drop the U-Boot specific dragonboard410c.dts in favour of the upstream msm8916-sbc.dts. No additional changes are needed to this DTS for U-Boot support. Signed-off-by: Caleb Connolly --- arch/arm/dts/Makefile |2 +- arch/arm/dts/apq8016-sbc.dts| 729 + arch/arm/dts/dragonboard410c-uboot.dtsi | 44 - arch/arm/dts/dragonboard410c.dts| 209 +-- arch/arm/dts/msm8916.dtsi | 2702 +++ configs/dragonboard410c_defconfig |2 +- 6 files changed, 3472 insertions(+), 216 deletions(-) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 23/32] dts: msm8916: import PMIC dtsi files
On 19/12/2023 17:04, Caleb Connolly wrote: Import the supporting pm8916.dtsi and msm8916-pm8916.dtsi files from upstream in preparation for switching boards over. Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 22/32] dt-bindings: import headers for MSM8916
On 19/12/2023 17:04, Caleb Connolly wrote: Import the dt-bindings headers in preparation for switching to upstream DTS for MSM8916. Signed-off-by: Caleb Connolly --- include/dt-bindings/arm/coresight-cti-dt.h | 37 + include/dt-bindings/clock/qcom,rpmcc.h | 174 include/dt-bindings/interconnect/qcom,msm8916.h | 100 ++ include/dt-bindings/pinctrl/qcom,pmic-mpp.h | 106 +++ include/dt-bindings/reset/qcom,gcc-msm8916.h| 100 ++ include/dt-bindings/sound/apq8016-lpass.h | 9 ++ include/dt-bindings/sound/qcom,lpass.h | 46 +++ 7 files changed, 572 insertions(+) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 21/32] dts: sdm845: replace with upstream DTS
On 19/12/2023 17:04, Caleb Connolly wrote: Import sdm845.dtsi from upstream, as well as the upstream DTS files for the db845c and Samsung starqltechn. Delete the old board files. Signed-off-by: Caleb Connolly --- arch/arm/dts/Makefile |4 +- arch/arm/dts/dragonboard845c-uboot.dtsi| 26 - arch/arm/dts/dragonboard845c.dts | 48 - arch/arm/dts/sdm845-db845c.dts | 1190 .../arm/dts/sdm845-samsung-starqltechn-u-boot.dtsi | 16 + arch/arm/dts/sdm845-samsung-starqltechn.dts| 624 +++ arch/arm/dts/sdm845.dtsi | 5801 +++- arch/arm/dts/starqltechn-uboot.dtsi| 27 - arch/arm/dts/starqltechn.dts | 68 - configs/qcom_defconfig |2 +- 10 files changed, 7550 insertions(+), 256 deletions(-) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 20/32] dts: sdm845: import supporting dtsi files
On 19/12/2023 17:04, Caleb Connolly wrote: Import the PM8998 and PMI8998 PMIC DTSI files from Linux 6.7-rc3 as well as the common audio codec in preperation for replacing board DTS files with upstream. Signed-off-by: Caleb Connolly --- arch/arm/dts/pm8998.dtsi | 130 +++ arch/arm/dts/pmi8998.dtsi| 98 + arch/arm/dts/sdm845-wcd9340.dtsi | 86 ++ 3 files changed, 314 insertions(+) Same as patch 19, with the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 19/32] dt-bindings: import headers for SDM845
On 19/12/2023 17:04, Caleb Connolly wrote: Import the DT bindings headers that are used by SDM845 from Linux 6.7-rc3 I think adding the commit you took the bindings from would be also good Signed-off-by: Caleb Connolly --- include/dt-bindings/clock/qcom,camcc-sdm845.h | 116 ++ include/dt-bindings/clock/qcom,dispcc-sdm845.h | 56 +++ include/dt-bindings/clock/qcom,gpucc-sdm845.h | 24 ++ include/dt-bindings/clock/qcom,lpass-sdm845.h | 15 + include/dt-bindings/clock/qcom,rpmh.h | 37 ++ include/dt-bindings/clock/qcom,videocc-sdm845.h| 35 ++ include/dt-bindings/dma/qcom-gpi.h | 11 + include/dt-bindings/firmware/qcom,scm.h| 18 + include/dt-bindings/iio/qcom,spmi-vadc.h | 300 +++ include/dt-bindings/interconnect/qcom,osm-l3.h | 15 + include/dt-bindings/interconnect/qcom,sdm845.h | 150 include/dt-bindings/phy/phy-qcom-qmp.h | 20 + include/dt-bindings/phy/phy-qcom-qusb2.h | 37 ++ include/dt-bindings/pinctrl/qcom,pmic-gpio.h | 164 include/dt-bindings/power/qcom-rpmpd.h | 412 + include/dt-bindings/qcom,q6asm.h | 26 ++ .../dt-bindings/regulator/qcom,rpmh-regulator.h| 36 ++ include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 + include/dt-bindings/reset/qcom,sdm845-pdc.h| 22 ++ include/dt-bindings/soc/qcom,apr.h | 28 ++ include/dt-bindings/soc/qcom,rpmh-rsc.h| 14 + include/dt-bindings/sound/qcom,q6afe.h | 9 + include/dt-bindings/sound/qcom,q6asm.h | 26 ++ include/dt-bindings/sound/qcom,q6dsp-lpass-ports.h | 234 24 files changed, 1822 insertions(+) With the commit id: Reviewed-by: Neil Armstrong
Re: [PATCH v2 18/32] doc: board/qualcomm: document generic targets
On 19/12/2023 17:04, Caleb Connolly wrote: Replace the board specific docs with a generic board.rst file which documents the build/boot process for the sdm845 and qcs404 boards now that the only differences are the DTB in use. At the same time, create a debugging page to document some useful snippets and tips for working with Qualcomm platforms. Signed-off-by: Caleb Connolly --- doc/board/qualcomm/board.rst | 119 doc/board/qualcomm/debugging.rst | 61 +++ doc/board/qualcomm/index.rst | 4 +- doc/board/qualcomm/qcs404.rst| 79 --- doc/board/qualcomm/sdm845.rst| 162 --- 5 files changed, 182 insertions(+), 243 deletions(-) diff --git a/doc/board/qualcomm/board.rst b/doc/board/qualcomm/board.rst new file mode 100644 index ..093048eee0a6 --- /dev/null +++ b/doc/board/qualcomm/board.rst @@ -0,0 +1,119 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Dzmitry Sankouski + +Qualcomm generic boards +=== + +About this +-- +This document describes how to build and run U-Boot for Qualcomm generic +boards. Right now the generic target supports the Snapdragon 845 SoC, however +it's expected to support more SoCs going forward. + +SDM845 - hi-end qualcomm chip, introduced in late 2017. +Mostly used in flagship phones and tablets of 2018. + +The current boot flow support loading u-boot as an Android boot image via +Qualcomm's UEFI-based ABL (Android) Bootloader. The DTB used by U-Boot will +be appended to the U-Boot image the same way as when booting Linux. U-Boot +will then retrieve the DTB during init. This way the memory layout and KASLR +offset will be populated by ABL. + +Installation + +Build +^ +Setup ``CROSS_COMPILE`` for aarch64 and build U-Boot for your board:: + + $ export CROSS_COMPILE= + $ make _defconfig + $ make Perhaps you could also refer to buildman aswell as alternative to bare make + +This will build ``u-boot-nodtb.bin`` in the configured output directory. + +Generate FIT image +^^ +See doc/uImage.FIT for more details + +Pack android boot image +^^^ +We'll assemble android boot image with ``u-boot-nodtb.bin`` instead of linux kernel, +and FIT image instead of ``initramfs``. Android bootloader expect gzipped kernel +with appended dtb, so let's mimic linux to satisfy stock bootloader. + +Boards +-- + +starqlte + + +The starqltechn is a production board for Samsung S9 (SM-G9600) phone, +based on the Qualcomm SDM845 SoC. + +This device is supported by the common qcom_defconfig. + +The DTB is called "sdm845-samsung-starqltechn.dtb" + +More information can be found on the `Samsung S9 page`_. + +dragonboard845c +^^^ + +The dragonboard845c is a Qualcomm Robotics RB3 Development Platform, based on +the Qualcomm SDM845 SoC. + +This device is supported by the common qcom_defconfig + +The DTB is called "sdm845-db845c.dtb" + +More information can be found on the `DragonBoard 845c page`_. + +qcs404-evb +^^ + +The QCS404 EvB is a Qualcomm Development Platform, based on the Qualcomm QCS404 SoC. + +This device is supported by the common qcom_defconfig + +The DTB is called "qcs404-evb-4000.dtb" + +Building steps +-- + +Steps: + +- Build u-boot:: + + $ export CROSS_COMPILE= + $ make qcom_defconfig + $ make + +- gzip u-boot:: + + gzip u-boot-nodtb.bin + +- Append dtb to gzipped u-boot:: + +cat u-boot-nodtb.bin.gz arch/arm/dts/your-board.dtb > u-boot-nodtb.bin.gz-dtb + +- A ``qcom.its`` file can be found in ``board/qualcomm/generic/`` + directory. It expects a folder as ``qcom_imgs/`` in the main directory + containing pre-built kernel, dts and ramdisk images. See ``qcom.its`` + for full path to images:: + + mkimage -f qcom.its qcom.itb + +- Now we've got everything to build android boot image:: + + mkbootimg --kernel u-boot-nodtb.bin.gz-dtb --ramdisk db845c.itb \ + --output boot.img --pagesize 4096 --base 0x8000 + +- Flash boot.img using fastboot and erase dtbo to avoid conflicts with our DTB: + + .. code-block:: bash + + fastboot flash boot boot.img + fastboot erase dtbo + +.. _Samsung S9 page: https://en.wikipedia.org/wiki/Samsung_Galaxy_S9 +.. _DragonBoard 845c page: https://www.96boards.org/product/rb3-platform/ diff --git a/doc/board/qualcomm/debugging.rst b/doc/board/qualcomm/debugging.rst new file mode 100644 index ..1c35d1909d12 --- /dev/null +++ b/doc/board/qualcomm/debugging.rst @@ -0,0 +1,61 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Caleb Connolly + +Qualcomm debugging +== + +About this +-- + +This page describes how to enable early UART and other debugging techniques +for Qualcomm boards. + +Enable debug UART +- + +Newer boards (SDM845 and newer, those with GENI SE UART) +^^
Re: [PATCH v2 17/32] mach-snapdragon: generate fdtfile automatically
On 19/12/2023 17:04, Caleb Connolly wrote:
With just a few basic rules, we can generate the $fdtfile environment
variable to match the format used in Linux. This uses the root
compatible property inside u-boot, with specific handling for the
Dragonboard845c which is a special case, and for the qrb robotics
boards.
This is known to work on supported platforms, and lets us avoid having a
big lookup table.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/board.c | 101 +++
1 file changed, 101 insertions(+)
diff --git a/arch/arm/mach-snapdragon/board.c b/arch/arm/mach-snapdragon/board.c
index b00f536d38b4..752166ea7563 100644
--- a/arch/arm/mach-snapdragon/board.c
+++ b/arch/arm/mach-snapdragon/board.c
@@ -113,6 +113,106 @@ int board_init(void)
return 0;
}
+/* Sets up the "board", and "soc" environment variables as well as constructing the devicetree
+ * path, with a few quirks to handle non-standard dtb filenames. This is not
meant to be a
+ * comprehensive solution to automatically picking the DTB, but aims to be
correct for the
+ * majority case. For most devices it should be possible to make this
algorithm work by
+ * adjusting the root compatible property in the U-Boot DTS. Handling devices
with multiple
+ * variants that are all supported by a single U-Boot image will require
implementing device-
+ * specific detection.
+ */
+static void configure_env(void)
+{
+ const char *first_compat, *last_compat;
+ char *tmp;
+ char buf[32] = { 0 };
+ /*
+* Most DTB filenames follow the scheme: qcom/-[vendor]-.dtb
+* The vendor is skipped when it's a Qualcomm reference board, or the
+* db845c.
+*/
+ char dt_path[64] = { 0 };
+ int compat_count, ret;
+ ofnode root;
+
+ root = ofnode_root();
+ /* This is almost always 2, but be explicit that we want the first and
last compatibles
+* not the first and second.
+*/
+ compat_count = ofnode_read_string_count(root, "compatible");
+ if (compat_count < 2) {
+ log_warning("%s: only one root compatible bailing!\n",
__func__);
+ return;
+ }
+
+ /* The most specific device compatible (e.g. "thundercomm,db845c") */
+ ret = ofnode_read_string_index(root, "compatible", 0, &first_compat);
+ if (ret < 0) {
+ log_warning("Can't read first compatible\n");
+ return;
+ }
+
+ /* The last compatible is always the SoC compatible */
+ ret = ofnode_read_string_index(root, "compatible", compat_count - 1,
&last_compat);
+ if (ret < 0) {
+ log_warning("Can't read second compatible\n");
+ return;
+ }
+
+ /* Copy the second compat (e.g. "qcom,sdm845") into buf */
+ strlcpy(buf, last_compat, sizeof(buf) - 1);
+ tmp = buf;
+
+ /* strsep() is destructive, it replaces the comma with a \0 */
+ if (!strsep(&tmp, ",")) {
+ log_warning("second compatible '%s' has no ','\n", buf);
+ return;
+ }
+
+ /* tmp now points to just the "sdm845" part of the string */
+ env_set("soc", tmp);
+
+ /* Now figure out the "board" part from the first compatible */
+ memset(buf, 0, sizeof(buf));
+ strlcpy(buf, first_compat, sizeof(buf) - 1);
+ tmp = buf;
+
+ /* The Qualcomm reference boards (RBx, HDK, etc) */
+ if (!strncmp("qcom", buf, strlen("qcom"))) {
+ /*
+* They all have the first compatible as "qcom,-"
+* (e.g. "qcom,qrb5165-rb5"). We extract just the part after
+* the dash.
+*/
+ if (!strsep(&tmp, "-")) {
+ log_warning("compatible '%s' has no '-'\n", buf);
+ return;
+ }
+ /* tmp is now "rb5" */
+ env_set("board", tmp);
+ } else {
+ if (!strsep(&tmp, ",")) {
+ log_warning("compatible '%s' has no ','\n", buf);
+ return;
+ }
+ /* for thundercomm we just want the bit after the comma (e.g.
"db845c"),
+* for all other boards we replace the comma with a '-' and
take both
+* (e.g. "oneplus-enchilada")
+*/
+ if (!strncmp("thundercomm", buf, strlen("thundercomm"))) {
+ env_set("board", tmp);
+ } else {
+ *(tmp - 1) = '-';
+ env_set("board", buf);
+ }
+ }
+
+ /* Now build the full path name */
+ snprintf(dt_path, sizeof(dt_path), "qcom/%s-%s.dtb",
+env_get("soc"), env_get("board"));
+ env_set("fdtfile", dt_path);
+}
+
void __weak qcom_late_init(void)
{
}
@@ -142,6 +242,7 @@ int board_late_init(void)
if (status)
Re: [PATCH v2 15/32] mach-snapdragon: generalise board support
On 19/12/2023 17:04, Caleb Connolly wrote: Historically, Qualcomm boards have relied on heavy hardcoding in U-Boot, in many cases to the specific SoC but also to the board itself (e.g. memory map). This has been largely resolved by modernising the Qualcomm drivers in U-Boot, however the board code still largely follows this model. This patch removes the board specific memory maps and duplicated board init code, replacing it with generic init code. The memory map is now built at runtime based on data read from DT, this allows for the memory map to be provided without having to recompile U-Boot. Support is also added for booting with appended DTBs, so that the first-stage bootloader can populate the memory map for us. The sdm845 specific init code is dropped entirely, it set an environment variable depending on if a button was pressed, but this variable wasn't used in U-Boot, and could be written to use the button command instead. The KASLR detection is also dropped as with appended dtb, the kaslr seed can be read directly from the DTB passed to U-Boot. A new qcom_defconfig is added, with the aim of providing a generic U-Boot configuration that will work on as many Qualcomm boards as possible. It replaces the defconfig files for the Dragonboard 845c, Galaxy S9, and QCS404 EVB. For now the db410c and 820c are excluded as they still have some board code left. Similarly, the config headers for db845c, starqltechn, and qcs404-evb are replaced by a single qcom header. Signed-off-by: Caleb Connolly --- arch/arm/Kconfig | 3 + arch/arm/dts/Makefile| 9 +- arch/arm/mach-snapdragon/Kconfig | 96 +++-- arch/arm/mach-snapdragon/Makefile| 6 +- arch/arm/mach-snapdragon/board.c | 168 +++ arch/arm/mach-snapdragon/init_sdm845.c | 73 -- arch/arm/mach-snapdragon/sysmap-apq8016.c| 31 - arch/arm/mach-snapdragon/sysmap-apq8096.c| 31 - arch/arm/mach-snapdragon/sysmap-qcs404.c | 43 -- arch/arm/mach-snapdragon/sysmap-sdm845.c | 31 - board/qualcomm/dragonboard410c/Kconfig | 15 -- board/qualcomm/dragonboard410c/dragonboard410c.c | 10 -- board/qualcomm/dragonboard820c/Kconfig | 15 -- board/qualcomm/dragonboard820c/dragonboard820c.c | 39 +- board/qualcomm/dragonboard845c/Kconfig | 12 -- board/qualcomm/qcs404-evb/Kconfig| 15 -- board/qualcomm/qcs404-evb/qcs404-evb.c | 21 +-- configs/dragonboard410c_defconfig| 6 +- configs/dragonboard820c_defconfig| 6 +- configs/dragonboard845c_defconfig| 29 configs/qcom_defconfig | 73 ++ configs/qcs404evb_defconfig | 5 +- configs/starqltechn_defconfig| 41 -- include/configs/dragonboard845c.h| 20 --- include/configs/qcom.h | 21 +++ include/configs/qcs404-evb.h | 20 --- include/configs/sdm845.h | 26 27 files changed, 304 insertions(+), 561 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index bd48131292e3..e814910cb495 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1075,6 +1075,9 @@ config ARCH_SNAPDRAGON select OF_SEPARATE select SMEM select SPMI + select OF_BOARD + select SAVE_PREV_BL_FDT_ADDR + select LINUX_KERNEL_IMAGE_HEADER imply CMD_DM config ARCH_SOCFPGA diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 55aceb51cdb0..ec63749fa912 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -600,10 +600,11 @@ dtb-$(CONFIG_TARGET_SL28) += fsl-ls1028a-kontron-sl28.dtb \ dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb -dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb -dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb -dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb -dtb-$(CONFIG_TARGET_QCS404EVB) += qcs404-evb.dtb +dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb \ + dragonboard820c.dtb \ + dragonboard845c.dtb \ + starqltechn.dtb \ + qcs404-evb.dtb dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index f897c393464f..96e44e2c5491 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -3,6 +3,9 @@ if ARCH_SNAPDRAGON config SYS_SOC default "snapdragon" +config SYS_VENDOR + default "qualcomm" + config SYS_MALLOC_F_LEN default 0x2000 @@ -12,91 +15,24 @@ config SPL_SYS_MALLOC_F config SPL_SYS_MALLOC_F_LEN default 0x2000 -config SDM845 - bool "Qualcomm Snapdragon 845 SoC" - select LIN
Re: [PATCH v2 09/32] gpio: qcom_pmic: add a quirk to skip GPIO configuration
On 21/12/2023 16:19, Neil Armstrong wrote:
> On 19/12/2023 17:04, Caleb Connolly wrote:
>> Some platforms hard reset when attempting to configure PMIC GPIOs. Add
>> support for quirks specified in match data with a single quirk to skip
>> this configuration. We rely on the GPIO already be configured correctly,
>> which is always the case for volume up (the only current user of these
>> GPIOs).
>
> Do you know why this happens in u-boot and not in Linux ?
I don't, I did some preliminary debugging but couldn't root-cause this.
Writing to any of the GPIO registers seem to cause a crash. It could
potentially be a bug in the SPMI arb driver - I'm not sure if there are
any SPMI writes done on this platform by U-Boot
>
>>
>> Signed-off-by: Caleb Connolly
>> ---
>> drivers/gpio/qcom_pmic_gpio.c | 18 --
>> 1 file changed, 16 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpio/qcom_pmic_gpio.c
>> b/drivers/gpio/qcom_pmic_gpio.c
>> index 2a4fef8d28cb..198cd84bc31e 100644
>> --- a/drivers/gpio/qcom_pmic_gpio.c
>> +++ b/drivers/gpio/qcom_pmic_gpio.c
>> @@ -64,6 +64,15 @@
>> #define REG_EN_CTL 0x46
>> #define REG_EN_CTL_ENABLE (1 << 7)
>> +/**
>> + * pmic_gpio_match_data - platform specific configuration
>> + *
>> + * @PMIC_MATCH_READONLY: treat all GPIOs as readonly, don't attempt
>> to configure them
>> + */
>> +enum pmic_gpio_quirks {
>> + QCOM_PMIC_QUIRK_READONLY = (1 << 0),
>> +};
>> +
>> struct qcom_gpio_bank {
>> uint32_t pid; /* Peripheral ID on SPMI bus */
>> bool lv_mv_type; /* If subtype is GPIO_LV(0x10) or
>> GPIO_MV(0x11) */
>> @@ -75,7 +84,12 @@ static int qcom_gpio_set_direction(struct udevice
>> *dev, unsigned offset,
>> struct qcom_gpio_bank *priv = dev_get_priv(dev);
>> uint32_t gpio_base = priv->pid + REG_OFFSET(offset);
>> uint32_t reg_ctl_val;
>> - int ret;
>> + ulong quirks = dev_get_driver_data(dev);
>> + int ret = 0;
>> +
>> + /* Some PMICs don't like their GPIOs being configured */
>> + if (quirks & QCOM_PMIC_QUIRK_READONLY)
>> + return 0;
>> /* Disable the GPIO */
>> ret = pmic_clrsetbits(dev->parent, gpio_base + REG_EN_CTL,
>> @@ -304,7 +318,7 @@ static int qcom_gpio_of_to_plat(struct udevice *dev)
>> static const struct udevice_id qcom_gpio_ids[] = {
>> { .compatible = "qcom,pm8916-gpio" },
>> { .compatible = "qcom,pm8994-gpio" }, /* 22 GPIO's */
>> - { .compatible = "qcom,pm8998-gpio" },
>> + { .compatible = "qcom,pm8998-gpio", .data =
>> QCOM_PMIC_QUIRK_READONLY },
>> { .compatible = "qcom,pms405-gpio" },
>> { }
>> };
>>
>
--
// Caleb (they/them)
Re: [PATCH v2 14/32] board: dragonboard820c: use LINUX_KERNEL_IMAGE_HEADER
On 19/12/2023 17:04, Caleb Connolly wrote:
db820c predated support for prepending the kernel image header
automatically, drop it's custom linker script and head.S in favour of
this generic support.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/Kconfig | 1 +
board/qualcomm/dragonboard820c/Makefile | 1 -
board/qualcomm/dragonboard820c/head.S | 33 -
board/qualcomm/dragonboard820c/u-boot.lds | 111 --
4 files changed, 1 insertion(+), 145 deletions(-)
diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
index ad6671081910..f897c393464f 100644
--- a/arch/arm/mach-snapdragon/Kconfig
+++ b/arch/arm/mach-snapdragon/Kconfig
@@ -45,6 +45,7 @@ config TARGET_DRAGONBOARD410C
config TARGET_DRAGONBOARD820C
bool "96Boards Dragonboard 820C"
+ select LINUX_KERNEL_IMAGE_HEADER
imply CLK_QCOM_APQ8096
imply PINCTRL_QCOM_APQ8096
imply BUTTON_QCOM_PMIC
diff --git a/board/qualcomm/dragonboard820c/Makefile
b/board/qualcomm/dragonboard820c/Makefile
index 643311f5b3ba..2ae6d16364aa 100644
--- a/board/qualcomm/dragonboard820c/Makefile
+++ b/board/qualcomm/dragonboard820c/Makefile
@@ -3,4 +3,3 @@
# (C) Copyright 2017 Jorge Ramirez-Ortiz
obj-y := dragonboard820c.o
-extra-y += head.o
diff --git a/board/qualcomm/dragonboard820c/head.S
b/board/qualcomm/dragonboard820c/head.S
deleted file mode 100644
index b052a858fd32..
--- a/board/qualcomm/dragonboard820c/head.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * ARM64 header for proper chain-loading with Little Kernel.
- *
- * Little Kernel shipped with Dragonboard820C boots standard Linux images for
- * ARM64. This file adds header that is required to boot U-Boot properly.
- *
- * For details see:
- * https://www.kernel.org/doc/Documentation/arm64/booting.txt
- *
- * (C) Copyright 2015 Mateusz Kulikowski
- */
-
-#include
-
-/*
- * per document in linux/Doc/arm64/booting.text
- */
-.global _arm64_header
-_arm64_header:
- b _start
- .word 0
- .quad CONFIG_TEXT_BASE-PHYS_SDRAM_1 /* Image load offset, LE */
- .quad 0/* Effective size of kernel image, little-endian */
- .quad 0/* kernel flags, little-endian */
- .quad 0/* reserved */
- .quad 0/* reserved */
- .quad 0/* reserved */
- .byte 0x41 /* Magic number, "ARM\x64" */
- .byte 0x52
- .byte 0x4d
- .byte 0x64
- .word 0/* reserved (used for PE COFF offset) */
diff --git a/board/qualcomm/dragonboard820c/u-boot.lds
b/board/qualcomm/dragonboard820c/u-boot.lds
deleted file mode 100644
index 5251b59fbe76..
--- a/board/qualcomm/dragonboard820c/u-boot.lds
+++ /dev/null
@@ -1,111 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Override linker script for fastboot-readable images
- *
- * (C) Copyright 2015 Mateusz Kulikowski
- *
- * Based on arch/arm/cpu/armv8/u-boot.lds (Just add header)
- */
-
-OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64",
"elf64-littleaarch64")
-OUTPUT_ARCH(aarch64)
-ENTRY(_arm64_header)
-SECTIONS
-{
- . = 0x;
-
- . = ALIGN(8);
- .text :
- {
- *(.__image_copy_start)
- board/qualcomm/dragonboard820c/head.o (.text*)
- CPUDIR/start.o (.text*)
- }
-
- /* This needs to come before *(.text*) */
- .efi_runtime : {
-__efi_runtime_start = .;
- *(.text.efi_runtime*)
- *(.rodata.efi_runtime*)
- *(.data.efi_runtime*)
-__efi_runtime_stop = .;
- }
-
- .text_rest :
- {
- *(.text*)
- }
-
- . = ALIGN(8);
- .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
- . = ALIGN(8);
- .data : {
- *(.data*)
- }
-
- . = ALIGN(8);
-
- . = .;
-
- . = ALIGN(8);
- __u_boot_list : {
- KEEP(*(SORT(__u_boot_list*)));
- }
-
- . = ALIGN(8);
-
- .efi_runtime_rel : {
-__efi_runtime_rel_start = .;
- *(.rel*.efi_runtime)
- *(.rel*.efi_runtime.*)
-__efi_runtime_rel_stop = .;
- }
-
- . = ALIGN(8);
-
- .image_copy_end :
- {
- *(.__image_copy_end)
- }
-
- . = ALIGN(8);
-
- .rel_dyn_start :
- {
- *(.__rel_dyn_start)
- }
-
- .rela.dyn : {
- *(.rela*)
- }
-
- .rel_dyn_end :
- {
- *(.__rel_dyn_end)
- }
-
- _end = .;
-
- . = ALIGN(8);
-
- .bss_start : {
- KEEP(*(.__bss_start));
- }
-
- .bss : {
- *(.bss*)
-. = ALIGN(8);
- }
-
- .bss_end : {
- KEEP(*(.__bss_end));
- }
-
- /DISCARD/ : { *(.dynsym) }
-
Re: [PATCH v2 13/32] board: dragonboard410c: import board code from mach-snapdragon
On 19/12/2023 17:04, Caleb Connolly wrote:
Some of the db410c board support code was written to be generic and
placed in mach-snapdragon. However, as the db410c is the only board
using this, move the code out of mach-snapdragon. This makes is more
obvious what code is relevant for which targets and helps tidy things up
a little more.
Signed-off-by: Caleb Connolly
---
arch/arm/mach-snapdragon/Makefile | 2 -
arch/arm/mach-snapdragon/include/mach/dram.h | 12 -
arch/arm/mach-snapdragon/misc.c| 55 --
board/qualcomm/dragonboard410c/Makefile| 3 +-
board/qualcomm/dragonboard410c/dragonboard410c.c | 4 +-
.../qualcomm/dragonboard410c/misc.c| 51 +++-
.../mach => board/qualcomm/dragonboard410c}/misc.h | 1 +
7 files changed, 54 insertions(+), 74 deletions(-)
diff --git a/arch/arm/mach-snapdragon/Makefile
b/arch/arm/mach-snapdragon/Makefile
index 3a3a297c1768..d02432df8b04 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -6,6 +6,4 @@ obj-$(CONFIG_SDM845) += sysmap-sdm845.o
obj-$(CONFIG_SDM845) += init_sdm845.o
obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o
obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
-obj-y += misc.o
-obj-y += dram.o
obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o
diff --git a/arch/arm/mach-snapdragon/include/mach/dram.h
b/arch/arm/mach-snapdragon/include/mach/dram.h
deleted file mode 100644
index 0a9eedda414c..
--- a/arch/arm/mach-snapdragon/include/mach/dram.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Snapdragon DRAM
- * Copyright (C) 2018 Ramon Fried
- */
-
-#ifndef DRAM_H
-#define DRAM_H
-
-int msm_fixup_memory(void *blob);
-
-#endif
diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c
deleted file mode 100644
index 7d452f4529b7..
--- a/arch/arm/mach-snapdragon/misc.c
+++ /dev/null
@@ -1,55 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Miscellaneous Snapdragon functionality
- *
- * (C) Copyright 2018 Ramon Fried
- *
- */
-
-#include
-#include
-#include
-#include
-
-/* UNSTUFF_BITS macro taken from Linux Kernel: drivers/mmc/core/sd.c */
-#define UNSTUFF_BITS(resp, start, size) \
- ({ \
- const int __size = size; \
- const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1;\
- const int __off = 3 - ((start) / 32); \
- const int __shft = (start) & 31; \
- u32 __res; \
- \
- __res = resp[__off] >> __shft; \
- if (__size + __shft > 32) \
- __res |= resp[__off - 1] << ((32 - __shft) % 32); \
- __res & __mask; \
- })
-
-u32 msm_board_serial(void)
-{
- struct mmc *mmc_dev;
-
- mmc_dev = find_mmc_device(0);
- if (!mmc_dev)
- return 0;
-
- if (mmc_init(mmc_dev))
- return 0;
-
- return UNSTUFF_BITS(mmc_dev->cid, 16, 32);
-}
-
-void msm_generate_mac_addr(u8 *mac)
-{
- /* use locally adminstrated pool */
- mac[0] = 0x02;
- mac[1] = 0x00;
-
- /*
-* Put the 32-bit serial number in the last 32-bit of the MAC address.
-* Use big endian order so it is consistent with the serial number
-* written as a hexadecimal string, e.g. 0x1234abcd -> 02:00:12:34:ab:cd
-*/
- put_unaligned_be32(msm_board_serial(), &mac[2]);
-}
diff --git a/board/qualcomm/dragonboard410c/Makefile
b/board/qualcomm/dragonboard410c/Makefile
index 1b99c8b0efef..a3ae1a5f9136 100644
--- a/board/qualcomm/dragonboard410c/Makefile
+++ b/board/qualcomm/dragonboard410c/Makefile
@@ -2,4 +2,5 @@
#
# (C) Copyright 2015 Mateusz Kulikowski
-obj-y := dragonboard410c.o
+obj-y += dragonboard410c.o
+obj-y += misc.o
diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c
b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 1adac07569ae..eea603a4148d 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -18,10 +18,10 @@
#include
#include
#include
-#include
-#include
#include
+#include "misc.h"
+
DECLARE_GLOBAL_DATA_PTR;
#define USB_HUB_RESET_GPIO 2
diff --git a/arch/arm/mach-snapdragon/dram.c
b/board/qualcomm/dragonboard410c/misc.c
similarity index 64%
rename from arch/arm/mach-snapdragon/dram.c
rename to board/qualcomm/dragonboard410c/misc.c
index 499dfdf0da6e..27d51ef78914 100644
--- a/arch/arm/mach-snapdragon/dram.c
+++ b/board/qualcomm/dragonboard410c/misc.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Onboard memory detection for Snapdragon boards
+ * Miscellaneous Snapdragon functionality
*
* (C) Copyright 2018 Ramon Fried
*
@@ -9,10 +9,56 @@
#include
#include
#include
+#include
#include
#inc
