Re: [PATCH] mvebu: Enable preboot start for pci/usb/scsi/nvme

[Dennis Gilmore]

Does anyone have an alternate email for Konstantin Porotchkin? he is
listed as the maintainer for theESPRESSOBin BOARD. and his email is
bouncing because his inbox is full.

Dennis

On Mon, Apr 1, 2024 at 8:40 PM Dennis Gilmore  wrote:
>
> While preboot was enabled, it did not work as commands are needed to be
> run to enable some of the subsystems. This patch starts pci, USB, Sata,
> and nvme and makes sure that the system will boot no mater what storage
> is in use.
>
> Applogies for resending, I accidently left the u-boot list off
>
> Signed-off-by: Dennis Gilmore 
> ---
>  configs/mvebu_espressobin-88f3720_defconfig | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
> b/configs/mvebu_espressobin-88f3720_defconfig
> index 7ecf5ab0d64..fause his inbox is full4f7a809609 100644
> --- a/configs/mvebu_espressobin-88f3720_defconfig
> +++ b/configs/mvebu_espressobin-88f3720_defconfig
> @@ -21,6 +21,7 @@ CONFIG_AHCI=y
>  CONFIG_DISTRO_DEFAULTS=y
>  CONFIG_OF_BOARD_SETUP=y
>  CONFIG_USE_PREBOOT=y
> +CONFIG_PREBOOT="pci enum; usb start; nvme scan; scsi scan;"
>  CONFIG_SYS_CONSOLE_INFO_QUIET=y
>  # CONFIG_DISPLAY_CPUINFO is not set
>  # CONFIG_DISPLAY_BOARDINFO is not set
> --
> 2.44.0
>

[PATCH] mvebu: Enable preboot start for pci/usb/scsi/nvme

[Dennis Gilmore]

While preboot was enabled, it did not work as commands are needed to be
run to enable some of the subsystems. This patch starts pci, USB, Sata,
and nvme and makes sure that the system will boot no mater what storage
is in use.

Applogies for resending, I accidently left the u-boot list off

Signed-off-by: Dennis Gilmore 
---
 configs/mvebu_espressobin-88f3720_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/mvebu_espressobin-88f3720_defconfig 
b/configs/mvebu_espressobin-88f3720_defconfig
index 7ecf5ab0d64..f4f7a809609 100644
--- a/configs/mvebu_espressobin-88f3720_defconfig
+++ b/configs/mvebu_espressobin-88f3720_defconfig
@@ -21,6 +21,7 @@ CONFIG_AHCI=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="pci enum; usb start; nvme scan; scsi scan;"
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
-- 
2.44.0

Re: [PATCH v2 4/6] board: starfive: support Milk-V Mars board

[Minda Chen]

> 
> On 4/1/24 17:28, Aurelien Jarno wrote:
> > On 2024-03-28 17:01, Heinrich Schuchardt wrote:
> >> On 24.03.24 16:00, Aurelien Jarno wrote:
> >>> On 2024-03-21 19:11, Heinrich Schuchardt wrote:
>  The differences between the Milk-V Mars board and the VisionFive 2
>  board are small enough that we can support both using the same U-Boot
> build.
> 
>  * The model and compatible property are taken from proposed Linux
> patches.
>  * The EEPROM is atmel,24c02 according to the vendor U-Boot.
>  * The second Ethernet port is not available.
> >>>
> >>>   From the device tree that have been submitted to the kernel [1] it
> >>> seems another difference is that there is a CD gpio for mmc1.
> >>
> >> Thank you for reviewing.
> >>
> >> On all of Milk-V Mars, VisionFive 2 1.2B, and 1.3A I see GPIO 41
> >> level changing when removing or inserting an SD card using U-Boot
> >> command 'gpio status -a'. So this seems not to be Milk-V specific.
> >>
> >> Could you, please, check.
> >
> > This already have been answered by others, thanks.
> >
> >>>   From the schematics, it also seems that the usb0 port is not in
> >>> peripheral mode, but in host mode. That said on the submitted kernel
> >>> device tree it seems simply disabled.
> >>
> >> All three blue-colored USB 3.0 ports are able to read an SD-card in U-Boot.
> >>
> >> The black port provides 5V but I could not make it work.
> >>
> >> On the schema I found:
> >>
> >> USB20: Do not support OTG mode and AVSS_USB0-AVSS_USB2 attached to
> ground.
> >>
> >> Could you, please, specify which node in the device-tree you want to
> >> disable. I cannot see anything disabled for usb@1010 and usb@0 in
> >> the kernel device-tree.
> >
> > Disclaimer, I have no such board, but I remember people on IRC trying
> > to use the device tree from the VF2 on a Milk-V Mars and getting an
> > error with the USB being in a wrong mode.
> >
> > The difference I have noticed is not a node but the dr_mode property:
> >
> >  {
> >  dr_mode = "peripheral";
> >  status = "okay";
> > };
> 
> Thanks Aurelien for the explanation.
> 
> The node usb@1010 (aka usb0) does not exist in the U-Boot
> VisionFive2 device-tree, yet. There isn't any dr_mode property either.
> 
> We will have to consider this node once we merge the Linux device-tree.
> 
> Best regards
> 
> Heinrich
> 
usb@1010 is cadence usb controller. In VF2, dr mode is usb peripheral and 
seldom used in u-boot. So the cadence usb wrapper codes not in uboot upstream.
I don't know the dr mode in milkv 7110 board. But if it its dr mode is host, I 
think I
need develop cadence usb wrapper code upstream.

Minda 
> >
> > This does not appear on the patches submitted on the Linux side for
> > the MilkV Mars.
> >
> > Aurelien
> >

[PATCH v3] arm: dts: kirkwood: Enable upstream DT on Kirkwood boards

[Tony Dinh]

Enable OF_UPSTREAM to use upstream DT and add marvell/ prefix to the
DEFAULT_DEVICE_TREE for Kirkwood boards. And so we can directly build
DTBs from dts/upstream/src/arm/marvell, and including *-u-boot.dtsi
files from arch/arm/dts/ directory.

Background:

The following 2 commands and filters were used in the analysis to determine
which upstream DTS and DTSI files can be used as they are, or need to have
modified/created *-u-boot.dtsi for u-boot specific implementation, and
which board should be opt-out from OF_UPSTREAM.

"git grep -li arch_kirkwood configs | xargs grep DEVICE_TREE | cut -d '"' -f2 | 
xargs -n1 sh -c 'diff -qs  arch/arm/dts/$1.dts 
dts/upstream/src/arm/marvell/$1.dts' sh | grep differ"
"diff -qrbu arch/arm/dts/ dts/upstream/src/arm/marvell/ | grep kirkwood | grep 
".dtsi ""

More detailed information can be found at:
https://lore.kernel.org/u-boot/20240328021825.17935-1-mibo...@gmail.com/T/#u

I've regression tested this patch with the Zyxel NSA325 (Kirkwood 88F6282)
and Zyxel NSA310S (Kirkwood 88F6281). The Zyxel NSA325 board has a
USB 3.0 controller attached to the PCIe bus. And the Zyxel NSA310S
has an extensive overhaul in bindings and styles in upstream DTS version.

Tested-by: Michael Walle  # on lschv2
Acked-by: Sumit Garg 
Reviewed-by: Stefan Roese 

Signed-off-by: Tony Dinh 
---

Changes in v3:
- Collect Reviewed/Tested/Acked-by tags.
- Trim the commit description and point to lore.kernel.org for detailed 
information.
- No change from the V2 patch.

Changes in v2:
Remove unnecessary redefined OF_UPSTREAM and use "imply OF_UPSTREAM" for
KW88F6281 and KW88F6192 SoCs.

 arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi | 7 +++
 arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi   | 6 --
 arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi | 6 --
 arch/arm/dts/kirkwood-nsa325-u-boot.dtsi| 7 +++
 arch/arm/mach-kirkwood/Kconfig  | 2 ++
 configs/SBx81LIFKW_defconfig| 1 +
 configs/SBx81LIFXCAT_defconfig  | 1 +
 configs/d2net_v2_defconfig  | 2 +-
 configs/dns325_defconfig| 2 +-
 configs/dockstar_defconfig  | 2 +-
 configs/dreamplug_defconfig | 2 +-
 configs/ds109_defconfig | 2 +-
 configs/goflexhome_defconfig| 2 +-
 configs/guruplug_defconfig  | 2 +-
 configs/ib62x0_defconfig| 2 +-
 configs/iconnect_defconfig  | 2 +-
 configs/inetspace_v2_defconfig  | 2 +-
 configs/lschlv2_defconfig   | 2 +-
 configs/lsxhl_defconfig | 2 +-
 configs/nas220_defconfig| 2 +-
 configs/net2big_v2_defconfig| 2 +-
 configs/netspace_lite_v2_defconfig  | 2 +-
 configs/netspace_max_v2_defconfig   | 2 +-
 configs/netspace_mini_v2_defconfig  | 2 +-
 configs/netspace_v2_defconfig   | 2 +-
 configs/nsa310s_defconfig   | 2 +-
 configs/nsa325_defconfig| 2 +-
 configs/openrd_base_defconfig   | 2 +-
 configs/openrd_client_defconfig | 2 +-
 configs/openrd_ultimate_defconfig   | 2 +-
 configs/pogo_e02_defconfig  | 2 +-
 configs/pogo_v4_defconfig   | 2 +-
 configs/sheevaplug_defconfig| 2 +-
 33 files changed, 52 insertions(+), 30 deletions(-)
 create mode 100644 arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
 create mode 100644 arch/arm/dts/kirkwood-nsa325-u-boot.dtsi

diff --git a/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi 
b/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
new file mode 100644
index 00..59f19a211f
--- /dev/null
+++ b/arch/arm/dts/kirkwood-dreamplug-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+   aliases {
+   spi0 = 
+   };
+};
diff --git a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi 
b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
index 7fc2d7d3b4..cf33ff822e 100644
--- a/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
+++ b/arch/arm/dts/kirkwood-lschlv2-u-boot.dtsi
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0+
 
- {
-   status = "disabled";
+/ {
+   aliases {
+   spi0 = 
+   };
 };
 
 _power {
diff --git a/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi 
b/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
index 7fc2d7d3b4..cf33ff822e 100644
--- a/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
+++ b/arch/arm/dts/kirkwood-lsxhl-u-boot.dtsi
@@ -1,7 +1,9 @@
 // SPDX-License-Identifier: GPL-2.0+
 
- {
-   status = "disabled";
+/ {
+   aliases {
+   spi0 = 
+   };
 };
 
 _power {
diff --git a/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi 
b/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi
new file mode 100644
index 00..dec27b2a87
--- /dev/null
+++ b/arch/arm/dts/kirkwood-nsa325-u-boot.dtsi
@@ -0,0 +1,7 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+ {
+   partition@0 {
+   /delete-property/ read-only;
+   };

[PATCH 1/1] net: add support to parse the NIS domain for the dhcp options

[Charles Hardin]

There is code in the bootp parsing for NIS domain and add the
same support for the dhcp options as well. This allows the same
usage of the data when the dhcp command is used in the boot
command.

Signed-off-by: Charles Hardin 
---
 net/bootp.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/net/bootp.c b/net/bootp.c
index 6800290963..046caf3685 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -883,6 +883,14 @@ static void dhcp_process_options(uchar *popt, uchar *end)
break;
case 28:/* Ignore Broadcast Address Option */
break;
+   case 40:/* NIS Domain name */
+   if (net_nis_domain[0] == 0) {
+   size = truncate_sz("NIS Domain Name",
+   sizeof(net_nis_domain), size);
+   memcpy(_nis_domain, ext + 2, size);
+   net_nis_domain[size] = 0;
+   }
+   break;
 #if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER)
case 42:/* NTP server IP */
net_copy_ip(_ntp_server, (popt + 2));
-- 
2.39.3 (Apple Git-146)

Re: [PATCH 1/4] mtd: spi-nor-core: Do not start or end writes at odd address in DTR mode

[Jon Humphreys]

Manorit Chawdhry  writes:

> From: Pratyush Yadav 
>
> On DTR capable flashes like Micron Xcella the writes cannot start or end
> at an odd address in DTR mode. Extra 0xff bytes need to be prepended or
> appended respectively to make sure both the start and end addresses are
> even.
>
> Signed-off-by: Pratyush Yadav 
> Reviewed-by: Vignesh Raghavendra 
> Signed-off-by: Apurva Nandan 
> Signed-off-by: Vignesh Raghavendra 
> Signed-off-by: Manorit Chawdhry 
> ---
>  drivers/mtd/spi/spi-nor-core.c | 59 
> +++---
>  1 file changed, 55 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
> index f86003ca8c06..2b000151c97d 100644
> --- a/drivers/mtd/spi/spi-nor-core.c
> +++ b/drivers/mtd/spi/spi-nor-core.c
> @@ -1805,11 +1805,62 @@ static int spi_nor_write(struct mtd_info *mtd, loff_t 
> to, size_t len,
>   if (ret < 0)
>   return ret;
>  #endif
> +
>   write_enable(nor);
> - ret = nor->write(nor, addr, page_remain, buf + i);
> - if (ret < 0)
> - goto write_err;
> - written = ret;
> +
> + /*
> +  * On DTR capable flashes like Micron Xcella the writes cannot
> +  * start or end at an odd address in DTR mode. So we need to
> +  * append or prepend extra 0xff bytes to make sure the start
> +  * address and end address are even.
> +  */
> + if (spi_nor_protocol_is_dtr(nor->write_proto) &&
> + ((addr | page_remain) & 1)) {
> + u_char *tmp;
> + size_t extra_bytes = 0;
> +
> + tmp = kmalloc(nor->page_size, 0);
> + if (!tmp) {
> + ret = -ENOMEM;
> + goto write_err;
> + }
> +
> + /* Prepend a 0xff byte if the start address is odd. */
> + if (addr & 1) {
> + tmp[0] = 0xff;
> + memcpy(tmp + 1, buf + i, page_remain);
> + addr--;
> + page_remain++;
> + extra_bytes++;
> + } else {
> + memcpy(tmp, buf + i, page_remain);
> + }
> +
> + /* Append a 0xff byte if the end address is odd. */
> + if ((addr + page_remain) & 1) {
> + tmp[page_remain + extra_bytes] = 0xff;
> + extra_bytes++;
> + page_remain++;
> + }
> +
> + ret = nor->write(nor, addr, page_remain, tmp);
> +
> + kfree(tmp);
> +
> + if (ret < 0)
> + goto write_err;
> +
> + /*
> +  * We write extra bytes but they are not part of the
> +  * original write.
> +  */
> + written = ret - extra_bytes;
> + } else {
> + ret = nor->write(nor, addr, page_remain, buf + i);
> + if (ret < 0)
> + goto write_err;
> + written = ret;
> + }
>  
>   ret = spi_nor_wait_till_ready(nor);
>   if (ret)
>
> -- 
> 2.43.2

Thanks for upstreaming!

Tested-by: Jonathan Humphreys 

Re: [PATCH v2] mx6cuboxi: Fix Ethernet after DT sync with Linux

[Christian Gmeiner]

Hi Fabio

> From: Josua Mayer 
> 
> The i.MX6 Cubox-i and HummingBoards can have different PHYs at varying
> addresses. U-Boot needs to auto-detect which phy is actually present,
> and at which address it is responding.
> 
> Auto-detection from multiple phy nodes specified in device-tree does not
> currently work correct. As a work-around merge all three possible phys
> into one node with the special address 0x which indicates to the
> generic phy driver to probe all addresses.
> 
> Signed-off-by: Josua Mayer 
> [fabio: Added the changes to imx6qdl-sr-som-u-boot.dtsi.]
> Signed-off-by: Fabio Estevam 
> Tested-by: Christian Gmeiner 
> ---
> Changes since v1:
> - Disable ethernet-phy at addresses 0, 1 and 4.
> - Remove the fixup of the fake 0xff address before booting Linux.
> 
> Josua and Christian,
> 
> I got access to a imx6 humming board and I was able to test it.
> 
> This is the minimal fix I came up based on your suggestions.
> 
> There is no need to fixup of the fake 0xff address before booting Linux,
> as this fake address does not exist in Linux.
> 
> Successfully tested Ethernet in U-Boot and in the kernel.
> 
> Given that Ethernet is currently broken, I suggest we go with this
> version to restore Ethernet for 2024.04.
> 
> What do you think?
> 

I am happy with the patch and love the idea to fix Ethernet for 2024.04.

Tested-by: Christian Gmeiner 

Thanks & Regards,
Christian

Re: [PATCH v2] mx6cuboxi: Do not print devicetree model

[Christian Gmeiner]

Hi Fabio

> The mx6cuboxi_defconfig target supports several board
> variants. All of these variants use the hummingboard devicetree in U-Boot.
> 
> Currently, the devicetree model as well as the board variant name
> are shown:
> 
> ...
> Model: SolidRun HummingBoard2 Dual/Quad (1.5som+emmc)
> Board: MX6 Cubox-i
> ...
> 
> Printing the devicetree model that is used internally by U-Boot
> may confuse users.
> 
> Unselect the CONFIG_DISPLAY_BOARDINFO option so that only the
> board name is printed in board_late_init() instead.
> 
> Signed-off-by: Fabio Estevam 
> ---

U-Boot 2024.04-rc5-3-g5565c24adb (Apr 01 2024 - 12:05:25 +0200)

CPU:   Freescale i.MX6Q rev1.3 996 MHz (running at 792 MHz)
CPU:   Extended Commercial temperature grade (-20C to 105C) at 26C
Reset cause: POR
DRAM:  2 GiB
Core:  84 devices, 19 uclasses, devicetree: fit
WDT:   Started watchdog@20bc000 with servicing every 1000ms (128s
timeout)
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... *** Warning - bad CRC, using default
environment

In:serial
Out:   serial
Err:   serial
Board: MX6 Cubox-i
Net:   eth0: ethernet@2188000


Tested-by: Christian Gmeiner 

Thanks & Regards,
Christian

[PATCH] board: rockchip: Add Indiedroid Nova

[Chris Morgan]

From: Chris Morgan 

The Indiedroid Nova is a Rockchip RK3588S based SBC from Indiedroid.

Specifications:

Rockchip RK3588S SoC
4x ARM Cortex-A76, 4x ARM Cortex-A55
4/8/16GB memory LPDDR4x
Mali G610MC4 GPU
Optional eMMC
2x USB 2.0, 2x USB 3.0, 1x USB 3.0 C port with DP Alt
1x MIPI-CSI Port (4-lane or 2x 2-lane)
1x MIPI-DSI 4-lane connector
1x Micro HDMI 2.1 output, 1x DP 1.4 output
Gigabit Ethernet
Realtek RTL8821CS WiFi
4 pin debug UART connector
40 pin GPIO header
Size: 85mm x 56mm (Raspberry Pi Form Factor)

Kernel commit:
3900160e164b ("arm64: dts: rockchip: Add Indiedroid Nova board")

Signed-off-by: Chris Morgan 
---
 arch/arm/dts/Makefile |   1 +
 .../dts/rk3588s-indiedroid-nova-u-boot.dtsi   |  11 +
 arch/arm/dts/rk3588s-indiedroid-nova.dts  | 853 ++
 arch/arm/mach-rockchip/rk3588/Kconfig |   7 +
 board/indiedroid/nova/Kconfig |  15 +
 board/indiedroid/nova/MAINTAINERS |   8 +
 configs/indiedroid-nova-rk3588s_defconfig | 106 +++
 include/configs/indiedroid-nova.h |  15 +
 8 files changed, 1016 insertions(+)
 create mode 100644 arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi
 create mode 100644 arch/arm/dts/rk3588s-indiedroid-nova.dts
 create mode 100644 board/indiedroid/nova/Kconfig
 create mode 100644 board/indiedroid/nova/MAINTAINERS
 create mode 100644 configs/indiedroid-nova-rk3588s_defconfig
 create mode 100644 include/configs/indiedroid-nova.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b102ffb5f6..0af2986610 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -194,6 +194,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \
rk3588-edgeble-neu6a-io.dtb \
rk3588-edgeble-neu6b-io.dtb \
rk3588-evb1-v10.dtb \
+   rk3588s-indiedroid-nova.dtb \
rk3588-nanopc-t6.dtb \
rk3588s-orangepi-5.dtb \
rk3588-orangepi-5-plus.dtb \
diff --git a/arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi 
b/arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi
new file mode 100644
index 00..16ded31fa5
--- /dev/null
+++ b/arch/arm/dts/rk3588s-indiedroid-nova-u-boot.dtsi
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Collabora Ltd.
+ */
+
+#include "rk3588-u-boot.dtsi"
+#include 
+
+ {
+   status = "okay";
+};
diff --git a/arch/arm/dts/rk3588s-indiedroid-nova.dts 
b/arch/arm/dts/rk3588s-indiedroid-nova.dts
new file mode 100644
index 00..253f163960
--- /dev/null
+++ b/arch/arm/dts/rk3588s-indiedroid-nova.dts
@@ -0,0 +1,853 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include 
+#include 
+#include 
+#include 
+#include "rk3588s.dtsi"
+
+/ {
+   model = "Indiedroid Nova";
+   compatible = "indiedroid,nova", "rockchip,rk3588s";
+
+   adc-keys-0 {
+   compatible = "adc-keys";
+   io-channel-names = "buttons";
+   io-channels = < 0>;
+   keyup-threshold-microvolt = <180>;
+   poll-interval = <100>;
+
+   button-boot {
+   label = "boot";
+   linux,code = ;
+   press-threshold-microvolt = <18000>;
+   };
+   };
+
+   adc-keys-1 {
+   compatible = "adc-keys";
+   io-channel-names = "buttons";
+   io-channels = < 1>;
+   keyup-threshold-microvolt = <180>;
+   poll-interval = <100>;
+
+   button-recovery {
+   label = "recovery";
+   linux,code = ;
+   press-threshold-microvolt = <18000>;
+   };
+   };
+
+   aliases {
+   mmc0 = 
+   mmc1 = 
+   mmc2 = 
+   };
+
+   chosen {
+   stdout-path = "serial2:150n8";
+   };
+
+   sdio_pwrseq: sdio-pwrseq {
+   compatible = "mmc-pwrseq-simple";
+   clock-names = "ext_clock";
+   clocks = <_hym8563>;
+   pinctrl-0 = <_enable_h>;
+   pinctrl-names = "default";
+   post-power-on-delay-ms = <200>;
+   reset-gpios = < RK_PC7 GPIO_ACTIVE_LOW>;
+   };
+
+   sound {
+   compatible = "audio-graph-card";
+   label = "rockchip,es8388-codec";
+   widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+   routing = "LINPUT2", "Mic Jack",
+ "Headphones", "LOUT1",
+ "Headphones", "ROUT1";
+   dais = <_8ch_p0>;
+   };
+
+   vbus5v0_typec: vbus5v0-typec-regulator {
+   compatible = "regulator-fixed";
+   enable-active-high;
+   gpio = < RK_PA5 GPIO_ACTIVE_HIGH>;
+   pinctrl-0 = <_pwren>;
+   pinctrl-names = "default";
+  

[V2 PATCH 2/2] rockchip: Switch RK3568 and RK3588 to new RAM bank logic

[Chris Morgan]

From: Chris Morgan 

Switch all RK3568 and RK3588 boards to use the ATAGS based RAM bank
logic. This allows us to access all RAM when >= 4GB of RAM is available
while also automatically creating the memory holes when >= 16GB of RAM
is available.

Remove the board specific logic that previously created the memory
holes, and update the CONFIG_NR_DRAM_BANKS to 10 which is the maximum
supported number of banks using the ATAGS method. Only the number of
banks found by the RAM init code will get added.

Signed-off-by: Chris Morgan 
---
 board/friendlyelec/nanopc-t6-rk3588/Makefile  |  6 ---
 .../nanopc-t6-rk3588/nanopc-t6-rk3588.c   | 39 ---
 board/pine64/quartzpro64-rk3588/Makefile  |  3 --
 .../quartzpro64-rk3588/quartzpro64-rk3588.c   | 39 ---
 board/radxa/rock5a-rk3588s/Makefile   |  6 ---
 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c   | 39 ---
 board/radxa/rock5b-rk3588/Makefile|  6 ---
 board/radxa/rock5b-rk3588/rock5b-rk3588.c | 39 ---
 board/rockchip/evb_rk3588/Makefile|  6 ---
 board/rockchip/evb_rk3588/evb-rk3588.c| 39 ---
 board/turing/turing-rk1-rk3588/Makefile   |  6 ---
 .../turing-rk1-rk3588/turing-rk1-rk3588.c | 39 ---
 configs/anbernic-rgxx3-rk3566_defconfig   |  2 +-
 configs/bpi-r2-pro-rk3568_defconfig   |  2 +-
 configs/evb-rk3568_defconfig  |  2 +-
 configs/evb-rk3588_defconfig  |  3 +-
 configs/generic-rk3568_defconfig  |  2 +-
 configs/lubancat-2-rk3568_defconfig   |  2 +-
 configs/nanopc-t6-rk3588_defconfig|  3 +-
 configs/nanopi-r5c-rk3568_defconfig   |  2 +-
 configs/nanopi-r5s-rk3568_defconfig   |  2 +-
 configs/neu6a-io-rk3588_defconfig |  2 +-
 configs/neu6b-io-rk3588_defconfig |  2 +-
 configs/odroid-m1-rk3568_defconfig|  2 +-
 configs/orangepi-5-plus-rk3588_defconfig  |  3 +-
 configs/orangepi-5-rk3588s_defconfig  |  3 +-
 configs/quartz64-a-rk3566_defconfig   |  2 +-
 configs/quartz64-b-rk3566_defconfig   |  2 +-
 configs/quartzpro64-rk3588_defconfig  |  3 +-
 configs/radxa-cm3-io-rk3566_defconfig |  2 +-
 configs/radxa-e25-rk3568_defconfig|  2 +-
 configs/rock-3a-rk3568_defconfig  |  2 +-
 configs/rock5a-rk3588s_defconfig  |  3 +-
 configs/rock5b-rk3588_defconfig   |  3 +-
 configs/soquartz-blade-rk3566_defconfig   |  2 +-
 configs/soquartz-cm4-rk3566_defconfig |  2 +-
 configs/soquartz-model-a-rk3566_defconfig |  2 +-
 configs/turing-rk1-rk3588_defconfig   |  3 +-
 38 files changed, 26 insertions(+), 301 deletions(-)
 delete mode 100644 board/friendlyelec/nanopc-t6-rk3588/Makefile
 delete mode 100644 board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
 delete mode 100644 board/pine64/quartzpro64-rk3588/Makefile
 delete mode 100644 board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
 delete mode 100644 board/radxa/rock5a-rk3588s/Makefile
 delete mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
 delete mode 100644 board/radxa/rock5b-rk3588/Makefile
 delete mode 100644 board/radxa/rock5b-rk3588/rock5b-rk3588.c
 delete mode 100644 board/rockchip/evb_rk3588/Makefile
 delete mode 100644 board/rockchip/evb_rk3588/evb-rk3588.c
 delete mode 100644 board/turing/turing-rk1-rk3588/Makefile
 delete mode 100644 board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c

diff --git a/board/friendlyelec/nanopc-t6-rk3588/Makefile 
b/board/friendlyelec/nanopc-t6-rk3588/Makefile
deleted file mode 100644
index c1c49b1970..00
--- a/board/friendlyelec/nanopc-t6-rk3588/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
-#
-
-obj-y += nanopc-t6-rk3588.o
diff --git a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c 
b/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
deleted file mode 100644
index 99bbef964e..00
--- a/board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2023 Rockchip Electronics Co,. Ltd.
- */
-
-#include 
-#include 
-
-#ifdef CONFIG_OF_BOARD_SETUP
-int nanopc_t6_add_reserved_memory_fdt_nodes(void *new_blob)
-{
-   struct fdt_memory gap1 = {
-   .start = 0x3fc00,
-   .end = 0x3fc4f,
-   };
-   struct fdt_memory gap2 = {
-   .start = 0x3fff0,
-   .end = 0x3,
-   };
-   unsigned long flags = FDTDEC_RESERVED_MEMORY_NO_MAP;
-   unsigned int ret;
-
-   /*
-* Inject the reserved-memory nodes into the DTS
-*/
-   ret = fdtdec_add_reserved_memory(new_blob, "gap1", ,  NULL, 0,
-NULL, flags);
-   if (ret)
-   return ret;
-
-   

[V1 PATCH 1/2] rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588

[Chris Morgan]

From: Chris Morgan 

Allow RK3568 and RK3588 based boards to get the RAM bank configuration
from the ROCKCHIP_TPL stage instead of the current logic. This fixes
both an issue where 256MB of RAM is blocked for devices with >= 4GB
of RAM and where memory holes need to be defined for devices with
>= 16GB of RAM. In the event that neither SOC is used and the
ROCKCHIP_TPL stage is not used, fall back to existing logic.

Signed-off-by: Chris Morgan 
---
 arch/arm/mach-rockchip/sdram.c | 100 +
 1 file changed, 100 insertions(+)

diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
index 0d9a0aef6f..e02fb03c5f 100644
--- a/arch/arm/mach-rockchip/sdram.c
+++ b/arch/arm/mach-rockchip/sdram.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -35,11 +36,110 @@ struct tos_parameter_t {
s64 reserve[8];
 };
 
+/* Tag magic */
+#define ATAGS_CORE_MAGIC   0x54410001
+#define ATAGS_DDR_MEM_MAGIC0x54410052
+
+/* Tag size and offset */
+#define ATAGS_SIZE SZ_8K
+#define ATAGS_OFFSET   (SZ_2M - ATAGS_SIZE)
+#define ATAGS_PHYS_BASE(CFG_SYS_SDRAM_BASE + ATAGS_OFFSET)
+
+/* ATAGS memory structure. */
+struct tag_ddr_mem {
+   u32 count;
+   u32 version;
+   u64 bank[20];
+   u32 flags;
+   u32 data[2];
+   u32 hash;
+} __packed;
+
+/**
+ * rockchip_dram_init_banksize() - Get RAM banks from Rockchip TPL
+ *
+ * Iterate through the defined ATAGS memory location to first find a
+ * valid core header, then find a valid ddr_info header. Sanity check
+ * the number of banks found. Then, iterate through the data to add
+ * each individual memory bank. Perform fixups on memory banks that
+ * overlap with a reserved space. If an error condition is received,
+ * it is expected that memory bank setup will fall back on existing
+ * logic. If ROCKCHIP_EXTERNAL_TPL is false then immediately return,
+ * and if neither ROCKCHIP_RK3588 or ROCKCHIP_RK3568 is enabled
+ * immediately return.
+ *
+ * Return number of banks found on success or negative on error.
+ */
+__weak int rockchip_dram_init_banksize(void)
+{
+   struct tag_ddr_mem *ddr_info;
+   size_t val;
+   size_t addr = ATAGS_PHYS_BASE;
+   int i;
+
+   if (!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL))
+   return 0;
+   if (!IS_ENABLED(CONFIG_ROCKCHIP_RK3588) &&
+   !IS_ENABLED(CONFIG_ROCKCHIP_RK3568))
+   return 0;
+
+   if (!IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL))
+   return -EPERM;
+
+   while (addr < (ATAGS_PHYS_BASE + ATAGS_SIZE)) {
+   val = readl(addr);
+   if (val == ATAGS_CORE_MAGIC)
+   break;
+   addr += 4;
+   }
+   if (addr >= (ATAGS_PHYS_BASE + ATAGS_SIZE))
+   return -ENODATA;
+
+   while (addr < (ATAGS_PHYS_BASE + ATAGS_SIZE)) {
+   val = readl(addr);
+   if (val == ATAGS_DDR_MEM_MAGIC)
+   break;
+   addr += 4;
+   }
+   if (addr >= (ATAGS_PHYS_BASE + ATAGS_SIZE))
+   return -ENODATA;
+
+   ddr_info = (void *)addr + 4;
+   if (!ddr_info->count || ddr_info->count > CONFIG_NR_DRAM_BANKS)
+   return -ENODATA;
+
+   for (i = 0; i < (ddr_info->count); i++) {
+   size_t start_addr = ddr_info->bank[i];
+   size_t size = ddr_info->bank[(i + ddr_info->count)];
+   size_t tmp;
+
+   if (start_addr < SZ_2M) {
+   tmp = SZ_2M - start_addr;
+   start_addr = SZ_2M;
+   size = size - tmp;
+   }
+
+   if (start_addr >= SDRAM_MAX_SIZE && start_addr < SZ_4G)
+   start_addr = SZ_4G;
+
+   tmp = start_addr + size;
+   if (tmp > SDRAM_MAX_SIZE && tmp < SZ_4G)
+   size = SDRAM_MAX_SIZE - start_addr;
+
+   gd->bd->bi_dram[i].start = start_addr;
+   gd->bd->bi_dram[i].size = size;
+   }
+
+   return i;
+}
+
 int dram_init_banksize(void)
 {
size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE);
size_t top = min((unsigned long)ram_top, (unsigned long)(gd->ram_top));
 
+   if (rockchip_dram_init_banksize() > 0)
+   return 0;
 #ifdef CONFIG_ARM64
/* Reserve 0x20 for ATF bl31 */
gd->bd->bi_dram[0].start = 0x20;
-- 
2.34.1

[V2 PATCH 0/2] Update RAM Bank Logic for RK3568/RK3588

[Chris Morgan]

From: Chris Morgan 

Use the ATAG info provided by the Rockchip binary TPL to identify
RAM banks on the RK3568 and RK3588 when using the ROCKCHIP_TPL binary.

This is needed because there are specific addresses that should not
be written to for all RK3588 based devices with >=16GB of RAM, writing
to these addresses immediately results in a crash. Additionally on the
RK3568 and RK3588 this allows us to reclaim 256MB of RAM when RAM >=
4GB.

Changes since V1:
 - After additional feedback, removed RFC tag.
 - Made code work for both RK3568 and RK3588.
 - Removed memory hole code for all RK3588 boards.
 - Updated CONFIG_NR_DRAM_BANKS for 3568 and 3588 boards as it is
   the max number of banks supported by the ATAGS code.

Chris Morgan (2):
  rockchip: sdram: Support getting banks from TPL for rk3568 and rk3588
  rockchip: Switch RK3568 and RK3588 to new RAM bank logic

 arch/arm/mach-rockchip/sdram.c| 100 ++
 board/friendlyelec/nanopc-t6-rk3588/Makefile  |   6 --
 .../nanopc-t6-rk3588/nanopc-t6-rk3588.c   |  39 ---
 board/pine64/quartzpro64-rk3588/Makefile  |   3 -
 .../quartzpro64-rk3588/quartzpro64-rk3588.c   |  39 ---
 board/radxa/rock5a-rk3588s/Makefile   |   6 --
 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c   |  39 ---
 board/radxa/rock5b-rk3588/Makefile|   6 --
 board/radxa/rock5b-rk3588/rock5b-rk3588.c |  39 ---
 board/rockchip/evb_rk3588/Makefile|   6 --
 board/rockchip/evb_rk3588/evb-rk3588.c|  39 ---
 board/turing/turing-rk1-rk3588/Makefile   |   6 --
 .../turing-rk1-rk3588/turing-rk1-rk3588.c |  39 ---
 configs/anbernic-rgxx3-rk3566_defconfig   |   2 +-
 configs/bpi-r2-pro-rk3568_defconfig   |   2 +-
 configs/evb-rk3568_defconfig  |   2 +-
 configs/evb-rk3588_defconfig  |   3 +-
 configs/generic-rk3568_defconfig  |   2 +-
 configs/lubancat-2-rk3568_defconfig   |   2 +-
 configs/nanopc-t6-rk3588_defconfig|   3 +-
 configs/nanopi-r5c-rk3568_defconfig   |   2 +-
 configs/nanopi-r5s-rk3568_defconfig   |   2 +-
 configs/neu6a-io-rk3588_defconfig |   2 +-
 configs/neu6b-io-rk3588_defconfig |   2 +-
 configs/odroid-m1-rk3568_defconfig|   2 +-
 configs/orangepi-5-plus-rk3588_defconfig  |   3 +-
 configs/orangepi-5-rk3588s_defconfig  |   3 +-
 configs/quartz64-a-rk3566_defconfig   |   2 +-
 configs/quartz64-b-rk3566_defconfig   |   2 +-
 configs/quartzpro64-rk3588_defconfig  |   3 +-
 configs/radxa-cm3-io-rk3566_defconfig |   2 +-
 configs/radxa-e25-rk3568_defconfig|   2 +-
 configs/rock-3a-rk3568_defconfig  |   2 +-
 configs/rock5a-rk3588s_defconfig  |   3 +-
 configs/rock5b-rk3588_defconfig   |   3 +-
 configs/soquartz-blade-rk3566_defconfig   |   2 +-
 configs/soquartz-cm4-rk3566_defconfig |   2 +-
 configs/soquartz-model-a-rk3566_defconfig |   2 +-
 configs/turing-rk1-rk3588_defconfig   |   3 +-
 39 files changed, 126 insertions(+), 301 deletions(-)
 delete mode 100644 board/friendlyelec/nanopc-t6-rk3588/Makefile
 delete mode 100644 board/friendlyelec/nanopc-t6-rk3588/nanopc-t6-rk3588.c
 delete mode 100644 board/pine64/quartzpro64-rk3588/Makefile
 delete mode 100644 board/pine64/quartzpro64-rk3588/quartzpro64-rk3588.c
 delete mode 100644 board/radxa/rock5a-rk3588s/Makefile
 delete mode 100644 board/radxa/rock5a-rk3588s/rock5a-rk3588s.c
 delete mode 100644 board/radxa/rock5b-rk3588/Makefile
 delete mode 100644 board/radxa/rock5b-rk3588/rock5b-rk3588.c
 delete mode 100644 board/rockchip/evb_rk3588/Makefile
 delete mode 100644 board/rockchip/evb_rk3588/evb-rk3588.c
 delete mode 100644 board/turing/turing-rk1-rk3588/Makefile
 delete mode 100644 board/turing/turing-rk1-rk3588/turing-rk1-rk3588.c

-- 
2.34.1

Re: [PATCH 2/4] arch: arm: dts: k3-j721s2-r5: Override ospi and fss for 32-bit mode

[Apurva Nandan]

On 01/04/24 11:16, Manorit Chawdhry wrote:

R5 being a 32-bit processor can't understand the 64-bit mapping being
done in ospi node. Override the ospi node for 32-bit register ranges and
the fss node ( the parent node of ospi ) to map the ranges for the
updated child node correctly.

Signed-off-by: Manorit Chawdhry 
---
  arch/arm/dts/k3-j721s2-r5-common-proc-board.dts | 13 +
  1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts 
b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index 03bd680f4421..5c4b34915ccf 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -86,3 +86,16 @@
  _udmap {
ti,sci = <_tifs>;
  };
+
+ {
+   reg = <0x0 0x4704 0x0 0x100>,
+ <0x0 0x5000 0x0 0x800>;
+};
+
+ {
+   /* fss node has 64 bit address regions mapped to it and since the ospi
+* nodes is being override, override the fss node ranges as well
+*/
+   ranges = <0x0 0x4700 0x0 0x4700 0x0 0x00068400>,
+<0x0 0x5000 0x0 0x5000 0x0 0x0800>;
+};



Reviewed-by: Apurva Nandan 

--
Thanks and regards,
Apurva Nandan,
Texas Instruments India.

Re: [PATCH 3/4] arch: arm: dts: k3-j721s2-*-u-boot.dtsi: Enable the ospi0 node

[Apurva Nandan]

On 01/04/24 11:16, Manorit Chawdhry wrote:

Enable ospi0 node for all boot stages

Signed-off-by: Manorit Chawdhry 
---
  arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi 
b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index a3ebf5996eac..132cd5a456ba 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -110,7 +110,9 @@
  };
  
   {

-   status = "disabled";
+   flash@0 {
+   bootph-all;
+   };
  };
  
   {



Reviewed-by: Apurva Nandan 

--
Thanks and regards,
Apurva Nandan,
Texas Instruments India.

Re: [PATCH 4/4] configs: j721s2_evm_*_defconfig: Enable OSPI configs

[Apurva Nandan]

On 01/04/24 11:16, Manorit Chawdhry wrote:

Enable OSPI related configs to boot using OSPI

Signed-off-by: Manorit Chawdhry 
---
  configs/j721s2_evm_a72_defconfig | 3 +++
  configs/j721s2_evm_r5_defconfig  | 3 +++
  2 files changed, 6 insertions(+)

diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig
index 92f69413fa40..6e7e161fa359 100644
--- a/configs/j721s2_evm_a72_defconfig
+++ b/configs/j721s2_evm_a72_defconfig
@@ -50,6 +50,7 @@ CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img"
  CONFIG_SPL_I2C=y
  CONFIG_SPL_DM_MAILBOX=y
  CONFIG_SPL_MTD=y
+CONFIG_SPL_MTD_SUPPORT=y
  CONFIG_SPL_DM_SPI_FLASH=y
  CONFIG_SPL_NOR_SUPPORT=y
  CONFIG_SPL_DM_RESET=y
@@ -58,6 +59,8 @@ CONFIG_SPL_RAM_SUPPORT=y
  CONFIG_SPL_RAM_DEVICE=y
  # CONFIG_SPL_SPI_FLASH_TINY is not set
  CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=2500
  CONFIG_SPL_SPI_LOAD=y
  CONFIG_SYS_SPI_U_BOOT_OFFS=0x28
  CONFIG_SPL_THERMAL=y
diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig
index cb6b4a44864f..197b3284c12d 100644
--- a/configs/j721s2_evm_r5_defconfig
+++ b/configs/j721s2_evm_r5_defconfig
@@ -57,6 +57,7 @@ CONFIG_SPL_FS_EXT4=y
  CONFIG_SPL_I2C=y
  CONFIG_SPL_DM_MAILBOX=y
  CONFIG_SPL_MTD=y
+CONFIG_SPL_MTD_SUPPORT=y
  CONFIG_SPL_DM_SPI_FLASH=y
  CONFIG_SPL_NOR_SUPPORT=y
  CONFIG_SPL_DM_RESET=y
@@ -66,6 +67,8 @@ CONFIG_SPL_RAM_DEVICE=y
  CONFIG_SPL_REMOTEPROC=y
  # CONFIG_SPL_SPI_FLASH_TINY is not set
  CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
+CONFIG_SF_DEFAULT_MODE=0
+CONFIG_SF_DEFAULT_SPEED=2500
  CONFIG_SPL_SPI_LOAD=y
  CONFIG_SYS_SPI_U_BOOT_OFFS=0x8
  CONFIG_SPL_THERMAL=y



Reviewed-by: Apurva Nandan 

--
Thanks and regards,
Apurva Nandan,
Texas Instruments India.

Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL

[Wadim Egorov]

Am 01.04.24 um 16:46 schrieb Bryan Brattlof:

On April  1, 2024 thus sayeth Wadim Egorov:

Hi Vignesh, Hi Bryan,


Am 05.03.24 um 18:36 schrieb Raghavendra, Vignesh:



On 3/5/2024 11:04 PM, Bryan Brattlof wrote:

On March  5, 2024 thus sayeth Vignesh Raghavendra:


On 05/03/24 01:57, Bryan Brattlof wrote:

Hey Vignesh!

On March  4, 2024 thus sayeth Vignesh Raghavendra:

Hi Wadim,

On 26/02/24 19:00, Wadim Egorov wrote:

Texas Instruments has begun enabling security settings on the SoCs it
produces to instruct ROM and TIFS to begin protecting the Security
Management Subsystem (SMS) from other binaries we load into the chip by
default.

One way ROM and TIFS do this is by enabling firewalls to protect the
OCSRAM and HSM RAM regions they're using during bootup.

The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
itself from the main domain applications. This means the 'bootindex'
value in HSM RAM, left by ROM to indicate if we're using the primary
or secondary boot-method, must be moved to OCSRAM (that TIFS has open
for us) before we make the jump to the main domain so the main domain's
bootloaders can keep access to this information.

Based on commit
b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main domain SPL")


I was thinking, even if the reason described here is not right or does not
apply to the am62x, it is still a valid solution for carrying this variable
into the context for next stage A53 bootloader.

store_boot_info_from_rom() stores the index to the bootindex (.data)
variable which makes sure it is valid in R5 SPL context. But the next stage
bootloader does not know anything about the bootindex variable. So from my
understanding it needs to be copied to a different region to preserve the
data for next stage bootloaders.

Or do I miss something?


That's correct. We typically put this bootindex variable in the same
location for both SPLs.


So basically the patch can stay almost as is, but maybe the misleading 
comments in am62_hardware.h should be removed.





~Bryan




FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
example) where HSM RAM would be used by HSM firmware. This should be a
issue in R5 SPL flow.  Do you see any issues today? If so, whats the
TIFS firmware being used?


Signed-off-by: Wadim Egorov 
---
   arch/arm/mach-k3/Kconfig  |  3 ++-
   arch/arm/mach-k3/am625_init.c | 15 +--
   arch/arm/mach-k3/include/mach/am62_hardware.h | 15 +++
   3 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 03898424c9..f5d06593f7 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x41cffbfc if SOC_K3_J721E
default 0x41cfdbfc if SOC_K3_J721S2
default 0x701bebfc if SOC_K3_AM642
-   default 0x43c3f290 if SOC_K3_AM625
+   default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
+   default 0x7000f290 if SOC_K3_AM625 && ARM64
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
help
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 6c96e88114..67cf63b103 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata 
__section(".data");
   static void store_boot_info_from_rom(void)
   {
bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
-   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
-  sizeof(struct rom_extended_boot_data));
+   if (IS_ENABLED(CONFIG_CPU_V7R)) {
+   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+  sizeof(struct rom_extended_boot_data));
+   }
   }
   static void ctrl_mmr_unlock(void)
@@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
k3_sysfw_loader(true, NULL, NULL);
}
+#if defined(CONFIG_CPU_V7R)
+   /*
+* Relocate boot information to OCRAM (after TIFS has opend this
+* region for us) so the next bootloader stages can keep access to
+* primary vs backup bootmodes.
+*/
+   writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
+#endif
+
/*
 * Force probe of clk_k3 driver here to ensure basic default clock
 * configuration is always done.
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h 
b/arch/arm/mach-k3/include/mach/am62_hardware.h
index 54380f36e1..9f504f4642 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -76,8 +76,23 @@
   #define CTRLMMR_MCU_RST_CTRL (MCU_CTRL_MMR0_BASE + 0x18170)
   #define ROM_EXTENDED_BOOT_DATA_INFO  0x43c3f1e0
+#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
+/*
+ * During the boot process ROM will kill anything that 

Re: [PATCH v2 4/6] board: starfive: support Milk-V Mars board

[Heinrich Schuchardt]

On 4/1/24 17:28, Aurelien Jarno wrote:

On 2024-03-28 17:01, Heinrich Schuchardt wrote:

On 24.03.24 16:00, Aurelien Jarno wrote:

On 2024-03-21 19:11, Heinrich Schuchardt wrote:

The differences between the Milk-V Mars board and the VisionFive 2 board
are small enough that we can support both using the same U-Boot build.

* The model and compatible property are taken from proposed Linux patches.
* The EEPROM is atmel,24c02 according to the vendor U-Boot.
* The second Ethernet port is not available.


  From the device tree that have been submitted to the kernel [1] it seems
another difference is that there is a CD gpio for mmc1.


Thank you for reviewing.

On all of Milk-V Mars, VisionFive 2 1.2B, and 1.3A I see GPIO 41 level
changing when removing or inserting an SD card using U-Boot command 'gpio
status -a'. So this seems not to be Milk-V specific.

Could you, please, check.


This already have been answered by others, thanks.


  From the schematics, it also seems that the usb0 port is not in
peripheral mode, but in host mode. That said on the submitted kernel
device tree it seems simply disabled.


All three blue-colored USB 3.0 ports are able to read an SD-card in U-Boot.

The black port provides 5V but I could not make it work.

On the schema I found:

USB20: Do not support OTG mode and AVSS_USB0-AVSS_USB2 attached to ground.

Could you, please, specify which node in the device-tree you want to
disable. I cannot see anything disabled for usb@1010 and usb@0 in the
kernel device-tree.


Disclaimer, I have no such board, but I remember people on IRC trying to
use the device tree from the VF2 on a Milk-V Mars and getting an error
with the USB being in a wrong mode.

The difference I have noticed is not a node but the dr_mode property:

 {
 dr_mode = "peripheral";
 status = "okay";
};


Thanks Aurelien for the explanation.

The node usb@1010 (aka usb0) does not exist in the U-Boot 
VisionFive2 device-tree, yet. There isn't any dr_mode property either.


We will have to consider this node once we merge the Linux device-tree.

Best regards

Heinrich



This does not appear on the patches submitted on the Linux side for the MilkV
Mars.

Aurelien

Re: [PATCH v2 4/6] board: starfive: support Milk-V Mars board

[Aurelien Jarno]

On 2024-03-28 17:01, Heinrich Schuchardt wrote:
> On 24.03.24 16:00, Aurelien Jarno wrote:
> > On 2024-03-21 19:11, Heinrich Schuchardt wrote:
> > > The differences between the Milk-V Mars board and the VisionFive 2 board
> > > are small enough that we can support both using the same U-Boot build.
> > > 
> > > * The model and compatible property are taken from proposed Linux patches.
> > > * The EEPROM is atmel,24c02 according to the vendor U-Boot.
> > > * The second Ethernet port is not available.
> > 
> >  From the device tree that have been submitted to the kernel [1] it seems
> > another difference is that there is a CD gpio for mmc1.
> 
> Thank you for reviewing.
> 
> On all of Milk-V Mars, VisionFive 2 1.2B, and 1.3A I see GPIO 41 level
> changing when removing or inserting an SD card using U-Boot command 'gpio
> status -a'. So this seems not to be Milk-V specific.
> 
> Could you, please, check.

This already have been answered by others, thanks.

> >  From the schematics, it also seems that the usb0 port is not in
> > peripheral mode, but in host mode. That said on the submitted kernel
> > device tree it seems simply disabled.
> 
> All three blue-colored USB 3.0 ports are able to read an SD-card in U-Boot.
> 
> The black port provides 5V but I could not make it work.
> 
> On the schema I found:
> 
> USB20: Do not support OTG mode and AVSS_USB0-AVSS_USB2 attached to ground.
> 
> Could you, please, specify which node in the device-tree you want to
> disable. I cannot see anything disabled for usb@1010 and usb@0 in the
> kernel device-tree.

Disclaimer, I have no such board, but I remember people on IRC trying to
use the device tree from the VF2 on a Milk-V Mars and getting an error
with the USB being in a wrong mode.

The difference I have noticed is not a node but the dr_mode property:

 { 
dr_mode = "peripheral";
status = "okay";
};

This does not appear on the patches submitted on the Linux side for the MilkV
Mars.

Aurelien

-- 
Aurelien Jarno  GPG: 4096R/1DDD8C9B
aurel...@aurel32.net http://aurel32.net

Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL

[Bryan Brattlof]

On April  1, 2024 thus sayeth Wadim Egorov:
> Hi Vignesh, Hi Bryan,
> 
> 
> Am 05.03.24 um 18:36 schrieb Raghavendra, Vignesh:
> > 
> > 
> > On 3/5/2024 11:04 PM, Bryan Brattlof wrote:
> > > On March  5, 2024 thus sayeth Vignesh Raghavendra:
> > > > 
> > > > On 05/03/24 01:57, Bryan Brattlof wrote:
> > > > > Hey Vignesh!
> > > > > 
> > > > > On March  4, 2024 thus sayeth Vignesh Raghavendra:
> > > > > > Hi Wadim,
> > > > > > 
> > > > > > On 26/02/24 19:00, Wadim Egorov wrote:
> > > > > > > Texas Instruments has begun enabling security settings on the 
> > > > > > > SoCs it
> > > > > > > produces to instruct ROM and TIFS to begin protecting the Security
> > > > > > > Management Subsystem (SMS) from other binaries we load into the 
> > > > > > > chip by
> > > > > > > default.
> > > > > > > 
> > > > > > > One way ROM and TIFS do this is by enabling firewalls to protect 
> > > > > > > the
> > > > > > > OCSRAM and HSM RAM regions they're using during bootup.
> > > > > > > 
> > > > > > > The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
> > > > > > > itself from the main domain applications. This means the 
> > > > > > > 'bootindex'
> > > > > > > value in HSM RAM, left by ROM to indicate if we're using the 
> > > > > > > primary
> > > > > > > or secondary boot-method, must be moved to OCSRAM (that TIFS has 
> > > > > > > open
> > > > > > > for us) before we make the jump to the main domain so the main 
> > > > > > > domain's
> > > > > > > bootloaders can keep access to this information.
> > > > > > > 
> > > > > > > Based on commit
> > > > > > >b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main 
> > > > > > > domain SPL")
> 
> I was thinking, even if the reason described here is not right or does not
> apply to the am62x, it is still a valid solution for carrying this variable
> into the context for next stage A53 bootloader.
> 
> store_boot_info_from_rom() stores the index to the bootindex (.data)
> variable which makes sure it is valid in R5 SPL context. But the next stage
> bootloader does not know anything about the bootindex variable. So from my
> understanding it needs to be copied to a different region to preserve the
> data for next stage bootloaders.
> 
> Or do I miss something?

That's correct. We typically put this bootindex variable in the same 
location for both SPLs.

~Bryan

> > > > > > > 
> > > > > > FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
> > > > > > example) where HSM RAM would be used by HSM firmware. This should 
> > > > > > be a
> > > > > > issue in R5 SPL flow.  Do you see any issues today? If so, whats the
> > > > > > TIFS firmware being used?
> > > > > > 
> > > > > > > Signed-off-by: Wadim Egorov 
> > > > > > > ---
> > > > > > >   arch/arm/mach-k3/Kconfig  |  3 ++-
> > > > > > >   arch/arm/mach-k3/am625_init.c | 15 
> > > > > > > +--
> > > > > > >   arch/arm/mach-k3/include/mach/am62_hardware.h | 15 
> > > > > > > +++
> > > > > > >   3 files changed, 30 insertions(+), 3 deletions(-)
> > > > > > > 
> > > > > > > diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
> > > > > > > index 03898424c9..f5d06593f7 100644
> > > > > > > --- a/arch/arm/mach-k3/Kconfig
> > > > > > > +++ b/arch/arm/mach-k3/Kconfig
> > > > > > > @@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
> > > > > > >   default 0x41cffbfc if SOC_K3_J721E
> > > > > > >   default 0x41cfdbfc if SOC_K3_J721S2
> > > > > > >   default 0x701bebfc if SOC_K3_AM642
> > > > > > > - default 0x43c3f290 if SOC_K3_AM625
> > > > > > > + default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
> > > > > > > + default 0x7000f290 if SOC_K3_AM625 && ARM64
> > > > > > >   default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
> > > > > > >   default 0x7000f290 if SOC_K3_AM62A7 && ARM64
> > > > > > >   help
> > > > > > > diff --git a/arch/arm/mach-k3/am625_init.c 
> > > > > > > b/arch/arm/mach-k3/am625_init.c
> > > > > > > index 6c96e88114..67cf63b103 100644
> > > > > > > --- a/arch/arm/mach-k3/am625_init.c
> > > > > > > +++ b/arch/arm/mach-k3/am625_init.c
> > > > > > > @@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata 
> > > > > > > __section(".data");
> > > > > > >   static void store_boot_info_from_rom(void)
> > > > > > >   {
> > > > > > >   bootindex = *(u32 
> > > > > > > *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
> > > > > > > - memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
> > > > > > > -sizeof(struct rom_extended_boot_data));
> > > > > > > + if (IS_ENABLED(CONFIG_CPU_V7R)) {
> > > > > > > + memcpy(, (uintptr_t 
> > > > > > > *)ROM_EXTENDED_BOOT_DATA_INFO,
> > > > > > > +sizeof(struct rom_extended_boot_data));
> > > > > > > + }
> > > > > > >   }
> > > > > > >   static void ctrl_mmr_unlock(void)
> > > > > > > @@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
> > > > > > >   k3_sysfw_loader(true, NULL, 

Re: [PATCH v2] mx6cuboxi: Fix Ethernet after DT sync with Linux

[Fabio Estevam]

Hi Tom,

On Mon, Apr 1, 2024 at 7:13 AM Christian Gmeiner  wrote:

> I am happy with the patch and love the idea to fix Ethernet for 2024.04.
>
> Tested-by: Christian Gmeiner 

Could you please pick this one directly for 2024.04?

It fixes an Ethernet regression on mx6cuboxi.

Christian has tested it on i.MX6 Cuboxi and I tested it on i.MX6 Hummingboard.

Thanks

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Sumit Garg]

On Mon, 1 Apr 2024 at 16:34, Jonas Karlman  wrote:
>
> On 2024-04-01 12:53, Sumit Garg wrote:
> > On Mon, 1 Apr 2024 at 15:31, Jonas Karlman  wrote:
> >>
> >> On 2024-04-01 11:45, Jonas Karlman wrote:
> >>> Hi Sumit,
> >>>
> >>> On 2024-04-01 10:52, Sumit Garg wrote:
>  Hi Jonas,
> 
>  On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
> >
> > This series adds support for new clocks used in linux v6.8 device trees,
> > enables use of FIT signature check for checksum validation and fixes
> > loading FIT from SD-card when loading FIT from eMMC fails.
> >
> > After this series it should be possible to move RK3399 boards to use
> > OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
> >
> 
>  Thanks for putting this effort together. A switch to v6.8 tag for
>  OF_UPSTREAM will happen as part of patch [1]. So if you want to save
>  further effort then you can just rebase with a switch to OF_UPSTREAM
>  once that patch [1] lands in next.
> >>>
> >>> Because this is a jump of device tree files from v5.14-rc1 to v6.8,
> >>> reviewability and being able to cherry-pick these changes to my
> >>> rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
> >>> everything to v6.8 and then in a separate series move to OF_UPSTREAM.
> >>> Else it can be very hard to understand some of the changes that has been
> >>> and was needed to be made to u-boot.dtsi files.
> >>
> >> Also forgot to mention that these synced DT files still contains some
> >> minor modification in #include dtsi paths of files that is shared
> >> between rk3288 (armv7) and rk3399 (armv8),
> >
> > I can only see rockchip-u-boot.dtsi being shared which should be
> > handled automatically. Is there anything else I am missing here?
>
> The following is a diff of arch/arm/dts rk3399 DTs after this series
> compared to fully synced v6.8.

This is due to the different DTS directory structure within U-Boot.
With OF_UPSTREAM, these modifications aren't required anymore.

>
> Also the content of cros-ec-keyboard.dtsi was excluded in this sync
> because it initially caused compile issues.

I suppose that's due to missing #include
 for cros-ec-keyboard.dtsi. Once
you enable OF_UPSTREAM then let me know if you encounter such issues.

-Sumit

>
> diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
> index d90fe4d40d48..789fd0dcc88b 100644
> --- a/arch/arm/dts/rk3399-gru.dtsi
> +++ b/arch/arm/dts/rk3399-gru.dtsi
> @@ -684,8 +684,8 @@ ap_i2c_audio:  {
> status = "okay";
>  };
>
> -#include 
> -#include 
> +#include 
> +#include 
>
>   {
> /*
> diff --git a/arch/arm/dts/rk3399pro-rock-pi-n10.dts 
> b/arch/arm/dts/rk3399pro-rock-pi-n10.dts
> index bf026786fa92..c58fb7658d7a 100644
> --- a/arch/arm/dts/rk3399pro-rock-pi-n10.dts
> +++ b/arch/arm/dts/rk3399pro-rock-pi-n10.dts
> @@ -8,7 +8,7 @@
>  /dts-v1/;
>  #include "rk3399.dtsi"
>  #include "rk3399-opp.dtsi"
> -#include 
> +#include 
>  #include "rk3399pro-vmarc-som.dtsi"
>
>  / {
>
> Regards,
> Jonas
>
> >
> > -Sumit
>

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Sumit Garg]

On Mon, 1 Apr 2024 at 15:54, Jonas Karlman  wrote:
>
> On 2024-04-01 12:08, Sumit Garg wrote:
> > On Mon, 1 Apr 2024 at 15:15, Jonas Karlman  wrote:
> >>
> >> Hi Sumit,
> >>
> >> On 2024-04-01 10:52, Sumit Garg wrote:
> >>> Hi Jonas,
> >>>
> >>> On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
> 
>  This series adds support for new clocks used in linux v6.8 device trees,
>  enables use of FIT signature check for checksum validation and fixes
>  loading FIT from SD-card when loading FIT from eMMC fails.
> 
>  After this series it should be possible to move RK3399 boards to use
>  OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
> 
> >>>
> >>> Thanks for putting this effort together. A switch to v6.8 tag for
> >>> OF_UPSTREAM will happen as part of patch [1]. So if you want to save
> >>> further effort then you can just rebase with a switch to OF_UPSTREAM
> >>> once that patch [1] lands in next.
> >>
> >> Because this is a jump of device tree files from v5.14-rc1 to v6.8,
> >> reviewability and being able to cherry-pick these changes to my
> >> rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
> >> everything to v6.8 and then in a separate series move to OF_UPSTREAM.
> >> Else it can be very hard to understand some of the changes that has been
> >> and was needed to be made to u-boot.dtsi files.
> >
> > That's fair given it's a long pending DT sync.
> >
> >>
> >> Reviewability is one of the shortcomings with a switch to OF_UPSTREAM.
> >
> > I suppose the reasoning behind this thinking can be that people are
> > used to reviewing DTs alongside driver changes. However, these patches
> > aren't actual DT changes but rather DT imports which IMHO is a
> > distraction for the reviewer. The actual DT can be looked into
> > dts/upstream/ directory while reviewing the changes.
>
> Things like following was easier to spot when reviewing DT syncs:
> - A property that U-Boot depends on gets removed, as in [1].

That seems to be due to DT bindings compliance check where DT bindings
are the ABI. Although it is unfortunate due to dependency on legacy
DT, now we have the same dtbs_check in U-Boot too:

$ make _defconfig
$ make -j`nproc` dtbs_check

This shall keep U-Boot in compliance with DT bindings and help avoid
such dependencies.

> - Some DT changes can break changes that has been made to u-boot.dtsi
>   files, e.g. a symbol to a node is no longer available in upstream but
>   referenced in u-boot.dtsi files (happened in this series).

Node names aren't a DT ABI so we should expect some changes there.

> - Changes in DT may require a workaround in a u-boot.dtsi file.
> - u-boot.dtsi contains workarounds that has not yet been upstream but
>   can be removed in a future DT sync.

Agree, we should try to minimize modifications via u-boot.dtsi
especially all the bootph* related properties should be posted
upstream.

> - Driver incompatibilities due to initial driver imported from vendor
>   ended up not fully compatible with upstream linux driver / dt-binding.

Given all the above and the big jump in DT sync for Rockchip
platforms, I am fine with the transition being step by step.

-Sumit

>
> [2] 
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=4d08b19629495b29601991d09d07865694c25199
>

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Jonas Karlman]

On 2024-04-01 12:53, Sumit Garg wrote:
> On Mon, 1 Apr 2024 at 15:31, Jonas Karlman  wrote:
>>
>> On 2024-04-01 11:45, Jonas Karlman wrote:
>>> Hi Sumit,
>>>
>>> On 2024-04-01 10:52, Sumit Garg wrote:
 Hi Jonas,

 On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
>
> This series adds support for new clocks used in linux v6.8 device trees,
> enables use of FIT signature check for checksum validation and fixes
> loading FIT from SD-card when loading FIT from eMMC fails.
>
> After this series it should be possible to move RK3399 boards to use
> OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
>

 Thanks for putting this effort together. A switch to v6.8 tag for
 OF_UPSTREAM will happen as part of patch [1]. So if you want to save
 further effort then you can just rebase with a switch to OF_UPSTREAM
 once that patch [1] lands in next.
>>>
>>> Because this is a jump of device tree files from v5.14-rc1 to v6.8,
>>> reviewability and being able to cherry-pick these changes to my
>>> rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
>>> everything to v6.8 and then in a separate series move to OF_UPSTREAM.
>>> Else it can be very hard to understand some of the changes that has been
>>> and was needed to be made to u-boot.dtsi files.
>>
>> Also forgot to mention that these synced DT files still contains some
>> minor modification in #include dtsi paths of files that is shared
>> between rk3288 (armv7) and rk3399 (armv8),
> 
> I can only see rockchip-u-boot.dtsi being shared which should be
> handled automatically. Is there anything else I am missing here?

The following is a diff of arch/arm/dts rk3399 DTs after this series
compared to fully synced v6.8.

Also the content of cros-ec-keyboard.dtsi was excluded in this sync
because it initially caused compile issues.

diff --git a/arch/arm/dts/rk3399-gru.dtsi b/arch/arm/dts/rk3399-gru.dtsi
index d90fe4d40d48..789fd0dcc88b 100644
--- a/arch/arm/dts/rk3399-gru.dtsi
+++ b/arch/arm/dts/rk3399-gru.dtsi
@@ -684,8 +684,8 @@ ap_i2c_audio:  {
status = "okay";
 };

-#include 
-#include 
+#include 
+#include 

  {
/*
diff --git a/arch/arm/dts/rk3399pro-rock-pi-n10.dts 
b/arch/arm/dts/rk3399pro-rock-pi-n10.dts
index bf026786fa92..c58fb7658d7a 100644
--- a/arch/arm/dts/rk3399pro-rock-pi-n10.dts
+++ b/arch/arm/dts/rk3399pro-rock-pi-n10.dts
@@ -8,7 +8,7 @@
 /dts-v1/;
 #include "rk3399.dtsi"
 #include "rk3399-opp.dtsi"
-#include 
+#include 
 #include "rk3399pro-vmarc-som.dtsi"

 / {

Regards,
Jonas

> 
> -Sumit

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Sumit Garg]

On Mon, 1 Apr 2024 at 15:31, Jonas Karlman  wrote:
>
> On 2024-04-01 11:45, Jonas Karlman wrote:
> > Hi Sumit,
> >
> > On 2024-04-01 10:52, Sumit Garg wrote:
> >> Hi Jonas,
> >>
> >> On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
> >>>
> >>> This series adds support for new clocks used in linux v6.8 device trees,
> >>> enables use of FIT signature check for checksum validation and fixes
> >>> loading FIT from SD-card when loading FIT from eMMC fails.
> >>>
> >>> After this series it should be possible to move RK3399 boards to use
> >>> OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
> >>>
> >>
> >> Thanks for putting this effort together. A switch to v6.8 tag for
> >> OF_UPSTREAM will happen as part of patch [1]. So if you want to save
> >> further effort then you can just rebase with a switch to OF_UPSTREAM
> >> once that patch [1] lands in next.
> >
> > Because this is a jump of device tree files from v5.14-rc1 to v6.8,
> > reviewability and being able to cherry-pick these changes to my
> > rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
> > everything to v6.8 and then in a separate series move to OF_UPSTREAM.
> > Else it can be very hard to understand some of the changes that has been
> > and was needed to be made to u-boot.dtsi files.
>
> Also forgot to mention that these synced DT files still contains some
> minor modification in #include dtsi paths of files that is shared
> between rk3288 (armv7) and rk3399 (armv8),

I can only see rockchip-u-boot.dtsi being shared which should be
handled automatically. Is there anything else I am missing here?

-Sumit

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Jonas Karlman]

On 2024-04-01 12:08, Sumit Garg wrote:
> On Mon, 1 Apr 2024 at 15:15, Jonas Karlman  wrote:
>>
>> Hi Sumit,
>>
>> On 2024-04-01 10:52, Sumit Garg wrote:
>>> Hi Jonas,
>>>
>>> On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:

 This series adds support for new clocks used in linux v6.8 device trees,
 enables use of FIT signature check for checksum validation and fixes
 loading FIT from SD-card when loading FIT from eMMC fails.

 After this series it should be possible to move RK3399 boards to use
 OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.

>>>
>>> Thanks for putting this effort together. A switch to v6.8 tag for
>>> OF_UPSTREAM will happen as part of patch [1]. So if you want to save
>>> further effort then you can just rebase with a switch to OF_UPSTREAM
>>> once that patch [1] lands in next.
>>
>> Because this is a jump of device tree files from v5.14-rc1 to v6.8,
>> reviewability and being able to cherry-pick these changes to my
>> rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
>> everything to v6.8 and then in a separate series move to OF_UPSTREAM.
>> Else it can be very hard to understand some of the changes that has been
>> and was needed to be made to u-boot.dtsi files.
> 
> That's fair given it's a long pending DT sync.
> 
>>
>> Reviewability is one of the shortcomings with a switch to OF_UPSTREAM.
> 
> I suppose the reasoning behind this thinking can be that people are
> used to reviewing DTs alongside driver changes. However, these patches
> aren't actual DT changes but rather DT imports which IMHO is a
> distraction for the reviewer. The actual DT can be looked into
> dts/upstream/ directory while reviewing the changes.

Things like following was easier to spot when reviewing DT syncs:
- A property that U-Boot depends on gets removed, as in [1].
- Some DT changes can break changes that has been made to u-boot.dtsi
  files, e.g. a symbol to a node is no longer available in upstream but
  referenced in u-boot.dtsi files (happened in this series).
- Changes in DT may require a workaround in a u-boot.dtsi file.
- u-boot.dtsi contains workarounds that has not yet been upstream but
  can be removed in a future DT sync.
- Driver incompatibilities due to initial driver imported from vendor
  ended up not fully compatible with upstream linux driver / dt-binding.

[2] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=4d08b19629495b29601991d09d07865694c25199

Regards,
Jonas

> 
> -Sumit
> 
>>
>> Regards,
>> Jonas
>>
>>>
>>> [1] https://lists.denx.de/pipermail/u-boot/2024-March/549611.html
>>>
>>> -Sumit
>>>
 I have runtime tested this series on following devices:
 - 96boards Rock960
 - Khadas Edge Captain
 - Pine64 PineBook Pro
 - Pine64 RockPro64
 - Radxa ROCK 4C+
 - Radxa ROCK 4SE
 - Radxa ROCK Pi 4A
 - Radxa ROCK Pi 4B+

 This series depends on the following series:
 - Enable booting from SPI flash on ROCK Pi 4 [1]
 - rockchip: spl: Cache boot source id for later use [2]

 A copy of this series and all its depends can be found at [3]

 [1] https://patchwork.ozlabs.org/cover/1912469/
 [2] https://patchwork.ozlabs.org/cover/1915071/
 [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-dt-sync-v1

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Sumit Garg]

On Mon, 1 Apr 2024 at 15:15, Jonas Karlman  wrote:
>
> Hi Sumit,
>
> On 2024-04-01 10:52, Sumit Garg wrote:
> > Hi Jonas,
> >
> > On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
> >>
> >> This series adds support for new clocks used in linux v6.8 device trees,
> >> enables use of FIT signature check for checksum validation and fixes
> >> loading FIT from SD-card when loading FIT from eMMC fails.
> >>
> >> After this series it should be possible to move RK3399 boards to use
> >> OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
> >>
> >
> > Thanks for putting this effort together. A switch to v6.8 tag for
> > OF_UPSTREAM will happen as part of patch [1]. So if you want to save
> > further effort then you can just rebase with a switch to OF_UPSTREAM
> > once that patch [1] lands in next.
>
> Because this is a jump of device tree files from v5.14-rc1 to v6.8,
> reviewability and being able to cherry-pick these changes to my
> rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
> everything to v6.8 and then in a separate series move to OF_UPSTREAM.
> Else it can be very hard to understand some of the changes that has been
> and was needed to be made to u-boot.dtsi files.

That's fair given it's a long pending DT sync.

>
> Reviewability is one of the shortcomings with a switch to OF_UPSTREAM.

I suppose the reasoning behind this thinking can be that people are
used to reviewing DTs alongside driver changes. However, these patches
aren't actual DT changes but rather DT imports which IMHO is a
distraction for the reviewer. The actual DT can be looked into
dts/upstream/ directory while reviewing the changes.

-Sumit

>
> Regards,
> Jonas
>
> >
> > [1] https://lists.denx.de/pipermail/u-boot/2024-March/549611.html
> >
> > -Sumit
> >
> >> I have runtime tested this series on following devices:
> >> - 96boards Rock960
> >> - Khadas Edge Captain
> >> - Pine64 PineBook Pro
> >> - Pine64 RockPro64
> >> - Radxa ROCK 4C+
> >> - Radxa ROCK 4SE
> >> - Radxa ROCK Pi 4A
> >> - Radxa ROCK Pi 4B+
> >>
> >> This series depends on the following series:
> >> - Enable booting from SPI flash on ROCK Pi 4 [1]
> >> - rockchip: spl: Cache boot source id for later use [2]
> >>
> >> A copy of this series and all its depends can be found at [3]
> >>
> >> [1] https://patchwork.ozlabs.org/cover/1912469/
> >> [2] https://patchwork.ozlabs.org/cover/1915071/
> >> [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-dt-sync-v1
> >>
> >> Jonas Karlman (31):
> >>   rockchip: rk3399-gru: Fix max SPL size on bob and kevin
> >>   rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
> >>   rockchip: rk3399: Sort imply statements alphabetically
> >>   rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
> >>   rockchip: rk3399: Enable random generator on all boards
> >>   rockchip: rk3399: Imply support for GbE PHY
> >>   rockchip: rk3399: Enable DT overlay support on all boards
> >>   rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options
> >>   rockchip: rk3399: Add a default spl-boot-order prop
> >>   rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
> >>   clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC
> >>   clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
> >>   clk: rockchip: rk3399: Add dummy support for SCLK_PCIEPHY_REF clock
> >>   clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support
> >>   rockchip: rk3399: Sync soc device tree from linux v6.8
> >>   rockchip: rk3399-gru: Sync device tree from linux v6.8
> >>   rockchip: rk3399-puma: Sync DT from linux v6.8
> >>   rockchip: rk3399-rock-pi-n10: Sync device tree from linux v6.8
> >>   rockchip: rk3399-eaidk-610: Sync device tree from linux v6.8
> >>   rockchip: rk3399-leez: Sync device tree from linux v6.8
> >>   rockchip: rk3399-evb: Sync device tree from linux v6.8
> >>   rockchip: rk3399-firefly: Sync device tree from linux v6.8
> >>   rockchip: rk3399-orangepi: Sync device tree from linux v6.8
> >>   rockchip: rk3399-roc-pc: Sync device tree from linux v6.8
> >>   rockchip: rk3399-nanopi-4: Sync device tree from linux v6.8
> >>   rockchip: rk3399-rock960: Sync device tree from linux v6.8
> >>   rockchip: rk3399-khadas: Sync device tree from linux v6.8
> >>   rockchip: rk3399-rock-pi-4: Sync device tree from linux v6.8
> >>   rockchip: rk3399-rockpro64: Sync device tree from linux v6.8
> >>   rockchip: rk3399-pinebook-pro: Sync device tree from linux v6.8
> >>   rockchip: rk3399-pinephone-pro: Sync device tree from linux v6.8
> >>
> >>  arch/arm/dts/rk3288-vmarc-som.dtsi|  48 +++
> >>  arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi |   1 -
> >>  arch/arm/dts/rk3399-eaidk-610.dts |   3 +-
> >>  arch/arm/dts/rk3399-evb-u-boot.dtsi   |  13 +-
> >>  arch/arm/dts/rk3399-evb.dts   |   3 +-
> >>  arch/arm/dts/rk3399-ficus-u-boot.dtsi |  10 +-
> >>  arch/arm/dts/rk3399-ficus.dts |   4 +
> >>  

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Jonas Karlman]

On 2024-04-01 11:45, Jonas Karlman wrote:
> Hi Sumit,
> 
> On 2024-04-01 10:52, Sumit Garg wrote:
>> Hi Jonas,
>>
>> On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
>>>
>>> This series adds support for new clocks used in linux v6.8 device trees,
>>> enables use of FIT signature check for checksum validation and fixes
>>> loading FIT from SD-card when loading FIT from eMMC fails.
>>>
>>> After this series it should be possible to move RK3399 boards to use
>>> OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
>>>
>>
>> Thanks for putting this effort together. A switch to v6.8 tag for
>> OF_UPSTREAM will happen as part of patch [1]. So if you want to save
>> further effort then you can just rebase with a switch to OF_UPSTREAM
>> once that patch [1] lands in next.
> 
> Because this is a jump of device tree files from v5.14-rc1 to v6.8,
> reviewability and being able to cherry-pick these changes to my
> rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
> everything to v6.8 and then in a separate series move to OF_UPSTREAM.
> Else it can be very hard to understand some of the changes that has been
> and was needed to be made to u-boot.dtsi files.

Also forgot to mention that these synced DT files still contains some
minor modification in #include dtsi paths of files that is shared
between rk3288 (armv7) and rk3399 (armv8), so a full sync of rk3288 to
linux v6.8 would be recommended before doing a full move to OF_UPSTREAM
of rk3399.

> 
> Reviewability is one of the shortcomings with a switch to OF_UPSTREAM.
> 
> Regards,
> Jonas
> 
>>
>> [1] https://lists.denx.de/pipermail/u-boot/2024-March/549611.html
>>
>> -Sumit
>>
>>> I have runtime tested this series on following devices:
>>> - 96boards Rock960
>>> - Khadas Edge Captain
>>> - Pine64 PineBook Pro
>>> - Pine64 RockPro64
>>> - Radxa ROCK 4C+
>>> - Radxa ROCK 4SE
>>> - Radxa ROCK Pi 4A
>>> - Radxa ROCK Pi 4B+
>>>
>>> This series depends on the following series:
>>> - Enable booting from SPI flash on ROCK Pi 4 [1]
>>> - rockchip: spl: Cache boot source id for later use [2]
>>>
>>> A copy of this series and all its depends can be found at [3]
>>>
>>> [1] https://patchwork.ozlabs.org/cover/1912469/
>>> [2] https://patchwork.ozlabs.org/cover/1915071/
>>> [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-dt-sync-v1
>>>
>>> Jonas Karlman (31):
>>>   rockchip: rk3399-gru: Fix max SPL size on bob and kevin
>>>   rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
>>>   rockchip: rk3399: Sort imply statements alphabetically
>>>   rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
>>>   rockchip: rk3399: Enable random generator on all boards
>>>   rockchip: rk3399: Imply support for GbE PHY
>>>   rockchip: rk3399: Enable DT overlay support on all boards
>>>   rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options
>>>   rockchip: rk3399: Add a default spl-boot-order prop
>>>   rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
>>>   clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC
>>>   clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
>>>   clk: rockchip: rk3399: Add dummy support for SCLK_PCIEPHY_REF clock
>>>   clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support
>>>   rockchip: rk3399: Sync soc device tree from linux v6.8
>>>   rockchip: rk3399-gru: Sync device tree from linux v6.8
>>>   rockchip: rk3399-puma: Sync DT from linux v6.8
>>>   rockchip: rk3399-rock-pi-n10: Sync device tree from linux v6.8
>>>   rockchip: rk3399-eaidk-610: Sync device tree from linux v6.8
>>>   rockchip: rk3399-leez: Sync device tree from linux v6.8
>>>   rockchip: rk3399-evb: Sync device tree from linux v6.8
>>>   rockchip: rk3399-firefly: Sync device tree from linux v6.8
>>>   rockchip: rk3399-orangepi: Sync device tree from linux v6.8
>>>   rockchip: rk3399-roc-pc: Sync device tree from linux v6.8
>>>   rockchip: rk3399-nanopi-4: Sync device tree from linux v6.8
>>>   rockchip: rk3399-rock960: Sync device tree from linux v6.8
>>>   rockchip: rk3399-khadas: Sync device tree from linux v6.8
>>>   rockchip: rk3399-rock-pi-4: Sync device tree from linux v6.8
>>>   rockchip: rk3399-rockpro64: Sync device tree from linux v6.8
>>>   rockchip: rk3399-pinebook-pro: Sync device tree from linux v6.8
>>>   rockchip: rk3399-pinephone-pro: Sync device tree from linux v6.8
>>>
>>>  arch/arm/dts/rk3288-vmarc-som.dtsi|  48 +++
>>>  arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi |   1 -
>>>  arch/arm/dts/rk3399-eaidk-610.dts |   3 +-
>>>  arch/arm/dts/rk3399-evb-u-boot.dtsi   |  13 +-
>>>  arch/arm/dts/rk3399-evb.dts   |   3 +-
>>>  arch/arm/dts/rk3399-ficus-u-boot.dtsi |  10 +-
>>>  arch/arm/dts/rk3399-ficus.dts |   4 +
>>>  arch/arm/dts/rk3399-firefly-u-boot.dtsi   |   6 -
>>>  arch/arm/dts/rk3399-firefly.dts   |  17 +-
>>>  arch/arm/dts/rk3399-gru-bob.dts   |   8 +-
>>>  

Re: [PATCH 11/31] clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC

[Jonas Karlman]

Hi Sumit,

On 2024-04-01 10:56, Sumit Garg wrote:
> On Mon, 1 Apr 2024 at 02:01, Jonas Karlman  wrote:
>>
>> Sync rk3399-cru.h with one from linux v6.2+ and fix use of the
>> SCLK_DDRCLK name that was only used by U-Boot.
>>
>> Signed-off-by: Jonas Karlman 
>> ---
>>  arch/arm/dts/rk3399-u-boot.dtsi|  2 +-
>>  drivers/clk/rockchip/clk_rk3399.c  |  2 +-
>>  include/dt-bindings/clock/rk3399-cru.h | 30 ++
> 
> You shouldn't need to sync this header but rather just drop it which
> will lead to ./dts/upstream/include/dt-bindings/clock/rk3399-cru.h
> being included automatically. Similarly you should be able to drop all
> other duplicate headers as demonstrated by this [1] patch-set.

Because of reviewability and being able to cherry-pick this series I
would opt for first moving existing files to a newer state and then
in a separate future series fully move to OF_UPSTREAM.

Regards,
Jonas

> 
> [1] https://patchwork.ozlabs.org/project/uboot/list/?series=399954
> 
> -Sumit
> 
>>  3 files changed, 18 insertions(+), 16 deletions(-)
>>
>> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi 
>> b/arch/arm/dts/rk3399-u-boot.dtsi
>> index 69e6b808a69b..adb64d17e040 100644
>> --- a/arch/arm/dts/rk3399-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
>> @@ -44,7 +44,7 @@
>> compatible = "rockchip,rk3399-dmc";
>> devfreq-events = <>;
>> interrupts = ;
>> -   clocks = < SCLK_DDRCLK>;
>> +   clocks = < SCLK_DDRC>;
>> clock-names = "dmc_clk";
>> reg = <0x0 0xffa8 0x0 0x0800
>>0x0 0xffa80800 0x0 0x1800
>> diff --git a/drivers/clk/rockchip/clk_rk3399.c 
>> b/drivers/clk/rockchip/clk_rk3399.c
>> index 80f65a237e8e..f0ce54067f8c 100644
>> --- a/drivers/clk/rockchip/clk_rk3399.c
>> +++ b/drivers/clk/rockchip/clk_rk3399.c
>> @@ -1049,7 +1049,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, 
>> ulong rate)
>>  * return 0 to satisfy clk_set_defaults during device probe.
>>  */
>> return 0;
>> -   case SCLK_DDRCLK:
>> +   case SCLK_DDRC:
>> ret = rk3399_ddr_set_clk(priv->cru, rate);
>> break;
>> case PCLK_EFUSE1024NS:
>> diff --git a/include/dt-bindings/clock/rk3399-cru.h 
>> b/include/dt-bindings/clock/rk3399-cru.h
>> index 211faf8fa891..39169d94a44e 100644
>> --- a/include/dt-bindings/clock/rk3399-cru.h
>> +++ b/include/dt-bindings/clock/rk3399-cru.h
>> @@ -1,6 +1,7 @@
>> -/* SPDX-License-Identifier: GPL-2.0+ */
>> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>>  /*
>>   * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
>> + * Author: Xing Zheng 
>>   */
>>
>>  #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
>> @@ -121,16 +122,17 @@
>>  #define SCLK_DPHY_RX0_CFG  165
>>  #define SCLK_RMII_SRC  166
>>  #define SCLK_PCIEPHY_REF100M   167
>> -#define SCLK_USBPHY0_480M_SRC  168
>> -#define SCLK_USBPHY1_480M_SRC  169
>> -#define SCLK_DDRCLK170
>> -#define SCLK_TESTOUT2  171
>> +#define SCLK_DDRC  168
>> +#define SCLK_TESTCLKOUT1   169
>> +#define SCLK_TESTCLKOUT2   170
>>
>>  #define DCLK_VOP0  180
>>  #define DCLK_VOP1  181
>>  #define DCLK_VOP0_DIV  182
>>  #define DCLK_VOP1_DIV  183
>>  #define DCLK_M0_PERILP 184
>> +#define DCLK_VOP0_FRAC 185
>> +#define DCLK_VOP1_FRAC 186
>>
>>  #define FCLK_CM0S  190
>>
>> @@ -545,8 +547,8 @@
>>  #define SRST_H_PERILP0 171
>>  #define SRST_H_PERILP0_NOC 172
>>  #define SRST_ROM   173
>> -#define SRST_CRYPTO_S  174
>> -#define SRST_CRYPTO_M  175
>> +#define SRST_CRYPTO0_S 174
>> +#define SRST_CRYPTO0_M 175
>>
>>  /* cru_softrst_con11 */
>>  #define SRST_P_DCF 176
>> @@ -554,7 +556,7 @@
>>  #define SRST_CM0S  178
>>  #define SRST_CM0S_DBG  179
>>  #define SRST_CM0S_PO   180
>> -#define SRST_CRYPTO181
>> +#define SRST_CRYPTO0   181
>>  #define SRST_P_PERILP1_SGRF182
>>  #define SRST_P_PERILP1_GRF 183
>>  #define SRST_CRYPTO1_S 184
>> @@ -592,13 +594,13 @@
>>  #define SRST_P_SPI0214
>>  #define SRST_P_SPI1215
>>  #define SRST_P_SPI2216
>> -#define SRST_P_SPI4217
>> -#define SRST_P_SPI5218
>> +#define SRST_P_SPI3217
>> +#define SRST_P_SPI4218
>>  #define SRST_SPI0  219
>>  #define SRST_SPI1  220
>>  #define SRST_SPI2  221

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Jonas Karlman]

Hi Sumit,

On 2024-04-01 10:52, Sumit Garg wrote:
> Hi Jonas,
> 
> On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
>>
>> This series adds support for new clocks used in linux v6.8 device trees,
>> enables use of FIT signature check for checksum validation and fixes
>> loading FIT from SD-card when loading FIT from eMMC fails.
>>
>> After this series it should be possible to move RK3399 boards to use
>> OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
>>
> 
> Thanks for putting this effort together. A switch to v6.8 tag for
> OF_UPSTREAM will happen as part of patch [1]. So if you want to save
> further effort then you can just rebase with a switch to OF_UPSTREAM
> once that patch [1] lands in next.

Because this is a jump of device tree files from v5.14-rc1 to v6.8,
reviewability and being able to cherry-pick these changes to my
rk3xxx-2024.04 branch, I think it is much more appropriate to first sync
everything to v6.8 and then in a separate series move to OF_UPSTREAM.
Else it can be very hard to understand some of the changes that has been
and was needed to be made to u-boot.dtsi files.

Reviewability is one of the shortcomings with a switch to OF_UPSTREAM.

Regards,
Jonas

> 
> [1] https://lists.denx.de/pipermail/u-boot/2024-March/549611.html
> 
> -Sumit
> 
>> I have runtime tested this series on following devices:
>> - 96boards Rock960
>> - Khadas Edge Captain
>> - Pine64 PineBook Pro
>> - Pine64 RockPro64
>> - Radxa ROCK 4C+
>> - Radxa ROCK 4SE
>> - Radxa ROCK Pi 4A
>> - Radxa ROCK Pi 4B+
>>
>> This series depends on the following series:
>> - Enable booting from SPI flash on ROCK Pi 4 [1]
>> - rockchip: spl: Cache boot source id for later use [2]
>>
>> A copy of this series and all its depends can be found at [3]
>>
>> [1] https://patchwork.ozlabs.org/cover/1912469/
>> [2] https://patchwork.ozlabs.org/cover/1915071/
>> [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-dt-sync-v1
>>
>> Jonas Karlman (31):
>>   rockchip: rk3399-gru: Fix max SPL size on bob and kevin
>>   rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
>>   rockchip: rk3399: Sort imply statements alphabetically
>>   rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
>>   rockchip: rk3399: Enable random generator on all boards
>>   rockchip: rk3399: Imply support for GbE PHY
>>   rockchip: rk3399: Enable DT overlay support on all boards
>>   rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options
>>   rockchip: rk3399: Add a default spl-boot-order prop
>>   rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
>>   clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC
>>   clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
>>   clk: rockchip: rk3399: Add dummy support for SCLK_PCIEPHY_REF clock
>>   clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support
>>   rockchip: rk3399: Sync soc device tree from linux v6.8
>>   rockchip: rk3399-gru: Sync device tree from linux v6.8
>>   rockchip: rk3399-puma: Sync DT from linux v6.8
>>   rockchip: rk3399-rock-pi-n10: Sync device tree from linux v6.8
>>   rockchip: rk3399-eaidk-610: Sync device tree from linux v6.8
>>   rockchip: rk3399-leez: Sync device tree from linux v6.8
>>   rockchip: rk3399-evb: Sync device tree from linux v6.8
>>   rockchip: rk3399-firefly: Sync device tree from linux v6.8
>>   rockchip: rk3399-orangepi: Sync device tree from linux v6.8
>>   rockchip: rk3399-roc-pc: Sync device tree from linux v6.8
>>   rockchip: rk3399-nanopi-4: Sync device tree from linux v6.8
>>   rockchip: rk3399-rock960: Sync device tree from linux v6.8
>>   rockchip: rk3399-khadas: Sync device tree from linux v6.8
>>   rockchip: rk3399-rock-pi-4: Sync device tree from linux v6.8
>>   rockchip: rk3399-rockpro64: Sync device tree from linux v6.8
>>   rockchip: rk3399-pinebook-pro: Sync device tree from linux v6.8
>>   rockchip: rk3399-pinephone-pro: Sync device tree from linux v6.8
>>
>>  arch/arm/dts/rk3288-vmarc-som.dtsi|  48 +++
>>  arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi |   1 -
>>  arch/arm/dts/rk3399-eaidk-610.dts |   3 +-
>>  arch/arm/dts/rk3399-evb-u-boot.dtsi   |  13 +-
>>  arch/arm/dts/rk3399-evb.dts   |   3 +-
>>  arch/arm/dts/rk3399-ficus-u-boot.dtsi |  10 +-
>>  arch/arm/dts/rk3399-ficus.dts |   4 +
>>  arch/arm/dts/rk3399-firefly-u-boot.dtsi   |   6 -
>>  arch/arm/dts/rk3399-firefly.dts   |  17 +-
>>  arch/arm/dts/rk3399-gru-bob.dts   |   8 +-
>>  arch/arm/dts/rk3399-gru-chromebook.dtsi   | 200 +++-
>>  arch/arm/dts/rk3399-gru-kevin.dts |   3 +-
>>  arch/arm/dts/rk3399-gru-u-boot.dtsi   |  34 ++-
>>  arch/arm/dts/rk3399-gru.dtsi  |  52 +++-
>>  arch/arm/dts/rk3399-khadas-edge-captain.dts   |   4 +
>>  arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi   |   7 +-
>>  arch/arm/dts/rk3399-khadas-edge-v.dts |   4 +
>>  

Re: [PATCH 1/2] arm: mach-k3: am625: copy bootindex to OCRAM for main domain SPL

[Wadim Egorov]

Hi Vignesh, Hi Bryan,


Am 05.03.24 um 18:36 schrieb Raghavendra, Vignesh:



On 3/5/2024 11:04 PM, Bryan Brattlof wrote:

On March  5, 2024 thus sayeth Vignesh Raghavendra:


On 05/03/24 01:57, Bryan Brattlof wrote:

Hey Vignesh!

On March  4, 2024 thus sayeth Vignesh Raghavendra:

Hi Wadim,

On 26/02/24 19:00, Wadim Egorov wrote:

Texas Instruments has begun enabling security settings on the SoCs it
produces to instruct ROM and TIFS to begin protecting the Security
Management Subsystem (SMS) from other binaries we load into the chip by
default.

One way ROM and TIFS do this is by enabling firewalls to protect the
OCSRAM and HSM RAM regions they're using during bootup.

The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
itself from the main domain applications. This means the 'bootindex'
value in HSM RAM, left by ROM to indicate if we're using the primary
or secondary boot-method, must be moved to OCSRAM (that TIFS has open
for us) before we make the jump to the main domain so the main domain's
bootloaders can keep access to this information.

Based on commit
   b672e8581070 ("arm: mach-k3: copy bootindex to OCRAM for main domain SPL")


I was thinking, even if the reason described here is not right or does 
not apply to the am62x, it is still a valid solution for carrying this 
variable into the context for next stage A53 bootloader.


store_boot_info_from_rom() stores the index to the bootindex (.data) 
variable which makes sure it is valid in R5 SPL context. But the next 
stage bootloader does not know anything about the bootindex variable. So 
from my understanding it needs to be copied to a different region to 
preserve the data for next stage bootloaders.


Or do I miss something?

Regards,
Wadim




FYI, this is mostly a problem in non SPL flow (TI prosperity SBL for
example) where HSM RAM would be used by HSM firmware. This should be a
issue in R5 SPL flow.  Do you see any issues today? If so, whats the
TIFS firmware being used?


Signed-off-by: Wadim Egorov 
---
  arch/arm/mach-k3/Kconfig  |  3 ++-
  arch/arm/mach-k3/am625_init.c | 15 +--
  arch/arm/mach-k3/include/mach/am62_hardware.h | 15 +++
  3 files changed, 30 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig
index 03898424c9..f5d06593f7 100644
--- a/arch/arm/mach-k3/Kconfig
+++ b/arch/arm/mach-k3/Kconfig
@@ -75,7 +75,8 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX
default 0x41cffbfc if SOC_K3_J721E
default 0x41cfdbfc if SOC_K3_J721S2
default 0x701bebfc if SOC_K3_AM642
-   default 0x43c3f290 if SOC_K3_AM625
+   default 0x43c3f290 if SOC_K3_AM625 && CPU_V7R
+   default 0x7000f290 if SOC_K3_AM625 && ARM64
default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R
default 0x7000f290 if SOC_K3_AM62A7 && ARM64
help
diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c
index 6c96e88114..67cf63b103 100644
--- a/arch/arm/mach-k3/am625_init.c
+++ b/arch/arm/mach-k3/am625_init.c
@@ -35,8 +35,10 @@ static struct rom_extended_boot_data bootdata 
__section(".data");
  static void store_boot_info_from_rom(void)
  {
bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
-   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
-  sizeof(struct rom_extended_boot_data));
+   if (IS_ENABLED(CONFIG_CPU_V7R)) {
+   memcpy(, (uintptr_t *)ROM_EXTENDED_BOOT_DATA_INFO,
+  sizeof(struct rom_extended_boot_data));
+   }
  }
  
  static void ctrl_mmr_unlock(void)

@@ -175,6 +177,15 @@ void board_init_f(ulong dummy)
k3_sysfw_loader(true, NULL, NULL);
}
  
+#if defined(CONFIG_CPU_V7R)

+   /*
+* Relocate boot information to OCRAM (after TIFS has opend this
+* region for us) so the next bootloader stages can keep access to
+* primary vs backup bootmodes.
+*/
+   writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM);
+#endif
+
/*
 * Force probe of clk_k3 driver here to ensure basic default clock
 * configuration is always done.
diff --git a/arch/arm/mach-k3/include/mach/am62_hardware.h 
b/arch/arm/mach-k3/include/mach/am62_hardware.h
index 54380f36e1..9f504f4642 100644
--- a/arch/arm/mach-k3/include/mach/am62_hardware.h
+++ b/arch/arm/mach-k3/include/mach/am62_hardware.h
@@ -76,8 +76,23 @@
  #define CTRLMMR_MCU_RST_CTRL  (MCU_CTRL_MMR0_BASE + 0x18170)
  
  #define ROM_EXTENDED_BOOT_DATA_INFO		0x43c3f1e0

+#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290
  
+/*

+ * During the boot process ROM will kill anything that writes to OCSRAM.

R5 ROM is long gone when R5 SPL starts, how would it kill anything?

Looks like this was based on my patch long ago for the AM62Ax family.
 From what little I remember about this was ROM is leaving behind a
firewall that we need TIFS's help to bring down for us. So I just
blamed ROM 

Re: [PATCH 11/31] clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC

[Sumit Garg]

On Mon, 1 Apr 2024 at 02:01, Jonas Karlman  wrote:
>
> Sync rk3399-cru.h with one from linux v6.2+ and fix use of the
> SCLK_DDRCLK name that was only used by U-Boot.
>
> Signed-off-by: Jonas Karlman 
> ---
>  arch/arm/dts/rk3399-u-boot.dtsi|  2 +-
>  drivers/clk/rockchip/clk_rk3399.c  |  2 +-
>  include/dt-bindings/clock/rk3399-cru.h | 30 ++

You shouldn't need to sync this header but rather just drop it which
will lead to ./dts/upstream/include/dt-bindings/clock/rk3399-cru.h
being included automatically. Similarly you should be able to drop all
other duplicate headers as demonstrated by this [1] patch-set.

[1] https://patchwork.ozlabs.org/project/uboot/list/?series=399954

-Sumit

>  3 files changed, 18 insertions(+), 16 deletions(-)
>
> diff --git a/arch/arm/dts/rk3399-u-boot.dtsi b/arch/arm/dts/rk3399-u-boot.dtsi
> index 69e6b808a69b..adb64d17e040 100644
> --- a/arch/arm/dts/rk3399-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-u-boot.dtsi
> @@ -44,7 +44,7 @@
> compatible = "rockchip,rk3399-dmc";
> devfreq-events = <>;
> interrupts = ;
> -   clocks = < SCLK_DDRCLK>;
> +   clocks = < SCLK_DDRC>;
> clock-names = "dmc_clk";
> reg = <0x0 0xffa8 0x0 0x0800
>0x0 0xffa80800 0x0 0x1800
> diff --git a/drivers/clk/rockchip/clk_rk3399.c 
> b/drivers/clk/rockchip/clk_rk3399.c
> index 80f65a237e8e..f0ce54067f8c 100644
> --- a/drivers/clk/rockchip/clk_rk3399.c
> +++ b/drivers/clk/rockchip/clk_rk3399.c
> @@ -1049,7 +1049,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong 
> rate)
>  * return 0 to satisfy clk_set_defaults during device probe.
>  */
> return 0;
> -   case SCLK_DDRCLK:
> +   case SCLK_DDRC:
> ret = rk3399_ddr_set_clk(priv->cru, rate);
> break;
> case PCLK_EFUSE1024NS:
> diff --git a/include/dt-bindings/clock/rk3399-cru.h 
> b/include/dt-bindings/clock/rk3399-cru.h
> index 211faf8fa891..39169d94a44e 100644
> --- a/include/dt-bindings/clock/rk3399-cru.h
> +++ b/include/dt-bindings/clock/rk3399-cru.h
> @@ -1,6 +1,7 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> +/* SPDX-License-Identifier: GPL-2.0-or-later */
>  /*
>   * Copyright (c) 2016 Rockchip Electronics Co. Ltd.
> + * Author: Xing Zheng 
>   */
>
>  #ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3399_H
> @@ -121,16 +122,17 @@
>  #define SCLK_DPHY_RX0_CFG  165
>  #define SCLK_RMII_SRC  166
>  #define SCLK_PCIEPHY_REF100M   167
> -#define SCLK_USBPHY0_480M_SRC  168
> -#define SCLK_USBPHY1_480M_SRC  169
> -#define SCLK_DDRCLK170
> -#define SCLK_TESTOUT2  171
> +#define SCLK_DDRC  168
> +#define SCLK_TESTCLKOUT1   169
> +#define SCLK_TESTCLKOUT2   170
>
>  #define DCLK_VOP0  180
>  #define DCLK_VOP1  181
>  #define DCLK_VOP0_DIV  182
>  #define DCLK_VOP1_DIV  183
>  #define DCLK_M0_PERILP 184
> +#define DCLK_VOP0_FRAC 185
> +#define DCLK_VOP1_FRAC 186
>
>  #define FCLK_CM0S  190
>
> @@ -545,8 +547,8 @@
>  #define SRST_H_PERILP0 171
>  #define SRST_H_PERILP0_NOC 172
>  #define SRST_ROM   173
> -#define SRST_CRYPTO_S  174
> -#define SRST_CRYPTO_M  175
> +#define SRST_CRYPTO0_S 174
> +#define SRST_CRYPTO0_M 175
>
>  /* cru_softrst_con11 */
>  #define SRST_P_DCF 176
> @@ -554,7 +556,7 @@
>  #define SRST_CM0S  178
>  #define SRST_CM0S_DBG  179
>  #define SRST_CM0S_PO   180
> -#define SRST_CRYPTO181
> +#define SRST_CRYPTO0   181
>  #define SRST_P_PERILP1_SGRF182
>  #define SRST_P_PERILP1_GRF 183
>  #define SRST_CRYPTO1_S 184
> @@ -592,13 +594,13 @@
>  #define SRST_P_SPI0214
>  #define SRST_P_SPI1215
>  #define SRST_P_SPI2216
> -#define SRST_P_SPI4217
> -#define SRST_P_SPI5218
> +#define SRST_P_SPI3217
> +#define SRST_P_SPI4218
>  #define SRST_SPI0  219
>  #define SRST_SPI1  220
>  #define SRST_SPI2  221
> -#define SRST_SPI4  222
> -#define SRST_SPI5  223
> +#define SRST_SPI3  222
> +#define SRST_SPI4  223
>
>  /* cru_softrst_con14 */
>  #define SRST_I2S0_8CH  224
> @@ -720,8 +722,8 @@
>  #define SRST_H_CM0S_NOC3
>  #define SRST_DBG_CM0S  4
>  #define 

Re: [PATCH 00/31] rockchip: rk3399: Sync DT with linux v6.8 and update defconfigs

[Sumit Garg]

Hi Jonas,

On Mon, 1 Apr 2024 at 01:59, Jonas Karlman  wrote:
>
> This series adds support for new clocks used in linux v6.8 device trees,
> enables use of FIT signature check for checksum validation and fixes
> loading FIT from SD-card when loading FIT from eMMC fails.
>
> After this series it should be possible to move RK3399 boards to use
> OF_UPSTREAM in a future patch once dts/upstream move to a v6.8+ tag.
>

Thanks for putting this effort together. A switch to v6.8 tag for
OF_UPSTREAM will happen as part of patch [1]. So if you want to save
further effort then you can just rebase with a switch to OF_UPSTREAM
once that patch [1] lands in next.

[1] https://lists.denx.de/pipermail/u-boot/2024-March/549611.html

-Sumit

> I have runtime tested this series on following devices:
> - 96boards Rock960
> - Khadas Edge Captain
> - Pine64 PineBook Pro
> - Pine64 RockPro64
> - Radxa ROCK 4C+
> - Radxa ROCK 4SE
> - Radxa ROCK Pi 4A
> - Radxa ROCK Pi 4B+
>
> This series depends on the following series:
> - Enable booting from SPI flash on ROCK Pi 4 [1]
> - rockchip: spl: Cache boot source id for later use [2]
>
> A copy of this series and all its depends can be found at [3]
>
> [1] https://patchwork.ozlabs.org/cover/1912469/
> [2] https://patchwork.ozlabs.org/cover/1915071/
> [3] https://github.com/Kwiboo/u-boot-rockchip/commits/rk3399-dt-sync-v1
>
> Jonas Karlman (31):
>   rockchip: rk3399-gru: Fix max SPL size on bob and kevin
>   rockchip: rk3399-ficus: Enable TPL and use common bss and stack addr
>   rockchip: rk3399: Sort imply statements alphabetically
>   rockchip: rk3399: Enable ARMv8 crypto and FIT checksum validation
>   rockchip: rk3399: Enable random generator on all boards
>   rockchip: rk3399: Imply support for GbE PHY
>   rockchip: rk3399: Enable DT overlay support on all boards
>   rockchip: rk3399: Remove use of xPL_MISC_DRIVERS options
>   rockchip: rk3399: Add a default spl-boot-order prop
>   rockchip: rk3399: Fix loading FIT from SD-card when booting from eMMC
>   clk: rockchip: rk3399: Rename SCLK_DDRCLK to SCLK_DDRC
>   clk: rockchip: rk3399: Add dummy support for ACLK_VDU clock
>   clk: rockchip: rk3399: Add dummy support for SCLK_PCIEPHY_REF clock
>   clk: rockchip: rk3399: Add SCLK_USB3OTGx_REF support
>   rockchip: rk3399: Sync soc device tree from linux v6.8
>   rockchip: rk3399-gru: Sync device tree from linux v6.8
>   rockchip: rk3399-puma: Sync DT from linux v6.8
>   rockchip: rk3399-rock-pi-n10: Sync device tree from linux v6.8
>   rockchip: rk3399-eaidk-610: Sync device tree from linux v6.8
>   rockchip: rk3399-leez: Sync device tree from linux v6.8
>   rockchip: rk3399-evb: Sync device tree from linux v6.8
>   rockchip: rk3399-firefly: Sync device tree from linux v6.8
>   rockchip: rk3399-orangepi: Sync device tree from linux v6.8
>   rockchip: rk3399-roc-pc: Sync device tree from linux v6.8
>   rockchip: rk3399-nanopi-4: Sync device tree from linux v6.8
>   rockchip: rk3399-rock960: Sync device tree from linux v6.8
>   rockchip: rk3399-khadas: Sync device tree from linux v6.8
>   rockchip: rk3399-rock-pi-4: Sync device tree from linux v6.8
>   rockchip: rk3399-rockpro64: Sync device tree from linux v6.8
>   rockchip: rk3399-pinebook-pro: Sync device tree from linux v6.8
>   rockchip: rk3399-pinephone-pro: Sync device tree from linux v6.8
>
>  arch/arm/dts/rk3288-vmarc-som.dtsi|  48 +++
>  arch/arm/dts/rk3399-eaidk-610-u-boot.dtsi |   1 -
>  arch/arm/dts/rk3399-eaidk-610.dts |   3 +-
>  arch/arm/dts/rk3399-evb-u-boot.dtsi   |  13 +-
>  arch/arm/dts/rk3399-evb.dts   |   3 +-
>  arch/arm/dts/rk3399-ficus-u-boot.dtsi |  10 +-
>  arch/arm/dts/rk3399-ficus.dts |   4 +
>  arch/arm/dts/rk3399-firefly-u-boot.dtsi   |   6 -
>  arch/arm/dts/rk3399-firefly.dts   |  17 +-
>  arch/arm/dts/rk3399-gru-bob.dts   |   8 +-
>  arch/arm/dts/rk3399-gru-chromebook.dtsi   | 200 +++-
>  arch/arm/dts/rk3399-gru-kevin.dts |   3 +-
>  arch/arm/dts/rk3399-gru-u-boot.dtsi   |  34 ++-
>  arch/arm/dts/rk3399-gru.dtsi  |  52 +++-
>  arch/arm/dts/rk3399-khadas-edge-captain.dts   |   4 +
>  arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi   |   7 +-
>  arch/arm/dts/rk3399-khadas-edge-v.dts |   4 +
>  arch/arm/dts/rk3399-khadas-edge.dtsi  |  10 +-
>  arch/arm/dts/rk3399-leez-p710-u-boot.dtsi |   6 -
>  arch/arm/dts/rk3399-leez-p710.dts |   8 +-
>  arch/arm/dts/rk3399-nanopc-t4.dts |   2 +-
>  arch/arm/dts/rk3399-nanopi-m4-2gb.dts |  55 +---
>  arch/arm/dts/rk3399-nanopi-m4b.dts|   2 +-
>  arch/arm/dts/rk3399-nanopi-r4s.dts|   4 +-
>  arch/arm/dts/rk3399-nanopi4-u-boot.dtsi   |  18 +-
>  arch/arm/dts/rk3399-nanopi4.dtsi  |   7 +-
>  arch/arm/dts/rk3399-op1-opp.dtsi  |  31 +-
>  arch/arm/dts/rk3399-opp.dtsi  |   6 +-
>