Re: [U-Boot] SPL broken on i.mx31 platforms
On 08/05/2014 02:32 PM, Magnus Lilja wrote: Hi Fabio, On 5 August 2014 14:28, Fabio Estevam feste...@gmail.com wrote: Hi Magnus, On Mon, Aug 4, 2014 at 5:23 PM, Magnus Lilja lilja.mag...@gmail.com wrote: I have now done some tests on i.MX31 PDK: * v2013.04 and v2014.04 works * v2014.07 and tip of tree as of this mail does not work To make it work (both v2014.07 and tip of tree) I only have to change the ldr pc, _reset to b reset. I do not have to apply the nop-part of the patch. Could you please submit this change as a formal patch to the list? Please Cc Albert Aribaud on it. I would expect Helmut to create a formal patch then I can test that and add a Tested-by. The problem is it does not work with only the 'b reset' change on my platform. Should I provide a patch with the nops and the question marks around them? It still could be a toolchain difference, mine is pretty old: $ arm-angstrom-linux-gnueabi-gcc --version arm-angstrom-linux-gnueabi-gcc (GCC) 4.7.2 Copyright (C) 2012 Free Software Foundation, Inc. When I objdump the elf file I can see the very same code in cpu_init_crit() as in start.S, whatever that might mean (objdump is from the same toolchain). On a different note I noticed that I received a warning that the PDK board does not use generic board, I will try to fix this but I don't know how much work that is and when I can submit a patch. Just add #define CONFIG_SYS_GENERIC_BOARD into the board config file and give it a try. If it works, please send this patch as well (with Stefano Babic on Cc). That I can do. Regards, Magnus I tested the CONFIG_SYS_GENERIC_BOARD on TT-01 and it works fine. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
On 07/11/2014 09:56 AM, Magnus Lilja wrote: Hi On 8 July 2014 10:05, Helmut Raiger helmut.rai...@hale.at wrote: I meant, that the SPL is now doing the RAM init and copying of the SPL code correctly. RAM is working, the SPL code is at 0x87dc after that (CRCed it via JTAG). I could not track it further (I have very limited development time right now ... repeating myself). After all I need to debug further. If someone could test the current state on the mx31pdk, this still would be great. Just to rule out any other board specific issues. I can confirm that a recent U-boot (I think it was 2014.04) did not work for me on mx31pdk, I think I had to go back to 2013.04 to get a working U-boot. So I don't think it's a board specific issue. Regards, Magnus -- Scanned by MailScanner. Hi, thx Magnus for the test, could you possibly change the few lines of code and test again: diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 1cfcca9..53bde12 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -91,4 +91,9 @@ cpu_init_crit: bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ mov pc, lr /* back to my caller */ + + nop + nop + nop + #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index d68cc47..8c0e3c1 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -50,7 +50,8 @@ _start: #endif _start: - ldr pc, _reset + /* be position independent if SPL is linked at different location */ + b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort This fixes the SPL, in a later test I had to another nop and I still have no explanation why. Again thanks for the support. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms, FIX?
Hi, finally I have the SPL running again, with this fix: diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 1cfcca9..53bde12 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -91,4 +91,9 @@ cpu_init_crit: bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ mov pc, lr /* back to my caller */ + + nop + nop + nop + #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index d68cc47..8c0e3c1 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -50,7 +50,8 @@ _start: #endif _start: - ldr pc, _reset + /* be position independent if SPL is linked at different location */ + b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort I have no clue why the nops are necessary after cpu_init_crit(), but it won't work unless there are at least 3 nops there (pipeline?). It would be nice to have _some_ explanation for this before posting a patch. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
On 07/03/2014 10:58 PM, Benoît Thébaudeau wrote: Hi, On Thu, Jul 3, 2014 at 10:19 AM, Helmut Raiger helmut.rai...@hale.at wrote: On 07/03/2014 01:20 AM, Benoît Thébaudeau wrote: )Dear Helmut Raiger, On Wed, Jul 2, 2014 at 9:04 AM, Helmut Raiger helmut.rai...@hale.at wrote: the commit 41623c91 breaks the SPL on i.mx31 platforms. Here, you are talking about mx31pdk, right? Actually im talking TT-01, but it has no contributed NAND boot code (which I was working on), but it should hit mx31pdk in the same way. This should answer Albert's question about the board. Then, since you are out of tree, can you test with the HEAD vs. 41623c91 vs. 41623c91^ mx31pdk codes, replacing the _reset lines with b reset or bl reset after _start: for 41623c91 and HEAD? It would probably run U-Boot on TT-01 too. You can remove board-specific initializations like GPIO outputs from mx31pdk.c in order not to risk damaging the board (just keep a valid UART to see the boot). This is just to make sure that there is nothing wrong in your out-of-tree code that could interfere with the mainline changes, like a custom SPL linker script that would miss the *(.vectors) section. 1) Simply reverting the 41623c91 on HEAD makes it work again. 2) Replace ldr pc, _reset with b reset, still hangs 3) I'm using no special linker scripts, board_init_f() is pretty much the same as in mx31pdk. You are talking about rebasing, reverting, and testing with modified mainline. Just to make things clear, do you confirm that reverting commit 41623c91 on top of mainline works (not just rebasing before this commit)? You mentioned failing tests with a modified mainline, so I want to make sure that there is no other offending commit after 41623c91 that would interfere with these tests. Yes reverting 41623c91 on HEAD works, there is no other offending commit. I was using the word 'relocation' instead of copying. I did what you suggest, but this does not completely fix the issue. If the only wrong commit is 41623c91, I do not see what else could be wrong, hence my questions above. What do you mean by not completely? Is there any progress? I meant, that the SPL is now doing the RAM init and copying of the SPL code correctly. RAM is working, the SPL code is at 0x87dc after that (CRCed it via JTAG). I could not track it further (I have very limited development time right now ... repeating myself). After all I need to debug further. If someone could test the current state on the mx31pdk, this still would be great. Just to rule out any other board specific issues. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
On 07/08/2014 10:05 AM, Helmut Raiger wrote: I meant, that the SPL is now doing the RAM init and copying of the SPL code correctly. RAM is working, the SPL code is at 0x87dc after that (CRCed it via JTAG). I could not track it further (I have very limited development time right now ... repeating myself). After all I need to debug further. If someone could test the current state on the mx31pdk, this still would be great. Just to rule out any other board specific issues. Helmut Ok, I've got some new input and I have no clue what's going on. 1) I fixed the first branch to reset (uses b reset instead of ldr pc, _reset) 2) The startup does: b reset ... reset: - set the cpu to SVC32 mode - bl cpu_init_crit (cache and MMU stuff, calls low_level_init) - bl _main low_level_init: unlike in mx31pdk this only does: ldrr0, =ARM_PPMRR /* start from AIPS 2GB region */ mcrp15, 0, r0, c15, c2, 4 movpc, lr _main: - set up stack pointer to internal SRAM - bl board_init_f As I can't break right after reset with peedi, I do: - reset stop - set pc 0xb800 - go - system never returns next: reset stop - set pc 0xb800 - break add hard 0xb8c8// set hardware breakpoint to the 'bl board_init_f' instruction - go ... it stops at the breakpoint - go ... I'm at the u-boot command prompt If I set the breakpoint somewhere after the bl board_init_f it fails, if I break a few instructions early and go from there it also fails. Tracking down the location in-between I end up at: at the end of cpu_init_crit(): movip, lr/* persevere link reg across call */ bllowlevel_init/* go setup pll,mux,memory */ -movlr, ip/* restore link */ movpc, lr/* back to my caller */ That is, if I set the breakpoint to mov lr, ip it works, if I set it one instruction later it ends working. Could be struggling with the debugger here, as the SPL probably ran a few instruction before it was stopped. Might this be a cache issue? But it is invalidated in cpu_init_crit() anyway ... Feeling a little dumbstruck right now ... Sorry for the mess, but it's hard to describe. Any ideas? Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
On 07/08/2014 02:32 PM, Helmut Raiger wrote: On 07/08/2014 10:05 AM, Helmut Raiger wrote: I meant, that the SPL is now doing the RAM init and copying of the SPL code correctly. RAM is working, the SPL code is at 0x87dc after that (CRCed it via JTAG). I could not track it further (I have very limited development time right now ... repeating myself). After all I need to debug further. If someone could test the current state on the mx31pdk, this still would be great. Just to rule out any other board specific issues. Helmut Ok, I've got some new input and I have no clue what's going on. 1) I fixed the first branch to reset (uses b reset instead of ldr pc, _reset) 2) The startup does: b reset ... reset: - set the cpu to SVC32 mode - bl cpu_init_crit (cache and MMU stuff, calls low_level_init) - bl _main low_level_init: unlike in mx31pdk this only does: ldrr0, =ARM_PPMRR /* start from AIPS 2GB region */ mcrp15, 0, r0, c15, c2, 4 movpc, lr _main: - set up stack pointer to internal SRAM - bl board_init_f As I can't break right after reset with peedi, I do: - reset stop - set pc 0xb800 - go - system never returns next: reset stop - set pc 0xb800 - break add hard 0xb8c8// set hardware breakpoint to the 'bl board_init_f' instruction - go ... it stops at the breakpoint - go ... I'm at the u-boot command prompt If I set the breakpoint somewhere after the bl board_init_f it fails, if I break a few instructions early and go from there it also fails. Tracking down the location in-between I end up at: at the end of cpu_init_crit(): movip, lr/* persevere link reg across call */ bllowlevel_init/* go setup pll,mux,memory */ -movlr, ip/* restore link */ movpc, lr/* back to my caller */ That is, if I set the breakpoint to mov lr, ip it works, if I set it one instruction later it ends working. Could be struggling with the debugger here, as the SPL probably ran a few instruction before it was stopped. Might this be a cache issue? But it is invalidated in cpu_init_crit() anyway ... Feeling a little dumbstruck right now ... Sorry for the mess, but it's hard to describe. Any ideas? Helmut Just putting 'to whom it may concern' in CC, don't know the rule here. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
Hi, On 07/03/2014 01:20 AM, Benoît Thébaudeau wrote: )Dear Helmut Raiger, On Wed, Jul 2, 2014 at 9:04 AM, Helmut Raiger helmut.rai...@hale.at wrote: the commit 41623c91 breaks the SPL on i.mx31 platforms. Here, you are talking about mx31pdk, right? Actually im talking TT-01, but it has no contributed NAND boot code (which I was working on), but it should hit mx31pdk in the same way. This should answer Albert's question about the board. The original startup code (start.S) was position independent to allow relocation in board_init_f. This is necessary as the internal RAM used by the IPL to load the first 2kB from NAND is also used by the NAND controller to buffer pages. As far as the issue goes: where and how exactly is the code not position independent now? The first statement is now: ldr pc, _reset _reset: .word reset reset is an address generated by the linker (here 0x87dc0060). Originally this was: b reset which is a relative branch (here 0x60 bytes forward). I have to add, that changing this back does not fix the issue, something else is in disorder. I'm still working on it. Do you mean reverting this commit, or only these two lines? In the former case, where does bisect lead to, and in the latter case, have you checked the assembler code in the linked SPL for this branch? I was bisecting the issue by hand :-! , always rebasing my developement branch to somewhere in the master tree and found commit 41623c91 that way, as stated in the first message of the thread. Reverting the commit fixes it, but it should only be a few offending lines. Does changing the startup code back to PIC generate any drawbacks on other ARM platforms? How would this changing back to PIC be implemented? Not by reverting the patch, I hope. No, it will only be a minor change, I think, but I thought there might have been an additional intention behind the change to position dependent code. One could link the first part to 0xB800 (the original position of the SPL when loaded by the IPL) and the part after the relocation to CONFIG_SPL_TEXT_BASE. Actually, the ROM bootloader first copies the first NAND page to 0xB800. Then, the SPL placed here but linked at CONFIG_SPL_TEXT_BASE copies itself to CONFIG_SPL_TEXT_BASE in order to free the NFC buffer so that it can be used by the SPL. There is no relocation going on at this stage, but only a copy, and the SPL code size is limited to 2 kiB. Then, the SPL does its NAND load job towards CONFIG_SYS_TEXT_BASE and starts executing the non-SPL binary, which then relocates itself according to the heap size, etc. Hence, as you said the code launching board_init_f() must be either PIC or linked at 0xB800, and the rest of the SPL code must be either PIC or linked at CONFIG_SPL_TEXT_BASE. So the fact that this commit breaks the PICness of the initial branch is indeed an issue. As a test, can you try to replace the 2 _reset lines in vectors.S with b _reset after _start:, and a _reset: label at the end of the file? This assumes that start.S starts with the reset: label, and that the start.o .text sections are placed right after the .vectors section in the SPL linker script, both being true for mx31pdk. I was using the word 'relocation' instead of copying. I did what you suggest, but this does not completely fix the issue. At a quick glance at the assembler code of board_init_f it looked PIC to me, but I'll have to check. I'm currently torn between projects, which is why I have no further input right now. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] SPL broken on i.mx31 platforms
Hi, Hi, the commit 41623c91 breaks the SPL on i.mx31 platforms. The original startup code (start.S) was position independent to allow relocation in board_init_f. This is necessary as the internal RAM used by the IPL to load the first 2kB from NAND is also used by the NAND controller to buffer pages. As far as the issue goes: where and how exactly is the code not position independent now? The first statement is now: ldr pc, _reset _reset: .word reset reset is an address generated by the linker (here 0x87dc0060). Originally this was: b reset which is a relative branch (here 0x60 bytes forward). I have to add, that changing this back does not fix the issue, something else is in disorder. I'm still working on it. Does changing the startup code back to PIC generate any drawbacks on other ARM platforms? How would this changing back to PIC be implemented? Not by reverting the patch, I hope. No, it will only be a minor change, I think, but I thought there might have been an additional intention behind the change to position dependent code. One could link the first part to 0xB800 (the original position of the SPL when loaded by the IPL) and the part after the relocation to CONFIG_SPL_TEXT_BASE. What was the intention of the change besides unifying? Any other intent would be stated in the commit message. Ok, so the PIC issue was just an oversight. Maybe Albert, Stefano or Magnus could help? I don't have mx31 hardware either. It seems we are the only ones still dealing with this old lad ;-) Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] SPL broken on i.mx31 platforms
Hi, the commit 41623c91 breaks the SPL on i.mx31 platforms. The original startup code (start.S) was position independent to allow relocation in board_init_f. This is necessary as the internal RAM used by the IPL to load the first 2kB from NAND is also used by the NAND controller to buffer pages. Does changing the startup code back to PIC generate any drawbacks on other ARM platforms? What was the intention of the change besides unifying? Could someone verify the issue on a i.mx31 platform. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: zynq: fix a bug in Zynq linker script
On 06/17/2014 12:38 PM, Michal Simek wrote: On 06/17/2014 10:45 AM, Masahiro Yamada wrote: This bug should be fixed asap. Because this patch is assigned to you, could you apply it and send a pull-request, please? Applied and pull request sent. Thanks, Michal This very same commit breaks the SPL on TT-01. Note, the SPL is not contributed yet (I'm about to). Has anyone tested a current u-boot on one of the mx31 boards lately? Simply pulling in the vectors section in the linker script does not do the trick. I'm a bit tight with my time currently, so I'd very much appreciate if someone could test and possibly offer a suggestion on what to change to get that working again, if necessary. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Modify go to allow chain loading a second u-boot
This kind of option is clearly not what other u-boot commands use, I could not find a single command that supports '-' style options. If this had been widely used, I wouldn't have asked in the first place. It seems you did not look very carefully. Just for example: = help env env - environment handling commands Yes it seems ;-) Thx, I'll look into that. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Modify go to allow chain loading a second u-boot
On 04/08/2014 04:27 AM, Simon Glass wrote: 1) add option to 'go' command, which is hard as it has variable arguments This seems best to me if you don't want to add a new command. Maybe you could add a '-c' argument to cleanup? This kind of option is clearly not what other u-boot commands use, I could not find a single command that supports '-' style options. If this had been widely used, I wouldn't have asked in the first place. Thanks anyway, answers are flowing in quite sparsely. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Chain loading an u-boot from an u-boot
On 04/04/2014 11:25 AM, Stefano Babic wrote: Hi Helmut, On 04/04/2014 01:13, Simon Glass wrote: 1) add option to 'go' command, which is hard as it has variable arguments 2) add another go command 3) use an environment variable to set the option for 'go' Theoretically I could use a u-boot image to encapsulate the second u-boot and use 'bootm', but I think I'll stumble over the same kind of questions. There is already 'dcache off' but I wonder if something like 'go prepare' would be useful? Another option is that bootm has a prepare state, but it requires an image. I agree with Simon. If you have not changed your target, you are using a MX31 and what cleanup_linux for arm1136 does is turning off the caches. What about if you turn off i-cache and d-cache in einem script before the go command ? Best regards, Stefano Hi Stefano, cleanup_before_linux() also disables interrupts and flushes the cache(s). Simply turning off the caches did not do the trick. Using 'go prepare' would be a solution as the 2nd argument should be an address (i.e. numeric) in any case. Thx, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Modify go to allow chain loading a second u-boot
Hi, for all the wrong reasons I have to load a second u-boot from a first one. I'm finally able to start it, but it only works if I do a cleanup_before_linux(), i.e. turn off interrupts and caches before the actual 'go'. For testing I patched the go command, but obviously this can't be contributed as such. Anyone having a suggestion on how to do this? 1) add option to 'go' command, which is hard as it has variable arguments 2) add another go command 3) use an environment variable to set the option for 'go' Theoretically I could use an u-boot image to encapsulate the second u-boot and use 'bootm', but I think I'll stumble over the same kind of questions. Helmut PS: this is a re-post (the original one hung on-to the thread where I asked for help in the first place). -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Chain loading an u-boot from an u-boot
On 02/13/2014 10:03 AM, Helmut Raiger wrote: But you just inspired me! There are probably interrupts running for some time when the second u-boot starts and the relocation might destroy part of the interrupt entry points Thx for asking the right questions. I'll have to check this. Helmut I'm finally able to start the second u-boot (other things in-between as always). If I do a cleanup_before_linux(), i.e. turn off interrupts and caches before the actual 'go' and it works just fine. For testing I patched the go command, but obviously this can't be contributed as such. Anyone having a suggestion on how to do this? 1) add option to 'go' command, which is hard as it has variable arguments 2) add another go command 3) use an environment variable to set the option for 'go' Theoretically I could use a u-boot image to encapsulate the second u-boot and use 'bootm', but I think I'll stumble over the same kind of questions. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Chain loading an u-boot from an u-boot
On 02/12/2014 11:45 AM, Andreas Bießmann wrote: Hi Helmut, On 02/12/2014 10:56 AM, Helmut Raiger wrote: I understand the first two points, but why do you store the kernel again with 1bit HW-ECC ? The second U-Boot is able to check with 4bit BCH and your NAND requires 4bit. This is mainly due to performance requirements. Using 4bit BCH increases overhead and makes DMA (currently not used in the kernel driver) a lot slower. We thought we might slip through with 1bit HW-ECC, but we will test this (hopefully not in the field this time ;-) ) If your HW requires 4Bit it is highly recommended to do so. You will run your HW out of specs in other case and I think it is hard to qualify that 4Bit required ECC runs with 1Bit ECC and UBIFS as you stated in a previous mail. You guys are right. I'm just cornered, as performance is a big issue aswell. We'll try to qualify the NAND in proper climate and some UBIFS supervision to gain more insight. Its just that teh application software guys suggested to improve the kernel driver to use DMA to increase overall performance. why another u-boot should be any different?! Just thinking ... have you checked the global data pointer? Is it possible that the global data of the first u-boot influences the global data of the second one? The global data pointer is setup right before the newly set stack pointer in arch/arm/lib/crt0.S, so it should be reset anyway. And answering Stefano's question. The RAM setup is only in the SPL which is skipped when I jump to the second u-boot. But you just inspired me! There are probably interrupts running for some time when the second u-boot starts and the relocation might destroy part of the interrupt entry points Thx for asking the right questions. I'll have to check this. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Chain loading an u-boot from an u-boot
On 02/12/2014 10:59 PM, Scott Wood wrote: Most operations are read (we use a separate YAFFS partition for time predictable writes), so UBI will relocate read-only blocks anyway (due to read disturbances), I think the effect wont be too dramatic, but don't make me proof that ;-) This sounds like a very bad idea. Agreed. SPL on i.MX31 is limited to 2kB so we can't use BCH 4 here, just as you guessed. You could use TPL (three stage extension of SPL). 2K SPL loads 126K TPL, which has BCH code and can load the real U-Boot. See doc/README.TPL, and include/configs/p1_p2_rdb_pc.h for an example. Yes I read that, but it's not done for i.mx31 and I thought it might be harder to do, than just a second u-boot. This might proof wrong. jumping to it. If I set a breakpoint in the do_go_exec() I can step right into the second u-boot. Make sure you're cleaning the cache for that second load, if required. Currently I turned off cashes in the first u-boot and hoped that would do. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Chain loading an u-boot from an u-boot
Hi Stefano, Hi Helmut, I understand the first two points, but why do you store the kernel again with 1bit HW-ECC ? The second U-Boot is able to check with 4bit BCH and your NAND requires 4bit. This is mainly due to performance requirements. Using 4bit BCH increases overhead and makes DMA (currently not used in the kernel driver) a lot slower. We thought we might slip through with 1bit HW-ECC, but we will test this (hopefully not in the field this time ;-) ) I agree with Andreas' analyses. It seems that the second u-boot overwrites your running U-Boot and only if they are identical you have no problem, that means that you are not changing the running code. I double-checked now, the running u-boot is not overwritten. When the 2nd u-boot relocates it overwrites the first one, but that shouldn't be a problem. The first u-boot keeps working after loading (but not running) the second one without issues. Only the 'go' crashes the system. u-boot starts stand-alone application fine, just as the kernel. I really can't see the point why another u-boot should be any different?! Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Chain loading an u-boot from an u-boot
Hi, to give you some background why we would want to do something (strange) like this: - we have a hardware design bug - we have a few hundred i.MX31 TT-01 devices in the field - the i.MX31 rom boot loader is only capable of using 1bit HW-ECC (loading the first page (2k) from the NAND) - the NAND chip specifies a requirement of 1bit ECC for the first 128kB (PEB) and 4bit ECC for the rest - our current u-boot uses 1-bit HW-ECC, the kernel uses UBIFS and 1bit HW-ECC - we face increasing bit errors in the field in the PEBs used by u-boot. Using UBIFS in the kernel mitigates the requirements of 4bit ECC for the whole NAND because it moves PEBs when bit errors show up. The real problem is the area where u-boot is located (currently approx. 450kB, including UBIFS, USB ethernet support and more ..). So the idea was: - use a small u-boot (128kB) in the first PEB of the NAND (written with 1bit HW-ECC) that supports 4bit BCH - let it load a second u-boot (512kB) from the next 4 PEBs (written with 4bit BCH) - jump to the second u-boot and load the kernel from an UBI volume using 1bit HW-ECC again I did all that and it seemed to work just fine, but jumping to the second u-boot almost always crashes the system. In detail we do: - romboot loads the SPL (2kb) - SPL loads the first u-boot stage (which relocates and runs nicely) - the first u-boot 'boots' the second u-boot by loading it from the NAND - the second u-boot is loaded to the link address minus 2kB (for SPL) - this is the same for the first and the second u-boot (link address 0x87e0 - 0x800 = 0x87dff800) - it jumps to 0x87e0 omitting the SPL for the second u-boot - the second u-boot should relocated itself again The second u-boot is verified in RAM with crc32 and it is valid. I've tested many configuration and found, that it only works if both u-boots are identical: - different builds of the same code work (different build date, but same code) - different configurations never work - it does not matter if cashes are turned on or off - I skipped the relocation of the second u-boot (actually not necessary) to no avail I also tried u-boot standalone applications which always work (after fixing a bug in u-boot r8-r9 for gd), again independent of cashes. Using different configuration I never get any serial output of the second u-boot (board info) or debugging stuff. If I set a breakpoint in the second u-boot (after relocation) and continue from there it works until it tries to get the SPI clock (mxc_get_clock() when accessing CCM_CCMR) for the PMIC access. If I throw in a mxc_dump_clocks() earlier it hangs there. I'm pretty much running out of ideas, so any pointers are appreciated. Thx Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Chain loading an u-boot from an u-boot
On 02/10/2014 01:14 PM, Andreas Bießmann wrote: - we have a hardware design bug - we have a few hundred i.MX31 TT-01 devices in the field - the i.MX31 rom boot loader is only capable of using 1bit HW-ECC (loading the first page (2k) from the NAND) - the NAND chip specifies a requirement of 1bit ECC for the first 128kB (PEB) and 4bit ECC for the rest - our current u-boot uses 1-bit HW-ECC, the kernel uses UBIFS and 1bit HW-ECC D'oh! just about what I thought ... - we face increasing bit errors in the field in the PEBs used by u-boot. Using UBIFS in the kernel mitigates the requirements of 4bit ECC for the whole NAND because it moves PEBs when bit errors show up. The real problem is the area where u-boot is located (currently approx. 450kB, including UBIFS, USB ethernet support and more ..). I wouldn't say it is a good solution to have 1 bit ecc on NAND that requires 4 bit, even though there is another layer reacting on bit errors. I guess your BBT will increase significant in a very short time. Most operations are read (we use a separate YAFFS partition for time predictable writes), so UBI will relocate read-only blocks anyway (due to read disturbances), I think the effect wont be too dramatic, but don't make me proof that ;-) So the idea was: - use a small u-boot (128kB) in the first PEB of the NAND (written with 1bit HW-ECC) that supports 4bit BCH How about using SPL here? I don't know the freescale universe but wonder if SPL is fixed to 2k. Building SPL with SW BCH in less than 2k seems not doable for me. SPL on i.MX31 is limited to 2kB so we can't use BCH 4 here, just as you guessed. - let it load a second u-boot (512kB) from the next 4 PEBs (written with 4bit BCH) - jump to the second u-boot and load the kernel from an UBI volume using 1bit HW-ECC again I did all that and it seemed to work just fine, but jumping to the second u-boot almost always crashes the system. In detail we do: - romboot loads the SPL (2kb) - SPL loads the first u-boot stage (which relocates and runs nicely) - the first u-boot 'boots' the second u-boot by loading it from the NAND - the second u-boot is loaded to the link address minus 2kB (for SPL) - this is the same for the first and the second u-boot (link address 0x87e0 - 0x800 = 0x87dff800) The offset is about 125MiB, current mainline code tells me, that the tt-01 board has just 128 MiB. It is likely your second uboot overwrites the code of your first one while copying. You should link your code to run at a far away address, maybe 0x8000 ;) We have 256MiB (not yet contributed). First u-boot is loaded to 0x87e0, then relocates to 0x8f... something. Second u-booot is loaded to 0x87e0 again and relocates to 0x8f..., the same locations for both, the second u-boot is verified in RAM before jumping to it. If I set a breakpoint in the do_go_exec() I can step right into the second u-boot. Well, it may be related to some freescale interna I do not know. However It is likely that you really overwrite the first u-boot version with the You'd be right for 128MiB! I'll try to crc32 the relocated area of the first u-boot, anyway. The strange thing is that the serial output does not show up unless I set breakpoints. This might be pointing to some clock setup problem?! Thx for caring, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [u-boot] Adding missing CONFIG_SYS_CACHELINE_SIZE to boards definitions
On 10/04/2012 09:18 AM, Lukasz Majewski wrote:
Hi Jens and Helmut,
On Thu, Aug 23, 2012 at 10:13:13PM -, Lukasz Majewski wrote:
The restoration of GPT table (both primary and secondary) is now
possible. Simple GUID generation is supported.
Signed-off-by: Lukasz Majewskil.majew...@samsung.com
Signed-off-by: Kyungmin Parkkyungmin.p...@samsung.com
While the changes are fine, tt01 and eb_cpux9k2 use CONFIG_PART_EFI
and do not set CONFIG_SYS_CACHELINE_SIZE and so fail to build after
this patch. tt01 is easily fixable (it relies on a non-exported
define elsewhere to 32) but the eb_cpu9k2 please contact the listed
board maintainer to get the define added.
Would it be possible to add the CONFIG_SYS_CACHELINE_SIZE
definition to ./include/configs/{tty01|eb_cpux9k2} boards definition?
It would help improving cache alignment and GPT development.
Thanks in advance
Hi Lukasz,
feel free to do the appropriate changes in the TT-01 platform code
(explicitly setting CACHELINE_SIZE), I'm currently too busy to do any
rebasing and testing on the board, we'll have to give it a time slice in
the near future (to have a few platform things changed) anyway.
Helmut
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Re: [U-Boot] [PATCH] mx31: add ARM11P power gating to get_reset_cause
On 02/16/2012 09:44 AM, Helmut Raiger wrote: Add missing reset reason 7 to get_reset_cause(). Signed-off-by: Helmut Raigerhelmut.rai...@hale.at --- arch/arm/cpu/arm1136/mx31/generic.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index d60afc9..8873fb7 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -210,6 +210,8 @@ static char *get_reset_cause(void) return WDOG; case 0x0006: return JTAG; + case 0x0007: + return ARM11P power gating; default: return unknown reset; } Please comment. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx31: add ARM11P power gating to get_reset_cause
On 03/07/2012 11:49 AM, Stefano Babic wrote: ??? I have applied the patch and I sent an applied to.. message. Which comment do you expect ? Hi Stefano, I received the applied to .. message at 11:16 today and this e-mail at 11:49, the patch is from 3-weeks ago. I just wanted to push it, no more. Might have been an e-mail glitch? Thanx anyway, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 2/3] tt01: add video support
The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Make get_cpu_rev() publicly available (added to sys_proto.h).
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: added prototype for get_cpu_rev().
arch/arm/include/asm/arch-mx31/sys_proto.h |1 +
board/hale/tt01/tt01.c | 21
include/configs/tt01.h | 29 +++-
3 files changed, 50 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h
b/arch/arm/include/asm/arch-mx31/sys_proto.h
index ded481c..f3fa04d 100644
--- a/arch/arm/include/asm/arch-mx31/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -32,4 +32,5 @@ struct mxc_weimcs {
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
int mxc_mmc_init(bd_t *bis);
+u32 get_cpu_rev(void);
#endif
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index ed3fa6e..02e75ed 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -228,3 +228,24 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+ u32 srev = get_cpu_rev();
+
+ switch (line_number) {
+ case 2:
+ sprintf(info, CPU : Freescale i.MX31 rev %d.%d%s at %d MHz,
+ (srev 0xF0) 4, (srev 0x0F),
+ ((srev 0x8000) ? unknown : ),
+ mxc_get_clock(MXC_ARM_CLK) / 100);
+ break;
+ case 3:
+ strcpy(info, BOARD_STRING);
+ break;
+ default:
+ info[0] = 0;
+ }
+}
+#endif
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index fda5d6c..2e83cb2 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -185,6 +185,23 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_MXC_MMC
#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
+
+/* video support */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_MX3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_CONSOLE_EXTRA_INFO /* display additional board info */
+#define CONFIG_VGA_AS_SINGLE_DEVICE /* display is an output only device */
+/* allow stdin, stdout and stderr variables to redirect output */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/* allow decompressing max. 4MB */
+#define CONFIG_VIDEO_BMP_GZIP
+/* this is not only used by cfb_console.c for the logo, but also in cmd_bmp.c
*/
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (4*1024*1024)
+
/*
* Command definition
*/
@@ -201,6 +218,7 @@
* the NAND_CMD_LOCK_STATUS command, however the NFC of i.MX31 supports
* a software locking scheme.
*/
+#define CONFIG_CMD_BMP
#define CONFIG_BOOTDELAY 3
@@ -208,9 +226,18 @@
* currently a default setting for booting via script is implemented
* set user to login name and serverip to tftp host, define your
* boot behaviour in bootscript.loginname
+ *
+ * TT-01 board specific TFT setup (used by drivers/video/mx3fb.c)
+ *
+ * This set-up is for the L5F30947T04 by Epson, which is
+ * 800x480, 33MHz pixel clock, 60Hz vsync, 31.6kHz hsync
+ * sync must be set to: DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL
*/
#defineCONFIG_EXTRA_ENV_SETTINGS \
- bootcmd=dhcp bootscript.$(user); source\0
+videomode=epson\0 \
+epson=video=ctfb:x:800,y:480,depth:16,mode:0,pclk:30076, \
+ le:215,ri:1,up:32,lo:13,hs:7,vs:10,sync:100663296,vmode:0\0 \
+bootcmd=dhcp bootscript.$(user); source\0
#define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */
#define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */
--
1.7.4.4
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[U-Boot] [PATCH] mx31: add ARM11P power gating to get_reset_cause
Add missing reset reason 7 to get_reset_cause(). Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- arch/arm/cpu/arm1136/mx31/generic.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c index d60afc9..8873fb7 100644 --- a/arch/arm/cpu/arm1136/mx31/generic.c +++ b/arch/arm/cpu/arm1136/mx31/generic.c @@ -210,6 +210,8 @@ static char *get_reset_cause(void) return WDOG; case 0x0006: return JTAG; + case 0x0007: + return ARM11P power gating; default: return unknown reset; } -- 1.7.4.4 -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/3] imx31: tt01: fix hush parser config, add release config
On 01/30/2012 03:21 PM, Helmut Raiger wrote: Add PREBOOT, SILENT_CONSOLE and DEVICE_NULLDEV for release build. Fixed bug in CONFIG_SYS_HUSH_PARSER define. Signed-off-by: Helmut Raigerhelmut.rai...@hale.at Stefano, please comment, it's only board specific. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] tt01: add video support and setup for release
This enables the display on tt-01 along with some minor setup changes (and fixes) for the release. I removed the HALE logo again, using preboot we can use a splash image like approach, but left in the console extra info as it provides useful information even if the screen is used as stdout. [PATCH 1/3] tt01: fix environment size [PATCH 2/3] tt01: add video support [PATCH 3/3] tt01: fix hush parser config, add release config -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] tt01: add video support
The video setup for the Epson display is provided. Addtionally
some extra info is displayed next to the Linux logo.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
board/hale/tt01/tt01.c | 21 +
include/configs/tt01.h | 29 -
2 files changed, 49 insertions(+), 1 deletions(-)
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index ed3fa6e..02e75ed 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -228,3 +228,24 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+ u32 srev = get_cpu_rev();
+
+ switch (line_number) {
+ case 2:
+ sprintf(info, CPU : Freescale i.MX31 rev %d.%d%s at %d MHz,
+ (srev 0xF0) 4, (srev 0x0F),
+ ((srev 0x8000) ? unknown : ),
+ mxc_get_clock(MXC_ARM_CLK) / 100);
+ break;
+ case 3:
+ strcpy(info, BOARD_STRING);
+ break;
+ default:
+ info[0] = 0;
+ }
+}
+#endif
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index 8dd657c..a3b90d5 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -185,6 +185,23 @@
#define CONFIG_GENERIC_MMC
#define CONFIG_MXC_MMC
#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
+
+/* video support */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_MX3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_CONSOLE_EXTRA_INFO /* display additional board info */
+#define CONFIG_VGA_AS_SINGLE_DEVICE /* display is an output only device */
+/* allow stdin, stdout and stderr variables to redirect output */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/* allow decompressing max. 4MB */
+#define CONFIG_VIDEO_BMP_GZIP
+/* this is not only used by cfb_console.c for the logo, but also in cmd_bmp.c
*/
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (4*1024*1024)
+
/*
* Command definition
*/
@@ -201,6 +218,7 @@
* the NAND_CMD_LOCK_STATUS command, however the NFC of i.MX31 supports
* a software locking scheme.
*/
+#define CONFIG_CMD_BMP
#define CONFIG_BOOTDELAY 3
@@ -208,9 +226,18 @@
* currently a default setting for booting via script is implemented
* set user to login name and serverip to tftp host, define your
* boot behaviour in bootscript.loginname
+ *
+ * TT-01 board specific TFT setup (used by drivers/video/mx3fb.c)
+ *
+ * This set-up is for the L5F30947T04 by Epson, which is
+ * 800x480, 33MHz pixel clock, 60Hz vsync, 31.6kHz hsync
+ * sync must be set to: DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL
*/
#defineCONFIG_EXTRA_ENV_SETTINGS \
- bootcmd=dhcp bootscript.$(user); source\0
+videomode=epson\0 \
+epson=video=ctfb:x:800,y:480,depth:16,mode:0,pclk:30076, \
+ le:215,ri:1,up:32,lo:13,hs:7,vs:10,sync:100663296,vmode:0\0 \
+bootcmd=dhcp bootscript.$(user); source\0
#define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */
#define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */
--
1.7.4.4
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[U-Boot] [PATCH 1/3] tt01: fix environment size
size of environment must match erasable block size in the flash. Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- include/configs/tt01.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/include/configs/tt01.h b/include/configs/tt01.h index 6846816..8dd657c 100644 --- a/include/configs/tt01.h +++ b/include/configs/tt01.h @@ -131,7 +131,7 @@ #define CONFIG_ENV_IS_IN_FLASH #define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE(8 * 1024) /* smaller for faster access */ +#define CONFIG_ENV_SIZE(128 * 1024) /* Address and size of Redundant Environment Sector*/ #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) -- 1.7.4.4 -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] tt01: fix hush parser config, add release config
Add PREBOOT, SILENT_CONSOLE and DEVICE_NULLDEV for release
build. Fixed bug in CONFIG_SYS_HUSH_PARSER define.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
include/configs/tt01.h | 11 ---
1 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index a3b90d5..c5bfe5f 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -191,11 +191,16 @@
#define CONFIG_VIDEO_MX3
#define CONFIG_CFB_CONSOLE
#define CONFIG_VIDEO_LOGO
+/* splash image won't work with NAND boot, use preboot script */
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_CONSOLE_EXTRA_INFO /* display additional board info */
#define CONFIG_VGA_AS_SINGLE_DEVICE /* display is an output only device */
+
/* allow stdin, stdout and stderr variables to redirect output */
#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define CONFIG_SILENT_CONSOLE /* UARTs used externally (release) */
+#define CONFIG_SYS_DEVICE_NULLDEV /* allow console to be turned off */
+#define CONFIG_PREBOOT
/* allow decompressing max. 4MB */
#define CONFIG_VIDEO_BMP_GZIP
@@ -237,14 +242,14 @@
videomode=epson\0 \
epson=video=ctfb:x:800,y:480,depth:16,mode:0,pclk:30076, \
le:215,ri:1,up:32,lo:13,hs:7,vs:10,sync:100663296,vmode:0\0 \
-bootcmd=dhcp bootscript.$(user); source\0
+bootcmd=dhcp bootscript.${user}; source\0
#define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */
#define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */
/* Miscellaneous configurable options */
-#define CONFIG_HUSH_PARSER
-#define CONFIG_PROMPT_HUSH_PS2
+#define CONFIG_SYS_HUSH_PARSER
+#define CONFIG_SYS_PROMPT_HUSH_PS2
#define CONFIG_SYS_LONGHELP/* undef to save memory */
#define CONFIG_SYS_PROMPT TT01
--
1.7.4.4
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[U-Boot] Fwd: Re: U-Boot not auto booting
On 01/18/2012 04:09 AM, Michael Aldridge wrote: the autobooting function of uboot is not functioning properly on my sheevaplug with debian. I have set the bootcmd and bootdelay variables, but I still can't get it to work. I can watch the countdown hit zero, and I do not hit any buttons and then the whole process just stops at the prompt. If I disconnect the serial cable from the computer, it still fails to proceed with the boot process. Below is the dump of 'printenv' any suggestions? Marvell printenv autostart=yes baudrate=115200 bootargs=console=ttyS0,115200 bootargs_console=console=ttyS0,115200 bootcmd=setenv bootargs $(bootargs_console); run bootcmd_mmc; bootm 0x0080 0x0110 bootcmd_mmc=mmc init; ext2load mmc 0:1 0x0080 /uImage; ext2load mmc 0:1 0x0110 /uInitrd Can you load your uImage and uInitrd from the mmc? What version of uboot are you running? Nowadays 'mmc init' is 'mmc rescan'. Try to type the commands individually: $ mmc rescan $ ext2load mmc 0:1 0x /uImage $ ext2load mmc 0:1 0x /uInitrd $ bootm and see where it stops working. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] tt01: add MMC and video support -- howto avoid LOGO blobs
On 11/14/2011 12:21 PM, Stefano Babic wrote:
index
..efdbb4d097abb7ba7ac69e6960030ecb7e19e3cc
GIT binary patch
literal 27238
zcmeHOy^Acz5uaWoLJ0ZujP@0PdgP#8He4unIaT(SOx7YM9CSOO=;nM0*c491zk
znZd!sT%ZS3tk12n3Q7gFf_Vg~|0{Hvh9UuW8R_dxre6UW@oymKYsPAuCDH$
zd-b))Z)7a56j}CN-2EGWKgM64%{l%1kF)IQLjE`bmuJtOWir@qwL9FX8Xy?0?U`
zb~(4`@eWCyT$V@(!c!hN%r(-KgyoG^-}h?KmIEF1JeHc(E{lw||g*{M(;r|M}um
...but I am asking myself if it makes sense to add all these blobs to
U-Boot.
I know there are other examples in U_Boot, it is not bad they are only a
few. I do not know if this should be competence for the video maintainer
or generally for the project, so I added both custodians. By the way,
should it not possible to get what you want with CONFIG_CMD_BMP (you
have already set it) and CONFIG_PREBOOT to load your image from the
media you prefer (and you could also exchange it without recompiling
U-Boot) instead of adding it to the U-Boot image ?
Best regards,
Stefano Babi
Hi,
I tried to walk the preboot path, but it seems I can't get what I want.
CONFIG_VIDEO_LOGO leaves some space on the top left area of the display
for the logo AND the scrolling of the text (console redirected to VGA)
avoids this area.
Using CONFIG_CONSOLE_EXTRA_INFO places the data on the right side of
the logo (which again is not scrolled).
The only way I can think of to avoid blobs like our logo is to patch
cfb_console.c
to allow something like:
#define CONFIG_VIDEO_NO_LOGO(w)(w == 0 ? 100 : 200)
#ifdef CONFIG_VIDEO_NO_LOGO
#define VIDEO_LOGO_WIDTHCONFIG_VIDEO_NO_LOGO(0)
#define VIDEO_LOGO_HEIGHTCONFIG_VIDEO_NO_LOGO(1)
#else ... other cases
(or use 3 macros), then use preboot to display the logo where it is
supposed to be.
Still the extra info can't be put to the area right to the logo (to
prevent it to be scrolled away).
Any suggestions?
Helmut
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[U-Boot] [PATCH V3 1/2] mc13783.h: create and add regulator mode 0 and 1
Add bit definitions for register 32 and 33 of Freescale MC13783. Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- V3: moved change from fsl_pmic.h to mc13783.h (mc13892 differs!) V2: pmic_reg_(read|write) use constants from fsl_pmic.h now include/mc13783.h | 80 + 1 files changed, 80 insertions(+), 0 deletions(-) create mode 100644 include/mc13783.h diff --git a/include/mc13783.h b/include/mc13783.h new file mode 100644 index 000..5e41c3e --- /dev/null +++ b/include/mc13783.h @@ -0,0 +1,80 @@ +/* + * (C) Copyright 2011 + * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + + +#ifndef __MC13783_H__ +#define __MC13783_H__ + +/* REG_MODE_0 */ +#define VAUDIOEN (1 0) +#define VAUDIOSTBY (1 1) +#define VAUDIOMODE (1 2) +#define VIOHIEN(1 3) +#define VIOHISTBY (1 4) +#define VIOHIMODE (1 5) +#define VIOLOEN(1 6) +#define VIOLOSTBY (1 7) +#define VIOLOMODE (1 8) +#define VDIGEN (1 9) +#define VDIGSTBY (1 10) +#define VDIGMODE (1 11) +#define VGENEN (1 12) +#define VGENSTBY (1 13) +#define VGENMODE (1 14) +#define VRFDIGEN (1 15) +#define VRFDIGSTBY (1 16) +#define VRFDIGMODE (1 17) +#define VRFREFEN (1 18) +#define VRFREFSTBY (1 19) +#define VRFREFMODE (1 20) +#define VRFCPEN(1 21) +#define VRFCPSTBY (1 22) +#define VRFCPMODE (1 23) + +/* REG_MODE_1 */ +#define VSIMEN (1 0) +#define VSIMSTBY (1 1) +#define VSIMMODE (1 2) +#define VESIMEN(1 3) +#define VESIMSTBY (1 4) +#define VESIMMODE (1 5) +#define VCAMEN (1 6) +#define VCAMSTBY (1 7) +#define VCAMMODE (1 8) +#define VRFBGEN(1 9) +#define VRFBGSTBY (1 10) +#define VVIBEN (1 11) +#define VRF1EN (1 12) +#define VRF1STBY (1 13) +#define VRF1MODE (1 14) +#define VRF2EN (1 15) +#define VRF2STBY (1 16) +#define VRF2MODE (1 17) +#define VMMC1EN(1 18) +#define VMMC1STBY (1 19) +#define VMMC1MODE (1 20) +#define VMMC2EN(1 21) +#define VMMC2STBY (1 22) +#define VMMC2MODE (1 23) + +#endif -- 1.7.4.4 -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 2/2] tt01: add MMC support
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V3: moved change from fsl_pmic.h to mc13783.h (mc13892 differs!)
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now
board/hale/tt01/tt01.c | 55 ++-
include/configs/tt01.h | 12 ++
2 files changed, 65 insertions(+), 2 deletions(-)
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 2995c8f..bcbe5ec 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -26,6 +26,8 @@
#include netdev.h
#include command.h
#include pmic.h
+#include fsl_pmic.h
+#include mc13783.h
#include asm/arch/clock.h
#include asm/arch/sys_proto.h
#include asm/io.h
@@ -175,8 +177,6 @@ int board_init(void)
int board_late_init(void)
{
- pmic_init();
-
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
#endif
@@ -190,6 +190,36 @@ int checkboard(void)
return 0;
}
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ u32 val;
+ struct pmic *p;
+
+ /*
+ * this is the first driver to use the pmic, so call
+ * pmic_init() here. board_late_init() is too late for
+ * the MMC driver.
+ */
+ pmic_init();
+ p = get_pmic();
+
+ /* configure pins for SDHC1 only */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+ /* turn on power V_MMC1 */
+ if (pmic_reg_read(p, REG_MODE_1, val) 0)
+ pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+ return mxc_mmc_init(bis);
+}
+#endif
+
int board_eth_init(bd_t *bis)
{
int rc = 0;
@@ -198,3 +228,24 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+ u32 srev = get_cpu_rev();
+
+ switch (line_number) {
+ case 2:
+ sprintf(info, CPU : Freescale i.MX31 rev %d.%d%s at %d MHz,
+ (srev 0xF0) 4, (srev 0x0F),
+ ((srev 0x8000) ? unknown : ),
+ mxc_get_clock(MXC_ARM_CLK) / 100);
+ break;
+ case 3:
+ strcpy(info, BOARD_STRING);
+ break;
+ default:
+ info[0] = 0;
+ }
+}
+#endif
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index a553712..6846816 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -180,6 +180,11 @@
#define CONFIG_SMC911X_BASE(CS4_BASE+0x20)
#define CONFIG_SMC911X_16_BIT
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
/*
* Command definition
*/
@@ -229,6 +234,13 @@
#define CONFIG_CMDLINE_EDITING
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
#define CONFIG_NAND_MXC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
--
1.7.4.4
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Re: [U-Boot] [PATCH V3 2/2] tt01: add MMC support
On 01/18/2012 01:37 PM, Stefano Babic wrote:
Hi Helmut,
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
This has nothing with MCC. Please extend your commit message to explain
you are also adding this feature.
I simply mixed in a different branch, which was not the intention, sorry
for the noise, I'll resend.
+{
+ u32 srev = get_cpu_rev();
+
+ switch (line_number) {
+ case 2:
+ sprintf(info, CPU : Freescale i.MX31 rev %d.%d%s at %d MHz,
+ (srev 0xF0) 4, (srev 0x0F),
+ ((srev 0x8000) ? unknown : ),
+ mxc_get_clock(MXC_ARM_CLK) / 100);
I know it is only one line, but it is not related to your board because
it is really print_cpuinfo() into a buffer. So this cpu part should be
moved into the SOC place (arch/arm/cpu/arm1136/mx31/generic.c).
However, which is the real reason to do that ? I have supposed that
setting video as stdout it is enough to redirect all output to the LCD,
and then the usual print_cpuinfo() works, without adding / duplicating
function that already use printf() for the output.
I do not see a lot of boards implementing video_get_info_str(), and I
understand that it is a way to customize the output. However, is it the
correct way ? Does print_cpuinfo() not work if redirect to the video ? I
have added Anatolji (video maintainer in CC) to get his opinion.
Best regards,
Stefano Babic
Actually the above is only a glitch, the output sits there since more
than a year (probably adjusted at some point).
I just didn't realize that print_cpuinfo does the same.
I'll be contributing the video stuff in one of the next patches for tt01
and fix it then, so thanks for your review, even though I'll remove it
from this patch.
Helmut
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[U-Boot] [PATCH V4] tt01: add MMC support
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V4: removed unrelated video_get_info_str() stuff
V3: moved change from fsl_pmic.h to mc13783.h (mc13892 differs!)
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now
board/hale/tt01/tt01.c | 34 --
include/configs/tt01.h | 12
2 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 2995c8f..ed3fa6e 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -26,6 +26,8 @@
#include netdev.h
#include command.h
#include pmic.h
+#include fsl_pmic.h
+#include mc13783.h
#include asm/arch/clock.h
#include asm/arch/sys_proto.h
#include asm/io.h
@@ -175,8 +177,6 @@ int board_init(void)
int board_late_init(void)
{
- pmic_init();
-
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
#endif
@@ -190,6 +190,36 @@ int checkboard(void)
return 0;
}
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ u32 val;
+ struct pmic *p;
+
+ /*
+ * this is the first driver to use the pmic, so call
+ * pmic_init() here. board_late_init() is too late for
+ * the MMC driver.
+ */
+ pmic_init();
+ p = get_pmic();
+
+ /* configure pins for SDHC1 only */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+ /* turn on power V_MMC1 */
+ if (pmic_reg_read(p, REG_MODE_1, val) 0)
+ pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+ return mxc_mmc_init(bis);
+}
+#endif
+
int board_eth_init(bd_t *bis)
{
int rc = 0;
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index a553712..6846816 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -180,6 +180,11 @@
#define CONFIG_SMC911X_BASE(CS4_BASE+0x20)
#define CONFIG_SMC911X_16_BIT
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
/*
* Command definition
*/
@@ -229,6 +234,13 @@
#define CONFIG_CMDLINE_EDITING
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
#define CONFIG_NAND_MXC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
--
1.7.4.4
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[U-Boot] [PATCH V2] tt01: add MMC support
Modification suggested by Stefano. [PATCH 1/2] fsl_pmic.h: add regulator mode 0 and 1 bits [PATCH 2/2] tt01: add MMC support -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] tt01: add MMC support
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: pmic_reg_(read|write) use constants from fsl_pmic.h now
board/hale/tt01/tt01.c | 54 ++-
include/configs/tt01.h | 12 ++
2 files changed, 64 insertions(+), 2 deletions(-)
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 2995c8f..10f4548 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -26,6 +26,7 @@
#include netdev.h
#include command.h
#include pmic.h
+#include fsl_pmic.h
#include asm/arch/clock.h
#include asm/arch/sys_proto.h
#include asm/io.h
@@ -175,8 +176,6 @@ int board_init(void)
int board_late_init(void)
{
- pmic_init();
-
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
#endif
@@ -190,6 +189,36 @@ int checkboard(void)
return 0;
}
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ u32 val;
+ struct pmic *p;
+
+ /*
+ * this is the first driver to use the pmic, so call
+ * pmic_init() here. board_late_init() is too late for
+ * the MMC driver.
+ */
+ pmic_init();
+ p = get_pmic();
+
+ /* configure pins for SDHC1 only */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+ /* turn on power V_MMC1 */
+ if (pmic_reg_read(p, REG_MODE_1, val) 0)
+ pmic_reg_write(p, REG_MODE_1, val | VMMC1EN);
+
+ return mxc_mmc_init(bis);
+}
+#endif
+
int board_eth_init(bd_t *bis)
{
int rc = 0;
@@ -198,3 +227,24 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+ u32 srev = get_cpu_rev();
+
+ switch (line_number) {
+ case 2:
+ sprintf(info, CPU : Freescale i.MX31 rev %d.%d%s at %d MHz,
+ (srev 0xF0) 4, (srev 0x0F),
+ ((srev 0x8000) ? unknown : ),
+ mxc_get_clock(MXC_ARM_CLK) / 100);
+ break;
+ case 3:
+ strcpy(info, BOARD_STRING);
+ break;
+ default:
+ info[0] = 0;
+ }
+}
+#endif
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index a553712..6846816 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -180,6 +180,11 @@
#define CONFIG_SMC911X_BASE(CS4_BASE+0x20)
#define CONFIG_SMC911X_16_BIT
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
/*
* Command definition
*/
@@ -229,6 +234,13 @@
#define CONFIG_CMDLINE_EDITING
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
#define CONFIG_NAND_MXC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
--
1.7.4.4
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[U-Boot] [PATCH 1/2] fsl_pmic.h: add regulator mode 0 and 1 bits
Add bit definitions for register 32 and 33 of Freescale PMIC.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
include/fsl_pmic.h | 52
1 files changed, 52 insertions(+), 0 deletions(-)
diff --git a/include/fsl_pmic.h b/include/fsl_pmic.h
index 742f2e1..17e7b82 100644
--- a/include/fsl_pmic.h
+++ b/include/fsl_pmic.h
@@ -102,6 +102,58 @@ enum {
PMIC_NUM_OF_REGS,
};
+/* REG_MODE_0 */
+#define VAUDIOEN (1 0)
+#define VAUDIOSTBY (1 1)
+#define VAUDIOMODE (1 2)
+#define VIOHIEN(1 3)
+#define VIOHISTBY (1 4)
+#define VIOHIMODE (1 5)
+#define VIOLOEN(1 6)
+#define VIOLOSTBY (1 7)
+#define VIOLOMODE (1 8)
+#define VDIGEN (1 9)
+#define VDIGSTBY (1 10)
+#define VDIGMODE (1 11)
+#define VGENEN (1 12)
+#define VGENSTBY (1 13)
+#define VGENMODE (1 14)
+#define VRFDIGEN (1 15)
+#define VRFDIGSTBY (1 16)
+#define VRFDIGMODE (1 17)
+#define VRFREFEN (1 18)
+#define VRFREFSTBY (1 19)
+#define VRFREFMODE (1 20)
+#define VRFCPEN(1 21)
+#define VRFCPSTBY (1 22)
+#define VRFCPMODE (1 23)
+
+/* REG_MODE_1 */
+#define VSIMEN (1 0)
+#define VSIMSTBY (1 1)
+#define VSIMMODE (1 2)
+#define VESIMEN(1 3)
+#define VESIMSTBY (1 4)
+#define VESIMMODE (1 5)
+#define VCAMEN (1 6)
+#define VCAMSTBY (1 7)
+#define VCAMMODE (1 8)
+#define VRFBGEN(1 9)
+#define VRFBGSTBY (1 10)
+#define VVIBEN (1 11)
+#define VRF1EN (1 12)
+#define VRF1STBY (1 13)
+#define VRF1MODE (1 14)
+#define VRF2EN (1 15)
+#define VRF2STBY (1 16)
+#define VRF2MODE (1 17)
+#define VMMC1EN(1 18)
+#define VMMC1STBY (1 19)
+#define VMMC1MODE (1 20)
+#define VMMC2EN(1 21)
+#define VMMC2STBY (1 22)
+#define VMMC2MODE (1 23)
+
/* REG_POWER_MISC */
#define GPO1EN (1 6)
#define GPO1STBY (1 7)
--
1.7.4.4
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Re: [U-Boot] [PATCH 2/2] imx: tt01: add MMC support
Hi, this is imx related, subject wasn't taken from the compose email. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3] mmc: access mxcmmc from mx31 boards
This is a resend of these patches http://patchwork.ozlabs.org/patch/122139/like this one http://patchwork.ozlabs.org/patch/122176/board support (including gfx) They are rebased to the current master and the board support only adds MMC as opposed to the original patch that added some gfx support as-well. The actual mmc patch was not changed since V2. -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] tt01: add MMC support
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. Config adds support for EXT2
and FAT.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
board/hale/tt01/tt01.c | 32 ++--
include/configs/tt01.h | 12
2 files changed, 42 insertions(+), 2 deletions(-)
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 2995c8f..4b6e770 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -175,8 +175,6 @@ int board_init(void)
int board_late_init(void)
{
- pmic_init();
-
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
#endif
@@ -190,6 +188,36 @@ int checkboard(void)
return 0;
}
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ u32 val;
+ struct pmic *p;
+
+ /*
+ * this is the first driver to use the pmic, so call
+ * pmic_init() here. board_late_init() is too late for
+ * the MMC driver.
+ */
+ pmic_init();
+ p = get_pmic();
+
+ /* configure pins for SDHC1 only */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+ /* turn on power V_MMC1, bit 18 is the VMMC1 enable */
+ if (pmic_reg_read(p, 33, val) 0)
+ pmic_reg_write(p, 33, val | 0x04);
+
+ return mxc_mmc_init(bis);
+}
+#endif
+
int board_eth_init(bd_t *bis)
{
int rc = 0;
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index a553712..6846816 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -180,6 +180,11 @@
#define CONFIG_SMC911X_BASE(CS4_BASE+0x20)
#define CONFIG_SMC911X_16_BIT
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
/*
* Command definition
*/
@@ -229,6 +234,13 @@
#define CONFIG_CMDLINE_EDITING
+/* MMC boot support */
+#define CONFIG_CMD_MMC
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+
#define CONFIG_NAND_MXC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_MAX_CHIPS 1
--
1.7.4.4
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[U-Boot] [PATCH 1/2] mmc: access mxcmmc from mx31 boards
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided. Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V3:
- rebased to current master
- added support in TT-01 board code for it (see other patch)
V2:
- uses mxc_get_clock() instead of old imx_get_XXX functions
- moved mx27 stuff to mxc_get_clock() aswell
arch/arm/cpu/arm1136/mx31/generic.c|1 +
arch/arm/cpu/arm926ejs/mx27/generic.c | 35 ---
arch/arm/include/asm/arch-mx27/clock.h | 22 +++--
arch/arm/include/asm/arch-mx31/clock.h |3 +-
arch/arm/include/asm/arch-mx31/imx-regs.h | 11
arch/arm/include/asm/arch-mx31/sys_proto.h |2 +-
drivers/mmc/mxcmmc.c |8 ++
7 files changed, 53 insertions(+), 29 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index f458281..d60afc9 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -101,6 +101,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_IPG_PERCLK:
case MXC_CSPI_CLK:
case MXC_UART_CLK:
+ case MXC_ESDHC_CLK:
return mx31_get_ipg_clk();
case MXC_IPU_CLK:
return mx31_get_hsp_clk();
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 222a8e9..8964a75 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -23,6 +23,7 @@
#include netdev.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -34,7 +35,7 @@
* f = 2 * f_ref *
*pd + 1
*/
-unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
+static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
{
unsigned int mfi = (pll 10) 0xf;
unsigned int mfn = pll 0x3ff;
@@ -64,7 +65,7 @@ static ulong clk_in_26m(void)
}
}
-ulong imx_get_mpllclk(void)
+static ulong imx_get_mpllclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -78,7 +79,7 @@ ulong imx_get_mpllclk(void)
return imx_decode_pll(readl(pll-mpctl0), fref);
}
-ulong imx_get_armclk(void)
+static ulong imx_get_armclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -93,7 +94,7 @@ ulong imx_get_armclk(void)
return lldiv(fref, div);
}
-ulong imx_get_ahbclk(void)
+static ulong imx_get_ahbclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -105,7 +106,7 @@ ulong imx_get_ahbclk(void)
return lldiv(fref * 2, 3 * div);
}
-ulong imx_get_spllclk(void)
+static __attribute__((unused)) ulong imx_get_spllclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -124,34 +125,50 @@ static ulong imx_decode_perclk(ulong div)
return lldiv((imx_get_mpllclk() * 2), (div * 3));
}
-ulong imx_get_perclk1(void)
+static ulong imx_get_perclk1(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk((readl(pll-pcdr1) 0x3f) + 1);
}
-ulong imx_get_perclk2(void)
+static ulong imx_get_perclk2(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk(((readl(pll-pcdr1) 8) 0x3f) + 1);
}
-ulong imx_get_perclk3(void)
+static __attribute__((unused)) ulong imx_get_perclk3(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk(((readl(pll-pcdr1) 16) 0x3f) + 1);
}
-ulong imx_get_perclk4(void)
+static __attribute__((unused)) ulong imx_get_perclk4(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk(((readl(pll-pcdr1) 24) 0x3f) + 1);
}
+unsigned int mxc_get_clock(enum mxc_clock clk)
+{
+ switch (clk) {
+ case MXC_ARM_CLK:
+ return imx_get_armclk();
+ case MXC_UART_CLK:
+ return imx_get_perclk1();
+ case MXC_FEC_CLK:
+ return imx_get_ahbclk();
+ case MXC_ESDHC_CLK:
+ return imx_get_perclk2();
+ }
+ return -1;
+}
+
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
diff --git a/arch/arm/include/asm/arch-mx27
Re: [U-Boot] [PATCH V2] imx: mmc: access mxcmmc from mx31 boards
On 11/07/2011 10:04 AM, Stefano Babic wrote: On 11/07/2011 08:59 AM, Helmut Raiger wrote: On 11/02/2011 08:02 AM, Helmut Raiger wrote: On 10/27/2011 02:19 PM, Helmut Raiger wrote: This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raigerhelmut.rai...@hale.at I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway. Helmut Hi Helmut, Anything amiss? Helmut I have seen your message regarding your patch tt01: add MMC and video support asking to ignore it, and I have ignored this patch, too I will review it soo - however, there is no use case for MMC on the i.MX31 until you submit a patch for your board supporting MMC. Best regards, Stefano Babic Hi, Stefano I don't want to be pushing, but this sits here since 3 weeks, can I be of some help? Concerning the TT-01 extension patch, I meant it has to wait until this patch is through. So if you don't like the idea of having a patch no-one is using, simply apply both of them. For your reference: http://patchwork.ozlabs.org/patch/122139/this one http://patchwork.ozlabs.org/patch/122176/board support extension Thanks in advance, Helmut Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] imx: mmc: access mxcmmc from mx31 boards
On 11/14/2011 11:55 AM, Stefano Babic wrote: On 11/14/2011 10:06 AM, Helmut Raiger wrote: Hi, Hi Helmut, Stefano I don't want to be pushing, but this sits here since 3 weeks, can I be of some help? in my answer I post the question about the fact there is no use case for this code until you will submit also the patch for your board adding MMC. So please resubmit both as patchset, else this single patch is as dead code, and this is not accepted in u-boot, even if it is a preparation for further patches - we cannot know if and then the follow up patches will be sent. Concerning the TT-01 extension patch, I meant it has to wait until this patch is through. No, we do not add code that is never compiled. And it is easier to see some problem in review if it is shown as the code is used. So if you don't like the idea of having a patch no-one is using, Yes, I do not like it. simply apply both of them. For your reference: http://patchwork.ozlabs.org/patch/122139/this one http://patchwork.ozlabs.org/patch/122176/board support extension Does it mean the last patch is ready for review ? Then I will go on with both. Best regards, Stefano Babic Hi Stefan, I will check the proposition you made for the board support extension (which removes the awkward HALE logo from the u-boot source tree, which didn't feel quite right when I was adding it.) So you may ignore these for now and I will send a patch set that contains both patches with your suggested changes. Thanx, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] imx: mmc: access mxcmmc from mx31 boards
On 11/02/2011 08:02 AM, Helmut Raiger wrote: On 10/27/2011 02:19 PM, Helmut Raiger wrote: This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raigerhelmut.rai...@hale.at I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway. Helmut Anything amiss? Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2] imx: mmc: access mxcmmc from mx31 boards
On 10/27/2011 02:19 PM, Helmut Raiger wrote: This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raigerhelmut.rai...@hale.at I just re-titled the patch to make it visible for the imx community, it concerns i.MX27 and i.MX31, so mmc: is probably the wrong category anyway. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mx31: NAND_SPL boot question for TT-01
Hi (Stefano), just a short question. I'd like to add NAND boot to the board support of our TT-01. I checked out the mx31pdk code and also found something in doc/README.SPL which does not seem to correspond. Before I head into the wrong direction again, is the mx31pdk implementation still hip? Thx, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V3 2/3] mx31: add ESD control registers
This allows to initialize DDR memory in C code.
Currently all mx31 boards use assembler code (lowlevel_init.S)
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: new in V2
V3: no changes
arch/arm/include/asm/arch-mx31/imx-regs.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index f487975..afdaa1c 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -522,6 +522,17 @@ struct mx31_weim {
struct mx31_weim_cscr cscr[6];
};
+/* ESD control registers */
+struct esdc_regs {
+ u32 ctl0;
+ u32 cfg0;
+ u32 ctl1;
+ u32 cfg1;
+ u32 misc;
+ u32 dly[5];
+ u32 dlyl;
+};
+
#endif
#define __REG(x) (*((volatile u32 *)(x)))
@@ -600,6 +611,8 @@ struct mx31_weim {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+#define ESDCTL_BASE_ADDR 0xB8001000
+
/* 13 fields of the upper CS control register */
#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
cnc, wsc, ew, wws, edc) \
--
1.7.4.4
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[U-Boot] [PATCH V3 3/3] mx31: Add board support for HALE TT-01
This adds basic board support for TT-01 based on the Bluetechnix i.MX31 SOM. Currently only NOR-Flash boot is implemented. Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- V2: - MAINTAINER updated and used board.cfg instead of Makefile change - eliminated config.mk - replaced __REG accessors (WEIM and ESD), this patch depends on http://patchwork.ozlabs.org/patch/116978/ - MACH_TYPE_TT01 setup standardized - removed dependency on mx31pdk low level code - reduced lowlevel_init.S to its minimum (AIPS setup only), moved DDR and clock setup to board_early_init_f() - some mulitiline comment cosmetics - added some comments to clarify the board setup (SYS_MONITOR_LEN, SYS_MALLOC_LEN) - removed definition of CONFIG_SYS_GBL_DATA_SIZE V3: - change to the new pmic interface, added board_late_init() for it. - use CONFIG_RTC_MC13XXX - minor cosmetic changes I've not investigated the DDR setup any further, it's pretty old and works. We'll re-check with the new hardware setup (currently under developement) which has a new RAM chip. MAINTAINERS |4 + board/hale/tt01/Makefile| 51 board/hale/tt01/lowlevel_init.S | 32 + board/hale/tt01/tt01.c | 200 ++ boards.cfg |1 + include/configs/tt01.h | 254 +++ 6 files changed, 542 insertions(+), 0 deletions(-) create mode 100644 board/hale/tt01/Makefile create mode 100644 board/hale/tt01/lowlevel_init.S create mode 100644 board/hale/tt01/tt01.c create mode 100644 include/configs/tt01.h diff --git a/MAINTAINERS b/MAINTAINERS index cd0dd91..62e016d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -757,6 +757,10 @@ Sandeep Paulraj s-paul...@ti.com davinci_dm365evmARM926EJS davinci_dm6467evm ARM926EJS +Helmut Raiger helmut.rai...@hale.at + + tt01i.MX31 + Linus Walleij linus.wall...@linaro.org integratorapvarious integratorcpvarious diff --git a/board/hale/tt01/Makefile b/board/hale/tt01/Makefile new file mode 100644 index 000..f6b2854 --- /dev/null +++ b/board/hale/tt01/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 HALE electronic helmut.rai...@hale.at +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o +COBJS := tt01.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/hale/tt01/lowlevel_init.S b/board/hale/tt01/lowlevel_init.S new file mode 100644 index 000..6e9dc80 --- /dev/null +++ b/board/hale/tt01/lowlevel_init.S @@ -0,0 +1,32 @@ +/* + * (C) Copyright 2009 Magnus Lilja lilja.mag...@gmail.com + * (C) Copyright 2011 Helmut Raiger helmut.rai...@hale.at + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA
[U-Boot] [PATCH V3 1/3] mx31: define pins and init for UART2 and CSPI3
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: no changes since V1
V3: fixed multiline comment, rebased to u-boot-imx
arch/arm/cpu/arm1136/mx31/devices.c | 15 +++
arch/arm/include/asm/arch-mx31/clock.h|1 +
arch/arm/include/asm/arch-mx31/imx-regs.h | 16
3 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/devices.c
b/arch/arm/cpu/arm1136/mx31/devices.c
index 1e7d48f..b42dac3 100644
--- a/arch/arm/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
@@ -38,7 +38,22 @@ void mx31_uart1_hw_init(void)
}
#endif
+#ifdef CONFIG_SYS_MX31_UART2
+void mx31_uart2_hw_init(void)
+{
+ /* setup pins for UART2 */
+ mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
+ mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
+ mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
+ mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
+}
+#endif
+
#ifdef CONFIG_MXC_SPI
+/*
+ * Note: putting several spi setups here makes no sense as they may differ
+ * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of
CSPI3)
+ */
void mx31_spi2_hw_init(void)
{
/* SPI2 */
diff --git a/arch/arm/include/asm/arch-mx31/clock.h
b/arch/arm/include/asm/arch-mx31/clock.h
index 3e22d9a..253a0e1 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -40,6 +40,7 @@ extern void mx31_set_pad(enum iomux_pins pin, u32 config);
extern void mx31_set_gpr(enum iomux_gp_func gp, char en);
void mx31_uart1_hw_init(void);
+void mx31_uart2_hw_init(void);
void mx31_spi2_hw_init(void);
void mxc_hw_watchdog_enable(void);
void mxc_hw_watchdog_reset(void);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 6ce008d..f487975 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -680,12 +680,23 @@ struct mx31_weim {
/* Register offsets based on IOMUXC_BASE */
/* 0x00 .. 0x7b */
+#define MUX_CTL_CSPI3_MISO 0x0c
+#define MUX_CTL_CSPI3_SCLK 0x0d
+#define MUX_CTL_CSPI3_SPI_RDY 0x0e
+#define MUX_CTL_CSPI3_MOSI 0x13
+
#define MUX_CTL_USBH2_DATA10x40
#define MUX_CTL_USBH2_DIR 0x44
#define MUX_CTL_USBH2_STP 0x45
#define MUX_CTL_USBH2_NXT 0x46
#define MUX_CTL_USBH2_DATA00x47
#define MUX_CTL_USBH2_CLK 0x4B
+
+#define MUX_CTL_TXD2 0x70
+#define MUX_CTL_RTS2 0x71
+#define MUX_CTL_CTS2 0x72
+#define MUX_CTL_RXD2 0x77
+
#define MUX_CTL_RTS1 0x7c
#define MUX_CTL_CTS1 0x7d
#define MUX_CTL_DTR_DCE1 0x7e
@@ -743,6 +754,11 @@ struct mx31_weim {
#define MUX_RTS1__UART1_RTS_B IOMUX_MODE(MUX_CTL_RTS1, MUX_CTL_FUNC)
#define MUX_CTS1__UART1_CTS_B IOMUX_MODE(MUX_CTL_CTS1, MUX_CTL_FUNC)
+#define MUX_RXD2__UART2_RXD_MUXIOMUX_MODE(MUX_CTL_RXD2, MUX_CTL_FUNC)
+#define MUX_TXD2__UART2_TXD_MUXIOMUX_MODE(MUX_CTL_TXD2, MUX_CTL_FUNC)
+#define MUX_RTS2__UART2_RTS_B IOMUX_MODE(MUX_CTL_RTS2, MUX_CTL_FUNC)
+#define MUX_CTS2__UART2_CTS_B IOMUX_MODE(MUX_CTL_CTS2, MUX_CTL_FUNC)
+
#define MUX_CSPI2_SS0__CSPI2_SS0_B IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_FUNC)
#define MUX_CSPI2_SS1__CSPI2_SS1_B IOMUX_MODE(MUX_CTL_CSPI2_SS1, MUX_CTL_FUNC)
#define MUX_CSPI2_SS2__CSPI2_SS2_B IOMUX_MODE(MUX_CTL_CSPI2_SS2, MUX_CTL_FUNC)
--
1.7.4.4
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[U-Boot] [PATCH V2] mmc: access mxcmmc from mx31 boards
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The i.MX27 imx_get_XXXclock functions are made static to
generic.c and a public mxc_get_clock() function
is provided. Pins, base address and prototypes for
an i.MX31 specific board_init_mmc() are provided.
Some of the i.MX27 clock getters are unused and marked
as such to avoid warnings (./MAKEALL -s mx27), but
the code was left in for future use.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
- uses mxc_get_clock() instead of old imx_get_XXX functions
- moved mx27 stuff to mxc_get_clock() aswell
arch/arm/cpu/arm1136/mx31/generic.c|1 +
arch/arm/cpu/arm926ejs/mx27/generic.c | 35 ---
arch/arm/include/asm/arch-mx27/clock.h | 22 +++--
arch/arm/include/asm/arch-mx31/clock.h |3 +-
arch/arm/include/asm/arch-mx31/imx-regs.h | 11
arch/arm/include/asm/arch-mx31/sys_proto.h |2 +-
drivers/mmc/mxcmmc.c |8 ++
7 files changed, 53 insertions(+), 29 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index 4f27e25..136d4c9 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -103,6 +103,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_IPG_PERCLK:
case MXC_CSPI_CLK:
case MXC_UART_CLK:
+ case MXC_ESDHC_CLK:
return mx31_get_ipg_clk();
case MXC_IPU_CLK:
return mx31_get_hsp_clk();
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c
b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 222a8e9..8964a75 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -23,6 +23,7 @@
#include netdev.h
#include asm/io.h
#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
#ifdef CONFIG_MXC_MMC
#include asm/arch/mxcmmc.h
#endif
@@ -34,7 +35,7 @@
* f = 2 * f_ref *
*pd + 1
*/
-unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
+static unsigned int imx_decode_pll(unsigned int pll, unsigned int f_ref)
{
unsigned int mfi = (pll 10) 0xf;
unsigned int mfn = pll 0x3ff;
@@ -64,7 +65,7 @@ static ulong clk_in_26m(void)
}
}
-ulong imx_get_mpllclk(void)
+static ulong imx_get_mpllclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -78,7 +79,7 @@ ulong imx_get_mpllclk(void)
return imx_decode_pll(readl(pll-mpctl0), fref);
}
-ulong imx_get_armclk(void)
+static ulong imx_get_armclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -93,7 +94,7 @@ ulong imx_get_armclk(void)
return lldiv(fref, div);
}
-ulong imx_get_ahbclk(void)
+static ulong imx_get_ahbclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -105,7 +106,7 @@ ulong imx_get_ahbclk(void)
return lldiv(fref * 2, 3 * div);
}
-ulong imx_get_spllclk(void)
+static __attribute__((unused)) ulong imx_get_spllclk(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
ulong cscr = readl(pll-cscr);
@@ -124,34 +125,50 @@ static ulong imx_decode_perclk(ulong div)
return lldiv((imx_get_mpllclk() * 2), (div * 3));
}
-ulong imx_get_perclk1(void)
+static ulong imx_get_perclk1(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk((readl(pll-pcdr1) 0x3f) + 1);
}
-ulong imx_get_perclk2(void)
+static ulong imx_get_perclk2(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk(((readl(pll-pcdr1) 8) 0x3f) + 1);
}
-ulong imx_get_perclk3(void)
+static __attribute__((unused)) ulong imx_get_perclk3(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk(((readl(pll-pcdr1) 16) 0x3f) + 1);
}
-ulong imx_get_perclk4(void)
+static __attribute__((unused)) ulong imx_get_perclk4(void)
{
struct pll_regs *pll = (struct pll_regs *)IMX_PLL_BASE;
return imx_decode_perclk(((readl(pll-pcdr1) 24) 0x3f) + 1);
}
+unsigned int mxc_get_clock(enum mxc_clock clk)
+{
+ switch (clk) {
+ case MXC_ARM_CLK:
+ return imx_get_armclk();
+ case MXC_UART_CLK:
+ return imx_get_perclk1();
+ case MXC_FEC_CLK:
+ return imx_get_ahbclk();
+ case MXC_ESDHC_CLK:
+ return imx_get_perclk2();
+ }
+ return -1;
+}
+
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
diff --git a/arch/arm/include/asm/arch-mx27/clock.h
b/arch/arm/include/asm/arch-mx27/clock.h
index 7e9c7aa..fd062d3 100644
--- a/arch/arm
Re: [U-Boot] [PATCH V2] cosmetic: s/BOARD_LATE_INIT/CONFIG_BOARD_LATE_INIT
On 10/20/2011 04:19 PM, Helmut Raiger wrote: This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT. Along the way it removes some leftover #define BOARD_LATE_INIT 1 and adds some basic documentation for board specific callbacks in README. Signed-off-by: Helmut Raigerhelmut.rai...@hale.at --- V2: added some docu in README Anything missing? Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] tt01: add MMC and video support
board_mmc_init() initializes the pins of SDHC1 and
turns on V_MMC1 of the PMIC. The video setup for
the Epson display is provided along with some fancy
extra info to be displayed next to the HALE logo.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V1: Note this requires http://patchwork.ozlabs.org/patch/122114/
board/hale/tt01/tt01.c | 53 ++-
include/configs/tt01.h | 41 -
tools/Makefile |3 ++
tools/logos/hale.bmp | Bin 0 - 27238 bytes
4 files changed, 94 insertions(+), 3 deletions(-)
create mode 100644 tools/logos/hale.bmp
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
index 2995c8f..2ab9df1 100644
--- a/board/hale/tt01/tt01.c
+++ b/board/hale/tt01/tt01.c
@@ -175,8 +175,6 @@ int board_init(void)
int board_late_init(void)
{
- pmic_init();
-
#ifdef CONFIG_HW_WATCHDOG
mxc_hw_watchdog_enable();
#endif
@@ -190,6 +188,36 @@ int checkboard(void)
return 0;
}
+#ifdef CONFIG_MXC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ u32 val;
+ struct pmic *p;
+
+ /*
+ * this is the first driver to use the pmic, so call
+ * pmic_init() here. board_late_init() is too late for
+ * the MMC driver.
+ */
+ pmic_init();
+ p = get_pmic();
+
+ /* configure pins for SDHC1 only */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CLK, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_CMD, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA0, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA1, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA2, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SD1_DATA3, MUX_CTL_FUNC));
+
+ /* turn on power V_MMC1, bit 18 is the VMMC1 enable */
+ if (pmic_reg_read(p, 33, val) 0)
+ pmic_reg_write(p, 33, val | 0x04);
+
+ return mxc_mmc_init(bis);
+}
+#endif
+
int board_eth_init(bd_t *bis)
{
int rc = 0;
@@ -198,3 +226,24 @@ int board_eth_init(bd_t *bis)
#endif
return rc;
}
+
+#ifdef CONFIG_CONSOLE_EXTRA_INFO
+void video_get_info_str(int line_number, char *info)
+{
+ u32 srev = get_cpu_rev();
+
+ switch (line_number) {
+ case 2:
+ sprintf(info, CPU : Freescale i.MX31 rev %d.%d%s at %d MHz,
+ (srev 0xF0) 4, (srev 0x0F),
+ ((srev 0x8000) ? unknown : ),
+ mxc_get_clock(MXC_ARM_CLK) / 100);
+ break;
+ case 3:
+ strcpy(info, BOARD_STRING);
+ break;
+ default:
+ info[0] = 0;
+ }
+}
+#endif
diff --git a/include/configs/tt01.h b/include/configs/tt01.h
index 4d7c7f4..243a597 100644
--- a/include/configs/tt01.h
+++ b/include/configs/tt01.h
@@ -180,6 +180,28 @@
#define CONFIG_SMC911X_BASE(CS4_BASE+0x20)
#define CONFIG_SMC911X_16_BIT
+/* mmc driver */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MXC_MMC
+#define CONFIG_MXC_MCI_REGS_BASE SDHC1_BASE_ADDR
+
+/* video support */
+#define CONFIG_VIDEO
+#define CONFIG_VIDEO_MX3
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_VIDEO_BMP_LOGO
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_CONSOLE_EXTRA_INFO /* display additional board info */
+#define CONFIG_VGA_AS_SINGLE_DEVICE /* display is an output only device */
+ /* allow stdin, stdout and stderr variables to redirect output */
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+
+/* allow decompressing max. 4MB */
+#define CONFIG_VIDEO_BMP_GZIP
+#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (4*1024*1024)
+
/*
* Command definition
*/
@@ -196,6 +218,7 @@
* the NAND_CMD_LOCK_STATUS command, however the NFC of i.MX31 supports
* a software locking scheme.
*/
+#define CONFIG_CMD_BMP 1
#define CONFIG_BOOTDELAY 3
@@ -203,9 +226,18 @@
* currently a default setting for booting via script is implemented
* set user to login name and serverip to tftp host, define your
* boot behaviour in bootscript.loginname
+ *
+ * TT-01 board specific TFT setup (used by drivers/video/mx3fb.c)
+ *
+ * This set-up is for the L5F30947T04 by Epson, which is
+ * 800x480, 33MHz pixel clock, 60Hz vsync, 31.6kHz hsync
+ * sync must be set to: DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL
*/
#defineCONFIG_EXTRA_ENV_SETTINGS \
- bootcmd=dhcp bootscript.$(user); source\0
+videomode=epson\0 \
+epson=video=ctfb:x:800,y:480,depth:16,mode:0,pclk:30076, \
+ le:215,ri:1,up:32,lo:13,hs:7,vs:10,sync:100663296,vmode:0\0 \
+bootcmd=dhcp bootscript.$(user); source\0
#define CONFIG_BOOTP_SERVERIP /* tftp serverip not overruled by dhcp server */
#define CONFIG_BOOTP_SEND_HOSTNAME /* if env-var 'hostname' is set, send it */
@@ -229,6 +261,13 @@
#define CONFIG_CMDLINE_EDITING
+/* MMC boot support */
+#define
Re: [U-Boot] [PATCH] tt01: add MMC and video support
On 10/27/2011 06:11 PM, Helmut Raiger wrote: board_mmc_init() initializes the pins of SDHC1 and turns on V_MMC1 of the PMIC. The video setup for the Epson display is provided along with some fancy extra info to be displayed next to the HALE logo. Signed-off-by: Helmut Raigerhelmut.rai...@hale.at --- V1: Note this requires http://patchwork.ozlabs.org/patch/122114/ board/hale/tt01/tt01.c | 53 ++- include/configs/tt01.h | 41 - tools/Makefile |3 ++ tools/logos/hale.bmp | Bin 0 - 27238 bytes 4 files changed, 94 insertions(+), 3 deletions(-) create mode 100644 tools/logos/hale.bmp Oops that was a bit early, the mmc patch http://patchwork.ozlabs.org/patch/122139/ is still under review. Helmut (pushing too hard) -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] mmc: access mxcmmc from mx31 boards
This patch modifies mxcmmc.c to be used
not only by i.MX27 but also by i.MX31 boards.
Both use the same SD controller, but have different
clock set-ups.
The clock access was renamed to imx_get_mmcclk() to
allow both architectures to provide their respective
clock. Pins, base address and prototypes for board_init_mmc()
are provided.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
arch/arm/cpu/arm1136/mx31/generic.c|5 +
arch/arm/include/asm/arch-mx27/clock.h |1 +
arch/arm/include/asm/arch-mx31/clock.h |1 +
arch/arm/include/asm/arch-mx31/imx-regs.h | 11 +++
arch/arm/include/asm/arch-mx31/sys_proto.h |3 ++-
drivers/mmc/mxcmmc.c |8 +++-
6 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index 7ab5631..3008099 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -99,6 +99,11 @@ u32 imx_get_uartclk(void)
return mxc_get_clock(MXC_UART_CLK);
}
+u32 imx_get_mmcclk(void)
+{
+ return mxc_get_clock(MXC_IPG_PERCLK);
+}
+
void mx31_gpio_mux(unsigned long mode)
{
unsigned long reg, shift, tmp;
diff --git a/arch/arm/include/asm/arch-mx27/clock.h
b/arch/arm/include/asm/arch-mx27/clock.h
index 7e9c7aa..2c078d5 100644
--- a/arch/arm/include/asm/arch-mx27/clock.h
+++ b/arch/arm/include/asm/arch-mx27/clock.h
@@ -38,5 +38,6 @@ ulong imx_get_ahbclk(void);
#define imx_get_uartclk imx_get_perclk1
#define imx_get_fecclk imx_get_ahbclk
+#define imx_get_mmcclk imx_get_perclk2
#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/include/asm/arch-mx31/clock.h
b/arch/arm/include/asm/arch-mx31/clock.h
index 0270d96..c420d63 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -34,6 +34,7 @@ enum mxc_clock {
unsigned int mxc_get_clock(enum mxc_clock clk);
extern u32 imx_get_uartclk(void);
+extern u32 imx_get_mmcclk(void);
extern void mx31_gpio_mux(unsigned long mode);
extern void mx31_set_pad(enum iomux_pins pin, u32 config);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index f7a39f1..448a2c8 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -646,6 +646,13 @@ struct esdc_regs {
#define MUX_CTL_CSPI3_SPI_RDY 0x0e
#define MUX_CTL_CSPI3_MOSI 0x13
+#define MUX_CTL_SD1_DATA1 0x18
+#define MUX_CTL_SD1_DATA2 0x19
+#define MUX_CTL_SD1_DATA3 0x1a
+#define MUX_CTL_SD1_CMD0x1d
+#define MUX_CTL_SD1_CLK0x1e
+#define MUX_CTL_SD1_DATA0 0x1f
+
#define MUX_CTL_USBH2_DATA10x40
#define MUX_CTL_USBH2_DIR 0x44
#define MUX_CTL_USBH2_STP 0x45
@@ -792,6 +799,10 @@ struct esdc_regs {
*/
#define NFC_BASE_ADDR 0xB800
+/* SD card controller */
+#define SDHC1_BASE_ADDR0x50004000
+#define SDHC2_BASE_ADDR0x50008000
+
/*
* Internal RAM (16KB)
*/
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h
b/arch/arm/include/asm/arch-mx31/sys_proto.h
index 7600303..bdce074 100644
--- a/arch/arm/include/asm/arch-mx31/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -31,5 +31,6 @@ struct mxc_weimcs {
};
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
-
+/* for mx27 in mxcmmc.h, but another file for a single prototype ? */
+int mxc_mmc_init(bd_t *bis);
#endif
diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c
index ab1fc82..fbceb46 100644
--- a/drivers/mmc/mxcmmc.c
+++ b/drivers/mmc/mxcmmc.c
@@ -25,9 +25,7 @@
#include mmc.h
#include asm/errno.h
#include asm/io.h
-#ifdef CONFIG_MX27
#include asm/arch/clock.h
-#endif
#define DRIVER_NAME mxc-mmc
@@ -422,7 +420,7 @@ static void mxcmci_set_clk_rate(struct mxcmci_host *host,
unsigned int clk_ios)
{
unsigned int divider;
int prescaler = 0;
- unsigned long clk_in = imx_get_perclk2();
+ unsigned long clk_in = imx_get_mmcclk();
while (prescaler = 0x800) {
for (divider = 1; divider = 0xF; divider++) {
@@ -508,8 +506,8 @@ static int mxcmci_initialize(bd_t *bis)
mmc-voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
- mmc-f_min = imx_get_perclk2() 7;
- mmc-f_max = imx_get_perclk2() 1;
+ mmc-f_min = imx_get_mmcclk() 7;
+ mmc-f_max = imx_get_mmcclk() 1;
mmc-b_max = 0;
--
1.7.4.4
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[U-Boot] [PATCH V2] misc: pmic: fix regression in pmic_fsl.c (SPI)
This fixes write access to PMIC registers, the bug was
introduced partly in commit 64aac65099 and in commit c9fe76dd91.
It was tested on an i.mx31 with a mc13783.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: threw in the wrong readback line in V1
drivers/misc/pmic_fsl.c |5 +
drivers/misc/pmic_spi.c |1 -
2 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/pmic_fsl.c b/drivers/misc/pmic_fsl.c
index b6e809a..0ff75ed 100644
--- a/drivers/misc/pmic_fsl.c
+++ b/drivers/misc/pmic_fsl.c
@@ -29,10 +29,7 @@
#if defined(CONFIG_PMIC_SPI)
static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
{
- if ((val == NULL) (write))
- return *val ~(1 31);
- else
- return (write 31) | (reg 25) | (*val 0x00FF);
+ return (write 31) | (reg 25) | (*val 0x00FF);
}
#endif
diff --git a/drivers/misc/pmic_spi.c b/drivers/misc/pmic_spi.c
index ff35377..e772884 100644
--- a/drivers/misc/pmic_spi.c
+++ b/drivers/misc/pmic_spi.c
@@ -76,7 +76,6 @@ static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32
write)
}
if (write) {
- pmic_tx = p-hw.spi.prepare_tx(0, NULL, write);
pmic_tx = ~(1 31);
tmp = cpu_to_be32(pmic_tx);
if (spi_xfer(slave, pmic_spi_bitlen, tmp, pmic_rx,
--
1.7.4.4
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[U-Boot] [Resend PATCH V2] misc: pmic: fix regression in pmic_fsl.c (SPI)
This fixes write access to PMIC registers, the bug was
introduced partly in commit 64aac65099 and in commit c9fe76dd91.
It was tested on an i.mx31 with a mc13783.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: threw in the wrong read back line (again and again)
drivers/misc/pmic_fsl.c |5 +
drivers/misc/pmic_spi.c |3 +--
2 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/misc/pmic_fsl.c b/drivers/misc/pmic_fsl.c
index b6e809a..0ff75ed 100644
--- a/drivers/misc/pmic_fsl.c
+++ b/drivers/misc/pmic_fsl.c
@@ -29,10 +29,7 @@
#if defined(CONFIG_PMIC_SPI)
static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
{
- if ((val == NULL) (write))
- return *val ~(1 31);
- else
- return (write 31) | (reg 25) | (*val 0x00FF);
+ return (write 31) | (reg 25) | (*val 0x00FF);
}
#endif
diff --git a/drivers/misc/pmic_spi.c b/drivers/misc/pmic_spi.c
index ff35377..5a0dd22 100644
--- a/drivers/misc/pmic_spi.c
+++ b/drivers/misc/pmic_spi.c
@@ -76,8 +76,7 @@ static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32
write)
}
if (write) {
- pmic_tx = p-hw.spi.prepare_tx(0, NULL, write);
- pmic_tx = ~(1 31);
+ pmic_tx = p-hw.spi.prepare_tx(reg, val, 0);
tmp = cpu_to_be32(pmic_tx);
if (spi_xfer(slave, pmic_spi_bitlen, tmp, pmic_rx,
pmic_spi_flags)) {
--
1.7.4.4
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[U-Boot] BOARD_LATE_INIT - CONFIG_BOARD_LATE_INIT
Hi, is there a sound reason, why BOARD_LATE_INIT isn't named like other CONFIG options? I'm inclined to fix this as it took me some time to find out why my board_late_init() wasn't called. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] cosmetic: s/BOARD_LATE_INIT/CONFIG_BOARD_LATE_INIT
This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT.
Alongside it removes some leftover
#define BOARD_LATE_INIT1
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
arch/arm/lib/board.c |2 +-
arch/sandbox/lib/board.c |2 +-
arch/sh/lib/board.c |2 +-
board/freescale/mx35pdk/mx35pdk.c|4 ++--
board/freescale/mx51evk/mx51evk.c|2 +-
board/imx31_phycore/imx31_phycore.c |2 +-
board/st-ericsson/u8500/u8500_href.c |4 ++--
include/configs/VCMA9.h |2 +-
include/configs/cerf250.h|2 +-
include/configs/colibri_pxa270.h |2 +-
include/configs/efikamx.h|2 +-
include/configs/imx31_phycore.h |2 +-
include/configs/jadecpu.h|2 +-
include/configs/lubbock.h|2 +-
include/configs/ms7750se.h |2 +-
include/configs/mx1ads.h |2 +-
include/configs/mx31pdk.h|2 +-
include/configs/mx35pdk.h|2 +-
include/configs/mx51evk.h|2 +-
include/configs/mx53evk.h|2 +-
include/configs/nhk8815.h|2 +-
include/configs/pleb2.h |2 +-
include/configs/pxa255_idp.h |2 +-
include/configs/qong.h |2 +-
include/configs/r2dplus.h|2 +-
include/configs/sh7757lcr.h |2 +-
include/configs/trizepsiv.h |2 +-
include/configs/tx25.h |2 +-
include/configs/u8500_href.h |2 +-
include/configs/vision2.h|2 +-
include/configs/xaeniax.h|2 +-
include/configs/zipitz2.h|2 +-
include/configs/zmx25.h |2 +-
33 files changed, 35 insertions(+), 35 deletions(-)
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 1fe3751..29dd348 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -578,7 +578,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
copy_filename(BootFile, s, sizeof(BootFile));
#endif
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
board_late_init();
#endif
diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c
index 1fd8fa6..ae5a517 100644
--- a/arch/sandbox/lib/board.c
+++ b/arch/sandbox/lib/board.c
@@ -250,7 +250,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
/* enable exceptions */
enable_interrupts();
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
board_late_init();
#endif
diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c
index 6148e6b..d9c0c22 100644
--- a/arch/sh/lib/board.c
+++ b/arch/sh/lib/board.c
@@ -141,7 +141,7 @@ init_fnc_t *init_sequence[] =
stdio_init,
console_init_r,
interrupt_init,
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
#endif
#if defined(CONFIG_CMD_NET)
diff --git a/board/freescale/mx35pdk/mx35pdk.c
b/board/freescale/mx35pdk/mx35pdk.c
index 9eefe5e..155b9ff 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -38,8 +38,8 @@
#include asm/arch/sys_proto.h
#include netdev.h
-#ifndef BOARD_LATE_INIT
-#error BOARD_LATE_INIT must be set for this board
+#ifndef CONFIG_BOARD_LATE_INIT
+#error CONFIG_BOARD_LATE_INIT must be set for this board
#endif
#ifndef CONFIG_BOARD_EARLY_INIT_F
diff --git a/board/freescale/mx51evk/mx51evk.c
b/board/freescale/mx51evk/mx51evk.c
index 8da1ee8..f998610 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -409,7 +409,7 @@ int board_init(void)
return 0;
}
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_MXC_SPI
diff --git a/board/imx31_phycore/imx31_phycore.c
b/board/imx31_phycore/imx31_phycore.c
index 773900e..47f1a8d 100644
--- a/board/imx31_phycore/imx31_phycore.c
+++ b/board/imx31_phycore/imx31_phycore.c
@@ -74,7 +74,7 @@ int board_early_init_f(void)
return 0;
}
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_S6E63D6
diff --git a/board/st-ericsson/u8500/u8500_href.c
b/board/st-ericsson/u8500/u8500_href.c
index 9283fab..5f85fdc 100644
--- a/board/st-ericsson/u8500/u8500_href.c
+++ b/board/st-ericsson/u8500/u8500_href.c
@@ -226,7 +226,7 @@ unsigned int addr_vall_arr[] = {
0xA03FE024, 0x /* USB */
};
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
#ifdef CONFIG_MMC
#define LDO_VAUX3_MASK 0x3
@@ -351,7 +351,7 @@ int board_late_init(void)
return 0;
}
-#endif /* BOARD_LATE_INIT */
+#endif /* CONFIG_BOARD_LATE_INIT */
static void early_gpio_setup(struct gpio_register *gpio_reg, u32 bits)
{
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 183045b..8b8113d 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -76,7 +76,7 @@
#define CONFIG_CMD_BSP
[U-Boot] [PATCH V2] cosmetic: s/BOARD_LATE_INIT/CONFIG_BOARD_LATE_INIT
This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT.
Along the way it removes some leftover
#define BOARD_LATE_INIT1
and adds some basic documentation for board specific
callbacks in README.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: added some docu in README
README | 14 ++
arch/arm/lib/board.c |2 +-
arch/sandbox/lib/board.c |2 +-
arch/sh/lib/board.c |2 +-
board/freescale/mx35pdk/mx35pdk.c|4 ++--
board/freescale/mx51evk/mx51evk.c|2 +-
board/imx31_phycore/imx31_phycore.c |2 +-
board/st-ericsson/u8500/u8500_href.c |4 ++--
include/configs/VCMA9.h |2 +-
include/configs/cerf250.h|2 +-
include/configs/colibri_pxa270.h |2 +-
include/configs/efikamx.h|2 +-
include/configs/imx31_phycore.h |2 +-
include/configs/jadecpu.h|2 +-
include/configs/lubbock.h|2 +-
include/configs/ms7750se.h |2 +-
include/configs/mx1ads.h |2 +-
include/configs/mx31pdk.h|2 +-
include/configs/mx35pdk.h|2 +-
include/configs/mx51evk.h|2 +-
include/configs/mx53evk.h|2 +-
include/configs/nhk8815.h|2 +-
include/configs/pleb2.h |2 +-
include/configs/pxa255_idp.h |2 +-
include/configs/qong.h |2 +-
include/configs/r2dplus.h|2 +-
include/configs/sh7757lcr.h |2 +-
include/configs/trizepsiv.h |2 +-
include/configs/tx25.h |2 +-
include/configs/u8500_href.h |2 +-
include/configs/vision2.h|2 +-
include/configs/xaeniax.h|2 +-
include/configs/zipitz2.h|2 +-
include/configs/zmx25.h |2 +-
34 files changed, 49 insertions(+), 35 deletions(-)
diff --git a/README b/README
index eb9ade9..5b36b55 100644
--- a/README
+++ b/README
@@ -2388,6 +2388,20 @@ Modem Support:
See also: doc/README.Modem
+Board initialization settings:
+--
+
+During Initialization u-boot calls a number of board specific functions
+to allow the preparation of board specific prerequisites, e.g. pin setup
+before drivers are initialized. To enable these callbacks the
+following configuration macros have to be defined. Currently this is
+architecture specific, so please check arch/your_architecture/lib/board.c
+typically in board_init_f() and board_init_r().
+
+- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
+- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
+- CONFIG_BOARD_LATE_INIT: Call board_late_init()
+- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
Configuration Settings:
---
diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c
index 1fe3751..29dd348 100644
--- a/arch/arm/lib/board.c
+++ b/arch/arm/lib/board.c
@@ -578,7 +578,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
copy_filename(BootFile, s, sizeof(BootFile));
#endif
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
board_late_init();
#endif
diff --git a/arch/sandbox/lib/board.c b/arch/sandbox/lib/board.c
index 1fd8fa6..ae5a517 100644
--- a/arch/sandbox/lib/board.c
+++ b/arch/sandbox/lib/board.c
@@ -250,7 +250,7 @@ void board_init_r(gd_t *id, ulong dest_addr)
/* enable exceptions */
enable_interrupts();
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
board_late_init();
#endif
diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c
index 6148e6b..d9c0c22 100644
--- a/arch/sh/lib/board.c
+++ b/arch/sh/lib/board.c
@@ -141,7 +141,7 @@ init_fnc_t *init_sequence[] =
stdio_init,
console_init_r,
interrupt_init,
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
#endif
#if defined(CONFIG_CMD_NET)
diff --git a/board/freescale/mx35pdk/mx35pdk.c
b/board/freescale/mx35pdk/mx35pdk.c
index 9eefe5e..155b9ff 100644
--- a/board/freescale/mx35pdk/mx35pdk.c
+++ b/board/freescale/mx35pdk/mx35pdk.c
@@ -38,8 +38,8 @@
#include asm/arch/sys_proto.h
#include netdev.h
-#ifndef BOARD_LATE_INIT
-#error BOARD_LATE_INIT must be set for this board
+#ifndef CONFIG_BOARD_LATE_INIT
+#error CONFIG_BOARD_LATE_INIT must be set for this board
#endif
#ifndef CONFIG_BOARD_EARLY_INIT_F
diff --git a/board/freescale/mx51evk/mx51evk.c
b/board/freescale/mx51evk/mx51evk.c
index 8da1ee8..f998610 100644
--- a/board/freescale/mx51evk/mx51evk.c
+++ b/board/freescale/mx51evk/mx51evk.c
@@ -409,7 +409,7 @@ int board_init(void)
return 0;
}
-#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_MXC_SPI
diff --git a/board/imx31_phycore/imx31_phycore.c
b/board/imx31_phycore/imx31_phycore.c
index 773900e..47f1a8d 100644
Re: [U-Boot] [PATCH 13/13] misc: pmic: drop old Freescale's pmic driver
On 10/08/2011 06:36 PM, Stefano Babic wrote:
Signed-off-by: Stefano Babicsba...@denx.de
---
drivers/misc/Makefile |1 -
drivers/misc/fsl_pmic.c | 235
---
2 files changed, 0 insertions(+), 236 deletions(-)
delete mode 100644 drivers/misc/fsl_pmic.c
I just checked PMIC action on our board (i.mx31 and mc13783) and the new
code is not working here, it even:
TT01 pmic write 20 17
raise: Signal # 8 caught
reg num = 32 is invalid. Should be less than 0
TT01 pmic read 20
reg num = 32 is invalid. Should be less than 0
PMIC: Register read failed
0x20: 0x
At first glance I found in pmic_fsl.c:
static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
{
if ((val == NULL) (write))
return *val ~(1 31);
else
return (write 31) | (reg 25) | (*val 0x00FF);
}
which must be wrong. NULL is de-referenced in both cases and this error
is even forced by pmic_spi.c:
if (write) {
pmic_tx = p-hw.spi.prepare_tx(0, NULL, write);
pmic_tx = ~(1 31);
Probably val == NULL was meant as escape not to touch the pmic_tx value,
in the original driver it's done that way.
One could fix this by using a static variable in pmic_spi_prepare_tx(),
but I'm
not sure if this was the intention.
I wonder why it was missed during testing as it seems configuration
independent.
Helmut
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[U-Boot] [PATCH] misc: pmic: fix regression in pmic_fsl.c (SPI)
This fixes write access to PMIC registers, the bug was
introduced partly in commit 64aac65099 and in commit c9fe76dd91.
It was tested on an i.mx31 with a mc13783.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
drivers/misc/pmic_fsl.c |5 +
drivers/misc/pmic_spi.c |1 -
2 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/pmic_fsl.c b/drivers/misc/pmic_fsl.c
index b6e809a..0ff75ed 100644
--- a/drivers/misc/pmic_fsl.c
+++ b/drivers/misc/pmic_fsl.c
@@ -29,10 +29,7 @@
#if defined(CONFIG_PMIC_SPI)
static u32 pmic_spi_prepare_tx(u32 reg, u32 *val, u32 write)
{
- if ((val == NULL) (write))
- return *val ~(1 31);
- else
- return (write 31) | (reg 25) | (*val 0x00FF);
+ return (write 31) | (reg 25) | (*val 0x00FF);
}
#endif
diff --git a/drivers/misc/pmic_spi.c b/drivers/misc/pmic_spi.c
index ff35377..e772884 100644
--- a/drivers/misc/pmic_spi.c
+++ b/drivers/misc/pmic_spi.c
@@ -76,7 +76,6 @@ static u32 pmic_reg(struct pmic *p, u32 reg, u32 *val, u32
write)
}
if (write) {
- pmic_tx = p-hw.spi.prepare_tx(0, NULL, write);
pmic_tx = ~(1 31);
tmp = cpu_to_be32(pmic_tx);
if (spi_xfer(slave, pmic_spi_bitlen, tmp, pmic_rx,
--
1.7.4.4
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Re: [U-Boot] [PATCH v3 2/2] video: Moving mx3fb.c to CONFIG_VIDEO
On 10/13/2011 11:16 AM, Anatolij Gustschin wrote:
From: Helmut Raigerhelmut.rai...@hale.at
mx3fb.c was based on CONFIG_LCD and is moved by this patch to
CONFIG_VIDEO, which has greater freedom in selecting videomodes
even at runtime.
This renders the accumulating list of display defines
(CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as
these may be setup through env variables:
uboot setenv mydisplay 'video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,
le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:100663296,vmode:0'
uboot setenv videomode ${mydisplay}
This commit also fixes the board config files for qong and
imx31_phycore boards as needed. The videomode settings of
previously supported displays are added to CONFIG_EXTRA_ENV_SETTINGS
now. CONFIG_SYS_MALLOC_LEN for imx31_phycore board is increased
to make the frame buffer allocation working with the changed
driver.
Signed-off-by: Helmut Raigerhelmut.rai...@hale.at
Signed-off-by: Anatolij Gustschinag...@denx.de
Cc: Stefano Babicsba...@denx.de
---
Changes since v2:
- fixed commit message
- added display info for removed display timings of
previously supported displays (in a comment)
- fixed compiler warning showed when compiling with debug
enabled
- added Video: prefix before display info output (as
we usually do it in U-Boot)
- fixed board config files for 'qong' and 'imx31_phycore' boards
so that this commit doesn't break compiling (bisectable now)
- added videomode settings for previously supported displays on
'qong' and 'imx31_phycore' to CONFIG_EXTRA_ENV_SETTINGS
- increased CONFIG_SYS_MALLOC_LEN for 'imx31_phycore' so that
the frame buffer can be allocated now (this is required to make
the display support working with the changed mx3fb driver)
Hi Anatolij,
I'm fine with your changes. It still works on our board. Thanks for
testing and improving.
Helmut
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[U-Boot] [PATCH V2 2/3] mx31: add ESD control registers
This allows to initialize DDR memory in C code.
Currently all mx31 boards use assembler code (lowlevel_init.S)
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: new in V2
arch/arm/include/asm/arch-mx31/imx-regs.h | 13 +
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 40abc34..f7a39f1 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -484,6 +484,17 @@ struct mx31_weim {
struct mx31_weim_cscr cscr[6];
};
+/* ESD control registers */
+struct esdc_regs {
+ u32 ctl0;
+ u32 cfg0;
+ u32 ctl1;
+ u32 cfg1;
+ u32 misc;
+ u32 dly[5];
+ u32 dlyl;
+};
+
#endif
#define __REG(x) (*((volatile u32 *)(x)))
@@ -548,6 +559,8 @@ struct mx31_weim {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+#define ESDCTL_BASE_ADDR 0xB8001000
+
/* 13 fields of the upper CS control register */
#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
cnc, wsc, ew, wws, edc) \
--
1.7.4.4
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[U-Boot] [PATCH V2 1/3] mx31: define pins and init for UART2 and CSPI3
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: no changes since V1
arch/arm/cpu/arm1136/mx31/devices.c | 14 ++
arch/arm/include/asm/arch-mx31/clock.h|1 +
arch/arm/include/asm/arch-mx31/imx-regs.h | 16
3 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/devices.c
b/arch/arm/cpu/arm1136/mx31/devices.c
index 1e7d48f..ace48f4 100644
--- a/arch/arm/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
@@ -38,7 +38,21 @@ void mx31_uart1_hw_init(void)
}
#endif
+#ifdef CONFIG_SYS_MX31_UART2
+void mx31_uart2_hw_init(void)
+{
+ /* setup pins for UART2 */
+ mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
+ mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
+ mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
+ mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
+}
+#endif
+
#ifdef CONFIG_MXC_SPI
+/* note: putting several spi setups here makes no sense as they may differ
+ * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of
CSPI3)
+ */
void mx31_spi2_hw_init(void)
{
/* SPI2 */
diff --git a/arch/arm/include/asm/arch-mx31/clock.h
b/arch/arm/include/asm/arch-mx31/clock.h
index cc99a75..0270d96 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -38,6 +38,7 @@ extern void mx31_gpio_mux(unsigned long mode);
extern void mx31_set_pad(enum iomux_pins pin, u32 config);
void mx31_uart1_hw_init(void);
+void mx31_uart2_hw_init(void);
void mx31_spi2_hw_init(void);
void mxc_hw_watchdog_enable(void);
void mxc_hw_watchdog_reset(void);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index fa06ae9..40abc34 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -628,12 +628,23 @@ struct mx31_weim {
/* Register offsets based on IOMUXC_BASE */
/* 0x00 .. 0x7b */
+#define MUX_CTL_CSPI3_MISO 0x0c
+#define MUX_CTL_CSPI3_SCLK 0x0d
+#define MUX_CTL_CSPI3_SPI_RDY 0x0e
+#define MUX_CTL_CSPI3_MOSI 0x13
+
#define MUX_CTL_USBH2_DATA10x40
#define MUX_CTL_USBH2_DIR 0x44
#define MUX_CTL_USBH2_STP 0x45
#define MUX_CTL_USBH2_NXT 0x46
#define MUX_CTL_USBH2_DATA00x47
#define MUX_CTL_USBH2_CLK 0x4B
+
+#define MUX_CTL_TXD2 0x70
+#define MUX_CTL_RTS2 0x71
+#define MUX_CTL_CTS2 0x72
+#define MUX_CTL_RXD2 0x77
+
#define MUX_CTL_RTS1 0x7c
#define MUX_CTL_CTS1 0x7d
#define MUX_CTL_DTR_DCE1 0x7e
@@ -691,6 +702,11 @@ struct mx31_weim {
#define MUX_RTS1__UART1_RTS_B IOMUX_MODE(MUX_CTL_RTS1, MUX_CTL_FUNC)
#define MUX_CTS1__UART1_CTS_B IOMUX_MODE(MUX_CTL_CTS1, MUX_CTL_FUNC)
+#define MUX_RXD2__UART2_RXD_MUXIOMUX_MODE(MUX_CTL_RXD2, MUX_CTL_FUNC)
+#define MUX_TXD2__UART2_TXD_MUXIOMUX_MODE(MUX_CTL_TXD2, MUX_CTL_FUNC)
+#define MUX_RTS2__UART2_RTS_B IOMUX_MODE(MUX_CTL_RTS2, MUX_CTL_FUNC)
+#define MUX_CTS2__UART2_CTS_B IOMUX_MODE(MUX_CTL_CTS2, MUX_CTL_FUNC)
+
#define MUX_CSPI2_SS0__CSPI2_SS0_B IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_FUNC)
#define MUX_CSPI2_SS1__CSPI2_SS1_B IOMUX_MODE(MUX_CTL_CSPI2_SS1, MUX_CTL_FUNC)
#define MUX_CSPI2_SS2__CSPI2_SS2_B IOMUX_MODE(MUX_CTL_CSPI2_SS2, MUX_CTL_FUNC)
--
1.7.4.4
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[U-Boot] [PATCH V2 3/3] mx31: Add board support for HALE TT-01
This adds basic board support for TT-01 based on the bluetechnix i.MX31 SOM. Currently only NOR-Flash boot is implemented. Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- V2: - MAINTAINER updated and used board.cfg instead of Makefile change - eliminated config.mk - replaced __REG accessors (WEIM and ESD), this patch depends on http://patchwork.ozlabs.org/patch/116978/ - MACH_TYPE_TT01 setup standardized - removed dependency on mx31pdk low level code - reduced lowlevel_init.S to its minimum (AIPS setup only), moved DDR and clock setup to board_early_init_f() - some mulitiline comment cosmetics - added some comments to clarify the board setup (SYS_MONITOR_LEN, SYS_MALLOC_LEN) - removed definition of CONFIG_SYS_GBL_DATA_SIZE MAINTAINERS |4 + board/hale/tt01/Makefile| 51 board/hale/tt01/lowlevel_init.S | 32 + board/hale/tt01/tt01.c | 187 + boards.cfg |1 + include/configs/tt01.h | 249 +++ 6 files changed, 524 insertions(+), 0 deletions(-) create mode 100644 board/hale/tt01/Makefile create mode 100644 board/hale/tt01/lowlevel_init.S create mode 100644 board/hale/tt01/tt01.c create mode 100644 include/configs/tt01.h diff --git a/MAINTAINERS b/MAINTAINERS index bb95e6d..f01eeff 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -749,6 +749,10 @@ Sandeep Paulraj s-paul...@ti.com davinci_dm365evmARM926EJS davinci_dm6467evm ARM926EJS +Helmut Raiger helmut.rai...@hale.at + + tt01i.MX31 + Linus Walleij linus.wall...@linaro.org integratorapvarious integratorcpvarious diff --git a/board/hale/tt01/Makefile b/board/hale/tt01/Makefile new file mode 100644 index 000..f6b2854 --- /dev/null +++ b/board/hale/tt01/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 HALE electronic helmut.rai...@hale.at +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).o +COBJS := tt01.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(call cmd_link_o_target, $(OBJS) $(SOBJS)) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/hale/tt01/lowlevel_init.S b/board/hale/tt01/lowlevel_init.S new file mode 100644 index 000..6e9dc80 --- /dev/null +++ b/board/hale/tt01/lowlevel_init.S @@ -0,0 +1,32 @@ +/* + * (C) Copyright 2009 Magnus Lilja lilja.mag...@gmail.com + * (C) Copyright 2011 Helmut Raiger helmut.rai...@hale.at + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#include config.h +#include asm/arch/imx-regs.h +#include asm/macro.h + +.globl lowlevel_init +lowlevel_init: + /* Also setup the Peripheral Port Remap register inside the core */ + ldr r0, =ARM_PPMRR /* start from AIPS 2GB region */ + mcr p15, 0, r0, c15, c2, 4
Re: [U-Boot] [PATCH 2/2] TT-01: add basic board support for HALE TT-01
Hi Stefano, +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).o + +COBJS := tt01.o +# reuse the mx31pdk low-level setup +SOBJS := ../../freescale/mx31pdk/lowlevel_init.o It is always a good idea to reuse code, but taking it to another board seems hackish. Your board could become broken if the mx31pdk's maintainer change his code. Reading this file I do not see (except setting the AIPS) no good reason to write this part in assembly. Everything can be done for example in board_early_init_f, and even better we can rationalize this code and put it into arch/cpu/arm1136/mx31. As far as I understood this is called from arch/arm/cpu/arm1136/start.S before stack is setup. I don't know much about C-calling convention on the arm1136, but this might be the reason why it's done in assembly. I'd rather not touch start.S, so I'll copy the file over from mx31pdk? +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 10*1024*1024) 10 MB for heap in bootloader ? Is it ok ? I am only asking if it is really wanted. We are about to display large compressed bitmaps in u-boot, that's why the heap is that large. The frame buffer driver patch http://patchwork.ozlabs.org/patch/113341/ is still being reviewed, that is why I left it out here (but kept the heap size). Additionally I don't care much about time and space here. The production units will boot from NAND and we'll use a different setup there. That's why I reserved 1MB for u-boot, I simply didn't want it to overwrite my environment when being reprogrammed. +#define CONFIG_SYS_FLASH_CFI/* Flash memory is CFI compliant */ +#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ +#define CONFIG_FLASH_SPANSION_S29WS_N +/* TODO: bluetechnix did undefine these for some purpose if you do not need to undefine, you can drop this comment. Maybe there is no issues with lock/unlock mechanism with the flash you have chosen. Bluetechnix is the supplier of the SOM we are using. Their original version of u-boot (1.2 or so) defined these values. So the flash is definitely the same. I'd like to review this later, therefore the TODO. +#define CONFIG_ENV_SECT_SIZE(128 * 1024) +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE Regarding your previous comment: you could set CONFIG_ENV_SIZE to a smaller value as CONFIG_ENV_SECT_SIZE, and this can speed up get/set of the environment. Or you could save the environment in tha last (smaller) sectors. I'll look into the speed change, but as described above I don't really care about size. + * on TT-01 UART1 pins are used by Audio, so we use UART2 + * make sure that the transceiver is enabled during PL=1 for testing! What does it mean PL=1 ? Nothing that concerns u-boot, it means P(ower)L(evel)=1. The TT-01 implements a hardware that turns off components depending on the said power level. In PL=1 the RS232 transceiver is usually off. +/* this is currently not supported, mxc_nand.c is too incomplete for it */ Only for my understanding: Which is the issue with mxc_nand.c ? At the moment, we have several boards using it, and I wonder it is incomplete. What do you mean ? Part of this whole mess is, that I actually wrote this board support 2 years ago and simply rebased to finally contribute the stuff. Probably there is no issue with mxc_nand.c any more (and I don't remember what was the problem). Thanks for your thorough review, I'll pass along V2 when we come to a solution about low_level.S Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] mx31: provide readable WEIM CS accessor
On 09/28/2011 05:14 PM, Stefano Babic wrote
Is there a reason to embed this function in imx-regs.h ? Why not in
./arch/arm/cpu/arm1136/mx31/generic.c, where I think this function
belongs ?
I took it from the kernel where it is done that way and didn't ask why.
I'll move it.
We are trying to get consistency among the several i.MX SOCs. For this
reason, a general function should not have a specific SOC prefix.
You introduce now a new accessor to set up the WEIM registers. We have
not yet such as function, but we can have then for other SOCs, too.
Rename your function as mxc_setup_weimcs(), and when an accessor will be
supplied for MX5 (or MX*), the same name must be used.
+unsigned int upper, unsigned int lower, unsigned int add)
+{
+writel(upper, WEIM_CSCR_U(cs));
+writel(lower, WEIM_CSCR_L(cs));
+writel(add, WEIM_CSCR_A(cs));
+}
You are using offests to access registers. Why not to set a structure as:
struct weim_regs {
u32 upper;
u32 lower;
u32 adder;
u32 reserved;
}
and then :
struct weim {
struct weim_regs cs[6];
};
...or something like that.
Passing the register values to the function makes the accessor too
striclty bound to the mx31. But if you pass a struct weim*, that is void
mxc_setup_weimcs(struct weim *), we can have the same accessor (with a
different implementation, of course) for the other SOCs, too. I can
imagine we can have MX5 (at the moment I see only the mx53ard) using the
same way to set up the WEIM interface.
I used the writel register access to assure correct memory barriers, but
this might not be a problem with the CS registers. However passing the
complete set of chip selects wouldn't work, as only a few will be setup
in the function, while others aren't touched (we could pass a bitmap to
select which ones should be set, but this seems flamboyant).
What about:
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *cs)
{
...
}
void some_board_init_func(void)
{
/* CS5: CPLD incl. network controller */
static const struct mxc_weimcs cs5 = {
/*sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 3, 24, 0, 4, 3),
/* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
CSCR_L(2, 2, 2, 5, 2, 0, 5, 2, 0, 0, 0, 1),
/* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
CSCR_A(2, 2, 2, 2, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0)
};
mxc_setup_weimcs(5, cs5);
}
This should still work for different SOCs (with different struct
mxc_weimcs). CSCR_U et al. will be mx31 specific defines.
Helmut
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Re: [U-Boot] [PATCH] mx31: provide readable WEIM CS accessor
On 09/28/2011 05:14 PM, Stefano Babic wrote: +#ifndef __ASSEMBLER__ +static inline void mx31_setup_weimcs(int cs, Is there a reason to embed this function in imx-regs.h ? Why not in ./arch/arm/cpu/arm1136/mx31/generic.c, where I think this function belongs ? I re-checked, it makes a lot of sense to inline this function as it results into 3 simple register writes (addresses are compile time calculated if 'cs' is a constant)! Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] mx31: provide readable WEIM CS accessor
mxc_setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
---
arch/arm/include/asm/arch-mx31/imx-regs.h | 26 +++-
arch/arm/include/asm/arch-mx31/sys_proto.h | 35 +++
board/davedenx/qong/qong.c | 87 ++-
board/freescale/mx31ads/mx31ads.c | 15 -
board/freescale/mx31pdk/mx31pdk.c | 14 -
board/imx31_phycore/imx31_phycore.c | 41 ++---
board/logicpd/imx31_litekit/imx31_litekit.c | 28 +++--
7 files changed, 167 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..d631a10 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -534,10 +534,30 @@ enum iomux_pins {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+ cnc, wsc, ew, wws, edc) \
+ ((sp) 31 | (wp) 30 | (bcd) 28 | (psz) 22 | (pme) 21 |\
+(sync) 20 | (dol) 16 | (cnc) 14 | (wsc) 8 | (ew) 7 |\
+(wws) 4 | (edc) 0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+ csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+ ((oea) 28 | (oen) 24 | (ebwa) 20 | (ebwn) 16 |\
+(csa) 12 | (ebc) 11 | (dsz) 8 | (csn) 4 |\
+(psr) 3 | (cre) 2 | (wrap) 1 | (csen) 0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+ wwu, age, cnc2, fce) \
+ ((ebra) 28 | (ebrn) 24 | (rwa) 20 | (rwn) 16 |\
+(mum) 15 | (lah) 13 | (lbn) 10 | (lba) 8 |\
+(dww) 6 | (dct) 4 | (wwu) 3 |\
+(age) 2 | (cnc2) 1 | (fce) 0)
+
#define WEIM_BASE 0xb8002000
-#define CSCR_U(x) (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
+#define WEIM_CSCR_U(x) (WEIM_BASE + (x) * 0x10)
+#define WEIM_CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
+#define WEIM_CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
#define IOMUXC_BASE0x43FAC000
#define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+struct mxc_weimcs {
+ u32 upper;
+ u32 lower;
+ u32 additional;
+};
+
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs);
+
+#endif
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index 99432ed..b9133bc 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -25,7 +25,7 @@
#include netdev.h
#include asm/arch/clock.h
#include asm/arch/imx-regs.h
-#include asm/io.h
+#include asm/arch/sys_proto.h
#include nand.h
#include fsl_pmic.h
#include asm/gpio.h
@@ -61,11 +61,17 @@ static void qong_fpga_reset(void)
int board_early_init_f (void)
{
#ifdef CONFIG_QONG_FPGA
- /* CS1: FPGA/Network Controller/GPIO */
- /* 16-bit, no DTACK */
- __REG(CSCR_U(1)) = 0x0A01;
- __REG(CSCR_L(1)) = 0x20040501;
- __REG(CSCR_A(1)) = 0x04020C00;
+ /* CS1: FPGA/Network Controller/GPIO, 16-bit, no DTACK
[U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor
setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
---
arch/arm/cpu/arm1136/mx31/generic.c |9 +++
arch/arm/include/asm/arch-mx31/imx-regs.h | 26 +++-
arch/arm/include/asm/arch-mx31/sys_proto.h | 35 +++
board/davedenx/qong/qong.c | 87 ++-
board/freescale/mx31ads/mx31ads.c | 15 -
board/freescale/mx31pdk/mx31pdk.c | 14 -
board/imx31_phycore/imx31_phycore.c | 41 ++---
board/logicpd/imx31_litekit/imx31_litekit.c | 28 +++--
8 files changed, 176 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index e3a4d1b..29af156 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,8 @@
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
#include asm/io.h
+#include asm/arch/sys_proto.h
+
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+ writel(weimcs-upper, WEIM_CSCR_U(cs));
+ writel(weimcs-lower, WEIM_CSCR_L(cs));
+ writel(weimcs-additional, WEIM_CSCR_A(cs));
+}
+
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..d631a10 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -534,10 +534,30 @@ enum iomux_pins {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+ cnc, wsc, ew, wws, edc) \
+ ((sp) 31 | (wp) 30 | (bcd) 28 | (psz) 22 | (pme) 21 |\
+(sync) 20 | (dol) 16 | (cnc) 14 | (wsc) 8 | (ew) 7 |\
+(wws) 4 | (edc) 0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+ csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+ ((oea) 28 | (oen) 24 | (ebwa) 20 | (ebwn) 16 |\
+(csa) 12 | (ebc) 11 | (dsz) 8 | (csn) 4 |\
+(psr) 3 | (cre) 2 | (wrap) 1 | (csen) 0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+ wwu, age, cnc2, fce) \
+ ((ebra) 28 | (ebrn) 24 | (rwa) 20 | (rwn) 16 |\
+(mum) 15 | (lah) 13 | (lbn) 10 | (lba) 8 |\
+(dww) 6 | (dct) 4 | (wwu) 3 |\
+(age) 2 | (cnc2) 1 | (fce) 0)
+
#define WEIM_BASE 0xb8002000
-#define CSCR_U(x) (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
+#define WEIM_CSCR_U(x) (WEIM_BASE + (x) * 0x10)
+#define WEIM_CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
+#define WEIM_CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
#define IOMUXC_BASE0x43FAC000
#define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SYS_PROTO_H_
+#define _SYS_PROTO_H_
+
+struct mxc_weimcs {
+ u32 upper;
+ u32 lower
Re: [U-Boot] [Resend PATCH V2 (forgot generic.c)] mx31: provide readable WEIM CS accessor
On 09/29/2011 03:21 PM, Stefano Babic wrote:
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+writel(weimcs-upper, WEIM_CSCR_U(cs));
+writel(weimcs-lower, WEIM_CSCR_L(cs));
+writel(weimcs-additional, WEIM_CSCR_A(cs));
+}
Even if more hidden, the access is always made with base + offset,
instead of defining a structure.
Do you really thing this is more readable:
in imx_regs.h ---
struct mx31_weim_cscr {
u32 upper;
u32 lower;
u32 additional;
u32 reserved;
};
struct mx31_weim {
struct mx31_weim_cscr cscr[6];
};
-- in generic.c --
void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
{
struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
struct mx31_weim_cscr *cscr = weim-cscr[cs];
writel(weimcs-upper, cscr-upper);
writel(weimcs-lower, cscr-lower);
writel(weimcs-additional, cscr-additional);
}
It seems pretty clumsy to me, but for sure a matter of taste.
Helmut
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[U-Boot] [PATCH V3] mx31: provide readable WEIM CS accessor
setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
V3:
modified register access according to the coding style
---
arch/arm/cpu/arm1136/mx31/generic.c |9 +++
arch/arm/include/asm/arch-mx31/imx-regs.h | 35 ++-
arch/arm/include/asm/arch-mx31/sys_proto.h | 35 +++
board/davedenx/qong/qong.c | 87 ++-
board/freescale/mx31ads/mx31ads.c | 15 -
board/freescale/mx31pdk/mx31pdk.c | 14 -
board/imx31_phycore/imx31_phycore.c | 41 ++---
board/logicpd/imx31_litekit/imx31_litekit.c | 28 +++--
8 files changed, 185 insertions(+), 79 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index e3a4d1b..29af156 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,8 @@
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
#include asm/io.h
+#include asm/arch/sys_proto.h
+
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -126,6 +128,13 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+ writel(weimcs-upper, WEIM_CSCR_U(cs));
+ writel(weimcs-lower, WEIM_CSCR_L(cs));
+ writel(weimcs-additional, WEIM_CSCR_A(cs));
+}
+
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..02b471f 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -470,6 +470,18 @@ enum iomux_pins {
#define CCM_RCSR_NF16B (1 31)
#define CCM_RCSR_NFMS (1 30)
+/* WEIM CS control registers */
+struct mx31_weim_cscr {
+ u32 upper;
+ u32 lower;
+ u32 additional;
+ u32 reserved;
+};
+
+struct mx31_weim {
+ struct mx31_weim_cscr cscr[6];
+};
+
#endif
#define __REG(x) (*((volatile u32 *)(x)))
@@ -534,10 +546,27 @@ enum iomux_pins {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+ cnc, wsc, ew, wws, edc) \
+ ((sp) 31 | (wp) 30 | (bcd) 28 | (psz) 22 | (pme) 21 |\
+(sync) 20 | (dol) 16 | (cnc) 14 | (wsc) 8 | (ew) 7 |\
+(wws) 4 | (edc) 0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+ csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+ ((oea) 28 | (oen) 24 | (ebwa) 20 | (ebwn) 16 |\
+(csa) 12 | (ebc) 11 | (dsz) 8 | (csn) 4 |\
+(psr) 3 | (cre) 2 | (wrap) 1 | (csen) 0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+ wwu, age, cnc2, fce) \
+ ((ebra) 28 | (ebrn) 24 | (rwa) 20 | (rwn) 16 |\
+(mum) 15 | (lah) 13 | (lbn) 10 | (lba) 8 |\
+(dww) 6 | (dct) 4 | (wwu) 3 |\
+(age) 2 | (cnc2) 1 | (fce) 0)
+
#define WEIM_BASE 0xb8002000
-#define CSCR_U(x) (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
#define IOMUXC_BASE0x43FAC000
#define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU
Re: [U-Boot] [PATCH V3] mx31: provide readable WEIM CS accessor
forget the patch, I'll resend. ... clearly a matter of under caffeination. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Resend PATCH V3] mx31: provide readable WEIM CS accessor
setup_weimcs() and some macros are added to support the setup
for i.MX31 WEIM chip selects. As a compromise between verbosity
and readability an ASCII-art'ish bit comment is used instead of
bitfields.
All i.MX31 boards have been patched to use this approach using a
helper program to verify the changes.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
added sys_proto.h for mx31
introduced mxc_setup_weimcs(), which is SOC independent
not inlined any more (codesize increased by 60-90 bytes)
V3:
modified register access according to the coding style
---
arch/arm/cpu/arm1136/mx31/generic.c | 11
arch/arm/include/asm/arch-mx31/imx-regs.h | 35 ++-
arch/arm/include/asm/arch-mx31/sys_proto.h | 35 +++
board/davedenx/qong/qong.c | 86 ++
board/freescale/mx31ads/mx31ads.c | 14 -
board/freescale/mx31pdk/mx31pdk.c | 14 -
board/imx31_phycore/imx31_phycore.c | 41 ++---
board/logicpd/imx31_litekit/imx31_litekit.c | 28 +++--
8 files changed, 187 insertions(+), 77 deletions(-)
create mode 100644 arch/arm/include/asm/arch-mx31/sys_proto.h
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index e3a4d1b..32e8f23 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -25,6 +25,7 @@
#include asm/arch/imx-regs.h
#include asm/arch/clock.h
#include asm/io.h
+#include asm/arch/sys_proto.h
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -126,6 +127,16 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
}
+void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)
+{
+ struct mx31_weim *weim = (struct mx31_weim *) WEIM_BASE;
+ struct mx31_weim_cscr *cscr = weim-cscr[cs];
+
+ writel(weimcs-upper, cscr-upper);
+ writel(weimcs-lower, cscr-lower);
+ writel(weimcs-additional, cscr-additional);
+}
+
struct mx3_cpu_type mx31_cpu_type[] = {
{ .srev = 0x00, .v = 0x10 },
{ .srev = 0x10, .v = 0x11 },
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..02b471f 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -470,6 +470,18 @@ enum iomux_pins {
#define CCM_RCSR_NF16B (1 31)
#define CCM_RCSR_NFMS (1 30)
+/* WEIM CS control registers */
+struct mx31_weim_cscr {
+ u32 upper;
+ u32 lower;
+ u32 additional;
+ u32 reserved;
+};
+
+struct mx31_weim {
+ struct mx31_weim_cscr cscr[6];
+};
+
#endif
#define __REG(x) (*((volatile u32 *)(x)))
@@ -534,10 +546,27 @@ enum iomux_pins {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+ cnc, wsc, ew, wws, edc) \
+ ((sp) 31 | (wp) 30 | (bcd) 28 | (psz) 22 | (pme) 21 |\
+(sync) 20 | (dol) 16 | (cnc) 14 | (wsc) 8 | (ew) 7 |\
+(wws) 4 | (edc) 0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+ csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+ ((oea) 28 | (oen) 24 | (ebwa) 20 | (ebwn) 16 |\
+(csa) 12 | (ebc) 11 | (dsz) 8 | (csn) 4 |\
+(psr) 3 | (cre) 2 | (wrap) 1 | (csen) 0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+ wwu, age, cnc2, fce) \
+ ((ebra) 28 | (ebrn) 24 | (rwa) 20 | (rwn) 16 |\
+(mum) 15 | (lah) 13 | (lbn) 10 | (lba) 8 |\
+(dww) 6 | (dct) 4 | (wwu) 3 |\
+(age) 2 | (cnc2) 1 | (fce) 0)
+
#define WEIM_BASE 0xb8002000
-#define CSCR_U(x) (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
#define IOMUXC_BASE0x43FAC000
#define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/arch/arm/include/asm/arch-mx31/sys_proto.h
b/arch/arm/include/asm/arch-mx31/sys_proto.h
new file mode 100644
index 000..7600303
--- /dev/null
+++ b/arch/arm/include/asm/arch-mx31/sys_proto.h
@@ -0,0 +1,35 @@
+/*
+ * (C) Copyright 2011
+ * Helmut Raiger, HALE electronic GmbH, helmut.rai...@hale.at
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE
[U-Boot] [PATCH] mx31: provide readable WEIM CS accessor
Some macros are added to support the setup for i.MX31 WEIM
chip selects. As a compromise between verbosity and readability
an ASCII-art'ish bit comment is used instead of bitfields.
All i.MX31 boards have been patched to use this approach using a helper
program to verify the changes.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
arch/arm/include/asm/arch-mx31/imx-regs.h | 38 -
board/davedenx/qong/qong.c | 79 +--
board/freescale/mx31ads/mx31ads.c | 13 +++--
board/freescale/mx31pdk/mx31pdk.c | 11 +++-
board/imx31_phycore/imx31_phycore.c | 36 +---
board/logicpd/imx31_litekit/imx31_litekit.c | 24 ++--
6 files changed, 123 insertions(+), 78 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..d535830 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -25,6 +25,7 @@
#define __ASM_ARCH_MX31_IMX_REGS_H
#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
+#include asm/io.h
#include asm/types.h
/* Clock control module registers */
@@ -534,10 +535,41 @@ enum iomux_pins {
#define ESDCTL_BL(x) ((x) 7)
#define ESDCTL_PRCT(x) ((x) 0)
+/* 13 fields of the upper CS control register */
+#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
+ cnc, wsc, ew, wws, edc) \
+ ((sp) 31 | (wp) 30 | (bcd) 28 | (psz) 22 | (pme) 21 |\
+(sync) 20 | (dol) 16 | (cnc) 14 | (wsc) 8 | (ew) 7 |\
+(wws) 4 | (edc) 0)
+/* 12 fields of the lower CS control register */
+#define CSCR_L(oea, oen, ebwa, ebwn, \
+ csa, ebc, dsz, csn, psr, cre, wrap, csen) \
+ ((oea) 28 | (oen) 24 | (ebwa) 20 | (ebwn) 16 |\
+(csa) 12 | (ebc) 11 | (dsz) 8 | (csn) 4 |\
+(psr) 3 | (cre) 2 | (wrap) 1 | (csen) 0)
+/* 14 fields of the additional CS control register */
+#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
+ wwu, age, cnc2, fce) \
+ ((ebra) 28 | (ebrn) 24 | (rwa) 20 | (rwn) 16 |\
+(mum) 15 | (lah) 13 | (lbn) 10 | (lba) 8 |\
+(dww) 6 | (dct) 4 | (wwu) 3 |\
+(age) 2 | (cnc2) 1 | (fce) 0)
+
#define WEIM_BASE 0xb8002000
-#define CSCR_U(x) (WEIM_BASE + (x) * 0x10)
-#define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
-#define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
+#define WEIM_CSCR_U(x) (WEIM_BASE + (x) * 0x10)
+#define WEIM_CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10)
+#define WEIM_CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10)
+
+#ifndef __ASSEMBLER__
+static inline void mx31_setup_weimcs(int cs,
+ unsigned int upper, unsigned int lower, unsigned int add)
+{
+ writel(upper, WEIM_CSCR_U(cs));
+ writel(lower, WEIM_CSCR_L(cs));
+ writel(add, WEIM_CSCR_A(cs));
+}
+#endif
+
#define IOMUXC_BASE0x43FAC000
#define IOMUXC_GPR (IOMUXC_BASE + 0x8)
diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c
index 99432ed..6cd9e10 100644
--- a/board/davedenx/qong/qong.c
+++ b/board/davedenx/qong/qong.c
@@ -25,7 +25,6 @@
#include netdev.h
#include asm/arch/clock.h
#include asm/arch/imx-regs.h
-#include asm/io.h
#include nand.h
#include fsl_pmic.h
#include asm/gpio.h
@@ -61,11 +60,15 @@ static void qong_fpga_reset(void)
int board_early_init_f (void)
{
#ifdef CONFIG_QONG_FPGA
- /* CS1: FPGA/Network Controller/GPIO */
- /* 16-bit, no DTACK */
- __REG(CSCR_U(1)) = 0x0A01;
- __REG(CSCR_L(1)) = 0x20040501;
- __REG(CSCR_A(1)) = 0x04020C00;
+ /* CS1: FPGA/Network Controller/GPIO, 16-bit, no DTACK */
+ mx31_setup_weimcs(1,
+ /*sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */
+ CSCR_U(0, 0, 0, 0, 0, 0, 0, 0, 0, 10, 0, 0, 1),
+ /* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen */
+ CSCR_L(2, 0, 0, 4, 0, 0, 5, 0, 0, 0, 0, 1),
+ /* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce*/
+ CSCR_A(0, 4, 0, 2, 0, 0, 3, 0, 0, 0, 0, 0, 0, 0)
+ );
/* setup pins for FPGA */
mx31_gpio_mux(IOMUX_MODE(0x76, MUX_CTL_GPIO));
@@ -146,50 +149,14 @@ int board_init (void)
/* Chip selects */
/* CS0: Nor Flash #0 - it must be init'ed when executing from DDR */
/* Assumptions: HCLK = 133 MHz, tACC = 130ns */
- __REG(CSCR_U(0)) = ((0 31) | /* SP */
- (0 30) | /* WP */
- (0 28) | /* BCD */
- (0 24) | /* BCS */
- (0 22) | /* PSZ */
- (0 21) | /* PME
[U-Boot] mx31: Approach for WEIM CS accessors
I tried to fix the magic numbers used by ALL mx31 boards (except one CS in
qong.c)
by using some macros. I stayed away from bitfields as it would have resulted
in a very verbose change (something like the setup of CS 3 in qong.c).
To verify the code I used this helper:
-- cut ---
#include stdio.h
typedef unsigned int uint;
/* 13 fields of the upper CS control register */
#define CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, \
cnc, wsc, ew, wws, edc) \
((sp) 31 | (wp) 30 | (bcd) 28 | (psz) 22 | (pme)
21 |\
(sync) 20 | (dol) 16 | (cnc) 14 | (wsc) 8 | (ew)
7 |\
(wws) 4 | (edc) 0)
/* 12 fields of the lower CS control register */
#define CSCR_L(oea, oen, ebwa, ebwn, \
csa, ebc, dsz, csn, psr, cre, wrap, csen) \
((oea) 28 | (oen) 24 | (ebwa) 20 | (ebwn) 16 |\
(csa) 12 | (ebc) 11 | (dsz) 8 | (csn) 4 |\
(psr) 3 | (cre) 2 | (wrap) 1 | (csen) 0)
/* 14 fields of the additional CS control register */
#define CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, \
wwu, age, cnc2, fce) \
((ebra) 28 | (ebrn) 24 | (rwa) 20 | (rwn) 16 |\
(mum) 15 | (lah) 13 | (lbn) 10 | (lba) 8 |\
(dww) 6 | (dct) 4 | (wwu) 3 |\
(age) 2 | (cnc2) 1 | (fce) 0)
void decode(unsigned int u, unsigned int l, unsigned int a)
{
/* 13 fields of the upper CS control register */
uint sp = (u 31) 1;
uint wp = (u 30) 1;
uint bcd = (u 28) 1;
uint bcs = (u 24) 15;
uint psz = (u 22) 3;
uint pme = (u 21) 1;
uint sync = (u 20) 1;
uint dol = (u 16) 15;
uint cnc = (u 14) 3;
uint wsc = (u 8) 31;
uint ew = (u 7) 1;
uint wws = (u 4) 7;
uint edc = (u 0) 15;
/* 12 fields of the lower CS control register */
uint oea = (l 28) 15;
uint oen = (l 24) 15;
uint ebwa = (l 20) 15;
uint ebwn = (l 16) 15;
uint csa = (l 12) 15;
uint ebc = (l 11) 1;
uint dsz = (l 8) 7;
uint csn = (l 4) 15;
uint psr = (l 3) 1;
uint cre = (l 2) 1;
uint wrap = (l 1) 1;
uint csen = (l 0) 1;
/* 14 fields of the additional CS control register */
uint ebra = (a 28) 15;
uint ebrn = (a 24) 15;
uint rwa = (a 20) 15;
uint rwn = (a 16) 15;
uint mum = (a 15) 1;
uint lah = (a 13) 3;
uint lbn = (a 10) 7;
uint lba = (a 8) 3;
uint dww = (a 6) 3;
uint dct = (a 4) 3;
uint wwu = (a 3) 1;
uint age = (a 2) 1;
uint cnc2 = (a 1) 1;
uint fce = (a 0) 1;
printf( decode(0x%08x, 0x%08x, 0x%08x):\n, u, l, a);
printf(/* sp wp bcd bcs psz pme sync dol cnc wsc ew wws edc */\n);
printf(CSCR_U(%2u,%2u,%3u,%3u,%3u,%3u,%4u,%3u,%3u,%3u,%2u,%3u,%3u)\n,
sp, wp, bcd, bcs, psz, pme, sync, dol, cnc, wsc, ew, wws, edc);
if(CSCR_U(sp, wp, bcd, bcs, psz, pme, sync, dol, cnc, wsc, ew, wws,
edc) != u)
printf(U is wrong\n);
printf(/* oea oen ebwa ebwn csa ebc dsz csn psr cre wrap csen
*/\n);
printf(CSCR_L(%3u,%3u,%4u,%4u,%3u,%3u,%3u,%3u,%3u,%3u,%4u,%4u)\n,
oea, oen, ebwa, ebwn, csa, ebc, dsz, csn, psr, cre, wrap, csen);
if(CSCR_L(oea, oen, ebwa, ebwn, csa, ebc, dsz, csn, psr, cre, wrap,
csen) != l)
printf(L is wrong\n);
printf(/* ebra ebrn rwa rwn mum lah lbn lba dww dct wwu age cnc2 fce
*/\n);
printf(CSCR_A(%2u,%4u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%3u,%4u,%3u)\n,
ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, wwu, age,
cnc2, fce);
if(CSCR_A(ebra, ebrn, rwa, rwn, mum, lah, lbn, lba, dww, dct, wwu, age,
cnc2, fce) != a)
printf(A is wrong\n);
}
int main(void)
{
printf(qong: CS1 ); decode(0x0A01, 0x20040501, 0x04020C00);
printf(qong: CS3 ); decode(0x4f00, 0x20013b31, 0x00020800);
printf(tt01: CS4 ); decode(0xdcf6, 0x444A4541, 0x3302);
printf(pdk: CS5 ); decode(0xd843, 0x22252521, 0x0a00);
printf(ads: CS0 ); decode(0x0f00, 0x1D03, 0x00720900);
printf(phycore: CS0 ); decode(0xcf03, 0x1d03, 0x00720900);
printf(phycore: CS1 ); decode(0xdf06, 0x444a4541, 0x3302);
printf(phycore: CS4 ); decode(0xd843, 0x22252521, 0x0a00);
printf(litekit: CS0 ); decode(0xcf03, 0xa0330d01, 0x00220800);
printf(litekit: CS4 ); decode(0xdcf6, 0x444a4541, 0x3302);
}
cut
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[U-Boot] mx31: CONFIG_HARD_SPI irrelevant for i.MX31
Hi, I just found that CONFIG_HARD_SPI is defined by all mx31 boards, but is never used in the code except for powerPC and m68k. Anything I'm missing here? Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] mx31: Add board support for HALE TT-01
This adds support for HALE TT-01 (www.hale.at). -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] mx31: define pins and init for UART2 and CSPI3
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
arch/arm/cpu/arm1136/mx31/devices.c | 14 ++
arch/arm/include/asm/arch-mx31/clock.h|1 +
arch/arm/include/asm/arch-mx31/imx-regs.h | 16
3 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/devices.c
b/arch/arm/cpu/arm1136/mx31/devices.c
index 1e7d48f..ace48f4 100644
--- a/arch/arm/cpu/arm1136/mx31/devices.c
+++ b/arch/arm/cpu/arm1136/mx31/devices.c
@@ -38,7 +38,21 @@ void mx31_uart1_hw_init(void)
}
#endif
+#ifdef CONFIG_SYS_MX31_UART2
+void mx31_uart2_hw_init(void)
+{
+ /* setup pins for UART2 */
+ mx31_gpio_mux(MUX_RXD2__UART2_RXD_MUX);
+ mx31_gpio_mux(MUX_TXD2__UART2_TXD_MUX);
+ mx31_gpio_mux(MUX_RTS2__UART2_RTS_B);
+ mx31_gpio_mux(MUX_CTS2__UART2_CTS_B);
+}
+#endif
+
#ifdef CONFIG_MXC_SPI
+/* note: putting several spi setups here makes no sense as they may differ
+ * at board level (physical pin SS0 of CSPI2 may aswell be used as SS0 of
CSPI3)
+ */
void mx31_spi2_hw_init(void)
{
/* SPI2 */
diff --git a/arch/arm/include/asm/arch-mx31/clock.h
b/arch/arm/include/asm/arch-mx31/clock.h
index cc99a75..0270d96 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -38,6 +38,7 @@ extern void mx31_gpio_mux(unsigned long mode);
extern void mx31_set_pad(enum iomux_pins pin, u32 config);
void mx31_uart1_hw_init(void);
+void mx31_uart2_hw_init(void);
void mx31_spi2_hw_init(void);
void mxc_hw_watchdog_enable(void);
void mxc_hw_watchdog_reset(void);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 2064870..441dac4 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -597,12 +597,23 @@ enum iomux_pins {
/* Register offsets based on IOMUXC_BASE */
/* 0x00 .. 0x7b */
+#define MUX_CTL_CSPI3_MISO 0x0c
+#define MUX_CTL_CSPI3_SCLK 0x0d
+#define MUX_CTL_CSPI3_SPI_RDY 0x0e
+#define MUX_CTL_CSPI3_MOSI 0x13
+
#define MUX_CTL_USBH2_DATA10x40
#define MUX_CTL_USBH2_DIR 0x44
#define MUX_CTL_USBH2_STP 0x45
#define MUX_CTL_USBH2_NXT 0x46
#define MUX_CTL_USBH2_DATA00x47
#define MUX_CTL_USBH2_CLK 0x4B
+
+#define MUX_CTL_TXD2 0x70
+#define MUX_CTL_RTS2 0x71
+#define MUX_CTL_CTS2 0x72
+#define MUX_CTL_RXD2 0x77
+
#define MUX_CTL_RTS1 0x7c
#define MUX_CTL_CTS1 0x7d
#define MUX_CTL_DTR_DCE1 0x7e
@@ -660,6 +671,11 @@ enum iomux_pins {
#define MUX_RTS1__UART1_RTS_B IOMUX_MODE(MUX_CTL_RTS1, MUX_CTL_FUNC)
#define MUX_CTS1__UART1_CTS_B IOMUX_MODE(MUX_CTL_CTS1, MUX_CTL_FUNC)
+#define MUX_RXD2__UART2_RXD_MUXIOMUX_MODE(MUX_CTL_RXD2, MUX_CTL_FUNC)
+#define MUX_TXD2__UART2_TXD_MUXIOMUX_MODE(MUX_CTL_TXD2, MUX_CTL_FUNC)
+#define MUX_RTS2__UART2_RTS_B IOMUX_MODE(MUX_CTL_RTS2, MUX_CTL_FUNC)
+#define MUX_CTS2__UART2_CTS_B IOMUX_MODE(MUX_CTL_CTS2, MUX_CTL_FUNC)
+
#define MUX_CSPI2_SS0__CSPI2_SS0_B IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_FUNC)
#define MUX_CSPI2_SS1__CSPI2_SS1_B IOMUX_MODE(MUX_CTL_CSPI2_SS1, MUX_CTL_FUNC)
#define MUX_CSPI2_SS2__CSPI2_SS2_B IOMUX_MODE(MUX_CTL_CSPI2_SS2, MUX_CTL_FUNC)
--
1.7.4.4
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[U-Boot] [PATCH 2/2] TT-01: add basic board support for HALE TT-01
This adds basic board support for TT-01 based on
the bluetechnix i.MX31 SOM. Currently only NOR-Flash
boot is supported.
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
Makefile |4 +
board/hale/tt01/Makefile | 53 +
board/hale/tt01/config.mk |1 +
board/hale/tt01/tt01.c| 98
include/configs/tt01.h| 283 +
5 files changed, 439 insertions(+), 0 deletions(-)
create mode 100644 board/hale/tt01/Makefile
create mode 100644 board/hale/tt01/config.mk
create mode 100644 board/hale/tt01/tt01.c
create mode 100644 include/configs/tt01.h
diff --git a/Makefile b/Makefile
index e9ba6a4..aaed9e6 100644
--- a/Makefile
+++ b/Makefile
@@ -908,6 +908,10 @@ mx31pdk_nand_config: unconfig
fi
@$(MKCONFIG) -n $@ -a mx31pdk arm arm1136 mx31pdk freescale mx31
+tt01_config : unconfig
+ @mkdir -p $(obj)include
+ @$(MKCONFIG) -n $@ -a tt01 arm arm1136 tt01 hale mx31
+
#
## ARM1176 Systems
#
diff --git a/board/hale/tt01/Makefile b/board/hale/tt01/Makefile
new file mode 100644
index 000..18c83bb
--- /dev/null
+++ b/board/hale/tt01/Makefile
@@ -0,0 +1,53 @@
+##
+# (C) Copyright 2009 HALE electronic helmut.rai...@hale.at
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := tt01.o
+# reuse the mx31pdk low-level setup
+SOBJS := ../../freescale/mx31pdk/lowlevel_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+ $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/hale/tt01/config.mk b/board/hale/tt01/config.mk
new file mode 100644
index 000..a7887ba
--- /dev/null
+++ b/board/hale/tt01/config.mk
@@ -0,0 +1 @@
+CONFIG_SYS_TEXT_BASE = 0xa000
diff --git a/board/hale/tt01/tt01.c b/board/hale/tt01/tt01.c
new file mode 100644
index 000..3bae2b4
--- /dev/null
+++ b/board/hale/tt01/tt01.c
@@ -0,0 +1,98 @@
+/*
+ * (C) Copyright 2011 HALE electronic helmut.rai...@hale.at
+ * (C) Copyright 2009 Magnus Lilja lilja.mag...@gmail.com
+ * (c) 2007 Pengutronix, Sascha Hauer s.ha...@pengutronix.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include netdev.h
+#include command.h
+#include asm/arch/clock.h
+#include asm/io.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define BOARD_STRING Board: HALE TT-01
+
+void tt01_spi3_hw_init(void)
+{
+ /* CSPI3 */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MISO, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_MOSI, MUX_CTL_FUNC));
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI3_SCLK, MUX_CTL_FUNC));
+/* CSPI3, SS0 = Atlas */
+ mx31_gpio_mux(IOMUX_MODE(MUX_CTL_CSPI2_SS0, MUX_CTL_ALT1));
+
+ /* start CSPI3 clock (3
Re: [U-Boot] [PATCH 2/2] Moving mx3fb.c to CONFIG_VIDEO
On 09/20/2011 03:09 PM, Stefano Babic wrote: I tried, I cannot. We have not the LCD anymore for the QONG board ;-(( I have patched the QONG for fixing the build, but I cannot test it. Best regards, Stefano I don't really know how to address this, but what if we simply insert a compile time warning into these board supports, like: warning: Display setup defined, but settings not tested!. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] smc911x not functional on top of tree
On 09/19/2011 03:01 PM, Peter Korsgaard wrote: Helmut == Helmut Raigerhelmut.rai...@hale.at writes: Helmut On 09/19/2011 11:20 AM, Helmut Raiger wrote: On I can confirm this issue, same with our i.MX31 board. Interestingly the tftpboot command works, so its probably a DHCP issue. Helmut Helmut Bisecting the problem, got me: Helmut 093498669e77597635a24f326f11efeab213d394 is the first bad commit Helmut commit 093498669e77597635a24f326f11efeab213d394 Helmut Author: Simon Glasss...@chromium.org Helmut Date: Mon Jun 13 16:13:12 2011 -0700 Helmut Put common autoload code into auto_load() function Helmut This is a small clean-up patch. Helmut Signed-off-by: Simon Glasss...@chromium.org Helmut Tested-by: Eric Bénarde...@eukrea.com Helmut :04 04 cbc4fde5e7708a24f3e5ceb16946996e2b8048a5 Helmut cc66136f66e0fb1e5e1f7e3aef0787f57072a4b1 Mnet Helmut Still analyzing ... Yes, I sent a patch that earlier today: http://lists.denx.de/pipermail/u-boot/2011-September/101692.html Yes I saw it 10 minutes after sending the patch. It's already applied, perfect. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] smc911x not functional on top of tree
On 09/15/2011 09:39 PM, Fabio Estevam wrote: Hi, When using U-boot from top of tree I am not able to get networking to work on a mx31pdk: uboot dhcp smc911x: detected LAN9217 controller smc911x: phy initialized smc911x: MAC 00:04:9f:00:8d:6e BOOTP broadcast 1 BOOTP broadcast 2 DHCP client bound to address 10.29.244.21 BOOTP broadcast 3 DHCP client bound to address 10.29.244.21 BOOTP broadcast 4 DHCP client bound to address 10.29.244.21 BOOTP broadcast 5 DHCP client bound to address 10.29.244.21 Retry count exceeded; starting again I can confirm this issue, same with our i.MX31 board. Interestingly the tftpboot command works, so its probably a DHCP issue. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] smc911x not functional on top of tree
On 09/19/2011 11:20 AM, Helmut Raiger wrote: On I can confirm this issue, same with our i.MX31 board. Interestingly the tftpboot command works, so its probably a DHCP issue. Helmut Bisecting the problem, got me: 093498669e77597635a24f326f11efeab213d394 is the first bad commit commit 093498669e77597635a24f326f11efeab213d394 Author: Simon Glass s...@chromium.org Date: Mon Jun 13 16:13:12 2011 -0700 Put common autoload code into auto_load() function This is a small clean-up patch. Signed-off-by: Simon Glass s...@chromium.org Tested-by: Eric Bénard e...@eukrea.com :04 04 cbc4fde5e7708a24f3e5ceb16946996e2b8048a5 cc66136f66e0fb1e5e1f7e3aef0787f57072a4b1 Mnet Still analyzing ... Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] net: fix a regression in bootp.c
This fixes a bug introduced by 093498669e77597635a24f326f11efeab213d394. TftpStart() was not called unless the 'autoload' environment variable was set. Signed-off-by: Helmut Raiger helmut.rai...@hale.at --- net/bootp.c |3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) diff --git a/net/bootp.c b/net/bootp.c index 3db08ea..3157548 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -164,8 +164,9 @@ static void auto_load(void) return; } #endif - TftpStart(); } + + TftpStart(); } #if !defined(CONFIG_CMD_DHCP) -- 1.7.4.4 -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [STATUS] v2011.09-rc1 is out
On 09/12/2011 11:03 PM, Scott Wood wrote: Patchwork links are more useful than message IDs. OK. I'm still trying to get that contribution busyness up and running. No, the next branch is for when the next merge window opens. There seemed to be enough uncertainty about how the hardware works to put the 32MB patch there rather than merge it during stabilization, given it's not a regression. Ah, ok, I see. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot PATCH MX31:] smc911x MII made available, ping?
On 09/07/2011 11:47 PM, Wolfgang Denk wrote: Dear Stefano Babic, In message4e676571.5090...@denx.de you wrote: On 09/07/2011 07:40 AM, Helmut Raiger wrote: Hi Helmut, This is sitting here for more than 2 months, could someone please ACK and/or apply. I think that one reason for the delay is that you do not add the network maintainer (Wolfgang) as CC in V2 of your patch - I missed also this patch, and I send now after testing my tested-by as I did for V1. Even more so: the patch is flagged as for MX31, so I don;t even look at it. Best regards, Wolfgang Denk Damn, yes, my fault. In the heat of the action ... Thx, Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot,2/2] smc911x MII made available
On 09/07/2011 02:33 PM, Stefano Babic wrote: On 01/-10/-28163 08:59 PM, Helmut Raiger wrote: From: Helmut Raigerhelmut.rai...@hale.at The driver already had the MII functions, but they have not been registered using miiphy_register(). Signed-off-by: Helmut Raigerhelmut.rai...@hale.at As for V1, tested on a MX35. Tested-by: Stefano Babicsba...@denx.de Best regards, Stefano Babic Thx Stefano, I do not know how to handle Tested-by: tags, however. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [U-Boot PATCH MX31:] smc911x MII made available, ping?
This is sitting here for more than 2 months, could someone please ACK and/or apply. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Version 2 of 'Moving mx3fb to CONFIG_VIDEO'
For details of version 2, please consult the patch history of the individual patches. -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] mx31: make HSP clock for mx3fb driver available
This additionally updates mx31/generic.c by
- replacing __REG() macro accesses with readl() and writel()
- providing macros for PDR0 and PLL bit accesses
It also fixes a warning about the prototype of imx_get_uartclk(void)
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: uses macros and readl(), writel(), see commit message
arch/arm/cpu/arm1136/mx31/generic.c | 40 +++-
arch/arm/include/asm/arch-mx31/clock.h|3 +-
arch/arm/include/asm/arch-mx31/imx-regs.h | 14 ++
3 files changed, 43 insertions(+), 14 deletions(-)
diff --git a/arch/arm/cpu/arm1136/mx31/generic.c
b/arch/arm/cpu/arm1136/mx31/generic.c
index 248431b..9a7612b 100644
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -28,10 +28,10 @@
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
- u32 mfi = (reg 10) 0xf;
- u32 mfn = reg 0x3ff;
- u32 mfd = (reg 16) 0x3ff;
- u32 pd = (reg 26) 0xf;
+ u32 mfi = GET_PLL_MFI(reg);
+ u32 mfn = GET_PLL_MFN(reg);
+ u32 mfd = GET_PLL_MFD(reg);
+ u32 pd = GET_PLL_PD(reg);
mfi = mfi = 5 ? 5 : mfi;
mfd += 1;
@@ -45,12 +45,12 @@ static u32 mx31_get_mpl_dpdgck_clk(void)
{
u32 infreq;
- if ((__REG(CCM_CCMR) CCMR_PRCS_MASK) == CCMR_FPM)
+ if ((readl(CCM_CCMR) CCMR_PRCS_MASK) == CCMR_FPM)
infreq = CONFIG_MX31_CLK32 * 1024;
else
infreq = CONFIG_MX31_HCLK_FREQ;
- return mx31_decode_pll(__REG(CCM_MPCTL), infreq);
+ return mx31_decode_pll(readl(CCM_MPCTL), infreq);
}
static u32 mx31_get_mcu_main_clk(void)
@@ -64,10 +64,21 @@ static u32 mx31_get_mcu_main_clk(void)
static u32 mx31_get_ipg_clk(void)
{
u32 freq = mx31_get_mcu_main_clk();
- u32 pdr0 = __REG(CCM_PDR0);
+ u32 pdr0 = readl(CCM_PDR0);
- freq /= ((pdr0 3) 0x7) + 1;
- freq /= ((pdr0 6) 0x3) + 1;
+ freq /= GET_PDR0_MAX_PODF(pdr0) + 1;
+ freq /= GET_PDR0_IPG_PODF(pdr0) + 1;
+
+ return freq;
+}
+
+/* hsp is the clock for the ipu */
+static u32 mx31_get_hsp_clk(void)
+{
+ u32 freq = mx31_get_mcu_main_clk();
+ u32 pdr0 = readl(CCM_PDR0);
+
+ freq /= GET_PDR0_HSP_PODF(pdr0) + 1;
return freq;
}
@@ -77,6 +88,7 @@ void mx31_dump_clocks(void)
u32 cpufreq = mx31_get_mcu_main_clk();
printf(mx31 cpu clock: %dMHz\n,cpufreq / 100);
printf(ipg clock : %dHz\n, mx31_get_ipg_clk());
+ printf(hsp clock : %dHz\n, mx31_get_hsp_clk());
}
unsigned int mxc_get_clock(enum mxc_clock clk)
@@ -88,6 +100,8 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
case MXC_CSPI_CLK:
case MXC_UART_CLK:
return mx31_get_ipg_clk();
+ case MXC_IPU_CLK:
+ return mx31_get_hsp_clk();
}
return -1;
}
@@ -104,10 +118,10 @@ void mx31_gpio_mux(unsigned long mode)
reg = IOMUXC_BASE + (mode 0x1fc);
shift = (~mode 0x3) * 8;
- tmp = __REG(reg);
+ tmp = readl(reg);
tmp = ~(0xff shift);
tmp |= ((mode IOMUX_MODE_POS) 0xff) shift;
- __REG(reg) = tmp;
+ writel(tmp, reg);
}
void mx31_set_pad(enum iomux_pins pin, u32 config)
@@ -118,10 +132,10 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
field = (pin + 2) % 3;
- l = __REG(reg);
+ l = readl(reg);
l = ~(0x1ff (field * 10));
l |= config (field * 10);
- __REG(reg) = l;
+ writel(l, reg);
}
diff --git a/arch/arm/include/asm/arch-mx31/clock.h
b/arch/arm/include/asm/arch-mx31/clock.h
index fb035c4..1ea5a47 100644
--- a/arch/arm/include/asm/arch-mx31/clock.h
+++ b/arch/arm/include/asm/arch-mx31/clock.h
@@ -29,10 +29,11 @@ enum mxc_clock {
MXC_IPG_CLK,
MXC_CSPI_CLK,
MXC_UART_CLK,
+ MXC_IPU_CLK
};
unsigned int mxc_get_clock(enum mxc_clock clk);
-extern u32 imx_get_uartclk();
+extern u32 imx_get_uartclk(void);
extern void mx31_gpio_mux(unsigned long mode);
extern void mx31_set_pad(enum iomux_pins pin, u32 config);
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h
b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 3c8d607..c24dae2 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -518,6 +518,20 @@ enum iomux_pins {
#define PLL_MFI(x) (((x) 0xf) 10)
#define PLL_MFN(x) (((x) 0x3ff) 0)
+#define GET_PDR0_CSI_PODF(x) (((x) 23) 0x1ff)
+#define GET_PDR0_PER_PODF(x) (((x) 16) 0x1f)
+#define GET_PDR0_HSP_PODF(x) (((x) 11) 0x7)
+#define GET_PDR0_NFC_PODF(x) (((x) 8) 0x7)
+#define GET_PDR0_IPG_PODF(x) (((x) 6) 0x3)
+#define GET_PDR0_MAX_PODF(x) (((x) 3) 0x7)
+#define GET_PDR0_MCU_PODF(x) ((x) 0x7)
+
+#define GET_PLL_PD(x) (((x) 26) 0xf)
+#define GET_PLL_MFD(x) (((x) 16) 0x3ff)
+#define
[U-Boot] [PATCH 2/2] Moving mx3fb.c to CONFIG_VIDEO
mx3fb.c was based on CONFIG_LCD and is moved by this patch to
CONFIG_VIDEO, which has greater freedom in selecting videomodes
even at runtime.
This renders the accumulating list of display defines
(CONFIG_DISPLAY_VBEST..., CONFIG_DISPLAY_C057...) obsolete as
these may be setup through env variables:
setenv mydisplay
video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,
le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:100663296,vmode:0
setenv videomode mydisplay
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2:
- replace __REG() in mx3fb.c by readl()/writel()
- cosmetic changes (newlines, multiline comments)
- clock init and divider setup clarified
- printf() instead of debug() for width and height coerces
drivers/video/Makefile |2 +-
drivers/video/cfb_console.c |7 +
drivers/video/mx3fb.c | 449 +--
3 files changed, 265 insertions(+), 193 deletions(-)
diff --git a/drivers/video/Makefile b/drivers/video/Makefile
index 086dc05..2c0e500 100644
--- a/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@ -34,7 +34,7 @@ COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o videomodes.o
COBJS-$(CONFIG_VIDEO_MB86R0xGDC) += mb86r0xgdc.o videomodes.o
-COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o
+COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o videomodes.o
COBJS-$(CONFIG_VIDEO_MX5) += mxc_ipuv3_fb.o ipu_common.o ipu_disp.o
COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o
COBJS-$(CONFIG_SED156X) += sed156x.o
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index 3a93b64..4e653b8 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -161,6 +161,13 @@
#endif
/*
+ * Defines for the i.MX31 driver (mx3fb.c)
+ */
+#ifdef CONFIG_VIDEO_MX3
+#define VIDEO_FB_16BPP_WORD_SWAP
+#endif
+
+/*
* Include video_fb.h after definitions of VIDEO_HW_RECTFILL etc.
*/
#include video_fb.h
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index 0c925a0..0f33847 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -1,6 +1,8 @@
/*
* Copyright (C) 2009
* Guennadi Liakhovetski, DENX Software Engineering, l...@denx.de
+ * Copyright (C) 2011
+ * HALE electronic GmbH, helmut.rai...@hale.at
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -21,100 +23,20 @@
* MA 02111-1307 USA
*/
#include common.h
-#include lcd.h
-#include asm/arch/clock.h
+#include malloc.h
+#include video_fb.h
+
#include asm/arch/imx-regs.h
+#include asm/arch/clock.h
#include asm/errno.h
+#include asm/io.h
-DECLARE_GLOBAL_DATA_PTR;
-
-void *lcd_base;/* Start of framebuffer memory */
-void *lcd_console_address; /* Start of console buffer */
-
-int lcd_line_length;
-int lcd_color_fg;
-int lcd_color_bg;
-
-short console_col;
-short console_row;
-
-void lcd_initcolregs(void)
-{
-}
-
-void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue)
-{
-}
-
-void lcd_disable(void)
-{
-}
-
-void lcd_panel_disable(void)
-{
-}
+#include videomodes.h
-#define msleep(a) udelay(a * 1000)
-
-#if defined(CONFIG_DISPLAY_VBEST_VGG322403)
-#define XRES 320
-#define YRES 240
-#define PANEL_TYPE IPU_PANEL_TFT
-#define PIXEL_CLK 156000
-#define PIXEL_FMT IPU_PIX_FMT_RGB666
-#define H_START_WIDTH 20 /* left_margin */
-#define H_SYNC_WIDTH 30 /* hsync_len */
-#define H_END_WIDTH(38 + 30) /* right_margin + hsync_len */
-#define V_START_WIDTH 7 /* upper_margin */
-#define V_SYNC_WIDTH 3 /* vsync_len */
-#define V_END_WIDTH(26 + 3)/* lower_margin + vsync_len */
-#define SIG_POL(DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
+/* this might need panel specific set-up as-well */
#define IF_CONF0
-#define IF_CLK_DIV 0x175
-#elif defined(CONFIG_DISPLAY_COM57H5M10XRC)
-#define XRES 640
-#define YRES 480
-#define PANEL_TYPE IPU_PANEL_TFT
-#define PIXEL_CLK 4
-#define PIXEL_FMT IPU_PIX_FMT_RGB666
-#define H_START_WIDTH 120 /* left_margin */
-#define H_SYNC_WIDTH 30 /* hsync_len */
-#define H_END_WIDTH(10 + 30) /* right_margin + hsync_len */
-#define V_START_WIDTH 35 /* upper_margin */
-#define V_SYNC_WIDTH 3 /* vsync_len */
-#define V_END_WIDTH(7 + 3) /* lower_margin + vsync_len */
-#define SIG_POL(DI_D3_DRDY_SHARP_POL | DI_D3_CLK_POL)
-#define IF_CONF0
-#define IF_CLK_DIV 0x55
-#else
-#define XRES 240
-#define YRES 320
-#define PANEL_TYPE IPU_PANEL_TFT
-#define PIXEL_CLK 185925
-#define PIXEL_FMT IPU_PIX_FMT_RGB666
-#define H_START_WIDTH 9 /* left_margin */
-#define H_SYNC_WIDTH 1 /* hsync_len */
-#define H_END_WIDTH(16 + 1)/* right_margin
[U-Boot] Anything missing?
Is there anything missing for this patch to be accepted? Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] mx31: make HSP clock for mx3fb driver available
On 08/22/2011 06:02 PM, Marek Vasut wrote: ... _COSMETIC_, while this new mx3fb driver really works nicely ;-) Oh my sense for metrosexuality of code really kicks in here ;-) Arousal was not my first objective, but deliberately endorsed :-P I'll do what can be done easily concerning the bit accesses. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mx3fb: move to CONFIG_VIDEO to support videomodes
On 08/22/2011 07:13 PM, Stefano Babic wrote:
I see you updated the code synchronizing it with the linux driver. Add
to the commit message the kernel version (better: the commit id) of the
kernel you used as base for your changes, so that everybody in future
can know where it comes from.
Ok.
+static struct ctfb_res_modes *mode;
+static struct ctfb_res_modes var_mode;
+
+
One newline should be enough.
Sure.
- * @pixel_fmt: pixel format of buffer as FOURCC ASCII code.
pixel_fmt is still in the parameter list, and di_panel should be added
to the description.
I'll update it.
+reg = width + mode-left_margin + mode-right_margin - 1;
+if (reg 1023) {
+debug(display width too large, coerced to 1023!);
+reg = 1023;
I do not if it is better to try to adapt the values if the caller pass
to the function wrong parameters. Probably it does not work. I think in
these case it is better to output an error (print instead of debug) and
return without with an error. What do you think ?
I put that code in as I tried to adjust the porches (left and right
margin) for our display.
If it is coerced the way I did, you'll never overwrite other bits in the
same register field, so
you can still see the effect it has. I preferred it during display
configuration, so I left it in.
We could output an error (not only during debug builds) but write the
registers anyway.
-switch (PANEL_TYPE) {
+switch (di_panel) {
case IPU_PANEL_SHARP_TFT:
reg_write(0x00FD0102L, SDC_SHARP_CONF_1);
reg_write(0x00F500F4L, SDC_SHARP_CONF_2);
reg_write(SDC_COM_SHARP | SDC_COM_TFT_COLOR, SDC_COM_CONF);
+/* TODO: probably IF_CONF must be adapted (see below)! */
I do not understand this comment.
Each display specific define found an equivalent in the ctfb_res_modes
struct.
IF_CONF however is currently always 0, but might need adaption for SHARP
TFT panels, which
I could not test.
/* Init clocking */
-/*
- * Calculate divider: fractional part is 4 bits so simply multiple by
- * 2^4 to get fractional part, as long as we stay under ~250MHz and on
- * i.MX31 it (HSP_CLK) is= 178MHz. Currently 128.267MHz
+/* Calculate divider: the IPU receives its clock from the hsp divder */
+/* fractional part is 4 bits so simply multiple by 2^4 to get it
Multiline comments, you should use the same style as in the removed lines.
Ok.
+div = ((mxc_get_clock(MXC_IPU_CLK)/1024)*(mode-pixclock/128))/476837;
I try to understand this line. pixclock is in ps, as in kernel. I am
missing something. I am expecting to have the same formula as in kernel,
where I can read:
div = clk_get_rate(ipu_clk) * 16 / pixel_clk;
Where does 476837 come from ?
Well I already thought that might need another line of comment. In the
kernel the pixel_clk really
is a clock value, while it is a time (in pico seconds) in this driver. I
could have calculated the
pixel clock from the pixel time value first:
pixel_clk = 1e12 / mode-pixclock;
div = ipu_clk * 16 / pixel_clk;
I simply put that into one calculation:
div = ipu_clk * 16 / (1e12 / mode-pixclock)
or
div = ipu_clk * mode-pixclock / ~60e6;
but this would provoke an overflow problem during the multiplication, so
I split the division to
1024, 128 and 476837 which exactly gives 1e12 / 16 (~60e6). So I have 2
shifts a multiplication and a division.
Probably I simply put the 2 code lines above into a comment. The name
'pixel_clk' is actually misleading, but it sat there already. We could
use 'pixel_ps' in ctfb_res_modes instead?
+/*
+ * The current implementation is only tested for GDF_16BIT_565RGB!
+ * It was switched from the original CONFIG_LCD setup to CONFIG_VIDEO,
+ * because the lcd code seemed loaded with color table stuff, that
+ * does not relate to most modern TFTs. cfb_console.c looks more
+ * straight forward.
+ * This is the environment setting for the original setup
+ unknown=video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,le:9,ri:17,
+up:7,lo:10,hs:1,vs:1,sync:100663296,vmode:0
+ videomode=unknown
Multiline comment. As original setup you mean the setup if not
CONFIG_DISPLAY_* was set, right ?
I'll fix the comment and yes you're right.
+void *video_hw_init(void)
{
-return ((panel_info.vl_col * panel_info.vl_row *
-NBITS(panel_info.vl_bpix)) / 8) + PAGE_SIZE;
+char *penv;
+u32 memsize;
+unsigned long t1, hsynch, vsynch;
+int bits_per_pixel, i, tmp, vesa_idx = 0, videomode;
+
+tmp = 0;
+
+videomode = CONFIG_SYS_DEFAULT_VIDEO_MODE;
Ok. This is a way to fix qong/phycore after merging these patches, and
avoid that they do not work anymore if the videomode variable is not
set. I write it down...
Perfect. I could have done that already, but lacking hardware to test
with ...
Anatolij, should be this code not general ? It is not strictly related
to the
Re: [U-Boot] [PATCH 2/2] mx3fb: move to CONFIG_VIDEO to support videomodes
Please ignore the 2 messages sent at 8:30, obviously the save and send buttons changed position. Helmut -- Scanned by MailScanner. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] mx3fb: move to CONFIG_VIDEO to support videomodes
I just found that the mx3fb driver uses:
static inline u32 reg_read(unsigned long reg)
{
return __REG(reg);
}
static inline void reg_write(u32 value, unsigned long reg)
{
__REG(reg) = value;
}
I am about to change this to readl() and writel(), should I do it in a
separate 'cosmetic only' patch before the really thing?
As it is more or less a re-write anyway (350 of 900 lines changed), it
think its probably ok to do it in one shot.
Helmut
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[U-Boot] [PATCH V2 1/2] net/eth.c: throw BUG for eth_get_dev_by_name(NULL)
eth_get_dev_by_name() is not safe to use for devname being NULL
as it uses strcmp. This patch makes it fail with a BUG().
Signed-off-by: Helmut Raiger helmut.rai...@hale.at
---
V2: use BUG_ON() instead of gracefully returning 0
net/eth.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/net/eth.c b/net/eth.c
index 6523834..25c147c 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -107,6 +107,8 @@ struct eth_device *eth_get_dev_by_name(const char *devname)
{
struct eth_device *dev, *target_dev;
+ BUG_ON(devname == 0);
+
if (!eth_devices)
return NULL;
--
1.7.4.4
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