Re: [U-Boot] where would i find the u-boot repo with TI DM8148 support?

[John Rigby]

On Thu, Nov 8, 2012 at 8:27 AM, Robert P. J. Day rpj...@crashcourse.ca wrote:

   might be playing with a TI DM8148-based dev kit so i'm looking for
 the git repo that matches the instructions here:

 http://processors.wiki.ti.com/index.php/DM814x_AM387x_PSP_U-Boot

 the instructions there clearly refer to a tree with support for the
 ti8148_evm, but i can't find that in the master tree, nor in the ti
 tree or arm tree listed here:

 http://www.denx.de/wiki/U-Boot/Custodians?sortcol=3table=1up=0

This is probably a question for TI not the u-boot community since they
are the ones who choose not to upstream this code.

It appears to be in the arago project here:

http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary

Beware, it is old cruft from 2010.

--john
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Re: [U-Boot] v2012.10-rc2 tar balls on ftp

[John Rigby]

On Wed, Oct 3, 2012 at 1:20 AM, Deltour, Stephane
stephane.delt...@barco.com wrote:
 Hi,

 Would it be possible to have the v2012.10-rc1 and v2012.10-rc2 tarballs
 on the ftp site ?

Have you tried the snapshots feature on the git.denx.de website?

--john
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[U-Boot] trouble with mmc on origen

[John Rigby]

Jaehoon,

I get timeouts on multiblock mmc reads with v2012.07 u-boot.  I did a
bisect and found that it is broken back to

442d55685e1e2310d546044a6519ae73e4ba348a   mmc: support the sdhci
instead of s5p_mmc for samsung-soc
and
236bfecff8091356d81e79da3281b9e4af967468 mmc: add the quirk to use the
sdhci for samsung-soc

That second commit seems to adds two new quirks
SDHCI_QUIRK_NO_HISPD_BIT and SDHCI_QUIRK_BROKEN_VOLTAGE  but I don't
see any board using these so perhaps these need to be enabled for
origen?

Thanks,
--john
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Re: [U-Boot] A Problem of u-boot on TI PandaBoard porting

[John Rigby]

 *u-boot/spl/u-boot-spl.lds:1: syntax error
 make[1]: *** [/home/qian/Desktop/u-boot/spl/u-boot-spl] Error 1
 make[1]: Leaving directory `/home/qian/Desktop/u-boot/spl'
 make: *** [spl/u-boot-spl.bin] Error 2*

 I’ve check the file ‘spl/u-boot-spl.lds’, the first line is a comment as
 below:
 *// add PandaTest Configuration*

Change that comment to a C style one like /* . */ and I think the
problem will go away.
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Re: [U-Boot] Transferring images quickly with no Ethernet

[John Rigby]

On Wed, Dec 14, 2011 at 4:15 PM, Rishi Dhupar ris...@gmail.com wrote:
 I have an embedded system with an OMAP3 that does not have an Ethernet
 support.  The only means of I/O to the process it is serial and USB
 slave.  Loading binary data over the serial line is just too slow; is
 there any way to the USB slave to perform bulk transfers to speed my
 development process up?  It does not look the U-Boot supports USB
 Ethernet gadget which is what I am using in Linux.
Search the list archives for dfu and/or fastboot patch submissions.
Nothing has made it upstream yet but you may find something good
enough for your purposes.

--john
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Re: [U-Boot] u-boot master on a pandaboard won't boot

[John Rigby]

On Wed, Nov 2, 2011 at 3:12 PM, Lalancette, Christopher
clalance...@irobot.com wrote:
 If you use SPL instead (so the 'MLO' that U-Boot also builds) does
 everything work again?

 Oh, I didn't even notice that u-boot now builds an MLO.  Thanks for the heads 
 up.

 Unfortunately, that doesn't help; when I copy both the new MLO and the new 
 u-boot.bin into place (again from git
 head), I don't get any output from my serial console at all.  I presume that 
 means it is hanging up somewhere in
 the MLO.
MLO loads u-boot.img by default not u-boot.bin.  That may be your problem.

--john
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Re: [U-Boot] SPL broken for pandaboard with v2011.09?

[John Rigby]

On Tue, Oct 11, 2011 at 3:00 PM, Steve Sakoman sako...@gmail.com wrote:
 I'm considering using SPL instead of x-load for an upcoming omap project.

 To begin learning about SPL I tried building and running SPL for
 pandaboard using v2011.09.

 With my initial build I got the following output:

  U-Boot SPL 2011.09 (Oct 11 2011 - 10:18:27)
 Texas Instruments OMAP4430 ES2.0
 SDRAM: identified size not same as expected size identified: 4
 expected: 2000

 MMC Device 0 not found
 spl: mmc device not found!!
 ### ERROR ### Please RESET the board ###

 Searching the list to see if others were having trouble, I found this
 patch and applied it: [U-Boot] [PATCH] omap: spl: fix build break due
 to changes in FAT

 This eliminated the MMC error, but spl still seems broken:

 U-Boot SPL 2011.09 (Oct 11 2011 - 13:42:38)
 Texas Instruments OMAP4430 ES2.0
 SDRAM: identified size not same as expected size identified: 4
 expected: 4000
 : 738198048,

 Has anyone else been able to successfully use SPL on pandaboard with v2011.09?

You may want to see if the spl is oversize.  Sometime ago the size was
pushed up to 38K but the base was not moved to  accommodate the extra
size so there has been the possibility of problems since then.  I work
around it in my own tree by moving CONFIG_SPL_TEXT_BASE down but that
breaks HS devices.  The patches that start with this email
http://lists.denx.de/pipermail/u-boot/2011-September/102518.html set
the size back to 32K.

--john
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Re: [U-Boot] SPL broken for pandaboard with v2011.09?

[John Rigby]

On Wed, Oct 12, 2011 at 4:08 PM, Steve Sakoman sako...@gmail.com wrote:
 On Wed, Oct 12, 2011 at 3:00 PM, John Rigby john.ri...@linaro.org wrote:

 Has anyone else been able to successfully use SPL on pandaboard with 
 v2011.09?

 You may want to see if the spl is oversize.  Sometime ago the size was
 pushed up to 38K but the base was not moved to  accommodate the extra
 size so there has been the possibility of problems since then.  I work
 around it in my own tree by moving CONFIG_SPL_TEXT_BASE down but that
 breaks HS devices.  The patches that start with this email
 http://lists.denx.de/pipermail/u-boot/2011-September/102518.html set
 the size back to 32K.

 I saw those patches and have those changes incorporated too.

 The spl I built is less than 32K.

 It seems that the issue is in RAM setup -- the RAM test fails after
 one word (hence it reporting 4 byte RAM size).

My tree has the precalculated ddr timing patch:

U-Boot/SPL: omap4: Make ddr pre-calculated timings as default.

All ddr configurations(geometry/timings) are done automatically
by detecting the device connected at run time. Though this
is a useful feature, making this as a default setting increases
the code size by about 2K bytes. This is quite big, especially
in the case of SPL which runs from a smaller SRAM. So do not
use this feature as the default setting, instead use the
precalculated tables.

Signed-off-by: sricharan r.sricha...@ti.com

But you probably picked that up with the spl size fix from the same author.


 Is your tree based on v2011.09?  Is it public?

My tree has a bunch of extra patches on top and is based on rc2.  I
know it works:

http://git.linaro.org/gitweb?p=boot/u-boot-linaro-stable.git;a=summary

My -next tree has had no testing because I only just put it together.
It is nearly identical to the above but rebased to v2011.09 final:

http://git.linaro.org/gitweb?p=boot/u-boot-linaro-next.git;a=summary

Let me know how it goes.

--john
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[U-Boot] omap3_beagle problem booting kernel on latest u-boot

[John Rigby]

Aneesh, Dirk, Jason:

During our monthly release testing of Linaro images we discovered that
the kernel was pretty unreliable with the latest upstream u-boot.
After bisecting we found that reverting this patch fixes the problem

commit 45bf05854bc94ed8bae9e9114292895b990327ea
Author: Aneesh V ane...@ti.com
Date:   Thu Jun 16 23:30:53 2011 +

armv7: adapt omap3 to the new cache maintenance framework

adapt omap3 to the new layered cache maintenance framework

Signed-off-by: Aneesh V ane...@ti.com

No idea why because we tried disabling cache by adding
CONFIG_SYS_DCACHE_OFF to the board config but that did not seem to fix
the problem.  The problem in the kernel was general instability
usually ending in the rootfs not being mounted.  Sometimes random
kernel crashes have been observed.  We have never made it to a shell
prompt before reverting.

If we figure anything else out we will let you know.

--john
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Re: [U-Boot] omap3_beagle problem booting kernel on latest u-boot

[John Rigby]

On Thu, Sep 29, 2011 at 3:09 AM, Aneesh V ane...@ti.com wrote:
 John,

 My primary suspect would be cache. But the fact that
 CONFIG_SYS_DCACHE_OFF is not helping is strange. Could you double-check
 this and also make sure that CONFIG_SYS_L2CACHE_OFF is enabled too.


Ok, verified that CONFIG_SYS_DCACHE_OFF is defined and also added
CONFIG_SYS_L2CACHE_OFF.  And it still fails.

--john
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Re: [U-Boot] USB on OMAP3

[John Rigby]

On Wed, Aug 31, 2011 at 9:28 AM, Gary Thomas g...@mlbassoc.com wrote:

 I'm using v2011.06 on the TI OMAP3 platform (internal, similar to
 BeagleBoard)

 I'd like my board to support both EHCI and MUSB in host mode.
 However, when I define both of these, I get compile errors:
 drivers/usb/musb/libusb_musb.o: In function `usb_lowlevel_stop':
 /local/DM3730/u-boot/drivers/usb/musb/musb_hcd.c:1149: multiple definition
 of `usb_lowlevel_stop'
 drivers/usb/host/libusb_host.o:/local/DM3730/u-boot/drivers/usb/host/ehci-hcd.c:795:
 first defined here
 drivers/usb/musb/libusb_musb.o: In function `submit_int_msg':
 /local/DM3730/u-boot/drivers/usb/musb/musb_hcd.c:1162: multiple definition
 of `submit_int_msg'
 drivers/usb/host/libusb_host.o:/local/DM3730/u-boot/drivers/usb/host/ehci-hcd.c:900:
 first defined here
 drivers/usb/musb/libusb_musb.o: In function `submit_bulk_msg':
 /local/DM3730/u-boot/drivers/usb/musb/musb_hcd.c:949: multiple definition
 of `submit_bulk_msg'
 drivers/usb/host/libusb_host.o:/local/DM3730/u-boot/drivers/usb/host/ehci-hcd.c:865:
 first defined here
 drivers/usb/musb/libusb_musb.o: In function `submit_control_msg':
 /local/DM3730/u-boot/drivers/usb/musb/musb_hcd.c:849: multiple definition
 of `submit_control_msg'
 drivers/usb/host/libusb_host.o:/local/DM3730/u-boot/drivers/usb/host/ehci-hcd.c:877:
 first defined here
 drivers/usb/musb/libusb_musb.o: In function `usb_lowlevel_init':
 /local/DM3730/u-boot/drivers/usb/musb/musb_hcd.c:1097: multiple definition
 of `usb_lowlevel_init'
 drivers/usb/host/libusb_host.o:/local/DM3730/u-boot/drivers/usb/host/ehci-hcd.c:799:
 first defined here

 Is this expected to work?  If not, any pointers on how I might make
 both controllers play nice?

 I think the answer there is no the musb* and ehci* apis both expect to be
the only usb host code enabled at any one time.  I suspect to fix this you
would have to add some abstration to u-boot to deal with multiple host
controlllers at runtime.

--john
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Re: [U-Boot] Flat tree support

[John Rigby]

On Thu, Aug 18, 2011 at 10:41 PM,  smitha.va...@wipro.com wrote:

 Hi Wolfgang,

 I have taken the sources of u-boot for version 1.1.6. I don't see flat
 tree support enable for any
 Board based on mpc8260 (CONFIG_OF_FLAT_TREE)I checked for
 IDS8272,MPC8260ADS. Can you let me know is there support for
 Flat tree structure for 603e cores. Also I don't see ft_setup function
 for this process.

 Regards,
 Smitha

U-Boot 1.1.6 is nearly five years old (29Oct2006).  Please consider
updating to a modern version.
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Re: [U-Boot] Flat tree support

[John Rigby]

On Thu, Aug 18, 2011 at 11:11 PM,  smitha.va...@wipro.com wrote:

 Hi ,

 Can you point me to the latest stable uboot sources.


Start here: http://www.denx.de/wiki/U-Boot/WebHome

and from there you will find a pointer to the release schedule

http://www.denx.de/wiki/U-Boot/ReleaseCycle

eventually you will find your way to the git repo for u-boot.

--john
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[U-Boot] building mx5 targets with O= fails

[John Rigby]

Stefano,

Since:

commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47
Author: Stefano Babic sba...@denx.de
Date:   Thu Jul 7 03:37:06 2011 +

MX5: Update to autogenerated asm-offsets.h

On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic sba...@denx.de
CC: Matthias Weisser weiss...@arcor.de

building with O= does not work for me:

make[1]: Entering directory
`/home/jcrigby/work/git-trees/u-boot/u-boot/arch/arm/cpu/armv7/mx5'
arm-linux-gnueabi-gcc-4.5   -D__ASSEMBLY__ -g  -Os   -fno-common
-ffixed-r8 -msoft-float   -D__KERNEL__
-DCONFIG_SYS_TEXT_BASE=0x9780
-I/home/jcrigby/work/git-trees/u-boot/u-boot/debian/build/mx/include2
-I/home/jcrigby/work/git-trees/u-boot/u-boot/debian/build/mx/include
-I/home/jcrigby/work/git-trees/u-boot/u-boot/include -fno-builtin
-ffreestanding -nostdinc -isystem
/usr/lib/gcc/arm-linux-gnueabi/4.5.3/include -pipe  -DCONFIG_ARM
-D__ARM__ -marm  -mabi=aapcs-linux -mno-thumb-interwork -march=armv5
-o 
/home/jcrigby/work/git-trees/u-boot/u-boot/debian/build/mx/arch/arm/cpu/armv7/mx5/lowlevel_init.o
lowlevel_init.S -c
lowlevel_init.S:24:34: fatal error: asm/arch/asm-offsets.h: No such
file or directory
compilation terminated.

--john
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Re: [U-Boot] [ RFC ] fastboot protocol support in u-boot

[John Rigby]

On Tue, Aug 16, 2011 at 8:47 AM, Stefan Schmidt
ste...@datenfreihafen.org wrote:


 Given these different use cases I never seen fastboot and DFU as
 competitors. Personally I see DFU as a good and standardized way of
 _flashing_ devices while fastboot/novacom are way to communicate with
 the bootloader (allow flashing as on task).


Just my two cents.  From my discussions with Android developers, they
use fastboot as a quick turnaround way of getting an image on a board
during iterative development.

The other thing I think is important is the ability to choose DFU or
fastboot at run time vs compile time.  So we should be able to have
both features turned on in a given u-boot binary.  This means of
course that fastboot, or DFU would not assume it owned the gadget USB
HW.

--John
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Re: [U-Boot] [ RFC ] fastboot protocol support in u-boot

[John Rigby]

On Tue, Aug 16, 2011 at 12:12 PM, Stefan Schmidt
ste...@datenfreihafen.org wrote:


 I'm still curious though if there are practical needs for both
 fastboot and DFU enabled.


My only point was that I would rather DFU, Fastboot, USBSerial and any
other potential users of MUSB or other gadget usb hw not be written in
a way that it is the only consumer of the hw.  I should be able to
choose at config time which I will potentially use and at run time
which I actually use.  That way the same u-boot.bin could be used with
DFU one day and Fastboot another without rebuilding and reinstalling.

--John
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Re: [U-Boot] [PATCH] mkimage: Fix 'Unknown OMAP image type - 5'

[John Rigby]

 Seems to me like init
 functions are not / should not be dependent on order, so the fix
 seems fragile to me, at least as long as we cannot add a good
 explanation.

 Yes, I agree.

 John? Aneesh? Any idea?

The method check_image_type in image_type_params is supposed to just
return success or failure.  However, for omap it also calls fprintf:

static int omapimage_check_image_types(uint8_t type)
{
if (type == IH_TYPE_OMAPIMAGE)
return EXIT_SUCCESS;
else {
fprintf(stderr, Unknown OMAP image type - %x, type);
return EXIT_FAILURE;
}
}

I just looked at all the other image checkers and no others have this
so the fix is to simply remove the fprintf.  I obviously did not
understand this when I wrote the original.

John
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[U-Boot] status of patches in usb next branch

[John Rigby]

Remy,

Are the patches in your next branch candidates for moving to master
and doing a pull request or is there still work to be done?

Thanks,
John
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Re: [U-Boot] strawman Fastboot in U-Boot Design Doc

[John Rigby]

Zach, I did go one more round with WD on the fastboot with a strawman
proposal.  I never followed up because I was not sure that the resources
were commited to do it in Linaro.

Forwarded conversation
Subject: [U-Boot] strawman Fastboot in U-Boot Design Doc


From: *John Rigby* john.ri...@linaro.org
Date: Thu, Apr 28, 2011 at 7:07 PM
To: u-boot@lists.denx.de, Wolfgang Denk w...@denx.de


Here a first draft design doc.  It is based in part on the Fastboot
implementation in the rowboat git repo (pointer below).

As always, comments welcome.
John

Purpose
===

Mainline support for Android Fastboot would be useful.  Arguing the merits
of Fastboot vs DFU is not in the scope of this document.  This document
is to discuss design goals/requirements of an implementation of
Fastboot in U-Boot.

Background
==

See the Android Fastboot page in Omappedia for an example of how
Fastboot is used to flash nand partitions on an Android device.
http://www.omappedia.org/wiki/Android_Fastboot

A description of the Fastboot protocol is available in the gitorious
rowboat git repo.
http://gitorious.org/rowboat/bootable-bootloader-legacy/blobs/master/fastboot_protocol.txt

Hooks into U-Boot
=

Fastboot gets access to the USB subsystem via the same interfaces as
USB_TTY,
namely the udc_* api's:
   udc_init
   udc_startup_events
   udc_connect
   udc_poll
   udc_setup_ep
   etc.

Startup
===

Fastboot will be started on the target by issuing the fastboot command.
Optionally a board specific startup method may exist.  For example if
a certain combination of keys is pressed on reset then fastboot will be
started immediately.

Shutdown


Once started the fastboot command will continue until:
   CTRL-C is typed on the console
   a continue command is sent from the host
   usb cable is removed
   no commands have been sent from the host for some configurable
timeout

Coexistance With USB_TTY and DFU


One should be able to enable USB_TTY, DFU and Fastboot at compile time
and chose one at runtime.

Questions


Should a Fastboot host program be included in the U-Boot source?
Could Fastboot be implemented as an extension to USB_TTY?
Could Fastboot, DFU and USB_TTY share a layer of code above the
udc_* api's?
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From: *Wolfgang Denk* w...@denx.de
Date: Fri, Apr 29, 2011 at 4:48 AM
To: John Rigby john.ri...@linaro.org
Cc: u-boot@lists.denx.de


Dear John Rigby,
Thanks.
Does it make sense to restrict this to USB?  Or should we decouple the
protocol part from the actual transport path?  Maybe it would make
sense to provide the same feature over plain serial line, or over
Ethernet?

Also please keep in mind that there are many ways how a system can
interact with the operator: we have plain old serial console,
netconsole, console over serial over USB, netconsole over Ethernet
over USB, ...

We should make sure that at least on the conceptual level adding
fastboot support will not cause any conflicts.
OK.
This has nothing to do with fastboot, and should be kept as a separate
item.  Normally U-Boot allows, when keys are supported, to map any
combination of key presses to any commands, i. e. this is in no way
restricted to or dependent on fastboot support.
This probably needs configuration.

usb cable is removed probably makes little sense when running
fastboot protocol over a serial port.

Also, this feature would require permanent polling of the USB status.
Is this needed?
I'm not sure what exactly you mean by chose one at runtime. It is
pretty much clear that you don't want to run DFU and fastboot
simultaneously, but it is very likely that we will need USB_TTY (for
console over USB) or even Ethernet over USB for console and then want
to start fastboot.

I think I remember that fastboot may require adjustments of the USB
IDs and such - we will have to make sure that things like that do not
cause conflicts.

An area that raises additional questions is error handling. When
running fastboot over USB and with a serial console it is probably a
very good idea to provide error messages and maybe even status
reports on the console.  Will this still work with USB_TTY or
netconsole over Ethernet over USB?
Seems some peole want it...
I think we should at least split protocol handling and communication
layer.
At least they will have to co-exist with each other.

Best regards,

Wolfgang Denk

--
DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
A dirty mind is a joy forever.   - Randy Kunkee

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From: *Detlev Zundel* d...@denx.de
Date: Fri, Apr 29, 2011 at 5:02 AM
To: John Rigby john.ri

Re: [U-Boot] u-boot hangs on panda board after some time

[John Rigby]

On Thu, Jun 9, 2011 at 8:42 AM, Mike Frysinger vap...@gentoo.org wrote:
 On Thu, Jun 9, 2011 at 03:28, Vivi wrote:
 On TI panda board, stay in u-boot and do nothing in 30 minutes, then
 try to get mmc info or reset, u-boot will hang.

 sounds like the core timer logic is broken for whatever omap part is on there

That is correct, once the timer reaches 0x it reloads with
0x and gets stuck there.  I did a patch that was never
accepted late last year.  On more careful consideration my patch was
also broken but in different ways.

http://patchwork.ozlabs.org/patch/76803/
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Re: [U-Boot] Pull request: u-boot-arm/master

[John Rigby]

On Tue, May 31, 2011 at 2:31 PM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
 Hi Wolfgang,

 The following changes since commit 5d1ee00b1fe1180503f6dfc10e87a6c6e74778f3:

   .gitignore: update list of u-boot.* files and add *.bin (2011-05-22
 23:46:26 +0200)

 are available in the git repository at:
   git://git.denx.de/u-boot-arm.git master

Albert,

I see my U8500 patches have not been merged yet.  Is there a chance
they will be sometime merged?

ttp://patchwork.ozlabs.org/patch/92053/
http://patchwork.ozlabs.org/patch/92052/
http://patchwork.ozlabs.org/patch/92054/

Thanks,
John
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[U-Boot] Patches for rc2

[John Rigby]

Sending from different account to see if it makes a difference.

Albert,

I would like to see these three U8500 patches go in:
http://patchwork.ozlabs.org/patch/92053/
http://patchwork.ozlabs.org/patch/92052/
http://patchwork.ozlabs.org/patch/92054/

Please let me know if there is a problem with these that I can fix.

Thanks,
John
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Re: [U-Boot] [PATCHv4 2/4] armv7: Add ST-Ericsson u8500 arch

[John Rigby]

On Tue, Apr 19, 2011 at 2:42 PM, John Rigby john.ri...@linaro.org wrote:
 Based on ST-Ericsson internal git repo.

 Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
 Signed-off-by: John Rigby john.ri...@linaro.org
 CC: Albert Aribaud albert.arib...@free.fr
 ---
 v2: cleanup, mostly removal of unused defines
 v3: remove prototype from sys_proto.h as suggested by Wolfgang
 v4: incorporate changes suggested by Albert:
  Add copyright to arch/arm/cpu/armv7/u8500/lowlevel.S
  Remove confusing/incorrect timer comment in arch/arm/cpu/armv7/u8500/timer.c
  Remove reset timer functions from /timer.c

Albert, can this and parts 3 and 4 go in for rc2?  As I said before
Heiko acked the I2C patch and indicated it was ok with him for it to
go in via your tree.

Thanks,
John
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Re: [U-Boot] [PATCH 2/3] omap4: add support for EHCI

[John Rigby]

On Mon, May 9, 2011 at 3:04 PM, Gilles Chanteperdrix
gilles.chanteperd...@xenomai.org wrote:

 diff --git a/drivers/usb/host/ehci-omap4.c b/drivers/usb/host/ehci-omap4.c
 new file mode 100644
 index 000..19cd286
 --- /dev/null
 +++ b/drivers/usb/host/ehci-omap4.c
 @@ -0,0 +1,268 @@
 +/*
 + * OMAP4 EHCI port, copied from linux/drivers/usb/host/ehci-omap.c
So the file in linux is for both omap[34] yet here in u-boot it is
only for omap4.  I admittedly know very little about EHCI internals
but it seems to me that it would be nice if this could support both in
u-boot.

I see from git history that omap3 support went in some months ago with
only some new routines in beagle.c and no new usb files so could some
omap usb expert explain.

Thanks,
John
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[U-Boot] [PATCH 1/4] Serial: pl011: new vendor init options

[John Rigby]

Two new options:

CONFIG_PL011_SERIAL_RLCR

Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers.  Set
this variable to initialize the extra register.

CONFIG_PL011_SERIAL_FLUSH_ON_INIT

On some platforms (e.g. U8500) U-Boot is loaded by a second stage
boot loader that has already initialized the UART.  Define this
variable to flush the UART at init time.
empty fifo on init

Signed-off-by: John Rigby john.ri...@linaro.org
Signed-off-by: Rabin Vincent rabin.vinc...@stericsson.com
---
v2: No changes
v3: Enable changes with new CONFIG_* options instead of platform.
Document new CONFIG_* options in README.
v4: Added delay before writing to RLCR.
Removed Rabin as author at his request.
v5: Fixed commit message p1011 to pl011

 README|   12 
 drivers/serial/serial_pl01x.c |   30 +++---
 drivers/serial/serial_pl01x.h |4 
 3 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/README b/README
index 76b1500..68ef2b2 100644
--- a/README
+++ b/README
@@ -475,6 +475,18 @@ The following options need to be configured:
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h
 
+   CONFIG_PL011_SERIAL_RLCR
+
+   Some vendor versions of PL011 serial ports (e.g. ST-Ericsson 
U8500)
+   have separate receive and transmit line control registers.  Set
+   this variable to initialize the extra register.
+
+   CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+
+   On some platforms (e.g. U8500) U-Boot is loaded by a second 
stage
+   boot loader that has already initialized the UART.  Define this
+   variable to flush the UART at init time.
+
 
 - Console Interface:
Depending on board, define exactly one serial port
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 5dfcde8..7a064ff 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -111,6 +111,15 @@ int serial_init (void)
unsigned int divider;
unsigned int remainder;
unsigned int fraction;
+   unsigned int lcr;
+
+#ifdef CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+   /* Empty RX fifo if necessary */
+   if (readl(regs-pl011_cr)  UART_PL011_CR_UARTEN) {
+   while (!(readl(regs-fr)  UART_PL01x_FR_RXFE))
+   readl(regs-dr);
+   }
+#endif
 
/* First, disable everything */
writel(0, regs-pl011_cr);
@@ -131,9 +140,24 @@ int serial_init (void)
writel(fraction, regs-pl011_fbrd);
 
/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
-   writel(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN,
-  regs-pl011_lcrh);
-
+   lcr = UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN;
+   writel(lcr, regs-pl011_lcrh);
+
+#ifdef CONFIG_PL011_SERIAL_RLCR
+   {
+   int i;
+
+   /*
+* Program receive line control register after waiting
+* 10 bus cycles.  Delay be writing to readonly register
+* 10 times
+*/
+   for (i = 0; i  10; i++)
+   writel(lcr, regs-fr);
+
+   writel(lcr, regs-pl011_rlcr);
+   }
+#endif
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE,
   regs-pl011_cr);
diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h
index b670c24..96ee381 100644
--- a/drivers/serial/serial_pl01x.h
+++ b/drivers/serial/serial_pl01x.h
@@ -43,7 +43,11 @@ struct pl01x_regs {
u32 pl010_lcrl; /* 0x10 Line control register, low byte */
u32 pl010_cr;   /* 0x14 Control register */
u32 fr; /* 0x18 Flag register (Read only) */
+#ifdef CONFIG_PL011_SERIAL_RLCR
+   u32 pl011_rlcr; /* 0x1c Receive line control register */
+#else
u32 reserved;
+#endif
u32 ilpr;   /* 0x20 IrDA low-power counter register */
u32 pl011_ibrd; /* 0x24 Integer baud rate register */
u32 pl011_fbrd; /* 0x28 Fractional baud rate register */
-- 
1.7.1

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Re: [U-Boot] [PATCHv3 0/4] ST-Ericsson U8500 support

[John Rigby]

On Thu, Apr 28, 2011 at 8:41 PM, John Rigby john.ri...@linaro.org wrote:
 On Thu, Apr 28, 2011 at 9:40 AM, Albert ARIBAUD
 albert.u.b...@aribaud.net wrote:
 Le 28/04/2011 16:47, John Rigby a écrit :

  armv7: Add ST-Ericsson u8500 arch
  armv7: Add support for ST-Ericsson U8500 href platform

 Applying these on top of the current u-boot-arm/master and trying a MAKEALL
 u8500_href (with an ELDK 4.2 toolchain) results in

 Configuring for u8500_href board...
 u8500_href.c:30:49: error: ../../../drivers/mmc/arm_pl180_mmci.h: No such
 file or directory
 u8500_href.c:30:49: error: ../../../drivers/mmc/arm_pl180_mmci.h: No such
 file or directory
 u8500_href.c: In function 'hrefplus_mmc_power_init':
 u8500_href.c:258: warning: implicit declaration of function 'prcmu_i2c_read'
 u8500_href.c:265: warning: implicit declaration of function
 'prcmu_i2c_write'
 u8500_href.c: In function 'board_mmc_init':
 u8500_href.c:453: warning: implicit declaration of function
 'arm_pl180_mmci_init'

 Amicalement,
 --
 Albert.

 Ok, we have a bit of a dependency problem.  I will followup on the
 pending mmc and i2c patches and once they have been committed ping
 you.

Heiko has acked the i2c patch and indicated it was ok for you to
commit it with the others.  The soc and board patches apply cleanly
and build now that the mmc driver is in.  So I think these can go in
now.

I will ping Wolfgang about the pl011 serial patch.

Thanks,
John
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Re: [U-Boot] [PATCH 1/3] omap4: add support for gpios

[John Rigby]

 I am going to fix this and resend another round of patches. But, it this
 the only thing I should fix?

My comment was not a complete review only a comment about sharing.
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Re: [U-Boot] [PATCH 1/3] omap4: add support for gpios

[John Rigby]

On Mon, May 9, 2011 at 11:04 PM, Gilles Chanteperdrix
gilles.chanteperd...@xenomai.org wrote:
 Copied from omap3.
I have not looked at the code but if it truly is a copy (other than
some base addresses) is there a way to share with omap3?

--john
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Re: [U-Boot] [PATCHv3 0/4] ST-Ericsson U8500 support

[John Rigby]

On Tue, Apr 12, 2011 at 12:17 AM, John Rigby john.ri...@linaro.org wrote:
 Add support for ST-Ericsson U8500 SoC and HREF platform

 John Rigby (2):
  armv7: Add ST-Ericsson u8500 arch
  armv7: Add support for ST-Ericsson U8500 href platform

 Michael Brandt (1):
  I2C: Add driver for ST-Ericsson U8500 i2c

 Rabin Vincent (1):
  Serial: p1011: new vendor init options

  README                                      |   12 +
  arch/arm/cpu/armv7/u8500/Makefile           |   46 ++
  arch/arm/cpu/armv7/u8500/clock.c            |   56 +++
  arch/arm/cpu/armv7/u8500/lowlevel.S         |   33 ++
  arch/arm/cpu/armv7/u8500/timer.c            |  167 
  arch/arm/include/asm/arch-u8500/clock.h     |   72 
  arch/arm/include/asm/arch-u8500/gpio.h      |  247 +++
  arch/arm/include/asm/arch-u8500/hardware.h  |   83 
  arch/arm/include/asm/arch-u8500/sys_proto.h |   27 ++
  arch/arm/include/asm/arch-u8500/u8500.h     |   47 ++
  board/st-ericsson/u8500/Makefile            |   50 +++
  board/st-ericsson/u8500/gpio.c              |  347 +++
  board/st-ericsson/u8500/prcmu-fw.h          |   55 +++
  board/st-ericsson/u8500/prcmu.c             |  165 +++
  board/st-ericsson/u8500/u8500_href.c        |  546 
  boards.cfg                                  |    1 +
  drivers/i2c/Makefile                        |    1 +
  drivers/i2c/u8500_i2c.c                     |  613 
 +++
  drivers/i2c/u8500_i2c.h                     |  194 +
  drivers/serial/serial_pl01x.c               |   17 +-
  drivers/serial/serial_pl01x.h               |    4 +
  include/configs/u8500_href.h                |  245 +++
  22 files changed, 3026 insertions(+), 2 deletions(-)
  create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
  create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
  create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
  create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
  create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
  create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
  create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
  create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
  create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h
  create mode 100644 board/st-ericsson/u8500/Makefile
  create mode 100644 board/st-ericsson/u8500/gpio.c
  create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
  create mode 100644 board/st-ericsson/u8500/prcmu.c
  create mode 100644 board/st-ericsson/u8500/u8500_href.c
  create mode 100644 drivers/i2c/u8500_i2c.c
  create mode 100644 drivers/i2c/u8500_i2c.h
  create mode 100644 include/configs/u8500_href.h


Albert, can this series go in now?  At least the arm ones.  I will
followup on the serial and i2c ones with the appropriate maintainers.

Thanks,
John
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Re: [U-Boot] [PATCHv3 0/4] ST-Ericsson U8500 support

[John Rigby]

On Thu, Apr 28, 2011 at 9:40 AM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
 Le 28/04/2011 16:47, John Rigby a écrit :

  armv7: Add ST-Ericsson u8500 arch
  armv7: Add support for ST-Ericsson U8500 href platform

 Applying these on top of the current u-boot-arm/master and trying a MAKEALL
 u8500_href (with an ELDK 4.2 toolchain) results in

 Configuring for u8500_href board...
 u8500_href.c:30:49: error: ../../../drivers/mmc/arm_pl180_mmci.h: No such
 file or directory
 u8500_href.c:30:49: error: ../../../drivers/mmc/arm_pl180_mmci.h: No such
 file or directory
 u8500_href.c: In function 'hrefplus_mmc_power_init':
 u8500_href.c:258: warning: implicit declaration of function 'prcmu_i2c_read'
 u8500_href.c:265: warning: implicit declaration of function
 'prcmu_i2c_write'
 u8500_href.c: In function 'board_mmc_init':
 u8500_href.c:453: warning: implicit declaration of function
 'arm_pl180_mmci_init'

 Amicalement,
 --
 Albert.

Ok, we have a bit of a dependency problem.  I will followup on the
pending mmc and i2c patches and once they have been committed ping
you.

Thanks,
John
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Re: [U-Boot] [PATCH v3 3/3] ARMV7: Vexpress: Add MMC support

[John Rigby]

On Sat, Apr 16, 2011 at 3:53 PM, Matt Waddel matt.wad...@canonical.com wrote:
 On 04/13/2011 05:09 AM, Andy Fleming wrote:
 On Wed, Mar 2, 2011 at 11:22 PM,  matt.wad...@linaro.org wrote:
 From: Matt Waddel matt.wad...@linaro.org

 Added the board specific definitions to use the MMCI device.

 Signed-off-by: Matt Waddel matt.wad...@linaro.org

 Looks fine to me.  I can apply this to my tree if that's fine with the
 maintainer.  If not, I'm also OK if the maintainer wants to pull in
 the driver patch (with the previously-mentioned small change).

 Hi Andy,

 I made the ffs() change you suggested and have posted a 4th
 version of the 3 patches (even though the 2nd one was the only
 one that changed, I wanted to make sure they were all still in
 sync with the repository).

 If you could apply these to your tree that would be great.


 Either way:
 Acked-by: Andy Fleming aflem...@freescale.com

 Thanks,
 Matt


 Andy
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Andy, Matt:

What is the plan for getting the pl180 mmc driver commited?  I need it
in before my U8500 board patches can be commited.

Thanks,
John
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Re: [U-Boot] [PATCHv4 3/4] I2C: Add driver for ST-Ericsson U8500 i2c

[John Rigby]

On Tue, Apr 19, 2011 at 2:42 PM, John Rigby john.ri...@linaro.org wrote:
 From: Michael Brandt michael.bra...@stericsson.com

 Signed-off-by: John Rigby john.ri...@linaro.org
 CC: Heiko Schocher h...@denx.de
 ---
 v2: Incorporate suggestions from Heiko Schocher
 v3: Fix line length problem reported by Heiko Schocher
 v4: No changes just rebased to latest and included for completeness
  drivers/i2c/Makefile    |    1 +
  drivers/i2c/u8500_i2c.c |  613 
 +++
  drivers/i2c/u8500_i2c.h |  194 +++
  3 files changed, 808 insertions(+), 0 deletions(-)
  create mode 100644 drivers/i2c/u8500_i2c.c
  create mode 100644 drivers/i2c/u8500_i2c.h

 diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
 index 052fe36..43507fc 100644
 --- a/drivers/i2c/Makefile
 +++ b/drivers/i2c/Makefile
 @@ -40,6 +40,7 @@ COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
  COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
  COBJS-$(CONFIG_SPEAR_I2C) += spr_i2c.o
  COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
 +COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o

  COBJS  := $(COBJS-y)
  SRCS   := $(COBJS:.o=.c)
 diff --git a/drivers/i2c/u8500_i2c.c b/drivers/i2c/u8500_i2c.c
 new file mode 100644
 index 000..ea8a71d
 --- /dev/null
 +++ b/drivers/i2c/u8500_i2c.c
 @@ -0,0 +1,613 @@
 +/*
 + * Copyright (C) ST-Ericsson SA 2010
 + *
 + * Basic U-Boot I2C interface for STn8500/DB8500
 + * Author: Michael Brandt michael.bra...@stericsson.com for ST-Ericsson
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License as published by
 + * the Free Software Foundation; either version 2 of the License, or
 + * (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 + */
 +
 +/*
 + * Only 7-bit I2C device addresses are supported.
 + */
 +
 +#include common.h
 +#include i2c.h
 +
 +#include u8500_i2c.h
 +#include asm/io.h
 +#include asm/arch/clock.h
 +
 +#define U8500_I2C_ENDAD_COUNTER        (CONFIG_SYS_HZ/100)     /* I2C bus 
 timeout */
 +#define U8500_I2C_FIFO_FLUSH_COUNTER   50          /* flush timeout */
 +#define U8500_I2C_SCL_FREQ             10          /* I2C bus clock freq 
 */
 +#define U8500_I2C_INPUT_FREQ           4800        /* Input clock freq */
 +#define TX_FIFO_THRESHOLD      0x4
 +#define RX_FIFO_THRESHOLD      0x4
 +#define SLAVE_SETUP_TIME 14 /* Slave data setup time, 250ns for 48MHz 
 i2c_clk */
 +
 +#define WRITE_FIELD(var, mask, shift, value) \
 +                       (var = ((var  ~(mask)) | ((value)  (shift
 +
 +static unsigned int bus_initialized[CONFIG_SYS_U8500_I2C_BUS_MAX];
 +static unsigned int i2c_bus_num;
 +static unsigned int i2c_bus_speed[] = {
 +       CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED,
 +       CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED
 +};
 +static struct u8500_i2c_regs *i2c_dev[] = {
 +       (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C0_BASE,
 +       (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C1_BASE,
 +       (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C2_BASE,
 +       (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C3_BASE,
 +};
 +
 +static struct {
 +       int periph;
 +       int pcken;
 +       int kcken;
 +} i2c_clock_bits[] = {
 +       {3, 3, 3}, /* I2C0 */
 +       {1, 2, 2}, /* I2C1 */
 +       {1, 6, 6}, /* I2C2 */
 +       {2, 0, 0}, /* I2C3 */
 +};
 +
 +static void i2c_set_bit(void *reg, u32 mask)
 +{
 +       writel(readl(reg) | mask, reg);
 +}
 +
 +static void i2c_clr_bit(void *reg, u32 mask)
 +{
 +       writel(readl(reg)  ~mask, reg);
 +}
 +
 +static void i2c_write_field(void *reg, u32 mask, uint shift, u32 value)
 +{
 +       writel((readl(reg)  ~mask) | (value  shift), reg);
 +}
 +
 +static int __i2c_set_bus_speed(unsigned int speed)
 +{
 +       u32 value;
 +       struct u8500_i2c_regs *i2c_regs;
 +
 +       i2c_regs = i2c_dev[i2c_bus_num];
 +
 +       /* Select standard (100 kbps) speed mode */
 +       i2c_write_field(i2c_regs-cr, U8500_I2C_CR_SM,
 +                       U8500_I2C_CR_SHIFT_SM, 0x0);
 +
 +       /*
 +        * Set the Baud Rate Counter 2 value
 +        * Baud rate (standard) = fi2cclk / ( (BRCNT2 x 2) + Foncycle )
 +        * Foncycle = 0 (no digital filtering)
 +        */
 +       value = (u32) (U8500_I2C_INPUT_FREQ / (speed * 2));
 +       i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT2,
 +                       U8500_I2C_BRCR_SHIFT_BRCNT2, value);
 +
 +       /* ensure that BRCNT value is zero */
 +       i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT1

Re: [U-Boot] [PATCH v3 3/3] ARMV7: Vexpress: Add MMC support

[John Rigby]

On Thu, Apr 28, 2011 at 12:57 PM, Andy Fleming aflem...@freescale.com wrote:
 It's on my todo list for today
Thanks!
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[U-Boot] strawman Fastboot in U-Boot Design Doc

[John Rigby]

Here a first draft design doc.  It is based in part on the Fastboot
implementation in the rowboat git repo (pointer below).

As always, comments welcome.
John

Purpose
===

Mainline support for Android Fastboot would be useful.  Arguing the merits
of Fastboot vs DFU is not in the scope of this document.  This document
is to discuss design goals/requirements of an implementation of
Fastboot in U-Boot.

Background
==

See the Android Fastboot page in Omappedia for an example of how
Fastboot is used to flash nand partitions on an Android device.
http://www.omappedia.org/wiki/Android_Fastboot

A description of the Fastboot protocol is available in the gitorious
rowboat git repo.
http://gitorious.org/rowboat/bootable-bootloader-legacy/blobs/master/fastboot_protocol.txt

Hooks into U-Boot
=

Fastboot gets access to the USB subsystem via the same interfaces as USB_TTY,
namely the udc_* api's:
udc_init
udc_startup_events
udc_connect
udc_poll
udc_setup_ep
etc.

Startup
===

Fastboot will be started on the target by issuing the fastboot command.
Optionally a board specific startup method may exist.  For example if
a certain combination of keys is pressed on reset then fastboot will be
started immediately.

Shutdown


Once started the fastboot command will continue until:
CTRL-C is typed on the console
a continue command is sent from the host
usb cable is removed
no commands have been sent from the host for some configurable timeout

Coexistance With USB_TTY and DFU


One should be able to enable USB_TTY, DFU and Fastboot at compile time
and chose one at runtime.

Questions


Should a Fastboot host program be included in the U-Boot source?
Could Fastboot be implemented as an extension to USB_TTY?
Could Fastboot, DFU and USB_TTY share a layer of code above the
udc_* api's?
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Re: [U-Boot] Mainlining android fastboot support to upstream u-boot

[John Rigby]

On Sun, Apr 24, 2011 at 8:25 AM, Wolfgang Denk w...@denx.de wrote:
 Dear John Rigby,

 In message BANLkTi=um9HTWdpWeee+Y1FZ2w4Y=qm...@mail.gmail.com you wrote:

 So Wolfgang,  let's assume that Fastboot could coexist with and share
 code with the DFU implementation.  Would that be more acceptable?  Or

 It is always nice if features can share common code, but here this is
 actually completely unrelated to the question I raised.

 is any effort to get Fastboot into mainline just a waste of time?

 The basic rule is that we accept what is useful for some (even if a
 few), unless it hurts others (including maintainers).

 What additional info is needed to answer that question?

 I wrote this in my initial posting to the Linaro list, and explicitly
 pointed you to it before, see
 http://thread.gmane.org/gmane.linux.linaro.devel/3823/focus=3842
 and especially
 http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/98145/focus=98283

 I don't want to talk about code before we have heard anything about
 the design.  This may be a trivial thing for you after having used
 this for some amount of time, but please consider the mental welfare
 of the  persons who never heard about this before, and who will
 probably have to maintain the code after you.
Ok, I had already read both of those posts and when I read design I
was thinking that Android Fastboot exists and the feature list is
already set as is the wire protocol, so I don't see that we have a lot
of flexibility in those areas.  The only design I see that is up for
definition is how it can be implemented in U-Boot, that was why I
brought up sharing with DFU.

I will follow up in a separate email with summary design docs of what
fastboot is including what the wire protocol is and what services it
needs from the environment it is running in.  Along with this I will
have pointers to more detailed docs.

Does that sound reasonable?

Thanks for your patience,
John
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Re: [U-Boot] Mainlining android fastboot support to upstream u-boot

[John Rigby]

On Fri, Apr 22, 2011 at 9:17 AM, Zach Pfeffer zach.pfef...@linaro.org wrote:
 So, Google uses it aside, it seems that being able to boot via USB
 is a useful thing and fastboot is a particular solution; I'm not
 entirely sure what other USB u-boot extensions exist apart from those

 Well, DFU support is a standard solution, and the LF / CELF has just
 recently assigned resources to adapt the existingout-of-tree port for
 mainline U-boot.

 Perhaps John and the LF /CELF resource could work together so both DFU
 and fastboot would work?
So Wolfgang,  let's assume that Fastboot could coexist with and share
code with the DFU implementation.  Would that be more acceptable?  Or
is any effort to get Fastboot into mainline just a waste of time?
What additional info is needed to answer that question?
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[U-Boot] Mainlining android fastboot support to upstream u-boot

[John Rigby]

On Tue, Apr 19, 2011 at 12:33 PM, Wolfgang Denk w...@denx.de wrote:
 Dear Jim Huang,

 In message BANLkTi=ynna9nbxwng_1mfwfd6g_o09...@mail.gmail.com you wrote:

 My idea is that we require abstract 'bootloader' component in Android
 device/linaro/common, and (patched) 'u-boot' would be the provider of
 'bootloader' component in
 device/linaro/Linaro-Evaluation-Build-Hardware.  Also, supporting

 If you are discussing requirements for U-Boot, and plan to get these
 merged in to mainlineU-Boot one day, it would probably be a good idea
 to discuss these plans on the U-Boot mailing list as well - ideally
 before any design is cast in iron.

 Best regards,

 Wolfgang Denk

 --
 DENX Software Engineering GmbH,     MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 The management question ... is not _whether_ to build a pilot  system
 and  throw  it away. You _will_ do that. The only question is whether
 to plan in advance to build a throwaway, or to promise to deliver the
 throwaway to customers.       - Fred Brooks, The Mythical Man Month

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Wolfgang,

As you can see from this discussion, Linaro is considering applying
resources (probably me) to upstreaming Android Fastboot features into
mainline u-boot.  What suggestions do you have for making this process
as painless as possible?

The topic came up briefly here last year:
http://lists.denx.de/pipermail/u-boot/2010-August/076343.html

An implementation exists for omap4/panda on gitorious:
git://gitorious.org/pandaboard/u-boot.git in the omap4_panda_es2.0
branch.  There is also a version for omap3 somewhere else on
gitorious.

To bring this to mainline one would have to:

1) Bring code up to current mainline revision.
2) Fix any coding standards issues.
3) Document the new features.

What else?  I know one issue maybe why does this need to exist when
other solutions exist.  I think that since Android uses it, it is
somewhat of a de facto standard.

All comments welcome,
John
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[U-Boot] [PATCHv3 2/2] MMC: omap_hsmmc.c: disable multiblock rw on old rev omap34xx silicon

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
V3: use get_cpu_family and get_cpu_rev in test, previous patch also disabled
multiblock on beagle-xm

 drivers/mmc/omap_hsmmc.c |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index dcbde89..957b987 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -467,6 +467,14 @@ int omap_mmc_init(int dev_index)
 
mmc-b_max = 0;
 
+#if defined(CONFIG_OMAP34XX)
+   /*
+* Silicon revs 2.1 and older do not support multiblock transfers.
+*/
+   if ((get_cpu_family() == CPU_OMAP34XX)  (get_cpu_rev() = 
CPU_3XX_ES21))
+   mmc-b_max = 1;
+#endif
+
mmc_register(mmc);
 
return 0;
-- 
1.7.1

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[U-Boot] [PATCHv4 1/4] Serial: p1011: new vendor init options

[John Rigby]

Two new options:

CONFIG_PL011_SERIAL_RLCR

Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers.  Set
this variable to initialize the extra register.

CONFIG_PL011_SERIAL_FLUSH_ON_INIT

On some platforms (e.g. U8500) U-Boot is loaded by a second stage
boot loader that has already initialized the UART.  Define this
variable to flush the UART at init time.
empty fifo on init

Signed-off-by: John Rigby john.ri...@linaro.org
Signed-off-by: Rabin Vincent rabin.vinc...@stericsson.com
---
v2: No changes
v3: Enable changes with new CONFIG_* options instead of platform.
Document new CONFIG_* options in README.
v4: Added delay before writing to RLCR.
Removed Rabin as author at his request.

 README|   12 
 drivers/serial/serial_pl01x.c |   30 +++---
 drivers/serial/serial_pl01x.h |4 
 3 files changed, 43 insertions(+), 3 deletions(-)

diff --git a/README b/README
index 4917e26..496a428 100644
--- a/README
+++ b/README
@@ -468,6 +468,18 @@ The following options need to be configured:
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h
 
+   CONFIG_PL011_SERIAL_RLCR
+
+   Some vendor versions of PL011 serial ports (e.g. ST-Ericsson 
U8500)
+   have separate receive and transmit line control registers.  Set
+   this variable to initialize the extra register.
+
+   CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+
+   On some platforms (e.g. U8500) U-Boot is loaded by a second 
stage
+   boot loader that has already initialized the UART.  Define this
+   variable to flush the UART at init time.
+
 
 - Console Interface:
Depending on board, define exactly one serial port
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 5dfcde8..7a064ff 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -111,6 +111,15 @@ int serial_init (void)
unsigned int divider;
unsigned int remainder;
unsigned int fraction;
+   unsigned int lcr;
+
+#ifdef CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+   /* Empty RX fifo if necessary */
+   if (readl(regs-pl011_cr)  UART_PL011_CR_UARTEN) {
+   while (!(readl(regs-fr)  UART_PL01x_FR_RXFE))
+   readl(regs-dr);
+   }
+#endif
 
/* First, disable everything */
writel(0, regs-pl011_cr);
@@ -131,9 +140,24 @@ int serial_init (void)
writel(fraction, regs-pl011_fbrd);
 
/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
-   writel(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN,
-  regs-pl011_lcrh);
-
+   lcr = UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN;
+   writel(lcr, regs-pl011_lcrh);
+
+#ifdef CONFIG_PL011_SERIAL_RLCR
+   {
+   int i;
+
+   /*
+* Program receive line control register after waiting
+* 10 bus cycles.  Delay be writing to readonly register
+* 10 times
+*/
+   for (i = 0; i  10; i++)
+   writel(lcr, regs-fr);
+
+   writel(lcr, regs-pl011_rlcr);
+   }
+#endif
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE,
   regs-pl011_cr);
diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h
index b670c24..96ee381 100644
--- a/drivers/serial/serial_pl01x.h
+++ b/drivers/serial/serial_pl01x.h
@@ -43,7 +43,11 @@ struct pl01x_regs {
u32 pl010_lcrl; /* 0x10 Line control register, low byte */
u32 pl010_cr;   /* 0x14 Control register */
u32 fr; /* 0x18 Flag register (Read only) */
+#ifdef CONFIG_PL011_SERIAL_RLCR
+   u32 pl011_rlcr; /* 0x1c Receive line control register */
+#else
u32 reserved;
+#endif
u32 ilpr;   /* 0x20 IrDA low-power counter register */
u32 pl011_ibrd; /* 0x24 Integer baud rate register */
u32 pl011_fbrd; /* 0x28 Fractional baud rate register */
-- 
1.7.1

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[U-Boot] [PATCHv4 3/4] I2C: Add driver for ST-Ericsson U8500 i2c

[John Rigby]

From: Michael Brandt michael.bra...@stericsson.com

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Heiko Schocher h...@denx.de
---
v2: Incorporate suggestions from Heiko Schocher
v3: Fix line length problem reported by Heiko Schocher
v4: No changes just rebased to latest and included for completeness
 drivers/i2c/Makefile|1 +
 drivers/i2c/u8500_i2c.c |  613 +++
 drivers/i2c/u8500_i2c.h |  194 +++
 3 files changed, 808 insertions(+), 0 deletions(-)
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 052fe36..43507fc 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
 COBJS-$(CONFIG_SPEAR_I2C) += spr_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
+COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/i2c/u8500_i2c.c b/drivers/i2c/u8500_i2c.c
new file mode 100644
index 000..ea8a71d
--- /dev/null
+++ b/drivers/i2c/u8500_i2c.c
@@ -0,0 +1,613 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Basic U-Boot I2C interface for STn8500/DB8500
+ * Author: Michael Brandt michael.bra...@stericsson.com for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Only 7-bit I2C device addresses are supported.
+ */
+
+#include common.h
+#include i2c.h
+
+#include u8500_i2c.h
+#include asm/io.h
+#include asm/arch/clock.h
+
+#define U8500_I2C_ENDAD_COUNTER(CONFIG_SYS_HZ/100) /* I2C bus 
timeout */
+#define U8500_I2C_FIFO_FLUSH_COUNTER   50  /* flush timeout */
+#define U8500_I2C_SCL_FREQ 10  /* I2C bus clock freq */
+#define U8500_I2C_INPUT_FREQ   4800/* Input clock freq */
+#define TX_FIFO_THRESHOLD  0x4
+#define RX_FIFO_THRESHOLD  0x4
+#define SLAVE_SETUP_TIME 14 /* Slave data setup time, 250ns for 48MHz i2c_clk 
*/
+
+#define WRITE_FIELD(var, mask, shift, value) \
+   (var = ((var  ~(mask)) | ((value)  (shift
+
+static unsigned int bus_initialized[CONFIG_SYS_U8500_I2C_BUS_MAX];
+static unsigned int i2c_bus_num;
+static unsigned int i2c_bus_speed[] = {
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED,
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED
+};
+static struct u8500_i2c_regs *i2c_dev[] = {
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C0_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C1_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C2_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C3_BASE,
+};
+
+static struct {
+   int periph;
+   int pcken;
+   int kcken;
+} i2c_clock_bits[] = {
+   {3, 3, 3}, /* I2C0 */
+   {1, 2, 2}, /* I2C1 */
+   {1, 6, 6}, /* I2C2 */
+   {2, 0, 0}, /* I2C3 */
+};
+
+static void i2c_set_bit(void *reg, u32 mask)
+{
+   writel(readl(reg) | mask, reg);
+}
+
+static void i2c_clr_bit(void *reg, u32 mask)
+{
+   writel(readl(reg)  ~mask, reg);
+}
+
+static void i2c_write_field(void *reg, u32 mask, uint shift, u32 value)
+{
+   writel((readl(reg)  ~mask) | (value  shift), reg);
+}
+
+static int __i2c_set_bus_speed(unsigned int speed)
+{
+   u32 value;
+   struct u8500_i2c_regs *i2c_regs;
+
+   i2c_regs = i2c_dev[i2c_bus_num];
+
+   /* Select standard (100 kbps) speed mode */
+   i2c_write_field(i2c_regs-cr, U8500_I2C_CR_SM,
+   U8500_I2C_CR_SHIFT_SM, 0x0);
+
+   /*
+* Set the Baud Rate Counter 2 value
+* Baud rate (standard) = fi2cclk / ( (BRCNT2 x 2) + Foncycle )
+* Foncycle = 0 (no digital filtering)
+*/
+   value = (u32) (U8500_I2C_INPUT_FREQ / (speed * 2));
+   i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT2,
+   U8500_I2C_BRCR_SHIFT_BRCNT2, value);
+
+   /* ensure that BRCNT value is zero */
+   i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT1,
+   U8500_I2C_BRCR_SHIFT_BRCNT1, 0);
+
+   return U8500_I2C_INPUT_FREQ/(value * 2);
+}
+
+/*
+ * i2c_init - initialize the i2c bus
+ *
+ * speed: bus speed (in HZ)
+ * slaveaddr: address of device in slave

[U-Boot] [PATCHv4 2/4] armv7: Add ST-Ericsson u8500 arch

[John Rigby]

Based on ST-Ericsson internal git repo.

Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
v2: cleanup, mostly removal of unused defines
v3: remove prototype from sys_proto.h as suggested by Wolfgang
v4: incorporate changes suggested by Albert:
  Add copyright to arch/arm/cpu/armv7/u8500/lowlevel.S
  Remove confusing/incorrect timer comment in arch/arm/cpu/armv7/u8500/timer.c
  Remove reset timer functions from /timer.c

 arch/arm/cpu/armv7/u8500/Makefile   |   46 +
 arch/arm/cpu/armv7/u8500/clock.c|   56 ++
 arch/arm/cpu/armv7/u8500/lowlevel.S |   35 
 arch/arm/cpu/armv7/u8500/timer.c|  154 +
 arch/arm/include/asm/arch-u8500/clock.h |   72 
 arch/arm/include/asm/arch-u8500/gpio.h  |  247 +++
 arch/arm/include/asm/arch-u8500/hardware.h  |   83 +
 arch/arm/include/asm/arch-u8500/sys_proto.h |   27 +++
 arch/arm/include/asm/arch-u8500/u8500.h |   47 +
 9 files changed, 767 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
new file mode 100644
index 000..270aa40
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS  = timer.o clock.o
+SOBJS  = lowlevel.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
new file mode 100644
index 000..9e3b873
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2009 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct clkrst {
+   unsigned int pcken;
+   unsigned int pckdis;
+   unsigned int kcken;
+   unsigned int kckdis;
+};
+
+static unsigned int clkrst_base[] = {
+   U8500_CLKRST1_BASE,
+   U8500_CLKRST2_BASE,
+   U8500_CLKRST3_BASE,
+   0,
+   U8500_CLKRST5_BASE,
+   U8500_CLKRST6_BASE,
+   U8500_CLKRST7_BASE, /* ED only */
+};
+
+/* Turn on peripheral clock at PRCC level */
+void u8500_clock_enable(int periph, int cluster, int kern)
+{
+   struct clkrst *clkrst = (struct clkrst

[U-Boot] [PATCHv4 4/4] armv7: Add support for ST-Ericsson U8500 href platform

[John Rigby]

Minimal platform support to boot linux from SD.

Supported devices/hw limited to external MMC/SD slot,
GPIO, I2C and minimal PRCMU.

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
This board support requires mmc driver patch set from Matt Waddel.
v2: cleanup, mostly removal of unused defines and include files
v3: incorporate changes suggested by Wolfgang including:
   better commit message
   get arm_pl180_mmci_init prototype from driver .h file
   don't ignore value from arm_pl180_mmci_init
   optimize printf's in u8500_href.c
   use plain #define CONFIG_BLAH for feature enabling
v4: no changes, just rebased to latest upstream and included for completness
 board/st-ericsson/u8500/Makefile |   50 +++
 board/st-ericsson/u8500/gpio.c   |  347 +
 board/st-ericsson/u8500/prcmu-fw.h   |   55 
 board/st-ericsson/u8500/prcmu.c  |  165 ++
 board/st-ericsson/u8500/u8500_href.c |  546 ++
 boards.cfg   |1 +
 include/configs/u8500_href.h |  245 +++
 7 files changed, 1409 insertions(+), 0 deletions(-)
 create mode 100644 board/st-ericsson/u8500/Makefile
 create mode 100644 board/st-ericsson/u8500/gpio.c
 create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 create mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 board/st-ericsson/u8500/u8500_href.c
 create mode 100644 include/configs/u8500_href.h

diff --git a/board/st-ericsson/u8500/Makefile b/board/st-ericsson/u8500/Makefile
new file mode 100644
index 000..91c2abf
--- /dev/null
+++ b/board/st-ericsson/u8500/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) ST-Ericsson SA 2009
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+CFLAGS += -D__RELEASE -D__STN_8500
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := u8500_href.o gpio.o prcmu.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/st-ericsson/u8500/gpio.c b/board/st-ericsson/u8500/gpio.c
new file mode 100644
index 000..96b2461
--- /dev/null
+++ b/board/st-ericsson/u8500/gpio.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2009
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/gpio.h
+
+static struct gpio_register *addr_gpio_register[] = {
+   (void *)U8500_GPIO_0_BASE,
+   (void *)U8500_GPIO_1_BASE,
+   (void *)U8500_GPIO_2_BASE,
+   (void *)U8500_GPIO_3_BASE,
+   (void *)U8500_GPIO_4_BASE,
+   (void *)U8500_GPIO_5_BASE,
+   (void *)U8500_GPIO_6_BASE,
+   (void *)U8500_GPIO_7_BASE,
+   (void *)U8500_GPIO_8_BASE,
+};
+
+struct gpio_altfun_data altfun_table[] = {
+   {
+   .altfun = GPIO_ALT_I2C_0,
+   .start = 147,
+   .end = 148,
+   .cont = 0,
+   .type = GPIO_ALTF_A,
+   },
+   {
+   .altfun = GPIO_ALT_I2C_1

[U-Boot] [PATCHv2 1/2] MMC: make b_max unconditional

[John Rigby]

Make existing field b_max field in struct mmc unconditional
and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
and mmc_bwrite.

Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
if it has not been initialized by the hw driver.

Initialize b_max to 0 in all callers to mmc_register.

Signed-off-by: John Rigby john.ri...@linaro.org
---
V2: Split generic b_max support from omap specific use of b_max

 drivers/mmc/bfin_sdh.c  |2 ++
 drivers/mmc/davinci_mmc.c   |3 +--
 drivers/mmc/gen_atmel_mci.c |2 ++
 drivers/mmc/mmc.c   |8 
 drivers/mmc/mxcmmc.c|2 ++
 drivers/mmc/omap_hsmmc.c|2 ++
 drivers/mmc/s5p_mmc.c   |1 +
 include/mmc.h   |2 --
 8 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c
index 31b6459..bc9057f 100644
--- a/drivers/mmc/bfin_sdh.c
+++ b/drivers/mmc/bfin_sdh.c
@@ -257,6 +257,8 @@ int bfin_mmc_init(bd_t *bis)
mmc-f_min = mmc-f_max  9;
mmc-block_dev.part_type = PART_TYPE_DOS;
 
+   mmc-b_max = 0;
+
mmc_register(mmc);
 
return 0;
diff --git a/drivers/mmc/davinci_mmc.c b/drivers/mmc/davinci_mmc.c
index d5d19eb..5d918e6 100644
--- a/drivers/mmc/davinci_mmc.c
+++ b/drivers/mmc/davinci_mmc.c
@@ -394,9 +394,8 @@ int davinci_mmc_init(bd_t *bis, struct davinci_mmc *host)
mmc-voltages = host-voltages;
mmc-host_caps = host-host_caps;
 
-#ifdef CONFIG_MMC_MBLOCK
mmc-b_max = DAVINCI_MAX_BLOCKS;
-#endif
+
mmc_register(mmc);
 
return 0;
diff --git a/drivers/mmc/gen_atmel_mci.c b/drivers/mmc/gen_atmel_mci.c
index 2984d64..6577925 100644
--- a/drivers/mmc/gen_atmel_mci.c
+++ b/drivers/mmc/gen_atmel_mci.c
@@ -348,6 +348,8 @@ int atmel_mci_init(void *regs)
mmc-f_min = get_mci_clk_rate() / (2*256);
mmc-f_max = get_mci_clk_rate() / (2*1);
 
+   mmc-b_max = 0;
+
mmc_register(mmc);
 
return 0;
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f27b7c7..f6d31f5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -243,8 +243,7 @@ mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const 
void*src)
return 0;
 
do {
-   cur = (blocks_todo  CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
-  CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+   cur = (blocks_todo  mmc-b_max) ?  mmc-b_max : blocks_todo;
if(mmc_write_blocks(mmc, start, cur, src) != cur)
return 0;
blocks_todo -= cur;
@@ -320,8 +319,7 @@ static ulong mmc_bread(int dev_num, ulong start, lbaint_t 
blkcnt, void *dst)
return 0;
 
do {
-   cur = (blocks_todo  CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
-  CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+   cur = (blocks_todo  mmc-b_max) ?  mmc-b_max : blocks_todo;
if(mmc_read_blocks(mmc, dst, start, cur) != cur)
return 0;
blocks_todo -= cur;
@@ -1029,6 +1027,8 @@ int mmc_register(struct mmc *mmc)
mmc-block_dev.removable = 1;
mmc-block_dev.block_read = mmc_bread;
mmc-block_dev.block_write = mmc_bwrite;
+   if (!mmc-b_max)
+   mmc-b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 
INIT_LIST_HEAD (mmc-link);
 
diff --git a/drivers/mmc/mxcmmc.c b/drivers/mmc/mxcmmc.c
index 5963953..ab1fc82 100644
--- a/drivers/mmc/mxcmmc.c
+++ b/drivers/mmc/mxcmmc.c
@@ -511,6 +511,8 @@ static int mxcmci_initialize(bd_t *bis)
mmc-f_min = imx_get_perclk2()  7;
mmc-f_max = imx_get_perclk2()  1;
 
+   mmc-b_max = 0;
+
mmc_register(mmc);
 
return 0;
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 6f2280a..dcbde89 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -465,6 +465,8 @@ int omap_mmc_init(int dev_index)
mmc-f_min = 40;
mmc-f_max = 5200;
 
+   mmc-b_max = 0;
+
mmc_register(mmc);
 
return 0;
diff --git a/drivers/mmc/s5p_mmc.c b/drivers/mmc/s5p_mmc.c
index 0323800..668c28b 100644
--- a/drivers/mmc/s5p_mmc.c
+++ b/drivers/mmc/s5p_mmc.c
@@ -466,6 +466,7 @@ static int s5p_mmc_initialize(int dev_index, int bus_width)
 
mmc_host[dev_index].clock = 0;
mmc_host[dev_index].reg = s5p_get_base_mmc(dev_index);
+   mmc-m_bmax = 0;
mmc_register(mmc);
 
return 0;
diff --git a/include/mmc.h b/include/mmc.h
index e0a56d9..b4197a7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -283,9 +283,7 @@ struct mmc {
struct mmc_cmd *cmd, struct mmc_data *data);
void (*set_ios)(struct mmc *mmc);
int (*init)(struct mmc *mmc);
-#ifdef CONFIG_MMC_MBLOCK
uint b_max;
-#endif
 };
 
 int mmc_register(struct mmc *mmc);
-- 
1.7.1

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[U-Boot] [PATCHv2 2/2] mmc: omap_hsmmc.c: disable multiblock rw on old rev omap34xx silicon

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
V2: split out omap_hsmmc use of b_max into separate patch

 drivers/mmc/omap_hsmmc.c |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index dcbde89..a2a6d55 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -467,6 +467,14 @@ int omap_mmc_init(int dev_index)
 
mmc-b_max = 0;
 
+#if defined(CONFIG_OMAP34XX)
+   /*
+* Silicon revs 2.1 and older do not support multiblock transfers.
+*/
+   if (get_cpu_rev() = CPU_3XX_ES21)
+   mmc-b_max = 1;
+#endif
+
mmc_register(mmc);
 
return 0;
-- 
1.7.1

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[U-Boot] [PATCHv2] MMC: disable multiblock rw on old rev OMAP3 silicon

[John Rigby]

Make existing field b_max field in struct mmc unconditional
and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
and mmc_bwrite.

Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
if it has not been initialized by the hw driver.

Initialize b_max to 1 in omap_hsmmc.c for old rev silicon OMAP3
to disable multi block rw.

Signed-off-by: John Rigby john.ri...@linaro.org
---
v2: Test cpu family and rev

 drivers/mmc/mmc.c|8 
 drivers/mmc/omap_hsmmc.c |8 
 include/mmc.h|2 --
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index d69eaa1..59ca4df 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -144,8 +144,7 @@ mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const 
void*src)
return 0;
 
do {
-   cur = (blocks_todo  CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
-  CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+   cur = (blocks_todo  mmc-b_max) ?  mmc-b_max : blocks_todo;
if(mmc_write_blocks(mmc, start, cur, src) != cur)
return 0;
blocks_todo -= cur;
@@ -217,8 +216,7 @@ static ulong mmc_bread(int dev_num, ulong start, lbaint_t 
blkcnt, void *dst)
return 0;
 
do {
-   cur = (blocks_todo  CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
-  CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+   cur = (blocks_todo  mmc-b_max) ?  mmc-b_max : blocks_todo;
if(mmc_read_blocks(mmc, dst, start, cur) != cur)
return 0;
blocks_todo -= cur;
@@ -852,6 +850,8 @@ int mmc_register(struct mmc *mmc)
mmc-block_dev.removable = 1;
mmc-block_dev.block_read = mmc_bread;
mmc-block_dev.block_write = mmc_bwrite;
+   if (!mmc-b_max)
+   mmc-b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 
INIT_LIST_HEAD (mmc-link);
 
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 6f2280a..685ff74 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -465,6 +465,14 @@ int omap_mmc_init(int dev_index)
mmc-f_min = 40;
mmc-f_max = 5200;
 
+#if defined(CONFIG_OMAP34XX)
+   /*
+* 34XX silicon revs 2.1 and older do not support multiblock transfers.
+*/
+   if ((get_cpu_family() == CPU_OMAP34XX)  (get_cpu_rev() = 
CPU_3XX_ES21))
+   mmc-b_max = 1;
+#endif
+
mmc_register(mmc);
 
return 0;
diff --git a/include/mmc.h b/include/mmc.h
index fcd0fd1..91d0495 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -274,9 +274,7 @@ struct mmc {
struct mmc_cmd *cmd, struct mmc_data *data);
void (*set_ios)(struct mmc *mmc);
int (*init)(struct mmc *mmc);
-#ifdef CONFIG_MMC_MBLOCK
uint b_max;
-#endif
 };
 
 int mmc_register(struct mmc *mmc);
-- 
1.7.1

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[U-Boot] [PATCH] MMC: disable multiblock rw on old rev OMAP3 silicon

[John Rigby]

Make existing field b_max field in struct mmc unconditional
and use it instead of CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_bread
and mmc_bwrite.

Initialize b_max to CONFIG_SYS_MMC_MAX_BLK_COUNT in mmc_register
if it has not been initialized by the hw driver.

Initialize b_max to 1 in omap_hsmmc.c for old rev silicon OMAP3
to disable multi block rw.

Signed-off-by: John Rigby john.ri...@linaro.org
---
 drivers/mmc/mmc.c|8 
 drivers/mmc/omap_hsmmc.c |8 
 include/mmc.h|2 --
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f27b7c7..f6d31f5 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -243,8 +243,7 @@ mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const 
void*src)
return 0;
 
do {
-   cur = (blocks_todo  CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
-  CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+   cur = (blocks_todo  mmc-b_max) ?  mmc-b_max : blocks_todo;
if(mmc_write_blocks(mmc, start, cur, src) != cur)
return 0;
blocks_todo -= cur;
@@ -320,8 +319,7 @@ static ulong mmc_bread(int dev_num, ulong start, lbaint_t 
blkcnt, void *dst)
return 0;
 
do {
-   cur = (blocks_todo  CONFIG_SYS_MMC_MAX_BLK_COUNT) ?
-  CONFIG_SYS_MMC_MAX_BLK_COUNT : blocks_todo;
+   cur = (blocks_todo  mmc-b_max) ?  mmc-b_max : blocks_todo;
if(mmc_read_blocks(mmc, dst, start, cur) != cur)
return 0;
blocks_todo -= cur;
@@ -1029,6 +1027,8 @@ int mmc_register(struct mmc *mmc)
mmc-block_dev.removable = 1;
mmc-block_dev.block_read = mmc_bread;
mmc-block_dev.block_write = mmc_bwrite;
+   if (!mmc-b_max)
+   mmc-b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 
INIT_LIST_HEAD (mmc-link);
 
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index 6f2280a..1fab249 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -465,6 +465,14 @@ int omap_mmc_init(int dev_index)
mmc-f_min = 40;
mmc-f_max = 5200;
 
+#if defined(CONFIG_OMAP34XX)
+   /*
+* Silicon revs 2.1 and older do not support multiblock transfers.
+*/
+   if (get_cpu_rev() = CPU_3XX_ES21)
+   mmc-b_max = 1;
+#endif
+
mmc_register(mmc);
 
return 0;
diff --git a/include/mmc.h b/include/mmc.h
index e0a56d9..b4197a7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -283,9 +283,7 @@ struct mmc {
struct mmc_cmd *cmd, struct mmc_data *data);
void (*set_ios)(struct mmc *mmc);
int (*init)(struct mmc *mmc);
-#ifdef CONFIG_MMC_MBLOCK
uint b_max;
-#endif
 };
 
 int mmc_register(struct mmc *mmc);
-- 
1.7.1

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[U-Boot] [PATCHv3 0/4] ST-Ericsson U8500 support

[John Rigby]

Add support for ST-Ericsson U8500 SoC and HREF platform

John Rigby (2):
  armv7: Add ST-Ericsson u8500 arch
  armv7: Add support for ST-Ericsson U8500 href platform

Michael Brandt (1):
  I2C: Add driver for ST-Ericsson U8500 i2c

Rabin Vincent (1):
  Serial: p1011: new vendor init options

 README  |   12 +
 arch/arm/cpu/armv7/u8500/Makefile   |   46 ++
 arch/arm/cpu/armv7/u8500/clock.c|   56 +++
 arch/arm/cpu/armv7/u8500/lowlevel.S |   33 ++
 arch/arm/cpu/armv7/u8500/timer.c|  167 
 arch/arm/include/asm/arch-u8500/clock.h |   72 
 arch/arm/include/asm/arch-u8500/gpio.h  |  247 +++
 arch/arm/include/asm/arch-u8500/hardware.h  |   83 
 arch/arm/include/asm/arch-u8500/sys_proto.h |   27 ++
 arch/arm/include/asm/arch-u8500/u8500.h |   47 ++
 board/st-ericsson/u8500/Makefile|   50 +++
 board/st-ericsson/u8500/gpio.c  |  347 +++
 board/st-ericsson/u8500/prcmu-fw.h  |   55 +++
 board/st-ericsson/u8500/prcmu.c |  165 +++
 board/st-ericsson/u8500/u8500_href.c|  546 
 boards.cfg  |1 +
 drivers/i2c/Makefile|1 +
 drivers/i2c/u8500_i2c.c |  613 +++
 drivers/i2c/u8500_i2c.h |  194 +
 drivers/serial/serial_pl01x.c   |   17 +-
 drivers/serial/serial_pl01x.h   |4 +
 include/configs/u8500_href.h|  245 +++
 22 files changed, 3026 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h
 create mode 100644 board/st-ericsson/u8500/Makefile
 create mode 100644 board/st-ericsson/u8500/gpio.c
 create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 create mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 board/st-ericsson/u8500/u8500_href.c
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h
 create mode 100644 include/configs/u8500_href.h

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[U-Boot] [PATCHv3 1/4] Serial: p1011: new vendor init options

[John Rigby]

From: Rabin Vincent rabin.vinc...@stericsson.com

Two new options:

CONFIG_PL011_SERIAL_RLCR

Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
have separate receive and transmit line control registers.  Set
this variable to initialize the extra register.

CONFIG_PL011_SERIAL_FLUSH_ON_INIT

On some platforms (e.g. U8500) U-Boot is loaded by a second stage
boot loader that has already initialized the UART.  Define this
variable to flush the UART at init time.
empty fifo on init

Signed-off-by: Rabin Vincent rabin.vinc...@stericsson.com
Signed-off-by: John Rigby john.ri...@linaro.org
---
v3:
Enable changes with new CONFIG_* options instead of platform.
Document new CONFIG_* options in README.

 README|   12 
 drivers/serial/serial_pl01x.c |   17 +++--
 drivers/serial/serial_pl01x.h |4 
 3 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/README b/README
index c128a6c..8ccac6e 100644
--- a/README
+++ b/README
@@ -468,6 +468,18 @@ The following options need to be configured:
define this to a list of base addresses for each (supported)
port. See e.g. include/configs/versatile.h
 
+   CONFIG_PL011_SERIAL_RLCR
+
+   Some vendor versions of PL011 serial ports (e.g. ST-Ericsson 
U8500)
+   have separate receive and transmit line control registers.  Set
+   this variable to initialize the extra register.
+
+   CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+
+   On some platforms (e.g. U8500) U-Boot is loaded by a second 
stage
+   boot loader that has already initialized the UART.  Define this
+   variable to flush the UART at init time.
+
 
 - Console Interface:
Depending on board, define exactly one serial port
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 5dfcde8..164b0ac 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -111,6 +111,15 @@ int serial_init (void)
unsigned int divider;
unsigned int remainder;
unsigned int fraction;
+   unsigned int lcr;
+
+#ifdef CONFIG_PL011_SERIAL_FLUSH_ON_INIT
+   /* Empty RX fifo if necessary */
+   if (readl(regs-pl011_cr)  UART_PL011_CR_UARTEN) {
+   while (!(readl(regs-fr)  UART_PL01x_FR_RXFE))
+   readl(regs-dr);
+   }
+#endif
 
/* First, disable everything */
writel(0, regs-pl011_cr);
@@ -131,9 +140,13 @@ int serial_init (void)
writel(fraction, regs-pl011_fbrd);
 
/* Set the UART to be 8 bits, 1 stop bit, no parity, fifo enabled */
-   writel(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN,
-  regs-pl011_lcrh);
+   lcr = UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN;
+   writel(lcr, regs-pl011_lcrh);
 
+#ifdef CONFIG_PL011_SERIAL_RLCR
+   /* program receive line control register */
+   writel(lcr, regs-pl011_rlcr);
+#endif
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE,
   regs-pl011_cr);
diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h
index b670c24..96ee381 100644
--- a/drivers/serial/serial_pl01x.h
+++ b/drivers/serial/serial_pl01x.h
@@ -43,7 +43,11 @@ struct pl01x_regs {
u32 pl010_lcrl; /* 0x10 Line control register, low byte */
u32 pl010_cr;   /* 0x14 Control register */
u32 fr; /* 0x18 Flag register (Read only) */
+#ifdef CONFIG_PL011_SERIAL_RLCR
+   u32 pl011_rlcr; /* 0x1c Receive line control register */
+#else
u32 reserved;
+#endif
u32 ilpr;   /* 0x20 IrDA low-power counter register */
u32 pl011_ibrd; /* 0x24 Integer baud rate register */
u32 pl011_fbrd; /* 0x28 Fractional baud rate register */
-- 
1.7.1

___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCHv3 3/4] I2C: Add driver for ST-Ericsson U8500 i2c

[John Rigby]

From: Michael Brandt michael.bra...@stericsson.com

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Heiko Schocher h...@denx.de
---
v2: Incorporate suggestions from Heiko Schocher
v3: Fix line length problem reported by Heiko Schocher
 drivers/i2c/Makefile|1 +
 drivers/i2c/u8500_i2c.c |  613 +++
 drivers/i2c/u8500_i2c.h |  194 +++
 3 files changed, 808 insertions(+), 0 deletions(-)
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 052fe36..43507fc 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
 COBJS-$(CONFIG_SPEAR_I2C) += spr_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
+COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/i2c/u8500_i2c.c b/drivers/i2c/u8500_i2c.c
new file mode 100644
index 000..ea8a71d
--- /dev/null
+++ b/drivers/i2c/u8500_i2c.c
@@ -0,0 +1,613 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Basic U-Boot I2C interface for STn8500/DB8500
+ * Author: Michael Brandt michael.bra...@stericsson.com for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Only 7-bit I2C device addresses are supported.
+ */
+
+#include common.h
+#include i2c.h
+
+#include u8500_i2c.h
+#include asm/io.h
+#include asm/arch/clock.h
+
+#define U8500_I2C_ENDAD_COUNTER(CONFIG_SYS_HZ/100) /* I2C bus 
timeout */
+#define U8500_I2C_FIFO_FLUSH_COUNTER   50  /* flush timeout */
+#define U8500_I2C_SCL_FREQ 10  /* I2C bus clock freq */
+#define U8500_I2C_INPUT_FREQ   4800/* Input clock freq */
+#define TX_FIFO_THRESHOLD  0x4
+#define RX_FIFO_THRESHOLD  0x4
+#define SLAVE_SETUP_TIME 14 /* Slave data setup time, 250ns for 48MHz i2c_clk 
*/
+
+#define WRITE_FIELD(var, mask, shift, value) \
+   (var = ((var  ~(mask)) | ((value)  (shift
+
+static unsigned int bus_initialized[CONFIG_SYS_U8500_I2C_BUS_MAX];
+static unsigned int i2c_bus_num;
+static unsigned int i2c_bus_speed[] = {
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED,
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED
+};
+static struct u8500_i2c_regs *i2c_dev[] = {
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C0_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C1_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C2_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C3_BASE,
+};
+
+static struct {
+   int periph;
+   int pcken;
+   int kcken;
+} i2c_clock_bits[] = {
+   {3, 3, 3}, /* I2C0 */
+   {1, 2, 2}, /* I2C1 */
+   {1, 6, 6}, /* I2C2 */
+   {2, 0, 0}, /* I2C3 */
+};
+
+static void i2c_set_bit(void *reg, u32 mask)
+{
+   writel(readl(reg) | mask, reg);
+}
+
+static void i2c_clr_bit(void *reg, u32 mask)
+{
+   writel(readl(reg)  ~mask, reg);
+}
+
+static void i2c_write_field(void *reg, u32 mask, uint shift, u32 value)
+{
+   writel((readl(reg)  ~mask) | (value  shift), reg);
+}
+
+static int __i2c_set_bus_speed(unsigned int speed)
+{
+   u32 value;
+   struct u8500_i2c_regs *i2c_regs;
+
+   i2c_regs = i2c_dev[i2c_bus_num];
+
+   /* Select standard (100 kbps) speed mode */
+   i2c_write_field(i2c_regs-cr, U8500_I2C_CR_SM,
+   U8500_I2C_CR_SHIFT_SM, 0x0);
+
+   /*
+* Set the Baud Rate Counter 2 value
+* Baud rate (standard) = fi2cclk / ( (BRCNT2 x 2) + Foncycle )
+* Foncycle = 0 (no digital filtering)
+*/
+   value = (u32) (U8500_I2C_INPUT_FREQ / (speed * 2));
+   i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT2,
+   U8500_I2C_BRCR_SHIFT_BRCNT2, value);
+
+   /* ensure that BRCNT value is zero */
+   i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT1,
+   U8500_I2C_BRCR_SHIFT_BRCNT1, 0);
+
+   return U8500_I2C_INPUT_FREQ/(value * 2);
+}
+
+/*
+ * i2c_init - initialize the i2c bus
+ *
+ * speed: bus speed (in HZ)
+ * slaveaddr: address of device in slave mode
+ *
+ * Slave mode is not implemented.
+ */
+void i2c_init(int

[U-Boot] [PATCHv3 2/4] armv7: Add ST-Ericsson u8500 arch

[John Rigby]

Based on ST-Ericsson internal git repo.

Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
v2: cleanup, mostly removal of unused defines
v3: remove prototype from sys_proto.h as suggested by Wolfgang

 arch/arm/cpu/armv7/u8500/Makefile   |   46 +
 arch/arm/cpu/armv7/u8500/clock.c|   56 ++
 arch/arm/cpu/armv7/u8500/lowlevel.S |   33 
 arch/arm/cpu/armv7/u8500/timer.c|  167 ++
 arch/arm/include/asm/arch-u8500/clock.h |   72 
 arch/arm/include/asm/arch-u8500/gpio.h  |  247 +++
 arch/arm/include/asm/arch-u8500/hardware.h  |   83 +
 arch/arm/include/asm/arch-u8500/sys_proto.h |   27 +++
 arch/arm/include/asm/arch-u8500/u8500.h |   47 +
 9 files changed, 778 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
new file mode 100644
index 000..270aa40
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS  = timer.o clock.o
+SOBJS  = lowlevel.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
new file mode 100644
index 000..9e3b873
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2009 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct clkrst {
+   unsigned int pcken;
+   unsigned int pckdis;
+   unsigned int kcken;
+   unsigned int kckdis;
+};
+
+static unsigned int clkrst_base[] = {
+   U8500_CLKRST1_BASE,
+   U8500_CLKRST2_BASE,
+   U8500_CLKRST3_BASE,
+   0,
+   U8500_CLKRST5_BASE,
+   U8500_CLKRST6_BASE,
+   U8500_CLKRST7_BASE, /* ED only */
+};
+
+/* Turn on peripheral clock at PRCC level */
+void u8500_clock_enable(int periph, int cluster, int kern)
+{
+   struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];
+
+   if (kern != -1)
+   writel(1  kern, clkrst-kcken);
+
+   if (cluster != -1)
+   writel(1  cluster, clkrst-pcken);
+}
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S 
b/arch

[U-Boot] [PATCHv3 4/4] armv7: Add support for ST-Ericsson U8500 href platform

[John Rigby]

Minimal platform support to boot linux from SD.

Supported devices/hw limited to external MMC/SD slot,
GPIO, I2C and minimal PRCMU.

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
This board support requires mmc driver patch set from Matt Waddel.
v2: cleanup, mostly removal of unused defines and include files
v3: incorporate changes suggested by Wolfgang including:
better commit message
get arm_pl180_mmci_init prototype from driver .h file
don't ignore value from arm_pl180_mmci_init
optimize printf's in u8500_href.c
use plain #define CONFIG_BLAH for feature enabling 

 board/st-ericsson/u8500/Makefile |   50 +++
 board/st-ericsson/u8500/gpio.c   |  347 +
 board/st-ericsson/u8500/prcmu-fw.h   |   55 
 board/st-ericsson/u8500/prcmu.c  |  165 ++
 board/st-ericsson/u8500/u8500_href.c |  546 ++
 boards.cfg   |1 +
 include/configs/u8500_href.h |  245 +++
 7 files changed, 1409 insertions(+), 0 deletions(-)
 create mode 100644 board/st-ericsson/u8500/Makefile
 create mode 100644 board/st-ericsson/u8500/gpio.c
 create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 create mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 board/st-ericsson/u8500/u8500_href.c
 create mode 100644 include/configs/u8500_href.h

diff --git a/board/st-ericsson/u8500/Makefile b/board/st-ericsson/u8500/Makefile
new file mode 100644
index 000..91c2abf
--- /dev/null
+++ b/board/st-ericsson/u8500/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) ST-Ericsson SA 2009
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+CFLAGS += -D__RELEASE -D__STN_8500
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := u8500_href.o gpio.o prcmu.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/st-ericsson/u8500/gpio.c b/board/st-ericsson/u8500/gpio.c
new file mode 100644
index 000..96b2461
--- /dev/null
+++ b/board/st-ericsson/u8500/gpio.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2009
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/gpio.h
+
+static struct gpio_register *addr_gpio_register[] = {
+   (void *)U8500_GPIO_0_BASE,
+   (void *)U8500_GPIO_1_BASE,
+   (void *)U8500_GPIO_2_BASE,
+   (void *)U8500_GPIO_3_BASE,
+   (void *)U8500_GPIO_4_BASE,
+   (void *)U8500_GPIO_5_BASE,
+   (void *)U8500_GPIO_6_BASE,
+   (void *)U8500_GPIO_7_BASE,
+   (void *)U8500_GPIO_8_BASE,
+};
+
+struct gpio_altfun_data altfun_table[] = {
+   {
+   .altfun = GPIO_ALT_I2C_0,
+   .start = 147,
+   .end = 148,
+   .cont = 0,
+   .type = GPIO_ALTF_A,
+   },
+   {
+   .altfun = GPIO_ALT_I2C_1,
+   .start = 16,
+   .end = 17

Re: [U-Boot] [PATCHv2 0/4] ST-Ericsson U8500 support

[John Rigby]

On Sat, Apr 2, 2011 at 10:19 AM, John Rigby john.ri...@linaro.org wrote:
 Add support for ST-Ericsson U8500 SoC and HREF platform

 John Rigby (2):
  armv7: Add ST-Ericsson u8500 arch
  armv7: Add support for ST-Ericsson U8500 href platform

 Michael Brandt (1):
  I2C: add driver of st-ericsson u8500 i2c

 Rabin Vincent (1):
  p101x: extra init for u8500

  arch/arm/cpu/armv7/u8500/Makefile           |   46 ++
  arch/arm/cpu/armv7/u8500/clock.c            |   56 +++
  arch/arm/cpu/armv7/u8500/lowlevel.S         |   33 ++
  arch/arm/cpu/armv7/u8500/timer.c            |  167 
  arch/arm/include/asm/arch-u8500/clock.h     |   72 
  arch/arm/include/asm/arch-u8500/gpio.h      |  247 +++
  arch/arm/include/asm/arch-u8500/hardware.h  |   83 
  arch/arm/include/asm/arch-u8500/sys_proto.h |   29 ++
  arch/arm/include/asm/arch-u8500/u8500.h     |   47 ++
  board/st-ericsson/u8500/Makefile            |   50 +++
  board/st-ericsson/u8500/gpio.c              |  347 +++
  board/st-ericsson/u8500/prcmu-fw.h          |   52 +++
  board/st-ericsson/u8500/prcmu.c             |  165 +++
  board/st-ericsson/u8500/u8500_href.c        |  546 
  boards.cfg                                  |    1 +
  drivers/i2c/Makefile                        |    1 +
  drivers/i2c/u8500_i2c.c                     |  613 
 +++
  drivers/i2c/u8500_i2c.h                     |  194 +
  drivers/serial/serial_pl01x.c               |   10 +
  drivers/serial/serial_pl01x.h               |    4 +
  include/configs/u8500_href.h                |  243 +++
  21 files changed, 3006 insertions(+), 0 deletions(-)
  create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
  create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
  create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
  create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
  create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
  create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
  create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
  create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
  create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h
  create mode 100644 board/st-ericsson/u8500/Makefile
  create mode 100644 board/st-ericsson/u8500/gpio.c
  create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
  create mode 100644 board/st-ericsson/u8500/prcmu.c
  create mode 100644 board/st-ericsson/u8500/u8500_href.c
  create mode 100644 drivers/i2c/u8500_i2c.c
  create mode 100644 drivers/i2c/u8500_i2c.h
  create mode 100644 include/configs/u8500_href.h



Albert, Do you have any comments on this series?
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[U-Boot] [PATCHv2 0/4] ST-Ericsson U8500 support

[John Rigby]

Add support for ST-Ericsson U8500 SoC and HREF platform

John Rigby (2):
  armv7: Add ST-Ericsson u8500 arch
  armv7: Add support for ST-Ericsson U8500 href platform

Michael Brandt (1):
  I2C: add driver of st-ericsson u8500 i2c

Rabin Vincent (1):
  p101x: extra init for u8500

 arch/arm/cpu/armv7/u8500/Makefile   |   46 ++
 arch/arm/cpu/armv7/u8500/clock.c|   56 +++
 arch/arm/cpu/armv7/u8500/lowlevel.S |   33 ++
 arch/arm/cpu/armv7/u8500/timer.c|  167 
 arch/arm/include/asm/arch-u8500/clock.h |   72 
 arch/arm/include/asm/arch-u8500/gpio.h  |  247 +++
 arch/arm/include/asm/arch-u8500/hardware.h  |   83 
 arch/arm/include/asm/arch-u8500/sys_proto.h |   29 ++
 arch/arm/include/asm/arch-u8500/u8500.h |   47 ++
 board/st-ericsson/u8500/Makefile|   50 +++
 board/st-ericsson/u8500/gpio.c  |  347 +++
 board/st-ericsson/u8500/prcmu-fw.h  |   52 +++
 board/st-ericsson/u8500/prcmu.c |  165 +++
 board/st-ericsson/u8500/u8500_href.c|  546 
 boards.cfg  |1 +
 drivers/i2c/Makefile|1 +
 drivers/i2c/u8500_i2c.c |  613 +++
 drivers/i2c/u8500_i2c.h |  194 +
 drivers/serial/serial_pl01x.c   |   10 +
 drivers/serial/serial_pl01x.h   |4 +
 include/configs/u8500_href.h|  243 +++
 21 files changed, 3006 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h
 create mode 100644 board/st-ericsson/u8500/Makefile
 create mode 100644 board/st-ericsson/u8500/gpio.c
 create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 create mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 board/st-ericsson/u8500/u8500_href.c
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h
 create mode 100644 include/configs/u8500_href.h

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[U-Boot] [PATCHv2 2/4] armv7: Add ST-Ericsson u8500 arch

[John Rigby]

Based on ST-Ericsson internal git repo.

Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
v2: cleanup, mostly removal of unused defines

 arch/arm/cpu/armv7/u8500/Makefile   |   46 +
 arch/arm/cpu/armv7/u8500/clock.c|   56 ++
 arch/arm/cpu/armv7/u8500/lowlevel.S |   33 
 arch/arm/cpu/armv7/u8500/timer.c|  167 ++
 arch/arm/include/asm/arch-u8500/clock.h |   72 
 arch/arm/include/asm/arch-u8500/gpio.h  |  247 +++
 arch/arm/include/asm/arch-u8500/hardware.h  |   83 +
 arch/arm/include/asm/arch-u8500/sys_proto.h |   29 +++
 arch/arm/include/asm/arch-u8500/u8500.h |   47 +
 9 files changed, 780 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/sys_proto.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
new file mode 100644
index 000..270aa40
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS  = timer.o clock.o
+SOBJS  = lowlevel.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
new file mode 100644
index 000..9e3b873
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2009 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct clkrst {
+   unsigned int pcken;
+   unsigned int pckdis;
+   unsigned int kcken;
+   unsigned int kckdis;
+};
+
+static unsigned int clkrst_base[] = {
+   U8500_CLKRST1_BASE,
+   U8500_CLKRST2_BASE,
+   U8500_CLKRST3_BASE,
+   0,
+   U8500_CLKRST5_BASE,
+   U8500_CLKRST6_BASE,
+   U8500_CLKRST7_BASE, /* ED only */
+};
+
+/* Turn on peripheral clock at PRCC level */
+void u8500_clock_enable(int periph, int cluster, int kern)
+{
+   struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];
+
+   if (kern != -1)
+   writel(1  kern, clkrst-kcken);
+
+   if (cluster != -1)
+   writel(1  cluster, clkrst-pcken);
+}
diff --git a/arch/arm/cpu/armv7/u8500/lowlevel.S 
b/arch/arm/cpu/armv7/u8500/lowlevel.S
new file mode 100644
index

[U-Boot] [PATCHv2 4/4] armv7: Add support for ST-Ericsson U8500 href platform

[John Rigby]

Based on ST-Ericsson private git repo.
Plus changes to use arm_pl180_mmci driver.

This board support requires the vexpress mmc driver patch set from
Matt Waddel.

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Albert Aribaud albert.arib...@free.fr
---
v2: cleanup, mostly removal of unused defines and include files

 board/st-ericsson/u8500/Makefile |   50 +++
 board/st-ericsson/u8500/gpio.c   |  347 +
 board/st-ericsson/u8500/prcmu-fw.h   |   52 
 board/st-ericsson/u8500/prcmu.c  |  165 ++
 board/st-ericsson/u8500/u8500_href.c |  546 ++
 boards.cfg   |1 +
 include/configs/u8500_href.h |  243 +++
 7 files changed, 1404 insertions(+), 0 deletions(-)
 create mode 100644 board/st-ericsson/u8500/Makefile
 create mode 100644 board/st-ericsson/u8500/gpio.c
 create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 create mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 board/st-ericsson/u8500/u8500_href.c
 create mode 100644 include/configs/u8500_href.h

diff --git a/board/st-ericsson/u8500/Makefile b/board/st-ericsson/u8500/Makefile
new file mode 100644
index 000..91c2abf
--- /dev/null
+++ b/board/st-ericsson/u8500/Makefile
@@ -0,0 +1,50 @@
+#
+# Copyright (C) ST-Ericsson SA 2009
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+CFLAGS += -D__RELEASE -D__STN_8500
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := u8500_href.o gpio.o prcmu.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/st-ericsson/u8500/gpio.c b/board/st-ericsson/u8500/gpio.c
new file mode 100644
index 000..96b2461
--- /dev/null
+++ b/board/st-ericsson/u8500/gpio.c
@@ -0,0 +1,347 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2009
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/arch/gpio.h
+
+static struct gpio_register *addr_gpio_register[] = {
+   (void *)U8500_GPIO_0_BASE,
+   (void *)U8500_GPIO_1_BASE,
+   (void *)U8500_GPIO_2_BASE,
+   (void *)U8500_GPIO_3_BASE,
+   (void *)U8500_GPIO_4_BASE,
+   (void *)U8500_GPIO_5_BASE,
+   (void *)U8500_GPIO_6_BASE,
+   (void *)U8500_GPIO_7_BASE,
+   (void *)U8500_GPIO_8_BASE,
+};
+
+struct gpio_altfun_data altfun_table[] = {
+   {
+   .altfun = GPIO_ALT_I2C_0,
+   .start = 147,
+   .end = 148,
+   .cont = 0,
+   .type = GPIO_ALTF_A,
+   },
+   {
+   .altfun = GPIO_ALT_I2C_1,
+   .start = 16,
+   .end = 17,
+   .cont = 0,
+   .type = GPIO_ALTF_B,
+   },
+   {
+   .altfun = GPIO_ALT_I2C_2,
+   .start = 10,
+   .end = 11,
+   .cont = 0,
+   .type = GPIO_ALTF_B,
+   },
+   {
+   .altfun = GPIO_ALT_I2C_3,
+   .start = 229

[U-Boot] [PATCHv2 3/4] I2C: add driver of st-ericsson u8500 i2c

[John Rigby]

From: Michael Brandt michael.bra...@stericsson.com

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Heiko Schocher h...@denx.de
---
v2: Incorporate suggestions from Heiko Schocher

 drivers/i2c/Makefile|1 +
 drivers/i2c/u8500_i2c.c |  613 +++
 drivers/i2c/u8500_i2c.h |  194 +++
 3 files changed, 808 insertions(+), 0 deletions(-)
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 052fe36..43507fc 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
 COBJS-$(CONFIG_SPEAR_I2C) += spr_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
+COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/i2c/u8500_i2c.c b/drivers/i2c/u8500_i2c.c
new file mode 100644
index 000..ea8a71d
--- /dev/null
+++ b/drivers/i2c/u8500_i2c.c
@@ -0,0 +1,613 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Basic U-Boot I2C interface for STn8500/DB8500
+ * Author: Michael Brandt michael.bra...@stericsson.com for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Only 7-bit I2C device addresses are supported.
+ */
+
+#include common.h
+#include i2c.h
+
+#include u8500_i2c.h
+#include asm/io.h
+#include asm/arch/clock.h
+
+#define U8500_I2C_ENDAD_COUNTER(CONFIG_SYS_HZ/100) /* I2C bus 
timeout */
+#define U8500_I2C_FIFO_FLUSH_COUNTER   50  /* flush timeout */
+#define U8500_I2C_SCL_FREQ 10  /* I2C bus clock freq */
+#define U8500_I2C_INPUT_FREQ   4800/* Input clock freq */
+#define TX_FIFO_THRESHOLD  0x4
+#define RX_FIFO_THRESHOLD  0x4
+#define SLAVE_SETUP_TIME 14 /* Slave data setup time, 250ns for 48MHz i2c_clk 
*/
+
+#define WRITE_FIELD(var, mask, shift, value) \
+   (var = ((var  ~(mask)) | ((value)  (shift
+
+static unsigned int bus_initialized[CONFIG_SYS_U8500_I2C_BUS_MAX];
+static unsigned int i2c_bus_num;
+static unsigned int i2c_bus_speed[] = {
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED,
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED
+};
+static struct u8500_i2c_regs *i2c_dev[] = {
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C0_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C1_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C2_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_U8500_I2C3_BASE,
+};
+
+static struct {
+   int periph;
+   int pcken;
+   int kcken;
+} i2c_clock_bits[] = {
+   {3, 3, 3}, /* I2C0 */
+   {1, 2, 2}, /* I2C1 */
+   {1, 6, 6}, /* I2C2 */
+   {2, 0, 0}, /* I2C3 */
+};
+
+static void i2c_set_bit(void *reg, u32 mask)
+{
+   writel(readl(reg) | mask, reg);
+}
+
+static void i2c_clr_bit(void *reg, u32 mask)
+{
+   writel(readl(reg)  ~mask, reg);
+}
+
+static void i2c_write_field(void *reg, u32 mask, uint shift, u32 value)
+{
+   writel((readl(reg)  ~mask) | (value  shift), reg);
+}
+
+static int __i2c_set_bus_speed(unsigned int speed)
+{
+   u32 value;
+   struct u8500_i2c_regs *i2c_regs;
+
+   i2c_regs = i2c_dev[i2c_bus_num];
+
+   /* Select standard (100 kbps) speed mode */
+   i2c_write_field(i2c_regs-cr, U8500_I2C_CR_SM,
+   U8500_I2C_CR_SHIFT_SM, 0x0);
+
+   /*
+* Set the Baud Rate Counter 2 value
+* Baud rate (standard) = fi2cclk / ( (BRCNT2 x 2) + Foncycle )
+* Foncycle = 0 (no digital filtering)
+*/
+   value = (u32) (U8500_I2C_INPUT_FREQ / (speed * 2));
+   i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT2,
+   U8500_I2C_BRCR_SHIFT_BRCNT2, value);
+
+   /* ensure that BRCNT value is zero */
+   i2c_write_field(i2c_regs-brcr, U8500_I2C_BRCR_BRCNT1,
+   U8500_I2C_BRCR_SHIFT_BRCNT1, 0);
+
+   return U8500_I2C_INPUT_FREQ/(value * 2);
+}
+
+/*
+ * i2c_init - initialize the i2c bus
+ *
+ * speed: bus speed (in HZ)
+ * slaveaddr: address of device in slave mode
+ *
+ * Slave mode is not implemented.
+ */
+void i2c_init(int speed, int slaveaddr)
+{
+   struct

[U-Boot] [PATCHv2 1/4] p101x: extra init for u8500

[John Rigby]

From: Rabin Vincent rabin.vinc...@stericsson.com

empty fifo on init
program receive line control register on u8500

Signed-off-by: Rabin Vincent rabin.vinc...@stericsson.com
---
v2: no changes

 drivers/serial/serial_pl01x.c |   10 ++
 drivers/serial/serial_pl01x.h |4 
 2 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 5dfcde8..22ada8f 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -112,6 +112,12 @@ int serial_init (void)
unsigned int remainder;
unsigned int fraction;
 
+   /* Empty RX fifo if necessary */
+   if (readl(regs-pl011_cr)  UART_PL011_CR_UARTEN) {
+   while (!(readl(regs-fr)  UART_PL01x_FR_RXFE))
+   readl(regs-dr);
+   }
+
/* First, disable everything */
writel(0, regs-pl011_cr);
 
@@ -134,6 +140,10 @@ int serial_init (void)
writel(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN,
   regs-pl011_lcrh);
 
+#ifdef CONFIG_U8500
+   /* program receive line control register */
+   writel(0x70, regs-pl011_rlcr);
+#endif
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE,
   regs-pl011_cr);
diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h
index b670c24..fdd3911 100644
--- a/drivers/serial/serial_pl01x.h
+++ b/drivers/serial/serial_pl01x.h
@@ -43,7 +43,11 @@ struct pl01x_regs {
u32 pl010_lcrl; /* 0x10 Line control register, low byte */
u32 pl010_cr;   /* 0x14 Control register */
u32 fr; /* 0x18 Flag register (Read only) */
+#ifdef CONFIG_U8500
+   u32 pl011_rlcr; /* 0x1c Receive line control register */
+#else
u32 reserved;
+#endif
u32 ilpr;   /* 0x20 IrDA low-power counter register */
u32 pl011_ibrd; /* 0x24 Integer baud rate register */
u32 pl011_fbrd; /* 0x28 Fractional baud rate register */
-- 
1.7.1

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[U-Boot] [PATCH 0/4] ST-Ericsson U8500 support

[John Rigby]

Add support for ST-Ericsson U8500 SoC and HREF platform

John Rigby (1):
  armv7: Add support for ST-Ericsson U8500 href platform

Michael Brandt (1):
  I2C: add driver of st-ericsson u8500 i2c

Rabin Vincent (2):
  p101x: extra init for u8500
  armv7: Add ST-Ericsson u8500 arch

 arch/arm/cpu/armv7/u8500/Makefile  |   46 +++
 arch/arm/cpu/armv7/u8500/clock.c   |   56 +++
 arch/arm/cpu/armv7/u8500/lowlevel.S|   33 ++
 arch/arm/cpu/armv7/u8500/timer.c   |  167 
 arch/arm/include/asm/arch-u8500/ab8500.h   |  523 
 arch/arm/include/asm/arch-u8500/bits.h |   58 +++
 arch/arm/include/asm/arch-u8500/clock.h|   72 
 arch/arm/include/asm/arch-u8500/common.h   |  107 +
 arch/arm/include/asm/arch-u8500/gpio.h |  247 
 arch/arm/include/asm/arch-u8500/hardware.h |   83 
 arch/arm/include/asm/arch-u8500/u8500.h|   47 +++
 board/st-ericsson/u8500/Makefile   |   50 +++
 board/st-ericsson/u8500/gpio.c |  346 
 board/st-ericsson/u8500/prcmu-fw-defs_v1.h |  578 ++
 board/st-ericsson/u8500/prcmu-fw.h |  182 +
 board/st-ericsson/u8500/prcmu.c|  167 
 board/st-ericsson/u8500/u8500_href.c   |  540 +
 boards.cfg |1 +
 drivers/i2c/Makefile   |1 +
 drivers/i2c/u8500_i2c.c|  603 
 drivers/i2c/u8500_i2c.h|  220 ++
 drivers/serial/serial_pl01x.c  |   10 +
 drivers/serial/serial_pl01x.h  |4 +
 include/configs/u8500_href.h   |  243 +++
 24 files changed, 4384 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/ab8500.h
 create mode 100644 arch/arm/include/asm/arch-u8500/bits.h
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/common.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h
 create mode 100644 board/st-ericsson/u8500/Makefile
 create mode 100644 board/st-ericsson/u8500/gpio.c
 create mode 100644 board/st-ericsson/u8500/prcmu-fw-defs_v1.h
 create mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 create mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 board/st-ericsson/u8500/u8500_href.c
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h
 create mode 100644 include/configs/u8500_href.h

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[U-Boot] [PATCH 3/4] I2C: add driver of st-ericsson u8500 i2c

[John Rigby]

From: Michael Brandt michael.bra...@stericsson.com

Signed-off-by: John Rigby john.ri...@linaro.org
---
 drivers/i2c/Makefile|1 +
 drivers/i2c/u8500_i2c.c |  603 +++
 drivers/i2c/u8500_i2c.h |  220 +
 3 files changed, 824 insertions(+), 0 deletions(-)
 create mode 100644 drivers/i2c/u8500_i2c.c
 create mode 100644 drivers/i2c/u8500_i2c.h

diff --git a/drivers/i2c/Makefile b/drivers/i2c/Makefile
index 052fe36..ac9c00f 100644
--- a/drivers/i2c/Makefile
+++ b/drivers/i2c/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
 COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
 COBJS-$(CONFIG_SPEAR_I2C) += spr_i2c.o
 COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
+COBJS-$(CONFIG_DRIVER_U8500_I2C) += u8500_i2c.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/i2c/u8500_i2c.c b/drivers/i2c/u8500_i2c.c
new file mode 100644
index 000..8965100
--- /dev/null
+++ b/drivers/i2c/u8500_i2c.c
@@ -0,0 +1,603 @@
+/*
+ * Copyright (C) ST-Ericsson SA 2010
+ *
+ * Basic U-Boot I2C interface for STn8500/DB8500
+ * Author: Michael Brandt michael.bra...@stericsson.com for ST-Ericsson
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Only 7-bit I2C device addresses are supported.
+ */
+
+#include common.h
+#include i2c.h
+
+#include u8500_i2c.h
+#include asm/io.h
+#include asm/arch/common.h
+#include asm/arch/clock.h
+
+#define I2C_ENDAD_COUNTER  (CONFIG_SYS_HZ/100) /* I2C bus timeout */
+#define I2C_FIFO_FLUSH_COUNTER 50  /* flush timeout */
+#define I2C_SCL_FREQ   10  /* I2C bus clock frequency.*/
+#define I2C_INPUT_FREQ 4800/* Input clock frequency.*/
+#define TX_FIFO_THRESHOLD  0x4
+#define RX_FIFO_THRESHOLD  0x4
+#define SLAVE_SETUP_TIME 14 /* Slave data setup time, 250ns for 48MHz i2c_clk 
*/
+
+#define WRITE_FIELD(var, mask, shift, value) \
+   (var = ((var  ~(mask)) | ((value)  (shift
+
+static unsigned int bus_initialized[CONFIG_SYS_I2C_BUS_MAX];
+static unsigned int i2c_bus_num;
+static unsigned int i2c_bus_speed[] = {
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED,
+   CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED
+};
+static struct u8500_i2c_regs *i2c_dev[] = {
+   (struct u8500_i2c_regs *)CONFIG_SYS_I2C0_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_I2C1_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_I2C2_BASE,
+   (struct u8500_i2c_regs *)CONFIG_SYS_I2C3_BASE,
+};
+
+static struct {
+   int periph;
+   int pcken;
+   int kcken;
+} i2c_clock_bits[] = {
+   {3, 3, 3}, /* I2C0 */
+   {1, 2, 2}, /* I2C1 */
+   {1, 6, 6}, /* I2C2 */
+   {2, 0, 0}, /* I2C3 */
+};
+
+static void i2c_set_bit(void *reg, u32 mask)
+{
+   writel(readl(reg) | mask, reg);
+}
+
+static void i2c_clr_bit(void *reg, u32 mask)
+{
+   writel(readl(reg)  ~mask, reg);
+}
+
+static void i2c_write_field(void *reg, u32 mask, uint shift, u32 value)
+{
+   writel((readl(reg)  ~mask) | (value  shift), reg);
+}
+
+static int __i2c_set_bus_speed(unsigned int speed)
+{
+   u32 value;
+   struct u8500_i2c_regs *i2c_regs;
+
+   i2c_regs = i2c_dev[i2c_bus_num];
+
+   /* Select standard (100 kbps) speed mode */
+   i2c_write_field(i2c_regs-cr, I2C_CR_SM, I2C_CR_SHIFT_SM, 0x0);
+
+   /*
+* Set the Baud Rate Counter 2 value
+* Baud rate (standard) = fi2cclk / ( (BRCNT2 x 2) + Foncycle )
+* Foncycle = 0 (no digital filtering)
+*/
+   value = (u32) (I2C_INPUT_FREQ / (speed * 2));
+   i2c_write_field(i2c_regs-brcr, I2C_BRCR_BRCNT2,
+   I2C_BRCR_SHIFT_BRCNT2, value);
+
+   /* ensure that BRCNT value is zero */
+   i2c_write_field(i2c_regs-brcr, I2C_BRCR_BRCNT1,
+   I2C_BRCR_SHIFT_BRCNT1, 0);
+
+   return I2C_INPUT_FREQ/(value * 2);
+}
+
+/*
+ * i2c_init - initialize the i2c bus
+ *
+ * speed: bus speed (in HZ)
+ * slaveaddr: address of device in slave mode
+ *
+ * Slave mode is not implemented.
+ */
+void i2c_init(int speed, int slaveaddr)
+{
+   struct u8500_i2c_regs *i2c_regs;
+
+   debug(i2c_init bus %d, speed %d\n, i2c_bus_num, speed);
+
+   u8500_clock_enable(i2c_clock_bits[i2c_bus_num].periph

[U-Boot] [PATCH 2/4] armv7: Add ST-Ericsson u8500 arch

[John Rigby]

From: Rabin Vincent rabin.vinc...@stericsson.com

Signed-off-by: Rabin Vincent rabin.vinc...@stericsson.com
Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
---
 arch/arm/cpu/armv7/u8500/Makefile  |   46 +++
 arch/arm/cpu/armv7/u8500/clock.c   |   56 +++
 arch/arm/cpu/armv7/u8500/lowlevel.S|   33 ++
 arch/arm/cpu/armv7/u8500/timer.c   |  167 +
 arch/arm/include/asm/arch-u8500/ab8500.h   |  523 
 arch/arm/include/asm/arch-u8500/bits.h |   58 +++
 arch/arm/include/asm/arch-u8500/clock.h|   72 
 arch/arm/include/asm/arch-u8500/common.h   |  107 ++
 arch/arm/include/asm/arch-u8500/gpio.h |  247 +
 arch/arm/include/asm/arch-u8500/hardware.h |   83 +
 arch/arm/include/asm/arch-u8500/u8500.h|   47 +++
 11 files changed, 1439 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/Makefile
 create mode 100644 arch/arm/cpu/armv7/u8500/clock.c
 create mode 100644 arch/arm/cpu/armv7/u8500/lowlevel.S
 create mode 100644 arch/arm/cpu/armv7/u8500/timer.c
 create mode 100644 arch/arm/include/asm/arch-u8500/ab8500.h
 create mode 100644 arch/arm/include/asm/arch-u8500/bits.h
 create mode 100644 arch/arm/include/asm/arch-u8500/clock.h
 create mode 100644 arch/arm/include/asm/arch-u8500/common.h
 create mode 100644 arch/arm/include/asm/arch-u8500/gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/hardware.h
 create mode 100644 arch/arm/include/asm/arch-u8500/u8500.h

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
new file mode 100644
index 000..270aa40
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+COBJS  = timer.o clock.o
+SOBJS  = lowlevel.o
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
new file mode 100644
index 000..9e3b873
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2009 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include asm/io.h
+#include asm/arch/hardware.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct clkrst {
+   unsigned int pcken;
+   unsigned int pckdis;
+   unsigned int kcken;
+   unsigned int kckdis;
+};
+
+static unsigned int clkrst_base[] = {
+   U8500_CLKRST1_BASE,
+   U8500_CLKRST2_BASE,
+   U8500_CLKRST3_BASE,
+   0,
+   U8500_CLKRST5_BASE,
+   U8500_CLKRST6_BASE,
+   U8500_CLKRST7_BASE, /* ED only */
+};
+
+/* Turn on peripheral clock at PRCC level */
+void u8500_clock_enable(int periph, int cluster, int kern)
+{
+   struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];
+
+   if (kern != -1)
+   writel(1  kern, clkrst-kcken

[U-Boot] [PATCH 1/4] p101x: extra init for u8500

[John Rigby]

From: Rabin Vincent rabin.vinc...@stericsson.com

empty fifo on init
program receive line control register on u8500

Signed-off-by: Rabin Vincent rabin.vinc...@stericsson.com
---
 drivers/serial/serial_pl01x.c |   10 ++
 drivers/serial/serial_pl01x.h |4 
 2 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index 5dfcde8..22ada8f 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -112,6 +112,12 @@ int serial_init (void)
unsigned int remainder;
unsigned int fraction;
 
+   /* Empty RX fifo if necessary */
+   if (readl(regs-pl011_cr)  UART_PL011_CR_UARTEN) {
+   while (!(readl(regs-fr)  UART_PL01x_FR_RXFE))
+   readl(regs-dr);
+   }
+
/* First, disable everything */
writel(0, regs-pl011_cr);
 
@@ -134,6 +140,10 @@ int serial_init (void)
writel(UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN,
   regs-pl011_lcrh);
 
+#ifdef CONFIG_U8500
+   /* program receive line control register */
+   writel(0x70, regs-pl011_rlcr);
+#endif
/* Finally, enable the UART */
writel(UART_PL011_CR_UARTEN | UART_PL011_CR_TXE | UART_PL011_CR_RXE,
   regs-pl011_cr);
diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h
index b670c24..fdd3911 100644
--- a/drivers/serial/serial_pl01x.h
+++ b/drivers/serial/serial_pl01x.h
@@ -43,7 +43,11 @@ struct pl01x_regs {
u32 pl010_lcrl; /* 0x10 Line control register, low byte */
u32 pl010_cr;   /* 0x14 Control register */
u32 fr; /* 0x18 Flag register (Read only) */
+#ifdef CONFIG_U8500
+   u32 pl011_rlcr; /* 0x1c Receive line control register */
+#else
u32 reserved;
+#endif
u32 ilpr;   /* 0x20 IrDA low-power counter register */
u32 pl011_ibrd; /* 0x24 Integer baud rate register */
u32 pl011_fbrd; /* 0x28 Fractional baud rate register */
-- 
1.7.1

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Re: [U-Boot] [PATCH 0/4] ST-Ericsson U8500 support

[John Rigby]

On Tue, Mar 22, 2011 at 2:40 PM, John Rigby john.ri...@linaro.org wrote:
 Add support for ST-Ericsson U8500 SoC and HREF platform

 John Rigby (1):
  armv7: Add support for ST-Ericsson U8500 href platform

I failed to mention that this board uses the mmc driver as vexpress
submitted a few weeks ago.

[U-Boot] [PATCH V3 0/3] Add support for the MMC device to the vexpress
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Re: [U-Boot] [PATCH 17/22] omap4: calculate EMIF register values

[John Rigby]

On Mon, Feb 28, 2011 at 4:46 AM, Aneesh V ane...@ti.com wrote:
 Calculate EMIF register values based on AC timing parameters
 from the SDRAM datasheet and the DDR frequency rather than
 using the hard-coded values.

 For a new board the user doen't have to go through the tedious
 process of calculating the register values. Instead, just
 provide the AC timings from the device data sheet as input
 and the driver will automatically calculate the register values.

 Signed-off-by: Aneesh V ane...@ti.com
 ---


I get some warnings from arch/arm/cpu/armv7/omap4/emif.c:
emif.c: In function ‘sdram_init’:
emif.c:1164:43: warning: ‘section_map’ may be used uninitialized in
this function
emif.c:1166:27: warning: ‘lis_map_regs_calculated$dmm_lisa_map_3’ may
be used uninitialized in this function
emif.c: In function ‘sdram_init’:
emif.c:1166:27: warning: ‘lis_map_regs_calculated$dmm_lisa_map_3’ may
be used uninitialized in this function

Looking at the code I see that these are initialized but the compiler
can't firgure that out.

John
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Re: [U-Boot] [PATCH 01/22] mkimage: Add OMAP boot image support

[John Rigby]

On Tue, Mar 1, 2011 at 7:24 AM, Bedia, Vaibhav vaibhav.be...@ti.com wrote:
 Aneesh,

 On Monday, February 28, 2011 5:16 PM, V, Aneesh wrote:
 From: John Rigby john.ri...@linaro.org

 Signed-off-by: John Rigby john.ri...@linaro.org
 ---
  common/image.c    |    1 +
  include/image.h   |    1 +
  tools/Makefile    |    2 +
  tools/mkimage.c   |    2 +
  tools/mkimage.h   |    1 +
  tools/omapimage.c |  229
  +
  tools/omapimage.h |   50  7 files changed, 286
 insertions(+), 0 deletions(-)  create mode 100644
 tools/omapimage.c  create mode 100644 tools/omapimage.h

 As pointed in the RFC[1] which was posted by John, we should separate out the
 configuration header part as that is optional. We should also consider 
 renaming
 it to make it generic. What do you think?

Vaibhav,

If you submit a patch that does this I will gladly ack it.

John
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Re: [U-Boot] [PATCH 0/3] Add support for the MMC device to the vexpress

[John Rigby]

Reinhard,
On Thu, Feb 24, 2011 at 8:02 PM, Reinhard Meyer
u-b...@emk-elektronik.de wrote:
 Dear matt.wad...@linaro.org,
 From: Matt Waddelmatt.wad...@linaro.org

 These patches add support for the ARM PrimeCell PL180 MultiMedia Interface.
 The Versatile Express was the test platform for these changes.

 Matt Waddel (3):
    MMC: Max blocks value adjustable
    MMC: Add support for PL180 ARM mmc device
    ARMV7: Vexpress: Add MMC support

   board/armltd/vexpress/ca9x4_ct_vxp.c |    9 +
   drivers/mmc/Makefile                 |    1 +
   drivers/mmc/mmc.c                    |   19 +-
   drivers/mmc/mmci.c                   |  452 
 ++
   drivers/mmc/mmci.h                   |  181 ++

 I would expect something more descriptive like hardware_mmc.[ch] here.
 mmci.[ch] does not lead one to think its a hardware specific driver, even 
 less for
 what specific hardware it is.
 The same is true for the exported function name mmci_init, the macro 
 CONFIG_MMCI etc.
The file in the linux kernel is mmci.c.  One could argue that keeping
it the same as the kernel is a good thing.  If it needs to be changed,
I would vote for arm_mmci.c.

The config option in the kernel is CONFIG_MMC_ARMMMCI so I would vote
for that as the config option in u-boot.

br,
John
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Re: [U-Boot] [STATUS] v2011.03-rc1 released

[John Rigby]

On Wed, Feb 2, 2011 at 2:55 PM, Wolfgang Denk w...@denx.de wrote:
 Hello  everybody:

 * U-Boot v2011.03-rc1 was released on Wed, 02 Feb 2011.

 * Release v2011.03 is scheduled in 39 days - on March 13, 2011.

 Please help testing, and check if all your relevant patches have been
 included.



This omap timer fix never got applied
http://patchwork.ozlabs.org/patch/76803/
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Re: [U-Boot] arm: timer_init() and bss (relocation)

[John Rigby]

On Fri, Jan 21, 2011 at 11:07 PM, Alexander Holler hol...@ahsoftware.de wrote:
 Hello,

 because I still have problems where I think the problem is the
 relocation, I've had a look at some timer code.

 E.g. in arch/arm/cpu/arm926ejs/kirkwood/timer.c  on top there is

 struct kwtmr_registers *kwtmr_regs = (struct kwtmr_registers
 *)KW_TIMER_BASE;

 which is used in timer_init().

 In arch/arm/cpu/armv7/omap-common/timer.c we have

 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;

 which is used in timer_init() too.

 (I assume similiar code is used in more files, I've just had a look at
 those two.)

 timer_init() is called in board_init_f() through init_sequence, that
 means before relocation.

 Did I miss something, or I'm right that this is a problem because those
 two variables are stored in bss but are accessed before relocation?

These are both initialized data so they do not go in bss.
 Regards,

 Alexander
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Re: [U-Boot] [RFC PATCH 6/8] omap3_beagle: add nand_spl support

[John Rigby]

On Sat, Jan 8, 2011 at 1:33 AM, Aneesh V ane...@ti.com wrote:
 John,
 On Saturday 08 January 2011 12:16 PM, John Rigby wrote:

 On Fri, Jan 7, 2011 at 11:33 PM, Aneesh Vane...@ti.com  wrote:

 Hi John,

 On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:

 Signed-off-by: John Rigbyjohn.ri...@linaro.org
 +
 +void board_init_f(unsigned long bootflag)
 +{
 +       nand_boot();
 +}
 +

 I see that you have added a call to nand_boot() in start.S too.
 Which is the intended one?
 If we jump to nand_boot() here bss will not be cleared, right?

 Also, I see potential issues in start.S that will prevent bss setup for
 PRELOADERs. I will correct these in my patch.

 Best regards,
 Aneesh


 The call to nand_boot in board_init_f makes sense for platforms where
 the spl code does not need to be relocated because it has been loaded
 into SRAM by a mask boot rom.  The later nand_boot called from start.S
 is for the traditional nand_spl case where you are typically running
 in a 4K nand controller buffer so the code needs to be relocated to
 dram after dram init.

 Of course my only testing has been on OMAP3 which fits the first case.
  I'm not sure if the second case even matters.  The arm7 platforms I
 know about all have rom boot loaders and large enough SRAM to run the
 spl u-boot in (OMAP[34]) or have boot headers that can be used to init
 dram before loading a full u-boot into dram (i.mx5[13]).

 Also, I was thinking that BSS would not be used in PRELOADERs but of
 the large SRAM case it certainly would be useful to have BSS.


 Agree. So, how about this?
 1. Call relocate_code() in board_init_f() with destination address same
 as TEXT_BASE
 2. start.S skips the relocation, clears the bss(this needs to be fixed)
 and calls board_init_r
 3. Call nand_boot() in board_init_r

 This is what I am planning to do for OMAP4 preloader.

Sounds good to me.

Hopefully in the next couple of days I will have time to send a new
series of my own.  Then we need to combine the two.  So there is one
unified series for proposing for acceptance.

John
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Re: [U-Boot] [RFC PATCH 6/8] omap3_beagle: add nand_spl support

[John Rigby]

On Fri, Jan 7, 2011 at 11:33 PM, Aneesh V ane...@ti.com wrote:
 Hi John,

 On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:

 Signed-off-by: John Rigbyjohn.ri...@linaro.org
 +
 +void board_init_f(unsigned long bootflag)
 +{
 +       nand_boot();
 +}
 +

 I see that you have added a call to nand_boot() in start.S too.
 Which is the intended one?
 If we jump to nand_boot() here bss will not be cleared, right?

 Also, I see potential issues in start.S that will prevent bss setup for
 PRELOADERs. I will correct these in my patch.

 Best regards,
 Aneesh


The call to nand_boot in board_init_f makes sense for platforms where
the spl code does not need to be relocated because it has been loaded
into SRAM by a mask boot rom.  The later nand_boot called from start.S
is for the traditional nand_spl case where you are typically running
in a 4K nand controller buffer so the code needs to be relocated to
dram after dram init.

Of course my only testing has been on OMAP3 which fits the first case.
 I'm not sure if the second case even matters.  The arm7 platforms I
know about all have rom boot loaders and large enough SRAM to run the
spl u-boot in (OMAP[34]) or have boot headers that can be used to init
dram before loading a full u-boot into dram (i.mx5[13]).

Also, I was thinking that BSS would not be used in PRELOADERs but of
the large SRAM case it certainly would be useful to have BSS.

This is all new territory since previously all platforms using
nand_spl were of the small sram variety.

John
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Re: [U-Boot] [RFC PATCH 7/8] mkimage: Add OMAP boot image support

[John Rigby]

On Tue, Jan 4, 2011 at 6:43 AM, Bedia, Vaibhav vaibhav.be...@ti.com wrote:
 Hi John,

 On Tuesday, December 28, 2010 6:17 AM, John Rigby wrote:
 Signed-off-by: John Rigby john.ri...@linaro.org
 ---
  common/image.c    |    1 +
  include/image.h   |    1 +
  tools/Makefile    |    2 +
  tools/mkimage.c   |    2 +
  tools/omapimage.c |  226
  +
  tools/omapimage.h |   50  6 files changed, 282
 insertions(+), 0 deletions(-)  create mode 100644 tools/omapimage.c
 create mode 100644 tools/omapimage.h

 diff --git a/common/image.c b/common/image.c index f63a2ff..4198d76
 100644 --- a/common/image.c
 +++ b/common/image.c
 @@ -141,6 +141,7 @@ static const table_entry_t uimage_type[] = {
       {       IH_TYPE_FLATDT,     flat_dt,    Flat Device Tree,   },
       {       IH_TYPE_KWBIMAGE,   kwbimage,   Kirkwood Boot Image,},
       {       IH_TYPE_IMXIMAGE,   imximage,   Freescale i.MX Boot 
 Image,},
 +     {       IH_TYPE_OMAPIMAGE,  omapimage,  TI OMAP CH/GP Boot Image,},
       {       -1,                 ,           ,                   },
  };

 [...]

 We are working on patch sets to add support for TI816X and TI814X processor 
 series from Texas Instruments. This series includes DM8168/8148, C6A816x and 
 AM389x devices.

 We were also in the process of extending mkimage to attach a header to the 
 u-boot binary for TI816X and TI814X. We could build upon the mkimage 
 extension that you proposed, so please consider making it more generic.

 diff --git a/include/image.h b/include/image.h index
 005e0d2..f74e2b9 100644 --- a/include/image.h
 +++ b/include/image.h
 @@ -157,6 +157,7 @@
  #define IH_TYPE_FLATDT               8       /* Binary Flat Device Tree 
 Blob */
  #define IH_TYPE_KWBIMAGE     9       /* Kirkwood Boot Image          */
  #define IH_TYPE_IMXIMAGE     10      /* Freescale IMXBoot Image      */
 +#define IH_TYPE_OMAPIMAGE    11      /* TI OMAP Config Header Image  */

 [...]

 TIIMAGE instead of OMAPIMAGE sounds more generic.

 [...]
                       $(obj)image.o \
                       $(obj)imximage.o \
 +                     $(obj)omapimage.o \
 Same here. This change could be done globally in the patch.

                       $(obj)kwbimage.o \
                       $(obj)md5.o \
                       $(obj)mkimage.o \
 [...]

 +/* Header size is CH header rounded up to 512 bytes plus GP header */
 +#define OMAP_CH_HDR_SIZE 512 #define OMAP_GP_HDR_SIZE
 (sizeof(struct +gp_header)) #define OMAP_FILE_HDR_SIZE
 +(OMAP_CH_HDR_SIZE+OMAP_GP_HDR_SIZE)
 +
 +static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE];
 +

 TI816X and TI814X only have GP_HDR. How about adding a config option like 
 CONFIG_OMAP_TIIMAGE to decide upon the final size of the header over here? 
 That config option can also help in conditional compilation of the code which 
 deals with the configuration header.

 [...]

 +static int omapimage_verify_header(unsigned char *ptr, int
 image_size, +                 struct mkimage_params *params)
 +{
 +     struct ch_toc *toc = (struct ch_toc *)ptr;
 +     struct gp_header *gph = (struct gp_header
 *)(ptr+OMAP_CH_HDR_SIZE); +   uint32_t offset, size;
 +
 +     while (toc-section_offset != 0x
 +                      toc-section_size != 0x) {
 +             offset = toc-section_offset;
 +             size = toc-section_size;
 +             if (!offset || !size)
 +                     return -1;
 +             if (offset = OMAP_CH_HDR_SIZE || offset+size =
 OMAP_CH_HDR_SIZE) +                   return -1;
 +             toc++;
 +     }
 +     if (!valid_gph_size(gph-size))
 +             return -1;
 +     if (!valid_gph_load_addr(gph-load_addr))
 +             return -1;
 +
 +     return 0;
 +}

 Please consider splitting the various functions/adding checks for CH_HDR and 
 GP_HDR.

 [...]

 +
 +/*
 + * omapimage parameters
 + */
 +static struct image_type_params omapimage_params = {
 +     .name           = TI OMAP CH/GP Boot Image support,
 +     .header_size    = OMAP_FILE_HDR_SIZE,
 +     .hdr            = (void *)omapimage_header,
 +     .check_image_type = omapimage_check_image_types,
 +     .verify_header  = omapimage_verify_header,
 +     .print_header   = omapimage_print_header,
 +     .set_header     = omapimage_set_header,
 +     .check_params   = omapimage_check_params,
 +};
 +

 The set_header and print_header implementations will vary for TI816X and 
 TI814X so protecting them with a macro like CONFIG_OMAP_TIIMAGE will be 
 needed. I think you'll need to add dummy functions also to avoid compilation 
 errors.

 Adding dummy function also has one more advantage in case 2 different 
 binaries are built from the same tree.

 Without dummy functions for the spl stage and the full-fledged u-boot binary 
 there will be different commands.
 Eg: make u-boot.ti for the spl stage and just make in the second stage.

 But with dummy functions in place the user can invoke make u-boot.ti

Re: [U-Boot] [RFC PATCH 6/8] omap3_beagle: add nand_spl support

[John Rigby]

On Tue, Dec 28, 2010 at 12:49 AM, Dirk Behme dirk.be...@googlemail.com wrote:
 On 28.12.2010 07:50, Aneesh V wrote:
 Hello John,

 On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
   snip

 +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
 +LDFLAGS     = -Bstatic -T $(nandobj)u-boot.lds -Ttext 
 $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS)
 +AFLAGS      += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
 +CFLAGS      += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL

 How big is the spl now? For the OMAP4 spl, using '-ffunction-sections'
 and '--gc-sections' reduced the image size by 40% and helped it fit
 into the SRAM bugdet. I am sure your nand_spl is already fitting in the
 SRAM bugdet. But these flags may help reduce the size further. Do you
 want to try it?

 Applying this patch series and building with gcc version 4.3.3
 (Sourcery G++ Lite 2009q1-203) I get

   ./MAKEALL omap3_beagle_nand

 nand_boot.c: In function 'nand_boot':

 nand_boot.c:356: warning: 'noreturn' function does return

 mkimage.c: In function ‘main’:

 mkimage.c:159: warning: implicit declaration of function
 ‘init_omap_image_type’

   ll u-boot-spl.ift
 12580 u-boot-spl.ift

 Using gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50) results in the
 same warnings and

Thanks, Dirk.  I will fix these in the next version.
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Re: [U-Boot] [RFC PATCH 0/8] Add nand_spl support for TI OMAP Beagle

[John Rigby]

On Mon, Dec 27, 2010 at 11:17 PM, Aneesh V ane...@ti.com wrote:
 Hello John,

 On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
 This patch series adds the ability to boot a beagle board from
 nand without x-loader.  A future addition will add mmc boot
 support.

 I had been working on something similar for OMAP4. Basically, I have an
 SPL ready for MMC on OMAP4. It's working on eMMC in raw mode, but needs
 some cleanup and also addition of FAT support.

 I can clean it up and send it out next week(after my vacation) if you
 like.

That would be great.  Having both nand and mmc boot would make this
much more useful.

thanks,
John
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Re: [U-Boot] [RFC PATCH 6/8] omap3_beagle: add nand_spl support

[John Rigby]

On Mon, Dec 27, 2010 at 11:50 PM, Aneesh V ane...@ti.com wrote:
 Hello John,

 On Tuesday 28 December 2010 06:17 AM, John Rigby wrote:
  snip 

 +LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
 +LDFLAGS      = -Bstatic -T $(nandobj)u-boot.lds -Ttext 
 $(CONFIG_SYS_NAND_SPL_TEXT_BASE) $(PLATFORM_LDFLAGS)
 +AFLAGS       += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL
 +CFLAGS       += -DCONFIG_PRELOADER -DCONFIG_NAND_SPL

 How big is the spl now? For the OMAP4 spl, using '-ffunction-sections'
 and '--gc-sections' reduced the image size by 40% and helped it fit
 into the SRAM bugdet. I am sure your nand_spl is already fitting in the
 SRAM bugdet. But these flags may help reduce the size further. Do you
 want to try it?
It is about 12K.  I will try the additional flags and see what
difference they make and include them in the next version.
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[U-Boot] [PATCH] OMAP[34]: fix broken timer

[John Rigby]

As implemented now the timer used to implement __udelay counts
to 0x and then gets stuck there because the the programmed
reload value is 0x.  This value is not only wrong but
illegal according to the reference manual.

One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command.  The sleep will hang
forever.

The timer is a count up timer that reloads as it rolls over
from 0x so the correct load value is 0.

Change TIMER_LOAD_VAL from 0x to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0x.

Signed-off-by: John Rigby john.ri...@linaro.org
---
 arch/arm/cpu/armv7/omap-common/timer.c |7 ---
 1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/armv7/omap-common/timer.c 
b/arch/arm/cpu/armv7/omap-common/timer.c
index 9beebb1..59bbca8 100644
--- a/arch/arm/cpu/armv7/omap-common/timer.c
+++ b/arch/arm/cpu/armv7/omap-common/timer.c
@@ -43,8 +43,9 @@ static struct gptimer *timer_base = (struct gptimer 
*)CONFIG_SYS_TIMERBASE;
  * Nothing really to do with interrupts, just starts up a counter.
  */
 
-#define TIMER_CLOCK(V_SCLK / (2  CONFIG_SYS_PTV))
-#define TIMER_LOAD_VAL 0x
+#define TIMER_CLOCK(V_SCLK / (2  CONFIG_SYS_PTV))
+#define TIMER_OVERFLOW_VAL 0x
+#define TIMER_LOAD_VAL 0
 
 int timer_init(void)
 {
@@ -86,7 +87,7 @@ void __udelay(unsigned long usec)
while (tmo  0) {
now = readl(timer_base-tcrr);
if (last  now) /* count up timer overflow */
-   tmo -= TIMER_LOAD_VAL - last + now;
+   tmo -= TIMER_OVERFLOW_VAL - last + now + 1;
else
tmo -= now - last;
last = now;
-- 
1.7.3.1.120.g38a18

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[U-Boot] [RFC PATCH 0/8] Add nand_spl support for TI OMAP Beagle

[John Rigby]

This patch series adds the ability to boot a beagle board from
nand without x-loader.  A future addition will add mmc boot 
support. 

John Rigby (8):
  NAND: nand_spl/nand_boot.c: add 16-bit and readid support
  armv7: add nand_spl support
  OMAP3: and nand_spl support
  OMAP3: add dram timing constants from x-loader
  NAND: omap_gpmc.c: add nand_spl support
  omap3_beagle: add nand_spl support
  mkimage: Add OMAP boot image support
  OMAP3: Add ift target to top level Makefile

 Makefile |9 +
 arch/arm/cpu/armv7/omap3/board.c |4 +
 arch/arm/cpu/armv7/omap3/clock.c |3 +
 arch/arm/cpu/armv7/omap3/gpio.c  |5 +
 arch/arm/cpu/armv7/omap3/lowlevel_init.S |2 +-
 arch/arm/cpu/armv7/omap3/mem.c   |2 +
 arch/arm/cpu/armv7/omap3/sys_info.c  |6 +-
 arch/arm/cpu/armv7/start.S   |   45 ++-
 arch/arm/include/asm/arch-omap3/mem.h|   45 ++
 board/ti/beagle/beagle_nand_spl.c|  250 ++
 boards.cfg   |1 +
 common/image.c   |1 +
 drivers/mtd/nand/omap_gpmc.c |   36 +
 include/configs/omap3_beagle.h   |   39 +
 include/image.h  |1 +
 include/nand.h   |3 +
 nand_spl/board/ti/beagle/Makefile|  138 
 nand_spl/board/ti/beagle/u-boot.lds  |   74 +
 nand_spl/nand_boot.c |  134 +---
 tools/Makefile   |2 +
 tools/mkimage.c  |2 +
 tools/omapimage.c|  226 +++
 tools/omapimage.h|   50 ++
 23 files changed, 1049 insertions(+), 29 deletions(-)
 create mode 100644 board/ti/beagle/beagle_nand_spl.c
 create mode 100644 nand_spl/board/ti/beagle/Makefile
 create mode 100644 nand_spl/board/ti/beagle/u-boot.lds
 create mode 100644 tools/omapimage.c
 create mode 100644 tools/omapimage.h

-- 
1.7.3.1.120.g38a18

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[U-Boot] [RFC PATCH 1/8] NAND: nand_spl/nand_boot.c: add 16-bit and readid support

[John Rigby]

Some platforms read the nand type to make configuration
choices.  For example, some versions of OMAP3 Beagle use
the NAND type as a hint of the DRAM type.

Turn readid support on with CONFIG_SYS_NAND_BOOT_READID

Add 16-bit nand support.
Turn it on with CONFIG_SYS_NAND_BUSWIDTH_16

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Scott Wood scootw...@freescale.com
---
 include/nand.h   |3 +
 nand_spl/nand_boot.c |  134 -
 2 files changed, 112 insertions(+), 25 deletions(-)

diff --git a/include/nand.h b/include/nand.h
index a452411..3c6237a 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -130,6 +130,9 @@ int nand_get_lock_status(nand_info_t *meminfo, loff_t 
offset);
 void board_nand_select_device(struct nand_chip *nand, int chip);
 #endif
 
+#ifdef CONFIG_SYS_NAND_BOOT_READID
+int nand_boot_readid(int *manf_id, int *dev_id);
+#endif
 __attribute__((noreturn)) void nand_boot(void);
 
 #endif
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 76b8566..1ae2cd0 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -27,6 +27,15 @@
 
 static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
 
+static uint8_t nand_read_byte(struct nand_chip *chip)
+{
+#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
+   return readb(chip-IO_ADDR_R);
+#else
+   return (uint8_t) cpu_to_le16(readw(chip-IO_ADDR_R));
+#endif
+}
+
 #if (CONFIG_SYS_NAND_PAGE_SIZE = 512)
 /*
  * NAND command for small page NAND devices (512)
@@ -46,6 +55,9 @@ static int nand_command(struct mtd_info *mtd, int block, int 
page, int offs, u8
this-cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Set ALE and clear CLE to start address cycle */
/* Column address */
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16
+   offs = 1;
+#endif
this-cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
this-cmd_ctrl(mtd, page_addr  0xff, NAND_CTRL_ALE); /* A[16:9] */
this-cmd_ctrl(mtd, (page_addr  8)  0xff,
@@ -94,6 +106,9 @@ static int nand_command(struct mtd_info *mtd, int block, int 
page, int offs, u8
this-cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Set ALE and clear CLE to start address cycle */
/* Column address */
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16
+   offs = 1;
+#endif
this-cmd_ctrl(mtd, offs  0xff,
   NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
this-cmd_ctrl(mtd, (offs  8)  0xff, NAND_CTRL_ALE); /* A[11:9] */
@@ -128,17 +143,27 @@ static int nand_is_bad_block(struct mtd_info *mtd, int 
block)
 {
struct nand_chip *this = mtd-priv;
 
+#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
+   bad = 0;
nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, 
NAND_CMD_READOOB);
-
-   /*
-* Read one byte
-*/
if (readb(this-IO_ADDR_R) != 0xff)
return 1;
-
+#else
+   u16 bad;
+   nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS  0xFE, 
NAND_CMD_READOOB);
+   bad = cpu_to_le16(readw(this-IO_ADDR_R));
+   if (CONFIG_SYS_NAND_BAD_BLOCK_POS  0x1)
+   bad  8;
+   if ((bad  0xff) != 0xff)
+   return 1;
+#endif
return 0;
 }
 
+#ifndef CONFIG_SYS_NAND_BOOT_ECC_SCRATCH
+#define CONFIG_SYS_NAND_BOOT_ECC_SCRATCH 0x1
+#endif
+
 static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar 
*dst)
 {
struct nand_chip *this = mtd-priv;
@@ -222,47 +247,54 @@ static int nand_load(struct mtd_info *mtd, unsigned int 
offs,
 }
 
 /*
+ * Get ready for booting from NAND.  This is for platforms
+ * that need to read nand data or nand chip id's before initializing
+ * SDRAM.
+ */
+void nand_boot_init(struct nand_chip *nand_chip, nand_info_t (*nand_info))
+{
+   /*
+* Init board specific nand support
+*/
+   nand_chip-select_chip = NULL;
+   nand_info-priv = nand_chip;
+   nand_chip-IO_ADDR_R = nand_chip-IO_ADDR_W = (void  __iomem 
*)CONFIG_SYS_NAND_BASE;
+   nand_chip-dev_ready = NULL;/* preset to NULL */
+   board_nand_init(nand_chip);
+
+   if (nand_chip-select_chip)
+   nand_chip-select_chip(nand_info, 0);
+
+}
+
+/*
  * The main entry for NAND booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
  * from NAND into SDRAM and starts it from there.
  */
-void nand_boot(void)
+void nand_boot_tail(struct nand_chip *nand_chip, nand_info_t *nand_info)
 {
-   struct nand_chip nand_chip;
-   nand_info_t nand_info;
int ret;
__attribute__((noreturn)) void (*uboot)(void);
 
/*
-* Init board specific nand support
-*/
-   nand_chip.select_chip = NULL;
-   nand_info.priv = nand_chip;
-   nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void  __iomem 
*)CONFIG_SYS_NAND_BASE;
-   nand_chip.dev_ready = NULL; /* preset to NULL */
-   board_nand_init(nand_chip

[U-Boot] [RFC PATCH 2/8] armv7: add nand_spl support

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
 arch/arm/cpu/armv7/start.S |   45 +++-
 1 files changed, 44 insertions(+), 1 deletions(-)

diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 684f2d2..17b86e1 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -35,6 +35,27 @@
 
 .globl _start
 _start: b  reset
+#ifdef CONFIG_PRELOADER
+/* No exception handlers in preloader */
+   ldr pc, _hang
+   ldr pc, _hang
+   ldr pc, _hang
+   ldr pc, _hang
+   ldr pc, _hang
+   ldr pc, _hang
+   ldr pc, _hang
+
+_hang:
+   .word   do_hang
+/* pad to 64 byte boundary */
+   .word   0x12345678
+   .word   0x12345678
+   .word   0x12345678
+   .word   0x12345678
+   .word   0x12345678
+   .word   0x12345678
+   .word   0x12345678
+#else
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
@@ -54,6 +75,7 @@ _pad: .word 0x12345678 /* now 16*4=64 */
 .global _end_vect
 _end_vect:
 
+#endif
.balignl 16,0xdeadbeef
 /*
  *
@@ -127,7 +149,7 @@ next:
stmia   r1!, {r3 - r10} @ copy to   target address [r1]
cmp r0, r2  @ until source end address [r2]
bne next@ loop until equal */
-#if !defined(CONFIG_SYS_NAND_BOOT)  !defined(CONFIG_SYS_ONENAND_BOOT)
+#if !defined(CONFIG_NAND_U_BOOT)  !defined(CONFIG_ONENAND_U_BOOT)
/* No need to copy/exec the clock code - DPLL adjust already done
 * in NAND/oneNAND Boot.
 */
@@ -240,6 +262,13 @@ clbss_l:strr2, [r0]/* clear 
loop...*/
  * We are done. Do not return, instead branch to second part of board
  * initialization, now running from RAM.
  */
+#ifdef CONFIG_NAND_SPL
+   ldr r0, _nand_boot_ofs
+   mov pc, r0
+
+_nand_boot_ofs:
+   .word nand_boot
+#else
 jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
@@ -253,6 +282,7 @@ jump_2_ram:
 
 _board_init_r_ofs:
.word board_init_r - _start
+#endif
 
 _rel_dyn_start_ofs:
.word __rel_dyn_start - _start
@@ -269,6 +299,7 @@ _dynsym_start_ofs:
  * setup memory timing
  *
  */
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
 cpu_init_crit:
/*
 * Invalidate L1 I/D
@@ -297,6 +328,9 @@ cpu_init_crit:
bl  lowlevel_init   @ go setup pll,mux,memory
mov lr, ip  @ restore link
mov pc, lr  @ back to my caller
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+
+#ifndef CONFIG_PRELOADER
 /*
  *
  *
@@ -419,10 +453,18 @@ cpu_init_crit:
.macro get_fiq_stack@ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
+#endif /* CONFIG_PRELOADER */
 
 /*
  * exception handlers
  */
+#ifdef CONFIG_PRELOADER
+   .align  5
+do_hang:
+   ldr sp, _TEXT_BASE  /* switch to abort stack */
+1:
+   bl  1b  /* hang and never return */
+#else  /* !CONFIG_PRELOADER */
.align  5
 undefined_instruction:
get_bad_stack
@@ -485,3 +527,4 @@ fiq:
bl  do_fiq
 
 #endif
+#endif /* CONFIG_PRELOADER */
-- 
1.7.3.1.120.g38a18

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[U-Boot] [RFC PATCH 4/8] OMAP3: add dram timing constants from x-loader

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
 arch/arm/include/asm/arch-omap3/mem.h |   45 +
 1 files changed, 45 insertions(+), 0 deletions(-)

diff --git a/arch/arm/include/asm/arch-omap3/mem.h 
b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..970e8b4 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -54,6 +54,29 @@ enum {
 #define SDP_SDRC_DLLAB_CTRL((DLL_ENADLL  3) | \
(DLL_LOCKDLL  2) | (DLL_DLLPHASE_90  1))
 
+#define SDP_3430_SDRC_RFR_CTRL_165MHz   0x0004e201 /* 7.8us/6ns - 50=0x4e2 */
+#define SDP_3430_SDRC_RFR_CTRL_200MHz   0x0005e601 /* 7.8us/5ns - 50=0x5e6 */
+
+/* set the 343x-SDRC incoming address convention */
+#if defined(SDRC_B_R_C)
+#define B_ALL  (0  6)/* bank-row-column */
+#elif defined(SDRC_B1_R_B0_C)
+#define B_ALL  (1  6)/* bank1-row-bank0-column */
+#elif defined(SDRC_R_B_C)
+#define B_ALL  (2  6)/* row-bank-column */
+#endif
+
+
+#define SDP_SDRC_MDCFG_0_DDR   (0x02584019|B_ALL)
+#define SDP_SDRC_MDCFG_0_DDR_MICRON_XM (0x03588019|B_ALL)
+#define SDP_SDRC_MDCFG_0_DDR_NUMONYX_XM(0x04590019|B_ALL)
+
+#define SDP_SDRC_MR_0_DDR  0x0032
+/* Diabling power down mode using CKE pin */
+#define SDP_SDRC_POWER_POP  0x0081
+
+
+
 /* Infineon part of 3430SDP (165MHz optimized) 6.06ns
  *   ACTIMA
  * TDAL = Twr/Tck + Trp/tck = 15/6 + 18/6 = 2.5 + 3 = 5.5 - 6
@@ -167,6 +190,28 @@ enum {
(NUMONYX_XSR_165  0) | (NUMONYX_TXP_165  8) | \
(NUMONYX_TWTR_165  16))
 
+/* Micron part (200MHz optimized) 5 ns
+  */
+#define MICRON_TDAL_200   6
+#define MICRON_TDPL_200   3
+#define MICRON_TRRD_200   2
+#define MICRON_TRCD_200   3
+#define MICRON_TRP_2003
+#define MICRON_TRAS_200   8
+#define MICRON_TRC_200   11
+#define MICRON_TRFC_200  15
+#define MICRON_V_ACTIMA_200 ((MICRON_TRFC_200  27) | (MICRON_TRC_200  22) 
| (MICRON_TRAS_200  18) \
+   | (MICRON_TRP_200  15) | (MICRON_TRCD_200  12) 
|(MICRON_TRRD_200  9) | \
+   (MICRON_TDPL_200  6) | (MICRON_TDAL_200))
+
+#define MICRON_TWTR_200   2
+#define MICRON_TCKE_200   4
+#define MICRON_TXP_2002
+#define MICRON_XSR_200   23
+#define MICRON_V_ACTIMB_200 ((MICRON_TCKE_200  12) | (MICRON_XSR_200  0)) 
| \
+   (MICRON_TXP_200  8) | (MICRON_TWTR_200  16)
+
+
 #ifdef CONFIG_OMAP3_INFINEON_DDR
 #define V_ACTIMA_165 INFINEON_V_ACTIMA_165
 #define V_ACTIMB_165 INFINEON_V_ACTIMB_165
-- 
1.7.3.1.120.g38a18

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[U-Boot] [RFC PATCH 5/8] NAND: omap_gpmc.c: add nand_spl support

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
CC: Scott Wood scootw...@freescale.com
---
 drivers/mtd/nand/omap_gpmc.c |   36 
 1 files changed, 36 insertions(+), 0 deletions(-)

diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..4c76544 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -29,6 +29,28 @@
 #include linux/mtd/nand_ecc.h
 #include nand.h
 
+#ifdef CONFIG_NAND_SPL
+/* in the early stage of NAND flash booting, printf() is not available */
+#define printf(fmt, args...)
+
+static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+   int i;
+   struct nand_chip *chip = mtd-priv;
+
+#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
+   for (i = 0; i  len; i++)
+   buf[i] = readb(chip-IO_ADDR_R);
+#else
+   u16 *p = (u16 *) buf;
+
+   len = 1;
+   for (i = 0; i  len; i++)
+   p[i] = readw(chip-IO_ADDR_R);
+#endif
+}
+#endif
+
 static uint8_t cs;
 static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;
 
@@ -224,6 +246,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t 
mode)
}
 }
 
+#ifndef CONFIG_NAND_SPL
 /*
  * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
  * The default is to come up on s/w ecc
@@ -280,6 +303,7 @@ void omap_nand_switch_ecc(int32_t hardware)
 
nand-options = ~NAND_OWN_BUFFERS;
 }
+#endif
 
 /*
  * Board-specific NAND initialization. The following members of the
@@ -337,8 +361,20 @@ int board_nand_init(struct nand_chip *nand)
nand-options |= NAND_BUSWIDTH_16;
 
nand-chip_delay = 100;
+#ifndef CONFIG_NAND_SPL
/* Default ECC mode */
nand-ecc.mode = NAND_ECC_SOFT;
+#else
+nand-ecc.mode = NAND_ECC_HW;
+nand-ecc.layout = hw_nand_oob;
+nand-ecc.size = 512;
+nand-ecc.bytes = 3;
+nand-ecc.hwctl = omap_enable_hwecc;
+nand-ecc.correct = omap_correct_data;
+nand-ecc.calculate = omap_calculate_ecc;
+   nand-read_buf = nand_read_buf;
+omap_hwecc_init(nand);
+#endif
 
return 0;
 }
-- 
1.7.3.1.120.g38a18

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[U-Boot] [RFC PATCH 6/8] omap3_beagle: add nand_spl support

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
 board/ti/beagle/beagle_nand_spl.c   |  250 +++
 boards.cfg  |1 +
 include/configs/omap3_beagle.h  |   39 ++
 nand_spl/board/ti/beagle/Makefile   |  138 +++
 nand_spl/board/ti/beagle/u-boot.lds |   74 ++
 5 files changed, 502 insertions(+), 0 deletions(-)
 create mode 100644 board/ti/beagle/beagle_nand_spl.c
 create mode 100644 nand_spl/board/ti/beagle/Makefile
 create mode 100644 nand_spl/board/ti/beagle/u-boot.lds

diff --git a/board/ti/beagle/beagle_nand_spl.c 
b/board/ti/beagle/beagle_nand_spl.c
new file mode 100644
index 000..4b4ebde
--- /dev/null
+++ b/board/ti/beagle/beagle_nand_spl.c
@@ -0,0 +1,250 @@
+/*
+ * (C) Copyright 2010
+ * Linaro www.linaro.org
+ * John Rigby john.ri...@linaro.org
+ *
+ * Adapted from x-loader omap3530beagle.c:
+ *   (C) Copyright 2006
+ *   Texas Instruments, www.ti.com
+ *   Jian Zhang jzh...@ti.com
+ *   Richard Woodruff r-woodru...@ti.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include common.h
+#include nand.h
+#include asm/arch/gpio.h
+#include asm/arch/cpu.h
+#include asm/arch/mem.h
+#include asm/arch/mux.h
+#include asm/arch/sys_proto.h
+#include asm/io.h
+#include asm/mach-types.h
+#include beagle.h
+
+void board_init_f(unsigned long bootflag)
+{
+   nand_boot();
+}
+
+/*
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers specific to the
+ * hardware. Many pins need to be moved from protect to primary
+ * mode.
+ */
+void set_muxconf_regs(void)
+{
+   MUX_BEAGLE();
+}
+
+/*
+ * beagle_identify
+ * Description: Detect if we are running on a Beagle revision Ax/Bx,
+ * C1/2/3, C4 or D. This can be done by reading
+ * the level of GPIO173, GPIO172 and GPIO171. This should
+ * result in
+ * GPIO173, GPIO172, GPIO171: 1 1 1 = Ax/Bx
+ * GPIO173, GPIO172, GPIO171: 1 1 0 = C1/2/3
+ * GPIO173, GPIO172, GPIO171: 1 0 1 = C4
+ * GPIO173, GPIO172, GPIO171: 0 0 0 = XM
+ *
+ */
+int beagle_revision(void)
+{
+   int rev;
+
+   omap_request_gpio(171);
+   omap_request_gpio(172);
+   omap_request_gpio(173);
+   omap_set_gpio_direction(171, 1);
+   omap_set_gpio_direction(172, 1);
+   omap_set_gpio_direction(173, 1);
+
+   rev = omap_get_gpio_datain(173)  2 |
+   omap_get_gpio_datain(172)  1 |
+   omap_get_gpio_datain(171);
+   omap_free_gpio(171);
+   omap_free_gpio(172);
+   omap_free_gpio(173);
+
+   return rev;
+}
+
+static const u32 gpmc_m_nand[GPMC_MAX_REG] = {
+   M_NAND_GPMC_CONFIG1,
+   M_NAND_GPMC_CONFIG2,
+   M_NAND_GPMC_CONFIG3,
+   M_NAND_GPMC_CONFIG4,
+   M_NAND_GPMC_CONFIG5,
+   M_NAND_GPMC_CONFIG6, 0
+};
+
+static void gpmc_nand_init(void)
+{
+   gpmc_cfg = (struct gpmc *)GPMC_BASE;
+   const u32 *gpmc_config = NULL;
+   u32 base = 0;
+   u32 size = 0;
+   u32 config = 0;
+
+   /* global settings */
+   writel(0, gpmc_cfg-irqenable); /* isr's sources masked */
+   writel(0, gpmc_cfg-timeout_control);/* timeout disable */
+
+   config = readl(gpmc_cfg-config);
+   config = (~0xf00);
+   writel(config, gpmc_cfg-config);
+
+   /*
+* Disable the GPMC0 config set by ROM code
+* It conflicts with our MPDB (both at 0x0800)
+*/
+   writel(0, gpmc_cfg-cs[0].config7);
+   sdelay(1000);
+
+   gpmc_config = gpmc_m_nand;
+
+   base = PISMO1_NAND_BASE;
+   size = PISMO1_NAND_SIZE;
+   enable_gpmc_cs_config(gpmc_config, gpmc_cfg-cs[0], base, size);
+}
+
+#define MICRON_DDR 0
+#define NUMONYX_MCP1
+int identify_xm_ddr(void)
+{
+   int mfr, id;
+
+   gpmc_nand_init();
+
+   sdelay(2000);
+
+   nand_boot_readid(mfr, id);
+   if (mfr == 0)
+   return MICRON_DDR;
+   if ((mfr == 0x20)  (id == 0xba))
+   return NUMONYX_MCP;
+   return MICRON_DDR;
+}
+
+void mem_init(void)
+{
+   struct sdrc *sdrc_base = (struct sdrc *)OMAP34XX_SDRC_BASE;
+   struct sdrc_actim

[U-Boot] [RFC PATCH 7/8] mkimage: Add OMAP boot image support

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
 common/image.c|1 +
 include/image.h   |1 +
 tools/Makefile|2 +
 tools/mkimage.c   |2 +
 tools/omapimage.c |  226 +
 tools/omapimage.h |   50 
 6 files changed, 282 insertions(+), 0 deletions(-)
 create mode 100644 tools/omapimage.c
 create mode 100644 tools/omapimage.h

diff --git a/common/image.c b/common/image.c
index f63a2ff..4198d76 100644
--- a/common/image.c
+++ b/common/image.c
@@ -141,6 +141,7 @@ static const table_entry_t uimage_type[] = {
{   IH_TYPE_FLATDT, flat_dt,Flat Device Tree,   },
{   IH_TYPE_KWBIMAGE,   kwbimage,   Kirkwood Boot Image,},
{   IH_TYPE_IMXIMAGE,   imximage,   Freescale i.MX Boot Image,},
+   {   IH_TYPE_OMAPIMAGE,  omapimage,  TI OMAP CH/GP Boot Image,},
{   -1, ,   ,   },
 };
 
diff --git a/include/image.h b/include/image.h
index 005e0d2..f74e2b9 100644
--- a/include/image.h
+++ b/include/image.h
@@ -157,6 +157,7 @@
 #define IH_TYPE_FLATDT 8   /* Binary Flat Device Tree Blob */
 #define IH_TYPE_KWBIMAGE   9   /* Kirkwood Boot Image  */
 #define IH_TYPE_IMXIMAGE   10  /* Freescale IMXBoot Image  */
+#define IH_TYPE_OMAPIMAGE  11  /* TI OMAP Config Header Image  */
 
 /*
  * Compression Types
diff --git a/tools/Makefile b/tools/Makefile
index 623f908..a1c4ed7 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -84,6 +84,7 @@ OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o
 OBJ_FILES-$(CONFIG_INCA_IP) += inca-swap-bytes.o
 NOPED_OBJ_FILES-y += kwbimage.o
 NOPED_OBJ_FILES-y += imximage.o
+NOPED_OBJ_FILES-y += omapimage.o
 NOPED_OBJ_FILES-y += mkimage.o
 OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
 NOPED_OBJ_FILES-y += os_support.o
@@ -180,6 +181,7 @@ $(obj)mkimage$(SFX):$(obj)crc32.o \
$(obj)fit_image.o \
$(obj)image.o \
$(obj)imximage.o \
+   $(obj)omapimage.o \
$(obj)kwbimage.o \
$(obj)md5.o \
$(obj)mkimage.o \
diff --git a/tools/mkimage.c b/tools/mkimage.c
index f5859d7..e2490c4 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -155,6 +155,8 @@ main (int argc, char **argv)
init_imx_image_type ();
/* Init FIT image generation/list support */
init_fit_image_type ();
+   /* Init TI OMAP Boot image generation/list support */
+   init_omap_image_type ();
/* Init Default image generation/list support */
init_default_image_type ();
 
diff --git a/tools/omapimage.c b/tools/omapimage.c
new file mode 100644
index 000..87be869
--- /dev/null
+++ b/tools/omapimage.c
@@ -0,0 +1,226 @@
+/*
+ * (C) Copyright 2010
+ * Linaro LTD, www.linaro.org
+ * Author: John Rigby john.ri...@linaro.org
+ * Based on TI's signGP.c
+ *
+ * (C) Copyright 2009
+ * Stefano Babic, DENX Software Engineering, sba...@denx.de.
+ *
+ * (C) Copyright 2008
+ * Marvell Semiconductor www.marvell.com
+ * Written-by: Prafulla Wadaskar prafu...@marvell.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* Required to obtain the getline prototype from stdio.h */
+#define _GNU_SOURCE
+
+#include mkimage.h
+#include image.h
+#include omapimage.h
+
+/* Header size is CH header rounded up to 512 bytes plus GP header */
+#define OMAP_CH_HDR_SIZE 512
+#define OMAP_GP_HDR_SIZE (sizeof(struct gp_header))
+#define OMAP_FILE_HDR_SIZE (OMAP_CH_HDR_SIZE+OMAP_GP_HDR_SIZE)
+
+static uint8_t omapimage_header[OMAP_FILE_HDR_SIZE];
+
+static int omapimage_check_image_types(uint8_t type)
+{
+   if (type == IH_TYPE_OMAPIMAGE)
+   return EXIT_SUCCESS;
+   else
+   return EXIT_FAILURE;
+}
+
+/*
+ * Only the simplest image type is currently supported:
+ * TOC pointing to CHSETTINGS
+ * TOC terminator
+ * CHSETTINGS
+ *
+ * padding to OMAP_CH_HDR_SIZE bytes
+ *
+ * gp header
+ *   size
+ *   load_addr
+ */
+static int valid_gph_size(uint32_t size)
+{
+   return size;
+}
+
+static int valid_gph_load_addr(uint32_t load_addr)
+{
+   return

[U-Boot] [RFC PATCH 8/8] OMAP3: Add ift target to top level Makefile

[John Rigby]

Signed-off-by: John Rigby john.ri...@linaro.org
---
 Makefile |9 +
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/Makefile b/Makefile
index 9055028..baf11b3 100644
--- a/Makefile
+++ b/Makefile
@@ -289,8 +289,13 @@ LDPPFLAGS += \
 
 ifeq ($(CONFIG_NAND_U_BOOT),y)
 NAND_SPL = nand_spl
+ifeq ($(CONFIG_OMAP3430),y)
+U_BOOT_SPL_IFT=u-boot-spl.ift
+ALL+=$(U_BOOT_SPL_IFT)
+else
 U_BOOT_NAND = $(obj)u-boot-nand.bin
 endif
+endif
 
 ifeq ($(CONFIG_ONENAND_U_BOOT),y)
 ONENAND_IPL = onenand_ipl
@@ -407,6 +412,10 @@ $(NAND_SPL):   $(TIMESTAMP_FILE) $(VERSION_FILE) depend
 $(U_BOOT_NAND):$(NAND_SPL) $(obj)u-boot.bin
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin  
$(obj)u-boot-nand.bin
 
+$(U_BOOT_SPL_IFT): $(NAND_SPL) $(obj)u-boot.bin
+   $(obj)tools/mkimage -T omapimage \
+   -a $(CONFIG_SYS_NAND_SPL_TEXT_BASE) -d 
$(obj)nand_spl/u-boot-spl.bin $@
+
 $(ONENAND_IPL):$(TIMESTAMP_FILE) $(VERSION_FILE) 
$(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
 
-- 
1.7.3.1.120.g38a18

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[U-Boot] [PATCH] OMAP[34]: remove board config.mk files

[John Rigby]

and define CONFIG_SYS_TEXT_BASE in the board config files

Signed-off-by: John Rigby john.ri...@linaro.org
---
 board/isee/igep0020/config.mk |   33 -
 board/isee/igep0030/config.mk |   33 -
 board/logicpd/am3517evm/config.mk |   30 --
 board/logicpd/zoom1/config.mk |   33 -
 board/logicpd/zoom2/config.mk |   33 -
 board/overo/config.mk |   28 
 board/ti/beagle/config.mk |   33 -
 board/ti/evm/config.mk|   33 -
 board/ti/sdp3430/config.mk|   33 -
 include/configs/am3517_evm.h  |2 ++
 include/configs/igep0020.h|2 ++
 include/configs/igep0030.h|2 ++
 include/configs/omap3_beagle.h|2 ++
 include/configs/omap3_evm.h   |2 ++
 include/configs/omap3_overo.h |2 ++
 include/configs/omap3_sdp3430.h   |2 ++
 include/configs/omap3_zoom1.h |2 ++
 include/configs/omap3_zoom2.h |2 ++
 18 files changed, 18 insertions(+), 289 deletions(-)
 delete mode 100644 board/isee/igep0020/config.mk
 delete mode 100644 board/isee/igep0030/config.mk
 delete mode 100644 board/logicpd/am3517evm/config.mk
 delete mode 100644 board/logicpd/zoom1/config.mk
 delete mode 100644 board/logicpd/zoom2/config.mk
 delete mode 100644 board/overo/config.mk
 delete mode 100644 board/ti/beagle/config.mk
 delete mode 100644 board/ti/evm/config.mk
 delete mode 100644 board/ti/sdp3430/config.mk

diff --git a/board/isee/igep0020/config.mk b/board/isee/igep0020/config.mk
deleted file mode 100644
index 7964621..000
--- a/board/isee/igep0020/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2009
-# ISEE 2007 SL, www.iseebcn.com
-#
-# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk
deleted file mode 100644
index 059a878..000
--- a/board/isee/igep0030/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2009
-# ISEE 2007 SL, www.iseebcn.com
-#
-# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/logicpd/am3517evm/config.mk 
b/board/logicpd/am3517evm/config.mk
deleted file mode 100644
index 71ec5d0..000
--- a/board/logicpd/am3517evm/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Author: Vaibhav Hiremath hvaib...@ti.com
-#
-# Based on ti/evm/config.mk
-#
-# Copyright (C) 2010
-# Texas Instruments Incorporated - http://www.ti.com/
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU General Public License as published by
-# the Free Software

[U-Boot] [PATCH v2] OMAP[34]: remove board config.mk files

[John Rigby]

and define CONFIG_SYS_TEXT_BASE in the board config files

Signed-off-by: John Rigby john.ri...@linaro.org
---
Changes for v2:
Remove bogus tab character in define in v1.
---
 board/isee/igep0020/config.mk |   33 -
 board/isee/igep0030/config.mk |   33 -
 board/logicpd/am3517evm/config.mk |   30 --
 board/logicpd/zoom1/config.mk |   33 -
 board/logicpd/zoom2/config.mk |   33 -
 board/overo/config.mk |   28 
 board/ti/beagle/config.mk |   33 -
 board/ti/evm/config.mk|   33 -
 board/ti/sdp3430/config.mk|   33 -
 include/configs/am3517_evm.h  |2 ++
 include/configs/igep0020.h|2 ++
 include/configs/igep0030.h|2 ++
 include/configs/omap3_beagle.h|2 ++
 include/configs/omap3_evm.h   |2 ++
 include/configs/omap3_overo.h |2 ++
 include/configs/omap3_sdp3430.h   |2 ++
 include/configs/omap3_zoom1.h |2 ++
 include/configs/omap3_zoom2.h |2 ++
 18 files changed, 18 insertions(+), 289 deletions(-)
 delete mode 100644 board/isee/igep0020/config.mk
 delete mode 100644 board/isee/igep0030/config.mk
 delete mode 100644 board/logicpd/am3517evm/config.mk
 delete mode 100644 board/logicpd/zoom1/config.mk
 delete mode 100644 board/logicpd/zoom2/config.mk
 delete mode 100644 board/overo/config.mk
 delete mode 100644 board/ti/beagle/config.mk
 delete mode 100644 board/ti/evm/config.mk
 delete mode 100644 board/ti/sdp3430/config.mk

diff --git a/board/isee/igep0020/config.mk b/board/isee/igep0020/config.mk
deleted file mode 100644
index 7964621..000
--- a/board/isee/igep0020/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2009
-# ISEE 2007 SL, www.iseebcn.com
-#
-# IGEP0020 uses OMAP3 (ARM-CortexA8) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/isee/igep0030/config.mk b/board/isee/igep0030/config.mk
deleted file mode 100644
index 059a878..000
--- a/board/isee/igep0030/config.mk
+++ /dev/null
@@ -1,33 +0,0 @@
-#
-# (C) Copyright 2009
-# ISEE 2007 SL, www.iseebcn.com
-#
-# IGEP0030 uses OMAP3 (ARM-CortexA8) cpu
-# see http://www.ti.com/ for more information on Texas Instruments
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-# Physical Address:
-# 8000' (bank0)
-# A000/ (bank1)
-# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
-# (mem base + reserved)
-
-# For use with external or internal boots.
-CONFIG_SYS_TEXT_BASE = 0x80008000
diff --git a/board/logicpd/am3517evm/config.mk 
b/board/logicpd/am3517evm/config.mk
deleted file mode 100644
index 71ec5d0..000
--- a/board/logicpd/am3517evm/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# Author: Vaibhav Hiremath hvaib...@ti.com
-#
-# Based on ti/evm/config.mk
-#
-# Copyright (C) 2010
-# Texas Instruments Incorporated - http://www.ti.com/
-#
-# This program is free software; you can redistribute it and/or modify
-# it under the terms of the GNU

Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Tue, Dec 21, 2010 at 1:35 AM, Dirk Behme dirk.be...@googlemail.com wrote:

 (Resend with corrected broken example)

 On 21.12.2010 08:21, Albert ARIBAUD wrote:
 Hi Dirk,

 Le 21/12/2010 08:11, Dirk Behme a écrit :

 But the issue with drivers/mtd/nand/omap_gpmc.c (i.e. the additional
 ldrb    r3, [r3]) is still open? Has anybody tried to replace it with
 a nop in the binary to be sure this is the root cause?

 Can you try and preprocess the C file for both the broken and working
 cases, then post the preprocessed C extract? Differences at the C level
 may help understanding differences at the asm level.

 gcc version 4.5.1 (Sourcery G++ Lite 2010.09-50)

 Work:
 

 static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
     uint32_t ctrl)
 {
  register struct nand_chip *this = mtd-priv;
  ...
  if (cmd != -1)

   (*(volatile unsigned char *)(this-IO_ADDR_W) = (cmd));
 }

        if (cmd != NAND_CMD_NONE)
   84:  e3710001        cmn     r1, #1
                origwriteb(cmd, this-IO_ADDR_W);
   88:  15933004        ldrne   r3, [r3, #4]
   8c:  120110ff        andne   r1, r1, #255    ; 0xff
   90:  15c31000        strbne  r1, [r3]
   94:  e12fff1e        bx      lr
        ...


 Broken:
 ==

 static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
     uint32_t ctrl)
 {
  register struct nand_chip *this = mtd-priv;

 ...

  if (cmd != -1)
   ({ __asm__ __volatile__ ( : : : memory); (*(volatile unsigned
 char *)(this-IO_ADDR_W) = (cmd)); });
 }

        if (cmd != NAND_CMD_NONE)
   84:  e3710001        cmn     r1, #1
   88:  012fff1e        bxeq    lr
                writeb(cmd, this-IO_ADDR_W);
   8c:  e5933004        ldr     r3, [r3, #4]
   90:  e20110ff        and     r1, r1, #255    ; 0xff
   94:  e5c31000        strb    r1, [r3]
   98:  e5d33000        ldrb    r3, [r3]
   9c:  e12fff1e        bx      lr


 The issue seems to be the additional 'ldrb      r3, [r3]' added by the
 compiler in the broken version.


And I at your suggestion tried modifying the binary changing the extra
ldrb to a nop and it works.
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

Earlier in this thread Alexander said:
 I haven't add the definitions which are using a memory barrier because I 
 haven't found
 a place in the kernel where they were actually enabled
 (CONFIG_ARM_DMA_MEM_BUFFERABLE).

I think this is the problem because it is indeed defined for all v6
and v7 arm platforms.  Here is the config snippet from
arch/arm/mm/Kconfig:

config ARM_DMA_MEM_BUFFERABLE
bool Use non-cacheable memory for DMA if CPU_V6  !CPU_V7
depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \
 MACH_REALVIEW_PB11MP)
default y if CPU_V6 || CPU_V7
help
  Historically, the kernel has used strongly ordered mappings to
  provide DMA coherent memory.  With the advent of ARMv7, mapping
  memory with differing types results in unpredictable behaviour,
  so on these CPUs, this option is forced on.

  Multiple mappings with differing attributes is also unpredictable
  on ARMv6 CPUs, but since they do not have aggressive speculative
  prefetch, no harm appears to occur.

  However, drivers may be missing the necessary barriers for ARMv6,
  and therefore turning this on may result in unpredictable driver
  behaviour.  Therefore, we offer this as an option.

  You are recommended say 'Y' here and debug any affected drivers.
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Mon, Dec 20, 2010 at 9:08 AM, John Rigby john.ri...@linaro.org wrote:
 Earlier in this thread Alexander said:
 I haven't add the definitions which are using a memory barrier because I 
 haven't found
 a place in the kernel where they were actually enabled
 (CONFIG_ARM_DMA_MEM_BUFFERABLE).

 I think this is the problem because it is indeed defined for all v6
 and v7 arm platforms.  Here is the config snippet from
 arch/arm/mm/Kconfig:

 config ARM_DMA_MEM_BUFFERABLE
        bool Use non-cacheable memory for DMA if CPU_V6  !CPU_V7
        depends on !(MACH_REALVIEW_PB1176 || REALVIEW_EB_ARM11MP || \
                     MACH_REALVIEW_PB11MP)
        default y if CPU_V6 || CPU_V7
        help
          Historically, the kernel has used strongly ordered mappings to
          provide DMA coherent memory.  With the advent of ARMv7, mapping
          memory with differing types results in unpredictable behaviour,
          so on these CPUs, this option is forced on.

On second thought maybe this is noise for us in u-boot without
cacheable mappings?  Sorry for the noise.

br,

John
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Mon, Dec 20, 2010 at 10:12 AM, Alexander Holler hol...@ahsoftware.de wrote:

 There must be more problems. Using gcc 4.5.1, the read*/write*-patch and
 your hack, my kernel doesn't boot. Using gcc 4.3.5 and the same source to
 compile u-boot the kernel comes up. Here is the output for the non-working
 u-boot:

 
 U-Boot 2010.12-rc3-00015-g3ae9687-dirty (Dec 20 2010 - 18:01:41, gcc 4.5.1)

 OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz
 OMAP3 Beagle board + LPDDR/NAND
 I2C:   ready
 DRAM:  256 MiB
 NAND:  256 MiB
 MMC:   OMAP SD/MMC: 0
 In:    serial
 Out:   serial
 Err:   serial
 Beagle Rev C4
 timed out in wait_for_pin: I2C_STAT=0
 No EEPROM on expansion board
 Die ID #062a0004040365fa16019019
 Hit any key to stop autoboot:  0
 reading boot.scr

 422 bytes read
 Running bootscript from mmc ...
 ## Executing script at 8200
 reading uImage

 2419940 bytes read
 Booting from mmc ...
 ## Booting kernel from Legacy Image at 8200 ...
   Image Name:   Linux-2.6.37-rc5-beagleboard-000
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2419876 Bytes = 2.3 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
 OK
 

 Nothing else.

 Regards,

 Alexander


Yes, you are correct, I see the same here with 4.5.2.  I noticed that
bd did not have correct values of machine type and boot params:

bd address  = 0x8FF24FE0
arch_number = 0xFF0084FF
boot_params = 0xBB2000FE
DRAM bank   = 0x
- start= 0x8000
- size = 0x0800
DRAM bank   = 0x0001
- start= 0x8800
- size = 0x0800
baudrate= 115200 bps
TLB addr= 0x8FFF
relocaddr   = 0x8FF85000
reloc off   = 0x0FF7D000
irq_sp  = 0x8FF24F68
sp start= 0x8FF24F60
FB base = 0x

If we then look at board_init in beagle.c the problem is obvious:

800331ac board_init:
800331ac:   e92d4008push{r3, lr}
800331b0:   ebff5a74bl  80009b88 gpmc_init
800331b4:   e3a0mov r0, #0
800331b8:   e5983000ldr r3, [r8]
800331bc:   e5983000ldr r3, [r8]
800331c0:   e8bd8008pop {r3, pc}

Here is with source mingled in:
800331ac board_init:
/*
 * Routine: board_init
 * Description: Early hardware init.
 */
int board_init(void)
{
800331ac:   e92d4008push{r3, lr}
DECLARE_GLOBAL_DATA_PTR;

gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
800331b0:   ebff5a74bl  80009b88 gpmc_init
gd-bd-bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
/* boot param addr */
gd-bd-bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);

return 0;
}
800331b4:   e3a0mov r0, #0
{
DECLARE_GLOBAL_DATA_PTR;

gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd-bd-bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;
800331b8:   e5983000ldr r3, [r8]
/* boot param addr */
gd-bd-bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
800331bc:   e5983000ldr r3, [r8]

return 0;
}
800331c0:   e8bd8008pop {r3, pc}

br,

John
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Mon, Dec 20, 2010 at 5:25 PM, John Rigby john.ri...@linaro.org wrote:
 On Mon, Dec 20, 2010 at 10:12 AM, Alexander Holler hol...@ahsoftware.de 
 wrote:

 There must be more problems. Using gcc 4.5.1, the read*/write*-patch and
 your hack, my kernel doesn't boot. Using gcc 4.3.5 and the same source to
 compile u-boot the kernel comes up. Here is the output for the non-working
 u-boot:

 
 U-Boot 2010.12-rc3-00015-g3ae9687-dirty (Dec 20 2010 - 18:01:41, gcc 4.5.1)

 OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 720 mHz
 OMAP3 Beagle board + LPDDR/NAND
 I2C:   ready
 DRAM:  256 MiB
 NAND:  256 MiB
 MMC:   OMAP SD/MMC: 0
 In:    serial
 Out:   serial
 Err:   serial
 Beagle Rev C4
 timed out in wait_for_pin: I2C_STAT=0
 No EEPROM on expansion board
 Die ID #062a0004040365fa16019019
 Hit any key to stop autoboot:  0
 reading boot.scr

 422 bytes read
 Running bootscript from mmc ...
 ## Executing script at 8200
 reading uImage

 2419940 bytes read
 Booting from mmc ...
 ## Booting kernel from Legacy Image at 8200 ...
   Image Name:   Linux-2.6.37-rc5-beagleboard-000
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2419876 Bytes = 2.3 MiB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
 OK
 

 Nothing else.

 Regards,

 Alexander


 Yes, you are correct, I see the same here with 4.5.2.  I noticed that
 bd did not have correct values of machine type and boot params:

 bd address  = 0x8FF24FE0
 arch_number = 0xFF0084FF
 boot_params = 0xBB2000FE
 DRAM bank   = 0x
 - start    = 0x8000
 - size     = 0x0800
 DRAM bank   = 0x0001
 - start    = 0x8800
 - size     = 0x0800
 baudrate    = 115200 bps
 TLB addr    = 0x8FFF
 relocaddr   = 0x8FF85000
 reloc off   = 0x0FF7D000
 irq_sp      = 0x8FF24F68
 sp start    = 0x8FF24F60
 FB base     = 0x

 If we then look at board_init in beagle.c the problem is obvious:

 800331ac board_init:
 800331ac:       e92d4008        push    {r3, lr}
 800331b0:       ebff5a74        bl      80009b88 gpmc_init
 800331b4:       e3a0        mov     r0, #0
 800331b8:       e5983000        ldr     r3, [r8]
 800331bc:       e5983000        ldr     r3, [r8]
 800331c0:       e8bd8008        pop     {r3, pc}


Apparently this is a known issue mentioned in README:

NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may optimize the code too much.


With this fix I can boot again:

diff --git a/board/ti/beagle/beagle.c b/board/ti/beagle/beagle.c
index d9b6f01..c066d6e 100644
--- a/board/ti/beagle/beagle.c
+++ b/board/ti/beagle/beagle.c
@@ -51,6 +51,8 @@

 #define BEAGLE_NO_EEPROM   0x

+DECLARE_GLOBAL_DATA_PTR;
+
 static struct {
unsigned int device_vendor;
unsigned char revision;
@@ -66,8 +68,6 @@ static struct {
  */
 int board_init(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd-bd-bi_arch_number = MACH_TYPE_OMAP3_BEAGLE;

Please let me know if you find any other problems.

br,

John
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[U-Boot] [PATCH] Move DECLARE_GLOBAL_DATA_PTR to file scope

[John Rigby]

It can be optimised out by the compiler otherwise resulting
in obscure errors like a board not booting.

This has been documented in README since 2006 when these were
first fixed up for GCC 4.x.

Signed-off-by: John Rigby john.ri...@linaro.org
---
 arch/arm/cpu/armv7/mx5/speed.c  |4 ++--
 arch/blackfin/cpu/serial.c  |3 ++-
 arch/m68k/cpu/mcf547x_8x/speed.c|4 ++--
 arch/sh/lib/board.c |4 ++--
 board/espt/espt.c   |4 ++--
 board/isee/igep0020/igep0020.c  |4 ++--
 board/isee/igep0030/igep0030.c  |4 ++--
 board/linkstation/linkstation.c |3 ++-
 board/logicpd/zoom1/zoom1.c |5 +++--
 board/logicpd/zoom2/zoom2.c |3 ++-
 board/mpr2/mpr2.c   |4 ++--
 board/ms7720se/ms7720se.c   |4 ++--
 board/ms7722se/ms7722se.c   |4 ++--
 board/ms7750se/ms7750se.c   |4 ++--
 board/overo/overo.c |4 ++--
 board/pandora/pandora.c |4 ++--
 board/renesas/MigoR/migo_r.c|4 ++--
 board/renesas/ap325rxa/ap325rxa.c   |4 ++--
 board/renesas/r2dplus/r2dplus.c |4 ++--
 board/renesas/r7780mp/r7780mp.c |4 ++--
 board/renesas/rsk7203/rsk7203.c |4 ++--
 board/renesas/sh7763rdp/sh7763rdp.c |4 ++--
 board/renesas/sh7785lcr/sh7785lcr.c |4 ++--
 board/samsung/smdk6400/smdk6400.c   |4 ++--
 board/ti/beagle/beagle.c|4 ++--
 board/ti/evm/evm.c  |4 ++--
 board/ti/sdp3430/sdp.c  |4 ++--
 drivers/i2c/omap24xx_i2c.c  |3 ++-
 drivers/serial/s3c64xx.c|3 ++-
 drivers/serial/serial_s5p.c |3 ++-
 drivers/serial/serial_sh.c  |5 +++--
 31 files changed, 64 insertions(+), 56 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/speed.c b/arch/arm/cpu/armv7/mx5/speed.c
index a444def..826b3b1 100644
--- a/arch/arm/cpu/armv7/mx5/speed.c
+++ b/arch/arm/cpu/armv7/mx5/speed.c
@@ -28,10 +28,10 @@
 #include asm/arch/imx-regs.h
 #include asm/arch/clock.h
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int get_clocks(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
-
 #ifdef CONFIG_FSL_ESDHC
gd-sdhc_clk = mxc_get_clock(MXC_IPG_PERCLK);
 #endif
diff --git a/arch/blackfin/cpu/serial.c b/arch/blackfin/cpu/serial.c
index 901cb97..650202e 100644
--- a/arch/blackfin/cpu/serial.c
+++ b/arch/blackfin/cpu/serial.c
@@ -42,6 +42,8 @@
 #include asm/blackfin.h
 #include asm/mach-common/bits/uart.h
 
+DECLARE_GLOBAL_DATA_PTR;
+
 #ifdef CONFIG_UART_CONSOLE
 
 #include serial.h
@@ -95,7 +97,6 @@ void serial_set_baud(uint32_t baud)
  */
 void serial_setbrg(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
serial_set_baud(gd-baudrate);
 }
 
diff --git a/arch/m68k/cpu/mcf547x_8x/speed.c b/arch/m68k/cpu/mcf547x_8x/speed.c
index 2cee488..31130b5 100644
--- a/arch/m68k/cpu/mcf547x_8x/speed.c
+++ b/arch/m68k/cpu/mcf547x_8x/speed.c
@@ -30,13 +30,13 @@
 
 #include asm/immap.h
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /*
  * get_clocks() fills in gd-cpu_clock and gd-bus_clk
  */
 int get_clocks(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
-
gd-bus_clk = CONFIG_SYS_CLK;
gd-cpu_clk = (gd-bus_clk * 2);
 
diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c
index fe53ab4..8f50b09 100644
--- a/arch/sh/lib/board.c
+++ b/arch/sh/lib/board.c
@@ -32,6 +32,8 @@
 #include miiphy.h
 #endif
 
+DECLARE_GLOBAL_DATA_PTR;
+
 extern int cpu_init(void);
 extern int board_init(void);
 extern int dram_init(void);
@@ -43,8 +45,6 @@ unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
 
 static int sh_flash_init(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
-
gd-bd-bi_flashsize = flash_init();
printf(FLASH: %ldMB\n, gd-bd-bi_flashsize / (1024*1024));
 
diff --git a/board/espt/espt.c b/board/espt/espt.c
index 2930858..44ab635 100644
--- a/board/espt/espt.c
+++ b/board/espt/espt.c
@@ -24,6 +24,8 @@
 #include asm/io.h
 #include asm/processor.h
 
+DECLARE_GLOBAL_DATA_PTR;
+
 int checkboard(void)
 {
puts(BOARD: ESPT-GIGA\n);
@@ -37,8 +39,6 @@ int board_init(void)
 
 int dram_init(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
-
gd-bd-bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd-bd-bi_memsize = CONFIG_SYS_SDRAM_SIZE;
printf(DRAM:  %dMB\n, CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c
index 3ba541e..36cc924 100644
--- a/board/isee/igep0020/igep0020.c
+++ b/board/isee/igep0020/igep0020.c
@@ -32,6 +32,8 @@
 #include asm/mach-types.h
 #include igep0020.h
 
+DECLARE_GLOBAL_DATA_PTR;
+
 /* GPMC definitions for LAN9221 chips */
 static const u32 gpmc_lan_config[] = {
 NET_LAN9221_GPMC_CONFIG1,
@@ -48,8 +50,6 @@ static const u32 gpmc_lan_config[] = {
  */
 int board_init(void)
 {
-   DECLARE_GLOBAL_DATA_PTR;
-
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
/* board id for Linux */
gd-bd-bi_arch_number = MACH_TYPE_IGEP0020;
diff --git a/board/isee

Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Sun, Dec 19, 2010 at 3:22 AM, Alexander Holler hol...@ahsoftware.de wrote:
 side effects here. Reading NAND now fails on my BeagleBoard. Regardless
 if I use gcc 4.3.5 or gcc 4.5.1, after applying that patch the wrong ID
 of the NAND is read. In nand_get_flash_type()
 (drivers/mtd/nand/nand_base.c) without that patch I will get the following:

 *maf_id: 44, dev_id: 186

 with the patch the following is read:

 *maf_id: 128, dev_id: 85
The nand_get_flash_type routine reads these id's twice and compares
them.  Do your see an error message like this?

second ID read did not match


 Which just is wrong.

 I haven't looked further up to now, maybe thats just a side effect of
 some wrong clock settings because of different timings through those
 barrieres or whatever.

 Regards,

 Alexander
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Sun, Dec 19, 2010 at 12:59 PM, Alexander Holler hol...@ahsoftware.de wrote:
...
 No EEPROM on expansion board
 Die ID #062a0004040365fa16019019
 Hit any key to stop autoboot:  0
 OMAP3 beagleboard.org # nand info

 Device 0: nand0, sector size 16 KiB
 

I get the same output  without your change.  My gcc is linaro 4.4.5.
I'll do some bisecting and try to find out what is going on.
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Sun, Dec 19, 2010 at 5:56 PM, Alexander Holler hol...@ahsoftware.de wrote:
 Am 20.12.2010 01:39, schrieb John Rigby:

 On Sun, Dec 19, 2010 at 12:59 PM, Alexander Hollerhol...@ahsoftware.de
  wrote:
 ...

 No EEPROM on expansion board
 Die ID #062a0004040365fa16019019
 Hit any key to stop autoboot:  0
 OMAP3 beagleboard.org # nand info

 Device 0: nand0, sector size 16 KiB
 

 I get the same output  without your change.  My gcc is linaro 4.4.5.
 I'll do some bisecting and try to find out what is going on.

 Bisecting won't help you here. Not if the problem was always there (which is
 what I assume
Sorry, I was confused about my results.

If I replace include asm/io.h in drivers/mtd/nand/omap_gpmc.c with a
copy of the original called orig_io.h:
#include orig_io.h

Nand starts working again.  So the problem seems to be isolated to this file.

 Regards,

 Alexander

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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Sun, Dec 19, 2010 at 9:18 PM, John Rigby john.ri...@linaro.org wrote:
 On Sun, Dec 19, 2010 at 5:56 PM, Alexander Holler hol...@ahsoftware.de 
 wrote:
 Am 20.12.2010 01:39, schrieb John Rigby:

 On Sun, Dec 19, 2010 at 12:59 PM, Alexander Hollerhol...@ahsoftware.de
  wrote:
 ...

 No EEPROM on expansion board
 Die ID #062a0004040365fa16019019
 Hit any key to stop autoboot:  0
 OMAP3 beagleboard.org # nand info

 Device 0: nand0, sector size 16 KiB
 

 I get the same output  without your change.  My gcc is linaro 4.4.5.
 I'll do some bisecting and try to find out what is going on.

 Bisecting won't help you here. Not if the problem was always there (which is
 what I assume
 Sorry, I was confused about my results.

 If I replace include asm/io.h in drivers/mtd/nand/omap_gpmc.c with a
 copy of the original called orig_io.h:
 #include orig_io.h

 Nand starts working again.  So the problem seems to be isolated to this file.

 Regards,

 Alexander



With your patch and the following hack nand works:


diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..5e94155 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -29,6 +29,8 @@
 #include linux/mtd/nand_ecc.h
 #include nand.h

+#define origwriteb(v,a)__arch_putb(v,a)
+
 static uint8_t cs;
 static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;

@@ -58,7 +60,7 @@ static void omap_nand_hwcontrol(struct mtd_info
*mtd, int32_t cmd,
}

if (cmd != NAND_CMD_NONE)
-   writeb(cmd, this-IO_ADDR_W);
+   origwriteb(cmd, this-IO_ADDR_W);
 }

 /*

The working assembly looks like this:

if (cmd != NAND_CMD_NONE)
80024d28:   e3710001cmn r1, #1
origwriteb(cmd, this-IO_ADDR_W);
80024d2c:   15933004ldrne   r3, [r3, #4]
80024d30:   120110ffandne   r1, r1, #255; 0xff
80024d34:   15c31000strbne  r1, [r3]
80024d38:   e8bd8010pop {r4, pc}

The broken assembly looks like this:

if (cmd != NAND_CMD_NONE)
80024d28:   e3710001cmn r1, #1
80024d2c:   08bd8010popeq   {r4, pc}
writeb(cmd, this-IO_ADDR_W);
80024d30:   e5933004ldr r3, [r3, #4]
80024d34:   e20110ffand r1, r1, #255; 0xff
80024d38:   e5c31000strbr1, [r3]
80024d3c:   e5d33000ldrbr3, [r3]
80024d40:   e8bd8010pop {r4, pc}

This is with gcc version (Ubuntu/Linaro 4.4.4-14ubuntu4) 4.4.5.
I'll try a 4.5.2 version next and see what happens.

br,

John
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Re: [U-Boot] [PATCH 5/5] MX5:MX53: add initial support for MX53EVK board

[John Rigby]

On Sun, Dec 19, 2010 at 10:19 PM, Jason Liu liu.h.ja...@gmail.com wrote:
 Hi, Stefano,

 2010/12/17 Stefano Babic sba...@denx.de:
 On 12/17/2010 04:05 AM, Jason Liu wrote:
 There is pretty much different with I.MX51 ROM,  we will not use DCD
 data file to config the
 DDR script since ROM has the DCD size limitation and use the advance
 feature of what we
 called plug-in,  the plug-in code must be in the first 2K of MMC card
 from 0x400 offset, that's
 why we need put this code section before start.S. The plug-in code
 will be called by boot ROM
 to do DDR init first and copy u-boot to DDR and jump to _start  to run it.

 As I am not understanding what you mean as plugin, it seems to me you
 need some code able to set-up RAM and copy the u-boot code. This method
 looks like very similar to other SoCs, where a first stage boot loader
 is needed or when we boot from NAND.

 Forget about the case about boot From NAND, we are talking about boot
 from SD/MMC card here.
 Why I call it hereplug-in, it due to it use the plugin feature of ROM.

 This section of code is for ROM to load and run, thus it should meet
 the ROM boot structure requirement.
 The plugin feature of ROM can give more flexibility and it can
 overcome some shortcomings of DCD(used on mx51).

 By using this plugin we can get around the following issues:
 1.      DCD size limitation issue, plugin can be the size of OCRAM free space 
 region.
 2.      Safe environment to re-configure PLL1 (without impacting SDRAM) as
 the plugin runs from OCRAM.



Jason:
No one is arguing about the use the plugin feature.  The objection is
to how you are getting the plugin bits into the u-boot image.  You
should use a tool to prepend the plugins to the u-boot.bin file in a
similar way to how mkimage is used for i.mx51 and others.

Stefano:
I know Freescale has a binary to do this but I don't believe the
source is available.  The binary is included as a package in the
i.mx28 BSP as well as some sample plugins.

You can find your way to the i.mx28 page by googling
site:freescale.com i.mx28 BSP and following the top most hit.  You
have to register to download the BSP.

Once you download the BSP you will find a source archive called
L2.6.31_10.08.01_SDK_source.tar.gz.

The sample plugin package is in the archive in a file called
L2.6.31_10.08.01_SDK_source/pkgs/imx-bootlets-src-10.08.01.tar.gz.  I
guess bootlets are another name for plugins.

The binary utility for creating bootlets from elf files is called
elftosb-0.4.tar.bz2 in the same archive.  The utility appears to be a
typical over engineered c++ pile of stuff.  One would think that you
could accomplish the same thing with objdump, and a patch to mkimage.

Chapter 12 of the i.mx28 Technical Reference Manual describes this, I
have not seen a doc for i.mx53 yet and am just assuming that it is the
same as i.mx28.
http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf

br,

John
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Re: [U-Boot] [RFC PATCH v2] ARM: Avoid compiler optimization for usages of readb, writeb and friends.

[John Rigby]

On Sun, Dec 19, 2010 at 11:49 PM, Dirk Behme dirk.be...@googlemail.com wrote:
 On 20.12.2010 07:07, John Rigby wrote:
 The working assembly looks like this:

        if (cmd != NAND_CMD_NONE)
 80024d28:       e3710001        cmn     r1, #1
                origwriteb(cmd, this-IO_ADDR_W);
 80024d2c:       15933004        ldrne   r3, [r3, #4]
 80024d30:       120110ff        andne   r1, r1, #255    ; 0xff
 80024d34:       15c31000        strbne  r1, [r3]
 80024d38:       e8bd8010        pop     {r4, pc}

 The broken assembly looks like this:

        if (cmd != NAND_CMD_NONE)
 80024d28:       e3710001        cmn     r1, #1
 80024d2c:       08bd8010        popeq   {r4, pc}
                writeb(cmd, this-IO_ADDR_W);
 80024d30:       e5933004        ldr     r3, [r3, #4]
 80024d34:       e20110ff        and     r1, r1, #255    ; 0xff
 80024d38:       e5c31000        strb    r1, [r3]
 80024d3c:       e5d33000        ldrb    r3, [r3]
 80024d40:       e8bd8010        pop     {r4, pc}

 Hmm. From functionality point of view, the 'broken' assembly below should to
 the same as the working assembly, above. The main difference is the 'popeq
 {r4, pc}' and the additional 'ldrb      r3, [r3]'. The write to the HW 'strb
    r1, [r3]' is there, so it should work. Is this understanding correct?

 If it's correct, the question is, what breaks the below assembly? The popeq
 or the additional ldrb? The popeq looks correct, but why is the additional
 ldrb there?


I can't answer why the ldrb is there but I'm pretty sure it is the
problem.  From the TRM
http://focus.ti.com/lit/ug/spruf98m/spruf98m.pdf:

Only write accesses must be issued to these locations, but the GPMC
does not discard any read access. Accessing a NAND device with nOE and
CLE or ALE asserted (read access) can produce undefined results.

br,
John
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Re: [U-Boot] [RFC PATCH] OMAP: Timer: Replace bss variable by gd

[John Rigby]

On Thu, Dec 9, 2010 at 9:31 AM, Dirk Behme dirk.be...@googlemail.com wrote:
 Reuse the gd-tbl value for timestamp and add gd-lastinc for lastinc bss
 values in the OMAP timer driver.

 The usage of bss values in drivers before initialisation of bss is forbidden.
 In that special case some data in .rel.dyn gets corrupted.

 Signed-off-by: Dirk Behme dirk.be...@gmail.com

Works for me on Beagle xM Rev A

Tested-by: John Rigby john.ri...@linaro.org
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Re: [U-Boot] [STATUS] v2010.12-rc2 released

[John Rigby]

On Tue, Nov 30, 2010 at 8:00 AM, Wolfgang Denk w...@denx.de wrote:
 Hello everybody.

 I apologise for being a bit late with this announcement:

 * U-Boot v2010.12-rc2 was released on Sunday, November 28.

 * Release v2010.12 is (still) scheduled in 13 days:
  on December 13, 2010.

 Please help testing, and check if all your relevant patches have been
 included.


I have verified ca9x4_ct_vxp builds cleanly if the following patches are
applied:

ARMV7: Vexpress build errors
http://lists.denx.de/pipermail/u-boot/2010-November/081033.html
ARMV7: Vexpress compile warnings
http://lists.denx.de/pipermail/u-boot/2010-November/081034.html
ARMV7:ca9x4_ct_vxp: udelay reference fix
http://patchwork.ozlabs.org/patch/73478/

John
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Re: [U-Boot] [PATCH 1/2] imx: Get fec mac address from fuse

[John Rigby]

On Wed, Oct 27, 2010 at 5:21 AM, Jason Liu liu.h.ja...@gmail.com wrote:
 Hi, Stefano,

 2010/10/27 Stefano Babic sba...@denx.de:
 On 10/27/2010 09:40 AM, Jason Liu wrote:

 Yes, I haved looked it before and I also tested this patch on
 MX51babbage 3.0 board. It will printting some confusing information
 with floating value of MAC address when the board boot up after you
 set the ethaddr enviorment. The reason is that, when it first call
 fec_init, the eth address of dev is not intialized and then it using
 the floating memory value.

 Dropping the call is not the solution and works only on the MX51 if the
 MAC is set into the fuse. Even on the MX51, this is not a general case:

 FSL will program all the fuse with MAC address before shipping every chip.
 This applies to all the i.mx family including imx25/35/51/53/50.

 it should be always possible to set the ethaddr via the environment
 without using the fuse.

 Yes, without call this function, the ethaddr evnviroment still working.
 It will use the MAC set via ethaddr instead of  the mac from FUSE. Net
 framework will do it.


 As sure, you should at least see a Warning : MAC addresses don't match
 if the ethaddr is set to a different value as in the fuse.

 However, I do not yet understand why the address is not set: fec_probe
 is called before doing something on the network and at this point the
 address should be set from fuse.

 I have tested it and it's no need to add this function call. You can
 test it and see the result.


 Best regards,
 Stefano Babic

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 Phone: +49-8142-66989-0 Fax: +49-8142-66989-80  Email: off...@denx.de
 

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The patch fixes the particular case where you have no ethaddr in fuse,
nor persistent env.  The case is a board where the only persistent
storage is an SD card and you set load a boot script from file in a
FAT partition that has a setenv ethaddr in it.  The other case is if a
user sets the ethaddr at the command line it will not take effect
until reboot in the case of persistent env or never in the case of no
persistent env.
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Re: [U-Boot] [PATCH 1/2] imx: Get fec mac address from fuse

[John Rigby]

On Wed, Oct 27, 2010 at 2:06 PM, Wolfgang Denk w...@denx.de wrote:
 Dear John,

 In message aanlktikmzvasvw1wtwg7od9qyeaphhwdbc+3ox5ak...@mail.gmail.com you 
 wrote:

 The patch fixes the particular case where you have no ethaddr in fuse,
 nor persistent env.  The case is a board where the only persistent
 storage is an SD card and you set load a boot script from file in a

 Well, if ther eis no MAC address in the fuse, and there is no
 ethaddr setting in the current environment, then nothing should
 happen until you try to run the first network command, at wich point
 the command should fail because the MAC address is unset.

 FAT partition that has a setenv ethaddr in it.  The other case is if a
 user sets the ethaddr at the command line it will not take effect
 until reboot in the case of persistent env or never in the case of no
 persistent env.

 This is broken behaviour; in this case, the network driver needs to be
 fixed. The driver initialization takes place when you start a network
 command, and it should pick up the MAC address setting then, mo matter
 if this was permanently stored or just entered on the command line.
Thanks for saying this because this is exactly what my original patch
fixes.  So the fix should stay.

 Best regards,

 Wolfgang Denk

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 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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