[PATCH 1/1] sunxi: sun4i: Introduce KConfig option SPL_SYS_CLK_FREQ
This option can be used to modify the initial SPL
CPU clock frequency.
This follows an earlier discussion regarding A20
CPUs dying after reboot in SPL initialization due to
incompatible CPU clock frequency and core voltage. [1]
First attempt was to update PLL1_CFG_DEFAULT to a fixed
lower frequency (144MHz), which fixed the observed issue
but might not suit all A20 users. A KConfig option
should be the better solution.
[1]
https://lists.denx.de/pipermail/u-boot/2024-January/544897.html
Signed-off-by: Ludwig Kormann
---
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 4
arch/arm/mach-sunxi/Kconfig | 8
arch/arm/mach-sunxi/clock_sun4i.c | 11 ++-
3 files changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 2cec91cb20..11b350824e 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -134,12 +134,16 @@ struct sunxi_ccm_reg {
#define CCM_PLL1_CFG_PLL4_EXCH_SHIFT 25
#define CCM_PLL1_CFG_BIAS_CUR_SHIFT20
#define CCM_PLL1_CFG_DIVP_SHIFT16
+#define CCM_PLL1_CFG_DIVP_MASK (0x3 << CCM_PLL1_CFG_DIVP_SHIFT)
#define CCM_PLL1_CFG_LCK_TMR_SHIFT 13
#define CCM_PLL1_CFG_FACTOR_N_SHIFT8
+#define CCM_PLL1_CFG_FACTOR_N_MASK (0x1f <<
CCM_PLL1_CFG_FACTOR_N_SHIFT)
#define CCM_PLL1_CFG_FACTOR_K_SHIFT4
+#define CCM_PLL1_CFG_FACTOR_K_MASK (0x3 <<
CCM_PLL1_CFG_FACTOR_K_SHIFT)
#define CCM_PLL1_CFG_SIG_DELT_PAT_IN_SHIFT 3
#define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT 2
#define CCM_PLL1_CFG_FACTOR_M_SHIFT0
+#define CCM_PLL1_CFG_FACTOR_M_MASK (0x3 <<
CCM_PLL1_CFG_FACTOR_M_SHIFT)
#define PLL1_CFG_DEFAULT 0xa1005000
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index fe89aec6b9..85e3a26855 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -705,6 +705,14 @@ config SYS_CLK_FREQ
default 100800 if MACH_SUN50I_H616
default 100800 if MACH_SUN8I_R528
+if MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
+config SPL_SYS_CLK_FREQ
+ int "sunxi SPL CPU clock frequency"
+ default 384
+ ---help---
+ A static value for the sunxi SPL CPU frequency, must be a multiple of 24.
+endif
+
config SYS_CONFIG_NAME
default "suniv" if MACH_SUNIV
default "sun4i" if MACH_SUN4I
diff --git a/arch/arm/mach-sunxi/clock_sun4i.c
b/arch/arm/mach-sunxi/clock_sun4i.c
index 8f1d1b65f0..04623c1d09 100644
--- a/arch/arm/mach-sunxi/clock_sun4i.c
+++ b/arch/arm/mach-sunxi/clock_sun4i.c
@@ -25,7 +25,16 @@ void clock_init_safe(void)
APB0_DIV_1 << APB0_DIV_SHIFT |
CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
- writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg);
+ writel((PLL1_CFG_DEFAULT &
+ ~(CCM_PLL1_CFG_FACTOR_N_MASK |
+ CCM_PLL1_CFG_FACTOR_K_MASK |
+ CCM_PLL1_CFG_FACTOR_M_MASK |
+ CCM_PLL1_CFG_DIVP_MASK)) |
+ (CONFIG_SPL_SYS_CLK_FREQ / 24) << CCM_PLL1_CFG_FACTOR_N_SHIFT |
+ 0 << CCM_PLL1_CFG_FACTOR_K_SHIFT |
+ 0 << CCM_PLL1_CFG_FACTOR_M_SHIFT |
+ 0 << CCM_PLL1_CFG_DIVP_SHIFT,
+ &ccm->pll1_cfg);
sdelay(200);
writel(AXI_DIV_1 << AXI_DIV_SHIFT |
AHB_DIV_2 << AHB_DIV_SHIFT |
--
2.39.2
[PATCH 1/1] sunxi: sun4i: add missing sdelay() to clock_init_safe()
This delay is required after switching the clock source. See “A20 Reference manual v1.4” Page 50 / section “1.5.4.16. CPU/AHB/APB0 CLOCK RATIO”: “If the clock source is changed, at most to wait for 8 present running clock cycles.” This is already implemented in clock_set_pll1(), but was still missing in clock_init_safe(). Signed-off-by: Ludwig Kormann --- arch/arm/mach-sunxi/clock_sun4i.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-sunxi/clock_sun4i.c b/arch/arm/mach-sunxi/clock_sun4i.c index 8f1d1b65f0..ac3b7a801f 100644 --- a/arch/arm/mach-sunxi/clock_sun4i.c +++ b/arch/arm/mach-sunxi/clock_sun4i.c @@ -25,6 +25,7 @@ void clock_init_safe(void) APB0_DIV_1 << APB0_DIV_SHIFT | CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT, &ccm->cpu_ahb_apb0_cfg); + sdelay(20); writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg); sdelay(200); writel(AXI_DIV_1 << AXI_DIV_SHIFT | @@ -32,6 +33,7 @@ void clock_init_safe(void) APB0_DIV_1 << APB0_DIV_SHIFT | CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, &ccm->cpu_ahb_apb0_cfg); + sdelay(20); #ifdef CONFIG_MACH_SUN7I setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA); #endif -- 2.39.2
Re: [PATCH 1/1] sunxi: sun4i: Reduce cpu clock at SPL initialization to 144 MHz
Hi Andre,
thanks for your feedback!
Am 31.01.24 um 13:36 schrieb Andre Przywara:
On Wed, 31 Jan 2024 11:49:43 +0100
Ludwig Kormann wrote:
Hi Ludwig,
thanks for taking care and sending a patch, though I scratch my head about
this a bit. My main concern is why this would be an issue *now*, 11 years
after the A20's release, and with tons of boards out there in operation.
Also 144 MHz seem a somewhat drastic reduction?
We began seeing this issue beginning in early 2023 and it seems to affect
only a very small percentage of the units. We had to introduce this
patch for
our customers and wanted to also share it with the community.
Up until now cpu clock gets initialized at 384 MHz, which is
the highest supported cpu clock.
What do you mean with "highest supported"? Surely the A20 goes up to
960 MHz?
You're right, I must have mixed something up there.
Also please note that 384 MHz is the PLL1 reset configuration, so it's not
something we came up with, but probably some safe value that Allwinner
burned into their chips.
Recent A20 batches show an increased percentage of modules
reacting very sensitive to operating conditions outside the
specifications.
What are those specifications, exactly? Do you have any more reliable
data? The datasheet is very quiet on those conditions, it seems.
In particular, I couldn't find any official frequency/voltage
combinations, it seems like the values in the DTs are just passed on from
some BSP drop?
Yes, it's hard/impossible to find any reliable information on this.
Our main reference have been the values in the DTs.
The cpu dies very shortly after PLLs, core frequency or cpu
voltage are missconfigured. E.g.:
- uboot SPL selects 384 MHz as cpu clock which requires a cpu
voltage of at least 1.1 V.
- Linux CPU Frequency scaling with most sun7i dts will reduce
cpu voltage down to 1.0 V.
How so? The mainline DT suggests 1.1V for anything above 312 MHz, and
even above 144 MHz for the BananaPi. Are you using any OPs that differ
from that?
- When intiating a reboot or reset from linux the cpu voltage
may keep the 1.0 V configuration and the cpu dies during SPL
initialization.
Ah, so you mean we run (in Linux) on a 1.0V OP, probably at a very low CPU
frequency, and then the CPU cores reset, leaving the PMIC at 1.0V? And
then the SPL programs 384 MHz, which is too high, even for the brief period
until we program DCDC2 to 1.4V?
Yes, the CPU dies before the voltage gets updated.
If you have evidence (those "newer batches"? A20 batches in 2024?) for
that, what about 312 MHz? Does that work?
The batches are actually from 2022+. We went for 144MHz as it's the lowest
of the "default" speeds, that also ensures we're "low enough" to (hopefully)
never trigger the issue again.
It seems like there's some variation in A20 production that triggers the
issue
and as we don't know any "official" voltage/frequency limits it's better
to have
some safety margin.
Therefore reduce cpu clock at uboot SPL initialization down
to 144 MHz from 384 MHz.
I am bit concerned about slowing down the initial SPL phase that much, for
*all* A20 users. We run the DRAM init with that initial clock, even though
the voltage is already up at this point.
In my opinion the impact / additional delay for the initial SPL phase
should not
be in a very relevant range actually, as it usually only takes a few
hundred milliseconds.
But you're right of course, this would force the lower value onto all
A20 users.
So if you see issues with those "newer batches" only(?), and since I
haven't heard about any issues about that before, can we make this a
Kconfig choice? We could make it simple, forcing K to 1, so we just need
to divide the frequency by 24 and shift by 8 to get to the register value?
I will try to look into this and provide an update.
Signed-off-by: Ludwig Kormann
---
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 2 +-
arch/arm/mach-sunxi/clock_sun4i.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 2cec91cb20..252c4c693e 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -141,7 +141,7 @@ struct sunxi_ccm_reg {
#define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT2
#define CCM_PLL1_CFG_FACTOR_M_SHIFT 0
-#define PLL1_CFG_DEFAULT 0xa1005000
+#define PLL1_CFG_DEFAULT 0xa1004c01
#if defined CONFIG_OLD_SUNXI_KERNEL_COMPAT && defined CONFIG_MACH_SUN5I
/*
diff --git a/arch/arm/mach-sunxi/clock_sun4i.c
b/arch/arm/mach-sunxi/clock_sun4i.c
index 8f1d1b65f0..ac3b7a801f 100644
--- a/arch/arm/mach-sunxi/clock_sun4i.c
+++ b/arch/arm/mach-sunxi/clock_sun4i.c
@@ -25,6 +25,7 @@ void clock_init_safe(void)
APB0_DIV_1 &l
[PATCH 1/1] sunxi: sun4i: Reduce cpu clock at SPL initialization to 144 MHz
Up until now cpu clock gets initialized at 384 MHz, which is
the highest supported cpu clock.
Recent A20 batches show an increased percentage of modules
reacting very sensitive to operating conditions outside the
specifications.
The cpu dies very shortly after PLLs, core frequency or cpu
voltage are missconfigured. E.g.:
- uboot SPL selects 384 MHz as cpu clock which requires a cpu
voltage of at least 1.1 V.
- Linux CPU Frequency scaling with most sun7i dts will reduce
cpu voltage down to 1.0 V.
- When intiating a reboot or reset from linux the cpu voltage
may keep the 1.0 V configuration and the cpu dies during SPL
initialization.
Therefore reduce cpu clock at uboot SPL initialization down
to 144 MHz from 384 MHz.
Signed-off-by: Ludwig Kormann
---
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 2 +-
arch/arm/mach-sunxi/clock_sun4i.c | 2 ++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
index 2cec91cb20..252c4c693e 100644
--- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
+++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h
@@ -141,7 +141,7 @@ struct sunxi_ccm_reg {
#define CCM_PLL1_CFG_SIG_DELT_PAT_EN_SHIFT 2
#define CCM_PLL1_CFG_FACTOR_M_SHIFT0
-#define PLL1_CFG_DEFAULT 0xa1005000
+#define PLL1_CFG_DEFAULT 0xa1004c01
#if defined CONFIG_OLD_SUNXI_KERNEL_COMPAT && defined CONFIG_MACH_SUN5I
/*
diff --git a/arch/arm/mach-sunxi/clock_sun4i.c
b/arch/arm/mach-sunxi/clock_sun4i.c
index 8f1d1b65f0..ac3b7a801f 100644
--- a/arch/arm/mach-sunxi/clock_sun4i.c
+++ b/arch/arm/mach-sunxi/clock_sun4i.c
@@ -25,6 +25,7 @@ void clock_init_safe(void)
APB0_DIV_1 << APB0_DIV_SHIFT |
CPU_CLK_SRC_OSC24M << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
+ sdelay(20);
writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg);
sdelay(200);
writel(AXI_DIV_1 << AXI_DIV_SHIFT |
@@ -32,6 +33,7 @@ void clock_init_safe(void)
APB0_DIV_1 << APB0_DIV_SHIFT |
CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT,
&ccm->cpu_ahb_apb0_cfg);
+ sdelay(20);
#ifdef CONFIG_MACH_SUN7I
setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA);
#endif
--
2.39.2
[PATCH v4 1/1] arm: dts: icnova-a20-adb4006: Add board support
Add board support for ICnova A20 SomPi compute module on ICnova ADB4006 development board. Specification: SoM - Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz - 512MB DDR3 RAM - Fast Ethernet (Phy: Realtek RTL8201CP) ADB4006 - I2C - 2x USB 2.0 - 1x Fast Ethernet port - 1x SATA - 2x buttons (PWRON, Boot) - 2x LEDS - serial console - HDMI - µSD-Card slot - Audio Line-In / Line-Out - GPIO pinheaders https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006 https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM devicetree upstreamed with linux 6.5 Signed-off-by: Ludwig Kormann --- changes in v4: - rebase on master - add CONFIG_SYS_64BIT_LBA - drop dts from patch, already upstreamed changes in v3: - rebase on v2023.10 changes in v2: - rebase on v2023.07-rc2 - remove pin defines from defconfig - get dts reviewed on the linux mailing list and scheduled for kernel 6.5 [1] [1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git commit de2bdfb7f79d5c655eb056d459e02be2c7f13c8b --- arch/arm/dts/Makefile| 1 + board/sunxi/MAINTAINERS | 5 + configs/icnova-a20-adb4006_defconfig | 21 + 3 files changed, 27 insertions(+) create mode 100644 configs/icnova-a20-adb4006_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 55aceb51cd..d947b8de56 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -693,6 +693,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-haoyu-marsboard.dtb \ sun7i-a20-hummingbird.dtb \ sun7i-a20-i12-tvbox.dtb \ + sun7i-a20-icnova-a20-adb4006.dtb \ sun7i-a20-icnova-swac.dtb \ sun7i-a20-itead-ibox.dtb \ sun7i-a20-lamobo-r1.dtb \ diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 4bbe3f62fa..0061437211 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -236,6 +236,11 @@ M: Stefan Roese S: Maintained F: configs/icnova-a20-swac_defconfig +ICnova-A20-ADB4006 BOARD +M: Ludwig Kormann +S: Maintained +F: configs/icnova-a20-adb4006_defconfig + ITEAD IBOX BOARD M: Marcus Cooper S: Maintained diff --git a/configs/icnova-a20-adb4006_defconfig b/configs/icnova-a20-adb4006_defconfig new file mode 100644 index 00..22cbb612e3 --- /dev/null +++ b/configs/icnova-a20-adb4006_defconfig @@ -0,0 +1,21 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-icnova-a20-adb4006" +CONFIG_SPL=y +CONFIG_MACH_SUN7I=y +CONFIG_DRAM_CLK=384 +CONFIG_AHCI=y +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +CONFIG_SPL_I2C=y +CONFIG_SCSI_AHCI=y +CONFIG_SYS_64BIT_LBA=y +CONFIG_SYS_I2C_MVTWSI=y +CONFIG_SYS_I2C_SLAVE=0x7f +CONFIG_SYS_I2C_SPEED=40 +CONFIG_ETH_DESIGNWARE=y +CONFIG_MII=y +CONFIG_SUN7I_GMAC=y +CONFIG_AXP_ALDO4_VOLT=2800 +CONFIG_SCSI=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y -- 2.30.2
Re: [PATCH RESEND v3 1/1] arm: dts: icnova-a20-adb4006: Add board support
Hello Andre,
thanks for the update! I will send the updated patch today.
kind regards
Ludwig
Am 25.10.23 um 00:26 schrieb Andre Przywara:
On Mon, 9 Oct 2023 13:39:16 +0200
Ludwig Kormann wrote:
Hi Ludwig,
Add board support for ICnova A20 SomPi compute module on
ICnova ADB4006 development board.
Specification:
SoM
- Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz
- 512MB DDR3 RAM
- Fast Ethernet (Phy: Realtek RTL8201CP)
ADB4006
- I2C
- 2x USB 2.0
- 1x Fast Ethernet port
- 1x SATA
- 2x buttons (PWRON, Boot)
- 2x LEDS
- serial console
- HDMI
- µSD-Card slot
- Audio Line-In / Line-Out
- GPIO pinheaders
https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006
https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
devicetree upstreamed with linux 6.5
As you have probably seen, the DT files have been synced into U-Boot's
master branch yesterday.
So if you rebase this on top of master, so just send the defconfig
(with CONFIG_SYS_64BIT_LBA added) and the Makefile change in a new
patch, I am happy to take it still this cycle.
Cheers,
Andre
thanks for the update! I will send the updated patch today.
kind regards
Ludwig
Signed-off-by: Ludwig Kormann
---
changes in v3:
- rebase on v2023.10
changes in v2:
- rebase on v2023.07-rc2
- remove pin defines from defconfig
- get dts reviewed on the linux mailing list and
scheduled for kernel 6.5 [1]
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
commit de2bdfb7f79d5c655eb056d459e02be2c7f13c8b
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts | 137 ++
arch/arm/dts/sun7i-a20-icnova-a20.dtsi| 62
board/sunxi/MAINTAINERS | 5 +
configs/icnova-a20-adb4006_defconfig | 20 +++
5 files changed, 225 insertions(+)
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20.dtsi
create mode 100644 configs/icnova-a20-adb4006_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157..16d5930b78 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -667,6 +667,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-haoyu-marsboard.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
+ sun7i-a20-icnova-a20-adb4006.dtb \
sun7i-a20-icnova-swac.dtb \
sun7i-a20-itead-ibox.dtb \
sun7i-a20-lamobo-r1.dtb \
diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
new file mode 100644
index 00..577ead1d02
--- /dev/null
+++ b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// Copyright (C) 2023 In-Circuit GmbH
+
+/dts-v1/;
+
+#include "sun7i-a20-icnova-a20.dtsi"
+
+#include
+#include
+
+/ {
+ model = "In-Circuit ICnova A20 ADB4006";
+ compatible = "incircuit,icnova-a20-adb4006", "incircuit,icnova-a20",
+"allwinner,sun7i-a20";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = ;
+ gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */
+ default-state = "on";
+ };
+
+ led-1 {
+ function = LED_FUNCTION_HEARTBEAT;
+ color = ;
+ gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&ahci {
+ target-supply = <®_ahci_5v>;
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
+ status = "okay";
+};
+
+&ohci0 {
+ status =
[PATCH RESEND v3 1/1] arm: dts: icnova-a20-adb4006: Add board support
Add board support for ICnova A20 SomPi compute module on
ICnova ADB4006 development board.
Specification:
SoM
- Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz
- 512MB DDR3 RAM
- Fast Ethernet (Phy: Realtek RTL8201CP)
ADB4006
- I2C
- 2x USB 2.0
- 1x Fast Ethernet port
- 1x SATA
- 2x buttons (PWRON, Boot)
- 2x LEDS
- serial console
- HDMI
- µSD-Card slot
- Audio Line-In / Line-Out
- GPIO pinheaders
https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006
https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
devicetree upstreamed with linux 6.5
Signed-off-by: Ludwig Kormann
---
changes in v3:
- rebase on v2023.10
changes in v2:
- rebase on v2023.07-rc2
- remove pin defines from defconfig
- get dts reviewed on the linux mailing list and
scheduled for kernel 6.5 [1]
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
commit de2bdfb7f79d5c655eb056d459e02be2c7f13c8b
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts | 137 ++
arch/arm/dts/sun7i-a20-icnova-a20.dtsi| 62
board/sunxi/MAINTAINERS | 5 +
configs/icnova-a20-adb4006_defconfig | 20 +++
5 files changed, 225 insertions(+)
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20.dtsi
create mode 100644 configs/icnova-a20-adb4006_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 85fd5b1157..16d5930b78 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -667,6 +667,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-haoyu-marsboard.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
+ sun7i-a20-icnova-a20-adb4006.dtb \
sun7i-a20-icnova-swac.dtb \
sun7i-a20-itead-ibox.dtb \
sun7i-a20-lamobo-r1.dtb \
diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
new file mode 100644
index 00..577ead1d02
--- /dev/null
+++ b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// Copyright (C) 2023 In-Circuit GmbH
+
+/dts-v1/;
+
+#include "sun7i-a20-icnova-a20.dtsi"
+
+#include
+#include
+
+/ {
+ model = "In-Circuit ICnova A20 ADB4006";
+ compatible = "incircuit,icnova-a20-adb4006", "incircuit,icnova-a20",
+"allwinner,sun7i-a20";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = ;
+ gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */
+ default-state = "on";
+ };
+
+ led-1 {
+ function = LED_FUNCTION_HEARTBEAT;
+ color = ;
+ gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&ahci {
+ target-supply = <®_ahci_5v>;
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&otg_sram {
+ status = "okay";
+};
+
+®_ahci_5v {
+ status = "okay";
+};
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_usb1_vbus {
+ status = "okay";
+};
+
+®_usb2_vbus {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&am
[PATCH v2 1/1] arm: dts: icnova-a20-adb4006: Add board support
Add board support for ICnova A20 SomPi compute module on
ICnova ADB4006 development board.
Specification:
SoM
- Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz
- 512MB DDR3 RAM
- Fast Ethernet (Phy: Realtek RTL8201CP)
ADB4006
- I2C
- 2x USB 2.0
- 1x Fast Ethernet port
- 1x SATA
- 2x buttons (PWRON, Boot)
- 2x LEDS
- serial console
- HDMI
- µSD-Card slot
- Audio Line-In / Line-Out
- GPIO pinheaders
https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006
https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
changes in v2:
- rebase on v2023.07-rc2
- remove pin defines from defconfig
- get dts reviewed on the linux mailing list and
scheduled for kernel 6.5 [1]
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git
commit de2bdfb7f79d5c655eb056d459e02be2c7f13c8b
Signed-off-by: Ludwig Kormann
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts | 137 ++
arch/arm/dts/sun7i-a20-icnova-a20.dtsi| 62
board/sunxi/MAINTAINERS | 5 +
configs/icnova-a20-adb4006_defconfig | 20 +++
5 files changed, 225 insertions(+)
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20.dtsi
create mode 100644 configs/icnova-a20-adb4006_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 935b2f1517..0b0636a532 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -631,6 +631,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-haoyu-marsboard.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
+ sun7i-a20-icnova-a20-adb4006.dtb \
sun7i-a20-icnova-swac.dtb \
sun7i-a20-itead-ibox.dtb \
sun7i-a20-lamobo-r1.dtb \
diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
new file mode 100644
index 00..577ead1d02
--- /dev/null
+++ b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
@@ -0,0 +1,137 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+// Copyright (C) 2023 In-Circuit GmbH
+
+/dts-v1/;
+
+#include "sun7i-a20-icnova-a20.dtsi"
+
+#include
+#include
+
+/ {
+ model = "In-Circuit ICnova A20 ADB4006";
+ compatible = "incircuit,icnova-a20-adb4006", "incircuit,icnova-a20",
+"allwinner,sun7i-a20";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ led-0 {
+ function = LED_FUNCTION_POWER;
+ color = ;
+ gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>; /* PH21 */
+ default-state = "on";
+ };
+
+ led-1 {
+ function = LED_FUNCTION_HEARTBEAT;
+ color = ;
+ gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* PH20 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
+
+&ahci {
+ target-supply = <®_ahci_5v>;
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&otg_sram {
+ status = "okay";
+};
+
+®_ahci_5v {
+ status = "okay";
+};
+
+&ac_power_supply {
+ status = "okay";
+};
+
+®_usb1_vbus {
+ status = "okay";
+};
+
+®_usb2_vbus {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ usb0_id_det-gpios = <&pio 7 4 GPIO_ACTIVE_HIGH>
Re: [PATCH 1/1] arm: dts: icnova-a20-adb4006: Add board support
Hi Andre, sorry for the mess - I've reformatted my last mail properly to be readable below. kind regards Ludwig --- Hi Andre, thanks for your immediate feedback! Somehow I didn't receive your response via the mailing list, I just grabbed it from the mailing list archive [1]. Maybe because my post was still beeing moderated while you responded. [1] https://lists.denx.de/pipermail/u-boot/2023-April/514575.html I've got a few questions regarding your comments below. On Thu, 6 Apr 2023 14:32:18 +0100 Andre Przywara wrote: Hi, briefly forgot about sunxi-common-regulators.dtsi, so: > On Thu, 6 Apr 2023 14:35:13 +0200 > Ludwig Kormann wrote: > > Hi Ludwig, > > > Add board support for ICnova A20 SomPi compute module on > > ICnova ADB4006 development board. > > thanks for sending this! > For new boards we need to get the DT reviewed on the Linux list first, so > please send the DT there (To: Samuel, Jernej, Chen-Yu, Rob, Krzysztof , Cc: > linux-sunxi, linux-arm-kernel). This is more a process thing, since the DT > review knowledge and also compliance testing is more prominent on the > Linux side. > > Once it has been approved and queued, we pick it up from there. > Alright, I'll create a patch v2 and post it to the linux list. I'll also put a link to this conversation as reference for the patch v1? > I will give you some feedback on the DT anyway: > > > Specification: > > SoM > > - Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz > > - 512MB DDR3 RAM > > - Fast Ethernet (Phy: Realtek RTL8201CP) > > So if you have a SoM/host board setup, we typically describe both > components in separate files: a SoM .dtsi, and a devboard .dts. > The devboard includes the SoM then. See the SoPine [1] for an example. > > [1] arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts > Thanks - I'll check the SoPine and create the appropriate .dtsi and .dts. > I also see that the SoM has NAND flash, does that work for you with > mainline U-Boot and/or Linux? Is it SLC, by any chance? It's MLC NAND, but the NAND option for the module is not relevant anymore and will be removed due to problems with wear leveling and component availability in the past. I didn't test if it would work with mainline drivers. > > > ADB4006 > > - I2C > > - 2x USB 2.0 > > - 1x Fast Ethernet port > > - 1x SATA > > - 2x buttons > > Are those buttons "power" and "FEL"? If not (connected to GPIOs), you > should describe them in the DT, see "gpio-keys" in > sun50i-h5-orangepi-pc2.dts for an example. The buttons are "pwron" and "boot" (not connected to GPIOs). > > > - 2x LEDS > > - serial console > > - HDMI > > - µSD-Card slot > > - Audio Line-In / Line-Out > > - GPIO pinheaders > > > > https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006 > > https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM > > Signed-off-by: Ludwig Kormann > > --- > > arch/arm/dts/Makefile | 1 + > > arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts | 248 ++ > > board/sunxi/MAINTAINERS | 5 + > > configs/icnova-a20-adb4006_defconfig | 25 ++ > > 4 files changed, 279 insertions(+) > > create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts > > create mode 100644 configs/icnova-a20-adb4006_defconfig > > > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > > index 0a9b1f7749..47dcaff780 100644 > > --- a/arch/arm/dts/Makefile > > +++ b/arch/arm/dts/Makefile > > @@ -623,6 +623,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ > > sun7i-a20-haoyu-marsboard.dtb \ > > sun7i-a20-hummingbird.dtb \ > > sun7i-a20-i12-tvbox.dtb \ > > + sun7i-a20-icnova-a20-adb4006.dtb \ > > sun7i-a20-icnova-swac.dtb \ > > Out of interest, how does this SoM/board relate to this "swac" thing here? > Is that an older, integrated board? It's a board of one of our customers that also features the ICnova A20 SoM. Therefore the "sun7i-a20-icnova-swac.dts" could later also be updated for a splitted *.dtsi / *.dts configuration. In my understanding this would be a seperate patch (series)? Or would it be good practice to include a patch that updates this board to use the SoM *.dtsi? > > > sun7i-a20-itead-ibox.dtb \ > > sun7i-a20-lamobo-r1.dtb \ > > diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts > > new file mode 100644 > > index 00..e43df838ec > > --- /dev/null &g
Re: [PATCH 1/1] arm: dts: icnova-a20-adb4006: Add board support
Hi Andre, thanks for your immediate feedback! Somehow I didn't receive your response via the mailing list, I just grabbed it from the mailing list archive [1]. Maybe because my post was still beeing moderated while you responded. [1] https://lists.denx.de/pipermail/u-boot/2023-April/514575.html I've got a few questions regarding your comments below. On Thu, 6 Apr 2023 14:32:18 +0100 Andre Przywara https://lists.denx.de/listinfo/u-boot>> wrote: Hi, briefly forgot about sunxi-common-regulators.dtsi, so: >/On Thu, 6 Apr 2023 14:35:13 +0200 />/Ludwig Kormann <https://lists.denx.de/listinfo/u-boot>> wrote: />//>/Hi Ludwig, />//>/> Add board support for ICnova A20 SomPi compute module on />/> ICnova ADB4006 development board. />//>/thanks for sending this! />/For new boards we need to get the DT reviewed on the Linux list first, so />/please send the DT there (To: Samuel, Jernej, Chen-Yu, Rob, Krzysztof , Cc: />/linux-sunxi, linux-arm-kernel). This is more a process thing, since the DT />/review knowledge and also compliance testing is more prominent on the />/Linux side. />//>/Once it has been approved and queued, we pick it up from there. />// Alright, I'll create a patch v2 and post it to the linux list. I'll also put a link to this conversation as reference for the patch v1? //>/I will give you some feedback on the DT anyway: />//>/> Specification: />/> SoM />/> - Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz />/> - 512MB DDR3 RAM />/> - Fast Ethernet (Phy: Realtek RTL8201CP) />//>/So if you have a SoM/host board setup, we typically describe both />/components in separate files: a SoM .dtsi, and a devboard .dts. />/The devboard includes the SoM then. See the SoPine [1] for an example. />//>/[1] arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts />// /Thanks - I'll check the SoPine and create the appropriate .dtsi and .dts. / //>/I also see that the SoM has NAND flash, does that work for you with />/mainline U-Boot and/or Linux? Is it SLC, by any chance?/ /It's MLC NAND, but the NAND option for the module is not relevant anymore and will be removed due to problems with wear leveling and component availability in the past. I didn't test if it would work with mainline drivers. / //>//>/> ADB4006 />/> - I2C />/> - 2x USB 2.0 />/> - 1x Fast Ethernet port />/> - 1x SATA />/> - 2x buttons />//>/Are those buttons "power" and "FEL"? If not (connected to GPIOs), you />/should describe them in the DT, see "gpio-keys" in />/sun50i-h5-orangepi-pc2.dts for an example. / The buttons are "pwron" and "boot" (not connected to GPIOs). >//>/> - 2x LEDS />/> - serial console />/> - HDMI />/> - µSD-Card slot />/> - Audio Line-In / Line-Out />/> - GPIO pinheaders />/> />/> https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006 />/> https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM />/> Signed-off-by: Ludwig Kormann <https://lists.denx.de/listinfo/u-boot>> />/> --- />/> arch/arm/dts/Makefile | 1 + />/> arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts | 248 ++ />/> board/sunxi/MAINTAINERS | 5 + />/> configs/icnova-a20-adb4006_defconfig | 25 ++ />/> 4 files changed, 279 insertions(+) />/> create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts />/> create mode 100644 configs/icnova-a20-adb4006_defconfig />/> />/> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile />/> index 0a9b1f7749..47dcaff780 100644 />/> --- a/arch/arm/dts/Makefile />/> +++ b/arch/arm/dts/Makefile />/> @@ -623,6 +623,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ />/> sun7i-a20-haoyu-marsboard.dtb \ />/> sun7i-a20-hummingbird.dtb \ />/> sun7i-a20-i12-tvbox.dtb \ />/> + sun7i-a20-icnova-a20-adb4006.dtb \ />/> sun7i-a20-icnova-swac.dtb \ />//>/Out of interest, how does this SoM/board relate to this "swac" thing here? />/Is that an older, integrated board?/ It's a board of one of our customers that also features the ICnova A20 SoM. Therefore the "sun7i-a20-icnova-swac.dts" could later also be updated for a splitted *.dtsi / *.dts configuration. In my understanding this would be a seperate patch (series)? Or would it be good practice to include a patch that updates this board to use the SoM *.dtsi? >//>/> sun7i-a20-itead-ibox.dtb \ />/> sun7i-a20-lamobo-r1.dtb \ />/> diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts />/> new file mode 100644 />/> index 00..e43df838ec />/> --
[PATCH 1/1] arm: dts: icnova-a20-adb4006: Add board support
Add board support for ICnova A20 SomPi compute module on
ICnova ADB4006 development board.
Specification:
SoM
- Processor: Allwinner A20 Cortex-A7 Dual Core at 1GHz
- 512MB DDR3 RAM
- Fast Ethernet (Phy: Realtek RTL8201CP)
ADB4006
- I2C
- 2x USB 2.0
- 1x Fast Ethernet port
- 1x SATA
- 2x buttons
- 2x LEDS
- serial console
- HDMI
- µSD-Card slot
- Audio Line-In / Line-Out
- GPIO pinheaders
https://wiki.in-circuit.de/index.php5?title=ICnova_ADB4006
https://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
Signed-off-by: Ludwig Kormann
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts | 248 ++
board/sunxi/MAINTAINERS | 5 +
configs/icnova-a20-adb4006_defconfig | 25 ++
4 files changed, 279 insertions(+)
create mode 100644 arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
create mode 100644 configs/icnova-a20-adb4006_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0a9b1f7749..47dcaff780 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -623,6 +623,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-haoyu-marsboard.dtb \
sun7i-a20-hummingbird.dtb \
sun7i-a20-i12-tvbox.dtb \
+ sun7i-a20-icnova-a20-adb4006.dtb \
sun7i-a20-icnova-swac.dtb \
sun7i-a20-itead-ibox.dtb \
sun7i-a20-lamobo-r1.dtb \
diff --git a/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
new file mode 100644
index 00..e43df838ec
--- /dev/null
+++ b/arch/arm/dts/sun7i-a20-icnova-a20-adb4006.dts
@@ -0,0 +1,248 @@
+/*
+ * Copyright 2023 Ludwig Kormann
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun7i-a20.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include
+#include
+
+/ {
+ model = "In-Circuit ICnova A20 ADB4006";
+ compatible = "in-circuit,icnova-a20-adb4006", "incircuit,icnova-a20",
+"allwinner,sun7i-a20";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_pins_icnova_a20_adb4006>;
+
+ led-0 {
+ label = "icnova_a20_adb4006:yellow:usr";
+ gpios = <&pio 7 21 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-1 {
+ label = "icnova_a20_adb4006:red:usr";
+
