Re: Ficus EE not working / supported ?
Hi Eze, On Tue, Mar 16, 2021 at 09:44:02AM -0300, Ezequiel Garcia wrote: > Hi Mani, Kever, > > I tried to bringup (again) my Ficus board, but I've been unable to > boot a kernel. > > Seems my old u-boot branch doesn't want to boot, and the only U-Boot I managed > to boot is some recent one (which I guess is better than having an ancient > one). > > Now, doc/board/rockchip/rockchip.rst mentions TPL but Ficus defconfig > isn't updated > to use that. So I'm using rock960-rk3399_defconfig, with ethernet enabled, > the issue is I can't boot any kernel with that. Seems it hangs up very early, > and doesn't even want to output anything on earlyconsole. > Hmm. I haven't touched my Ficus for about an year or so (too bad yeah). Let me add Peter Robinson as he seems to be using this board. I'm planning to get to it tomorrow unless Peter jumps in with a resolution. Thanks, Mani > I was wondering if maybe this rings a bell? Maybe DDR setup? > > U-Boot TPL 2021.01-dirty (Mar 15 2021 - 17:46:11) > Channel 0: DDR3, 800MHz > BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB > Channel 1: DDR3, 800MHz > BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB > 256B stride > Trying to boot from BOOTROM > Returning to boot ROM... > > U-Boot SPL 2021.01-dirty (Mar 15 2021 - 17:46:11 -0300) > Trying to boot from MMC1 > cannot find image node 'atf_1': -1 > > > U-Boot 2021.01-dirty (Mar 15 2021 - 17:46:11 -0300) > > SoC: Rockchip rk3399 > Reset cause: POR > Model: 96boards RK3399 Ficus > DRAM: 2 GiB > PMIC: RK808 > MMC: mmc@fe31: 2, mmc@fe32: 1, sdhci@fe33: 0 > Loading Environment from MMC... *** Warning - bad CRC, using default > environment > > In:serial > Out: serial > Err: serial > Model: 96boards RK3399 Ficus > Net: > Warning: ethernet@fe30 (eth0) using random MAC address - f2:a3:4d:58:42:dd > eth0: ethernet@fe30 > starting USB... > > > rock960 => setenv ipaddr 192.168.0.20 > rock960 => setenv ipaddr 192.168.0.200 > rock960 => setenv bootcmd "tftpboot 0x0200 rk3399-ficus/Image; > tftpboot 0x01f0 rk3399-ficus/rk3399-ficus.dtb; booti 0x0200 - > 0x01f0" > rock960 => boot > Speed: 1000, full duplex > Using ethernet@fe30 device > TFTP from server 192.168.0.20; our IP address is 192.168.0.200 > Filename 'rk3399-ficus/Image'. > Load address: 0x200 > Loading: # > # > # > # > # > # > # > # > # > # > ## > 5.1 MiB/s > done > Bytes transferred = 9736704 (949200 hex) > Speed: 1000, full duplex > Using ethernet@fe30 device > TFTP from server 192.168.0.20; our IP address is 192.168.0.200 > Filename 'rk3399-ficus/rk3399-ficus.dtb'. > Load address: 0x1f0 > Loading: > 3.7 MiB/s > done > Bytes transferred = 50911 (c6df hex) > Moving Image from 0x200 to 0x208, end=2a1f000 > ## Flattened Device Tree blob at 01f0 >Booting using the fdt blob at 0x1f0 > Host not halted after 16000 microseconds. >Loading Device Tree to 79f16000, end 79f256de ... OK > > Starting kernel ... > > Thanks, > Ezequiel
Re: [PATCH] arm: actions: increase SYS_MALLOC_F_LEN
On Mon, Nov 09, 2020 at 07:31:08PM +0530, Amit Singh Tomar wrote:
> after commit 4ab3817ff16a ("clk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag")
> Cubieboard7 (based on actions S700 SoC) fails to boot.
>
> It is due to the fact that the default value of CONFIG_SYS_MALLOC_F_LEN
> (0x400)
> would not provide enough memory for clock device to probe (before relocation)
> well.
>
> This commit fixes it, by increasing SYS_MALLOC_F_LEN to value 0x2000.
>
> Suggested-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
Thanks for fixing!
Reviewed-by: Manivannan Sadhasivam
Regards,
Mani
> ---
> Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Kconfig b/Kconfig
> index c94b10e9fa72..6dc20ed25b29 100644
> --- a/Kconfig
> +++ b/Kconfig
> @@ -200,7 +200,7 @@ config SYS_MALLOC_F_LEN
> default 0x2000 if (ARCH_IMX8 || ARCH_IMX8M || ARCH_MX7 || \
> ARCH_MX7ULP || ARCH_MX6 || ARCH_MX5 || \
> ARCH_LS1012A || ARCH_LS1021A || ARCH_LS1043A || \
> -ARCH_LS1046A || ARCH_QEMU || ARCH_SUNXI)
> +ARCH_LS1046A || ARCH_QEMU || ARCH_SUNXI || ARCH_OWL)
> default 0x400
> help
> Before relocation, memory is very limited on many platforms. Still,
> --
> 2.7.4
>
[PATCH v2] board: Add support for iMX8QXP AI_ML board
This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Reviewed-by: Peng Fan Reviewed-by: Fabio Estevam Signed-off-by: Manivannan Sadhasivam --- Changes in v2: * Rebased onto u-boot/master and fixed one build issue * Added review from Fabio arch/arm/mach-imx/imx8/Kconfig| 6 ++ board/einfochips/imx8qxp_ai_ml/Kconfig| 21 board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 ++ board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 ++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 78 +++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 + board/einfochips/imx8qxp_ai_ml/spl.c | 39 configs/imx8qxp_ai_ml_defconfig | 83 include/configs/imx8qxp_ai_ml.h | 95 +++ 10 files changed, 409 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index 9d1f73dfc7..308122d62a 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -75,6 +75,11 @@ config TARGET_GIEDI select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_EARLY_INIT_F + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -93,6 +98,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 00..b6806b8859 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,21 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +config SYS_MALLOC_LEN + default 0x240 + +config ENV_SIZE + default 0x1000 + +config ENV_OFFSET + default 0x40 + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 00..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 00..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 00..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +=== + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml-scfw-tcm.bin +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOC
[PATCH] mmc: msm_sdhci: Use mmc_of_parse for setting host_caps
Since the introduction of 'get_cd' callback in sdhci core, dragonboard410c's MMC interface is broken. It turns out that 'get_cd' callback checks for the host_caps for validating the chip select. And since the msm_sdhci driver is not parsing the host_caps from DT, not all of the cababilities are parsed properly. This results in the MMC interfaces to be broken. Hence, fix this by adding a call to 'mmc_of_parse' during driver probe. Signed-off-by: Manivannan Sadhasivam --- drivers/mmc/msm_sdhci.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdhci.c index da3ae2ec35..23e2e0fbc3 100644 --- a/drivers/mmc/msm_sdhci.c +++ b/drivers/mmc/msm_sdhci.c @@ -142,6 +142,10 @@ static int msm_sdc_probe(struct udevice *dev) writel(caps, host->ioaddr + SDHCI_VENDOR_SPEC_CAPABILITIES0); } + ret = mmc_of_parse(dev, >cfg); + if (ret) + return ret; + host->mmc = >mmc; host->mmc->dev = dev; ret = sdhci_setup_cfg(>cfg, host, 0, 0); -- 2.17.1
Re: [PATCH] board: Add support for iMX8QXP AI_ML board
Hi, On Tue, Nov 05, 2019 at 09:02:28PM +0530, Manivannan Sadhasivam wrote: > This commit adds initial board support for iMX8QXP AI_ML board from > Einfochips. This board is one of the 96Boards Consumer Edition and AI > boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. > > This initial supports contains following peripherals which are tested and > known to work: > > 1. Debug serial via UART2 > 2. SD card > 3. Ethernet > > More information about this board can be found in arrow website: > https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools > > Signed-off-by: Manivannan Sadhasivam > Reviewed-by: Peng Fan Looks like this patch has fallen through the cracks! Let me know if I have to resend it (again). Thanks, Mani > --- > arch/arm/mach-imx/imx8/Kconfig| 6 ++ > board/einfochips/imx8qxp_ai_ml/Kconfig| 21 > board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 ++ > board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ > board/einfochips/imx8qxp_ai_ml/README | 49 ++ > .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 78 +++ > board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 + > board/einfochips/imx8qxp_ai_ml/spl.c | 39 > configs/imx8qxp_ai_ml_defconfig | 83 > include/configs/imx8qxp_ai_ml.h | 95 +++ > 10 files changed, 409 insertions(+) > create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig > create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS > create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile > create mode 100644 board/einfochips/imx8qxp_ai_ml/README > create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c > create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg > create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c > create mode 100644 configs/imx8qxp_ai_ml_defconfig > create mode 100644 include/configs/imx8qxp_ai_ml.h > > diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig > index cdb78afacf..25fe4e2be0 100644 > --- a/arch/arm/mach-imx/imx8/Kconfig > +++ b/arch/arm/mach-imx/imx8/Kconfig > @@ -55,6 +55,11 @@ config TARGET_COLIBRI_IMX8X > select BOARD_LATE_INIT > select IMX8QXP > > +config TARGET_IMX8QXP_AI_ML > + bool "Support i.MX8QXP AI_ML board" > + select BOARD_EARLY_INIT_F > + select IMX8QXP > + > config TARGET_IMX8QM_MEK > bool "Support i.MX8QM MEK board" > select BOARD_LATE_INIT > @@ -73,6 +78,7 @@ config TARGET_IMX8QXP_MEK > > endchoice > > +source "board/einfochips/imx8qxp_ai_ml/Kconfig" > source "board/freescale/imx8qm_mek/Kconfig" > source "board/freescale/imx8qxp_mek/Kconfig" > source "board/advantech/imx8qm_rom7720_a1/Kconfig" > diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig > b/board/einfochips/imx8qxp_ai_ml/Kconfig > new file mode 100644 > index 00..b6806b8859 > --- /dev/null > +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig > @@ -0,0 +1,21 @@ > +if TARGET_IMX8QXP_AI_ML > + > +config SYS_BOARD > + default "imx8qxp_ai_ml" > + > +config SYS_VENDOR > + default "einfochips" > + > +config SYS_CONFIG_NAME > + default "imx8qxp_ai_ml" > + > +config SYS_MALLOC_LEN > + default 0x240 > + > +config ENV_SIZE > + default 0x1000 > + > +config ENV_OFFSET > + default 0x40 > + > +endif > diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS > b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS > new file mode 100644 > index 00..add0bd9431 > --- /dev/null > +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS > @@ -0,0 +1,6 @@ > +i.MX8QXP AI_ML BOARD > +M: Manivannan Sadhasivam > +S: Maintained > +F: board/einfochips/imx8qxp_ai_ml/ > +F: include/configs/imx8qxp_ai_ml.h > +F: configs/imx8qxp_ai_ml_defconfig > diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile > b/board/einfochips/imx8qxp_ai_ml/Makefile > new file mode 100644 > index 00..e08774dc6e > --- /dev/null > +++ b/board/einfochips/imx8qxp_ai_ml/Makefile > @@ -0,0 +1,8 @@ > +# > +# Copyright 2019 Linaro Ltd. > +# > +# SPDX-License-Identifier: GPL-2.0+ > +# > + > +obj-y += imx8qxp_ai_ml.o > +obj-$(CONFIG_SPL_BUILD) += spl.o > diff --git a/board/einfochips/imx8qxp_ai_ml/README > b/board/einfochips/imx8qxp_ai_ml/README > new file mode 100644 > index 00..488920580f > --- /dev/null > +++ b/board/einfochips/imx8qxp_ai_ml/README > @@ -0,0 +1,49 @@ > +U-Boot for the Einfochips i.MX8QXP AI_ML board > + > +Quic
Re: [PATCH v4 2/2] arm: actions: remove "CONFIG_SYS_SDRAM_SIZE" for Actions Owl Semi SoCs
On Sat, May 09, 2020 at 01:45:08PM +0530, Amit Singh Tomar wrote: > Now that, we calculate SDRAM size by reading DDR registers, > "CONFIG_SYS_SDRAM_SIZE" is no more needed. > > This commit removes "CONFIG_SYS_SDRAM_SIZE" from common configuration > file. > > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > * No change since previous version. > --- > include/configs/owl-common.h | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/include/configs/owl-common.h b/include/configs/owl-common.h > index f77a5fa4c114..7634578f856d 100644 > --- a/include/configs/owl-common.h > +++ b/include/configs/owl-common.h > @@ -12,7 +12,6 @@ > > /* SDRAM Definitions */ > #define CONFIG_SYS_SDRAM_BASE0x0 > -#define CONFIG_SYS_SDRAM_SIZE0x8000 > > /* Generic Timer Definitions */ > #define COUNTER_FREQUENCY(2400) /* 24MHz */ > -- > 2.7.4 >
Re: [PATCH v4 1/2] Actions: OWL: Calculate SDRAM size
On Sat, May 09, 2020 at 01:45:07PM +0530, Amit Singh Tomar wrote:
> Calculate the SDRAM size from DDR capacity register registers instead
> of using hard-coded value. This is quite useful to get correct size
> on differnt boards based on Actions OWL family of SoCs (S700 and S900).
>
> There is no documentation available that talks about DDR registers, and
> this is very much taken from vendor source.
>
> This commit lets Linux boot on Cubieboard7-lite(based on S700).
>
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v3:
> * Fixed S900 support as suggested by Mani.
> * Changes the function name to owl_get_ddrcap.
> Changes since v2:
> * Fixed the variable name so that it can compile
> for S900.
> Changes since v1:
> * added support for S900
> * updated the commit message to reflect common OWL
> support.
> ---
> arch/arm/mach-owl/soc.c | 22 +-
> 1 file changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c
> index 409cbd319f20..fcf61d39b63a 100644
> --- a/arch/arm/mach-owl/soc.c
> +++ b/arch/arm/mach-owl/soc.c
> @@ -13,14 +13,34 @@
> #include
> #include
>
> +#define DMM_INTERLEAVE_PER_CH_CFG0xe0290028
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> +unsigned int owl_get_ddrcap(void)
> +{
> + unsigned int val, cap;
> +
> + /* ddr capacity register initialized by ddr driver
> + * in early bootloader
> + */
> +#if defined(CONFIG_MACH_S700)
> + val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0x7;
> + cap = (val + 1) * 256;
> +#elif defined(CONFIG_MACH_S900)
> + val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0xf;
> + cap = 64 * (1 << val);
> +#endif
> +
> + return cap;
> +}
> +
> /*
> * dram_init - sets uboots idea of sdram size
> */
> int dram_init(void)
> {
> - gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
> + gd->ram_size = owl_get_ddrcap() * 1024 * 1024;
> return 0;
> }
>
> --
> 2.7.4
>
Re: [PATCH v2 1/2] Actions: OWL: Calculate SDRAM size
Hi Amit,
On Fri, May 08, 2020 at 03:53:45PM +0530, Amit Singh Tomar wrote:
> Calculate the SDRAM size from DDR capacity register registers instead
> of using hard-coded value. This is quite useful to get correct size
> on differnt boards based on Actions OWL family of SoCs (S700 and S900).
>
> There is no documentation available that talks about DDR registers, and
> this is very much taken from vendor source.
>
> This commit lets Linux boot on Cubieboard7-lite(based on S700).
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v1:
> * added support for S900
> * updated the commit message to reflect common OWL
> support.
> ---
> arch/arm/mach-owl/soc.c | 27 ++-
> 1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c
> index 409cbd319f20..2ae357e3672a 100644
> --- a/arch/arm/mach-owl/soc.c
> +++ b/arch/arm/mach-owl/soc.c
> @@ -13,15 +13,40 @@
> #include
> #include
>
> +#define DMM_INTERLEAVE_BASE (0xe0290020)
> +#define DMM_INTERLEAVE_PER_CH_CFG (DMM_INTERLEAVE_BASE + 0x08)
> +#define DMM_MASTER_READ_TO (DMM_INTERLEAVE_BASE + 0x48)
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> +unsigned int get_owl_ram_size(void)
> +{
> + __maybe_unused unsigned int val, cap, channel, channel_num;
> +
> + /* ddr capacity register initialized by ddr driver
> + * in early bootloader
> + */
> +#if defined(CONFIG_MACH_S700)
> + val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0x7;
> + cap = (val + 1) * 256;
> +#elif defined(CONFIG_MACH_S900)
> + chennel_num = (readl(DMM_INTERLEAVE_BASE) >> 24) & 0xf;
> + channel = (ch_num >= 3) ? 1 : 0;
> + val = (readl(DMM_MASTER_READ_TO)) & 0xf;
> + cap = ((val + 1) << channel) * 256;
This doesn't work on Bubblegum96. But poking into the vendor tree, I'm able
to come up with below working code:
val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0xf;
cap = 64 * (1 << val);
So, you can use this and remove other stuffs. Also this function should be named
as owl_get_ddr_cap().
Thanks,
Mani
> +#endif
> +
> + return cap;
> +}
> +
> /*
> * dram_init - sets uboots idea of sdram size
> */
> int dram_init(void)
> {
> - gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
> + gd->ram_size = get_owl_ram_size() * 1024 * 1024;
> return 0;
> +
> }
>
> /* This is called after dram_init() so use get_ram_size result */
> --
> 2.7.4
>
Re: [PATCH] Actions: S700 Calculate SDRAM size
On Sat, May 02, 2020 at 06:55:20PM +0530, Amit Singh Tomar wrote:
> Calculate the SDRAM size from DDR capacity register registers instead of using
> hard-coded value. This is quite useful to get correct size on differnt boards
> based on S700 SoC.
>
> There is no documentation available that talks about DDR registers, and this
> is very much taken from vendor source.
>
> This commit lets Linux boot on Cubieboard7-lite (based on S700).
>
> Signed-off-by: Amit Singh Tomar
> ---
> There is bit of a story about it:
>
> Wasn't really aware that working on a board (CubieBoard7-Lite) that actually
> has only 1GB of RAM untill I see the Kernel crash[1], and DDR size is
> hard-coded to 2GB(as CubieBoard7 comes with 2 GB). With this set-up Kernel
> was trying to access the memory that doesn't exist leads to the crash.
>
> [1]:
>
> Starting kernel ...
>
> [0.00] Booting Linux on physical CPU 0x00 [0x410fd034]
> [0.00] Linux version 5.6.0-rc6-00012-g7080a8a-dirty
> (amit@amit-ThinkPad-X230) (gcc version 7.3.1 20180425 [linaro-7.3-2018.05
> revision d29120a424ecfbc167ef90065c0eeb7f91977701] (Linaro GCC 7.3-2018.05))
> #10 SMP PREEMPT Fri Mar 27 21:52:07 IST 2020
> [0.00] Machine model: CubieBoard7
> [0.00] earlycon: owl0 at MMIO 0xe0126000 (options '')
> [0.00] printk: bootconsole [owl0] enabled
> [0.00] efi: Getting EFI parameters from FDT:
> [0.00] efi: UEFI not found.
> [0.00] cma: Reserved 32 MiB at 0x7e00
> [0.00] NUMA: No NUMA configuration found
> [0.00] NUMA: Faking a node at [mem
> 0x-0x7fff]
> [0.00] NUMA: NODE_DATA [mem 0x7dbfb100-0x7dbfcfff]
> [0.00] Zone ranges:
> [0.00] DMA [mem 0x-0x3fff]
> [0.00] DMA32[mem 0x4000-0x7fff]
> [0.00] Normal empty
> [0.00] Movable zone start for each node
> [0.00] Early memory node ranges
> [0.00] node 0: [mem 0x-0x1eff]
> [0.00] node 0: [mem 0x2000-0x7fff]
> [0.00] Initmem setup node 0 [mem
> 0x-0x7fff]
> [0.00] psci: probing for conduit method from DT.
> [0.00] psci: PSCIv0.2 detected in firmware.
> [0.00] psci: Using standard PSCI v0.2 function IDs
> [0.00] psci: Trusted OS migration not required
> [0.00] percpu: Embedded 23 pages/cpu s53272 r8192 d32744 u94208
> [0.00] Detected VIPT I-cache on CPU0
> [0.00] CPU features: detected: ARM erratum 845719
> [0.00] Built 1 zonelists, mobility grouping on. Total pages: 512000
> [0.00] Policy zone: DMA32
> [0.00] Kernel command line: console=ttyOWL,115200
> earlycon=owl,0xe0126000 root=/dev/mmcblk0p2
> [0.00] Dentry cache hash table entries: 262144 (order: 9, 2097152
> bytes, linear)
> [0.00] Inode-cache hash table entries: 131072 (order: 8, 1048576
> bytes, linear)
> [0.00] mem auto-init: stack:off, heap alloc:off, heap free:off
> [0.00] Unable to handle kernel paging request at virtual address
> 3de18000
> [0.00] Mem abort info:
> [0.00] ESR = 0x9647
> [0.00] EC = 0x25: DABT (current EL), IL = 32 bits
> [0.00] SET = 0, FnV = 0
> [0.00] EA = 0, S1PTW = 0
> [0.00] Data abort info:
> [0.00] ISV = 0, ISS = 0x0047
> [0.00] CM = 0, WnR = 1
> [0.00] swapper pgtable: 4k pages, 48-bit VAs, pgdp=01399000
>
> ---
> arch/arm/mach-owl/soc.c | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c
> index 409cbd3..f63f1a8 100644
> --- a/arch/arm/mach-owl/soc.c
> +++ b/arch/arm/mach-owl/soc.c
> @@ -13,15 +13,38 @@
> #include
> #include
>
> +#define DMM_INTERLEAVE_PER_CH_CFG (0xe0290028)
> +
> DECLARE_GLOBAL_DATA_PTR;
>
> +unsigned int get_owl_ram_size(void)
> +{
> + unsigned int val, cap;
> +
> + /* ddr capacity register initialized by ddr driver
> + * in early bootloader
> + * DMM_INTERLEAVE_PER_CH_CFG bit[10:8]
> + * (val + 1) * 256
> + */
> + val = (readl(DMM_INTERLEAVE_PER_CH_CFG) >> 8) & 0x7;
> + cap = (val + 1) * 256;
> +
> + return cap;
> +}
> +
> /*
> * dram_init - sets uboots idea of sdram size
> */
> int dram_init(void)
> {
> gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
> +
> +#if defined(CONFIG_MACH_S700)
> + gd->ram_size = get_owl_ram_size() * 1024 * 1024;
> +#endif
Have you checked if this setting can be reused for S900? IMO we should use
this helper for all Owl SoCs. Using CONFIG_SYS_SDRAM_SIZE won't scale.
Thanks,
Mani
> +
> return 0;
> +
> }
>
> /* This is called after dram_init() so use get_ram_size result */
> --
> 2.7.4
>
Re: [PATCH v2 8/8] rockchip: Enable PCIe/M.2 on rock960 board
On Thu, Apr 30, 2020 at 12:34:12PM +0530, Jagan Teki wrote:
> Due to some on board limitation rock960 PCIe
> works only with 1.8V IO domain.
>
> So, this patch enables grf io_sel explicitly
> to make PCIe/M.2 to work.
>
> Cc: Tom Cubie
> Cc: Manivannan Sadhasivam
> Signed-off-by: Jagan Teki
> ---
> Changes for v2:
> - none
>
> board/vamrs/rock960_rk3399/rock960-rk3399.c | 20
> configs/rock960-rk3399_defconfig| 5 +
> 2 files changed, 25 insertions(+)
>
> diff --git a/board/vamrs/rock960_rk3399/rock960-rk3399.c
> b/board/vamrs/rock960_rk3399/rock960-rk3399.c
> index 68a127b9ac..98d62e89ca 100644
> --- a/board/vamrs/rock960_rk3399/rock960-rk3399.c
> +++ b/board/vamrs/rock960_rk3399/rock960-rk3399.c
> @@ -2,3 +2,23 @@
> /*
> * Copyright (C) 2018 Manivannan Sadhasivam
>
> */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#ifdef CONFIG_MISC_INIT_R
> +int misc_init_r(void)
> +{
> + struct rk3399_grf_regs *grf =
> + syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
> +
> + /* BT565 is in 1.8v domain */
>From where this BT565 comes in?
Anyway, I don't have the PCI-E device with me to test this change but
it looks good to me.
Acked-by: Manivannan Sadhasivam
PS: Added Peter to CC incase he is interested.
Thanks,
Mani
> + rk_setreg(>io_vsel, BIT(0));
> +
> + return 0;
> +}
> +#endif
> diff --git a/configs/rock960-rk3399_defconfig
> b/configs/rock960-rk3399_defconfig
> index c4e954731a..cb1ec3c26b 100644
> --- a/configs/rock960-rk3399_defconfig
> +++ b/configs/rock960-rk3399_defconfig
> @@ -9,6 +9,7 @@ CONFIG_DEBUG_UART_BASE=0xFF1A
> CONFIG_DEBUG_UART_CLOCK=2400
> CONFIG_DEBUG_UART=y
> CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
> +CONFIG_MISC_INIT_R=y
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
> CONFIG_SPL_STACK_R=y
> @@ -19,6 +20,7 @@ CONFIG_CMD_BOOTZ=y
> CONFIG_CMD_GPT=y
> CONFIG_CMD_MMC=y
> CONFIG_CMD_USB=y
> +CONFIG_CMD_PCI=y
> # CONFIG_CMD_SETEXPR is not set
> CONFIG_CMD_TIME=y
> CONFIG_CMD_PMIC=y
> @@ -36,10 +38,13 @@ CONFIG_MMC_SDHCI=y
> CONFIG_MMC_SDHCI_SDMA=y
> CONFIG_MMC_SDHCI_ROCKCHIP=y
> CONFIG_DM_ETH=y
> +CONFIG_NVME=y
> +CONFIG_PCI=y
> CONFIG_PMIC_RK8XX=y
> CONFIG_REGULATOR_PWM=y
> CONFIG_REGULATOR_RK8XX=y
> CONFIG_PWM_ROCKCHIP=y
> +CONFIG_DM_RESET=y
> CONFIG_BAUDRATE=150
> CONFIG_DEBUG_UART_SHIFT=2
> CONFIG_SYSRESET=y
> --
> 2.17.1
>
Re: [PATCH v10 00/12] Actions S700 SoC support
Hi Tom, On Mon, Apr 06, 2020 at 05:58:19PM +0530, Amit Singh Tomar wrote: > This adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], It's > Quad-core ARMv8 SoC > with Cortex-A53 cores. Peripheral like UART seems to be compatible with S900 > SoC(basic support > for it is alreay present in u-boot). > I've reviewed all patches and tested them on Bubblegum96 board. Since we now have time for the next merge window, can you please apply this series once it is open? Or let me know if I have to send you a pull req. Thanks, Mani > This series(v10) takes care the commments provided by Mani and patches 04/12, > 07/12 and 12/12 > has been changed to address those comments. > > Previous series(v9) fixes a Bug that breaks bubblegum96 board boot(reported > by Mani). It was > due to fact that driver data read is not proper in the clock driver. There > are changes in > patch 06/12 to fix it. > > Series(v8) removes the SoC specific include instead just uses owl-common. For > this > patch 01/12 and 09/12 changes a bit. > > Series(v7) fixes a serious Bug that breaks S900, it was there since v5.Thanks > to Andre > for pointing it out. > > Series(v6)[3] does following changes: > > * [PATCH v5 06/11] becomes [PATCH v6 03/11] > * [PATCH v5 03/11] becomes [PATCH v6 04/11] > * Introduce a new patch to move defconfig options to Kconfig which is [PATCH > v6 10/12] > > Series(v5)[4] just re-orders the patches so that U-BOOT(with > bubblegum96_defconfig) builds > after every patch of the series(suggested by Andre). > > S700 support is tested[5] on Cubieboard7-lite board and S900 support is just > compiled tested. > > This patch series can be tested using below tree: > https://github.com/Atomar25/u-boot/commits/s700_v10 > > [1]: http://www.cubietech.com/product-detail/cubieboard7/ > [2]: http://www.actions-semi.com/en/productview.aspx?id=225 > [3]: > http://u-boot.10912.n7.nabble.com/PATCH-v6-00-12-Actions-S700-SoC-support-td403562.html#a403567 > [4]: > http://u-boot.10912.n7.nabble.com/PATCH-v5-00-11-Actions-S700-SoC-support-td402752.html#a402762 > [5]: https://paste.ubuntu.com/p/TbBtk5dPGS/ > > Amit Singh Tomar (12): > arm: actions: Add common framework for Actions Owl Semi SoCs > arm: actions: rename sysmap-s900 to sysmap-owl > serial: actions: add compatible string > arm: dts: sync dts for Action Semi S900 > arm: dts: actions: s900: add u-boot specific dtsi file > clk: actions: Add common clock driver > arm: actions: add S700 SoC device tree > arm: dts: actions: s700: add u-boot specific dtsi file > arm: add support Actions Semi S700 > actions: Move defconfig options to Kconfig > arm: add Cubieboard7 board support > doc: boards: add Cubieboard7 documentation > > MAINTAINERS| 3 +- > arch/arm/Kconfig | 5 +- > arch/arm/dts/Makefile | 4 +- > arch/arm/dts/s700-cubieboard7.dts | 92 +++ > arch/arm/dts/s700-u-boot.dtsi | 18 ++ > arch/arm/dts/s700.dtsi | 248 +++ > arch/arm/dts/s900-u-boot.dtsi | 17 ++ > arch/arm/dts/s900.dtsi | 322 > +++-- > arch/arm/include/asm/arch-owl/clk_s900.h | 57 - > arch/arm/include/asm/arch-owl/regs_s700.h | 56 + > arch/arm/mach-owl/Kconfig | 49 ++-- > arch/arm/mach-owl/Makefile | 3 +- > arch/arm/mach-owl/soc.c| 57 + > arch/arm/mach-owl/sysmap-owl.c | 32 +++ > arch/arm/mach-owl/sysmap-s900.c| 32 --- > board/ucRobotics/bubblegum_96/Kconfig | 15 -- > board/ucRobotics/bubblegum_96/MAINTAINERS | 6 - > board/ucRobotics/bubblegum_96/Makefile | 3 - > board/ucRobotics/bubblegum_96/bubblegum_96.c | 57 - > configs/bubblegum_96_defconfig | 12 +- > configs/cubieboard7_defconfig | 9 + > doc/board/actions/cubieboard7.rst | 114 + > doc/board/actions/index.rst| 10 + > doc/board/index.rst| 1 + > drivers/clk/owl/Kconfig| 8 +- > drivers/clk/owl/Makefile | 2 +- > drivers/clk/owl/clk_owl.c | 155 > drivers/clk/owl/clk_owl.h | 64 + > drivers/clk/owl/clk_s900.c | 137 --- > drivers/serial/serial_owl.c| 2 +- > include/configs/bubblegum_96.h | 40 --- > include/configs/owl-common.h | 40 +++ > include/dt-bindings/clock/actions,s700-cmu.h | 118 + > include/dt-bindings/clock/actions,s900-cmu.h | 129 ++ > include/dt-bindings/clock/s900_cmu.h | 77 -- > include/dt-bindings/reset/actions,s700-reset.h | 34 +++ >
Re: [PATCH v10 06/12] clk: actions: Add common clock driver
On Mon, Apr 06, 2020 at 05:58:25PM +0530, Amit Singh Tomar wrote:
> This patch converts S900 clock driver to something common that can
> be used for other SoCs, for instance S700(few of clk registers are same).
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v9:
> * Checked the relevant SoC model.
> Changes since v8:
> * Fixed the bubblegum-96 boot issue by introducing
> dev_get_driver_data API to read driver data.
> Changes since v7:
> * No changes.
> Changes since v6:
> * Fixed the bug that breaks S900(missing break in switch statement).
> Changes since v5:
> * No changes.
> Changes since v4:
> * This patch is re-ordered, moved from 08/11 to 04/11.
> Changes since v3:
> * Replaced dtsi with dts in subject line along with arm:dts:
> to the prefix.
> * Added reviewed-by tag.
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/Kconfig | 2 +
> arch/arm/include/asm/arch-owl/clk_s900.h | 57 ---
> arch/arm/include/asm/arch-owl/regs_s700.h | 56 +++
> configs/bubblegum_96_defconfig| 3 -
> drivers/clk/owl/Kconfig | 8 +-
> drivers/clk/owl/Makefile | 2 +-
> drivers/clk/owl/clk_owl.c | 155
> ++
> drivers/clk/owl/clk_owl.h | 64
> drivers/clk/owl/clk_s900.c| 137 --
> 9 files changed, 280 insertions(+), 204 deletions(-)
> delete mode 100644 arch/arm/include/asm/arch-owl/clk_s900.h
> create mode 100644 arch/arm/include/asm/arch-owl/regs_s700.h
> create mode 100644 drivers/clk/owl/clk_owl.c
> create mode 100644 drivers/clk/owl/clk_owl.h
> delete mode 100644 drivers/clk/owl/clk_s900.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index de6b7f9..05658cf 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -876,6 +876,8 @@ config ARCH_OWL
> select DM
> select DM_SERIAL
> select OWL_SERIAL
> + select CLK
> + select CLK_OWL
> select OF_CONTROL
> imply CMD_DM
>
> diff --git a/arch/arm/include/asm/arch-owl/clk_s900.h
> b/arch/arm/include/asm/arch-owl/clk_s900.h
> deleted file mode 100644
> index 88e88f7..000
> --- a/arch/arm/include/asm/arch-owl/clk_s900.h
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * Actions Semi S900 Clock Definitions
> - *
> - * Copyright (C) 2015 Actions Semi Co., Ltd.
> - * Copyright (C) 2018 Manivannan Sadhasivam
>
> - *
> - */
> -
> -#ifndef _OWL_CLK_S900_H_
> -#define _OWL_CLK_S900_H_
> -
> -#include
> -
> -struct owl_clk_priv {
> - phys_addr_t base;
> -};
> -
> -/* BUSCLK register definitions */
> -#define CMU_PDBGDIV_87
> -#define CMU_PDBGDIV_SHIFT26
> -#define CMU_PDBGDIV_DIV (CMU_PDBGDIV_8 << CMU_PDBGDIV_SHIFT)
> -#define CMU_PERDIV_8 7
> -#define CMU_PERDIV_SHIFT 20
> -#define CMU_PERDIV_DIV (CMU_PERDIV_8 << CMU_PERDIV_SHIFT)
> -#define CMU_NOCDIV_2 1
> -#define CMU_NOCDIV_SHIFT 19
> -#define CMU_NOCDIV_DIV (CMU_NOCDIV_2 << CMU_NOCDIV_SHIFT)
> -#define CMU_DMMCLK_SRC_APLL 2
> -#define CMU_DMMCLK_SRC_SHIFT 10
> -#define CMU_DMMCLK_SRC (CMU_DMMCLK_SRC_APLL <<
> CMU_DMMCLK_SRC_SHIFT)
> -#define CMU_APBCLK_DIV BIT(8)
> -#define CMU_NOCCLK_SRC BIT(7)
> -#define CMU_AHBCLK_DIV BIT(4)
> -#define CMU_CORECLK_MASK 3
> -#define CMU_CORECLK_CPLL BIT(1)
> -#define CMU_CORECLK_HOSC BIT(0)
> -
> -/* COREPLL register definitions */
> -#define CMU_COREPLL_EN BIT(9)
> -#define CMU_COREPLL_HOSC_EN BIT(8)
> -#define CMU_COREPLL_OUT (1104 / 24)
> -
> -/* DEVPLL register definitions */
> -#define CMU_DEVPLL_CLK BIT(12)
> -#define CMU_DEVPLL_ENBIT(8)
> -#define CMU_DEVPLL_OUT (660 / 6)
> -
> -/* UARTCLK register definitions */
> -#define CMU_UARTCLK_SRC_DEVPLL BIT(16)
> -
> -/* DEVCLKEN1 register definitions */
> -#define CMU_DEVCLKEN1_UART5 BIT(21)
> -
> -#define PLL_STABILITY_WAIT_US50
> -
> -#endif
> diff --git a/arch/arm/include/asm/arch-owl/regs_s700.h
> b/arch/arm/include/asm/arch-owl/regs_s700.h
> new file mode 100644
> index 000..2f21c15
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-owl/regs_s700.h
> @@ -0
Re: [PATCH v10 12/12] doc: boards: add Cubieboard7 documentation
On Mon, Apr 06, 2020 at 05:58:31PM +0530, Amit Singh Tomar wrote: > This adds build and flash steps for Actions S700 > based Cubieboard7 board. > > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes since v9: > * Updated the heading to CUBIEBOARD7 to ACTIONS. > * Added shorthand for mkimage command. > Changes since v8: > * No changes. > Changes since v7: > * No changes. > Changes since v6: > * No changes. > Changes since v5: > * No changes. > Changes since v4: > * No changes. > Changes since v3: > * Convert plain text documentation to reStructuredText format. > Changes since v2: > * No Change. > Changes since v1: > * No Change. > --- > doc/board/actions/cubieboard7.rst | 114 > ++ > doc/board/actions/index.rst | 10 > doc/board/index.rst | 1 + > 3 files changed, 125 insertions(+) > create mode 100644 doc/board/actions/cubieboard7.rst > create mode 100644 doc/board/actions/index.rst > > diff --git a/doc/board/actions/cubieboard7.rst > b/doc/board/actions/cubieboard7.rst > new file mode 100644 > index 000..e01d2d0 > --- /dev/null > +++ b/doc/board/actions/cubieboard7.rst > @@ -0,0 +1,114 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > +.. Copyright (C) 2020 Amit Singh Tomar > + > +CUBIEBOARD7 > +=== > + > +About this > +-- > + > +This document describes build and flash steps for Actions S700 SoC based > Cubieboard7 > +board. > + > +Cubieboard7 initial configuration > +- > + > +Default Cubieboard7 comes with pre-installed Android where U-Boot is > configured with > +a bootdelay of 0, entering a prompt by pressing keys does not seem to work. > + > +Though, one can enter ADFU mode and flash debian image(from host machine) > where > +getting into u-boot prompt is easy. > + > +Enter ADFU Mode > + > + > +Before write the firmware, let the development board entering the ADFU mode: > insert > +one end of the USB cable to the PC, press and hold the ADFU button, and then > connect > +the other end of the USB cable to the Mini USB port of the development > board, release > +the ADFU button, after connecting it will enter the ADFU mode. > + > +Check whether entered ADFU Mode > + > + > +The user needs to run the following command on the PC side to check if the > ADFU > +device is detected. ID realted to "Actions Semiconductor Co., Ltd" means > that > +the PC side has been correctly detected ADFU device, the development board > +also enter into the ADFU mode. > + > +.. code-block:: none > + > + $ lsusb > + Bus 001 Device 005: ID 04f2:b2eb Chicony Electronics Co., Ltd > + Bus 001 Device 004: ID 0a5c:21e6 Broadcom Corp. BCM20702 Bluetooth 4.0 > [ThinkPad] > + Bus 001 Device 003: ID 046d:c534 Logitech, Inc. Unifying Receiver > + Bus 001 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub > + Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub > + Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub > + Bus 003 Device 013: ID 10d6:10d6 Actions Semiconductor Co., Ltd > + Bus 003 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub > + > +Flashing debian image > +- > + > +.. code-block:: none > + > + $ sudo ./ActionsFWU.py --fw=debian-stretch-desktop-cb7-emmc-v2.0.fw > + ActionsFWU.py : 1.0.150828.0830 > + libScript.so: 2.3.150825.0951 > + libFileSystem.so: 2.3.150825.0952 > + libProduction.so: 2.3.150915.1527 > + =burn all partition > + FW_VER: 3.10.37.180608 > + 3% DOWNLOAD ADFUDEC ... > + 5% DOWNLOAD BOOT PARA ... > + 7% SWITCH ADFUDEC ... > + 12% DOWNLOAD BL31 ... > + 13% DOWNLOAD BL32 ... > + 15% DOWNLOAD VMLINUX ... > + 20% DOWNLOAD INITRD ... > + 24% DOWNLOAD FDT ... > + 27% DOWNLOAD ADFUS ... > + 30% SWITCH ADFUS ... > + 32% DOWNLOAD MBR ... > + 35% DOWNLOAD PARTITIONS ... > + WRITE_MBRC_PARTITION > + 35% write p0 size = 2048 : ok > + WRITE_BOOT_PARTITION > + 35% write p1 size = 2048 : ok > + WRITE_MISC_PARTITION > + 36% write p2 size = 98304 : ok > + WRITE_SYSTEM_PARTITION > + 94% write p3 size = 4608000 : ok > + FORMAT_SWAP_PARTITION > + 94% write p4 size = 20480 : ok > + 95% TRANSFER OVER ... > + Firmware upgrade successfully! > + > +Debian image can be downloaded from here[1]. > + > +Once debian image is flashed, one can get into u-boot prompt by
Re: [PATCH] ARM: dts: stm32: Rename LEDs to match silkscreen on AV96
On Mon, Apr 06, 2020 at 03:05:58PM +0200, Marek Vasut wrote:
> The LED labels do not match the silkscreen on the board, fix it.
>
> Signed-off-by: Marek Vasut
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> Cc: Manivannan Sadhasivam
> Cc: Patrick Delaunay
> Cc: Patrice Chotard
> Cc: Tom Rini
> ---
> arch/arm/dts/stm32mp157a-avenger96.dts | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts
> b/arch/arm/dts/stm32mp157a-avenger96.dts
> index 1f32395e71..735228a895 100644
> --- a/arch/arm/dts/stm32mp157a-avenger96.dts
> +++ b/arch/arm/dts/stm32mp157a-avenger96.dts
> @@ -36,21 +36,21 @@
> led {
> compatible = "gpio-leds";
> led1 {
> - label = "green:user1";
> + label = "green:user0";
> gpios = < 7 GPIO_ACTIVE_HIGH>;
> linux,default-trigger = "heartbeat";
> default-state = "off";
> };
>
> led2 {
> - label = "green:user2";
> + label = "green:user1";
> gpios = < 3 GPIO_ACTIVE_HIGH>;
> linux,default-trigger = "mmc0";
> default-state = "off";
> };
>
> led3 {
> - label = "green:user3";
> + label = "green:user2";
> gpios = < 0 GPIO_ACTIVE_HIGH>;
> linux,default-trigger = "mmc1";
> default-state = "off";
> --
> 2.25.1
>
Re: [PATCH v3 4/5] rockchip: Enable HDMI output on rk3399 board w/ HDMI
On Thu, Apr 02, 2020 at 05:11:24PM +0530, Jagan Teki wrote: > Enable config options and console setting to respective > rk3399 board for HDMI output. > > Boards supported and tested on this patch are: > - NanoPc T4 > - NanoPi M4 > - NanoPi Neo4 > - ROC-RK3399-PC > - Rock960 > > Cc: Manivannan Sadhasivam > Signed-off-by: Jagan Teki For Rock960, Acked-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes for v3: > - add rock960 hdmi out support > > configs/nanopc-t4-rk3399_defconfig | 7 +++ > configs/nanopi-m4-rk3399_defconfig | 7 +++ > configs/nanopi-neo4-rk3399_defconfig | 7 +++ > configs/roc-pc-rk3399_defconfig | 6 ++ > configs/rock960-rk3399_defconfig | 7 +++ > include/configs/evb_rk3399.h | 5 + > include/configs/rock960_rk3399.h | 5 + > 7 files changed, 44 insertions(+) > > diff --git a/configs/nanopc-t4-rk3399_defconfig > b/configs/nanopc-t4-rk3399_defconfig > index 9ea9b11574..607a00dbf7 100644 > --- a/configs/nanopc-t4-rk3399_defconfig > +++ b/configs/nanopc-t4-rk3399_defconfig > @@ -52,5 +52,12 @@ CONFIG_USB_ETHER_ASIX88179=y > CONFIG_USB_ETHER_MCS7830=y > CONFIG_USB_ETHER_RTL8152=y > CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_USB_KEYBOARD=y > CONFIG_SPL_TINY_MEMSET=y > CONFIG_ERRNO_STR=y > +CONFIG_DM_VIDEO=y > +CONFIG_VIDEO_BPP16=y > +CONFIG_VIDEO_BPP32=y > +CONFIG_DISPLAY=y > +CONFIG_VIDEO_ROCKCHIP=y > +CONFIG_DISPLAY_ROCKCHIP_HDMI=y > diff --git a/configs/nanopi-m4-rk3399_defconfig > b/configs/nanopi-m4-rk3399_defconfig > index ad0e808bf6..3fcb7ac2d7 100644 > --- a/configs/nanopi-m4-rk3399_defconfig > +++ b/configs/nanopi-m4-rk3399_defconfig > @@ -52,5 +52,12 @@ CONFIG_USB_ETHER_ASIX88179=y > CONFIG_USB_ETHER_MCS7830=y > CONFIG_USB_ETHER_RTL8152=y > CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_USB_KEYBOARD=y > CONFIG_SPL_TINY_MEMSET=y > CONFIG_ERRNO_STR=y > +CONFIG_DM_VIDEO=y > +CONFIG_VIDEO_BPP16=y > +CONFIG_VIDEO_BPP32=y > +CONFIG_DISPLAY=y > +CONFIG_VIDEO_ROCKCHIP=y > +CONFIG_DISPLAY_ROCKCHIP_HDMI=y > diff --git a/configs/nanopi-neo4-rk3399_defconfig > b/configs/nanopi-neo4-rk3399_defconfig > index d038a8cab9..b9ea535e43 100644 > --- a/configs/nanopi-neo4-rk3399_defconfig > +++ b/configs/nanopi-neo4-rk3399_defconfig > @@ -52,5 +52,12 @@ CONFIG_USB_ETHER_ASIX88179=y > CONFIG_USB_ETHER_MCS7830=y > CONFIG_USB_ETHER_RTL8152=y > CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_USB_KEYBOARD=y > CONFIG_SPL_TINY_MEMSET=y > CONFIG_ERRNO_STR=y > +CONFIG_DM_VIDEO=y > +CONFIG_VIDEO_BPP16=y > +CONFIG_VIDEO_BPP32=y > +CONFIG_DISPLAY=y > +CONFIG_VIDEO_ROCKCHIP=y > +CONFIG_DISPLAY_ROCKCHIP_HDMI=y > diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig > index d540a17aeb..be76524cef 100644 > --- a/configs/roc-pc-rk3399_defconfig > +++ b/configs/roc-pc-rk3399_defconfig > @@ -59,3 +59,9 @@ CONFIG_USB_ETHER_SMSC95XX=y > CONFIG_USB_KEYBOARD=y > CONFIG_SPL_TINY_MEMSET=y > CONFIG_ERRNO_STR=y > +CONFIG_DM_VIDEO=y > +CONFIG_VIDEO_BPP16=y > +CONFIG_VIDEO_BPP32=y > +CONFIG_DISPLAY=y > +CONFIG_VIDEO_ROCKCHIP=y > +CONFIG_DISPLAY_ROCKCHIP_HDMI=y > diff --git a/configs/rock960-rk3399_defconfig > b/configs/rock960-rk3399_defconfig > index ba4226e173..c4e954731a 100644 > --- a/configs/rock960-rk3399_defconfig > +++ b/configs/rock960-rk3399_defconfig > @@ -58,5 +58,12 @@ CONFIG_USB_ETHER_ASIX88179=y > CONFIG_USB_ETHER_MCS7830=y > CONFIG_USB_ETHER_RTL8152=y > CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_USB_KEYBOARD=y > CONFIG_SPL_TINY_MEMSET=y > CONFIG_ERRNO_STR=y > +CONFIG_DM_VIDEO=y > +CONFIG_VIDEO_BPP16=y > +CONFIG_VIDEO_BPP32=y > +CONFIG_DISPLAY=y > +CONFIG_VIDEO_ROCKCHIP=y > +CONFIG_DISPLAY_ROCKCHIP_HDMI=y > diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h > index c0b0358893..2d3db22877 100644 > --- a/include/configs/evb_rk3399.h > +++ b/include/configs/evb_rk3399.h > @@ -6,6 +6,11 @@ > #ifndef __EVB_RK3399_H > #define __EVB_RK3399_H > > +#define ROCKCHIP_DEVICE_SETTINGS \ > + "stdin=serial,usbkbd\0" \ > + "stdout=serial,vidconsole\0" \ > + "stderr=serial,vidconsole\0" > + > #include > > #if defined(CONFIG_ENV_IS_IN_MMC) > diff --git a/include/configs/rock960_rk3399.h > b/include/configs/rock960_rk3399.h > index 746d24cbff..304ad2b7aa 100644 > --- a/include/configs/rock960_rk3399.h > +++ b/include/configs/rock960_rk3399.h > @@ -6,6 +6,11 @@ > #ifndef __ROCK960_RK3399_H > #define __ROCK960_RK3399_H > > +#define ROCKCHIP_DEVICE_SETTINGS \ > + "stdin=serial,usbkbd\0" \ > + "stdout=serial,vidconsole\0" \ > + "stderr=serial,vidconsole\0" > + > #include > > #define CONFIG_SYS_MMC_ENV_DEV 1 > -- > 2.17.1 >
Re: [PATCH] ARM: dts: stm32: Temporarily drop cd-gpios from AV96 DT
On Thu, Apr 02, 2020 at 06:53:41PM +0200, Marek Vasut wrote: > The card-detect GPIO and any other GPIO access currently doesn't work in > U-Boot SPL on any STM32 platform and crashes the SPL. To work around this > problem on AV96 right before release, remove the cd-gpios from DT. This > patch must be reverted right after release, once the proper fix for the > GPIO driver, "gpio: stm32: support gpio ops in SPL", is applied. > > Signed-off-by: Marek Vasut Acked-by: Manivannan Sadhasivam Thanks, Mani > Cc: Manivannan Sadhasivam > Cc: Patrick Delaunay > Cc: Patrice Chotard > Cc: Tom Rini > --- > NOTE: I think it's OK if Tom picks this one directly to reduce load on > the ST people, since this is isolated to a single board. > --- > arch/arm/dts/stm32mp157a-avenger96.dts | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/arch/arm/dts/stm32mp157a-avenger96.dts > b/arch/arm/dts/stm32mp157a-avenger96.dts > index 1f32395e71..b23fa6dee0 100644 > --- a/arch/arm/dts/stm32mp157a-avenger96.dts > +++ b/arch/arm/dts/stm32mp157a-avenger96.dts > @@ -353,7 +353,6 @@ > pinctrl-0 = <_b4_pins_a _dir_pins_b>; > pinctrl-1 = <_b4_od_pins_a _dir_pins_b>; > pinctrl-2 = <_b4_sleep_pins_a _dir_sleep_pins_b>; > - cd-gpios = < 8 GPIO_ACTIVE_LOW>; > disable-wp; > st,sig-dir; > st,neg-edge; > -- > 2.25.1 >
Re: [PATCH v9 03/12] serial: actions: add compatible string
On Sun, Apr 05, 2020 at 11:08:21AM +0100, André Przywara wrote:
> On 05/04/2020 07:59, Manivannan Sadhasivam wrote:
> > On Wed, Apr 01, 2020 at 12:49:26PM +0530, Amit Singh Tomar wrote:
> >> This patch adds "actions,owl-uart" string to the owl uart driver. It
> >> is also defined in Linux kernel.
> >>
> >> Reviewed-by: Andre Przywara
> >> Signed-off-by: Amit Singh Tomar
> >> ---
> >> Changes since v8:
> >> * No changes.
> >> Changes since v7:
> >> * No changes.
> >> Changes since v6:
> >> * Added Reviewd-by tag.
> >> Changes since v5:
> >> * Moved it to from 06/11 to 03/11.
> >> * Used appropriate commit message.
> >> * Removed the reviwed-by tag.
> >> Changes since v4:
> >> * Moved it to from 09/11 to 06/11.
> >> Changes since v3:
> >> * Used only owl-uart for compatible string.
> >> Changes since v2:
> >> * No changes.
> >> Changes since v1:
> >> * No changes.
> >> ---
> >> drivers/serial/serial_owl.c | 1 +
> >> 1 file changed, 1 insertion(+)
> >>
> >> diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c
> >> index 7ead73e..539acdc 100644
> >> --- a/drivers/serial/serial_owl.c
> >> +++ b/drivers/serial/serial_owl.c
> >> @@ -121,6 +121,7 @@ static const struct dm_serial_ops owl_serial_ops = {
> >>
> >> static const struct udevice_id owl_serial_ids[] = {
> >>{ .compatible = "actions,s900-serial" },
> >
> > This should've been removed here itself as opposed to in devicetree sync
> > patch.
>
> But this would break S900, because the Bubblegum DT still uses that string.
> If you sync the DT before, you have a similar problem, so we have to
> change the DT and the driver string in *one* patch, which is what patch
> 04/12 does.
>
Hmm... chicken & egg problem :) Let's keep it as it is.
Thanks,
Mani
> Cheers,
> Andre
>
> > But I don't warrant a new series for this change.
> >
> > Reviewed-by: Manivannan Sadhasivam
> >
> > Thanks,
> > Mani
> >
> >> + { .compatible = "actions,owl-uart" },
> >>{ }
> >> };
> >>
> >> --
> >> 2.7.4
> >>
>
Re: [PATCH v9 00/12] Actions S700 SoC support
Hi Amit, On Wed, Apr 01, 2020 at 12:49:23PM +0530, Amit Singh Tomar wrote: > This adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], It's > Quad-core ARMv8 SoC > with Cortex-A53 cores. Peripheral like UART seems to be compatible with S900 > SoC(basic support > for it is alreay present in u-boot). > > This series(v9) fixes a Bug that breaks bubblegum96 board boot(reported by > Mani). It was > due to fact that driver data read is not proper in the clock driver. There > are changes in > patch 06/12 to fix it. > > Previous series(v8) removes the SoC specific include instead just uses > owl-common. For this > patch 01/12 and 09/12 changes a bit. > > Series(v7) fixes a serious Bug that breaks S900, it was there since v5.Thanks > to Andre > for pointing it out. > > Series(v6)[3] does following changes: > > * [PATCH v5 06/11] becomes [PATCH v6 03/11] > * [PATCH v5 03/11] becomes [PATCH v6 04/11] > * Introduce a new patch to move defconfig options to Kconfig which is [PATCH > v6 10/12] > > Series(v5)[4] just re-orders the patches so that U-BOOT(with > bubblegum96_defconfig) builds > after every patch of the series(suggested by Andre). > > S700 support is tested[5] on Cubieboard7 board and S900 support is just > compiled tested. > > This patch series can be tested using below tree: > https://github.com/Atomar25/u-boot/commits/s700_v9 > Many thanks for your patience and continuous effort! I have now reviewed the series. Mostly is looks very good now. I just had few nit picks which you can address in v10. This series won't make it for v2020.04 but that's not critical IMO. Andre, thanks to you too for helping with the reviews. Much appreciated! Thanks, Mani > [1]: http://www.cubietech.com/product-detail/cubieboard7/ > [2]: http://www.actions-semi.com/en/productview.aspx?id=225 > [3]: > http://u-boot.10912.n7.nabble.com/PATCH-v6-00-12-Actions-S700-SoC-support-td403562.html#a403567 > [4]: > http://u-boot.10912.n7.nabble.com/PATCH-v5-00-11-Actions-S700-SoC-support-td402752.html#a402762 > [5]: https://paste.ubuntu.com/p/6HWYM3bwr6/ > > Amit Singh Tomar (12): > arm: actions: Add common framework for Actions Owl Semi SoCs > arm: actions: rename sysmap-s900 to sysmap-owl > serial: actions: add compatible string > arm: dts: sync dts for Action Semi S900 > arm: dts: actions: s900: add u-boot specific dtsi file > clk: actions: Add common clock driver > arm: actions: add S700 SoC device tree > arm: dts: actions: s700: add u-boot specific dtsi file > arm: add support Actions Semi S700 > actions: Move defconfig options to Kconfig > arm: add Cubieboard7 board support > doc: boards: add Cubieboard7 documentation > > MAINTAINERS| 2 + > arch/arm/Kconfig | 5 +- > arch/arm/dts/Makefile | 6 +- > arch/arm/dts/s700-cubieboard7.dts | 92 +++ > arch/arm/dts/s700-u-boot.dtsi | 18 ++ > arch/arm/dts/s700.dtsi | 248 +++ > arch/arm/dts/s900-u-boot.dtsi | 17 ++ > arch/arm/dts/s900.dtsi | 322 > +++-- > arch/arm/include/asm/arch-owl/clk_s900.h | 57 - > arch/arm/include/asm/arch-owl/regs_s700.h | 56 + > arch/arm/mach-owl/Kconfig | 50 ++-- > arch/arm/mach-owl/Makefile | 3 +- > arch/arm/mach-owl/soc.c| 57 + > arch/arm/mach-owl/sysmap-owl.c | 32 +++ > arch/arm/mach-owl/sysmap-s900.c| 32 --- > board/ucRobotics/bubblegum_96/Kconfig | 15 -- > board/ucRobotics/bubblegum_96/MAINTAINERS | 6 - > board/ucRobotics/bubblegum_96/Makefile | 3 - > board/ucRobotics/bubblegum_96/bubblegum_96.c | 57 - > configs/bubblegum_96_defconfig | 12 +- > configs/cubieboard7_defconfig | 9 + > doc/board/actions/cubieboard7.rst | 115 + > doc/board/actions/index.rst| 10 + > doc/board/index.rst| 1 + > drivers/clk/owl/Kconfig| 8 +- > drivers/clk/owl/Makefile | 2 +- > drivers/clk/owl/clk_owl.c | 153 > drivers/clk/owl/clk_owl.h | 65 + > drivers/clk/owl/clk_s900.c | 137 --- > drivers/serial/serial_owl.c| 2 +- > include/configs/bubblegum_96.h | 40 --- > include/configs/owl-common.h | 40 +++ > include/configs/s700.h | 13 + > include/configs/s900.h | 16 ++ > include/dt-bindings/clock/actions,s700-cmu.h | 118 + > include/dt-bindings/clock/actions,s900-cmu.h | 129 ++ > include/dt-bindings/clock/s900_cmu.h | 77 -- >
Re: [PATCH v9 12/12] doc: boards: add Cubieboard7 documentation
On Wed, Apr 01, 2020 at 12:49:35PM +0530, Amit Singh Tomar wrote: > This adds build and flash steps for Actions S700 > based Cubieboard7 board. > > Signed-off-by: Amit Singh Tomar > --- > Changes since v8: > * No changes. > Changes since v7: > * No changes. > Changes since v6: > * No changes. > Changes since v5: > * No changes. > Changes since v4: > * No changes. > Changes since v3: > * Convert plain text documentation to reStructuredText format. > Changes since v2: > * No Change. > Changes since v1: > * No Change. > --- > doc/board/actions/cubieboard7.rst | 115 > ++ > doc/board/actions/index.rst | 10 > doc/board/index.rst | 1 + > 3 files changed, 126 insertions(+) > create mode 100644 doc/board/actions/cubieboard7.rst > create mode 100644 doc/board/actions/index.rst > > diff --git a/doc/board/actions/cubieboard7.rst > b/doc/board/actions/cubieboard7.rst > new file mode 100644 > index 000..ce39e6b > --- /dev/null > +++ b/doc/board/actions/cubieboard7.rst > @@ -0,0 +1,115 @@ > +.. SPDX-License-Identifier: GPL-2.0+ > +.. Copyright (C) 2020 Amit Singh Tomar > + > +ACTIONS > + I don't think ACTIONS heading is needed here. Change it to Cubieboard7 instead. > + > +About this > +-- > + > +This document describes build and flash steps for Actions S700 SoC based > Cubieboard7 > +board. > + > +Cubieboard7 initial configuration > +- > + > +Default Cubieboard7 comes with pre-installed Android where U-Boot is > configured with > +a bootdelay of 0, entering a prompt by pressing keys does not seem to work. > + > +Though, one can enter ADFU mode and flash debian image(from host machine) > where > +getting into u-boot prompt is easy. > + > +Enter ADFU Mode > + > + > +Before write the firmware, let the development board entering the ADFU mode: > insert > +one end of the USB cable to the PC, press and hold the ADFU button, and then > connect > +the other end of the USB cable to the Mini USB port of the development > board, release > +the ADFU button, after connecting it will enter the ADFU mode. > + > +Check whether entered ADFU Mode > + > + > +The user needs to run the following command on the PC side to check if the > ADFU > +device is detected. ID realted to "Actions Semiconductor Co., Ltd" means > that > +the PC side has been correctly detected ADFU device, the development board > +also enter into the ADFU mode. > + > +.. code-block:: none > + > + $ lsusb > + Bus 001 Device 005: ID 04f2:b2eb Chicony Electronics Co., Ltd > + Bus 001 Device 004: ID 0a5c:21e6 Broadcom Corp. BCM20702 Bluetooth 4.0 > [ThinkPad] > + Bus 001 Device 003: ID 046d:c534 Logitech, Inc. Unifying Receiver > + Bus 001 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub > + Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub > + Bus 004 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub > + Bus 003 Device 013: ID 10d6:10d6 Actions Semiconductor Co., Ltd > + Bus 003 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub > + > +Flashing debian image > +- > + > +.. code-block:: none > + > + $ sudo ./ActionsFWU.py --fw=debian-stretch-desktop-cb7-emmc-v2.0.fw > + ActionsFWU.py : 1.0.150828.0830 > + libScript.so: 2.3.150825.0951 > + libFileSystem.so: 2.3.150825.0952 > + libProduction.so: 2.3.150915.1527 > + =burn all partition > + FW_VER: 3.10.37.180608 > + 3% DOWNLOAD ADFUDEC ... > + 5% DOWNLOAD BOOT PARA ... > + 7% SWITCH ADFUDEC ... > + 12% DOWNLOAD BL31 ... > + 13% DOWNLOAD BL32 ... > + 15% DOWNLOAD VMLINUX ... > + 20% DOWNLOAD INITRD ... > + 24% DOWNLOAD FDT ... > + 27% DOWNLOAD ADFUS ... > + 30% SWITCH ADFUS ... > + 32% DOWNLOAD MBR ... > + 35% DOWNLOAD PARTITIONS ... > + WRITE_MBRC_PARTITION > + 35% write p0 size = 2048 : ok > + WRITE_BOOT_PARTITION > + 35% write p1 size = 2048 : ok > + WRITE_MISC_PARTITION > + 36% write p2 size = 98304 : ok > + WRITE_SYSTEM_PARTITION > + 94% write p3 size = 4608000 : ok > + FORMAT_SWAP_PARTITION > + 94% write p4 size = 20480 : ok > + 95% TRANSFER OVER ... > + Firmware upgrade successfully! > + > +Debian image can be downloaded from here[1]. > + > +Once debian image is flashed, one can get into u-boot prompt by pressing any > key and from > +there run ums command(make sure, usb cable is connected between host and > target): > + > +.. code-block:: none > + > + owl> ums 0 mmc 1 > + > +Above command would mount debian image partition on host machine. > + > +Building U-BOOT proper image > + > + > +.. code-block:: none > + > + $ make clean > + $ export CROSS_COMPILE=aarch64-linux-gnu- > + $ make ARCH=arm cubieboard7_defconfig > + $ make -j16 > + $ mkimage -A arm -T firmware -C none -O u-boot
Re: [PATCH v9 11/12] arm: add Cubieboard7 board support
On Wed, Apr 01, 2020 at 12:49:34PM +0530, Amit Singh Tomar wrote:
> The Cubieboard is a single board computer containing a
> Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).
>
> This patch adds respective defconfig alongwith .dts(copied
> from Linux v5.5-rc6 with hash "b3a987b0264d").
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
> ---
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * Added Reviewed-by tag.
> Changes since v5:
> * Trimmed of the cubieboard7_defconfig.
> Changes since v4:
> * No changes.
> Changes since v3:
> * added reviewed-by: tag.
> Changes since v2:
> * No changes.
> Changes since v1:
> * No changes.
> ---
> arch/arm/dts/s700-cubieboard7.dts | 92
> +++
> configs/cubieboard7_defconfig | 9
> 2 files changed, 101 insertions(+)
> create mode 100644 arch/arm/dts/s700-cubieboard7.dts
> create mode 100644 configs/cubieboard7_defconfig
>
> diff --git a/arch/arm/dts/s700-cubieboard7.dts
> b/arch/arm/dts/s700-cubieboard7.dts
> new file mode 100644
> index 000..63e375c
> --- /dev/null
> +++ b/arch/arm/dts/s700-cubieboard7.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
> +
> +/dts-v1/;
> +
> +#include "s700.dtsi"
> +
> +/ {
> + compatible = "cubietech,cubieboard7", "actions,s700";
> + model = "CubieBoard7";
> +
> + aliases {
> + serial3 =
> + };
> +
> + chosen {
> + stdout-path = "serial3:115200n8";
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x8000>;
> + };
> +
> + memory@1,e000 {
> + device_type = "memory";
> + reg = <0x1 0xe000 0x0 0x0>;
> + };
> +};
> +
> + {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + status = "disabled";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + i2c0_default: i2c0_default {
> + pinmux {
> + groups = "i2c0_mfp";
> + function = "i2c0";
> + };
> + pinconf {
> + pins = "i2c0_sclk", "i2c0_sdata";
> + bias-pull-up;
> + };
> + };
> +
> + i2c1_default: i2c1_default {
> + pinmux {
> + groups = "i2c1_dummy";
> + function = "i2c1";
> + };
> + pinconf {
> + pins = "i2c1_sclk", "i2c1_sdata";
> + bias-pull-up;
> + };
> + };
> +
> + i2c2_default: i2c2_default {
> + pinmux {
> + groups = "i2c2_dummy";
> + function = "i2c2";
> + };
> + pinconf {
> + pins = "i2c2_sclk", "i2c2_sdata";
> + bias-pull-up;
> + };
> + };
> +};
> +
> + {
> + clocks = <>;
> +};
> +
> + {
> + status = "okay";
> +};
> diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig
> new file mode 100644
> index 000..d12c293
> --- /dev/null
> +++ b/configs/cubieboard7_defconfig
> @@ -0,0 +1,9 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_OWL=y
> +CONFIG_MACH_S700=y
> +CONFIG_IDENT_STRING="\ncubieboard7"
> +CONFIG_BOOTDELAY=5
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7"
> --
> 2.7.4
>
Re: [PATCH v9 10/12] actions: Move defconfig options to Kconfig
On Wed, Apr 01, 2020 at 12:49:33PM +0530, Amit Singh Tomar wrote: > This patch moves some of the config options from bubblegum_96_defconfig > to platform specific Kconfig file. > > Reviewed-by: Andre Przywara > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes since v8: > * No changes. > Changes since v7: > * No changes. > Changes since v6: > * remove unnecessary string from SYS_PROMPT. > Changes since v5: > * Newly added patch, was not there in earlier versions. > --- > arch/arm/mach-owl/Kconfig | 15 +++ > configs/bubblegum_96_defconfig | 5 - > 2 files changed, 15 insertions(+), 5 deletions(-) > > diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig > index cde2ade..2b5d725 100644 > --- a/arch/arm/mach-owl/Kconfig > +++ b/arch/arm/mach-owl/Kconfig > @@ -24,4 +24,19 @@ config SYS_SOC > default "s900" if MACH_S900 > default "s700" if MACH_S700 > > +config DISTRO_DEFAULTS > + default y > + > +config NR_DRAM_BANKS > + default 1 > + > +config SYS_RELOC_GD_ENV_ADDR > + default y > + > +config SYS_PROMPT > + default "U-Boot => " > + > +config DISPLAY_BOARDINFO > + default n > + > endif > diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig > index e76e9a2..0883167 100644 > --- a/configs/bubblegum_96_defconfig > +++ b/configs/bubblegum_96_defconfig > @@ -1,19 +1,14 @@ > CONFIG_ARM=y > CONFIG_ARCH_OWL=y > CONFIG_ENV_SIZE=0x2000 > -CONFIG_NR_DRAM_BANKS=1 > CONFIG_MACH_S900=y > CONFIG_IDENT_STRING="\nBubblegum-96" > -CONFIG_DISTRO_DEFAULTS=y > CONFIG_BOOTDELAY=5 > CONFIG_USE_BOOTARGS=y > CONFIG_BOOTARGS="console=ttyOWL5,115200n8" > # CONFIG_DISPLAY_CPUINFO is not set > -# CONFIG_DISPLAY_BOARDINFO is not set > -CONFIG_SYS_PROMPT="U-Boot => " > CONFIG_CMD_MD5SUM=y > CONFIG_CMD_MEMINFO=y > CONFIG_CMD_CACHE=y > CONFIG_CMD_TIMER=y > CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" > -CONFIG_SYS_RELOC_GD_ENV_ADDR=y > -- > 2.7.4 >
Re: [PATCH v9 08/12] arm: dts: actions: s700: add u-boot specific dtsi file
On Wed, Apr 01, 2020 at 12:49:31PM +0530, Amit Singh Tomar wrote:
> Devices like uart and clk are needed to be enabled before relocation.
> this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * No changes.
> Changes since v5:
> * Added reviwed-by tag.
> Changes since v4:
> * Moved it to 08/11 to 06/11.
> Changes since v3:
> * Replaced dtsi with dts in subject line along with arm:dts:
> to the prefix.
> Changes since v2:
> * Added License.
> Changes since v1:
> * This is newly added file that was *not* present in v1 and
> contains u-boot specific changes.
> ---
> arch/arm/dts/s700-u-boot.dtsi | 18 ++
> 1 file changed, 18 insertions(+)
> create mode 100644 arch/arm/dts/s700-u-boot.dtsi
>
> diff --git a/arch/arm/dts/s700-u-boot.dtsi b/arch/arm/dts/s700-u-boot.dtsi
> new file mode 100644
> index 000..a527ccc
> --- /dev/null
> +++ b/arch/arm/dts/s700-u-boot.dtsi
> @@ -0,0 +1,18 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2020 Amit Singh Tomar
> + */
> +
> +/{
> + soc {
> + u-boot,dm-pre-reloc;
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> --
> 2.7.4
>
Re: [PATCH v9 09/12] arm: add support Actions Semi S700
On Wed, Apr 01, 2020 at 12:49:32PM +0530, Amit Singh Tomar wrote: > This patch adds basic support for Actions Semi based S700 > SoC, which is driven by common owl framework. > > Reviewed-by: Andre Przywara > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes since v8: > * Added Reviewed-by tag. > Changes since v7: > * Removed S700 include file. > Changes since v6: > * No changes. > Changes since v5: > * Added reviewed-by tag. > Changes since v4: > * Moved it to 09/11 to 04/11. > Changes since v3: > * Added "SoC" keyword to Actions Semi S700. > Changes since v2: > * Fixed the commit message. > * Checked for the clk->id. > * Added a .data member with SoC type. > * Removed #ifdefs from few places. > Changes since v1: > * Moved CLK and CLK_OWL symbols from defconfig to arch/arm/Kconfig. > --- > arch/arm/mach-owl/Kconfig | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig > index 28984c1..cde2ade 100644 > --- a/arch/arm/mach-owl/Kconfig > +++ b/arch/arm/mach-owl/Kconfig > @@ -8,6 +8,10 @@ config MACH_S900 > bool "Actions Semi S900 SoC" > select ARM64 > > +config MACH_S700 > +bool "Actions Semi S700 SoC" > +select ARM64 > + > endchoice > > config SYS_TEXT_BASE > @@ -18,5 +22,6 @@ config SYS_CONFIG_NAME > > config SYS_SOC > default "s900" if MACH_S900 > +default "s700" if MACH_S700 > > endif > -- > 2.7.4 >
Re: [PATCH v9 07/12] arm: actions: add S700 SoC device tree
On Wed, Apr 01, 2020 at 12:49:30PM +0530, Amit Singh Tomar wrote:
> This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
> and required binding for S700 SoC that is a 64-bit Quad-core ARM
> Cortex-A53 cores.
>
> It also provisions dts file to be built based on selected
> platform(CONFIG_MACH_S900/S700).
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * No changes.
> Changes since v5:
> * Added reviwed-by tag.
> Changes since v4:
> * Move it to 07/11 from 05/11.
> Changes since v3:
> * Updated commit message to the Linux tag to
> which the dtsi file is synced.
> Changes since v2:
> * Synced DTS bindings with Linux 5.5.
> Changes since v1:
> * Moved the u-boot specific changes to s700-u-boot.dtsi, now
> s700.dtsi is in complete sync with Linux 4.20.
> ---
> arch/arm/dts/Makefile | 6 +-
> arch/arm/dts/s700.dtsi | 248
> +
> include/dt-bindings/clock/actions,s700-cmu.h | 118
> include/dt-bindings/reset/actions,s700-reset.h | 34
> 4 files changed, 404 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/dts/s700.dtsi
> create mode 100644 include/dt-bindings/clock/actions,s700-cmu.h
> create mode 100644 include/dt-bindings/reset/actions,s700-reset.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 9c593b2..308c76b 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -64,8 +64,10 @@ dtb-$(CONFIG_KIRKWOOD) += \
> kirkwood-pogo_e02.dtb \
> kirkwood-sheevaplug.dtb
>
> -dtb-$(CONFIG_ARCH_OWL) += \
> - bubblegum_96.dtb
> +dtb-$(CONFIG_MACH_S900) += \
> +bubblegum_96.dtb
Can you please move above change to S900 dts sync patch? Other than this,
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> +dtb-$(CONFIG_MACH_S700) += \
> +s700-cubieboard7.dtb
>
> dtb-$(CONFIG_ROCKCHIP_PX30) += \
> px30-evb.dtb \
> diff --git a/arch/arm/dts/s700.dtsi b/arch/arm/dts/s700.dtsi
> new file mode 100644
> index 000..2006ad5
> --- /dev/null
> +++ b/arch/arm/dts/s700.dtsi
> @@ -0,0 +1,248 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
> +
> +#include
> +#include
> +#include
> +
> +/ {
> + compatible = "actions,s700";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secmon@1f00 {
> + reg = <0x0 0x1f00 0x0 0x100>;
> + no-map;
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = ,
> + ,
> + ,
> + ;
> + interrupt-affinity = <>, <>, <>, <>;
> +
Re: [PATCH v9 06/12] clk: actions: Add common clock driver
On Wed, Apr 01, 2020 at 12:49:29PM +0530, Amit Singh Tomar wrote:
> This patch converts S900 clock driver to something common that can
> be used for other SoCs, for instance S700(few of clk registers are same).
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v8:
> * Fixed the bubblegum-96 boot issue by introducing
> dev_get_driver_data API to read driver data.
> Changes since v7:
> * No changes.
> Changes since v6:
> * Fixed the bug that breaks S900(missing break in switch statement).
> Changes since v5:
> * No changes.
> Changes since v4:
> * This patch is re-ordered, moved from 08/11 to 04/11.
> Changes since v3:
> * Replaced dtsi with dts in subject line along with arm:dts:
> to the prefix.
> * Added reviewed-by tag.
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/Kconfig | 2 +
> arch/arm/include/asm/arch-owl/clk_s900.h | 57 ---
> arch/arm/include/asm/arch-owl/regs_s700.h | 56 +++
> configs/bubblegum_96_defconfig| 3 -
> drivers/clk/owl/Kconfig | 8 +-
> drivers/clk/owl/Makefile | 2 +-
> drivers/clk/owl/clk_owl.c | 155
> ++
> drivers/clk/owl/clk_owl.h | 64
> drivers/clk/owl/clk_s900.c| 137 --
> 9 files changed, 280 insertions(+), 204 deletions(-)
> delete mode 100644 arch/arm/include/asm/arch-owl/clk_s900.h
> create mode 100644 arch/arm/include/asm/arch-owl/regs_s700.h
> create mode 100644 drivers/clk/owl/clk_owl.c
> create mode 100644 drivers/clk/owl/clk_owl.h
> delete mode 100644 drivers/clk/owl/clk_s900.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index de6b7f9..05658cf 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -876,6 +876,8 @@ config ARCH_OWL
> select DM
> select DM_SERIAL
> select OWL_SERIAL
> + select CLK
> + select CLK_OWL
> select OF_CONTROL
> imply CMD_DM
>
> diff --git a/arch/arm/include/asm/arch-owl/clk_s900.h
> b/arch/arm/include/asm/arch-owl/clk_s900.h
> deleted file mode 100644
> index 88e88f7..000
> --- a/arch/arm/include/asm/arch-owl/clk_s900.h
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * Actions Semi S900 Clock Definitions
> - *
> - * Copyright (C) 2015 Actions Semi Co., Ltd.
> - * Copyright (C) 2018 Manivannan Sadhasivam
>
> - *
> - */
> -
> -#ifndef _OWL_CLK_S900_H_
> -#define _OWL_CLK_S900_H_
> -
> -#include
> -
> -struct owl_clk_priv {
> - phys_addr_t base;
> -};
> -
> -/* BUSCLK register definitions */
> -#define CMU_PDBGDIV_87
> -#define CMU_PDBGDIV_SHIFT26
> -#define CMU_PDBGDIV_DIV (CMU_PDBGDIV_8 << CMU_PDBGDIV_SHIFT)
> -#define CMU_PERDIV_8 7
> -#define CMU_PERDIV_SHIFT 20
> -#define CMU_PERDIV_DIV (CMU_PERDIV_8 << CMU_PERDIV_SHIFT)
> -#define CMU_NOCDIV_2 1
> -#define CMU_NOCDIV_SHIFT 19
> -#define CMU_NOCDIV_DIV (CMU_NOCDIV_2 << CMU_NOCDIV_SHIFT)
> -#define CMU_DMMCLK_SRC_APLL 2
> -#define CMU_DMMCLK_SRC_SHIFT 10
> -#define CMU_DMMCLK_SRC (CMU_DMMCLK_SRC_APLL <<
> CMU_DMMCLK_SRC_SHIFT)
> -#define CMU_APBCLK_DIV BIT(8)
> -#define CMU_NOCCLK_SRC BIT(7)
> -#define CMU_AHBCLK_DIV BIT(4)
> -#define CMU_CORECLK_MASK 3
> -#define CMU_CORECLK_CPLL BIT(1)
> -#define CMU_CORECLK_HOSC BIT(0)
> -
> -/* COREPLL register definitions */
> -#define CMU_COREPLL_EN BIT(9)
> -#define CMU_COREPLL_HOSC_EN BIT(8)
> -#define CMU_COREPLL_OUT (1104 / 24)
> -
> -/* DEVPLL register definitions */
> -#define CMU_DEVPLL_CLK BIT(12)
> -#define CMU_DEVPLL_ENBIT(8)
> -#define CMU_DEVPLL_OUT (660 / 6)
> -
> -/* UARTCLK register definitions */
> -#define CMU_UARTCLK_SRC_DEVPLL BIT(16)
> -
> -/* DEVCLKEN1 register definitions */
> -#define CMU_DEVCLKEN1_UART5 BIT(21)
> -
> -#define PLL_STABILITY_WAIT_US50
> -
> -#endif
> diff --git a/arch/arm/include/asm/arch-owl/regs_s700.h
> b/arch/arm/include/asm/arch-owl/regs_s700.h
> new file mode 100644
> index 000..2f21c15
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-owl/regs_s700.h
> @@ -0,0 +1,56 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Actions Semi S700 Register Definitions
> + *
Re: [PATCH v9 02/12] arm: actions: rename sysmap-s900 to sysmap-owl
On Wed, Apr 01, 2020 at 12:49:25PM +0530, Amit Singh Tomar wrote:
> Now that memory maps(for both S700 and S900 SoCs) can be managed using
> a common file, rename sysmap-s900 to sysmap-owl to reflect the same.
>
> Reviewed-by: Manivannan Sadhasivam
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * No changes.
> Changes since v5:
> * No changes.
> Changes since v4:
> * No changes.
> Changes since v3:
> * Added reviewed-by tag.
> Changes since v2:
> * Fixed the commit message and header.
> Changes since v1:
> * compile sysmap-owl.c against CONFIG_ARM64 now.
> ---
> arch/arm/mach-owl/Makefile | 2 +-
> arch/arm/mach-owl/sysmap-owl.c | 32
> arch/arm/mach-owl/sysmap-s900.c | 32
> 3 files changed, 33 insertions(+), 33 deletions(-)
> create mode 100644 arch/arm/mach-owl/sysmap-owl.c
> delete mode 100644 arch/arm/mach-owl/sysmap-s900.c
>
> diff --git a/arch/arm/mach-owl/Makefile b/arch/arm/mach-owl/Makefile
> index 0b181c6..f3a69eb 100644
> --- a/arch/arm/mach-owl/Makefile
> +++ b/arch/arm/mach-owl/Makefile
> @@ -1,4 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0+
>
> obj-y += soc.o
> -obj-y += sysmap-s900.o
> +obj-$(CONFIG_ARM64) += sysmap-owl.o
> diff --git a/arch/arm/mach-owl/sysmap-owl.c b/arch/arm/mach-owl/sysmap-owl.c
> new file mode 100644
> index 000..81f6ca2
> --- /dev/null
> +++ b/arch/arm/mach-owl/sysmap-owl.c
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Memory map for Actions Semi Owl series SoCs.
> + *
> + * Copyright (C) 2015 Actions Semi Co., Ltd.
> + * Copyright (C) 2018 Manivannan Sadhasivam
>
> + */
> +
> +#include
> +#include
> +
> +static struct mm_region owl_mem_map[] = {
> + {
> + .virt = 0x0UL, /* DDR */
> + .phys = 0x0UL, /* DDR */
> + .size = 0x8000UL,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> + PTE_BLOCK_INNER_SHARE
> + }, {
> + .virt = 0xE000UL, /* Peripheral block */
> + .phys = 0xE000UL, /* Peripheral block */
> + .size = 0x0800UL,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> + PTE_BLOCK_NON_SHARE |
> + PTE_BLOCK_PXN | PTE_BLOCK_UXN
> + }, {
> + /* List terminator */
> + 0,
> + }
> +};
> +
> +struct mm_region *mem_map = owl_mem_map;
> diff --git a/arch/arm/mach-owl/sysmap-s900.c b/arch/arm/mach-owl/sysmap-s900.c
> deleted file mode 100644
> index f78b639..000
> --- a/arch/arm/mach-owl/sysmap-s900.c
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Actions Semi S900 Memory map
> - *
> - * Copyright (C) 2015 Actions Semi Co., Ltd.
> - * Copyright (C) 2018 Manivannan Sadhasivam
>
> - */
> -
> -#include
> -#include
> -
> -static struct mm_region s900_mem_map[] = {
> - {
> - .virt = 0x0UL, /* DDR */
> - .phys = 0x0UL, /* DDR */
> - .size = 0x8000UL,
> - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> - PTE_BLOCK_INNER_SHARE
> - }, {
> - .virt = 0xE000UL, /* Peripheral block */
> - .phys = 0xE000UL, /* Peripheral block */
> - .size = 0x0800UL,
> - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> - PTE_BLOCK_NON_SHARE |
> - PTE_BLOCK_PXN | PTE_BLOCK_UXN
> - }, {
> - /* List terminator */
> - 0,
> - }
> -};
> -
> -struct mm_region *mem_map = s900_mem_map;
> --
> 2.7.4
>
Re: [PATCH v9 05/12] arm: dts: actions: s900: add u-boot specific dtsi file
On Wed, Apr 01, 2020 at 12:49:28PM +0530, Amit Singh Tomar wrote:
> Devices like uart and clk are needed to be enabled before relocation.
> This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.
>
> Reviewed-by: Manivannan Sadhasivam
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * No changes.
> Changes since v5:
> * No changes.
> Changes since v4:
> * This patch is re-ordered, moved from 08/11 to 04/11.
> Changes since v3:
> * Replaced dtsi with dts in subject line along with arm:dts:
> to the prefix.
> * Added reviewed-by tag.
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/dts/s900-u-boot.dtsi | 17 +
> 1 file changed, 17 insertions(+)
> create mode 100644 arch/arm/dts/s900-u-boot.dtsi
>
> diff --git a/arch/arm/dts/s900-u-boot.dtsi b/arch/arm/dts/s900-u-boot.dtsi
> new file mode 100644
> index 000..a95f2cc
> --- /dev/null
> +++ b/arch/arm/dts/s900-u-boot.dtsi
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + */
> +
> +/{
> + soc {
> + u-boot,dm-pre-reloc;
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> --
> 2.7.4
>
Re: [PATCH v9 04/12] arm: dts: sync dts for Action Semi S900
On Wed, Apr 01, 2020 at 12:49:27PM +0530, Amit Singh Tomar wrote:
> Synchronize device tree bindings with v5.5-rc6 tag with commit id
> "b3a987b0264d".
>
> Also, it removes older clock binding defined for S900 along with undocumented
> compatible string "actions,s900-serial" from serial driver and adapts clock
> driver to cater to new bindings.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * Added Reviewed-by tag.
> Changes since v5:
> * Moved it 04/11 from 03/11.
> * removed the undocumented compatible string "actions,s900-serial".
> * removed the reviewed-by tag.
> Changes since v4:
> * This patch is re-ordered, moved from 07/11 to 03/11.
> * Used the commit-id(12 chars long) in commit message.
> Changes since v3:
> * Added Reviewed-by: tag.
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/dts/s900.dtsi | 322
> +++--
> drivers/clk/owl/clk_s900.c | 6 +-
> drivers/serial/serial_owl.c| 1 -
> include/dt-bindings/clock/actions,s900-cmu.h | 129 ++
> include/dt-bindings/clock/s900_cmu.h | 77 --
> include/dt-bindings/reset/actions,s900-reset.h | 65 +
> 6 files changed, 498 insertions(+), 102 deletions(-)
> create mode 100644 include/dt-bindings/clock/actions,s900-cmu.h
> delete mode 100644 include/dt-bindings/clock/s900_cmu.h
> create mode 100644 include/dt-bindings/reset/actions,s900-reset.h
>
> diff --git a/arch/arm/dts/s900.dtsi b/arch/arm/dts/s900.dtsi
> index 2bbb30a..eb35cf7 100644
> --- a/arch/arm/dts/s900.dtsi
> +++ b/arch/arm/dts/s900.dtsi
> @@ -1,17 +1,94 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -//
> -// Device Tree Source for Actions Semi S900 SoC
> -//
> -// Copyright (C) 2015 Actions Semi Co., Ltd.
> -// Copyright (C) 2018 Manivannan Sadhasivam
>
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
>
> -/dts-v1/;
> -#include
> +#include
> +#include
> +#include
> +#include
>
> / {
> compatible = "actions,s900";
> - #address-cells = <0x2>;
> - #size-cells = <0x2>;
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secmon@1f00 {
> + reg = <0x0 0x1f00 0x0 0x100>;
> + no-map;
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = ,
> + ,
> + ,
> + ;
> + interrupt-affinity = <>, <>, <>, <>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> +
Re: [PATCH v9 03/12] serial: actions: add compatible string
On Wed, Apr 01, 2020 at 12:49:26PM +0530, Amit Singh Tomar wrote:
> This patch adds "actions,owl-uart" string to the owl uart driver. It
> is also defined in Linux kernel.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v8:
> * No changes.
> Changes since v7:
> * No changes.
> Changes since v6:
> * Added Reviewd-by tag.
> Changes since v5:
> * Moved it to from 06/11 to 03/11.
> * Used appropriate commit message.
> * Removed the reviwed-by tag.
> Changes since v4:
> * Moved it to from 09/11 to 06/11.
> Changes since v3:
> * Used only owl-uart for compatible string.
> Changes since v2:
> * No changes.
> Changes since v1:
> * No changes.
> ---
> drivers/serial/serial_owl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c
> index 7ead73e..539acdc 100644
> --- a/drivers/serial/serial_owl.c
> +++ b/drivers/serial/serial_owl.c
> @@ -121,6 +121,7 @@ static const struct dm_serial_ops owl_serial_ops = {
>
> static const struct udevice_id owl_serial_ids[] = {
> { .compatible = "actions,s900-serial" },
This should've been removed here itself as opposed to in devicetree sync patch.
But I don't warrant a new series for this change.
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> + { .compatible = "actions,owl-uart" },
> { }
> };
>
> --
> 2.7.4
>
Re: [PATCH v9 01/12] arm: actions: Add common framework for Actions Owl Semi SoCs
On Wed, Apr 01, 2020 at 12:49:24PM +0530, Amit Singh Tomar wrote: > This commit adds common arch support for Actions Semi Owl > series SoCs and removes the Bubblegum96 board files. > > Reviewed-by: Andre Przywara > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes since v8: > * Added Reviewed-by tag. > Changes since v7: > * Removed S900 specific include file. > * Removed the file list entry in MAINTAINERS file. > Changes since v6: > * No change. > Changes since v5: > * No change. > Changes since v4: > * No change. > Changes since v3: > * Corrected the file list entry in MAINTAINERS file. > Changes since v2: > * Moved the file list details to root MAINTAINERS file. > * Updated the commit message as suggested by Mani. > * Used the "Owl" keyword to describe SoC family. > Changes since v1: > * Moved S700 specific changes to patch 4 of 9. > * Moved couple of symbols from defconfig to arch/arm/Kconfig > and platform owl Kconfig. > --- > MAINTAINERS | 3 +- > arch/arm/Kconfig | 3 +- > arch/arm/mach-owl/Kconfig| 29 ++ > arch/arm/mach-owl/Makefile | 1 + > arch/arm/mach-owl/soc.c | 57 > > board/ucRobotics/bubblegum_96/Kconfig| 15 > board/ucRobotics/bubblegum_96/MAINTAINERS| 6 --- > board/ucRobotics/bubblegum_96/Makefile | 3 -- > board/ucRobotics/bubblegum_96/bubblegum_96.c | 57 > > configs/bubblegum_96_defconfig | 4 +- > include/configs/bubblegum_96.h | 40 --- > include/configs/owl-common.h | 40 +++ > 12 files changed, 114 insertions(+), 144 deletions(-) > create mode 100644 arch/arm/mach-owl/soc.c > delete mode 100644 board/ucRobotics/bubblegum_96/Kconfig > delete mode 100644 board/ucRobotics/bubblegum_96/MAINTAINERS > delete mode 100644 board/ucRobotics/bubblegum_96/Makefile > delete mode 100644 board/ucRobotics/bubblegum_96/bubblegum_96.c > delete mode 100644 include/configs/bubblegum_96.h > create mode 100644 include/configs/owl-common.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index b50652b..2eaacb7 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -272,9 +272,10 @@ M: Manivannan Sadhasivam > > S: Maintained > F: arch/arm/include/asm/arch-owl/ > F: arch/arm/mach-owl/ > -F: board/ucRobotics/ > F: drivers/clk/owl/ > F: drivers/serial/serial_owl.c > +F: include/configs/owl-common.h > +F: configs/bubblegum_96_defconfig > > ARM RENESAS RMOBILE/R-CAR > M: Nobuhiro Iwamatsu > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index bbb1e27..de6b7f9 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -873,9 +873,9 @@ config ARCH_MX5 > > config ARCH_OWL > bool "Actions Semi OWL SoCs" > - select ARM64 > select DM > select DM_SERIAL > + select OWL_SERIAL > select OF_CONTROL > imply CMD_DM > > @@ -1868,7 +1868,6 @@ source "board/spear/spear600/Kconfig" > source "board/spear/x600/Kconfig" > source "board/st/stv0991/Kconfig" > source "board/tcl/sl50/Kconfig" > -source "board/ucRobotics/bubblegum_96/Kconfig" > source "board/birdland/bav335x/Kconfig" > source "board/toradex/colibri_pxa270/Kconfig" > source "board/variscite/dart_6ul/Kconfig" > diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig > index 199e772..28984c1 100644 > --- a/arch/arm/mach-owl/Kconfig > +++ b/arch/arm/mach-owl/Kconfig > @@ -1,27 +1,22 @@ > if ARCH_OWL > > -config SYS_SOC > - default "owl" > - > choice > -prompt "Actions Semi OWL SoCs board select" > +prompt "Actions Semi Owl SoC Variant" > optional > > -config TARGET_BUBBLEGUM_96 > - bool "96Boards Bubblegum-96" > - help > - Support for 96Boards Bubblegum-96. This board complies with > - 96Board Consumer Edition Specification. Features: > - - Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU) > - - 2GiB RAM > - - 8GiB eMMC, uSD slot > - - WiFi, Bluetooth and GPS module > - - 2x Host, 1x Device USB port > - - HDMI > - - 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons > +config MACH_S900 > +bool "Actions Semi S900 SoC&
Re: [PATCH V3 13/14] ARM: dts: stm32: Adjust PLL4 settings on AV96
Hi,
On Wed, Apr 01, 2020 at 04:49:45PM +, Gerald BAEZA wrote:
> Hi Marek and Patrick
>
> > From: Marek Vasut
> > Sent: mercredi 1 avril 2020 13:09
> >
> > On 4/1/20 12:24 PM, Patrick DELAUNAY wrote:
> > > Hi Gerald and Manivannan,
> >
> > Hi,
> >
> > >> From: Marek Vasut
> > >> Sent: mardi 31 mars 2020 19:52
> > >>
> > >> The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and
> > >> FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which
> > >> can not easily divide the clock down to e.g. 50 MHz for high speed SD
> > >> and eMMC devices, so those devices end up running at 30 MHz as that is
> > 120 MHz / 4.
> > >> Adjust the PLL4 settings such that both PLL4P and PLL4R run at 100
> > >> MHz instead, which is easy to divide to 50MHz for optimal operation
> > >> of both SD and eMMC, SPDIF clock are not that much slower and FDCAN is
> > also unaffected.
>
> As far as I see, SPDIF is not supported on Avenger board so we don't care for
> this one.
> FDCAN can be supported via the expansion connector, so better to keep it high
> (and < 100 MHz).
> Be careful because the LTDC pixel clock also comes from the PLL4Q and it is
> used for the HDMI on Avenger.
> The pixel clock is very constraint and I am surprised by the initial 40 MHz
> configuration (that becomes 50 MHz with your patch).
> I would recommend to align the Avenger configuration to ST boards one, that
> is the best compromise found so far (99 MHz for SDMMC and 74.250 MHz for
> HDMI):
> https://wiki.st.com/stm32mpu/wiki/STM32MP15_clock_tree
> /* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
> pll4: st,pll@3 {
> cfg = < 3 98 5 7 7 PQR(1,1,1) >;
> u-boot,dm-pre-reloc;
> };
>
This looks good to me.
> > >> Reviewed-by: Patrice Chotard
> > >> Reviewed-by: Patrick Delaunay
> > >> Signed-off-by: Marek Vasut
> > >> Cc: Manivannan Sadhasivam
> > >> Cc: Patrick Delaunay
> > >> Cc: Patrice Chotard
> > >> ---
> > >> V2: Move this patch before the split of AV96 into SoM and carrier
> > >> V3: No change
> > >> ---
> > >
> > > This patch update the PLL4 frequency used on AV96 board, with
> > > different of reference clock tree used on ST board, this new setting
> > > allow to optimize the SDMMC frequency (50MHz vs 30Mz).
> > >
> > > I don't know why the previous PLL4 frequency was chosen as a
> > > compromise on reference clock-tree (PLL4 is used by mostly all the
> > > peripheral, with display and audio requirements).
> > >
> > > Can you cross check the proposed clock tree and ack this patch if
> > > these ST requirements are not applicable on AV96 board.
> > >
> > > Anyway the code is correct.
> >
> > Likely because these PLL settings are being copied from reference platform
> > to other platforms etc.
>
> As far as I remember, we never had this configuration for PLL4 on ST boards,
> so the copy certainly comes from somewhere else.
>
I took the PLL settings from Downstream code done by Arrow at that time. Since
I never had access to PMIC info, I just used them blindly since that worked for
initial upstream bringup on old board. We had several discussions about PMIC
at that time but never touched PLL4.
So feel free to modify it as Gerald suggested.
Thanks,
Mani
> > But I did notice one odd thing, which is when running the SD1 in SDR104, the
> > read data transfers can be unstable, which I suspect is because the bus runs
> > at actual 100 MHz instead of some 60 MHz. I need to look at that with a
> > scope, so that's to be checked. For now I turned the SDR104 off.
>
Re: [PATCH v8 00/12] Actions S700 SoC support
Hi Amit, On Tue, Mar 31, 2020 at 10:27:45AM +0530, Amit Tomer wrote: > Hi Mani, > > > Just tested v8 on bubblegum96 and it doesn't boot. I can't see any debug > > print on the console, so I'm guessing something basic going wrong. Will > > try to find the regression if I find some time and keep you posted. > > Thanks for trying it. Looks like issue is with clock driver (not > reading the driver data > properly). Can you please try it with below series: > > https://github.com/Atomar25/u-boot/commits/s700_v9 > Yes, this fixes the issue and now Bubblegum96 boots. Please send the v9 so that I can review. Thanks, Mani > Thanks > -Amit
Re: [PATCH v8 00/12] Actions S700 SoC support
Hi Amit, On Sat, Mar 21, 2020 at 11:00:42PM +0530, Amit Singh Tomar wrote: > This adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], It's > Quad-core ARMv8 SoC > with Cortex-A53 cores. Peripheral like UART seems to be compatible with S900 > SoC(basic support > for it is alreay present in u-boot). > > This series(v8) removes the SoC specific include instead just uses > owl-common. For this > patch 01/12 and 09/12 changes a bit. > > Previous series(v7) fixes a serious Bug that breaks S900, it was there since > v5.Thanks to Andre > for pointing it out. > > Series(v6)[3] does following changes: > > * [PATCH v5 06/11] becomes [PATCH v6 03/11] > * [PATCH v5 03/11] becomes [PATCH v6 04/11] > * Introduce a new patch to move defconfig options to Kconfig which is [PATCH > v6 10/12] > > Series(v5)[4] just re-orders the patches so that U-BOOT(with > bubblegum96_defconfig) builds > after every patch of the series(suggested by Andre). > > S700 support is tested[5] on Cubieboard7 board and S900 support is just > compiled tested. > > This patch series can be tested using below tree: > https://github.com/Atomar25/u-boot/commits/s700_v8 > Just tested v8 on bubblegum96 and it doesn't boot. I can't see any debug print on the console, so I'm guessing something basic going wrong. Will try to find the regression if I find some time and keep you posted. Thanks, Mani > [1]: http://www.cubietech.com/product-detail/cubieboard7/ > [2]: http://www.actions-semi.com/en/productview.aspx?id=225 > [3]: > http://u-boot.10912.n7.nabble.com/PATCH-v6-00-12-Actions-S700-SoC-support-td403562.html#a403567 > [4]: > http://u-boot.10912.n7.nabble.com/PATCH-v5-00-11-Actions-S700-SoC-support-td402752.html#a402762 > [5]: https://paste.ubuntu.com/p/xGYVbSytRS/ > > Amit Singh Tomar (12): > arm: actions: Add common framework for Actions Owl Semi SoCs > arm: actions: rename sysmap-s900 to sysmap-owl > serial: actions: add compatible string > arm: dts: sync dts for Action Semi S900 > arm: dts: actions: s900: add u-boot specific dtsi file > clk: actions: Add common clock driver > arm: actions: add S700 SoC device tree > arm: dts: actions: s700: add u-boot specific dtsi file > arm: add support Actions Semi S700 > actions: Move defconfig options to Kconfig > arm: add Cubieboard7 board support > doc: boards: add Cubieboard7 documentation > > MAINTAINERS| 2 + > arch/arm/Kconfig | 5 +- > arch/arm/dts/Makefile | 6 +- > arch/arm/dts/s700-cubieboard7.dts | 92 +++ > arch/arm/dts/s700-u-boot.dtsi | 18 ++ > arch/arm/dts/s700.dtsi | 248 +++ > arch/arm/dts/s900-u-boot.dtsi | 17 ++ > arch/arm/dts/s900.dtsi | 322 > +++-- > arch/arm/include/asm/arch-owl/clk_s900.h | 57 - > arch/arm/include/asm/arch-owl/regs_s700.h | 56 + > arch/arm/mach-owl/Kconfig | 50 ++-- > arch/arm/mach-owl/Makefile | 3 +- > arch/arm/mach-owl/soc.c| 57 + > arch/arm/mach-owl/sysmap-owl.c | 32 +++ > arch/arm/mach-owl/sysmap-s900.c| 32 --- > board/ucRobotics/bubblegum_96/Kconfig | 15 -- > board/ucRobotics/bubblegum_96/MAINTAINERS | 6 - > board/ucRobotics/bubblegum_96/Makefile | 3 - > board/ucRobotics/bubblegum_96/bubblegum_96.c | 57 - > configs/bubblegum_96_defconfig | 12 +- > configs/cubieboard7_defconfig | 9 + > doc/board/actions/cubieboard7.rst | 115 + > doc/board/actions/index.rst| 10 + > doc/board/index.rst| 1 + > drivers/clk/owl/Kconfig| 8 +- > drivers/clk/owl/Makefile | 2 +- > drivers/clk/owl/clk_owl.c | 153 > drivers/clk/owl/clk_owl.h | 65 + > drivers/clk/owl/clk_s900.c | 137 --- > drivers/serial/serial_owl.c| 2 +- > include/configs/bubblegum_96.h | 40 --- > include/configs/owl-common.h | 40 +++ > include/configs/s700.h | 13 + > include/configs/s900.h | 16 ++ > include/dt-bindings/clock/actions,s700-cmu.h | 118 + > include/dt-bindings/clock/actions,s900-cmu.h | 129 ++ > include/dt-bindings/clock/s900_cmu.h | 77 -- > include/dt-bindings/reset/actions,s700-reset.h | 34 +++ > include/dt-bindings/reset/actions,s900-reset.h | 65 + > 39 files changed, 1638 insertions(+), 486 deletions(-) > create mode 100644 arch/arm/dts/s700-cubieboard7.dts > create mode 100644 arch/arm/dts/s700-u-boot.dtsi > create mode 100644
Re: [PATCH v8 00/12] Actions S700 SoC support
Hi Andre, On 22 March 2020 5:31:11 AM IST, "André Przywara" wrote: >On 21/03/2020 17:30, Amit Singh Tomar wrote: > >Hi Mani, > >> This adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], >It's Quad-core ARMv8 SoC >> with Cortex-A53 cores. Peripheral like UART seems to be compatible >with S900 SoC(basic support >> for it is alreay present in u-boot). > >I reviewed the series and am now happy with it - I added the missing >review tags for patch 1 and 9. >I find the instructions in the final patch quite convoluted and >somewhat >cumbersome, but I guess this is more due to the vendor boot process >being somewhat closed down. > >I have neither hardware, so can't test anything, but at least I compile >tested every patch with bubblegum_96_defconfig, and the final patch >with >cubieboard7_defconfig. I hope that I didn't miss anything that would >break the Bubblegum board, but please test it if you have the hardware. > I've been shadowing this series due to not getting enough time for reviewing/testing. I hope to spend time next week on this. Thanks Amit for your patience and updates. Regards, Mani >Amit, thanks for your continued work on this and the prompt replies! > >Cheers, >Andre > >> >> This series(v8) removes the SoC specific include instead just uses >owl-common. For this >> patch 01/12 and 09/12 changes a bit. >> >> Previous series(v7) fixes a serious Bug that breaks S900, it was >there since v5.Thanks to Andre >> for pointing it out. >> >> Series(v6)[3] does following changes: >> >> * [PATCH v5 06/11] becomes [PATCH v6 03/11] >> * [PATCH v5 03/11] becomes [PATCH v6 04/11] >> * Introduce a new patch to move defconfig options to Kconfig which is >[PATCH v6 10/12] >> >> Series(v5)[4] just re-orders the patches so that U-BOOT(with >bubblegum96_defconfig) builds >> after every patch of the series(suggested by Andre). >> >> S700 support is tested[5] on Cubieboard7 board and S900 support is >just compiled tested. >> >> This patch series can be tested using below tree: >> https://github.com/Atomar25/u-boot/commits/s700_v8 >> >> [1]: http://www.cubietech.com/product-detail/cubieboard7/ >> [2]: http://www.actions-semi.com/en/productview.aspx?id=225 >> [3]: >http://u-boot.10912.n7.nabble.com/PATCH-v6-00-12-Actions-S700-SoC-support-td403562.html#a403567 >> [4]: >http://u-boot.10912.n7.nabble.com/PATCH-v5-00-11-Actions-S700-SoC-support-td402752.html#a402762 >> [5]: https://paste.ubuntu.com/p/xGYVbSytRS/ >> >> Amit Singh Tomar (12): >> arm: actions: Add common framework for Actions Owl Semi SoCs >> arm: actions: rename sysmap-s900 to sysmap-owl >> serial: actions: add compatible string >> arm: dts: sync dts for Action Semi S900 >> arm: dts: actions: s900: add u-boot specific dtsi file >> clk: actions: Add common clock driver >> arm: actions: add S700 SoC device tree >> arm: dts: actions: s700: add u-boot specific dtsi file >> arm: add support Actions Semi S700 >> actions: Move defconfig options to Kconfig >> arm: add Cubieboard7 board support >> doc: boards: add Cubieboard7 documentation >> >> MAINTAINERS| 2 + >> arch/arm/Kconfig | 5 +- >> arch/arm/dts/Makefile | 6 +- >> arch/arm/dts/s700-cubieboard7.dts | 92 +++ >> arch/arm/dts/s700-u-boot.dtsi | 18 ++ >> arch/arm/dts/s700.dtsi | 248 >+++ >> arch/arm/dts/s900-u-boot.dtsi | 17 ++ >> arch/arm/dts/s900.dtsi | 322 >+++-- >> arch/arm/include/asm/arch-owl/clk_s900.h | 57 - >> arch/arm/include/asm/arch-owl/regs_s700.h | 56 + >> arch/arm/mach-owl/Kconfig | 50 ++-- >> arch/arm/mach-owl/Makefile | 3 +- >> arch/arm/mach-owl/soc.c| 57 + >> arch/arm/mach-owl/sysmap-owl.c | 32 +++ >> arch/arm/mach-owl/sysmap-s900.c| 32 --- >> board/ucRobotics/bubblegum_96/Kconfig | 15 -- >> board/ucRobotics/bubblegum_96/MAINTAINERS | 6 - >> board/ucRobotics/bubblegum_96/Makefile | 3 - >> board/ucRobotics/bubblegum_96/bubblegum_96.c | 57 - >> configs/bubblegum_96_defconfig | 12 +- >> configs/cubieboard7_defconfig | 9 + >> doc/board/actions/cubieboard7.rst | 115 + >> doc/board/actions/index.rst| 10 + >> doc/board/index.rst| 1 + >> drivers/clk/owl/Kconfig| 8 +- >> drivers/clk/owl/Makefile | 2 +- >> drivers/clk/owl/clk_owl.c | 153 >> drivers/clk/owl/clk_owl.h | 65 + >> drivers/clk/owl/clk_s900.c | 137 --- >> drivers/serial/serial_owl.c| 2 +- >>
Re: [PATCH v3 09/21] arm: dts: Use consistent name "CLK_ETHERNET" for the Ethernet clock binding
On Mon, Feb 24, 2020 at 02:37:22PM +, Andre Przywara wrote: > On Sun, 23 Feb 2020 23:08:25 +0530 > Manivannan Sadhasivam wrote: > > Hi Amit, > > > On Sat, Jan 25, 2020 at 05:52:51PM +0530, Amit Singh Tomar wrote: > > > Right now, Clock bindings for ethernet uses different names(even in Linux) > > > CLK_ETH_MAC for S900 and CLK_ETHERNET for S700, It causes compilation > > > problem > > > when using them for common clock driver. > > > > > > Let's use same name CLK_ETHERNET for both S700 and S900. > > So are you changing the include file that you just imported from Linux? I > don't think that's a good idea, as you start to divert from the kernel in a > subtle way. And especially the header files should stay unchanged. > So either you send this patch to the kernel first, or, probably better, you > drop this change here, and unify the name at the point where it's used > (#ifndef CLK_ETHERNET ) > Good point. I'm happy to accept this change in kernel but not sure what Andreas will say. Thanks, Mani > Cheers, > Andre. > > > > > > > Signed-off-by: Amit Singh Tomar > > > > Reviewed-by: Manivannan Sadhasivam > > > > Thanks, > > Mani > > > > > --- > > > Changes since v2: > > > * Newly added patch, not there in v2/v1. > > > --- > > > include/dt-bindings/clock/actions,s900-cmu.h | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/include/dt-bindings/clock/actions,s900-cmu.h > > > b/include/dt-bindings/clock/actions,s900-cmu.h > > > index 7c12515..2247f1c 100644 > > > --- a/include/dt-bindings/clock/actions,s900-cmu.h > > > +++ b/include/dt-bindings/clock/actions,s900-cmu.h > > > @@ -121,7 +121,7 @@ > > > #define CLK_DDR1 97 > > > #define CLK_DMM 98 > > > > > > -#define CLK_ETH_MAC 99 > > > +#define CLK_ETHERNET 99 > > > #define CLK_RMII_REF 100 > > > > > > #define CLK_NR_CLKS (CLK_RMII_REF + 1) > > > -- > > > 2.7.4 > > > >
Re: [PATCH v3 00/21] Actions S700 SoC support
Hi Amit, On Sat, Jan 25, 2020 at 05:52:42PM +0530, Amit Singh Tomar wrote: > Hi, > > This is continuation of work[1], submitted(v2) almost a year back. > > It adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], It's > Quad-core ARMv8 SoC > with Cortex-A53 cores. Peripheral like UART seems to be compatible with S900 > SoC(basic support > for it is alreay present in u-boot). > > First few patches(from 1/21 to 3/21) consolidates Actions Semiconductor SoCs > support in u-boot(mostly insprired > by SUXNI as suggested by Andre). Idea is to move every bit out from > board/ucRobotics into arch/arm/mach-owl. > It allows different SoCs to be driven by single "soc and Kconfig" file. It > also includes common clock driver > for S700 and S900. Patches(from 4/21 to 6/21 and 10/21 to 12/21) enables S700 > SoC support alongwith > Cubieboard7 board. > > While at it, took the opportunity to sync S900 DT sources and > bindings(patches from 7/21 to 8/21) with > Linux(tag v5.5-rc6) and it is compiled-tested. > > Patch(9/21) uses same name for ethernet clock binding and if it's ok, would > like to send it to LKML > as well. > > Patches(from 13/21 to 14/21) adds support for RTL 8201F PHY module and > introduce configuration option > "RTL8201F_PHY_S700_RMII_TIMINGS" to fulfill specific timing requirements for > S700. > > Patches(from 15/21 to 17/21) adds support for generic reset controller, > originally used for NEXELL[3] > series but never gets merged and it can be used for S700. > > Patches(from 18/21 to 21/21) are there to enable Ethenet support in S700, MAC > is based on Designware IP > These patches re-uses the existing driver(drivers/net/designware.c) and > programs SoC specific bits to > enable ethernet. SoC specific glue code is kept in dwmac_s700.c file, did it > this way as found it more > cleaner(but having said that I am not really sure, if it's bit of a overkill > to have it) or we can keep > this glue code somewhere in machine file? > > S700 support is tested[4] on Cubieboard7 board and S900 support is just > compiled tested. > I've reviewed most of the patches. Overall this series looks good but seems a bit bulky to me. Can you please split out the Ethernet specific patches and post only the rest? Once these base S700 patches gets merged, you can submit the Ethernet patches incrementally. Also, I can't apply these patches on u-boot/master. Could you please fix that for next iteration? It'd be good if you can share a git tree/branch with me for quick testing. Thanks, Mani > Also, patches are rebased upon following commit: > 2c871f9e084b2c03d1961884228a6901387ab8d6 Merge branch > '2020-01-22-master-imports' > > Thanks > -Amit > > [1]: https://patchwork.ozlabs.org/cover/1020286/ > [2]: http://www.actions-semi.com/en/productview.aspx?id=225 > [3]: https://lists.denx.de/pipermail/u-boot/2017-November/313135.html > [4]: https://paste.ubuntu.com/p/GkFPn2xJfn/ > > Amit Singh Tomar (21): > arm: actions: Add common framework for Actions Semi SoCs > arm: actions: rename sysmap-s900 to sysmap-owl > clk: actions: Add common clock driver > arm: add support Actions Semi S700 > arm: actions: add S700 SoC device tree > actions:s700: add u-boot specific dts file > arm: dts: sync dts for Action Semi S900 > actions: s900: add u-boot specific dts file > arm: dts: Use consistent name "CLK_ETHERNET" for the Ethernet clock > binding > serial: actions: add uart support for s700 > arm: add Cubieboard7 board support > actions: add Cubieboard7 README > net: phy: realtek: Add support for RTL8201F PHY module. > net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust > rx/tx timings > reset: add driver for generic reset controllers > arm: dts: s700: add node for reset controller > owl: Kconfig: Enable dm reset and generic reset > net: designware: s700: Add glue code for S700 mac > arm: dts: s700: add node for ethernet controller > owl: Kconfig: Enable dm eth for OWL platform > configs: Enable mac and phy configs > > MAINTAINERS| 2 + > arch/arm/Kconfig | 8 +- > arch/arm/dts/Makefile | 6 +- > arch/arm/dts/s700-cubieboard7.dts | 39 +++ > arch/arm/dts/s700-u-boot.dtsi | 39 +++ > arch/arm/dts/s700.dtsi | 248 +++ > arch/arm/dts/s900-u-boot.dtsi | 17 ++ > arch/arm/dts/s900.dtsi | 322 > +++-- > arch/arm/include/asm/arch-owl/clk_s900.h | 57 - > arch/arm/include/asm/arch-owl/regs_s700.h | 62 + > arch/arm/mach-owl/Kconfig | 35 +-- > arch/arm/mach-owl/Makefile | 3 +- > arch/arm/mach-owl/README.cubieboard7 | 88 +++ > arch/arm/mach-owl/soc.c| 57 + > arch/arm/mach-owl/sysmap-owl.c
Re: [PATCH v3 15/21] reset: add driver for generic reset controllers
On Sat, Jan 25, 2020 at 05:52:57PM +0530, Amit Singh Tomar wrote:
> The simplest and most generic form of a reset controller just exposes
> multiple MMIO registers, where each bit toggles a separate reset line.
> Add a generic driver to describe this kind of reset controller.
>
> This is used on the Action Semi S700, for instance, but also by other
> SoCs.
>
Why not name it as reset-simple as linux kernel?
> Signed-off-by: Amit Singh Tomar
> [Andre: make more generic, let it cover multiple registers, slight rework]
> Signed-off-by: Andre Przywara
> ---
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> drivers/reset/Kconfig | 6 +++
> drivers/reset/Makefile| 1 +
> drivers/reset/reset-generic.c | 111
> ++
> 3 files changed, 118 insertions(+)
> create mode 100644 drivers/reset/reset-generic.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 75ccd65..1cdc159 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -12,6 +12,12 @@ config DM_RESET
> although driving such reset isgnals using GPIOs may be more
> appropriate in this case.
>
> +config GENERIC_RESET
> +bool "Generic Reset controller driver"
> +depends on DM_RESET
> +help
> + Support Generic reset controller.
> +
> config SANDBOX_RESET
> bool "Enable the sandbox reset test driver"
> depends on DM_MAILBOX && SANDBOX
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 0a044d5..5e027a1 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -4,6 +4,7 @@
> #
>
> obj-$(CONFIG_DM_RESET) += reset-uclass.o
> +obj-$(CONFIG_GENERIC_RESET) += reset-generic.o
> obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset.o
> obj-$(CONFIG_SANDBOX_MBOX) += sandbox-reset-test.o
> obj-$(CONFIG_STI_RESET) += sti-reset.o
> diff --git a/drivers/reset/reset-generic.c b/drivers/reset/reset-generic.c
> new file mode 100644
> index 000..9c45087
> --- /dev/null
> +++ b/drivers/reset/reset-generic.c
> @@ -0,0 +1,111 @@
> +/*
> + * Copyright (C) 2017 Amit Singh Tomar
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct generic_reset_priv {
> + void __iomem *membase;
> + int max_reset;
> +};
> +
> +#define BITS_PER_BYTE 8
> +static int generic_reset_toggle(struct reset_ctl *rst, bool assert)
> +{
> + struct generic_reset_priv *priv = dev_get_priv(rst->dev);
> + int reg_width = sizeof(u32);
> + int bank, offset;
> + u32 reg;
> +
> + if (rst->id >= priv->max_reset)
> + return -EINVAL;
> +
> + bank = rst->id / (reg_width * BITS_PER_BYTE);
> + offset = rst->id % (reg_width * BITS_PER_BYTE);
> +
> + reg = readl(priv->membase + (bank * reg_width));
> + if (assert)
> + writel(reg & ~BIT(offset), priv->membase + (bank * reg_width));
> + else
> + writel(reg | BIT(offset), priv->membase + (bank * reg_width));
> +
> + return 0;
> +}
> +
> +static int generic_reset_assert(struct reset_ctl *rst)
> +{
> + return generic_reset_toggle(rst, true);
> +}
> +
> +static int generic_reset_deassert(struct reset_ctl *rst)
> +{
> + return generic_reset_toggle(rst, false);
> +}
> +
> +static int generic_reset_free(struct reset_ctl *rst)
> +{
> + return 0;
> +}
> +
> +static int generic_reset_request(struct reset_ctl *rst)
> +{
> + struct generic_reset_priv *priv = dev_get_priv(rst->dev);
> +
> + if (rst->id >= priv->max_reset)
> + return -EINVAL;
> +
> + return generic_reset_assert(rst);
> +}
> +
> +struct reset_ops generic_reset_reset_ops = {
> + .free = generic_reset_free,
> + .request = generic_reset_request,
> + .rst_assert = generic_reset_assert,
> + .rst_deassert = generic_reset_deassert,
> +};
> +
> +static const struct udevice_id generic_reset_ids[] = {
> + { .compatible = "generic-reset" },
> + { .compatible = "actions,s700-reset" },
No need of S700 specific compatible here. Linux kernel dts also doesn't
require it.
Thanks,
Mani
> + { }
> +};
> +
> +static int generic_reset_probe(struct udevice *dev)
> +{
> + struct generic_reset_priv *priv = dev_get_priv(dev);
> + fdt_addr_t addr;
> + fdt_size_t size;
> +
> + addr = devfdt_get_addr_size_index(dev, 0, );
> + if (addr == FDT_ADDR_T_NONE)
> + return -EINVAL;
> +
> + priv->max_reset = dev_read_u32_default(dev, "num-resets", -1);
> + if (priv->max_reset == -1)
> + priv->max_reset = size * BITS_PER_BYTE;
> +
> + priv->membase = devm_ioremap(dev, addr, size);
> + if (!priv->membase)
> + return -EFAULT;
> +
> + return 0;
> +}
> +
> +U_BOOT_DRIVER(generic_reset) = {
> + .name = "generic_reset",
> + .id = UCLASS_RESET,
> + .of_match =
Re: [PATCH v3 11/21] arm: add Cubieboard7 board support
On Sat, Jan 25, 2020 at 05:52:53PM +0530, Amit Singh Tomar wrote:
> The Cubieboard is a single board computer containing a
> Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).
>
> This patch adds respective defconfig alongwith device tree(sync with
> Linux v5.5-rc6).
>
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v2:
> * Synced with Linux tag v5.5-rc6.
> Changes since v1:
> * No changes.
> ---
> arch/arm/dts/s700-cubieboard7.dts | 92
> +++
> configs/cubieboard7_defconfig | 16 +++
> 2 files changed, 108 insertions(+)
> create mode 100644 arch/arm/dts/s700-cubieboard7.dts
> create mode 100644 configs/cubieboard7_defconfig
>
> diff --git a/arch/arm/dts/s700-cubieboard7.dts
> b/arch/arm/dts/s700-cubieboard7.dts
> new file mode 100644
> index 000..63e375c
> --- /dev/null
> +++ b/arch/arm/dts/s700-cubieboard7.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
> +
> +/dts-v1/;
> +
> +#include "s700.dtsi"
> +
> +/ {
> + compatible = "cubietech,cubieboard7", "actions,s700";
> + model = "CubieBoard7";
> +
> + aliases {
> + serial3 =
> + };
> +
> + chosen {
> + stdout-path = "serial3:115200n8";
> + };
> +
> + memory@0 {
> + device_type = "memory";
> + reg = <0x0 0x0 0x0 0x8000>;
> + };
> +
> + memory@1,e000 {
> + device_type = "memory";
> + reg = <0x1 0xe000 0x0 0x0>;
> + };
> +};
> +
> + {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + status = "disabled";
> + pinctrl-names = "default";
> + pinctrl-0 = <_default>;
> +};
> +
> + {
> + i2c0_default: i2c0_default {
> + pinmux {
> + groups = "i2c0_mfp";
> + function = "i2c0";
> + };
> + pinconf {
> + pins = "i2c0_sclk", "i2c0_sdata";
> + bias-pull-up;
> + };
> + };
> +
> + i2c1_default: i2c1_default {
> + pinmux {
> + groups = "i2c1_dummy";
> + function = "i2c1";
> + };
> + pinconf {
> + pins = "i2c1_sclk", "i2c1_sdata";
> + bias-pull-up;
> + };
> + };
> +
> + i2c2_default: i2c2_default {
> + pinmux {
> + groups = "i2c2_dummy";
> + function = "i2c2";
> + };
> + pinconf {
> + pins = "i2c2_sclk", "i2c2_sdata";
> + bias-pull-up;
> + };
> + };
> +};
> +
> + {
> + clocks = <>;
> +};
> +
> + {
> + status = "okay";
> +};
> diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig
> new file mode 100644
> index 000..0459997
> --- /dev/null
> +++ b/configs/cubieboard7_defconfig
> @@ -0,0 +1,16 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_OWL=y
> +CONFIG_MACH_S700=y
> +CONFIG_IDENT_STRING="\ncubieboard7"
> +CONFIG_DISTRO_DEFAULTS=y
> +CONFIG_NR_DRAM_BANKS=1
> +CONFIG_BOOTDELAY=5
> +CONFIG_USE_BOOTARGS=y
> +CONFIG_BOOTARGS="console=ttyOWL3,115200n8"
> +# CONFIG_DISPLAY_CPUINFO is not set
> +# CONFIG_DISPLAY_BOARDINFO is not set
> +CONFIG_SYS_PROMPT="U-Boot => "
> +CONFIG_CMD_MD5SUM=y
> +CONFIG_CMD_MEMINFO=y
> +CONFIG_CMD_TIMER=y
> +CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7"
> --
> 2.7.4
>
Re: [PATCH v3 10/21] serial: actions: add uart support for s700
On Sat, Jan 25, 2020 at 05:52:52PM +0530, Amit Singh Tomar wrote:
> UART controller present on S700 is compatible with existing
> S900 controller, this patch simply adds a proper compatible string
> so that owl uart driver can be reused for S700.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v2:
> * No changes.
> Changes since v1:
> * No changes.
> ---
> drivers/serial/serial_owl.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/serial/serial_owl.c b/drivers/serial/serial_owl.c
> index 7ead73e..76995bf 100644
> --- a/drivers/serial/serial_owl.c
> +++ b/drivers/serial/serial_owl.c
> @@ -121,6 +121,7 @@ static const struct dm_serial_ops owl_serial_ops = {
>
> static const struct udevice_id owl_serial_ids[] = {
> { .compatible = "actions,s900-serial" },
> + { .compatible = "actions,owl-uart" },
Either use s900 and s700 or owl.
Thanks,
Mani
> { }
> };
>
> --
> 2.7.4
>
Re: [PATCH v3 09/21] arm: dts: Use consistent name "CLK_ETHERNET" for the Ethernet clock binding
On Sat, Jan 25, 2020 at 05:52:51PM +0530, Amit Singh Tomar wrote: > Right now, Clock bindings for ethernet uses different names(even in Linux) > CLK_ETH_MAC for S900 and CLK_ETHERNET for S700, It causes compilation problem > when using them for common clock driver. > > Let's use same name CLK_ETHERNET for both S700 and S900. > > Signed-off-by: Amit Singh Tomar Reviewed-by: Manivannan Sadhasivam Thanks, Mani > --- > Changes since v2: > * Newly added patch, not there in v2/v1. > --- > include/dt-bindings/clock/actions,s900-cmu.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/dt-bindings/clock/actions,s900-cmu.h > b/include/dt-bindings/clock/actions,s900-cmu.h > index 7c12515..2247f1c 100644 > --- a/include/dt-bindings/clock/actions,s900-cmu.h > +++ b/include/dt-bindings/clock/actions,s900-cmu.h > @@ -121,7 +121,7 @@ > #define CLK_DDR1 97 > #define CLK_DMM 98 > > -#define CLK_ETH_MAC 99 > +#define CLK_ETHERNET 99 > #define CLK_RMII_REF 100 > > #define CLK_NR_CLKS (CLK_RMII_REF + 1) > -- > 2.7.4 >
Re: [PATCH v3 08/21] actions: s900: add u-boot specific dts file
On Sat, Jan 25, 2020 at 05:52:50PM +0530, Amit Singh Tomar wrote:
> Devices like uart and clk are needed to be enabled before relocation.
> This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.
>
> Signed-off-by: Amit Singh Tomar
> ---
Patch subject should mention dtsi not dts and also the prefix should be
arm: dts. With that,
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/dts/s900-u-boot.dtsi | 17 +
> 1 file changed, 17 insertions(+)
> create mode 100644 arch/arm/dts/s900-u-boot.dtsi
>
> diff --git a/arch/arm/dts/s900-u-boot.dtsi b/arch/arm/dts/s900-u-boot.dtsi
> new file mode 100644
> index 000..a95f2cc
> --- /dev/null
> +++ b/arch/arm/dts/s900-u-boot.dtsi
> @@ -0,0 +1,17 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + */
> +
> +/{
> + soc {
> + u-boot,dm-pre-reloc;
Ignore my comment about this change in previous patch.
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> --
> 2.7.4
>
Re: [PATCH v3 07/21] arm: dts: sync dts for Action Semi S900
On Sat, Jan 25, 2020 at 05:52:49PM +0530, Amit Singh Tomar wrote:
> Synchronize device tree bindings with v5.5-rc6 tag with commit id
> "b3a987b".
>
> Also, it removes older clock binding defined for S900.
>
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v2:
> * Newly added patch, not there in v2/v1.
> ---
> arch/arm/dts/s900.dtsi | 322
> +++--
> include/dt-bindings/clock/actions,s900-cmu.h | 129 ++
> include/dt-bindings/clock/s900_cmu.h | 77 --
> include/dt-bindings/reset/actions,s900-reset.h | 65 +
> 4 files changed, 495 insertions(+), 98 deletions(-)
> create mode 100644 include/dt-bindings/clock/actions,s900-cmu.h
> delete mode 100644 include/dt-bindings/clock/s900_cmu.h
> create mode 100644 include/dt-bindings/reset/actions,s900-reset.h
>
> diff --git a/arch/arm/dts/s900.dtsi b/arch/arm/dts/s900.dtsi
> index 2bbb30a..eb35cf7 100644
> --- a/arch/arm/dts/s900.dtsi
> +++ b/arch/arm/dts/s900.dtsi
> @@ -1,17 +1,94 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -//
> -// Device Tree Source for Actions Semi S900 SoC
> -//
> -// Copyright (C) 2015 Actions Semi Co., Ltd.
> -// Copyright (C) 2018 Manivannan Sadhasivam
>
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
>
> -/dts-v1/;
> -#include
> +#include
> +#include
> +#include
> +#include
>
> / {
> compatible = "actions,s900";
> - #address-cells = <0x2>;
> - #size-cells = <0x2>;
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secmon@1f00 {
> + reg = <0x0 0x1f00 0x0 0x100>;
> + no-map;
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = ,
> + ,
> + ,
> + ;
> + interrupt-affinity = <>, <>, <>, <>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + hosc: hosc {
> + compatible = "fixed-clock";
> + clock-frequency = <2400>;
> + #clock-cells = <0>;
> + };
>
> losc: losc {
> compatible = "fixed-clock";
> @@ -26,28 +103,231 @@
> };
>
> soc {
> - u-boot,dm-pre-reloc;
> compatible = "simple-bus&quo
Re: [PATCH v3 06/21] actions:s700: add u-boot specific dts file
On Sat, Jan 25, 2020 at 05:52:48PM +0530, Amit Singh Tomar wrote:
> Devices like uart and clk are needed to be enabled before relocation.
> this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.
>
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v2:
> * Added License.
> Changes since v1:
> * This is newly added file that was *not* present in v1 and
> contains u-boot specific changes.
> ---
> arch/arm/dts/s700-u-boot.dtsi | 18 ++
> 1 file changed, 18 insertions(+)
> create mode 100644 arch/arm/dts/s700-u-boot.dtsi
>
> diff --git a/arch/arm/dts/s700-u-boot.dtsi b/arch/arm/dts/s700-u-boot.dtsi
> new file mode 100644
> index 000..a527ccc
> --- /dev/null
> +++ b/arch/arm/dts/s700-u-boot.dtsi
> @@ -0,0 +1,18 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2020 Amit Singh Tomar
> + */
> +
> +/{
> + soc {
> + u-boot,dm-pre-reloc;
What is this for?
Thanks,
Mani
> + };
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> +
> + {
> + u-boot,dm-pre-reloc;
> +};
> --
> 2.7.4
>
Re: [PATCH v3 05/21] arm: actions: add S700 SoC device tree
On Sat, Jan 25, 2020 at 05:52:47PM +0530, Amit Singh Tomar wrote:
> This patch adds .dtsi file(sync with Linux 5.5) and required binding
> for S700 SoC that is a 64-bit Quad-core ARM Cortex-A53 cores.
>
You are importing from Linux kernel, right? Why not mention that?
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v2:
> * Synced DTS bindings with Linux 5.5.
> Changes since v1:
> * Moved the u-boot specific changes to s700-u-boot.dtsi, now
> s700.dtsi is in complete sync with Linux 4.20.
> ---
> arch/arm/dts/Makefile | 6 +-
> arch/arm/dts/s700.dtsi | 248
> +
> include/dt-bindings/clock/actions,s700-cmu.h | 118
> include/dt-bindings/reset/actions,s700-reset.h | 34
> 4 files changed, 404 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm/dts/s700.dtsi
> create mode 100644 include/dt-bindings/clock/actions,s700-cmu.h
> create mode 100644 include/dt-bindings/reset/actions,s700-reset.h
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index b48b05f..0ad14fb 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -64,8 +64,10 @@ dtb-$(CONFIG_KIRKWOOD) += \
> kirkwood-pogo_e02.dtb \
> kirkwood-sheevaplug.dtb
>
> -dtb-$(CONFIG_ARCH_OWL) += \
> - bubblegum_96.dtb
> +dtb-$(CONFIG_MACH_S900) += \
> +bubblegum_96.dtb
Commit message doesn't mention this change
Thanks,
Mani
> +dtb-$(CONFIG_MACH_S700) += \
> +s700-cubieboard7.dtb
>
> dtb-$(CONFIG_ROCKCHIP_PX30) += \
> px30-evb.dtb \
> diff --git a/arch/arm/dts/s700.dtsi b/arch/arm/dts/s700.dtsi
> new file mode 100644
> index 000..2006ad5
> --- /dev/null
> +++ b/arch/arm/dts/s700.dtsi
> @@ -0,0 +1,248 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2017 Andreas Färber
> + */
> +
> +#include
> +#include
> +#include
> +
> +/ {
> + compatible = "actions,s700";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <2>;
> + #size-cells = <0>;
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x0>;
> + enable-method = "psci";
> + };
> +
> + cpu1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x1>;
> + enable-method = "psci";
> + };
> +
> + cpu2: cpu@2 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x2>;
> + enable-method = "psci";
> + };
> +
> + cpu3: cpu@3 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53";
> + reg = <0x0 0x3>;
> + enable-method = "psci";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + secmon@1f00 {
> + reg = <0x0 0x1f00 0x0 0x100>;
> + no-map;
> + };
> + };
> +
> + psci {
> + compatible = "arm,psci-0.2";
> + method = "smc";
> + };
> +
> + arm-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = ,
> + ,
> + ,
> + ;
> + interrupt-affinity = <>, <>, <>, <>;
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> + + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> + };
> +
> + hosc: hosc {
> + compatible = "fixed-clock";
> + clock-frequency = <2400>;
> + #clock-cells = <0>;
> + };
> +
> + losc: losc {
> + compatible = "fixed-clock";
> + clock-frequency = <32768>;
> + #clock-cells = <0>;
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gic: interrupt-controller@e00f1000 {
> + compatible = "arm,gic-400";
> + reg = <0x0 0xe00f1000 0x0 0x1000>,
> + <0x0 0xe00f2000 0x0 0x2000>,
> +
Re: [PATCH v3 04/21] arm: add support Actions Semi S700
On Sat, Jan 25, 2020 at 05:52:46PM +0530, Amit Singh Tomar wrote: > This patch adds basic support for Actions Semi based S700 > SoC, which is driven by common owl framework. > > Signed-off-by: Amit Singh Tomar > --- > Changes since v2: > * Fixed the commit message. > * Checked for the clk->id. > * Added a .data member with SoC type. > * Removed #ifdefs from few places. > Changes since v1: > * Moved CLK and CLK_OWL symbols from defconfig to arch/arm/Kconfig. > --- > arch/arm/mach-owl/Kconfig | 6 ++ > include/configs/s700.h| 13 + > 2 files changed, 19 insertions(+) > create mode 100644 include/configs/s700.h > > diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig > index 28f6121..4d85b37 100644 > --- a/arch/arm/mach-owl/Kconfig > +++ b/arch/arm/mach-owl/Kconfig > @@ -8,6 +8,10 @@ config MACH_S900 > bool "Actions Semi S900" > select ARM64 > > +config MACH_S700 > +bool "Actions Semi S700" Actions Semi S700 SoC. Same for S900. Thanks, Mani > +select ARM64 > + > endchoice > > config SYS_TEXT_BASE > @@ -15,8 +19,10 @@ config SYS_TEXT_BASE > > config SYS_CONFIG_NAME > default "s900" if MACH_S900 > +default "s700" if MACH_S700 > > config SYS_SOC > default "s900" if MACH_S900 > +default "s700" if MACH_S700 > > endif > diff --git a/include/configs/s700.h b/include/configs/s700.h > new file mode 100644 > index 000..fab0d04 > --- /dev/null > +++ b/include/configs/s700.h > @@ -0,0 +1,13 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ > +/* > + */ > + > +#ifndef _CONFIG_S700_H_ > +#define _CONFIG_S700_H_ > + > +/* > + * Include common owl configuration where most the settings are > + */ > +#include > + > +#endif > -- > 2.7.4 >
Re: [PATCH v3 03/21] clk: actions: Add common clock driver
On Sat, Jan 25, 2020 at 05:52:45PM +0530, Amit Singh Tomar wrote:
> This patch converts S900 clock driver to something common that can
> be used for other SoCs, for instance S700(few of clk registres are same).
>
registers
> Signed-off-by: Amit Singh Tomar
> ---
> Changes since v2:
> * Fixed the commit message.
> * Checked for the clk->id.
> * Added a .data member with SoC type.
> * Removed #ifdefs from few places.
> Changes since v1:
> * Moved CLK and CLK_OWL symbols from defconfig to arch/arm/Kconfig.
> ---
> arch/arm/Kconfig | 2 +
> arch/arm/include/asm/arch-owl/clk_s900.h | 57 ---
> arch/arm/include/asm/arch-owl/regs_s700.h | 56 +++
> configs/bubblegum_96_defconfig| 3 -
> drivers/clk/owl/Kconfig | 8 +-
> drivers/clk/owl/Makefile | 2 +-
> drivers/clk/owl/clk_owl.c | 159
> ++
> drivers/clk/owl/clk_owl.h | 65
> drivers/clk/owl/clk_s900.c| 137 -
> 9 files changed, 285 insertions(+), 204 deletions(-)
> delete mode 100644 arch/arm/include/asm/arch-owl/clk_s900.h
> create mode 100644 arch/arm/include/asm/arch-owl/regs_s700.h
> create mode 100644 drivers/clk/owl/clk_owl.c
> create mode 100644 drivers/clk/owl/clk_owl.h
> delete mode 100644 drivers/clk/owl/clk_s900.c
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 905118b..e6a9d32 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -886,6 +886,8 @@ config ARCH_OWL
> select DM
> select DM_SERIAL
> select OWL_SERIAL
> + select CLK
> + select CLK_OWL
> select OF_CONTROL
> imply CMD_DM
>
> diff --git a/arch/arm/include/asm/arch-owl/clk_s900.h
> b/arch/arm/include/asm/arch-owl/clk_s900.h
> deleted file mode 100644
> index 88e88f7..000
> --- a/arch/arm/include/asm/arch-owl/clk_s900.h
> +++ /dev/null
> @@ -1,57 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * Actions Semi S900 Clock Definitions
> - *
> - * Copyright (C) 2015 Actions Semi Co., Ltd.
> - * Copyright (C) 2018 Manivannan Sadhasivam
>
> - *
> - */
> -
> -#ifndef _OWL_CLK_S900_H_
> -#define _OWL_CLK_S900_H_
> -
> -#include
> -
> -struct owl_clk_priv {
> - phys_addr_t base;
> -};
> -
> -/* BUSCLK register definitions */
> -#define CMU_PDBGDIV_87
> -#define CMU_PDBGDIV_SHIFT26
> -#define CMU_PDBGDIV_DIV (CMU_PDBGDIV_8 << CMU_PDBGDIV_SHIFT)
> -#define CMU_PERDIV_8 7
> -#define CMU_PERDIV_SHIFT 20
> -#define CMU_PERDIV_DIV (CMU_PERDIV_8 << CMU_PERDIV_SHIFT)
> -#define CMU_NOCDIV_2 1
> -#define CMU_NOCDIV_SHIFT 19
> -#define CMU_NOCDIV_DIV (CMU_NOCDIV_2 << CMU_NOCDIV_SHIFT)
> -#define CMU_DMMCLK_SRC_APLL 2
> -#define CMU_DMMCLK_SRC_SHIFT 10
> -#define CMU_DMMCLK_SRC (CMU_DMMCLK_SRC_APLL <<
> CMU_DMMCLK_SRC_SHIFT)
> -#define CMU_APBCLK_DIV BIT(8)
> -#define CMU_NOCCLK_SRC BIT(7)
> -#define CMU_AHBCLK_DIV BIT(4)
> -#define CMU_CORECLK_MASK 3
> -#define CMU_CORECLK_CPLL BIT(1)
> -#define CMU_CORECLK_HOSC BIT(0)
> -
> -/* COREPLL register definitions */
> -#define CMU_COREPLL_EN BIT(9)
> -#define CMU_COREPLL_HOSC_EN BIT(8)
> -#define CMU_COREPLL_OUT (1104 / 24)
> -
> -/* DEVPLL register definitions */
> -#define CMU_DEVPLL_CLK BIT(12)
> -#define CMU_DEVPLL_ENBIT(8)
> -#define CMU_DEVPLL_OUT (660 / 6)
> -
> -/* UARTCLK register definitions */
> -#define CMU_UARTCLK_SRC_DEVPLL BIT(16)
> -
> -/* DEVCLKEN1 register definitions */
> -#define CMU_DEVCLKEN1_UART5 BIT(21)
> -
> -#define PLL_STABILITY_WAIT_US50
> -
> -#endif
> diff --git a/arch/arm/include/asm/arch-owl/regs_s700.h
> b/arch/arm/include/asm/arch-owl/regs_s700.h
> new file mode 100644
> index 000..a0bd737
> --- /dev/null
> +++ b/arch/arm/include/asm/arch-owl/regs_s700.h
> @@ -0,0 +1,56 @@
> +/* SPDX-License-Identifier: GPL-2.0+ */
> +/*
> + * Actions Semi S700 Register Definitions
> + *
> + */
> +
> +#ifndef _OWL_REGS_S700_H_
> +#define _OWL_REGS_S700_H_
> +
> +#define CMU_COREPLL (0x)
> +#define CMU_DEVPLL (0x0004)
> +#define CMU_DDRPLL (0x0008)
> +#define CMU_NANDPLL (0x000C)
> +#define CMU_DISPLAYPLL (0x0010)
> +#define CMU_AUDIOPLL (0x0014)
> +#define CMU_TVOUTPLL (0x0018)
&
Re: [PATCH v3 02/21] arm: actions: rename sysmap-s900 to sysmap-owl
On Sat, Jan 25, 2020 at 05:52:44PM +0530, Amit Singh Tomar wrote:
> Now that memory maps(for both S700 and S900 SoCs) can be managed using
> a common file, rename sysmap-s900 to sysmap-owl to reflect the same.
>
> Signed-off-by: Amit Singh Tomar
Reviewed-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
> Changes since v2:
> * Fixed the commit message and header.
> Changes since v1:
> * compile sysmap-owl.c against CONFIG_ARM64 now.
> ---
> arch/arm/mach-owl/Makefile | 2 +-
> arch/arm/mach-owl/sysmap-owl.c | 32
> arch/arm/mach-owl/sysmap-s900.c | 32
> 3 files changed, 33 insertions(+), 33 deletions(-)
> create mode 100644 arch/arm/mach-owl/sysmap-owl.c
> delete mode 100644 arch/arm/mach-owl/sysmap-s900.c
>
> diff --git a/arch/arm/mach-owl/Makefile b/arch/arm/mach-owl/Makefile
> index 0b181c6..f3a69eb 100644
> --- a/arch/arm/mach-owl/Makefile
> +++ b/arch/arm/mach-owl/Makefile
> @@ -1,4 +1,4 @@
> # SPDX-License-Identifier: GPL-2.0+
>
> obj-y += soc.o
> -obj-y += sysmap-s900.o
> +obj-$(CONFIG_ARM64) += sysmap-owl.o
> diff --git a/arch/arm/mach-owl/sysmap-owl.c b/arch/arm/mach-owl/sysmap-owl.c
> new file mode 100644
> index 000..81f6ca2
> --- /dev/null
> +++ b/arch/arm/mach-owl/sysmap-owl.c
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Memory map for Actions Semi Owl series SoCs.
> + *
> + * Copyright (C) 2015 Actions Semi Co., Ltd.
> + * Copyright (C) 2018 Manivannan Sadhasivam
>
> + */
> +
> +#include
> +#include
> +
> +static struct mm_region owl_mem_map[] = {
> + {
> + .virt = 0x0UL, /* DDR */
> + .phys = 0x0UL, /* DDR */
> + .size = 0x8000UL,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> + PTE_BLOCK_INNER_SHARE
> + }, {
> + .virt = 0xE000UL, /* Peripheral block */
> + .phys = 0xE000UL, /* Peripheral block */
> + .size = 0x0800UL,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> + PTE_BLOCK_NON_SHARE |
> + PTE_BLOCK_PXN | PTE_BLOCK_UXN
> + }, {
> + /* List terminator */
> + 0,
> + }
> +};
> +
> +struct mm_region *mem_map = owl_mem_map;
> diff --git a/arch/arm/mach-owl/sysmap-s900.c b/arch/arm/mach-owl/sysmap-s900.c
> deleted file mode 100644
> index f78b639..000
> --- a/arch/arm/mach-owl/sysmap-s900.c
> +++ /dev/null
> @@ -1,32 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * Actions Semi S900 Memory map
> - *
> - * Copyright (C) 2015 Actions Semi Co., Ltd.
> - * Copyright (C) 2018 Manivannan Sadhasivam
>
> - */
> -
> -#include
> -#include
> -
> -static struct mm_region s900_mem_map[] = {
> - {
> - .virt = 0x0UL, /* DDR */
> - .phys = 0x0UL, /* DDR */
> - .size = 0x8000UL,
> - .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> - PTE_BLOCK_INNER_SHARE
> - }, {
> - .virt = 0xE000UL, /* Peripheral block */
> - .phys = 0xE000UL, /* Peripheral block */
> - .size = 0x0800UL,
> - .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
> - PTE_BLOCK_NON_SHARE |
> - PTE_BLOCK_PXN | PTE_BLOCK_UXN
> - }, {
> - /* List terminator */
> - 0,
> - }
> -};
> -
> -struct mm_region *mem_map = s900_mem_map;
> --
> 2.7.4
>
Re: [PATCH v3 01/21] arm: actions: Add common framework for Actions Owl Semi SoCs
On Sat, Jan 25, 2020 at 05:52:43PM +0530, Amit Singh Tomar wrote: > This commit adds common arch support for Actions Semi Owl > series SoCs and removes the Bubblegum96 board files. > > Signed-off-by: Amit Singh Tomar > --- > MAINTAINERS | 2 + > arch/arm/Kconfig | 3 +- > arch/arm/mach-owl/Kconfig| 29 ++ > arch/arm/mach-owl/Makefile | 1 + > arch/arm/mach-owl/soc.c | 57 > > board/ucRobotics/bubblegum_96/Kconfig| 15 > board/ucRobotics/bubblegum_96/MAINTAINERS| 6 --- > board/ucRobotics/bubblegum_96/Makefile | 3 -- > board/ucRobotics/bubblegum_96/bubblegum_96.c | 57 > > configs/bubblegum_96_defconfig | 4 +- > include/configs/bubblegum_96.h | 40 --- > include/configs/owl-common.h | 40 +++ > include/configs/s900.h | 16 > 13 files changed, 130 insertions(+), 143 deletions(-) > create mode 100644 arch/arm/mach-owl/soc.c > delete mode 100644 board/ucRobotics/bubblegum_96/Kconfig > delete mode 100644 board/ucRobotics/bubblegum_96/MAINTAINERS > delete mode 100644 board/ucRobotics/bubblegum_96/Makefile > delete mode 100644 board/ucRobotics/bubblegum_96/bubblegum_96.c > delete mode 100644 include/configs/bubblegum_96.h > create mode 100644 include/configs/owl-common.h > create mode 100644 include/configs/s900.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index b0634b2..218d811 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -266,6 +266,8 @@ F:arch/arm/mach-owl/ > F: board/ucRobotics/ > F: drivers/clk/owl/ > F: drivers/serial/serial_owl.c > +F: include/configs/bubblegum_96.h This got changed to include/configs/owl-common.h > +F: configs/bubblegum_96_defconfig > > ARM RENESAS RMOBILE/R-CAR > M: Nobuhiro Iwamatsu > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 9608f54..905118b 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -883,9 +883,9 @@ config ARCH_MX5 > > config ARCH_OWL > bool "Actions Semi OWL SoCs" > - select ARM64 > select DM > select DM_SERIAL > + select OWL_SERIAL > select OF_CONTROL > imply CMD_DM > > @@ -1878,7 +1878,6 @@ source "board/spear/spear600/Kconfig" > source "board/spear/x600/Kconfig" > source "board/st/stv0991/Kconfig" > source "board/tcl/sl50/Kconfig" > -source "board/ucRobotics/bubblegum_96/Kconfig" > source "board/birdland/bav335x/Kconfig" > source "board/toradex/colibri_pxa270/Kconfig" > source "board/variscite/dart_6ul/Kconfig" > diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig > index 199e772..28f6121 100644 > --- a/arch/arm/mach-owl/Kconfig > +++ b/arch/arm/mach-owl/Kconfig > @@ -1,27 +1,22 @@ > if ARCH_OWL > > -config SYS_SOC > - default "owl" > - > choice > -prompt "Actions Semi OWL SoCs board select" > +prompt "Actions Semi Owl SoC Variant" > optional > > -config TARGET_BUBBLEGUM_96 > - bool "96Boards Bubblegum-96" > - help > - Support for 96Boards Bubblegum-96. This board complies with > - 96Board Consumer Edition Specification. Features: > - - Actions Semi S900 SoC (4xCortex A53, Power VR G6230 GPU) > - - 2GiB RAM > - - 8GiB eMMC, uSD slot > - - WiFi, Bluetooth and GPS module > - - 2x Host, 1x Device USB port > - - HDMI > - - 20-pin low speed and 40-pin high speed expanders, 6 LED, 3 buttons > +config MACH_S900 > +bool "Actions Semi S900" Actions Semi S900 SoC > +select ARM64 > > endchoice > > -source "board/ucRobotics/bubblegum_96/Kconfig" > +config SYS_TEXT_BASE > +default 0x1100 > + > +config SYS_CONFIG_NAME > +default "s900" if MACH_S900 > + > +config SYS_SOC > +default "s900" if MACH_S900 > > endif > diff --git a/arch/arm/mach-owl/Makefile b/arch/arm/mach-owl/Makefile > index 1b43dc2..0b181c6 100644 > --- a/arch/arm/mach-owl/Makefile > +++ b/arch/arm/mach-owl/Makefile > @@ -1,3 +1,4 @@ > # SPDX-License-Identifier: GPL-2.0+ > > +obj-y += soc.o > obj-y += sysmap-s900.o > diff --git a/arch/arm/mach-owl/soc.c b/arch/arm/mach-owl/soc.c > new file mode 100644 > index 000..0f9ac64 > --- /dev/null >
Re: [PATCH v3 00/21] Actions S700 SoC support
Hi Amit, On Sat, Jan 25, 2020 at 05:52:42PM +0530, Amit Singh Tomar wrote: > Hi, > > This is continuation of work[1], submitted(v2) almost a year back. > > It adds Cubieboard7[1] support based on Action Semi's S700 SoC[2], It's > Quad-core ARMv8 SoC > with Cortex-A53 cores. Peripheral like UART seems to be compatible with S900 > SoC(basic support > for it is alreay present in u-boot). > > First few patches(from 1/21 to 3/21) consolidates Actions Semiconductor SoCs > support in u-boot(mostly insprired > by SUXNI as suggested by Andre). Idea is to move every bit out from > board/ucRobotics into arch/arm/mach-owl. > It allows different SoCs to be driven by single "soc and Kconfig" file. It > also includes common clock driver > for S700 and S900. Patches(from 4/21 to 6/21 and 10/21 to 12/21) enables S700 > SoC support alongwith > Cubieboard7 board. > > While at it, took the opportunity to sync S900 DT sources and > bindings(patches from 7/21 to 8/21) with > Linux(tag v5.5-rc6) and it is compiled-tested. > > Patch(9/21) uses same name for ethernet clock binding and if it's ok, would > like to send it to LKML > as well. > > Patches(from 13/21 to 14/21) adds support for RTL 8201F PHY module and > introduce configuration option > "RTL8201F_PHY_S700_RMII_TIMINGS" to fulfill specific timing requirements for > S700. > > Patches(from 15/21 to 17/21) adds support for generic reset controller, > originally used for NEXELL[3] > series but never gets merged and it can be used for S700. > > Patches(from 18/21 to 21/21) are there to enable Ethenet support in S700, MAC > is based on Designware IP > These patches re-uses the existing driver(drivers/net/designware.c) and > programs SoC specific bits to > enable ethernet. SoC specific glue code is kept in dwmac_s700.c file, did it > this way as found it more > cleaner(but having said that I am not really sure, if it's bit of a overkill > to have it) or we can keep > this glue code somewhere in machine file? > > S700 support is tested[4] on Cubieboard7 board and S900 support is just > compiled tested. > Sorry for the late reply. Got swamped with lot of stuffs :( Thanks a lot for the series! I will review it soon and test it on my S900 based Bubblegum 96 board. Thanks, Mani > Also, patches are rebased upon following commit: > 2c871f9e084b2c03d1961884228a6901387ab8d6 Merge branch > '2020-01-22-master-imports' > > Thanks > -Amit > > [1]: https://patchwork.ozlabs.org/cover/1020286/ > [2]: http://www.actions-semi.com/en/productview.aspx?id=225 > [3]: https://lists.denx.de/pipermail/u-boot/2017-November/313135.html > [4]: https://paste.ubuntu.com/p/GkFPn2xJfn/ > > Amit Singh Tomar (21): > arm: actions: Add common framework for Actions Semi SoCs > arm: actions: rename sysmap-s900 to sysmap-owl > clk: actions: Add common clock driver > arm: add support Actions Semi S700 > arm: actions: add S700 SoC device tree > actions:s700: add u-boot specific dts file > arm: dts: sync dts for Action Semi S900 > actions: s900: add u-boot specific dts file > arm: dts: Use consistent name "CLK_ETHERNET" for the Ethernet clock > binding > serial: actions: add uart support for s700 > arm: add Cubieboard7 board support > actions: add Cubieboard7 README > net: phy: realtek: Add support for RTL8201F PHY module. > net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust > rx/tx timings > reset: add driver for generic reset controllers > arm: dts: s700: add node for reset controller > owl: Kconfig: Enable dm reset and generic reset > net: designware: s700: Add glue code for S700 mac > arm: dts: s700: add node for ethernet controller > owl: Kconfig: Enable dm eth for OWL platform > configs: Enable mac and phy configs > > MAINTAINERS| 2 + > arch/arm/Kconfig | 8 +- > arch/arm/dts/Makefile | 6 +- > arch/arm/dts/s700-cubieboard7.dts | 39 +++ > arch/arm/dts/s700-u-boot.dtsi | 39 +++ > arch/arm/dts/s700.dtsi | 248 +++ > arch/arm/dts/s900-u-boot.dtsi | 17 ++ > arch/arm/dts/s900.dtsi | 322 > +++-- > arch/arm/include/asm/arch-owl/clk_s900.h | 57 - > arch/arm/include/asm/arch-owl/regs_s700.h | 62 + > arch/arm/mach-owl/Kconfig | 35 +-- > arch/arm/mach-owl/Makefile | 3 +- > arch/arm/mach-owl/README.cubieboard7 | 88 +++ > arch/arm/mach-owl/soc.c| 57 + > arch/arm/mach-owl/sysmap-owl.c | 32 +++ > arch/arm/mach-owl/sysmap-s900.c| 32 --- > board/ucRobotics/bubblegum_96/Kconfig | 15 -- > board/ucRobotics/bubblegum_96/MAINTAINERS | 6 - > board/ucRobotics/bubblegum_96/Makefile | 3 - >
Re: [U-Boot] [PATCH 1/4] arm64: dts: rk3399-rock960: add vdd_log and its init value
On Wed, Nov 13, 2019 at 11:14:09AM +0800, Kever Yang wrote:
> Add vdd_log node according to rock960 schematic V13.
> This patch affect two boards:
> - Rock960 Model A
> - Ficus
>
> Signed-off-by: Kever Yang
Acked-by: Manivannan Sadhasivam
Thanks,
Mani
> ---
>
> arch/arm/dts/rk3399-rock960-u-boot.dtsi | 13 +
> 1 file changed, 13 insertions(+)
>
> diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> index 4850debdf0..82f2c311af 100644
> --- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> +++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> @@ -10,4 +10,17 @@
> chosen {
> u-boot,spl-boot-order = ,
> };
> +
> + vdd_log: vdd-log {
> + compatible = "pwm-regulator";
> + pwms = < 0 25000 1>;
> + regulator-name = "vdd_log";
> + regulator-always-on;
> + regulator-boot-on;
> + regulator-min-microvolt = <80>;
> + regulator-max-microvolt = <140>;
> + regulator-init-microvolt = <95>;
> + vin-supply = <_sys>;
> + };
> +
> };
> --
> 2.17.1
>
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[U-Boot] [PATCH] board: Add support for iMX8QXP AI_ML board
This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam Reviewed-by: Peng Fan --- arch/arm/mach-imx/imx8/Kconfig| 6 ++ board/einfochips/imx8qxp_ai_ml/Kconfig| 21 board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 ++ board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 ++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 78 +++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 + board/einfochips/imx8qxp_ai_ml/spl.c | 39 configs/imx8qxp_ai_ml_defconfig | 83 include/configs/imx8qxp_ai_ml.h | 95 +++ 10 files changed, 409 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index cdb78afacf..25fe4e2be0 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -55,6 +55,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_EARLY_INIT_F + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -73,6 +78,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/advantech/imx8qm_rom7720_a1/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 00..b6806b8859 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,21 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +config SYS_MALLOC_LEN + default 0x240 + +config ENV_SIZE + default 0x1000 + +config ENV_OFFSET + default 0x40 + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 00..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 00..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 00..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +=== + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml-scfw-tcm.bin +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boo
Re: [U-Boot] [PATCH v5 0/2] Add board support for iMX8QXP AI_ML board
Hi, On Sun, Nov 03, 2019 at 04:29:49PM +0100, Stefano Babic wrote: > On 21/10/19 13:00, Manivannan Sadhasivam wrote: > > Hi, > > > > On Thu, Aug 15, 2019 at 01:57:23PM +0530, Manivannan Sadhasivam wrote: > >> Hello, > >> > >> This patchset adds initial board support for iMX8QXP AI_ML board > >> from Einfochips. This board is one of the Consumer Edition and AI > >> boards of the 96Boards family. > >> > >> This initial supports contains following peripherals which are tested and > >> known to work: > >> > >> 1. Debug serial via UART2 > >> 2. SD card > >> 3. Ethernet > >> > >> Below is the boot log from SPL to Linux kernel: > >> === > >> > >> MMC: FSL_SDHC: 0, FSL_SDHC: 1 > >> Loading Environment from MMC... *** Warning - bad CRC, using default > >> environment > >> > >> In:serial@5a08 > >> Out: serial@5a08 > >> Err: serial@5a08 > >> Net: > >> Warning: ethernet@5b04 (eth0) using random MAC address - > >> d2:46:66:cf:f5:61 > >> eth0: ethernet@5b04 > >> Hit any key to stop autoboot: 0 > >> switch to partitions #0, OK > >> mmc1 is current device > >> Scanning mmc 1:1... > >> Found /extlinux/extlinux.conf > >> Retrieving file: /extlinux/extlinux.conf > >> 171 bytes read in 14 ms (11.7 KiB/s) > >> 1: ai_ml-kernel > >> Retrieving file: /Image > >> 24689152 bytes read in 1055 ms (22.3 MiB/s) > >> append: earlycon console=ttyLP2,115200 rw root=/dev/mmcblk0p2 > >> rootfstype=ext4 init=/sbin/t > >> Retrieving file: /imx8qxp-ai_ml.dtb > >> 12529 bytes read in 13 ms (940.4 KiB/s) > >> ## Flattened Device Tree blob at 8300 > >>Booting using the fdt blob at 0x8300 > >>Using Device Tree in place at 8300, end 830060f0 > >> > >> Starting kernel ... > >> > >> [0.00] Booting Linux on physical CPU 0x00 [0x410fd042] > >> [0.00] Linux version 5.2.0-03138-gd75da80dce39 > >> (mani@Mani-XPS-13-9360) (gcc versi9 > >> [0.00] Machine model: Einfochips i.MX8QXP AI_ML > >> [0.00] efi: Getting EFI parameters from FDT: > >> [0.00] efi: UEFI not found. > >> [0.00] cma: Reserved 32 MiB at 0xfe00 > >> [0.00] earlycon: lpuart32 at MMIO 0x5a08 (options '') > >> [0.00] printk: bootconsole [lpuart32] enabled > >> > >> Thanks, > >> Mani > >> > > > > Any update on this patchset? > > Sorry for delay. Anyway, I have applied the patch, but due to changes in > other subsystems (environment, etc.) it is not built clean. Could you > rebase and resend ? Thanks > So you want me to just resend the board support patch? (Saw that you applied DT patch) Thanks, Mani > Best regards, > Stefano > > > > > Thanks, > > Mani > > > >> Note: This patchset depends on the below cleanup patches submitted: > >> [U-Boot,1/2] arm: imx8: factor out uart init code > >> [U-Boot,2/2] arm: imx8: don't duplicate build_info() > >> > >> Changes in v5: > >> > >> * Incorporated review comments from Lukasz. > >> > >> Changes in v4: > >> > >> * Incorporated review comments from Fabio. > >> > >> Changes in v3: > >> > >> * Incorporated review comments from Fabio. Major change is switching to > >> distro_boot. > >> * Added Reviewed-by tag from Peng Fan. > >> > >> Changes in v2: > >> > >> * Rebased the patches on top of following patches: > >> [U-Boot,1/2] arm: imx8: factor out uart init code > >> [U-Boot,2/2] arm: imx8: don't duplicate build_info() > >> > >> Manivannan Sadhasivam (2): > >> arm: dts: Add devicetree support for iMXQXP AI_ML board > >> board: Add support for iMX8QXP AI_ML board > >> > >> arch/arm/dts/Makefile | 1 + > >> arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi| 117 +++ > >> arch/arm/dts/fsl-imx8qxp-ai_ml.dts| 181 ++ > >> arch/arm/mach-imx/imx8/Kconfig| 6 + > >> board/einfochips/imx8qxp_ai_ml/Kconfig| 21 ++ > >> board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + > >> board/einfochips/imx8qxp_ai_ml/Makefile | 8
Re: [U-Boot] [PATCH v5 0/2] Add board support for iMX8QXP AI_ML board
Hi, On Thu, Aug 15, 2019 at 01:57:23PM +0530, Manivannan Sadhasivam wrote: > Hello, > > This patchset adds initial board support for iMX8QXP AI_ML board > from Einfochips. This board is one of the Consumer Edition and AI > boards of the 96Boards family. > > This initial supports contains following peripherals which are tested and > known to work: > > 1. Debug serial via UART2 > 2. SD card > 3. Ethernet > > Below is the boot log from SPL to Linux kernel: > === > > MMC: FSL_SDHC: 0, FSL_SDHC: 1 > Loading Environment from MMC... *** Warning - bad CRC, using default > environment > > In:serial@5a08 > Out: serial@5a08 > Err: serial@5a08 > Net: > Warning: ethernet@5b04 (eth0) using random MAC address - d2:46:66:cf:f5:61 > eth0: ethernet@5b04 > Hit any key to stop autoboot: 0 > switch to partitions #0, OK > mmc1 is current device > Scanning mmc 1:1... > Found /extlinux/extlinux.conf > Retrieving file: /extlinux/extlinux.conf > 171 bytes read in 14 ms (11.7 KiB/s) > 1: ai_ml-kernel > Retrieving file: /Image > 24689152 bytes read in 1055 ms (22.3 MiB/s) > append: earlycon console=ttyLP2,115200 rw root=/dev/mmcblk0p2 rootfstype=ext4 > init=/sbin/t > Retrieving file: /imx8qxp-ai_ml.dtb > 12529 bytes read in 13 ms (940.4 KiB/s) > ## Flattened Device Tree blob at 8300 >Booting using the fdt blob at 0x8300 >Using Device Tree in place at 8300, end 830060f0 > > Starting kernel ... > > [0.00] Booting Linux on physical CPU 0x00 [0x410fd042] > [0.00] Linux version 5.2.0-03138-gd75da80dce39 > (mani@Mani-XPS-13-9360) (gcc versi9 > [0.00] Machine model: Einfochips i.MX8QXP AI_ML > [0.00] efi: Getting EFI parameters from FDT: > [0.00] efi: UEFI not found. > [0.00] cma: Reserved 32 MiB at 0xfe00 > [0.00] earlycon: lpuart32 at MMIO 0x5a08 (options '') > [0.00] printk: bootconsole [lpuart32] enabled > > Thanks, > Mani > Any update on this patchset? Thanks, Mani > Note: This patchset depends on the below cleanup patches submitted: > [U-Boot,1/2] arm: imx8: factor out uart init code > [U-Boot,2/2] arm: imx8: don't duplicate build_info() > > Changes in v5: > > * Incorporated review comments from Lukasz. > > Changes in v4: > > * Incorporated review comments from Fabio. > > Changes in v3: > > * Incorporated review comments from Fabio. Major change is switching to > distro_boot. > * Added Reviewed-by tag from Peng Fan. > > Changes in v2: > > * Rebased the patches on top of following patches: > [U-Boot,1/2] arm: imx8: factor out uart init code > [U-Boot,2/2] arm: imx8: don't duplicate build_info() > > Manivannan Sadhasivam (2): > arm: dts: Add devicetree support for iMXQXP AI_ML board > board: Add support for iMX8QXP AI_ML board > > arch/arm/dts/Makefile | 1 + > arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi| 117 +++ > arch/arm/dts/fsl-imx8qxp-ai_ml.dts| 181 ++ > arch/arm/mach-imx/imx8/Kconfig| 6 + > board/einfochips/imx8qxp_ai_ml/Kconfig| 21 ++ > board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + > board/einfochips/imx8qxp_ai_ml/Makefile | 8 + > board/einfochips/imx8qxp_ai_ml/README | 49 + > .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 79 > board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++ > board/einfochips/imx8qxp_ai_ml/spl.c | 39 > configs/imx8qxp_ai_ml_defconfig | 83 > include/configs/imx8qxp_ai_ml.h | 95 + > 13 files changed, 709 insertions(+) > create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi > create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts > create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig > create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS > create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile > create mode 100644 board/einfochips/imx8qxp_ai_ml/README > create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c > create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg > create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c > create mode 100644 configs/imx8qxp_ai_ml_defconfig > create mode 100644 include/configs/imx8qxp_ai_ml.h > > -- > 2.17.1 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 00/57] ram: rk3399: Add LPDDR4 support
On Sun, Oct 06, 2019 at 09:05:43AM +0800, Qu Wenruo wrote: > > > On 2019/7/16 下午7:56, Jagan Teki wrote: > > This is next revison of lpddr4 support on rk3399 compared to > > previous set[1]. It has some changes based on the commit orders > > and squashing few patches together and rest is same. > > > > Thanks to > > - YouMin Chen > > - Akash Gajjar > > - Kever Yang > > for supporting all the help on this work. > > > > Changes for v3: > > - squash set_rate code in one patch > > - tested in Rockpro64 and Rock-PI-4 > > Great works! Can't wait to try them on both boards! > > Would you mind to setup a git repo for this large patchset? > It would be much easier for other guys to test, other than fetching all > the patches and apply them. > +1. I'd love to try this series on Rock960 Model C. Thanks, Mani > Thanks, > Qu > > > - order them in proper way > > - rebase on master > > Changes for v2: > > - handle LPDDR4 code as part of CONFIG_RAM_RK3399_LPDDR4 > > - support data_training and set_rate via sdram_rk3399_ops > > - add proper sys_reg_enc macros > > - add new patch to rename variable sdram_params with params > > - fix few commit messages. > > > > patch 0001 - 0018: add dram config enc macro > > > > patch 0019: configure phy IO in ds odt > > > > patch 0020: add LPDDR4 config > > > > patch 0021 - 0043: lpddr4 data training changes > > > > patch 0044 - 0046: syscon pmu support > > > > patch 0047: set 50MHz ddr clock > > > > patch 0048: set 400MHz ddr clock > > > > patch 0049: LPDDR4-400 timings > > > > patch 0050: LPDDR4-800 timings > > > > patch 0051 - 0052: lpddr4 set rate > > > > patch 0053: enable lpddr4 support on Rockpro64 > > > > patch 0054: enable lpddr4 support on Rock-PI 4 > > > > patch 0055: add LPDDR-100 timings via dts > > > > patch 0056: use LPDDR-100 timings on Rockpro64 > > > > patch 0057: use LPDDR-100 timings on Rock-PI 4 > > > > [1] https://patchwork.ozlabs.org/cover/1116734/ > > > > Any inputs? > > Jagan. > > > > Jagan Teki (57): > > ram: rk3399: Add ddrtype enc macro > > ram: rk3399: Add channel number encoder macro > > ram: rk3399: Add row_3_4 enc macro > > ram: rk3399: Add chipinfo macro > > ram: rk3399: Add rank enc macro > > ram: rk3399: Add column enc macro > > ram: rk3399: Add bk enc macro > > ram: rk3399: Add dbw enc macro > > ram: rk3399: Add cs0_rw macro > > ram: rk3399: Add cs1_rw macro > > ram: rk3399: Add bw enc macro > > ram: rk3399: Rename sys_reg with sys_reg2 > > ram: rk3399: Update cs0_row to use sys_reg3 > > ram: rk3399: Update cs1_row to use sys_reg3 > > ram: rk3399: Add cs1_col enc macro > > ram: rk3399: Add ddr version enc macro > > ram: rk3399: Add ddrtimingC0 > > ram: rk3399: Add DdrMode > > ram: rk3399: Configure phy IO in ds odt > > ram: rockchip: Kconfig: Add RK3399 LPDDR4 entry > > ram: rk3399: Add lpddr4 rank mask for ca training > > ram: rk3399: Add lpddr4 rank mask for wdql training > > ram: rk3399: Move mode_sel assignment > > ram: rk3399: Don't wait for PLL lock in lpddr4 > > ram: rk3399: Avoid two channel ZQ Cal Start at the same time > > ram: rk3399: Configure PHY_898, PHY_919 for lpddr4 > > ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4 > > ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4 > > ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4 > > ram: rk3399: Map chipselect for lpddr4 > > ram: rk3399: Configure tsel write ca for lpddr4 > > ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1 > > ram: rk3399: Add IO settings > > ram: sdram: Configure lpddr4 tsel rd, wr based on IO settings > > ram: rk3399: Add tsel control clock drive > > ram: rk3399: Configure soc odt support > > ram: rk3399: Get lpddr4 tsel_rd_en from io settings > > ram: rk3399: Update lpddr4 vref based on io settings > > ram: rk3399: Update lpddr4 mode_sel based on io settings > > ram: rk3399: Update lpddr4 vref_mode_ac > > ram: rk3399: Simplify data training first argument > > ram: rk3399: Handle data training via ops > > ram: rk3399: Add LPPDR4 mr detection > > arm: include: rockchip: Add rk3399 pmu file > > rockchip: rk3399: syscon: Add pmu support > > rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for pmu > > clk: rockchip: rk3399: Set 50MHz ddr clock > > clk: rockchip: rk3399: Set 400MHz ddr clock > > ram: rk3399: Add LPPDDR4-400 timings inc > > ram: rk3399: Add LPPDDR4-800 timings inc > > ram: rk3399: Add set_rate sdram rk3399 ops > > ram: rk3399: Add lpddr4 set rate support > > configs: rockpro64: Enable LPDDR4 support > > configs: rock-pi-4: Enable LPDDR4 support > > rockchip: dts: rk3399: Add LPDDR4-100 timings > > rockchip: dts: rk3399: rockpro64: Use LPDDR4-100 dtsi > > rockchip: dts: rk3399: rock-pi-4: Use LPDDR4-100 dtsi > > > > arch/arm/dts/rk3399-rock-pi-4-u-boot.dtsi |1 + > > arch/arm/dts/rk3399-rockpro64-u-boot.dtsi |1 + > > arch/arm/dts/rk3399-sdram-lpddr4-100.dtsi | 1537 +++
Re: [U-Boot] [PATCH v2 1/2] arm: dts: rock960: Enable booting from eMMC when using SPL
Hi, On Sat, Aug 17, 2019 at 12:23:35AM +0530, Anand Moon wrote: > Hi All, > > On Mon, 5 Aug 2019 at 20:09, Peter Robinson wrote: > > > > On Mon, Aug 5, 2019 at 1:54 PM Kever Yang wrote: > > > > > > > > > On 2019/7/29 下午9:52, Manivannan Sadhasivam wrote: > > > > This commits enables booting from eMMC when using SPL on 96Boards > > > > Rock960 board by adding SDHCI to boot order. Since the SDHCI driver > > > > already has the reloc flag, this works straightaway. While we are at it, > > > > let's also include the common u-boot dtsi for rk3399. > > > > > > > > Signed-off-by: Manivannan Sadhasivam > > > > > > Reviewed-by: Kever Yang > > > > Tested-by: Peter Robinson > > > > I have with me Rock960 model A board, I could not get the > board to boot up using SPL image using microSD card. > > Build spl image for rock960 > [1] https://pastebin.com/6gMPyNr1 > > Console log of boot failed. > [2] https://pastebin.com/EvWzjD0y > > Could some body share the correct steps to build the spl image > for Rock960 Model A board for microSD card. > You seems to be using vendor u-boot! Please forward your questions to 96Boards forum: https://discuss.96boards.org/c/products/rock960 Mailing list only covers issues with upstream u-boot. Thanks, Mani > Best Regards > -Anand ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 2/2] board: Add support for iMX8QXP AI_ML board
This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam Reviewed-by: Peng Fan --- arch/arm/mach-imx/imx8/Kconfig| 6 ++ board/einfochips/imx8qxp_ai_ml/Kconfig| 21 board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 ++ board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 ++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 79 +++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 + board/einfochips/imx8qxp_ai_ml/spl.c | 39 configs/imx8qxp_ai_ml_defconfig | 83 include/configs/imx8qxp_ai_ml.h | 95 +++ 10 files changed, 410 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index bbe323d5ca..bb877055f8 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -37,6 +37,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_EARLY_INIT_F + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -49,6 +54,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/toradex/apalis-imx8/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 00..b6806b8859 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,21 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +config SYS_MALLOC_LEN + default 0x240 + +config ENV_SIZE + default 0x1000 + +config ENV_OFFSET + default 0x40 + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 00..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 00..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 00..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +=== + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml-scfw-tcm.bin +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: +
[U-Boot] [PATCH v5 1/2] arm: dts: Add devicetree support for iMXQXP AI_ML board
Add devicetree support for iMXQXP AI_ML board from Einfochips.
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Peng Fan
Reviewed-by: Lukasz Majewski
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi | 117 +
arch/arm/dts/fsl-imx8qxp-ai_ml.dts | 181 +
3 files changed, 299 insertions(+)
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e6680e5e98..7834a158da 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -614,6 +614,7 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_ARCH_IMX8) += \
fsl-imx8qm-apalis.dtb \
fsl-imx8qm-mek.dtb \
+ fsl-imx8qxp-ai_ml.dtb \
fsl-imx8qxp-colibri.dtb \
fsl-imx8qxp-mek.dtb
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
new file mode 100644
index 00..3ca53bb945
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Linaro Ltd.
+ */
+
+&{/imx8qx-pm} {
+
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+_lsio {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio0 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio1 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio2 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio3 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio4 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio5 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio6 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio7 {
+ u-boot,dm-spl;
+};
+
+_conn {
+ u-boot,dm-spl;
+};
+
+_conn_sdch0 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch1 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch2 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
new file mode 100644
index 00..aa85caaff5
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 Einfochips
+ * Copyright 2019 Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "fsl-imx8qxp.dtsi"
+#include "fsl-imx8qxp-ai_ml-u-boot.dtsi"
+
+/ {
+ model = "Einfochips i.MX8QXP AI_ML";
+ compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
+
+ chosen {
+ bootargs = "console=ttyLP2,115200
earlycon=lpuart32,0x5a08,115200";
+ stdout-path =
+ };
+
+ memory@8000 {
+ device_type = "memory";
+ reg = <0x 0x8000 0 0x8000>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart2>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart3>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_fec1>;
+ phy-mode = "rgmii";
+ phy-handle = <>;
+ fsl,ar8031-phy-fixup;
+ fsl,magic-packet;
+ phy-reset-gpios = < 14 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
+ phy-reset-post-delay = <150>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
+
+/* LS-I2C1 */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpi2c1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc1>;
+ bus-width = <4>;
+ no-sd;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc2>;
+ bus-width = <4>;
+
[U-Boot] [PATCH v5 0/2] Add board support for iMX8QXP AI_ML board
Hello, This patchset adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the Consumer Edition and AI boards of the 96Boards family. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet Below is the boot log from SPL to Linux kernel: === MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... *** Warning - bad CRC, using default environment In:serial@5a08 Out: serial@5a08 Err: serial@5a08 Net: Warning: ethernet@5b04 (eth0) using random MAC address - d2:46:66:cf:f5:61 eth0: ethernet@5b04 Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc1 is current device Scanning mmc 1:1... Found /extlinux/extlinux.conf Retrieving file: /extlinux/extlinux.conf 171 bytes read in 14 ms (11.7 KiB/s) 1: ai_ml-kernel Retrieving file: /Image 24689152 bytes read in 1055 ms (22.3 MiB/s) append: earlycon console=ttyLP2,115200 rw root=/dev/mmcblk0p2 rootfstype=ext4 init=/sbin/t Retrieving file: /imx8qxp-ai_ml.dtb 12529 bytes read in 13 ms (940.4 KiB/s) ## Flattened Device Tree blob at 8300 Booting using the fdt blob at 0x8300 Using Device Tree in place at 8300, end 830060f0 Starting kernel ... [0.00] Booting Linux on physical CPU 0x00 [0x410fd042] [0.00] Linux version 5.2.0-03138-gd75da80dce39 (mani@Mani-XPS-13-9360) (gcc versi9 [0.00] Machine model: Einfochips i.MX8QXP AI_ML [0.00] efi: Getting EFI parameters from FDT: [0.00] efi: UEFI not found. [0.00] cma: Reserved 32 MiB at 0xfe00 [0.00] earlycon: lpuart32 at MMIO 0x5a08 (options '') [0.00] printk: bootconsole [lpuart32] enabled Thanks, Mani Note: This patchset depends on the below cleanup patches submitted: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Changes in v5: * Incorporated review comments from Lukasz. Changes in v4: * Incorporated review comments from Fabio. Changes in v3: * Incorporated review comments from Fabio. Major change is switching to distro_boot. * Added Reviewed-by tag from Peng Fan. Changes in v2: * Rebased the patches on top of following patches: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Manivannan Sadhasivam (2): arm: dts: Add devicetree support for iMXQXP AI_ML board board: Add support for iMX8QXP AI_ML board arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi| 117 +++ arch/arm/dts/fsl-imx8qxp-ai_ml.dts| 181 ++ arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 21 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 + board/einfochips/imx8qxp_ai_ml/README | 49 + .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 79 board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++ board/einfochips/imx8qxp_ai_ml/spl.c | 39 configs/imx8qxp_ai_ml_defconfig | 83 include/configs/imx8qxp_ai_ml.h | 95 + 13 files changed, 709 insertions(+) create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v4 2/2] board: Add support for iMX8QXP AI_ML board
Hi Lukasz, On Thu, Aug 15, 2019 at 09:51:25AM +0200, Lukasz Majewski wrote: > Hi Manivannan, > > > Hi Lukasz, > > > > Thanks for the review! > > > > On Wed, Jul 24, 2019 at 10:07:13AM +0200, Lukasz Majewski wrote: > > > Hi Manivannan, > > > > > > > This commit adds initial board support for iMX8QXP AI_ML board > > > > from Einfochips. This board is one of the 96Boards Consumer > > > > Edition and AI boards of the 96Boards family based on i.MX8QXP > > > > SoC from NXP/Freescale. > > > > > > > > This initial supports contains following peripherals which are > > > > tested and known to work: > > > > > > > > 1. Debug serial via UART2 > > > > 2. SD card > > > > 3. Ethernet > > > > > > > > More information about this board can be found in arrow website: > > > > https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools > > > > > > > > Signed-off-by: Manivannan Sadhasivam > > > > --- > > > > arch/arm/mach-imx/imx8/Kconfig| 6 + > > > > board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ > > > > board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + > > > > board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ > > > > board/einfochips/imx8qxp_ai_ml/README | 49 > > > > .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 117 > > > > ++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | > > > > 24 board/einfochips/imx8qxp_ai_ml/spl.c | 49 > > > > configs/imx8qxp_ai_ml_defconfig | 83 > > > > + include/configs/imx8qxp_ai_ml.h | 104 > > > > 10 files changed, 458 insertions(+) > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/README > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg > > > > create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c > > > > create mode 100644 configs/imx8qxp_ai_ml_defconfig > > > > create mode 100644 include/configs/imx8qxp_ai_ml.h > > > > > > > > diff --git a/arch/arm/mach-imx/imx8/Kconfig > > > > b/arch/arm/mach-imx/imx8/Kconfig index bbe323d5ca..cec21f8dd2 > > > > 100644 --- a/arch/arm/mach-imx/imx8/Kconfig > > > > +++ b/arch/arm/mach-imx/imx8/Kconfig > > > > @@ -37,6 +37,11 @@ config TARGET_COLIBRI_IMX8X > > > > select BOARD_LATE_INIT > > > > select IMX8QXP > > > > > > > > +config TARGET_IMX8QXP_AI_ML > > > > + bool "Support i.MX8QXP AI_ML board" > > > > + select BOARD_LATE_INIT > > > > + select IMX8QXP > > > > + > > > > config TARGET_IMX8QM_MEK > > > > bool "Support i.MX8QM MEK board" > > > > select BOARD_LATE_INIT > > > > @@ -49,6 +54,7 @@ config TARGET_IMX8QXP_MEK > > > > > > > > endchoice > > > > > > > > +source "board/einfochips/imx8qxp_ai_ml/Kconfig" > > > > source "board/freescale/imx8qm_mek/Kconfig" > > > > source "board/freescale/imx8qxp_mek/Kconfig" > > > > source "board/toradex/apalis-imx8/Kconfig" > > > > diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig > > > > b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 > > > > index 00..697a831013 > > > > --- /dev/null > > > > +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig > > > > @@ -0,0 +1,12 @@ > > > > +if TARGET_IMX8QXP_AI_ML > > > > + > > > > +config SYS_BOARD > > > > + default "imx8qxp_ai_ml" > > > > + > > > > +config SYS_VENDOR > > > > + default "einfochips" > > > > + > > > > +config SYS_CONFIG_NAME > > > > + default "imx8qxp_ai_ml" > > > > + > > > > +endif > > > > diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS > > > > b/board/einfochips/imx8qxp_a
Re: [U-Boot] [PATCH v4 2/2] board: Add support for iMX8QXP AI_ML board
Hi Lukasz, Thanks for the review! On Wed, Jul 24, 2019 at 10:07:13AM +0200, Lukasz Majewski wrote: > Hi Manivannan, > > > This commit adds initial board support for iMX8QXP AI_ML board from > > Einfochips. This board is one of the 96Boards Consumer Edition and AI > > boards of the 96Boards family based on i.MX8QXP SoC from > > NXP/Freescale. > > > > This initial supports contains following peripherals which are tested > > and known to work: > > > > 1. Debug serial via UART2 > > 2. SD card > > 3. Ethernet > > > > More information about this board can be found in arrow website: > > https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools > > > > Signed-off-by: Manivannan Sadhasivam > > --- > > arch/arm/mach-imx/imx8/Kconfig| 6 + > > board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ > > board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + > > board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ > > board/einfochips/imx8qxp_ai_ml/README | 49 > > .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 117 > > ++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | > > 24 board/einfochips/imx8qxp_ai_ml/spl.c | 49 > > configs/imx8qxp_ai_ml_defconfig | 83 + > > include/configs/imx8qxp_ai_ml.h | 104 > > 10 files changed, 458 insertions(+) > > create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig > > create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS > > create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile > > create mode 100644 board/einfochips/imx8qxp_ai_ml/README > > create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c > > create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg > > create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c > > create mode 100644 configs/imx8qxp_ai_ml_defconfig > > create mode 100644 include/configs/imx8qxp_ai_ml.h > > > > diff --git a/arch/arm/mach-imx/imx8/Kconfig > > b/arch/arm/mach-imx/imx8/Kconfig index bbe323d5ca..cec21f8dd2 100644 > > --- a/arch/arm/mach-imx/imx8/Kconfig > > +++ b/arch/arm/mach-imx/imx8/Kconfig > > @@ -37,6 +37,11 @@ config TARGET_COLIBRI_IMX8X > > select BOARD_LATE_INIT > > select IMX8QXP > > > > +config TARGET_IMX8QXP_AI_ML > > + bool "Support i.MX8QXP AI_ML board" > > + select BOARD_LATE_INIT > > + select IMX8QXP > > + > > config TARGET_IMX8QM_MEK > > bool "Support i.MX8QM MEK board" > > select BOARD_LATE_INIT > > @@ -49,6 +54,7 @@ config TARGET_IMX8QXP_MEK > > > > endchoice > > > > +source "board/einfochips/imx8qxp_ai_ml/Kconfig" > > source "board/freescale/imx8qm_mek/Kconfig" > > source "board/freescale/imx8qxp_mek/Kconfig" > > source "board/toradex/apalis-imx8/Kconfig" > > diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig > > b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 > > index 00..697a831013 > > --- /dev/null > > +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig > > @@ -0,0 +1,12 @@ > > +if TARGET_IMX8QXP_AI_ML > > + > > +config SYS_BOARD > > + default "imx8qxp_ai_ml" > > + > > +config SYS_VENDOR > > + default "einfochips" > > + > > +config SYS_CONFIG_NAME > > + default "imx8qxp_ai_ml" > > + > > +endif > > diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS > > b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 > > index 00..add0bd9431 > > --- /dev/null > > +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS > > @@ -0,0 +1,6 @@ > > +i.MX8QXP AI_ML BOARD > > +M: Manivannan Sadhasivam > > +S: Maintained > > +F: board/einfochips/imx8qxp_ai_ml/ > > +F: include/configs/imx8qxp_ai_ml.h > > +F: configs/imx8qxp_ai_ml_defconfig > > diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile > > b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 > > index 00..e08774dc6e > > --- /dev/null > > +++ b/board/einfochips/imx8qxp_ai_ml/Makefile > > @@ -0,0 +1,8 @@ > > +# > > +# Copyright 2019 Linaro Ltd. > > +# > > +# SPDX-License-Identifier: GPL-2.0+ > > +# > > + > > +obj-y += imx8qxp_ai_ml.o > > +obj-$(CONFIG_SPL_BUILD) += spl.o > > diff --git a/board/einfochips/imx8qxp_ai_ml/README > > b/board/einfochips/imx8qxp_ai_ml/README new f
[U-Boot] [PATCH 5/5] MAINTAINERS: Add entry for HI3660 SoC
Add MAINTAINERS entry for HI3660 SoC by adding the arch includes. While doing so, adding myself as the co-maintainer for HISILICON SoCs since I'm planning to maintain HI3660 SoC separately and considering doing improvements to the existing HiSilicon SoC architecture. Signed-off-by: Manivannan Sadhasivam --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a72ccd0b58..7e485d014d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -167,9 +167,11 @@ F: board/freescale/*mx*/ ARM HISILICON M: Peter Griffin +M: Manivannan Sadhasivam S: Maintained F: arch/arm/cpu/armv8/hisilicon F: arch/arm/include/asm/arch-hi6220/ +F: arch/arm/include/asm/arch-hi3660/ ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K M: Stefan Roese -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 4/5] mmc: Add support for HI3660 SoC reusing hi6220_dw_mmc driver
This commit adds MMC driver support for HI3660 SoC reusing hi6220_dw_mmc
driver. Since HI3660 operates at different clock rate and uses fifo
mode now, let's introduce the platform data and utilize it for different
SoCs supported by this driver.
Signed-off-by: Manivannan Sadhasivam
---
drivers/mmc/hi6220_dw_mmc.c | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c
index effd1e4c7c..6de7924383 100644
--- a/drivers/mmc/hi6220_dw_mmc.c
+++ b/drivers/mmc/hi6220_dw_mmc.c
@@ -22,6 +22,11 @@ struct hi6220_dwmmc_priv_data {
struct dwmci_host host;
};
+struct hisi_mmc_data {
+ unsigned int clock;
+ bool use_fifo;
+};
+
static int hi6220_dwmmc_ofdata_to_platdata(struct udevice *dev)
{
struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
@@ -49,13 +54,17 @@ static int hi6220_dwmmc_probe(struct udevice *dev)
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev);
struct dwmci_host *host = >host;
+ struct hisi_mmc_data *mmc_data;
+
+ mmc_data = (struct hisi_mmc_data *)dev_get_driver_data(dev);
/* Use default bus speed due to absence of clk driver */
- host->bus_hz = 5000;
+ host->bus_hz = mmc_data->clock;
dwmci_setup_cfg(>cfg, host, host->bus_hz, 40);
host->mmc = >mmc;
+ host->fifo_mode = mmc_data->use_fifo;
host->mmc->priv = >host;
upriv->mmc = host->mmc;
host->mmc->dev = dev;
@@ -75,9 +84,23 @@ static int hi6220_dwmmc_bind(struct udevice *dev)
return 0;
}
+static const struct hisi_mmc_data hi3660_mmc_data = {
+ .clock = 320,
+ .use_fifo = true,
+};
+
+static const struct hisi_mmc_data hi6220_mmc_data = {
+ .clock = 5000,
+ .use_fifo = false,
+};
+
static const struct udevice_id hi6220_dwmmc_ids[] = {
- { .compatible = "hisilicon,hi6220-dw-mshc" },
- { .compatible = "hisilicon,hi3798cv200-dw-mshc" },
+ { .compatible = "hisilicon,hi6220-dw-mshc",
+ .data = (ulong)_mmc_data },
+ { .compatible = "hisilicon,hi3798cv200-dw-mshc",
+ .data = (ulong)_mmc_data },
+ { .compatible = "hisilicon,hi3660-dw-mshc",
+ .data = (ulong)_mmc_data },
{ }
};
--
2.17.1
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[U-Boot] [PATCH 2/5] arm: dts: Add devicetree for Hikey960 board
This commit adds devicetree for Hikey960 board. Most of the contents are
copied from Linux kernel with some modifications for u-boot. To be
more precise, SD card's speed related properties are removed due to a
bug in u-boot clock implementation. Hence forcing the SD controller to
work in standard speed.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/hi3660-hikey960-u-boot.dtsi | 10 +
arch/arm/dts/hi3660-hikey960.dts | 607 +++
3 files changed, 618 insertions(+)
create mode 100644 arch/arm/dts/hi3660-hikey960-u-boot.dtsi
create mode 100644 arch/arm/dts/hi3660-hikey960.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f5535078c7..8dfc1f033c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -15,6 +15,7 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
exynos4412-odroid.dtb
dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb
+dtb-$(CONFIG_TARGET_HIKEY960) += hi3660-hikey960.dtb
dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb
diff --git a/arch/arm/dts/hi3660-hikey960-u-boot.dtsi
b/arch/arm/dts/hi3660-hikey960-u-boot.dtsi
new file mode 100644
index 00..648c77f8c5
--- /dev/null
+++ b/arch/arm/dts/hi3660-hikey960-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * U-Boot additions
+ *
+ * Copyright (c) 2019 Linaro Ltd.
+ */
+
+ {
+ u-boot,dm-pre-reloc;
+};
diff --git a/arch/arm/dts/hi3660-hikey960.dts b/arch/arm/dts/hi3660-hikey960.dts
new file mode 100644
index 00..9fbfb422c8
--- /dev/null
+++ b/arch/arm/dts/hi3660-hikey960.dts
@@ -0,0 +1,607 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Hisilicon HiKey960 Development Board
+ *
+ * Copyright (C) 2016, Hisilicon Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "hi3660.dtsi"
+#include "hikey960-pinctrl.dtsi"
+#include
+#include
+#include
+
+/ {
+ model = "HiKey960";
+ compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
+
+ aliases {
+ mshc1 =
+ mshc2 =
+ serial0 =
+ serial1 =
+ serial2 =
+ serial3 =
+ serial4 =
+ serial5 =
+ serial6 =
+ };
+
+ chosen {
+ stdout-path = "serial6:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ /* rewrite this at bootloader */
+ reg = <0x0 0x0 0x0 0x0>;
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@3200 {
+ compatible = "ramoops";
+ reg = <0x0 0x3200 0x0 0x0010>;
+ record-size = <0x0002>;
+ console-size= <0x0002>;
+ ftrace-size = <0x0002>;
+ };
+ };
+
+ reboot-mode-syscon@3210 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0x0 0x3210 0x0 0x1000>;
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0>;
+
+ mode-normal = <0x77665501>;
+ mode-bootloader = <0x77665500>;
+ mode-recovery = <0x77665502>;
+ };
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <_key_pmx_func _key_cfg_func>;
+
+ power {
+ wakeup-source;
+ gpios = < 2 GPIO_ACTIVE_LOW>;
+ label = "GPIO Power";
+ linux,code = ;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ user_led1 {
+ label = "green:user1";
+ /* gpio_150_user_led1 */
+ gpios = < 6 0>;
+ linux,default-trigger = "heartbeat";
+ };
+
+ user_led2 {
+ label = "green:user2";
+ /* gpio_151_user_led2 */
+ gpios = < 7 0>;
+ linux,default-trigger = "none";
+ };
+
+ user_led3 {
+ label = "green:user3";
+ /* gpio_189_user_led3 */
+ gpios = < 5 0>;
+ linux,default-trigger = "mmc0";
+ };
+
+
[U-Boot] [PATCH 3/5] board: hisilicon: Add support for Hikey960 board
This commit adds board support for Hikey960 board from Hisilicon. This board is one of the Consumer Edition boards of the 96Boards family powered by Kirin960 SoC. More information about this board can be found in 96Boards website: https://www.96boards.org/product/hikey960/ The initial supported/tested devices include: - Debug serial - SD With these support, it's good enough for loading Linux Kernel from SD. Signed-off-by: Manivannan Sadhasivam --- arch/arm/Kconfig | 13 ++ arch/arm/include/asm/arch-hi3660/hi3660.h | 52 + board/hisilicon/hikey960/Kconfig | 15 ++ board/hisilicon/hikey960/MAINTAINERS | 6 + board/hisilicon/hikey960/Makefile | 3 + board/hisilicon/hikey960/README | 247 ++ board/hisilicon/hikey960/hikey960.c | 186 configs/hikey960_defconfig| 30 +++ include/configs/hikey960.h| 60 ++ 9 files changed, 612 insertions(+) create mode 100644 arch/arm/include/asm/arch-hi3660/hi3660.h create mode 100644 board/hisilicon/hikey960/Kconfig create mode 100644 board/hisilicon/hikey960/MAINTAINERS create mode 100644 board/hisilicon/hikey960/Makefile create mode 100644 board/hisilicon/hikey960/README create mode 100644 board/hisilicon/hikey960/hikey960.c create mode 100644 configs/hikey960_defconfig create mode 100644 include/configs/hikey960.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 51d4acedac..95807b0576 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1205,6 +1205,18 @@ config TARGET_HIKEY Support for HiKey 96boards platform. It features a HI6220 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. +config TARGET_HIKEY960 + bool "Support HiKey960 96boards Consumer Edition Platform" + select ARM64 + select DM + select DM_SERIAL + select OF_CONTROL + select PL01X_SERIAL + imply CMD_DM + help + Support for HiKey960 96boards platform. It features a HI3660 + SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. + config TARGET_POPLAR bool "Support Poplar 96boards Enterprise Edition Platform" select ARM64 @@ -1760,6 +1772,7 @@ source "board/grinn/chiliboard/Kconfig" source "board/gumstix/pepper/Kconfig" source "board/h2200/Kconfig" source "board/hisilicon/hikey/Kconfig" +source "board/hisilicon/hikey960/Kconfig" source "board/hisilicon/poplar/Kconfig" source "board/isee/igep003x/Kconfig" source "board/phytec/pcm051/Kconfig" diff --git a/arch/arm/include/asm/arch-hi3660/hi3660.h b/arch/arm/include/asm/arch-hi3660/hi3660.h new file mode 100644 index 00..3ca0951543 --- /dev/null +++ b/arch/arm/include/asm/arch-hi3660/hi3660.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * (C) Copyright 2019 Linaro + * Author: Manivannan Sadhasivam + */ + +#ifndef __HI3660_H__ +#define __HI3660_H__ + +#define HI3660_UART6_BASE 0xfff32000 + +#define PMU_REG_BASE0xfff34000 +#define PMIC_HARDWARE_CTRL0 (PMU_REG_BASE + (0x0C5 << 2)) + +#define SCTRL_REG_BASE 0xfff0a000 +#define SCTRL_SCFPLLCTRL0 (SCTRL_REG_BASE + 0x120) +#define SCTRL_SCFPLLCTRL0_FPLL0_EN BIT(0) + +#define CRG_REG_BASE0xfff35000 +#define CRG_PEREN2 (CRG_REG_BASE + 0x020) +#define CRG_PERDIS2 (CRG_REG_BASE + 0x024) +#define CRG_PERCLKEN2 (CRG_REG_BASE + 0x028) +#define CRG_PERSTAT2(CRG_REG_BASE + 0x02C) +#define CRG_PEREN4 (CRG_REG_BASE + 0x040) +#define CRG_PERDIS4 (CRG_REG_BASE + 0x044) +#define CRG_PERCLKEN4 (CRG_REG_BASE + 0x048) +#define CRG_PERSTAT4(CRG_REG_BASE + 0x04C) +#define CRG_PERRSTEN2 (CRG_REG_BASE + 0x078) +#define CRG_PERRSTDIS2 (CRG_REG_BASE + 0x07C) +#define CRG_PERRSTSTAT2 (CRG_REG_BASE + 0x080) +#define CRG_PERRSTEN3 (CRG_REG_BASE + 0x084) +#define CRG_PERRSTDIS3 (CRG_REG_BASE + 0x088) +#define CRG_PERRSTSTAT3 (CRG_REG_BASE + 0x08C) +#define CRG_PERRSTEN4 (CRG_REG_BASE + 0x090) +#define CRG_PERRSTDIS4 (CRG_REG_BASE + 0x094) +#define CRG_PERRSTSTAT4 (CRG_REG_BASE + 0x098) +#define CRG_ISOEN (CRG_REG_BASE + 0x144) +#define CRG_ISODIS (CRG_REG_BASE + 0x148) +#define CRG_ISOSTAT (CRG_REG_BASE + 0x14C) + +#define PINMUX4_BASE
[U-Boot] [PATCH 1/5] arm: dts: Import HI3660 devicetree from Linux
This commit imports HI3660 SoC devicetree from Linux
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/hi3660.dtsi | 1157 ++
arch/arm/dts/hikey960-pinctrl.dtsi | 1060
include/dt-bindings/clock/hi3660-clock.h | 214
3 files changed, 2431 insertions(+)
create mode 100644 arch/arm/dts/hi3660.dtsi
create mode 100644 arch/arm/dts/hikey960-pinctrl.dtsi
create mode 100644 include/dt-bindings/clock/hi3660-clock.h
diff --git a/arch/arm/dts/hi3660.dtsi b/arch/arm/dts/hi3660.dtsi
new file mode 100644
index 00..65a45b0e80
--- /dev/null
+++ b/arch/arm/dts/hi3660.dtsi
@@ -0,0 +1,1157 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Hisilicon Hi3660 SoC
+ *
+ * Copyright (C) 2016, Hisilicon Ltd.
+ */
+
+#include
+#include
+#include
+
+/ {
+ compatible = "hisilicon,hi3660";
+ interrupt-parent = <>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ cluster1 {
+ core0 {
+ cpu = <>;
+ };
+ core1 {
+ cpu = <>;
+ };
+ core2 {
+ cpu = <>;
+ };
+ core3 {
+ cpu = <>;
+ };
+ };
+ };
+
+ cpu0: cpu@0 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ enable-method = "psci";
+ next-level-cache = <_L2>;
+ cpu-idle-states = <_SLEEP_0 _SLEEP_0>;
+ capacity-dmips-mhz = <592>;
+ clocks = <_clock HI3660_CLK_STUB_CLUSTER0>;
+ operating-points-v2 = <_opp>;
+ #cooling-cells = <2>;
+ dynamic-power-coefficient = <110>;
+ };
+
+ cpu1: cpu@1 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ enable-method = "psci";
+ next-level-cache = <_L2>;
+ cpu-idle-states = <_SLEEP_0 _SLEEP_0>;
+ capacity-dmips-mhz = <592>;
+ clocks = <_clock HI3660_CLK_STUB_CLUSTER0>;
+ operating-points-v2 = <_opp>;
+ #cooling-cells = <2>;
+ };
+
+ cpu2: cpu@2 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ enable-method = "psci";
+ next-level-cache = <_L2>;
+ cpu-idle-states = <_SLEEP_0 _SLEEP_0>;
+ capacity-dmips-mhz = <592>;
+ clocks = <_clock HI3660_CLK_STUB_CLUSTER0>;
+ operating-points-v2 = <_opp>;
+ #cooling-cells = <2>;
+ };
+
+ cpu3: cpu@3 {
+ compatible = "arm,cortex-a53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ enable-method = "psci";
+ next-level-cache = <_L2>;
+ cpu-idle-states = <_SLEEP_0 _SLEEP_0>;
+ capacity-dmips-mhz = <592>;
+ clocks = <_clock HI3660_CLK_STUB_CLUSTER0>;
+ operating-po
[U-Boot] [PATCH 0/5] Add support for Hikey960 board
Hello, This patchset adds board support for Hikey960 board from Hisilicon. This board is one of the Consumer Edition boards of the 96Boards family, powered by Kirin960 (HI3660) SoC. This patchset adds only basic support necessary to boot the linux kernel from SD card using distro_boot mechanism. Currently there is no proper clock/pmic driver and hence the raw access to the corresponding memory mapped registers are done in board support file to initialize the system. This will be changed by the upcoming patches adding proper subsystem drivers in future. As of now, the SD controller's clock implementation is having an issue which keeps the SD controller to operate at slow speed. This will be fixed once the proper clock driver for HI3660 lands in u-boot. Thanks, Mani Manivannan Sadhasivam (5): arm: dts: Import HI3660 devicetree from Linux arm: dts: Add devicetree for Hikey960 board board: hisilicon: Add support for Hikey960 board mmc: Add support for HI3660 SoC reusing hi6220_dw_mmc driver MAINTAINERS: Add entry for HI3660 SoC MAINTAINERS |2 + arch/arm/Kconfig | 13 + arch/arm/dts/Makefile |1 + arch/arm/dts/hi3660-hikey960-u-boot.dtsi | 10 + arch/arm/dts/hi3660-hikey960.dts | 607 +++ arch/arm/dts/hi3660.dtsi | 1157 + arch/arm/dts/hikey960-pinctrl.dtsi| 1060 +++ arch/arm/include/asm/arch-hi3660/hi3660.h | 52 + board/hisilicon/hikey960/Kconfig | 15 + board/hisilicon/hikey960/MAINTAINERS |6 + board/hisilicon/hikey960/Makefile |3 + board/hisilicon/hikey960/README | 247 + board/hisilicon/hikey960/hikey960.c | 186 configs/hikey960_defconfig| 30 + drivers/mmc/hi6220_dw_mmc.c | 29 +- include/configs/hikey960.h| 60 ++ include/dt-bindings/clock/hi3660-clock.h | 214 17 files changed, 3689 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/hi3660-hikey960-u-boot.dtsi create mode 100644 arch/arm/dts/hi3660-hikey960.dts create mode 100644 arch/arm/dts/hi3660.dtsi create mode 100644 arch/arm/dts/hikey960-pinctrl.dtsi create mode 100644 arch/arm/include/asm/arch-hi3660/hi3660.h create mode 100644 board/hisilicon/hikey960/Kconfig create mode 100644 board/hisilicon/hikey960/MAINTAINERS create mode 100644 board/hisilicon/hikey960/Makefile create mode 100644 board/hisilicon/hikey960/README create mode 100644 board/hisilicon/hikey960/hikey960.c create mode 100644 configs/hikey960_defconfig create mode 100644 include/configs/hikey960.h create mode 100644 include/dt-bindings/clock/hi3660-clock.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] arm: dts: ficus: Enable booting from eMMC when using SPL
This commits enables booting from eMMC when using SPL on 96Boards
Ficus board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway. While we are at it,
let's also include the common u-boot dtsi for rk3399.
Signed-off-by: Manivannan Sadhasivam
---
Changes in v2:
* Moved the change to -u-boot.dtsi as spotted by Peter.
arch/arm/dts/rk3399-ficus-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
index eab86bdb30..f3f7aa7c45 100644
--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
@@ -3,4 +3,11 @@
* Copyright (C) 2019 Jagan Teki
*/
+#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = ,
+ };
+};
--
2.17.1
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[U-Boot] [PATCH v2 1/2] arm: dts: rock960: Enable booting from eMMC when using SPL
This commits enables booting from eMMC when using SPL on 96Boards
Rock960 board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway. While we are at it,
let's also include the common u-boot dtsi for rk3399.
Signed-off-by: Manivannan Sadhasivam
---
Changes in v2:
* Moved the change to -u-boot.dtsi as spotted by Peter.
arch/arm/dts/rk3399-rock960-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
index 5256f6d3f2..4850debdf0 100644
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
@@ -3,4 +3,11 @@
* Copyright (C) 2019 Jagan Teki
*/
+#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = ,
+ };
+};
--
2.17.1
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Re: [U-Boot] [PATCH 1/2] arm: dts: rock960: Enable booting from eMMC when using SPL
Hi Peter,
On 24 July 2019 1:29:27 PM IST, Peter Robinson wrote:
>On Mon, May 20, 2019 at 4:47 PM Manivannan Sadhasivam
> wrote:
>>
>> This commits enables booting from eMMC when using SPL on 96Boards
>> Rock960 board by adding SDHCI to boot order. Since the SDHCI driver
>> already has the reloc flag, this works straightaway.
>>
>> Signed-off-by: Manivannan Sadhasivam
>
>> ---
>> arch/arm/dts/rk3399-rock960-u-boot.dtsi | 1 +
>> arch/arm/dts/rk3399-rock960.dts | 2 ++
>> 2 files changed, 3 insertions(+)
>>
>> diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
>b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
>> index 5256f6d3f2..7fb5072a9b 100644
>> --- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
>> +++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
>> @@ -3,4 +3,5 @@
>> * Copyright (C) 2019 Jagan Teki
>> */
>>
>> +#include "rk3399-u-boot.dtsi"
>> #include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
>> diff --git a/arch/arm/dts/rk3399-rock960.dts
>b/arch/arm/dts/rk3399-rock960.dts
>> index 7e06bc97e5..c8b9075c73 100644
>> --- a/arch/arm/dts/rk3399-rock960.dts
>> +++ b/arch/arm/dts/rk3399-rock960.dts
>> @@ -12,6 +12,8 @@
>>
>> chosen {
>> stdout-path = "serial2:150n8";
>> + u-boot,spl-boot-order = \
>> + ,
>
>Shouldn't this bit be in the rk3399-rock960-u-boot.dtsi not
>rk3399-rock960.dts because it's U-Boot specific?
>
Good catch! Will fix this and send next revision.
Thanks,
Mani
>> };
>> };
>>
>> --
>> 2.17.1
>>
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
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Re: [U-Boot] [PATCH 2/2] arm: dts: ficus: Enable booting from eMMC when using SPL
On Mon, May 27, 2019 at 02:49:49PM +0800, Kever Yang wrote:
>
>
> On 05/20/2019 11:46 PM, Manivannan Sadhasivam wrote:
> > This commits enables booting from eMMC when using SPL on 96Boards
> > Ficus board by adding SDHCI to boot order. Since the SDHCI driver
> > already has the reloc flag, this works straightaway.
> >
> > Signed-off-by: Manivannan Sadhasivam
>
> Reviewed-by: Kever Yang
>
Ping!
> Thanks,
> - Kever
> > ---
> > arch/arm/dts/rk3399-ficus-u-boot.dtsi | 1 +
> > arch/arm/dts/rk3399-ficus.dts | 2 ++
> > 2 files changed, 3 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
> > b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
> > index eab86bdb30..67b63a8352 100644
> > --- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
> > @@ -3,4 +3,5 @@
> > * Copyright (C) 2019 Jagan Teki
> > */
> >
> > +#include "rk3399-u-boot.dtsi"
> > #include "rk3399-sdram-ddr3-1600.dtsi"
> > diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
> > index 4b2dd82b67..0f219f4a9c 100644
> > --- a/arch/arm/dts/rk3399-ficus.dts
> > +++ b/arch/arm/dts/rk3399-ficus.dts
> > @@ -15,6 +15,8 @@
> >
> > chosen {
> > stdout-path = "serial2:150n8";
> > + u-boot,spl-boot-order = \
> > + ,
> > };
> >
> > clkin_gmac: external-gmac-clock {
>
>
>
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Re: [U-Boot] [PATCH 1/2] arm: dts: rock960: Enable booting from eMMC when using SPL
On Mon, May 27, 2019 at 02:49:39PM +0800, Kever Yang wrote:
>
>
> On 05/20/2019 11:46 PM, Manivannan Sadhasivam wrote:
> > This commits enables booting from eMMC when using SPL on 96Boards
> > Rock960 board by adding SDHCI to boot order. Since the SDHCI driver
> > already has the reloc flag, this works straightaway.
> >
> > Signed-off-by: Manivannan Sadhasivam
>
> Reviewed-by: Kever Yang
>
Ping!
> Thanks,
> - Kever
> > ---
> > arch/arm/dts/rk3399-rock960-u-boot.dtsi | 1 +
> > arch/arm/dts/rk3399-rock960.dts | 2 ++
> > 2 files changed, 3 insertions(+)
> >
> > diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> > b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> > index 5256f6d3f2..7fb5072a9b 100644
> > --- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> > +++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
> > @@ -3,4 +3,5 @@
> > * Copyright (C) 2019 Jagan Teki
> > */
> >
> > +#include "rk3399-u-boot.dtsi"
> > #include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
> > diff --git a/arch/arm/dts/rk3399-rock960.dts
> > b/arch/arm/dts/rk3399-rock960.dts
> > index 7e06bc97e5..c8b9075c73 100644
> > --- a/arch/arm/dts/rk3399-rock960.dts
> > +++ b/arch/arm/dts/rk3399-rock960.dts
> > @@ -12,6 +12,8 @@
> >
> > chosen {
> > stdout-path = "serial2:150n8";
> > + u-boot,spl-boot-order = \
> > + ,
> > };
> > };
> >
>
>
>
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[U-Boot] [PATCH v4 2/2] board: Add support for iMX8QXP AI_ML board
This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam --- arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 117 ++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 board/einfochips/imx8qxp_ai_ml/spl.c | 49 configs/imx8qxp_ai_ml_defconfig | 83 + include/configs/imx8qxp_ai_ml.h | 104 10 files changed, 458 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index bbe323d5ca..cec21f8dd2 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -37,6 +37,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_LATE_INIT + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -49,6 +54,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/toradex/apalis-imx8/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 00..697a831013 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,12 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 00..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 00..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 00..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +=== + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml-scfw-tcm.bin +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin . +$ cp firmware-imx-8.1/firmware/seco/mx8qx-ahab-container.img . + +Build U-Boot + + +
[U-Boot] [PATCH v4 1/2] arm: dts: Add devicetree support for iMXQXP AI_ML board
Add devicetree support for iMXQXP AI_ML board from Einfochips.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi | 117 +
arch/arm/dts/fsl-imx8qxp-ai_ml.dts | 181 +
3 files changed, 299 insertions(+)
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e6680e5e98..7834a158da 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -614,6 +614,7 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_ARCH_IMX8) += \
fsl-imx8qm-apalis.dtb \
fsl-imx8qm-mek.dtb \
+ fsl-imx8qxp-ai_ml.dtb \
fsl-imx8qxp-colibri.dtb \
fsl-imx8qxp-mek.dtb
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
new file mode 100644
index 00..3ca53bb945
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Linaro Ltd.
+ */
+
+&{/imx8qx-pm} {
+
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+_lsio {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio0 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio1 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio2 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio3 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio4 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio5 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio6 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio7 {
+ u-boot,dm-spl;
+};
+
+_conn {
+ u-boot,dm-spl;
+};
+
+_conn_sdch0 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch1 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch2 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
new file mode 100644
index 00..aa85caaff5
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 Einfochips
+ * Copyright 2019 Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "fsl-imx8qxp.dtsi"
+#include "fsl-imx8qxp-ai_ml-u-boot.dtsi"
+
+/ {
+ model = "Einfochips i.MX8QXP AI_ML";
+ compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
+
+ chosen {
+ bootargs = "console=ttyLP2,115200
earlycon=lpuart32,0x5a08,115200";
+ stdout-path =
+ };
+
+ memory@8000 {
+ device_type = "memory";
+ reg = <0x 0x8000 0 0x8000>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart2>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart3>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_fec1>;
+ phy-mode = "rgmii";
+ phy-handle = <>;
+ fsl,ar8031-phy-fixup;
+ fsl,magic-packet;
+ phy-reset-gpios = < 14 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
+ phy-reset-post-delay = <150>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
+
+/* LS-I2C1 */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpi2c1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc1>;
+ bus-width = <4>;
+ no-sd;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc2>;
+ bus-width = <4>;
+ cd-gpios = < 22 GPIO_ACTIVE_LOW>;
+ status
[U-Boot] [PATCH v4 0/2] Add board support for iMX8QXP AI_ML board
Hello, This patchset adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the Consumer Edition and AI boards of the 96Boards family. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet Thanks, Mani Note: This patchset depends on the below cleanup patches submitted: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Changes in v4: * Incorporated review comments from Fabio. Changes in v3: * Incorporated review comments from Fabio. Major change is switching to distro_boot. * Added Reviewed-by tag from Peng Fan. Changes in v2: * Rebased the patches on top of following patches: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Manivannan Sadhasivam (2): arm: dts: Add devicetree support for iMXQXP AI_ML board board: Add support for iMX8QXP AI_ML board arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi| 117 +++ arch/arm/dts/fsl-imx8qxp-ai_ml.dts| 181 ++ arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 + board/einfochips/imx8qxp_ai_ml/README | 49 + .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 117 +++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++ board/einfochips/imx8qxp_ai_ml/spl.c | 49 + configs/imx8qxp_ai_ml_defconfig | 83 include/configs/imx8qxp_ai_ml.h | 104 ++ 13 files changed, 757 insertions(+) create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 2/2] board: Add support for iMX8QXP AI_ML board
Hi Fabio,
On Thu, Jul 18, 2019 at 09:43:54PM -0300, Fabio Estevam wrote:
> Hi Manivannan,
>
> On Fri, Jul 12, 2019 at 3:12 PM Manivannan Sadhasivam
> wrote:
>
> > +#if IS_ENABLED(CONFIG_DM_GPIO)
> > +static void board_gpio_init(void)
> > +{
> > + /* TODO */
> > +}
> > +#else
> > +static inline void board_gpio_init(void) {}
> > +#endif
> > +
>
> Is this function really needed? It is always empty.
>
True but I intend to add some pre configured GPIOs in future, so
I'll keep it.
> > +int board_late_init(void)
> > +{
> > +#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
> > + env_set("board_name", "AI_ML");
> > + env_set("board_rev", "v1.0");
> > +#endif
>
> It seems you don't make any use of board_name and board_rev.
>
> Are they really needed?
>
Right, not used now. will remove it.
> > +#include
> > +/* Initial environment variables */
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > + "console=ttyLP2 earlycon\0" \
> > + "fdt_addr_r=0x8300\0" \
> > + "kernel_addr_r=0x8100\0" \
> > + "ramdisk_addr_r=0x9440\0" \
> > + "scriptaddr=0x8900\0" \
> > + "fdtfile=imx8qxp-ai_ml.dtb\0" \
> > + "fdt_high=0x\0" \
> > + "image=Image\0" \
> > + "initrd_addr=0x8380\0" \
> > + "initrd_high=0x\0" \
> > + "mmcargs=setenv bootargs console=${console},${baudrate} " \
> > + "root="CONFIG_MMCROOT" rootwait rw" \
> > + "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
> > + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
>
> This is not needed after you switch to distro config.
> This root= information is distro specific and should not be part of
> the standard config.
>
> Please look at include/configs/wandboard.h for example for a much more
> compact example.
>
Ack.
> > + "netargs=setenv bootargs console=${console},${baudrate} " \
> > + "root=/dev/nfs ip=dhcp
> > nfsroot=${serverip}:${nfsroot},v3,tcp" \
> > + "\0" \
> > + "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} "
> > \
> > + "imx8qxp-ai_ml/${fdt_file}; booti ${loadaddr} -
> > ${fdt_addr}\0" \
> > + "script=boot.scr\0" \
>
> Not used with distro config.
>
Ack.
> > +/* Serial */
> > +#define CONFIG_BAUDRATE115200
>
> This is not needed.
Ack.
Thanks,
Mani
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[U-Boot] [PATCH v3 2/2] board: Add support for iMX8QXP AI_ML board
This commit adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MX8QXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam Reviewed-by: Peng Fan --- arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 ++ board/einfochips/imx8qxp_ai_ml/README | 49 +++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 122 ++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 board/einfochips/imx8qxp_ai_ml/spl.c | 49 +++ configs/imx8qxp_ai_ml_defconfig | 82 include/configs/imx8qxp_ai_ml.h | 116 + 10 files changed, 474 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index bbe323d5ca..cec21f8dd2 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -37,6 +37,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_LATE_INIT + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -49,6 +54,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/toradex/apalis-imx8/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 00..697a831013 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,12 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 00..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 00..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 00..488920580f --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=== + +- Get and Build the ARM Trusted firmware +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +=== + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml-scfw-tcm.bin +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin . +$ cp firmware-imx-8.1/firmware/seco/mx8qx-ahab-container.img . + +Build U-Boot + + +
[U-Boot] [PATCH v3 1/2] arm: dts: Add devicetree support for iMXQXP AI_ML board
Add devicetree support for iMXQXP AI_ML board from Einfochips.
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Peng Fan
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi | 117 +
arch/arm/dts/fsl-imx8qxp-ai_ml.dts | 181 +
3 files changed, 299 insertions(+)
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e6680e5e98..7834a158da 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -614,6 +614,7 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_ARCH_IMX8) += \
fsl-imx8qm-apalis.dtb \
fsl-imx8qm-mek.dtb \
+ fsl-imx8qxp-ai_ml.dtb \
fsl-imx8qxp-colibri.dtb \
fsl-imx8qxp-mek.dtb
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
new file mode 100644
index 00..3ca53bb945
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Linaro Ltd.
+ */
+
+&{/imx8qx-pm} {
+
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+_lsio {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio0 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio1 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio2 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio3 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio4 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio5 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio6 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio7 {
+ u-boot,dm-spl;
+};
+
+_conn {
+ u-boot,dm-spl;
+};
+
+_conn_sdch0 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch1 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch2 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
new file mode 100644
index 00..aa85caaff5
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 Einfochips
+ * Copyright 2019 Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "fsl-imx8qxp.dtsi"
+#include "fsl-imx8qxp-ai_ml-u-boot.dtsi"
+
+/ {
+ model = "Einfochips i.MX8QXP AI_ML";
+ compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
+
+ chosen {
+ bootargs = "console=ttyLP2,115200
earlycon=lpuart32,0x5a08,115200";
+ stdout-path =
+ };
+
+ memory@8000 {
+ device_type = "memory";
+ reg = <0x 0x8000 0 0x8000>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart2>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart3>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_fec1>;
+ phy-mode = "rgmii";
+ phy-handle = <>;
+ fsl,ar8031-phy-fixup;
+ fsl,magic-packet;
+ phy-reset-gpios = < 14 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
+ phy-reset-post-delay = <150>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
+
+/* LS-I2C1 */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpi2c1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc1>;
+ bus-width = <4>;
+ no-sd;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc2>;
+ bus-width = <4>;
+
[U-Boot] [PATCH v3 0/2] Add board support for iMX8QXP AI_ML board
Hello, This patchset adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the Consumer Edition and AI boards of the 96Boards family. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet Thanks, Mani Note: This patchset depends on the below cleanup patches submitted: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Changes in v3: * Incorporated review comments from Fabio. Major change is switching to distro_boot. * Added Reviewed-by tag from Peng Fan. Changes in v2: * Rebased the patches on top of following patches: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Manivannan Sadhasivam (2): arm: dts: Add devicetree support for iMXQXP AI_ML board board: Add support for iMX8QXP AI_ML board arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi| 117 +++ arch/arm/dts/fsl-imx8qxp-ai_ml.dts| 181 ++ arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 + board/einfochips/imx8qxp_ai_ml/README | 49 + .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 122 board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++ board/einfochips/imx8qxp_ai_ml/spl.c | 49 + configs/imx8qxp_ai_ml_defconfig | 82 include/configs/imx8qxp_ai_ml.h | 116 +++ 13 files changed, 773 insertions(+) create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/2] board: Add support for iMXQXP AI_ML board
Hi Fabio,
On Fri, Jul 12, 2019 at 08:37:24AM -0300, Fabio Estevam wrote:
> Hi Manivannan,
>
> On Thu, Jul 11, 2019 at 3:07 PM Manivannan Sadhasivam
> wrote:
> >
> > This commit adds initial board support for iMXQXP AI_ML board from
>
> iMXQXP --> i.MX8QXP
>
Ack.
>
> > Einfochips. This board is one of the 96Boards Consumer Edition and AI boards
> > of the 96Boards family based on i.MXQXP SoC from NXP/Freescale.
>
> i.MXQXP -> i.MX8QXP
>
Ack.
> > --- /dev/null
> > +++ b/board/einfochips/imx8qxp_ai_ml/README
> > @@ -0,0 +1,49 @@
> > +U-Boot for the Einfochips i.MX8QXP AI_ML board
> > +
> > +Quick Start
> > +===
> > +
> > +- Build the ARM Trusted firmware binary
>
> The first instruction here is to build the ATF...
>
Oops, this should be "Get and Build the ARM Trusted firmware"
> > +- Get scfw_tcm.bin and ahab-container.img
> > +- Build U-Boot
> > +- Flash the binary into the SD card
> > +- Boot
> > +
> > +Get and Build the ARM Trusted firmware
> > +==
> > +
> > +$ git clone https://source.codeaurora.org/external/imx/imx-atf
>
> and later it is described how to get the ATF.
>
> Looks like the order needs to be inverted.
>
> > +void detail_board_ddr_info(void)
> > +{
> > + puts("\nDDR");
>
> Is this function really useful as its only purpose is to print "DDR" ?
>
Copy paste clutter. Will remove it.
> > +}
> > +
> > +/*
> > + * Board specific reset that is system reset.
> > + */
>
> You could use single line comment style instead.
>
Ack.
> > +#ifdef CONFIG_SPL_LOAD_FIT
> > +int board_fit_config_name_match(const char *name)
> > +{
> > + /* Just empty function now - can't decide what to choose */
> > + debug("%s: %s\n", __func__, name);
>
> It seems you don't need this function then.
>
Yeah, will remove it.
> > +CONFIG_ARM=y
> > +CONFIG_SPL_SYS_ICACHE_OFF=y
> > +CONFIG_SPL_SYS_DCACHE_OFF=y
>
> Why do you turn off the caches?
>
This also slipped when copying from mek board. Will remove.
> > +CONFIG_PHY_GIGE=y
> > +CONFIG_FEC_MXC_SHARE_MDIO=y
> > +CONFIG_FEC_MXC_MDIO_BASE=0x5B04
>
> Just wondering why CONFIG_FEC_MXC_MDIO_BASE is set in a board config file?
>
> Shouldn't this base address be retrieved from device tree?
>
Ideally it should but the driver is not matured enough to retrieve address
from DT. Currently it relies on the Kconfig symbol, hence it needs to be
present till the driver is cleaned up.
> > +/* Flat Device Tree Definitions */
> > +#define CONFIG_OF_BOARD_SETUP
> > +
> > +#define CONFIG_FSL_ESDHC
> > +#define CONFIG_FSL_USDHC
> > +#define CONFIG_SYS_FSL_ESDHC_ADDR 0
> > +#define USDHC1_BASE_ADDR0x5B01
> > +#define USDHC2_BASE_ADDR0x5B02
>
> These base addresses should not be needed as they can be retrieved
> from device tree.
>
Actually these defines are not needed. Will remove.
> > +#define CONFIG_ENV_OVERWRITE
> > +
> > +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
> > +
> > +/* Initial environment variables */
> > +#define CONFIG_EXTRA_ENV_SETTINGS \
> > + "script=boot.scr\0" \
> > + "image=Image\0" \
> > + "panel=NULL\0" \
>
> If you don't need the variable 'panel', then there is no need to define it.
>
Ack.
> > +#define CONFIG_BOOTCOMMAND \
> > + "mmc dev ${mmcdev}; if mmc rescan; then " \
> > + "if run loadbootscript; then " \
> > + "run bootscript; " \
> > + "else " \
> > + "if run loadimage; then " \
> > + "run mmcboot; " \
> > + "else run netboot; " \
> > + "fi; " \
> > + "fi; " \
> > + "else booti ${loadaddr} - ${fdt_addr}; fi"
>
> You may consider to use distro_boot for this community board. It makes
> easier for Linux distros to support it.
Agree. Initially I thought of not using it since the most of imx8 boards are
not using distro_boot, but anyway it doesn't hurt to do so.
Thanks,
Mani
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[U-Boot] [PATCH v2 2/2] board: Add support for iMXQXP AI_ML board
This commit adds initial board support for iMXQXP AI_ML board from Einfochips. This board is one of the 96Boards Consumer Edition and AI boards of the 96Boards family based on i.MXQXP SoC from NXP/Freescale. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet More information about this board can be found in arrow website: https://www.arrow.com/en/products/imx8-ai-ml/arrow-development-tools Signed-off-by: Manivannan Sadhasivam --- arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 + board/einfochips/imx8qxp_ai_ml/README | 49 ++ .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 128 ++ board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++ board/einfochips/imx8qxp_ai_ml/spl.c | 59 +++ configs/imx8qxp_ai_ml_defconfig | 83 + include/configs/imx8qxp_ai_ml.h | 157 ++ 10 files changed, 532 insertions(+) create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig index bbe323d5ca..cec21f8dd2 100644 --- a/arch/arm/mach-imx/imx8/Kconfig +++ b/arch/arm/mach-imx/imx8/Kconfig @@ -37,6 +37,11 @@ config TARGET_COLIBRI_IMX8X select BOARD_LATE_INIT select IMX8QXP +config TARGET_IMX8QXP_AI_ML + bool "Support i.MX8QXP AI_ML board" + select BOARD_LATE_INIT + select IMX8QXP + config TARGET_IMX8QM_MEK bool "Support i.MX8QM MEK board" select BOARD_LATE_INIT @@ -49,6 +54,7 @@ config TARGET_IMX8QXP_MEK endchoice +source "board/einfochips/imx8qxp_ai_ml/Kconfig" source "board/freescale/imx8qm_mek/Kconfig" source "board/freescale/imx8qxp_mek/Kconfig" source "board/toradex/apalis-imx8/Kconfig" diff --git a/board/einfochips/imx8qxp_ai_ml/Kconfig b/board/einfochips/imx8qxp_ai_ml/Kconfig new file mode 100644 index 00..697a831013 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Kconfig @@ -0,0 +1,12 @@ +if TARGET_IMX8QXP_AI_ML + +config SYS_BOARD + default "imx8qxp_ai_ml" + +config SYS_VENDOR + default "einfochips" + +config SYS_CONFIG_NAME + default "imx8qxp_ai_ml" + +endif diff --git a/board/einfochips/imx8qxp_ai_ml/MAINTAINERS b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS new file mode 100644 index 00..add0bd9431 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/MAINTAINERS @@ -0,0 +1,6 @@ +i.MX8QXP AI_ML BOARD +M: Manivannan Sadhasivam +S: Maintained +F: board/einfochips/imx8qxp_ai_ml/ +F: include/configs/imx8qxp_ai_ml.h +F: configs/imx8qxp_ai_ml_defconfig diff --git a/board/einfochips/imx8qxp_ai_ml/Makefile b/board/einfochips/imx8qxp_ai_ml/Makefile new file mode 100644 index 00..e08774dc6e --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2019 Linaro Ltd. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += imx8qxp_ai_ml.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/einfochips/imx8qxp_ai_ml/README b/board/einfochips/imx8qxp_ai_ml/README new file mode 100644 index 00..416a157ea8 --- /dev/null +++ b/board/einfochips/imx8qxp_ai_ml/README @@ -0,0 +1,49 @@ +U-Boot for the Einfochips i.MX8QXP AI_ML board + +Quick Start +=== + +- Build the ARM Trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Build U-Boot +- Flash the binary into the SD card +- Boot + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 -b imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +=== + +$ wget https://raw.githubusercontent.com/96boards-ai-ml/binaries/master/mx8qx-aiml-scfw-tcm.bin +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.1.bin +$ chmod +x firmware-imx-8.1.bin +$ ./firmware-imx-8.1.bin + +Copy the following binaries to U-Boot folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin . +$ cp firmware-imx-8.1/firmware/seco/mx8qx-ahab-container.img . + +Build U-Boot + + +
[U-Boot] [PATCH v2 1/2] arm: dts: Add devicetree support for iMXQXP AI_ML board
Add devicetree support for iMXQXP AI_ML board from Einfochips.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi | 117 +
arch/arm/dts/fsl-imx8qxp-ai_ml.dts | 181 +
3 files changed, 299 insertions(+)
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index e6680e5e98..7834a158da 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -614,6 +614,7 @@ dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
dtb-$(CONFIG_ARCH_IMX8) += \
fsl-imx8qm-apalis.dtb \
fsl-imx8qm-mek.dtb \
+ fsl-imx8qxp-ai_ml.dtb \
fsl-imx8qxp-colibri.dtb \
fsl-imx8qxp-mek.dtb
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
new file mode 100644
index 00..3ca53bb945
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi
@@ -0,0 +1,117 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2019 Linaro Ltd.
+ */
+
+&{/imx8qx-pm} {
+
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+_lsio {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio0 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio1 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio2 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio3 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio4 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio5 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio6 {
+ u-boot,dm-spl;
+};
+
+_lsio_gpio7 {
+ u-boot,dm-spl;
+};
+
+_conn {
+ u-boot,dm-spl;
+};
+
+_conn_sdch0 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch1 {
+ u-boot,dm-spl;
+};
+
+_conn_sdch2 {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
+
+ {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
new file mode 100644
index 00..aa85caaff5
--- /dev/null
+++ b/arch/arm/dts/fsl-imx8qxp-ai_ml.dts
@@ -0,0 +1,181 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2018 Einfochips
+ * Copyright 2019 Linaro Ltd.
+ */
+
+/dts-v1/;
+
+#include "fsl-imx8qxp.dtsi"
+#include "fsl-imx8qxp-ai_ml-u-boot.dtsi"
+
+/ {
+ model = "Einfochips i.MX8QXP AI_ML";
+ compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp";
+
+ chosen {
+ bootargs = "console=ttyLP2,115200
earlycon=lpuart32,0x5a08,115200";
+ stdout-path =
+ };
+
+ memory@8000 {
+ device_type = "memory";
+ reg = <0x 0x8000 0 0x8000>;
+ };
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart2>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpuart3>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_fec1>;
+ phy-mode = "rgmii";
+ phy-handle = <>;
+ fsl,ar8031-phy-fixup;
+ fsl,magic-packet;
+ phy-reset-gpios = < 14 GPIO_ACTIVE_LOW>;
+ phy-reset-duration = <10>;
+ phy-reset-post-delay = <150>;
+ status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethphy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+ };
+};
+
+/* LS-I2C1 */
+ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-frequency = <10>;
+ pinctrl-names = "default";
+ pinctrl-0 = <_lpi2c1>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc1>;
+ bus-width = <4>;
+ no-sd;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_usdhc2>;
+ bus-width = <4>;
+ cd-gpios = < 22 GPIO_ACTIVE_LOW>;
+ status
[U-Boot] [PATCH v2 0/2] Add board support for iMX8QXP AI_ML board
Hello, This patchset adds initial board support for iMX8QXP AI_ML board from Einfochips. This board is one of the Consumer Edition and AI boards of the 96Boards family. This initial supports contains following peripherals which are tested and known to work: 1. Debug serial via UART2 2. SD card 3. Ethernet Thanks, Mani Note: This patchset depends on the below cleanup patches submitted: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Changes in v2: * Rebased the patches on top of following patches: [U-Boot,1/2] arm: imx8: factor out uart init code [U-Boot,2/2] arm: imx8: don't duplicate build_info() Manivannan Sadhasivam (2): arm: dts: Add devicetree support for iMXQXP AI_ML board board: Add support for iMXQXP AI_ML board arch/arm/dts/Makefile | 1 + arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi| 117 +++ arch/arm/dts/fsl-imx8qxp-ai_ml.dts| 181 ++ arch/arm/mach-imx/imx8/Kconfig| 6 + board/einfochips/imx8qxp_ai_ml/Kconfig| 12 ++ board/einfochips/imx8qxp_ai_ml/MAINTAINERS| 6 + board/einfochips/imx8qxp_ai_ml/Makefile | 8 + board/einfochips/imx8qxp_ai_ml/README | 49 + .../einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c | 128 + board/einfochips/imx8qxp_ai_ml/imximage.cfg | 24 +++ board/einfochips/imx8qxp_ai_ml/spl.c | 59 ++ configs/imx8qxp_ai_ml_defconfig | 83 include/configs/imx8qxp_ai_ml.h | 157 +++ 13 files changed, 831 insertions(+) create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml-u-boot.dtsi create mode 100644 arch/arm/dts/fsl-imx8qxp-ai_ml.dts create mode 100644 board/einfochips/imx8qxp_ai_ml/Kconfig create mode 100644 board/einfochips/imx8qxp_ai_ml/MAINTAINERS create mode 100644 board/einfochips/imx8qxp_ai_ml/Makefile create mode 100644 board/einfochips/imx8qxp_ai_ml/README create mode 100644 board/einfochips/imx8qxp_ai_ml/imx8qxp_ai_ml.c create mode 100644 board/einfochips/imx8qxp_ai_ml/imximage.cfg create mode 100644 board/einfochips/imx8qxp_ai_ml/spl.c create mode 100644 configs/imx8qxp_ai_ml_defconfig create mode 100644 include/configs/imx8qxp_ai_ml.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] Add i.MX7D based Meerkat96 board support
On Mon, Jul 08, 2019 at 05:59:04PM +0800, Shawn Guo wrote:
> On Mon, Jul 08, 2019 at 02:42:54PM +0530, Manivannan Sadhasivam wrote:
> > Hi Shawn,
> >
> > Thanks for the patch!
> >
> > On Sun, Jul 07, 2019 at 08:59:55PM +0800, Shawn Guo wrote:
> > > The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
> > > 96Boards community and complies with all Consumer Edition board
> > > specifications.
> > >
> > > https://www.novtech.com/products/meerkat96.html
> > > https://www.96boards.org/product/imx7-96/
> > >
> > > The initial supported/tested devices include:
> > > - Debug serial
> > > - SD
> > > - USB Host (with Ethernet)
> >
> > While testing, I encountered below error when starting usb:
> >
> > => usb start
> > starting USB...
> > Bus usb@30b1: usb dr_mode not found
> > Error enabling VBUS supply
> > probe failed, error -38
>
> This is expected, as there are some properties missing from DT for
> USBOTG1, and I haven't put effort on it yet.
>
This is fine.
> > Bus usb@30b2: data abort
> > pc : [<9ffaf574>] lr : [<9ffaf560>]
> > reloc pc : [<87828574>]lr : [<87828560>]
> > sp : 9df7d1b0 ip : 431bde82 fp : 9ff9dc8c
> > r10: r9 : 9df84ed8 r8 :
> > r7 : 9df865d8 r6 : 9df86578 r5 : 9df87680 r4 : 0080
> > r3 : r2 : 0196f7b6 r1 : 3131 r0 :
> > Flags: nZCv IRQs off FIQs off Mode SVC_32
> > Code: 18bd8010 e2841dc2 e2811031 e1a01801 (e5913234)
> > Resetting CPU ...
> >
> > resetting ...
>
> It looks the exception comes from USBOTG2 which backs both Host ports on
> Meerkat96 board. I have never seen this in my testing. Do you have any
> USB device connected to the Host port, when this happens?
>
Digged into this issue and found that the below commit is causing regression:
501547cec1 ("usb: ehci-mx6: Fix bus enumeration for DM case")
But as mentioned in the commit message, that commit was incomplete and this
issue might be expected. Reverting the commit makes usb work again. And the
reason you are not seeing this issue is, your tree might not be updated
with mainline u-boot ;-)
Copied Marek who was the author of that commit.
With that, you can have my tested tag:
Tested-by: Manivannan Sadhasivam
Thanks,
Mani
> >
> > Did I miss anything? Sorry, don't have time to debug much...
>
> If you can help me reproduce it on my end, I will debug it.
>
> Shawn
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Re: [U-Boot] [PATCH 2/2] Add i.MX7D based Meerkat96 board support
Hi Shawn, Thanks for the patch! On Sun, Jul 07, 2019 at 08:59:55PM +0800, Shawn Guo wrote: > The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of > 96Boards community and complies with all Consumer Edition board > specifications. > > https://www.novtech.com/products/meerkat96.html > https://www.96boards.org/product/imx7-96/ > > The initial supported/tested devices include: > - Debug serial > - SD > - USB Host (with Ethernet) While testing, I encountered below error when starting usb: => usb start starting USB... Bus usb@30b1: usb dr_mode not found Error enabling VBUS supply probe failed, error -38 Bus usb@30b2: data abort pc : [<9ffaf574>] lr : [<9ffaf560>] reloc pc : [<87828574>]lr : [<87828560>] sp : 9df7d1b0 ip : 431bde82 fp : 9ff9dc8c r10: r9 : 9df84ed8 r8 : r7 : 9df865d8 r6 : 9df86578 r5 : 9df87680 r4 : 0080 r3 : r2 : 0196f7b6 r1 : 3131 r0 : Flags: nZCv IRQs off FIQs off Mode SVC_32 Code: 18bd8010 e2841dc2 e2811031 e1a01801 (e5913234) Resetting CPU ... resetting ... Did I miss anything? Sorry, don't have time to debug much... Regards, Mani > > With these support, it's good enough for loading Linux Kernel from SD or > Ethernet over USB. > > Signed-off-by: Shawn Guo > --- > arch/arm/mach-imx/mx7/Kconfig| 10 +++ > board/novtech/meerkat96/Kconfig | 12 +++ > board/novtech/meerkat96/MAINTAINERS | 6 ++ > board/novtech/meerkat96/Makefile | 1 + > board/novtech/meerkat96/README | 18 > board/novtech/meerkat96/imximage.cfg | 127 +++ > board/novtech/meerkat96/meerkat96.c | 71 +++ > configs/meerkat96_defconfig | 52 +++ > include/configs/meerkat96.h | 48 ++ > 9 files changed, 345 insertions(+) > create mode 100644 board/novtech/meerkat96/Kconfig > create mode 100644 board/novtech/meerkat96/MAINTAINERS > create mode 100644 board/novtech/meerkat96/Makefile > create mode 100644 board/novtech/meerkat96/README > create mode 100644 board/novtech/meerkat96/imximage.cfg > create mode 100644 board/novtech/meerkat96/meerkat96.c > create mode 100644 configs/meerkat96_defconfig > create mode 100644 include/configs/meerkat96.h > > diff --git a/arch/arm/mach-imx/mx7/Kconfig b/arch/arm/mach-imx/mx7/Kconfig > index 232f33285d40..286d36589d0b 100644 > --- a/arch/arm/mach-imx/mx7/Kconfig > +++ b/arch/arm/mach-imx/mx7/Kconfig > @@ -28,6 +28,15 @@ config TARGET_CL_SOM_IMX7 > select SUPPORT_SPL > imply CMD_DM > > +config TARGET_MEERKAT96 > + bool "NovTech Meerkat96 board" > + select BOARD_LATE_INIT > + select DM > + select DM_SERIAL > + select DM_THERMAL > + select MX7D > + imply CMD_DM > + > config TARGET_MX7DSABRESD > bool "mx7dsabresd" > select BOARD_LATE_INIT > @@ -67,6 +76,7 @@ config SYS_SOC > > source "board/compulab/cl-som-imx7/Kconfig" > source "board/freescale/mx7dsabresd/Kconfig" > +source "board/novtech/meerkat96/Kconfig" > source "board/technexion/pico-imx7d/Kconfig" > source "board/toradex/colibri_imx7/Kconfig" > source "board/warp7/Kconfig" > diff --git a/board/novtech/meerkat96/Kconfig b/board/novtech/meerkat96/Kconfig > new file mode 100644 > index ..b0e46fcc1b3f > --- /dev/null > +++ b/board/novtech/meerkat96/Kconfig > @@ -0,0 +1,12 @@ > +if TARGET_MEERKAT96 > + > +config SYS_BOARD > + default "meerkat96" > + > +config SYS_VENDOR > + default "novtech" > + > +config SYS_CONFIG_NAME > + default "meerkat96" > + > +endif > diff --git a/board/novtech/meerkat96/MAINTAINERS > b/board/novtech/meerkat96/MAINTAINERS > new file mode 100644 > index ..0eca2940d5c0 > --- /dev/null > +++ b/board/novtech/meerkat96/MAINTAINERS > @@ -0,0 +1,6 @@ > +MEERKAT96 BOARD > +M: Shawn Guo > +S: Maintained > +F: board/novtech/meerkat96 > +F: include/configs/meerkat96.h > +F: configs/meerkat96_defconfig > diff --git a/board/novtech/meerkat96/Makefile > b/board/novtech/meerkat96/Makefile > new file mode 100644 > index ..f27e05641b98 > --- /dev/null > +++ b/board/novtech/meerkat96/Makefile > @@ -0,0 +1 @@ > +obj-y := meerkat96.o > diff --git a/board/novtech/meerkat96/README b/board/novtech/meerkat96/README > new file mode 100644 > index ..bca2fad5a21f > --- /dev/null > +++ b/board/novtech/meerkat96/README > @@ -0,0 +1,18 @@ > +* Build U-Boot for Meerkat96 board > + > + $ make mrproper > + $ make meerkat96_defconfig > + $ make > + > + It will generate the U-Boot binary called u-boot-dtb.imx > + > +* Install U-Boot to MicroSD card > + > + Plug MicroSD card to a Linux machine (with card reader), find the > + device name and replace sd[x] with the name in the following command. > + > + $ sudo dd if=u-boot-dtb.imx of=/dev/sd[x] bs=512 seek=2 > + > + It will install U-Boot to MicroSD card at 1KiB offset. Insert the > + card to Meerkat96 MicroSD slot, power up the board,
[U-Boot] [PATCH 2/2] arm: dts: ficus: Enable booting from eMMC when using SPL
This commits enables booting from eMMC when using SPL on 96Boards
Ficus board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/rk3399-ficus-u-boot.dtsi | 1 +
arch/arm/dts/rk3399-ficus.dts | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
index eab86bdb30..67b63a8352 100644
--- a/arch/arm/dts/rk3399-ficus-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-ficus-u-boot.dtsi
@@ -3,4 +3,5 @@
* Copyright (C) 2019 Jagan Teki
*/
+#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"
diff --git a/arch/arm/dts/rk3399-ficus.dts b/arch/arm/dts/rk3399-ficus.dts
index 4b2dd82b67..0f219f4a9c 100644
--- a/arch/arm/dts/rk3399-ficus.dts
+++ b/arch/arm/dts/rk3399-ficus.dts
@@ -15,6 +15,8 @@
chosen {
stdout-path = "serial2:150n8";
+ u-boot,spl-boot-order = \
+ ,
};
clkin_gmac: external-gmac-clock {
--
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[U-Boot] [PATCH 1/2] arm: dts: rock960: Enable booting from eMMC when using SPL
This commits enables booting from eMMC when using SPL on 96Boards
Rock960 board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/rk3399-rock960-u-boot.dtsi | 1 +
arch/arm/dts/rk3399-rock960.dts | 2 ++
2 files changed, 3 insertions(+)
diff --git a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
index 5256f6d3f2..7fb5072a9b 100644
--- a/arch/arm/dts/rk3399-rock960-u-boot.dtsi
+++ b/arch/arm/dts/rk3399-rock960-u-boot.dtsi
@@ -3,4 +3,5 @@
* Copyright (C) 2019 Jagan Teki
*/
+#include "rk3399-u-boot.dtsi"
#include "rk3399-sdram-lpddr3-2GB-1600.dtsi"
diff --git a/arch/arm/dts/rk3399-rock960.dts b/arch/arm/dts/rk3399-rock960.dts
index 7e06bc97e5..c8b9075c73 100644
--- a/arch/arm/dts/rk3399-rock960.dts
+++ b/arch/arm/dts/rk3399-rock960.dts
@@ -12,6 +12,8 @@
chosen {
stdout-path = "serial2:150n8";
+ u-boot,spl-boot-order = \
+ ,
};
};
--
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Re: [U-Boot] [PATCH 2/3] board: stm32mp1: Add Avenger96 board support
On Thu, May 02, 2019 at 08:41:29AM +, Patrice CHOTARD wrote:
> Hi Manivannan
>
> On 4/29/19 2:03 PM, Manivannan Sadhasivam wrote:
> > Add support for Avenger96 board from Arrow Electronics based on STM32MP157
> > MPU. This board is one of the Consumer Edition (CE) boards of the 96Boards
> > family and has the following features:
> >
> > SoC: STM32MP157AAC
> > PMIC: STPMIC1A
> > RAM: 1024 Mbyte @ 533MHz
> > Storage: eMMC v4.51: 8 Gbyte
> > microSD Socket: UHS-1 v3.01
> > Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
> > Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
> > Bluetooth®v4.2 (BR/EDR/BLE)
> > USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
> > Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
> > LED: 4x User LED, 1x WiFi LED, 1x BT LED
> >
> > More information about this board can be found in 96Boards website:
> > https://www.96boards.org/product/avenger96/
> >
> > Signed-off-by: Manivannan Sadhasivam
> > ---
> > arch/arm/dts/Makefile | 1 +
> > .../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 177 +
> > arch/arm/dts/stm32mp157a-avenger96.dts| 362 ++
> > board/st/stm32mp1/README | 23 ++
> > 4 files changed, 563 insertions(+)
> > create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> > create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts
> >
> > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> > index b4dc57edbd1..97a182f3abc 100644
> > --- a/arch/arm/dts/Makefile
> > +++ b/arch/arm/dts/Makefile
> > @@ -711,6 +711,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
> >
> > dtb-$(CONFIG_TARGET_STM32MP1) += \
> > stm32mp157a-dk1.dtb \
> > + stm32mp157a-avenger96.dtb \
> > stm32mp157c-dk2.dtb \
> > stm32mp157c-ed1.dtb \
> > stm32mp157c-ev1.dtb
> > diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> > b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> > new file mode 100644
> > index 000..dd6f0cf8b5f
> > --- /dev/null
> > +++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
> > @@ -0,0 +1,177 @@
> > +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> > +/*
> > + * Copyright : STMicroelectronics 2018
> > + *
> > + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> > + * Author: Manivannan Sadhasivam
> > + */
> > +
> > +#include
> > +#include "stm32mp157-u-boot.dtsi"
> > +#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
> > +
> > +/ {
> > + aliases {
> > + mmc0 =
> > + mmc1 =
> > + usb0 = _hs;
> > + };
> > +
> > + config {
> > + u-boot,boot-led = "led1";
> > + u-boot,error-led = "led4";
> > + };
> > +};
> > +
> > + {
> > + u-boot,dm-pre-reloc;
> > +};
> > +
> > +_pins_a {
>
> Shouldn't be i2c4_pins_b instead ? This should be the root cause of your
> SPL issue.
>
Nope. As I mentioned in v2, the culprit was UART and SDMMC. Please review that
one.
Thanks,
Mani
> > + u-boot,dm-pre-reloc;
> > + pins {
> > + u-boot,dm-pre-reloc;
> > + };
> > +};
> > +
> > + {
> > + u-boot,dm-pre-reloc;
> > +};
> > +
> > + {
> > + st,clksrc = <
> > + CLK_MPU_PLL1P
> > + CLK_AXI_PLL2P
> > + CLK_MCU_PLL3P
> > + CLK_PLL12_HSE
> > + CLK_PLL3_HSE
> > + CLK_PLL4_HSE
> > + CLK_RTC_LSE
> > + CLK_MCO1_DISABLED
> > + CLK_MCO2_DISABLED
> > + >;
> > +
> > + st,clkdiv = <
> > + 1 /*MPU*/
> > + 0 /*AXI*/
> > + 0 /*MCU*/
> > + 1 /*APB1*/
> > + 1 /*APB2*/
> > + 1 /*APB3*/
> > + 1 /*APB4*/
> > + 2 /*APB5*/
> > + 23 /*RTC*/
> > + 0 /*MCO1*/
> > + 0 /*MCO2*/
> > + >;
> > +
> > + st,pkcs = <
> > + CLK_CKPER_HSE
> > + CLK_FMC_ACLK
> > + CLK_QSPI_ACLK
> > + CLK_ETH_DISABLED
> > + CLK_SDMMC12_PLL4P
> > + CLK_DSI_DSIPLL
> > + CLK_STGEN_HSE
> > + CLK_USBPHY_HSE
> > + CLK_SPI2S1_PLL3Q
> > + CLK_SPI2S23_PLL3Q
> > +
[U-Boot] [PATCH v2 3/3] arm: mach-stm32mp: Add newline to the MAC error message
Without newline, the error message appears for non prgrammed OTP boards
looks messsy. Hence add it to look more clean.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/mach-stm32mp/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 7b4431c9c75..e1a0a136809 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -481,7 +481,7 @@ static int setup_mac_address(void)
enetaddr[i] = ((uint8_t *))[i];
if (!is_valid_ethaddr(enetaddr)) {
- pr_err("invalid MAC address in OTP %pM", enetaddr);
+ pr_err("invalid MAC address in OTP %pM\n", enetaddr);
return -EINVAL;
}
pr_debug("OTP MAC address = %pM\n", enetaddr);
--
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[U-Boot] [PATCH v2 2/3] board: stm32mp1: Add Avenger96 board support
Add support for Avenger96 board from Arrow Electronics based on STM32MP157
MPU. This board is one of the Consumer Edition (CE) boards of the 96Boards
family and has the following features:
SoC: STM32MP157AAC
PMIC: STPMIC1A
RAM: 1024 Mbyte @ 533MHz
Storage: eMMC v4.51: 8 Gbyte
microSD Socket: UHS-1 v3.01
Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
Bluetooth®v4.2 (BR/EDR/BLE)
USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
LED: 4x User LED, 1x WiFi LED, 1x BT LED
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/Makefile | 1 +
.../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 191 +
arch/arm/dts/stm32mp157a-avenger96.dts| 362 ++
board/st/stm32mp1/README | 23 ++
4 files changed, 577 insertions(+)
create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b4dc57edbd1..97a182f3abc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -711,6 +711,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
dtb-$(CONFIG_TARGET_STM32MP1) += \
stm32mp157a-dk1.dtb \
+ stm32mp157a-avenger96.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb
diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
new file mode 100644
index 000..1ff681afb87
--- /dev/null
+++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
@@ -0,0 +1,191 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright : STMicroelectronics 2018
+ *
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam
+ */
+
+#include
+#include "stm32mp157-u-boot.dtsi"
+#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
+
+/ {
+ aliases {
+ mmc0 =
+ mmc1 =
+ usb0 = _hs;
+ };
+
+ config {
+ u-boot,boot-led = "led1";
+ u-boot,error-led = "led4";
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+_pins_a {
+ u-boot,dm-pre-reloc;
+ pins {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ st,clksrc = <
+ CLK_MPU_PLL1P
+ CLK_AXI_PLL2P
+ CLK_MCU_PLL3P
+ CLK_PLL12_HSE
+ CLK_PLL3_HSE
+ CLK_PLL4_HSE
+ CLK_RTC_LSE
+ CLK_MCO1_DISABLED
+ CLK_MCO2_DISABLED
+ >;
+
+ st,clkdiv = <
+ 1 /*MPU*/
+ 0 /*AXI*/
+ 0 /*MCU*/
+ 1 /*APB1*/
+ 1 /*APB2*/
+ 1 /*APB3*/
+ 1 /*APB4*/
+ 2 /*APB5*/
+ 23 /*RTC*/
+ 0 /*MCO1*/
+ 0 /*MCO2*/
+ >;
+
+ st,pkcs = <
+ CLK_CKPER_HSE
+ CLK_FMC_ACLK
+ CLK_QSPI_ACLK
+ CLK_ETH_DISABLED
+ CLK_SDMMC12_PLL4P
+ CLK_DSI_DSIPLL
+ CLK_STGEN_HSE
+ CLK_USBPHY_HSE
+ CLK_SPI2S1_PLL3Q
+ CLK_SPI2S23_PLL3Q
+ CLK_SPI45_HSI
+ CLK_SPI6_HSI
+ CLK_I2C46_HSI
+ CLK_SDMMC3_PLL4P
+ CLK_USBO_USBPHY
+ CLK_ADC_CKPER
+ CLK_CEC_LSE
+ CLK_I2C12_HSI
+ CLK_I2C35_HSI
+ CLK_UART1_HSI
+ CLK_UART24_HSI
+ CLK_UART35_HSI
+ CLK_UART6_HSI
+ CLK_UART78_HSI
+ CLK_SPDIF_PLL4P
+ CLK_FDCAN_PLL4Q
+ CLK_SAI1_PLL3Q
+ CLK_SAI2_PLL3Q
+ CLK_SAI3_PLL3Q
+ CLK_SAI4_PLL3Q
+ CLK_RNG1_LSI
+ CLK_RNG2_LSI
+ CLK_LPTIM1_PCLK1
+ CLK_LPTIM23_PCLK3
+ CLK_LPTIM45_LSE
+ >;
+
+ /* VCO = 1300.0 MHz => P = 650 (CPU) */
+ pll1: st,pll@0 {
+ cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+ frac = < 0x800 >;
+ u-boot,dm-pre-reloc;
+ };
+
+ /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
+ pll2: st,pll@1 {
+ cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+ frac = < 0x1400 >;
+ u-boot,dm-pre-reloc;
+ };
+
+ /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+ pll3: st,pll@2 {
+ cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+
[U-Boot] [PATCH v2 1/3] arm: dts: stm32mp157: Add missing pinctrl definitions
Add missing pinctrl definitions for STM32MP157.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/stm32mp157-pinctrl.dtsi | 63
1 file changed, 63 insertions(+)
diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi
b/arch/arm/dts/stm32mp157-pinctrl.dtsi
index 0aae69b0a04..200d2c00c5f 100644
--- a/arch/arm/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi
@@ -220,6 +220,16 @@
};
};
+ i2c1_pins_b: i2c1-1 {
+ pins {
+ pinmux = ,
/* I2C1_SCL */
+;
/* I2C1_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
i2c2_pins_a: i2c2-0 {
pins {
pinmux = ,
/* I2C2_SCL */
@@ -230,6 +240,16 @@
};
};
+ i2c2_pins_b: i2c2-1 {
+ pins {
+ pinmux = ,
/* I2C2_SCL */
+;
/* I2C2_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
i2c5_pins_a: i2c5-0 {
pins {
pinmux = ,
/* I2C5_SCL */
@@ -375,6 +395,21 @@
};
};
+ spi2_pins_a: spi2-0 {
+ pins1 {
+ pinmux = ,
/* SPI2_SCK */
+,
/* SPI2_NSS */
+;
/* SPI2_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins2 {
+ pinmux = ;
/* SPI2_MISO */
+ bias-disable;
+ };
+ };
+
stusb1600_pins_a: stusb1600-0 {
pins {
pinmux = ;
@@ -395,6 +430,34 @@
};
};
+ uart4_pins_b: uart4-1 {
+ pins1 {
+ pinmux = ;
/* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = ;
/* UART4_RX */
+ bias-disable;
+ };
+ };
+
+ uart7_pins_a: uart7-0 {
+ pins1 {
+ pinmux = ;
/* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = ,
/* UART4_RX */
+,
/* UART4_CTS */
+;
/* UART4_RTS */
+ bias-disable;
+ };
+ };
+
usbotg_hs_pins_a: usbotg_hs-0 {
pins {
pinmux = ; /* OTG_ID */
--
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[U-Boot] [PATCH v2 0/3] Add Avenger96 board support
Hello, This patchset adds board support for Avenger96, a 96Boards Consumer Edition board from Arrow Electronics. This board is based on the STM32MP1 MPU and the board support is added under st boards since there are no significance changes required to boot u-boot on this board other than the dts. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ Thanks, Mani Changes in v2: * Added missing `u-boot,dm-pre-reloc` property to UART and SDMMC nodes and verified SPL boot. Manivannan Sadhasivam (3): arm: dts: stm32mp157: Add missing pinctrl definitions board: stm32mp1: Add Avenger96 board support arm: mach-stm32mp: Add newline to the MAC error message arch/arm/dts/Makefile | 1 + arch/arm/dts/stm32mp157-pinctrl.dtsi | 63 +++ .../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 191 + arch/arm/dts/stm32mp157a-avenger96.dts| 362 ++ arch/arm/mach-stm32mp/cpu.c | 2 +- board/st/stm32mp1/README | 23 ++ 6 files changed, 641 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/3] Add Avenger96 board support
Hi Patrick, On Thu, May 02, 2019 at 07:27:14AM +, Patrice CHOTARD wrote: > Hi Manivannan > > On 4/29/19 2:03 PM, Manivannan Sadhasivam wrote: > > Hello, > > > > This patchset adds board support for Avenger96, a 96Boards Consumer > > Edition board from Arrow Electronics. This board is based on the > > STM32MP1 MPU and the board support is added under st boards since > > there are no significance changes required to boot u-boot on this > > board other than the dts. > > > > More information about this board can be found in 96Boards website: > > https://www.96boards.org/product/avenger96/ > > > > PS: I only managed to boot u-boot as SSBL with TF-A as FSBL. U-boot > > SPL way of booting is not working. > > What are the symptoms ? > It was my bad. Just found that I missed few `u-boot,dm-pre-reloc` properties in DTS! Will send the next version of the patchset incorporating those changes. Thanks, Mani > Patrice > > > > > Thanks, > > Mani > > > > Manivannan Sadhasivam (3): > > arm: dts: stm32mp157: Add missing pinctrl definitions > > board: stm32mp1: Add Avenger96 board support > > arm: mach-stm32mp: Add newline to the MAC error message > > > > arch/arm/dts/Makefile | 1 + > > arch/arm/dts/stm32mp157-pinctrl.dtsi | 63 +++ > > .../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 177 + > > arch/arm/dts/stm32mp157a-avenger96.dts| 362 ++ > > arch/arm/mach-stm32mp/cpu.c | 2 +- > > board/st/stm32mp1/README | 23 ++ > > 6 files changed, 627 insertions(+), 1 deletion(-) > > create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi > > create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts > > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/3] board: stm32mp1: Add Avenger96 board support
Add support for Avenger96 board from Arrow Electronics based on STM32MP157
MPU. This board is one of the Consumer Edition (CE) boards of the 96Boards
family and has the following features:
SoC: STM32MP157AAC
PMIC: STPMIC1A
RAM: 1024 Mbyte @ 533MHz
Storage: eMMC v4.51: 8 Gbyte
microSD Socket: UHS-1 v3.01
Ethernet Port: 10/100/1000 Mbit/s, IEEE 802.3 Compliant
Wireless: WiFi 5 GHz & 2.4GHz IEEE 802.11a/b/g/n/ac
Bluetooth®v4.2 (BR/EDR/BLE)
USB: 2x Type A (USB 2.0) Host and 1x Micro B (USB 2.0) OTG
Display: HDMI: WXGA (1366x768)@ 60 fps, HDMI 1.4
LED: 4x User LED, 1x WiFi LED, 1x BT LED
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/avenger96/
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/Makefile | 1 +
.../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 177 +
arch/arm/dts/stm32mp157a-avenger96.dts| 362 ++
board/st/stm32mp1/README | 23 ++
4 files changed, 563 insertions(+)
create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index b4dc57edbd1..97a182f3abc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -711,6 +711,7 @@ dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
dtb-$(CONFIG_TARGET_STM32MP1) += \
stm32mp157a-dk1.dtb \
+ stm32mp157a-avenger96.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb
diff --git a/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
new file mode 100644
index 000..dd6f0cf8b5f
--- /dev/null
+++ b/arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi
@@ -0,0 +1,177 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright : STMicroelectronics 2018
+ *
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam
+ */
+
+#include
+#include "stm32mp157-u-boot.dtsi"
+#include "stm32mp15-ddr3-2x4Gb-1066-binG.dtsi"
+
+/ {
+ aliases {
+ mmc0 =
+ mmc1 =
+ usb0 = _hs;
+ };
+
+ config {
+ u-boot,boot-led = "led1";
+ u-boot,error-led = "led4";
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+_pins_a {
+ u-boot,dm-pre-reloc;
+ pins {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+ {
+ u-boot,dm-pre-reloc;
+};
+
+ {
+ st,clksrc = <
+ CLK_MPU_PLL1P
+ CLK_AXI_PLL2P
+ CLK_MCU_PLL3P
+ CLK_PLL12_HSE
+ CLK_PLL3_HSE
+ CLK_PLL4_HSE
+ CLK_RTC_LSE
+ CLK_MCO1_DISABLED
+ CLK_MCO2_DISABLED
+ >;
+
+ st,clkdiv = <
+ 1 /*MPU*/
+ 0 /*AXI*/
+ 0 /*MCU*/
+ 1 /*APB1*/
+ 1 /*APB2*/
+ 1 /*APB3*/
+ 1 /*APB4*/
+ 2 /*APB5*/
+ 23 /*RTC*/
+ 0 /*MCO1*/
+ 0 /*MCO2*/
+ >;
+
+ st,pkcs = <
+ CLK_CKPER_HSE
+ CLK_FMC_ACLK
+ CLK_QSPI_ACLK
+ CLK_ETH_DISABLED
+ CLK_SDMMC12_PLL4P
+ CLK_DSI_DSIPLL
+ CLK_STGEN_HSE
+ CLK_USBPHY_HSE
+ CLK_SPI2S1_PLL3Q
+ CLK_SPI2S23_PLL3Q
+ CLK_SPI45_HSI
+ CLK_SPI6_HSI
+ CLK_I2C46_HSI
+ CLK_SDMMC3_PLL4P
+ CLK_USBO_USBPHY
+ CLK_ADC_CKPER
+ CLK_CEC_LSE
+ CLK_I2C12_HSI
+ CLK_I2C35_HSI
+ CLK_UART1_HSI
+ CLK_UART24_HSI
+ CLK_UART35_HSI
+ CLK_UART6_HSI
+ CLK_UART78_HSI
+ CLK_SPDIF_PLL4P
+ CLK_FDCAN_PLL4Q
+ CLK_SAI1_PLL3Q
+ CLK_SAI2_PLL3Q
+ CLK_SAI3_PLL3Q
+ CLK_SAI4_PLL3Q
+ CLK_RNG1_LSI
+ CLK_RNG2_LSI
+ CLK_LPTIM1_PCLK1
+ CLK_LPTIM23_PCLK3
+ CLK_LPTIM45_LSE
+ >;
+
+ /* VCO = 1300.0 MHz => P = 650 (CPU) */
+ pll1: st,pll@0 {
+ cfg = < 2 80 0 0 0 PQR(1,0,0) >;
+ frac = < 0x800 >;
+ u-boot,dm-pre-reloc;
+ };
+
+ /* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
+ pll2: st,pll@1 {
+ cfg = < 2 65 1 0 0 PQR(1,1,1) >;
+ frac = < 0x1400 >;
+ u-boot,dm-pre-reloc;
+ };
+
+ /* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
+ pll3: st,pll@2 {
+ cfg = < 1 33 1 16 36 PQR(1,1,1) >;
+
[U-Boot] [PATCH 1/3] arm: dts: stm32mp157: Add missing pinctrl definitions
Add missing pinctrl definitions for STM32MP157.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/dts/stm32mp157-pinctrl.dtsi | 63
1 file changed, 63 insertions(+)
diff --git a/arch/arm/dts/stm32mp157-pinctrl.dtsi
b/arch/arm/dts/stm32mp157-pinctrl.dtsi
index 0aae69b0a04..200d2c00c5f 100644
--- a/arch/arm/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/dts/stm32mp157-pinctrl.dtsi
@@ -220,6 +220,16 @@
};
};
+ i2c1_pins_b: i2c1-1 {
+ pins {
+ pinmux = ,
/* I2C1_SCL */
+;
/* I2C1_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
i2c2_pins_a: i2c2-0 {
pins {
pinmux = ,
/* I2C2_SCL */
@@ -230,6 +240,16 @@
};
};
+ i2c2_pins_b: i2c2-1 {
+ pins {
+ pinmux = ,
/* I2C2_SCL */
+;
/* I2C2_SDA */
+ bias-disable;
+ drive-open-drain;
+ slew-rate = <0>;
+ };
+ };
+
i2c5_pins_a: i2c5-0 {
pins {
pinmux = ,
/* I2C5_SCL */
@@ -375,6 +395,21 @@
};
};
+ spi2_pins_a: spi2-0 {
+ pins1 {
+ pinmux = ,
/* SPI2_SCK */
+,
/* SPI2_NSS */
+;
/* SPI2_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <3>;
+ };
+ pins2 {
+ pinmux = ;
/* SPI2_MISO */
+ bias-disable;
+ };
+ };
+
stusb1600_pins_a: stusb1600-0 {
pins {
pinmux = ;
@@ -395,6 +430,34 @@
};
};
+ uart4_pins_b: uart4-1 {
+ pins1 {
+ pinmux = ;
/* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = ;
/* UART4_RX */
+ bias-disable;
+ };
+ };
+
+ uart7_pins_a: uart7-0 {
+ pins1 {
+ pinmux = ;
/* UART4_TX */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <0>;
+ };
+ pins2 {
+ pinmux = ,
/* UART4_RX */
+,
/* UART4_CTS */
+;
/* UART4_RTS */
+ bias-disable;
+ };
+ };
+
usbotg_hs_pins_a: usbotg_hs-0 {
pins {
pinmux = ; /* OTG_ID */
--
2.17.1
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[U-Boot] [PATCH 3/3] arm: mach-stm32mp: Add newline to the MAC error message
Without newline, the error message appears for non prgrammed OTP boards
looks messsy. Hence add it to look more clean.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm/mach-stm32mp/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index 7b4431c9c75..e1a0a136809 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -481,7 +481,7 @@ static int setup_mac_address(void)
enetaddr[i] = ((uint8_t *))[i];
if (!is_valid_ethaddr(enetaddr)) {
- pr_err("invalid MAC address in OTP %pM", enetaddr);
+ pr_err("invalid MAC address in OTP %pM\n", enetaddr);
return -EINVAL;
}
pr_debug("OTP MAC address = %pM\n", enetaddr);
--
2.17.1
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[U-Boot] [PATCH 0/3] Add Avenger96 board support
Hello, This patchset adds board support for Avenger96, a 96Boards Consumer Edition board from Arrow Electronics. This board is based on the STM32MP1 MPU and the board support is added under st boards since there are no significance changes required to boot u-boot on this board other than the dts. More information about this board can be found in 96Boards website: https://www.96boards.org/product/avenger96/ PS: I only managed to boot u-boot as SSBL with TF-A as FSBL. U-boot SPL way of booting is not working. Thanks, Mani Manivannan Sadhasivam (3): arm: dts: stm32mp157: Add missing pinctrl definitions board: stm32mp1: Add Avenger96 board support arm: mach-stm32mp: Add newline to the MAC error message arch/arm/dts/Makefile | 1 + arch/arm/dts/stm32mp157-pinctrl.dtsi | 63 +++ .../arm/dts/stm32mp157a-avenger96-u-boot.dtsi | 177 + arch/arm/dts/stm32mp157a-avenger96.dts| 362 ++ arch/arm/mach-stm32mp/cpu.c | 2 +- board/st/stm32mp1/README | 23 ++ 6 files changed, 627 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/stm32mp157a-avenger96-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-avenger96.dts -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] hikey: Take peripherals out of reset during board init
Hi Peter,
On Tue, Mar 19, 2019 at 11:29:01AM +, Peter Griffin wrote:
> Hi Mani,
>
> This looks like a bug in the Linux kernel. The kernel driver should be
> correctly
> handling the reset lines of the I2C or SPI peripheral rather than replying
> on
> the bootloader to have already taken it out of reset.
>
Correct. After sending this patch out, I sent a patchset to LKML [1] for fixing
the issue in Linux kernel (thanks to Daniel for suggesting the change). But,
we might need this hack in u-boot to make the old kernel/dts to work properly.
And that's the reason I didn't abandon this patch.
Thanks,
Mani
[1] https://lkml.org/lkml/2019/3/8/878
> Peter.
>
> On Fri, 8 Mar 2019 at 08:57, Manivannan Sadhasivam <
> manivannan.sadhasi...@linaro.org> wrote:
>
> > Peripherals like I2C and SPI needs to be taken out of reset during
> > board init for functioning properly. Hence, add `hi6220_periph_reset`
> > function for doing the same. For instance without this function, I2C
> > will fail like below while booting linux:
> >
> > [0.608033] i2c_designware f710.i2c: Unknown Synopsys component
> > type:
> > 0x
> > [0.621378] i2c_designware f7101000.i2c: Unknown Synopsys component
> > type:
> > 0x
> > [ 0.633818] i2c_designware f7102000.i2c: Unknown Synopsys component
> > type:
> > 0x
> >
> > Signed-off-by: Manivannan Sadhasivam
> > ---
> > board/hisilicon/hikey/hikey.c | 16
> > 1 file changed, 16 insertions(+)
> >
> > diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
> > index 940ae82c45b..f8b8c372bfd 100644
> > --- a/board/hisilicon/hikey/hikey.c
> > +++ b/board/hisilicon/hikey/hikey.c
> > @@ -364,6 +364,20 @@ static void hi6220_pmussi_init(void)
> > gpio_direction_output(0, 1);
> > }
> >
> > +static void hi6220_periph_reset(void)
> > +{
> > + u32 data, bits;
> > +
> > + /* Bring I2C0/I2C1/I2C2/SPI0 out of reset */
> > + bits = PERI_RST3_I2C0 | PERI_RST3_I2C1 | PERI_RST3_I2C2 |
> > PERI_RST3_SSP;
> > + writel(bits, _sc->rst3_dis);
> > +
> > + /* Wait until the peripherals are out of reset */
> > + do {
> > + data = readl(_sc->rst3_dis);
> > + } while (data & bits);
> > +}
> > +
> > int misc_init_r(void)
> > {
> > return 0;
> > @@ -371,6 +385,8 @@ int misc_init_r(void)
> >
> > int board_init(void)
> > {
> > + hi6220_periph_reset();
> > +
> > return 0;
> > }
> >
> > --
> > 2.17.1
> >
> >
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[U-Boot] [PATCH] hikey: Take peripherals out of reset during board init
Peripherals like I2C and SPI needs to be taken out of reset during
board init for functioning properly. Hence, add `hi6220_periph_reset`
function for doing the same. For instance without this function, I2C
will fail like below while booting linux:
[0.608033] i2c_designware f710.i2c: Unknown Synopsys component type:
0x
[0.621378] i2c_designware f7101000.i2c: Unknown Synopsys component type:
0x
[0.633818] i2c_designware f7102000.i2c: Unknown Synopsys component type:
0x
Signed-off-by: Manivannan Sadhasivam
---
board/hisilicon/hikey/hikey.c | 16
1 file changed, 16 insertions(+)
diff --git a/board/hisilicon/hikey/hikey.c b/board/hisilicon/hikey/hikey.c
index 940ae82c45b..f8b8c372bfd 100644
--- a/board/hisilicon/hikey/hikey.c
+++ b/board/hisilicon/hikey/hikey.c
@@ -364,6 +364,20 @@ static void hi6220_pmussi_init(void)
gpio_direction_output(0, 1);
}
+static void hi6220_periph_reset(void)
+{
+ u32 data, bits;
+
+ /* Bring I2C0/I2C1/I2C2/SPI0 out of reset */
+ bits = PERI_RST3_I2C0 | PERI_RST3_I2C1 | PERI_RST3_I2C2 | PERI_RST3_SSP;
+ writel(bits, _sc->rst3_dis);
+
+ /* Wait until the peripherals are out of reset */
+ do {
+ data = readl(_sc->rst3_dis);
+ } while (data & bits);
+}
+
int misc_init_r(void)
{
return 0;
@@ -371,6 +385,8 @@ int misc_init_r(void)
int board_init(void)
{
+ hi6220_periph_reset();
+
return 0;
}
--
2.17.1
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[U-Boot] [PATCH] hikey: Allow environment to store in eMMC and increase bootdelay
Current Hikey configuration allows us to store u-boot environment on uSD card. But this will be useless if uSD card is not inserted, hence use the onboard eMMC memory for storing environment at Boot1 partition. While we are at it, let's increase the boot delay to 10s also. Signed-off-by: Manivannan Sadhasivam --- configs/hikey_defconfig | 5 ++--- include/configs/hikey.h | 4 +++- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index e9a9857322b..659c0e3f8ae 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -15,9 +15,8 @@ CONFIG_CMD_MMC=y CONFIG_CMD_USB=y CONFIG_CMD_CACHE=y CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_INTERFACE="mmc" -CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_BOOTDELAY=10 CONFIG_DM_MMC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_K3=y diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 003cd75baf8..60c6bde16ea 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -81,8 +81,10 @@ "initrd_high=0x\0" \ BOOTENV -/* Preserve environment on sd card */ +/* Preserve environment on eMMC */ #define CONFIG_ENV_SIZE0x1000 +#define CONFIG_SYS_MMC_ENV_DEV 0 /* Use eMMC */ +#define CONFIG_SYS_MMC_ENV_PART2 /* Use Boot1 partition */ /* Monitor Command Prompt */ #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/9] arm: actions: Add common framework for Actions Semi SoCs
On Thu, Jan 17, 2019 at 09:16:26PM +, André Przywara wrote: > On Thu, 17 Jan 2019 21:09:45 +0530 > Manivannan Sadhasivam wrote: > > Hi, > > > [On top of Andre's review] > > > > On Mon, Jan 14, 2019 at 06:11:03PM +0530, Amit Singh Tomar wrote: > > > This adds common arch owl support that can drive, 64-bits SoCs > > > from Actions Semi. > > > > > > > Could be, "This commit adds common arch support for Actions Semi Owl > > series SoCs and removes the Bubblegum96 board files." > > > > > It also removes the Bubblegum specific board files. > > > > > > Signed-off-by: Amit Singh Tomar > > > --- > > > Changes since v1: > > > * Moved S700 specific changes to patch 4 of 9. > > > * Moved couple of symbols from defconfig to > > > arch/arm/Kconfig and platform owl Kconfig. > > > --- > > > arch/arm/Kconfig | 3 +- > > > arch/arm/mach-owl/Kconfig| 29 ++ > > > arch/arm/mach-owl/Makefile | 1 + > > > arch/arm/mach-owl/soc.c | 56 > > > > > > board/ucRobotics/bubblegum_96/Kconfig| 15 > > > board/ucRobotics/bubblegum_96/MAINTAINERS| 6 --- > > > board/ucRobotics/bubblegum_96/Makefile | 3 -- > > > board/ucRobotics/bubblegum_96/bubblegum_96.c | 56 > > > > > > configs/bubblegum_96_defconfig | 4 +- > > > include/configs/bubblegum_96.h | 42 > > > - include/configs/owl-common.h > > > | 42 + > > > include/configs/s900.h | 18 + 12 > > > files changed, 131 insertions(+), 144 deletions(-) create mode > > > 100644 arch/arm/mach-owl/soc.c delete mode 100644 > > > board/ucRobotics/bubblegum_96/Kconfig delete mode 100644 > > > board/ucRobotics/bubblegum_96/MAINTAINERS delete mode 100644 > > > board/ucRobotics/bubblegum_96/Makefile delete mode 100644 > > > board/ucRobotics/bubblegum_96/bubblegum_96.c delete mode 100644 > > > include/configs/bubblegum_96.h create mode 100644 > > > include/configs/owl-common.h create mode 100644 > > > include/configs/s900.h > > > > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > > > index d6b1629..1a2e561 100644 > > > --- a/arch/arm/Kconfig > > > +++ b/arch/arm/Kconfig > > > @@ -761,9 +761,9 @@ config ARCH_MX5 > > > > > > config ARCH_OWL > > > bool "Actions Semi OWL SoCs" > > > - select ARM64 > > > select DM > > > select DM_SERIAL > > > + select OWL_SERIAL > > > select OF_CONTROL > > > imply CMD_DM > > > > > > @@ -1555,7 +1555,6 @@ source "board/spear/spear600/Kconfig" > > > source "board/spear/x600/Kconfig" > > > source "board/st/stv0991/Kconfig" > > > source "board/tcl/sl50/Kconfig" > > > -source "board/ucRobotics/bubblegum_96/Kconfig" > > > source "board/birdland/bav335x/Kconfig" > > > source "board/toradex/colibri_pxa270/Kconfig" > > > source "board/vscom/baltos/Kconfig" > > > diff --git a/arch/arm/mach-owl/Kconfig b/arch/arm/mach-owl/Kconfig > > > index 199e772..5eb93c9 100644 > > > --- a/arch/arm/mach-owl/Kconfig > > > +++ b/arch/arm/mach-owl/Kconfig > > > @@ -1,27 +1,22 @@ > > > if ARCH_OWL > > > > > > -config SYS_SOC > > > - default "owl" > > > - > > > choice > > > -prompt "Actions Semi OWL SoCs board select" > > > +prompt "Actions Semi SoC Variant" > > > > We should explicitly say "Owl" series SoCs here. > > > > > optional > > > > > > -config TARGET_BUBBLEGUM_96 > > > - bool "96Boards Bubblegum-96" > > > - help > > > - Support for 96Boards Bubblegum-96. This board complies > > > with > > > - 96Board Consumer Edition Specification. Features: > > > - - Actions Semi S900 SoC (4xCortex A53, Power VR G6230 > > > GPU) > > > - - 2GiB RAM > > > - - 8GiB eMMC, uSD slot > > > - - WiFi, Bluetooth and GPS module > > > - - 2x Host, 1x Device USB port > > > - - HDMI > > > - - 20-pin low speed and 40-pin high speed exp
