Re: [U-Boot] MIPS (mt7688): EBase change in U-Boot breaks Linux

2018-12-14 Thread Paul Burton
Hi Stefan,

On Fri, Dec 14, 2018 at 07:56:59AM +0100, Stefan Roese wrote:
> So how to proceed? Should I enable CONFIG_CPU_MIPSR2_IRQ_VI or #define
> "cpu_has_veic" to 1 as Lantiq does?

...and on that point in particular, it really depends on your hardware.

You shouldn't need to do either of those things just to avoid this bug,
but if your hardware actually supports VI or EIC then it may be
beneficial to enable them.

Thanks,
Paul
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Re: [U-Boot] MIPS (mt7688): EBase change in U-Boot breaks Linux

2018-12-14 Thread Paul Burton
Hi Stefan,

On Fri, Dec 14, 2018 at 07:56:59AM +0100, Stefan Roese wrote:
> > Does this Linux patch help by any chance?
> > 
> > https://git.linux-mips.org/cgit/linux-mti.git/commit/?h=eng-v4.20=39e4d339a4540b66e9d9a8ea0da9ee41a21473b4
> > 
> > I'm not sure I remember why I didn't get that upstreamed yet, I probably
> > wanted to research what other systems were doing... Speaking for Malta,
> > the kernel's board support has reserved the start of kseg0 for longer
> > than I've been involved.
> 
> No, this patch does not solve this issue (bootup still hangs or crashes
> while mounting the rootfs). I can only assume that its too late to try
> to reserve this memory region as the memblock_reserve() call returns 0
> (no error).

Hmm, OK. Do you know what is getting overwritten? Is it part of the
kernel binary itself?

> > An alternative would be for Linux to allocate a page for use with the
> > exception vectors using memblock, and ignore the EBase value U-Boot left
> > us with. But just marking the area U-Boot used as reserved ought to do
> > the trick, and has the advantage of ensuring U-Boot's vectors don't get
> > overwritten before Linux sets up its own which sometimes allows U-Boot
> > to provide some useful output.
> 
> I agree that re-using the U-Boot value would be optimal for boot-time
> error printing. But this does not seem to work on our platform AFAICT.
> So how to proceed? Should I enable CONFIG_CPU_MIPSR2_IRQ_VI or #define
> "cpu_has_veic" to 1 as Lantiq does?

I think the answer to the question above will be helpful - if it's the
kernel binary itself getting overwritten then we have 2 options:

  1) Move the kernel, ie. change load-y in arch/mips/ralink/Platform.

  2) Have Linux recognize that the address in EBase is unsuitable &
 allocate a new page.

Or perhaps even both - having Linux recognize & avoid the problem seems
good for robustness, but if the kernel binary is overwriting the
exception vectors it might be useful to move the kernel anyway so that
we don't prevent U-Boot's vectors from working in between loading the
kernel & booting it.

If it's not the kernel binary overwriting the vectors & then being
overwritten, then I'd be interested in knowing what is in that memory.
We shouldn't have allocated much of anything this early, but a possible
fix might be to reserve the page EBase resides in from bootmem_init().

Thanks,
Paul
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Re: [U-Boot] MIPS (mt7688): EBase change in U-Boot breaks Linux

2018-12-13 Thread Paul Burton
Hello,

On Thu, Dec 13, 2018 at 03:23:39PM +0100, Daniel Schwierzeck wrote:
> >  Finally I found that this line in U-Boot makes Linux break:
> > 
> >  arch/mips/lib/traps.c:
> > 
> >  void trap_init(ulong reloc_addr)
> >    unsigned long ebase = gd->irq_sp;
> >    ...
> >    write_c0_ebase(ebase);
> > 
> >  This sets EBase to something like 0x87e9b000 on my system (128MiB).
> >  And Linux then re-uses this value and copies the exceptions handlers
> >  to this address, overwriting random code and leading to an unstable
> >  system.
> > 
> >  So my questions now is, how should this be handled on the MT7688
> >  platform instead? One way would be to set EBase back to the
> >  original value (0x8000) before booting into Linux. Another
> >  solution would be to add some Linux code like board_ebase_setup()
> >  to the MT7688 Linux port.
>%
> > > I could also prepare a U-Boot patch to restore the original ebase value 
> > > before
> > > handing the control over to the OS.
> >
> > I'm not so sure, if overwriting 0x8000 (default value of EBase on
> > this SoC) with the exception handler is allowed. Is this address "zero"
> > handled somewhat specific in MIPS Linux? AFAICT, the complete DDR
> > area on my platform (0x8000. - 0x87ff.) is available for Linux.
> > So allocating some memory for this exception handler seems the right
> > way to go to me.
> 
> maybe that's why some platforms define a load address of 0x80002000 or similar
> to protect this area somehow.

Does this Linux patch help by any chance?

https://git.linux-mips.org/cgit/linux-mti.git/commit/?h=eng-v4.20=39e4d339a4540b66e9d9a8ea0da9ee41a21473b4

I'm not sure I remember why I didn't get that upstreamed yet, I probably
wanted to research what other systems were doing... Speaking for Malta,
the kernel's board support has reserved the start of kseg0 for longer
than I've been involved.

An alternative would be for Linux to allocate a page for use with the
exception vectors using memblock, and ignore the EBase value U-Boot left
us with. But just marking the area U-Boot used as reserved ought to do
the trick, and has the advantage of ensuring U-Boot's vectors don't get
overwritten before Linux sets up its own which sometimes allows U-Boot
to provide some useful output.

Thanks,
Paul
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Re: [U-Boot] [PATCH 0/6] Add support for MIPS Creator CI20

2018-12-10 Thread Paul Burton
Hi Ezequiel,

On Mon, Dec 10, 2018 at 06:31:29PM -0300, Ezequiel Garcia wrote:
> On Mon, 2018-12-10 at 22:00 +0100, Andreas Färber wrote:
> > Am 10.12.18 um 21:35 schrieb Ezequiel Garcia:
> > > Please note that I've added Paul's SOB to all the patches
> > > he authored, to make the authorship chain more clear.
> > 
> > That's only permitted if Paul agreed to that beforehand - did he?
> > Never add other people's Signed-off-by if their patches didn't have it!
> > 
> 
> Fair enough. Let's hope Paul is OK with this. I wasn't really comfortable
> not having Paul's SOB, given he authored all the patches.
> 
> Paul, do we have green light?

I'm OK with it in this instance, though please feel free to take
authorship if you make significant changes. I've not had the time to do
this work myself but I certainly don't want to stand in the way of
others :)

It's worth noting though that paul.bur...@imgtec.com is no longer a
valid email address, so it might be worth updating to
paul.bur...@mips.com wherever my email address appears.

Thanks,
Paul
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Re: [U-Boot] [PATCH] boston: Ensure DDR address calcuations don't overflow

2018-01-22 Thread Paul Burton
Hi Daniel,

On Fri, Jan 19, 2018 at 12:31:25PM +0100, Daniel Schwierzeck wrote:
> On 18.01.2018 22:19, Paul Burton wrote:
> > When constraining the highest DDR address that U-Boot will use for its
> > data & relocated self, we need to handle the common case in which a 32
> > bit system with 2GB DDR will have a zero gd->ram_top, due to the
> > addition of 2GB (0x8000) to the base address of kseg0 (also
> > 0x8000) which overflows & wraps to 0.
> > 
> > We originally had a check for this case, but it was lost in commit
> > 78edb25729ce ("boston: Provide physical CONFIG_SYS_SDRAM_BASE") causing
> > problems for the affected 32 bit systems.
> 
> I think I did a wrong conflict resolution because the patch didn't apply
> anymore. I folded this patch into "boston: Provide physical
> CONFIG_SYS_SDRAM_BASE" to fix this. Actually I wanted to resend the
> updated patches. But if you are okay with the current state in
> u-boot-mips/next branch, I'll take them as they are.
> 
> BTW: could you resend your series "boston: Ethernet support for MIPS
> Boston board"? I still have no Acks or Reviews on the generic DM parts.
> Thanks.

When I last fetched from u-boot-mips.git I saw patches up to
564cc3a11c45 ("mips: Remove virt_to_phys call on bi_memstart") in the
next branch, which I have then rebased my ethernet patches atop with the
result working fine on a real Boston board.

I see that next now contains only 2 patches up to d2a4e3664150 ("mips:
bmips: increment SYS_MALLOC_F_LEN") and has dropped the patches
switching to a physical CONFIG_SYS_SDRAM_BASE. Would you like me to
rebase those plus the Boston ethernet support atop the current next
branch?

Thanks,
Paul
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[U-Boot] [PATCH] boston: Pad binary in .mcs to a multiple of 16 bytes

2018-01-18 Thread Paul Burton
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the
final 0x00 byte which ends the .relocs section seems to be skipped &
left in flash as 0xff unless the data contained in the .mcs is padded
out to a 16 byte boundary. Without our final zero byte relocation will
fail with an error about a spurious reloc:

Avoid this problem by padding out the data in the .mcs file to a 16 byte
boundary using srec_cat's -range-pad functionality.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>

---

 board/imgtec/boston/config.mk | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/board/imgtec/boston/config.mk b/board/imgtec/boston/config.mk
index 2775727744..0ba8802da0 100644
--- a/board/imgtec/boston/config.mk
+++ b/board/imgtec/boston/config.mk
@@ -3,7 +3,10 @@
 #
 
 quiet_cmd_srec_cat = SRECCAT $@
-  cmd_srec_cat = srec_cat -output $@ -$2 $< -binary -offset $3
+  cmd_srec_cat = srec_cat -output $@ -$2 \
+   $< -binary \
+   -fill 0x00 -within $< -binary -range-pad 16 \
+   -offset $3
 
 u-boot.mcs: u-boot.bin
$(call cmd,srec_cat,intel,0x7c0)
-- 
2.15.1

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[U-Boot] [PATCH] boston: Ensure DDR address calcuations don't overflow

2018-01-18 Thread Paul Burton
When constraining the highest DDR address that U-Boot will use for its
data & relocated self, we need to handle the common case in which a 32
bit system with 2GB DDR will have a zero gd->ram_top, due to the
addition of 2GB (0x8000) to the base address of kseg0 (also
0x8000) which overflows & wraps to 0.

We originally had a check for this case, but it was lost in commit
78edb25729ce ("boston: Provide physical CONFIG_SYS_SDRAM_BASE") causing
problems for the affected 32 bit systems.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Fixes: 78edb25729ce ("boston: Provide physical CONFIG_SYS_SDRAM_BASE")
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>

---
Feel free to fold this into 78edb25729ce ("boston: Provide physical
CONFIG_SYS_SDRAM_BASE") if you prefer Daniel.

 board/imgtec/boston/ddr.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
index 00428496bd..892bb1754c 100644
--- a/board/imgtec/boston/ddr.c
+++ b/board/imgtec/boston/ddr.c
@@ -26,6 +26,15 @@ int dram_init(void)
 ulong board_get_usable_ram_top(ulong total_size)
 {
DECLARE_GLOBAL_DATA_PTR;
+   ulong max_top;
 
-   return min_t(ulong, gd->ram_top, (ulong)phys_to_virt(SZ_256M));
+   /* Limit memory use to the top of (c)kseg0 */
+   max_top = (ulong)phys_to_virt(SZ_256M);
+
+   if (gd->ram_top < (ulong)phys_to_virt(0)) {
+   /* >= 2GB RAM on a 32 bit system wrapped around to 0 */
+   return max_top;
+   }
+
+   return min_t(ulong, gd->ram_top, max_top);
 }
-- 
2.15.1

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[U-Boot] [PATCH v2] boston: Add u-boot.mcs make target

2017-11-21 Thread Paul Burton
U-Boot is generally flashed to a MIPS Boston development board by means
of a .mcs file which Xilinx Vivado software can write to the flash
present on the board. As such we'd generally want to produce an mcs file
when building U-Boot to target the Boston board. Introduce a make target
for u-boot.mcs which generates it using the srec_cat tool available from
the SRecord project, and build it by default when srec_cat is present.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

Changes in v2:
- Use try-run as suggested by Daniel.

 board/imgtec/boston/config.mk | 14 ++
 1 file changed, 14 insertions(+)
 create mode 100644 board/imgtec/boston/config.mk

diff --git a/board/imgtec/boston/config.mk b/board/imgtec/boston/config.mk
new file mode 100644
index 00..2775727744
--- /dev/null
+++ b/board/imgtec/boston/config.mk
@@ -0,0 +1,14 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+quiet_cmd_srec_cat = SRECCAT $@
+  cmd_srec_cat = srec_cat -output $@ -$2 $< -binary -offset $3
+
+u-boot.mcs: u-boot.bin
+   $(call cmd,srec_cat,intel,0x7c0)
+
+# if srec_cat is present build u-boot.mcs by default
+has_srec_cat = $(call try-run,srec_cat -VERSion,y,n)
+ALL-$(has_srec_cat) += u-boot.mcs
+CLEAN_FILES += u-boot.mcs
-- 
2.15.0

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[U-Boot] [PATCH] boston: Add u-boot.mcs make target

2017-11-21 Thread Paul Burton
U-Boot is generally flashed to a MIPS Boston development board by means
of a .mcs file which Xilinx Vivado software can write to the flash
present on the board. As such we'd generally want to produce an mcs file
when building U-Boot to target the Boston board. Introduce a make target
for u-boot.mcs which generates it using the srec_cat tool available from
the SRecord project, and build it by default when srec_cat is present.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

 board/imgtec/boston/config.mk | 15 +++
 1 file changed, 15 insertions(+)
 create mode 100644 board/imgtec/boston/config.mk

diff --git a/board/imgtec/boston/config.mk b/board/imgtec/boston/config.mk
new file mode 100644
index 00..782bd72aa5
--- /dev/null
+++ b/board/imgtec/boston/config.mk
@@ -0,0 +1,15 @@
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+quiet_cmd_srec_cat = SRECCAT $@
+  cmd_srec_cat = srec_cat -output $@ -$2 $< -binary -offset $3
+
+u-boot.mcs: u-boot.bin
+   $(call cmd,srec_cat,intel,0x7c0)
+
+# if srec_cat is present build u-boot.mcs by default
+ifneq ($(shell which srec_cat 2>/dev/null),)
+ALL-y += u-boot.mcs
+CLEAN_FILES += u-boot.mcs
+endif
-- 
2.15.0

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[U-Boot] [PATCH 7/8] net: pch_gbe: Use wait_for_bit() helper

2017-11-21 Thread Paul Burton
The pch_gbe driver has 4 paths which open-code the equivalent of
wait_for_bit(). Replace these with use of wait_for_bit() in order to
shorten the code & avoid duplication.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Joe Hershberger <joe.hershber...@ni.com>
Cc: u-boot@lists.denx.de
---

 drivers/net/pch_gbe.c | 67 ++-
 1 file changed, 18 insertions(+), 49 deletions(-)

diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index 351debbd9b..052650c036 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "pch_gbe.h"
 
 #if !defined(CONFIG_PHYLIB)
@@ -43,7 +44,6 @@ static void pch_gbe_mac_read(struct pch_gbe_regs *mac_regs, 
u8 *addr)
 static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, u8 *addr)
 {
u32 macid_hi, macid_lo;
-   ulong start;
 
macid_hi = addr[0] + (addr[1] << 8) + (addr[2] << 16) + (addr[3] << 24);
macid_lo = addr[4] + (addr[5] << 8);
@@ -52,15 +52,8 @@ static int pch_gbe_mac_write(struct pch_gbe_regs *mac_regs, 
u8 *addr)
writel(macid_lo, _regs->mac_adr[0].low);
writel(0xfffe, _regs->addr_mask);
 
-   start = get_timer(0);
-   while (get_timer(start) < PCH_GBE_TIMEOUT) {
-   if (!(readl(_regs->addr_mask) & PCH_GBE_BUSY))
-   return 0;
-
-   udelay(10);
-   }
-
-   return -ETIME;
+   return wait_for_bit(__func__, _regs->addr_mask, PCH_GBE_BUSY,
+   false, PCH_GBE_TIMEOUT, false);
 }
 
 static int pch_gbe_reset(struct udevice *dev)
@@ -68,7 +61,7 @@ static int pch_gbe_reset(struct udevice *dev)
struct pch_gbe_priv *priv = dev_get_priv(dev);
struct eth_pdata *plat = dev_get_platdata(dev);
struct pch_gbe_regs *mac_regs = priv->mac_regs;
-   ulong start;
+   int err;
 
priv->rx_idx = 0;
priv->tx_idx = 0;
@@ -99,22 +92,17 @@ static int pch_gbe_reset(struct udevice *dev)
writel(PCH_GBE_RGMII_MODE_RGMII | PCH_GBE_CHIP_TYPE_INTERNAL,
   _regs->rgmii_ctrl);
 
-   start = get_timer(0);
-   while (get_timer(start) < PCH_GBE_TIMEOUT) {
-   if (!(readl(_regs->reset) & PCH_GBE_ALL_RST)) {
-   /*
-* Soft reset clears hardware MAC address registers,
-* so we have to reload MAC address here in order to
-* make linux pch_gbe driver happy.
-*/
-   return pch_gbe_mac_write(mac_regs, plat->enetaddr);
-   }
-
-   udelay(10);
-   }
+   err = wait_for_bit(__func__, _regs->reset, PCH_GBE_ALL_RST,
+  false, PCH_GBE_TIMEOUT, false);
+   if (err)
+   return err;
 
-   debug("pch_gbe: reset timeout\n");
-   return -ETIME;
+   /*
+* Soft reset clears hardware MAC address registers,
+* so we have to reload MAC address here in order to
+* make linux pch_gbe driver happy.
+*/
+   return pch_gbe_mac_write(mac_regs, plat->enetaddr);
 }
 
 static void pch_gbe_rx_descs_init(struct udevice *dev)
@@ -255,8 +243,6 @@ static int pch_gbe_send(struct udevice *dev, void *packet, 
int length)
struct pch_gbe_regs *mac_regs = priv->mac_regs;
struct pch_gbe_tx_desc *tx_head, *tx_desc;
u16 frame_ctrl = 0;
-   u32 int_st;
-   ulong start;
 
flush_dcache_range((ulong)packet, (ulong)packet + length);
 
@@ -282,17 +268,8 @@ static int pch_gbe_send(struct udevice *dev, void *packet, 
int length)
writel(dm_pci_virt_to_mem(priv->dev, tx_head + priv->tx_idx),
   _regs->tx_dsc_sw_p);
 
-   start = get_timer(0);
-   while (get_timer(start) < PCH_GBE_TIMEOUT) {
-   int_st = readl(_regs->int_st);
-   if (int_st & PCH_GBE_INT_TX_CMPLT)
-   return 0;
-
-   udelay(10);
-   }
-
-   debug("pch_gbe: sent failed\n");
-   return -ETIME;
+   return wait_for_bit(__func__, _regs->int_st, PCH_GBE_INT_TX_CMPLT,
+   true, PCH_GBE_TIMEOUT, false);
 }
 
 static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp)
@@ -345,16 +322,8 @@ static int pch_gbe_free_pkt(struct udevice *dev, uchar 
*packet, int length)
 
 static int pch_gbe_mdio_ready(struct pch_gbe_regs *mac_regs)
 {
-   ulong start = get_timer(0);
-
-   while (get_timer(start) < PCH_GBE_TIMEOUT) {
-   if (readl(_regs->miim) & PCH_GBE_MIIM_OPER_READY)
-   return 0;
-
-   udelay(10);
-   }
-
-   return -ETIME;
+   return wait_for_bit(__func__, 

[U-Boot] [PATCH 8/8] boston: Enable ethernet PHY, reset GPIO, device probe

2017-11-21 Thread Paul Burton
Add compatible strings for the PCIe bridges & EG20T ethernet controller
such that the devices are probed during boot, without the user needing
to manually cause that to happen by running "pci enum" after boot. This
allows for use of the ethernet controller without the manual PCI
enumeration step.

We also enable the EG20T GPIO driver to provide the PHY reset GPIO, and
support for the Realtek RTL8211E PHY used on the Boston board in order
to make ethernet usable.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de

---

 arch/mips/Kconfig  | 1 +
 arch/mips/dts/img,boston.dts   | 8 
 configs/boston32r2_defconfig   | 1 +
 configs/boston32r2el_defconfig | 1 +
 configs/boston64r2_defconfig   | 1 +
 configs/boston64r2el_defconfig | 1 +
 include/configs/boston.h   | 5 +
 7 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d07b92d1b4..a05c65c507 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -92,6 +92,7 @@ config MACH_PIC32
 config TARGET_BOSTON
bool "Support Boston"
select DM
+   select DM_GPIO
select DM_SERIAL
select OF_CONTROL
select MIPS_CM
diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts
index 1d4eeda4e8..78a24dc4a4 100644
--- a/arch/mips/dts/img,boston.dts
+++ b/arch/mips/dts/img,boston.dts
@@ -130,7 +130,7 @@
};
 
pci2_root@0,0,0 {
-   compatible = "pci10ee,7021";
+   compatible = "pci10ee,7021", "pci-bridge";
reg = <0x 0 0 0 0>;
 
#address-cells = <3>;
@@ -138,7 +138,7 @@
#interrupt-cells = <1>;
 
eg20t_bridge@1,0,0 {
-   compatible = "pci8086,8800";
+   compatible = "pci8086,8800", "pci-bridge";
reg = <0x0001 0 0 0 0>;
 
#address-cells = <3>;
@@ -146,13 +146,13 @@
#interrupt-cells = <1>;
 
eg20t_mac@2,0,1 {
-   compatible = "pci8086,8802";
+   compatible = "pci8086,8802", 
"intel,pch-gbe";
reg = <0x00020100 0 0 0 0>;
phy-reset-gpios = <_gpio 6 
GPIO_ACTIVE_LOW>;
};
 
eg20t_gpio: eg20t_gpio@2,0,2 {
-   compatible = "pci8086,8803";
+   compatible = "pci8086,8803", 
"intel,eg20t-gpio";
reg = <0x00020200 0 0 0 0>;
 
gpio-controller;
diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index 1d21f1643c..3876672ce9 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -28,6 +28,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index d26adc68f2..715d02a2b9 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -29,6 +29,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index 1491575af5..ba69f5b45f 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -29,6 +29,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index 933b5bfc48..465abbd570 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -30,6 +30,7 @@ CONFIG_OF_EMBED=y
 CONFIG_ENV_IS_IN_FLASH=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_CLK=y
+CONFIG_EG20T_GPIO=y
 CONFIG_MTD=y
 CONFIG_MTD_NOR_FLASH=y
 CONFIG_CFI_FLASH=y
diff --git a/include/configs/boston.h b/include/configs/boston.h
index ee4e4a37ea..2ddd1ae6ad 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -69,4 +69,9 @@
(0xb800 + (128 << 20) - CONFIG_ENV_SIZE)
 #endif
 
+/*
+ * Ethernet
+ */
+#define CONFIG_PHY_REALTEK
+
 #endif /* __CONFIGS_BOSTON_H__ */
-- 
2.15.0

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[U-Boot] [PATCH] boston: Set CONFIG_SYS_LOAD_ADDR to 0x88000000

2017-11-21 Thread Paul Burton
Generally we load Linux kernels on Boston boards in the form of FIT
images containing a compressed kernel binary. Linux is linked at
0x8010 and so we need to decompress the kernel binary to that
address, however this is our default load address which means that
unless explicitly avoided we hit a decompression error as the
uncompressed kernel binary overwrites its compressed version from the
FIT image.

Avoid this by adjusting CONFIG_SYS_LOAD_ADDR to 0x8800 (or
0x8800 for MIPS64 builds) which avoids the address overlap
between compressed & uncompressed kernel binaries.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

 include/configs/boston.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/boston.h b/include/configs/boston.h
index ee4e4a37ea..fdd5ef5632 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -34,7 +34,7 @@
 
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE
 
-#define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 0x10)
+#define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 0x0800)
 
 #define CONFIG_SYS_MEMTEST_START   (CONFIG_SYS_SDRAM_BASE + 0)
 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
-- 
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[U-Boot] [PATCH 2/8] boston: Disable PCI bridge memory space alignment

2017-11-21 Thread Paul Burton
On the MIPS Boston development board we have an Intel EG20T Platform
Controller Hub connected to a Xilinx AXI to PCIe root port which is only
assigned a 1MB memory region. The Intel EG20T contains a bridge device
beneath which all of its peripheral devices can be found, and that
bridge device contains a ROM. If we align to 1MB when we encounter each
bridge device we therefore do something like this:

  - Start with bus_lower at 0x1600.

  - Find the Xilinx root bridge, which has no visible BARs so we do very
little to it.

  - Probe the bus beneath the Xilinx bridge device, aligning bus_lower
to a 1MB boundary first. That leaves it still at 0x1600.

  - Find the EG20T bridge device, which we find has a 64KiB ROM. We
assign it the address range 0x1600-0x1600 which leaves
bus_lower at 0x1601.

  - Probe the bus beneath the EG20T bridge device, aligning bus_lower to
a 1MB boundary first. This leaves bus_lower at 0x1610, which is
the end of the available memory space.

  - Find the various peripheral devices the EG20T contains, but fail to
assign any memory space to them since bus_lower is at the end of the
memory space available to the PCI bus.

Fix this by disabling that 1MB alignment, which allows all of the EG20T
peripheral devices to be assigned memory space within the 1MB region
available.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Paul Burton <paul.bur...@mips.com>
---

 configs/boston32r2_defconfig   | 1 +
 configs/boston32r2el_defconfig | 1 +
 configs/boston64r2_defconfig   | 1 +
 configs/boston64r2el_defconfig | 1 +
 4 files changed, 4 insertions(+)

diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig
index b8c87caaf8..1d21f1643c 100644
--- a/configs/boston32r2_defconfig
+++ b/configs/boston32r2_defconfig
@@ -35,6 +35,7 @@ CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN=0x0
 CONFIG_PCI_XILINX=y
 CONFIG_SYS_NS16550=y
 CONFIG_LZ4=y
diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig
index 5cc43880a3..d26adc68f2 100644
--- a/configs/boston32r2el_defconfig
+++ b/configs/boston32r2el_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN=0x0
 CONFIG_PCI_XILINX=y
 CONFIG_SYS_NS16550=y
 CONFIG_LZ4=y
diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig
index c30e0b0903..1491575af5 100644
--- a/configs/boston64r2_defconfig
+++ b/configs/boston64r2_defconfig
@@ -36,6 +36,7 @@ CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN=0x0
 CONFIG_PCI_XILINX=y
 CONFIG_SYS_NS16550=y
 CONFIG_LZ4=y
diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig
index b9506ccb7b..933b5bfc48 100644
--- a/configs/boston64r2el_defconfig
+++ b/configs/boston64r2el_defconfig
@@ -37,6 +37,7 @@ CONFIG_DM_ETH=y
 CONFIG_PCH_GBE=y
 CONFIG_PCI=y
 CONFIG_DM_PCI=y
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN=0x0
 CONFIG_PCI_XILINX=y
 CONFIG_SYS_NS16550=y
 CONFIG_LZ4=y
-- 
2.15.0

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[U-Boot] [PATCH 4/8] gpio: Provide dummy get/request & is_valid functions

2017-11-21 Thread Paul Burton
Allow for drivers to make use of driver model GPIOs when they're enabled
& available without needing to #ifdef on CONFIG_DM_GPIO by providing
dummy functions covering GPIO requests. Each will simply return -ENODEV
or -EINVAL, depending upon which the real implementation returns when a
GPIO isn't found. Only the driver model versions of the GPIO request
functions are covered & dm_gpio_request is excluded since it's
documented as only being of use for debugging, so drivers shouldn't be
calling it anyway.

Also provide a dummy dm_gpio_is_valid, with the idea that all other GPIO
functions called would be within an if (dm_gpio_is_valid(...)) statement
and have been optimised out in cases where that returns a compile-time
constant false.

This parallels the clock API, keeping the #ifdefs & checks in a single
location allowing drivers or other code to use GPIOs without needing to
perform such checks themselves.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Paul Burton <paul.bur...@mips.com>
---

 include/asm-generic/gpio.h | 38 ++
 1 file changed, 38 insertions(+)

diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
index bf230c15ba..7f1f9031ff 100644
--- a/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@ -139,6 +139,9 @@ struct gpio_desc {
  */
 static inline bool dm_gpio_is_valid(const struct gpio_desc *desc)
 {
+   if (!IS_ENABLED(CONFIG_DM_GPIO))
+   return false;
+
return desc->dev != NULL;
 }
 
@@ -346,7 +349,14 @@ const char *gpio_get_bank_info(struct udevice *dev, int 
*offset_count);
  * @desc:  Returns description, on success
  * @return 0 if OK, -ve on error
  */
+#ifdef CONFIG_DM_GPIO
 int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc);
+#else
+static inline int dm_gpio_lookup_name(const char *name, struct gpio_desc *desc)
+{
+   return -EINVAL;
+}
+#endif
 
 /**
  * gpio_lookup_name - Look up a GPIO name and return its details
@@ -359,8 +369,17 @@ int dm_gpio_lookup_name(const char *name, struct gpio_desc 
*desc);
  * @offsetp: Returns the offset number within this device
  * @gpiop: Returns the absolute GPIO number, numbered from 0
  */
+#ifdef CONFIG_DM_GPIO
 int gpio_lookup_name(const char *name, struct udevice **devp,
 unsigned int *offsetp, unsigned int *gpiop);
+#else
+static inline int
+gpio_lookup_name(const char *name, struct udevice **devp,
+unsigned int *offsetp, unsigned int *gpiop)
+{
+   return -EINVAL;
+}
+#endif
 
 /**
  * gpio_get_values_as_int() - Turn the values of a list of GPIOs into an int
@@ -431,8 +450,17 @@ int gpio_claim_vector(const int *gpio_num_array, const 
char *fmt);
  * something wrong with the list, or other -ve for another error (e.g.
  * -EBUSY if a GPIO was already requested)
  */
+#ifdef CONFIG_DM_GPIO
 int gpio_request_by_name(struct udevice *dev, const char *list_name,
 int index, struct gpio_desc *desc, int flags);
+#else
+static inline int
+gpio_request_by_name(struct udevice *dev, const char *list_name,
+int index, struct gpio_desc *desc, int flags)
+{
+   return -ENOENT;
+}
+#endif
 
 /**
  * gpio_request_list_by_name() - Request a list of GPIOs
@@ -455,9 +483,19 @@ int gpio_request_by_name(struct udevice *dev, const char 
*list_name,
  * @flags: Indicates the GPIO input/output settings (GPIOD_...)
  * @return number of GPIOs requested, or -ve on error
  */
+#ifdef CONFIG_DM_GPIO
 int gpio_request_list_by_name(struct udevice *dev, const char *list_name,
  struct gpio_desc *desc_list, int max_count,
  int flags);
+#else
+static inline int
+gpio_request_list_by_name(struct udevice *dev, const char *list_name,
+ struct gpio_desc *desc_list, int max_count,
+ int flags)
+{
+   return -ENOENT;
+}
+#endif
 
 /**
  * dm_gpio_request() - manually request a GPIO
-- 
2.15.0

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[U-Boot] [PATCH 6/8] net: pch_gbe: Support PHY reset GPIOs

2017-11-21 Thread Paul Burton
Add support to the pch_gbe driver for resetting the PHY using a GPIO
specified in the device tree. This matches the support already in Linux.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Joe Hershberger <joe.hershber...@ni.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Paul Burton <paul.bur...@mips.com>
---

 drivers/net/pch_gbe.c | 29 +++--
 drivers/net/pch_gbe.h |  1 +
 2 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c
index 8866f6632f..351debbd9b 100644
--- a/drivers/net/pch_gbe.c
+++ b/drivers/net/pch_gbe.c
@@ -12,6 +12,7 @@
 #include 
 #include 
 #include 
+#include 
 #include "pch_gbe.h"
 
 #if !defined(CONFIG_PHYLIB)
@@ -72,6 +73,14 @@ static int pch_gbe_reset(struct udevice *dev)
priv->rx_idx = 0;
priv->tx_idx = 0;
 
+   if (dm_gpio_is_valid(>gpio_phy_reset)) {
+   /* Reset the PHY */
+   dm_gpio_set_value(>gpio_phy_reset, 1);
+   mdelay(15);
+   dm_gpio_set_value(>gpio_phy_reset, 0);
+   mdelay(5);
+   }
+
writel(PCH_GBE_ALL_RST, _regs->reset);
 
/*
@@ -451,6 +460,11 @@ int pch_gbe_probe(struct udevice *dev)
plat->iobase = (ulong)iobase;
priv->mac_regs = (struct pch_gbe_regs *)iobase;
 
+   err = gpio_request_by_name(dev, "phy-reset-gpios", 0,
+  >gpio_phy_reset, GPIOD_IS_OUT);
+   if (err && (err != -ENOENT))
+   return err;
+
/* Read MAC address from SROM and initialize dev->enetaddr with it */
pch_gbe_mac_read(priv->mac_regs, plat->enetaddr);
 
@@ -460,9 +474,17 @@ int pch_gbe_probe(struct udevice *dev)
 
err = pch_gbe_reset(dev);
if (err)
-   return err;
+   goto out_err;
 
-   return pch_gbe_phy_init(dev);
+   err = pch_gbe_phy_init(dev);
+   if (err)
+   goto out_err;
+
+   return 0;
+out_err:
+   if (dm_gpio_is_valid(>gpio_phy_reset))
+   dm_gpio_free(dev, >gpio_phy_reset);
+   return err;
 }
 
 int pch_gbe_remove(struct udevice *dev)
@@ -473,6 +495,9 @@ int pch_gbe_remove(struct udevice *dev)
mdio_unregister(priv->bus);
mdio_free(priv->bus);
 
+   if (dm_gpio_is_valid(>gpio_phy_reset))
+   dm_gpio_free(dev, >gpio_phy_reset);
+
return 0;
 }
 
diff --git a/drivers/net/pch_gbe.h b/drivers/net/pch_gbe.h
index 0ea0c73a4f..1d13380837 100644
--- a/drivers/net/pch_gbe.h
+++ b/drivers/net/pch_gbe.h
@@ -293,6 +293,7 @@ struct pch_gbe_priv {
struct udevice *dev;
int rx_idx;
int tx_idx;
+   struct gpio_desc gpio_phy_reset;
 };
 
 #endif /* _PCH_GBE_H_ */
-- 
2.15.0

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[U-Boot] [PATCH 3/8] pci: xilinx: Initialise the root bridge during probe

2017-11-21 Thread Paul Burton
Whilst the pcie_xilinx driver was sufficient to run under QEMU, it was
failing on FPGA because it wasn't configuring the root bridge, and
access from the PCI auto-configuration code to subordinate busses would
lead to data bus errors. Fix this by configuring the root bridge to
allow access to all possible subordinate busses based upon the size of
the ECAM region, and disable interrupts since U-Boot isn't using them.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Paul Burton <paul.bur...@mips.com>
---

 drivers/pci/pcie_xilinx.c | 36 ++--
 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c
index 57112f5333..877087d4f1 100644
--- a/drivers/pci/pcie_xilinx.c
+++ b/drivers/pci/pcie_xilinx.c
@@ -21,8 +21,14 @@ struct xilinx_pcie {
 };
 
 /* Register definitions */
-#define XILINX_PCIE_REG_PSCR   0x144
-#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11)
+#define XILINX_PCIE_REG_BRIDGE_INFO0x130
+#define  XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_SHIFT  16
+#define  XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_MASK   (0x7 << 16)
+#define XILINX_PCIE_REG_INT_MASK   0x13c
+#define XILINX_PCIE_REG_PSCR   0x144
+#define  XILINX_PCIE_REG_PSCR_LNKUPBIT(11)
+#define XILINX_PCIE_REG_RPSC   0x148
+#define  XILINX_PCIE_REG_RPSC_BRIDGEEN BIT(0)
 
 /**
  * pcie_xilinx_link_up() - Check whether the PCIe link is up
@@ -159,6 +165,31 @@ static int pcie_xilinx_ofdata_to_platdata(struct udevice 
*dev)
return 0;
 }
 
+static int pcie_xilinx_probe(struct udevice *dev)
+{
+   struct xilinx_pcie *pcie = dev_get_priv(dev);
+   u32 bridge_info, ecam_sz, rpsc;
+
+   /* Disable all interrupts */
+   writel(0, pcie->cfg_base + XILINX_PCIE_REG_INT_MASK);
+
+   /* Enable the bridge */
+   rpsc = readl(pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+   rpsc |= XILINX_PCIE_REG_RPSC_BRIDGEEN;
+   writel(rpsc, pcie->cfg_base + XILINX_PCIE_REG_RPSC);
+
+   /* Discover the size of the ECAM region */
+   bridge_info = readl(pcie->cfg_base + XILINX_PCIE_REG_BRIDGE_INFO);
+   ecam_sz = bridge_info & XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_MASK;
+   ecam_sz >>= XILINX_PCIE_REG_BRIDGE_INFO_ECAMSZ_SHIFT;
+
+   /* Enable access to all possible subordinate buses */
+   writel((0 << 0) | (1 << 8) | (GENMASK(ecam_sz - 1, 0) << 16),
+  pcie->cfg_base + PCI_PRIMARY_BUS);
+
+   return 0;
+}
+
 static const struct dm_pci_ops pcie_xilinx_ops = {
.read_config= pcie_xilinx_read_config,
.write_config   = pcie_xilinx_write_config,
@@ -175,5 +206,6 @@ U_BOOT_DRIVER(pcie_xilinx) = {
.of_match   = pcie_xilinx_ids,
.ops= _xilinx_ops,
.ofdata_to_platdata = pcie_xilinx_ofdata_to_platdata,
+   .probe  = pcie_xilinx_probe,
.priv_auto_alloc_size   = sizeof(struct xilinx_pcie),
 };
-- 
2.15.0

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[U-Boot] [PATCH 5/8] gpio: eg20t: Add driver for Intel EG20T GPIO controllers

2017-11-21 Thread Paul Burton
Add a driver for the GPIO controller found in the Intel EG20T Platform
Controller Hub. This is used on the MIPS Boston development board to
provide GPIOs including ethernet PHY reset.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Paul Burton <paul.bur...@mips.com>
---

 drivers/gpio/Kconfig  |   8 +++
 drivers/gpio/Makefile |   1 +
 drivers/gpio/eg20t-gpio.c | 139 ++
 3 files changed, 148 insertions(+)
 create mode 100644 drivers/gpio/eg20t-gpio.c

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 6240c39539..ac7c911951 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -294,4 +294,12 @@ config MPC85XX_GPIO
 
  The driver has been tested on MPC85XX, but it is likely that other
  PowerQUICC III devices will work as well.
+
+config EG20T_GPIO
+   bool "Intel EG20T GPIO driver"
+   depends on DM_GPIO && DM_PCI
+   help
+ Enable this to support the GPIO controller found in the Intel EG20T
+ Platform Controller Hub.
+
 endmenu
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 81f55a576b..150c7b3eb5 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -60,3 +60,4 @@ obj-$(CONFIG_MVEBU_GPIO)  += mvebu_gpio.o
 obj-$(CONFIG_MSM_GPIO) += msm_gpio.o
 obj-$(CONFIG_$(SPL_)PCF8575_GPIO)  += pcf8575_gpio.o
 obj-$(CONFIG_PM8916_GPIO)  += pm8916_gpio.o
+obj-$(CONFIG_EG20T_GPIO)   += eg20t-gpio.o
diff --git a/drivers/gpio/eg20t-gpio.c b/drivers/gpio/eg20t-gpio.c
new file mode 100644
index 00..958541689a
--- /dev/null
+++ b/drivers/gpio/eg20t-gpio.c
@@ -0,0 +1,139 @@
+/*
+ * Copyright (C) 2016 Imagination Technologies
+ *
+ * SPDX-License-Identifier:GPL-2.0
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+enum {
+   REG_IEN = 0x00,
+   REG_ISTATUS = 0x04,
+   REG_IDISP   = 0x08,
+   REG_ICLR= 0x0c,
+   REG_IMASK   = 0x10,
+   REG_IMASKCLR= 0x14,
+   REG_PO  = 0x18,
+   REG_PI  = 0x1c,
+   REG_PM  = 0x20,
+};
+
+struct eg20t_gpio_priv {
+   void *base;
+};
+
+static int eg20t_gpio_get_value(struct udevice *dev, unsigned int offset)
+{
+   struct eg20t_gpio_priv *priv = dev_get_priv(dev);
+   u32 pm, pval;
+
+   pm = readl(priv->base + REG_PM);
+   if ((pm >> offset) & 0x1)
+   pval = readl(priv->base + REG_PO);
+   else
+   pval = readl(priv->base + REG_PI);
+
+   return (pval >> offset) & 0x1;
+}
+
+static int eg20t_gpio_set_value(struct udevice *dev, unsigned int offset,
+   int value)
+{
+   struct eg20t_gpio_priv *priv = dev_get_priv(dev);
+   u32 po;
+
+   po = readl(priv->base + REG_PO);
+   if (value)
+   po |= 1 << offset;
+   else
+   po &= ~(1 << offset);
+   writel(po, priv->base + REG_PO);
+   return 0;
+}
+
+static int eg20t_gpio_direction_input(struct udevice *dev, unsigned int offset)
+{
+   struct eg20t_gpio_priv *priv = dev_get_priv(dev);
+   u32 pm;
+
+   pm = readl(priv->base + REG_PM);
+   pm &= ~(1 << offset);
+   writel(pm, priv->base + REG_PM);
+   return 0;
+}
+
+static int eg20t_gpio_direction_output(struct udevice *dev, unsigned int 
offset,
+  int value)
+{
+   struct eg20t_gpio_priv *priv = dev_get_priv(dev);
+   u32 pm;
+
+   pm = readl(priv->base + REG_PM);
+   pm |= 1 << offset;
+   writel(pm, priv->base + REG_PM);
+
+   return eg20t_gpio_set_value(dev, offset, value);
+}
+
+static int eg20t_gpio_get_function(struct udevice *dev, unsigned int offset)
+{
+   struct eg20t_gpio_priv *priv = dev_get_priv(dev);
+   u32 pm;
+
+   pm = readl(priv->base + REG_PM);
+
+   if ((pm >> offset) & 0x1)
+   return GPIOF_OUTPUT;
+
+   return GPIOF_INPUT;
+}
+
+static const struct dm_gpio_ops eg20t_gpio_ops = {
+   .direction_input= eg20t_gpio_direction_input,
+   .direction_output   = eg20t_gpio_direction_output,
+   .get_value  = eg20t_gpio_get_value,
+   .set_value  = eg20t_gpio_set_value,
+   .get_function   = eg20t_gpio_get_function,
+};
+
+static int eg20t_gpio_probe(struct udevice *dev)
+{
+   struct eg20t_gpio_priv *priv = dev_get_priv(dev);
+   struct gpio_dev_priv *uc_priv = dev->uclass_priv;
+
+   priv->base = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM);
+   if (!priv->base) {
+   debug("failed to map GPIO registers\n");
+   return -EINVAL;

[U-Boot] [PATCH 1/8] pci: Make PCI bridge memory alignment configurable

2017-11-21 Thread Paul Burton
On some systems aligning PCI memory to a 1MB boundary every time a
bridge is encountered may lead to exhausting the available memory space
before all devices have been assigned addresses.

For example on the MIPS Boston development board we have an Intel EG20T
Platform Controller Hub connected to a Xilinx AXI to PCIe root port
which is only assigned a 1MB memory region. The Intel EG20T contains a
bridge device beneath which all of its peripheral devices can be found,
and that bridge device contains a ROM. If we align to 1MB when we
encounter each bridge device we therefore do something like this:

  - Start with bus_lower at 0x1600.

  - Find the Xilinx root bridge, which has no visible BARs so we do very
little to it.

  - Probe the bus beneath the Xilinx bridge device, aligning bus_lower
to a 1MB boundary first. That leaves it still at 0x1600.

  - Find the EG20T bridge device, which we find has a 64KiB ROM. We
assign it the address range 0x1600-0x1600 which leaves
bus_lower at 0x1601.

  - Probe the bus beneath the EG20T bridge device, aligning bus_lower to
a 1MB boundary first. This leaves bus_lower at 0x1610, which is
the end of the available memory space.

  - Find the various peripheral devices the EG20T contains, but fail to
assign any memory space to them since bus_lower is at the end of the
memory space available to the PCI bus.

This patch allows that 1MB alignment to be changed or disabled via
Kconfig, so that systems such as this can select an alignment which
works for them.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Paul Burton <paul.bur...@mips.com>
---

 drivers/pci/Kconfig|  7 +++
 drivers/pci/pci_auto.c | 24 
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 58f128d8a6..1605cfc8fa 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -26,6 +26,13 @@ config DM_PCI_COMPAT
  measure when porting a board to use driver model for PCI. Once the
  board is fully supported, this option should be disabled.
 
+config DM_PCI_BRIDGE_MEM_ALIGN
+   hex "PCI bridge memory alignment"
+   default 0x10
+   help
+ PCI memory space will be aligned to be a multiple of this value
+ whenever a PCI-to-PCI bridge is encountered.
+
 config PCI_PNP
bool "Enable Plug & Play support for PCI"
depends on PCI || DM_PCI
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index c2bc32678a..c4eee6f0ba 100644
--- a/drivers/pci/pci_auto.c
+++ b/drivers/pci/pci_auto.c
@@ -186,8 +186,10 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, 
int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff);
 
if (pci_mem) {
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_mem, 0x10);
+   /* Round memory allocator to a suitable boundary */
+   if (CONFIG_DM_PCI_BRIDGE_MEM_ALIGN)
+   pciauto_region_align(pci_mem,
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN);
 
/*
 * Set up memory and I/O filter limits, assume 32-bit
@@ -200,8 +202,10 @@ void dm_pciauto_prescan_setup_bridge(struct udevice *dev, 
int sub_bus)
}
 
if (pci_prefetch) {
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_prefetch, 0x10);
+   /* Round memory allocator to a suitable boundary */
+   if (CONFIG_DM_PCI_BRIDGE_MEM_ALIGN)
+   pciauto_region_align(pci_prefetch,
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN);
 
/*
 * Set up memory and I/O filter limits, assume 32-bit
@@ -260,8 +264,10 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, 
int sub_bus)
dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq);
 
if (pci_mem) {
-   /* Round memory allocator to 1MB boundary */
-   pciauto_region_align(pci_mem, 0x10);
+   /* Round memory allocator to a suitable boundary */
+   if (CONFIG_DM_PCI_BRIDGE_MEM_ALIGN)
+   pciauto_region_align(pci_mem,
+CONFIG_DM_PCI_BRIDGE_MEM_ALIGN);
 
dm_pci_write_config16(dev, PCI_MEMORY_LIMIT,
  (pci_mem->bus_lower - 1) >> 16);
@@ -274,8 +280,10 @@ void dm_pciauto_postscan_setup_bridge(struct udevice *dev, 
int sub_bus)
 _64);
prefechable_64 &= PCI_PREF_RANGE_TYPE_M

[U-Boot] [PATCH 0/8] boston: Ethernet support for MIPS Boston board

2017-11-21 Thread Paul Burton
This series fixes some issues with PCIe support on the MIPS Boston
development board, adds a driver for the EG20T GPIO controller that we
use to control ethernet PHY reset & enables support for ethernet on the
Boston board.

Note that QEMU currently (as of v2.10) does not emulate the EG20T
ethernet device, so this leads to delays during boot in QEMU whilst the
pch_gbe driver times out on attempted access to the PHY.

Applies atop u-boot-mips/next as of 50bff5194d7e ("MIPS: Break out of
cache loops for unimplemented caches").


Paul Burton (8):
  pci: Make PCI bridge memory alignment configurable
  boston: Disable PCI bridge memory space alignment
  pci: xilinx: Initialise the root bridge during probe
  gpio: Provide dummy get/request & is_valid functions
  gpio: eg20t: Add driver for Intel EG20T GPIO controllers
  net: pch_gbe: Support PHY reset GPIOs
  net: pch_gbe: Use wait_for_bit() helper
  boston: Enable ethernet PHY, reset GPIO, device probe

 arch/mips/Kconfig  |   1 +
 arch/mips/dts/img,boston.dts   |   8 +--
 configs/boston32r2_defconfig   |   2 +
 configs/boston32r2el_defconfig |   2 +
 configs/boston64r2_defconfig   |   2 +
 configs/boston64r2el_defconfig |   2 +
 drivers/gpio/Kconfig   |   8 +++
 drivers/gpio/Makefile  |   1 +
 drivers/gpio/eg20t-gpio.c  | 139 +
 drivers/net/pch_gbe.c  |  96 +---
 drivers/net/pch_gbe.h  |   1 +
 drivers/pci/Kconfig|   7 +++
 drivers/pci/pci_auto.c |  24 ---
 drivers/pci/pcie_xilinx.c  |  36 ++-
 include/asm-generic/gpio.h |  38 +++
 include/configs/boston.h   |   5 ++
 16 files changed, 307 insertions(+), 65 deletions(-)
 create mode 100644 drivers/gpio/eg20t-gpio.c

-- 
2.15.0

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Re: [U-Boot] [PATCH 0/3] MIPS: Caching fixes

2017-11-21 Thread Paul Burton
Hi Daniel,

On Tue, Nov 21, 2017 at 08:57:15PM +0100, Daniel Schwierzeck wrote:
> Am 21.11.2017 um 20:18 schrieb Paul Burton:
> > This short series fixes a few issues related to our caching code - with
> > regards to DMA coherence, instruction cache coherence & systems with no
> > caches at all.
> > 
> > Applies atop u-boot-mips/next as of d7d9fc01a4ef ("Update Paul Burton's
> > email address").
> > 
> > 
> > Paul Burton (3):
> >   MIPS: Ensure cache ops complete in cache maintenance functions
> >   MIPS: Clear instruction hazards in flush_cache()
> >   MIPS: Break out of cache loops for unimplemented caches
> > 
> >  arch/mips/include/asm/system.h | 13 +
> >  arch/mips/lib/cache.c  | 30 ++
> >  2 files changed, 35 insertions(+), 8 deletions(-)
> > 
> 
> series applied to u-boot-mips, thanks.

Great - thanks for your prompt response :)

> Do you have further patches for this merge windows? I'll wait with the
> pull request then.

I have some patches for Boston which I've been tidying up & am just
waiting on buildman to finish testing, but they do touch other areas
than arch/mips & board/imgtec/boston so I'll understand if you don't
want to hold things up on waiting for reviews.

I also have a port to the SEAD-3 platform, another development board we
use for smaller cores, which is in fairly good shape but similarly would
need review from some others.

Thanks,
Paul
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[U-Boot] [PATCH 3/3] MIPS: Break out of cache loops for unimplemented caches

2017-11-21 Thread Paul Burton
If we run on a CPU which doesn't implement a particular cache then we
would previously get stuck in an infinite loop, executing a cache op on
the first "line" of the missing cache & then incrementing the address by
0. This was being avoided for the L2 caches, but not for the L1s. Fix
this by generalising the check for a zero line size & avoiding the cache
op loop when this is the case.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

 arch/mips/lib/cache.c | 13 ++---
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 8e5b028c66..e305f3207a 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -98,6 +98,9 @@ static inline unsigned long scache_line_size(void)
const unsigned int cache_ops[] = { ops };   \
unsigned int i; \
\
+   if (!lsize) \
+   break;  \
+   \
for (; addr <= aend; addr += lsize) {   \
for (i = 0; i < ARRAY_SIZE(cache_ops); i++) \
mips_cache(cache_ops[i], addr); \
@@ -125,9 +128,7 @@ void flush_cache(ulong start_addr, ulong size)
cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D);
 
/* flush L2 cache */
-   if (slsize)
-   cache_loop(start_addr, start_addr + size, slsize,
-  HIT_WRITEBACK_INV_SD);
+   cache_loop(start_addr, start_addr + size, slsize, HIT_WRITEBACK_INV_SD);
 
/* flush I-cache */
cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I);
@@ -152,8 +153,7 @@ void flush_dcache_range(ulong start_addr, ulong stop)
cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D);
 
/* flush L2 cache */
-   if (slsize)
-   cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD);
+   cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD);
 
/* ensure cache ops complete before any further memory accesses */
sync();
@@ -169,8 +169,7 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
return;
 
/* invalidate L2 cache */
-   if (slsize)
-   cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD);
+   cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD);
 
cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D);
 
-- 
2.15.0

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[U-Boot] [PATCH 2/3] MIPS: Clear instruction hazards in flush_cache()

2017-11-21 Thread Paul Burton
When writing code, for example during relocation, we ensure that the
icache has a coherent view of the new instructions with a call to
flush_cache(). This handles the bulk of the work to ensure the new
instructions will execute as expected, however it does not ensure that
the CPU pipeline doesn't already contain instructions taken from a stale
view of the affected memory. This could theoretically be a problem for
relocation, but in practice typically isn't because we sync caches for
enough code after the entry point of the newly written code that by the
time the CPU pipeline might possibly fetch any of it we'll have long ago
written it back & invalidated any stale icache entries. This is however
a problem for shorter regions of code.

In preparation for later patches which write shorter segments of code,
ensure any instruction hazards are cleared by flush_cache() by
introducing & using a new instruction_hazard_barrier() function which
makes use of the jr.hb instruction to clear the hazard.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de
---

 arch/mips/include/asm/system.h | 13 +
 arch/mips/lib/cache.c  |  4 
 2 files changed, 17 insertions(+)

diff --git a/arch/mips/include/asm/system.h b/arch/mips/include/asm/system.h
index c9c5961462..eaf1b2290d 100644
--- a/arch/mips/include/asm/system.h
+++ b/arch/mips/include/asm/system.h
@@ -14,8 +14,10 @@
 #ifndef _ASM_SYSTEM_H
 #define _ASM_SYSTEM_H
 
+#include 
 #include 
 #include 
+#include 
 #if 0
 #include 
 #endif
@@ -270,4 +272,15 @@ static inline void execution_hazard_barrier(void)
".set reorder");
 }
 
+static inline void instruction_hazard_barrier(void)
+{
+   unsigned long tmp;
+
+   asm volatile(
+   __stringify(PTR_LA) "\t%0, 1f\n"
+   "   jr.hb   %0\n"
+   "1: .insn"
+   : "="(tmp));
+}
+
 #endif /* _ASM_SYSTEM_H */
diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index eba7fff316..8e5b028c66 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -12,6 +12,7 @@
 #endif
 #include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -134,6 +135,9 @@ void flush_cache(ulong start_addr, ulong size)
 ops_done:
/* ensure cache ops complete before any further memory accesses */
sync();
+
+   /* ensure the pipeline doesn't contain now-invalid instructions */
+   instruction_hazard_barrier();
 }
 
 void flush_dcache_range(ulong start_addr, ulong stop)
-- 
2.15.0

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[U-Boot] [PATCH 1/3] MIPS: Ensure cache ops complete in cache maintenance functions

2017-11-21 Thread Paul Burton
A typical use of cache maintenance functions is to force writeback of
data which a device is about to read using DMA - for example a
descriptor or command structure. Such users of cache maintenance
functions require that operations on the cache have completed before
they proceed to instruct a device to read memory. This requires that we
place a completion barrier (ie. sync instruction) between the cache ops
and whatever write informs the device to perform DMA.

Whilst strictly speaking this isn't all users of the cache maintenance
functions & we could instead place the barriers in the drivers that
require them, it would be much more invasive to do so than to just have
the barrier be the default by placing it in the cache functions
themselves. The cost is low enough that it shouldn't matter to us in any
rare cases that we use the cache functions when not performing DMA.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de
---

 arch/mips/lib/cache.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
index 91b037f87d..eba7fff316 100644
--- a/arch/mips/lib/cache.c
+++ b/arch/mips/lib/cache.c
@@ -10,6 +10,7 @@
 #ifdef CONFIG_MIPS_L2_CACHE
 #include 
 #endif
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
@@ -116,7 +117,7 @@ void flush_cache(ulong start_addr, ulong size)
/* flush I-cache & D-cache simultaneously */
cache_loop(start_addr, start_addr + size, ilsize,
   HIT_WRITEBACK_INV_D, HIT_INVALIDATE_I);
-   return;
+   goto ops_done;
}
 
/* flush D-cache */
@@ -129,6 +130,10 @@ void flush_cache(ulong start_addr, ulong size)
 
/* flush I-cache */
cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I);
+
+ops_done:
+   /* ensure cache ops complete before any further memory accesses */
+   sync();
 }
 
 void flush_dcache_range(ulong start_addr, ulong stop)
@@ -145,6 +150,9 @@ void flush_dcache_range(ulong start_addr, ulong stop)
/* flush L2 cache */
if (slsize)
cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD);
+
+   /* ensure cache ops complete before any further memory accesses */
+   sync();
 }
 
 void invalidate_dcache_range(ulong start_addr, ulong stop)
@@ -161,4 +169,7 @@ void invalidate_dcache_range(ulong start_addr, ulong stop)
cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD);
 
cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D);
+
+   /* ensure cache ops complete before any further memory accesses */
+   sync();
 }
-- 
2.15.0

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[U-Boot] [PATCH 0/3] MIPS: Caching fixes

2017-11-21 Thread Paul Burton
This short series fixes a few issues related to our caching code - with
regards to DMA coherence, instruction cache coherence & systems with no
caches at all.

Applies atop u-boot-mips/next as of d7d9fc01a4ef ("Update Paul Burton's
email address").


Paul Burton (3):
  MIPS: Ensure cache ops complete in cache maintenance functions
  MIPS: Clear instruction hazards in flush_cache()
  MIPS: Break out of cache loops for unimplemented caches

 arch/mips/include/asm/system.h | 13 +
 arch/mips/lib/cache.c  | 30 ++
 2 files changed, 35 insertions(+), 8 deletions(-)

-- 
2.15.0

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[U-Boot] [PATCH] Update Paul Burton's email address

2017-10-30 Thread Paul Burton
MIPS is no longer a part of Imagination Technologies, and as such my
@imgtec.com email address will soon cease to function. This patch
updates occurrances of it with my new @mips.com email address, and adds
an entry in .mailmap such that git (& tools such as get_maintainer.pl
when examining history) will use the new address.

Signed-off-by: Paul Burton <paul.bur...@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

 .mailmap| 1 +
 board/imgtec/boston/MAINTAINERS | 2 +-
 board/imgtec/malta/MAINTAINERS  | 2 +-
 board/imgtec/malta/superio.c| 2 +-
 board/imgtec/malta/superio.h| 2 +-
 drivers/pci/pci_msc01.c | 2 +-
 include/msc01.h | 2 +-
 include/pci_msc01.h | 2 +-
 8 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/.mailmap b/.mailmap
index 14b5ad7e5c..bd7267241a 100644
--- a/.mailmap
+++ b/.mailmap
@@ -20,6 +20,7 @@ Jagan Teki <jaga...@xilinx.com>
 Jagan Teki <jagannadh.t...@gmail.com>
 Jagan Teki <jagannadha.sutradharudu-t...@xilinx.com>
 Markus Klotzbuecher <m...@denx.de>
+Paul Burton <paul.bur...@mips.com> <paul.bur...@imgtec.com>
 Prabhakar Kushwaha <prabha...@freescale.com>
 Rajeshwari Shinde <rajeshwar...@samsung.com>
 Ricardo Ribalda <ricardo.riba...@uam.es>
diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
index ec850d2f91..81f067d690 100644
--- a/board/imgtec/boston/MAINTAINERS
+++ b/board/imgtec/boston/MAINTAINERS
@@ -1,5 +1,5 @@
 BOSTON BOARD
-M: Paul Burton <paul.bur...@imgtec.com>
+M: Paul Burton <paul.bur...@mips.com>
 S: Maintained
 F: board/imgtec/boston/
 F: include/configs/boston.h
diff --git a/board/imgtec/malta/MAINTAINERS b/board/imgtec/malta/MAINTAINERS
index 052ec67b14..b1cf297f4f 100644
--- a/board/imgtec/malta/MAINTAINERS
+++ b/board/imgtec/malta/MAINTAINERS
@@ -1,5 +1,5 @@
 MALTA BOARD
-M: Paul Burton <paul.bur...@imgtec.com>
+M: Paul Burton <paul.bur...@mips.com>
 S: Maintained
 F: board/imgtec/malta/
 F: include/configs/malta.h
diff --git a/board/imgtec/malta/superio.c b/board/imgtec/malta/superio.c
index 7865ae2b70..d6ada4f87d 100644
--- a/board/imgtec/malta/superio.c
+++ b/board/imgtec/malta/superio.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.bur...@imgtec.com>
+ * Author: Paul Burton <paul.bur...@mips.com>
  *
  * Setup code for the FDC37M817 super I/O controller
  *
diff --git a/board/imgtec/malta/superio.h b/board/imgtec/malta/superio.h
index 271c462eac..f0ae1422b8 100644
--- a/board/imgtec/malta/superio.h
+++ b/board/imgtec/malta/superio.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.bur...@imgtec.com>
+ * Author: Paul Burton <paul.bur...@mips.com>
  *
  * Setup code for the FDC37M817 super I/O controller
  *
diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index 284ffa09b6..a1b9116e4d 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.bur...@imgtec.com>
+ * Author: Paul Burton <paul.bur...@mips.com>
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/include/msc01.h b/include/msc01.h
index 37cf963f13..7ee243bec3 100644
--- a/include/msc01.h
+++ b/include/msc01.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.bur...@imgtec.com>
+ * Author: Paul Burton <paul.bur...@mips.com>
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/include/pci_msc01.h b/include/pci_msc01.h
index 54945a7a8f..066c6622da 100644
--- a/include/pci_msc01.h
+++ b/include/pci_msc01.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton <paul.bur...@imgtec.com>
+ * Author: Paul Burton <paul.bur...@mips.com>
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
-- 
2.14.3

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Re: [U-Boot] [U-Boot, v2, 4/8] test/py: Import StringIO from io module for python 3.x

2017-09-21 Thread Paul Burton
Hi Tom,

On Thursday, 21 September 2017 09:27:02 PDT Tom Rini wrote:
> On Thu, Sep 14, 2017 at 02:34:46PM -0700, Paul Burton wrote:
> > In python 3.x the StringIO module is gone, and instead StringIO can be
> > imported from the io module. Do this in order to run on python 3.x, and
> > fall back to importing StringIO as a module in order to continue working
> > with python 2.x.
> > 
> > Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
> > Reviewed-by: Stephen Warren <swar...@nvidia.com>
> 
> This breaks python2.7.  There we have both StringIO and io.StringIO so
> we succeed in 'from io import StringIO'.  But io.StringIO() needs
> unicode, and we don't have that by default in python2.  My quick attempt
> here failed.  Thanks!

Hmm, in that case back to v1 for this patch? (ie. try the StringIO.StringIO 
import first?)

  https://patchwork.ozlabs.org/patch/813933/

Would you like me to submit a v3 or could you just take this one from v1?

Thanks,
Paul

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[U-Boot] [PATCH] MIPS: Drop unused PTR_COUNT_SHIFT from u-boot.lds

2017-09-15 Thread Paul Burton
The u-boot.lds linker script for MIPS defines a PTR_COUNT_SHIFT macro to
2 or 3 for 32 bit or 64 bit builds respectively. This macro is never
actually used though, so remove the dead code.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 arch/mips/cpu/u-boot.lds | 6 --
 1 file changed, 6 deletions(-)

diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds
index bd5536f013..fc943af923 100644
--- a/arch/mips/cpu/u-boot.lds
+++ b/arch/mips/cpu/u-boot.lds
@@ -5,12 +5,6 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
-#if defined(CONFIG_64BIT)
-#define PTR_COUNT_SHIFT3
-#else
-#define PTR_COUNT_SHIFT2
-#endif
-
 OUTPUT_ARCH(mips)
 ENTRY(_start)
 SECTIONS
-- 
2.14.1

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[U-Boot] [PATCH] boston: Remove unused label in lowlevel_display

2017-09-15 Thread Paul Burton
The lowlevel_display() function includes a "1:" label which is never
used. Remove it.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 board/imgtec/boston/lowlevel_init.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/imgtec/boston/lowlevel_init.S 
b/board/imgtec/boston/lowlevel_init.S
index 46c9c1d269..02a75a8ee7 100644
--- a/board/imgtec/boston/lowlevel_init.S
+++ b/board/imgtec/boston/lowlevel_init.S
@@ -51,5 +51,5 @@ LEAF(lowlevel_display)
sw  k1, 4(AT)
 #endif
.setpop
-1: jr  ra
+   jr  ra
END(lowlevel_display)
-- 
2.14.1

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[U-Boot] [PATCH] boston: Drop unused return value

2017-09-15 Thread Paul Burton
The boston lowlevel_init() function zeroes the return register v0,
despite the function not being expected to return a value & that value
never being used.

Remove the redundant assignment to v0.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 board/imgtec/boston/lowlevel_init.S | 1 -
 1 file changed, 1 deletion(-)

diff --git a/board/imgtec/boston/lowlevel_init.S 
b/board/imgtec/boston/lowlevel_init.S
index 0c01aa981d..46c9c1d269 100644
--- a/board/imgtec/boston/lowlevel_init.S
+++ b/board/imgtec/boston/lowlevel_init.S
@@ -34,7 +34,6 @@ LEAF(lowlevel_init)
PTR_LA  a0, msg_ddr_ok
bal lowlevel_display
 
-   movev0, zero
jr  s0
END(lowlevel_init)
 
-- 
2.14.1

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[U-Boot] [PATCH v2 11/13] nios2: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the nios2 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As nios2 actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Thomas Chou <tho...@wytron.com.tw>
---

Changes in v2: None

 arch/nios2/include/asm/io.h | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h
index e951500190..4e5b44a4e4 100644
--- a/arch/nios2/include/asm/io.h
+++ b/arch/nios2/include/asm/io.h
@@ -19,9 +19,6 @@ static inline void sync(void)
  * properties specified by "flags".
  */
 #define MAP_NOCACHE1
-#define MAP_WRCOMBINE  0
-#define MAP_WRBACK 0
-#define MAP_WRTHROUGH  0
 
 static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
@@ -32,20 +29,22 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
else
return (void *)(paddr | gd->arch.mem_region_base);
 }
+#define map_physmem map_physmem
 
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
+static inline void *phys_to_virt(phys_addr_t paddr)
 {
+   DECLARE_GLOBAL_DATA_PTR;
 
+   return (void *)(paddr | gd->arch.mem_region_base);
 }
+#define phys_to_virt phys_to_virt
 
 static inline phys_addr_t virt_to_phys(void * vaddr)
 {
DECLARE_GLOBAL_DATA_PTR;
return (phys_addr_t)vaddr & gd->arch.physaddr_mask;
 }
+#define virt_to_phys virt_to_phys
 
 #define __raw_writeb(v,a)   (*(volatile unsigned char  *)(a) = (v))
 #define __raw_writew(v,a)   (*(volatile unsigned short *)(a) = (v))
@@ -171,4 +170,6 @@ static inline void outsl (unsigned long port, const void 
*src, unsigned long cou
 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
 #define memcpy_toio(a, b, c)   memcpy((void *)(a), (b), (c))
 
+#include 
+
 #endif /* __ASM_NIOS2_IO_H_ */
-- 
2.14.1

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[U-Boot] [PATCH v2 12/13] powerpc: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the powerpc architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As powerpc can actually perform
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic phys_to_virt() & virt_to_phys()
functions. However since map_physmem() already effectively implemented
the same thing as virt_to_phys() we can simply implement virt_to_phys()
instead of map_physmem() & use the generic map_physmem(). We also drop
the no-op unmap_physmem().

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Wolfgang Denk <w...@denx.de>
---

Changes in v2: None

 arch/powerpc/include/asm/io.h | 25 +
 1 file changed, 5 insertions(+), 20 deletions(-)

diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index a54fc468d5..34fbfdf1cf 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -282,18 +282,7 @@ static inline void out_be32(volatile unsigned __iomem 
*addr, u32 val)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+static inline void *phys_to_virt(phys_addr_t paddr)
 {
 #ifdef CONFIG_ADDR_MAP
return addrmap_phys_to_virt(paddr);
@@ -301,14 +290,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
return (void *)((unsigned long)paddr);
 #endif
 }
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
+#define phys_to_virt phys_to_virt
 
 static inline phys_addr_t virt_to_phys(void * vaddr)
 {
@@ -318,5 +300,8 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
return (phys_addr_t)((unsigned long)vaddr);
 #endif
 }
+#define virt_to_phys virt_to_phys
+
+#include 
 
 #endif
-- 
2.14.1

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[U-Boot] [PATCH v2 13/13] sandbox: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the sandbox architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As sandbox actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic mapping functions, but are able to
implement phys_to_virt() & make use of it from map_physmem().

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Simon Glass <s...@chromium.org>
Acked-by: Simon Glass <s...@chromium.org>

---

Changes in v2:
- Move include earlier to get MAP_WRBACK for (un)map_sysmem()
- Cast vaddr to uint8_t* in virt_to_phys() for arithmetic with ram_buf

 arch/sandbox/cpu/cpu.c| 12 +++-
 arch/sandbox/include/asm/io.h | 18 +-
 2 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 01991049cc..66c3a6a88a 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -56,6 +56,16 @@ int cleanup_before_linux_select(int flags)
return 0;
 }
 
+void *phys_to_virt(phys_addr_t paddr)
+{
+   return (void *)(gd->arch.ram_buf + paddr);
+}
+
+phys_addr_t virt_to_phys(void *vaddr)
+{
+   return (phys_addr_t)((uint8_t *)vaddr - gd->arch.ram_buf);
+}
+
 void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
 {
 #if defined(CONFIG_PCI) && !defined(CONFIG_SPL_BUILD)
@@ -73,7 +83,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, 
unsigned long flags)
}
 #endif
 
-   return (void *)(gd->arch.ram_buf + paddr);
+   return phys_to_virt(paddr);
 }
 
 void unmap_physmem(const void *vaddr, unsigned long flags)
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index a6856356df..fd3c2478f7 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -7,22 +7,22 @@
 #ifndef __SANDBOX_ASM_IO_H
 #define __SANDBOX_ASM_IO_H
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
+void *phys_to_virt(phys_addr_t paddr);
+#define phys_to_virt phys_to_virt
+
+phys_addr_t virt_to_phys(void *vaddr);
+#define virt_to_phys virt_to_phys
 
 void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags);
+#define map_physmem map_physmem
 
 /*
  * Take down a mapping set up by map_physmem().
  */
 void unmap_physmem(const void *vaddr, unsigned long flags);
+#define unmap_physmem unmap_physmem
+
+#include 
 
 /* For sandbox, we want addresses to point into our RAM buffer */
 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
-- 
2.14.1

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[U-Boot] [PATCH v2 09/13] xtensa: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the xtensa architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for xtensa this is primarily a matter of moving code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Max Filippov <jcmvb...@gmail.com>
Acked-by: Max Filippov <jcmvb...@gmail.com>
---

Changes in v2: None

 arch/xtensa/include/asm/io.h | 25 ++---
 1 file changed, 2 insertions(+), 23 deletions(-)

diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index e34d6e1d7f..c9e335f4f6 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -115,29 +115,6 @@ void outsl(unsigned long port, const void *src, unsigned 
long count);
  */
 #define xlate_dev_kmem_ptr(p)   p
 
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-}
-
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)((unsigned long)vaddr);
-}
-
 /*
  * Dummy function to keep U-Boot's cfi_flash.c driver happy.
  */
@@ -145,4 +122,6 @@ static inline void sync(void)
 {
 }
 
+#include 
+
 #endif /* _XTENSA_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 06/13] nds32: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the nds32 architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for nds32 this is primarily a matter of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Macpaul Lin <macp...@andestech.com>
---

Changes in v2: None

 arch/nds32/include/asm/io.h | 32 +++-
 1 file changed, 3 insertions(+), 29 deletions(-)

diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h
index b2c4d0ef8c..46ce8c4a13 100644
--- a/arch/nds32/include/asm/io.h
+++ b/arch/nds32/include/asm/io.h
@@ -38,35 +38,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
-
 /*
  * Generic virtual read/write.  Note that we don't support half-word
  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
@@ -459,5 +430,8 @@ out:
 #define isa_check_signature(io, sig, len)  (0)
 
 #endif /* __mem_isa */
+
+#include 
+
 #endif /* __KERNEL__ */
 #endif /* __ASM_NDS_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 08/13] x86: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the x86 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for x86 this is primarily a matter of moving code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Simon Glass <s...@chromium.org>
Reviewed-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 arch/x86/include/asm/io.h | 31 ++-
 1 file changed, 2 insertions(+), 29 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index a72daf2263..263dd8fd17 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -230,35 +230,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)(uintptr_t)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(uintptr_t)(vaddr);
-}
-
 /*
  * TODO: The kernel offers some more advanced versions of barriers, it might
  * have some advantages to use them instead of the simple one here.
@@ -267,4 +238,6 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 #define __iormb()  dmb()
 #define __iowmb()  dmb()
 
+#include 
+
 #endif /* _ASM_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 05/13] microblaze: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the microblaze architecture to make use of the new
asm-generic/io.h to provide address mapping functions. As the generic
implementations are suitable for microblaze this is primarily a matter
of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Michal Simek <mon...@monstr.eu>
---

Changes in v2: None

 arch/microblaze/include/asm/io.h | 29 +
 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 584cbce358..c7516a47e8 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -131,33 +131,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
+#include 
 
 #endif /* __MICROBLAZE_IO_H__ */
-- 
2.14.1

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[U-Boot] [PATCH v2 10/13] mips: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the mips architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As mips actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

Changes in v2: None

 arch/mips/include/asm/io.h | 17 ++---
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index ee7a59290d..45d7ca0cc6 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -95,6 +95,7 @@ static inline unsigned long virt_to_phys(volatile const void 
*address)
 #endif
return CPHYSADDR(addr);
 }
+#define virt_to_phys virt_to_phys
 
 /*
  * phys_to_virt-   map physical address to virtual
@@ -112,6 +113,7 @@ static inline void *phys_to_virt(unsigned long address)
 {
return (void *)(address + PAGE_OFFSET - PHYS_OFFSET);
 }
+#define phys_to_virt phys_to_virt
 
 /*
  * ISA I/O bus memory addresses are 1:1 with the physical address.
@@ -490,10 +492,7 @@ static inline void memcpy_toio(volatile void __iomem *dst, 
const void *src, int
  */
 #define sync() mmiowb()
 
-#define MAP_NOCACHE(1)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
+#define MAP_NOCACHE1
 
 static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
@@ -503,13 +502,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
 
return (void *)CKSEG0ADDR(paddr);
 }
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-}
+#define map_physmem map_physmem
 
 #define __BUILD_CLRBITS(bwlq, sfx, end, type)  \
\
@@ -566,4 +559,6 @@ BUILD_CLRSETBITS(q, le64, le64, u64)
 BUILD_CLRSETBITS(q, be64, be64, u64)
 BUILD_CLRSETBITS(q, 64, _, u64)
 
+#include 
+
 #endif /* _ASM_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 07/13] sh: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the sh architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for sh this is primarily a matter of moving code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
---

Changes in v2: None

 arch/sh/include/asm/io.h | 29 +
 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 5cb000cada..be1ff4ad70 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -231,34 +231,7 @@ static inline void sync(void)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE   (0)
-#define MAP_WRBACK  (0)
-#define MAP_WRTHROUGH   (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
+#include 
 
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 04/13] m68k: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the m68k architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for m68k this is primarily a matter of emoving code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Huan Wang <alison.w...@freescale.com>
Cc: Angelo Dureghello <ang...@sysam.it>
Acked-by: Angelo Dureghello <ang...@sysam.it>
Tested-by: Angelo Dureghello <ang...@sysam.it>
---

Changes in v2: None

 arch/m68k/include/asm/io.h | 29 +
 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/m68k/include/asm/io.h b/arch/m68k/include/asm/io.h
index 384308b747..dfe77f0756 100644
--- a/arch/m68k/include/asm/io.h
+++ b/arch/m68k/include/asm/io.h
@@ -253,33 +253,6 @@ static inline void sync(void)
 */
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
-   unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
+#include 
 
 #endif /* __ASM_M68K_IO_H__ */
-- 
2.14.1

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[U-Boot] [PATCH v2 03/13] arm: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the arm architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arm this is primarily a matter of removing code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Albert Aribaud <albert.u.b...@aribaud.net>
Reviewed-by: Simon Glass <s...@chromium.org>
---

Changes in v2: None

 arch/arm/include/asm/io.h | 30 +-
 1 file changed, 1 insertion(+), 29 deletions(-)

diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index 5834f5b3dc..5df74728de 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -34,35 +34,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)((unsigned long)paddr);
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)((unsigned long)vaddr);
-}
-
 /*
  * Generic virtual read/write.  Note that we don't support half-word
  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
@@ -426,6 +397,7 @@ out:
 #endif /* __mem_isa */
 #endif /* __KERNEL__ */
 
+#include 
 #include 
 
 #endif /* __ASM_ARM_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 02/13] arc: Use asm-generic/io.h

2017-09-14 Thread Paul Burton
Convert the arc architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arc this is primarily a matter of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Alexey Brodkin <alexey.brod...@synopsys.com>
Acked-by: Alexey Brodkin <abrod...@synopsys.com>
---

Changes in v2: None

 arch/arc/include/asm/io.h | 29 +
 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/arc/include/asm/io.h b/arch/arc/include/asm/io.h
index 42e7f22b28..a12303bc73 100644
--- a/arch/arc/include/asm/io.h
+++ b/arch/arc/include/asm/io.h
@@ -50,30 +50,6 @@
 #define __iowmb()  do { } while (0)
 #endif
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)((unsigned long)paddr);
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
 static inline void sync(void)
 {
/* Not yet implemented */
@@ -302,9 +278,6 @@ static inline int __raw_writesl(unsigned int addr, void 
*data, int longlen)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)((unsigned long)vaddr);
-}
+#include 
 
 #endif /* __ASM_ARC_IO_H */
-- 
2.14.1

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[U-Boot] [PATCH v2 01/13] Provide a generic io.h & address mapping functions

2017-09-14 Thread Paul Burton
Most architectures currently supported by U-Boot use trivial
implementations of map_to_physmem & virt_to_phys which simply cast a
physical address to a pointer for use a virtual address & vice-versa.
This results in a lot of duplicate implementations of these mapping
functions.

The set of functions provided by different architectures also differs,
with some having implementations of phys_to_virt & others not. A later
patch will make use of phys_to_virt in architecture-neutral code, and so
requires that it be provided for all architectures.

This patch introduces an asm-generic/io.h which provides generic
implementations of address mapping functions, allowing the duplication
of them between architectures to be removed. Once architectures are
converted to make use of this generic header it will also ensure that
all of phys_to_virt, virt_to_phys, map_physmem & unmap_physmem are
provided. The 2 families of functions differ in that map_physmem may
create dynamic mappings whilst phys_to_virt may not & therefore is more
limited in scope but doesn't require information such as a length &
flags.

This patch doesn't convert any architectures to make use of this generic
header - later patches in the series will do so.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Albert Aribaud <albert.u.b...@aribaud.net>
Cc: Alexey Brodkin <alexey.brod...@synopsys.com>
Cc: Angelo Dureghello <ang...@sysam.it>
Cc: Bin Meng <bmeng...@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Macpaul Lin <macp...@andestech.com>
Cc: Michal Simek <mon...@monstr.eu>
Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
Cc: Thomas Chou <tho...@wytron.com.tw>
Cc: Wolfgang Denk <w...@denx.de>
Acked-by: Angelo Dureghello <ang...@sysam.it>
Tested-by: Angelo Dureghello <ang...@sysam.it>
Reviewed-by: Simon Glass <s...@chromium.org>

---

Changes in v2:
- Reformat map_physmem to split args across lines, rather than return type.

 include/asm-generic/io.h | 110 +++
 1 file changed, 110 insertions(+)
 create mode 100644 include/asm-generic/io.h

diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
new file mode 100644
index 00..0f5160c6f1
--- /dev/null
+++ b/include/asm-generic/io.h
@@ -0,0 +1,110 @@
+/*
+ * Generic I/O functions.
+ *
+ * Copyright (c) 2016 Imagination Technologies Ltd.
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef __ASM_GENERIC_IO_H__
+#define __ASM_GENERIC_IO_H__
+
+/*
+ * This file should be included at the end of each architecture-specific
+ * asm/io.h such that we may provide generic implementations without
+ * conflicting with architecture-specific code.
+ */
+
+#ifndef __ASSEMBLY__
+
+/**
+ * phys_to_virt() - Return a virtual address mapped to a given physical address
+ * @paddr: the physical address
+ *
+ * Returns a virtual address which the CPU can access that maps to the physical
+ * address @paddr. This should only be used where it is known that no dynamic
+ * mapping is required. In general, map_physmem should be used instead.
+ *
+ * Returns: a virtual address which maps to @paddr
+ */
+#ifndef phys_to_virt
+static inline void *phys_to_virt(phys_addr_t paddr)
+{
+   return (void *)(unsigned long)paddr;
+}
+#endif
+
+/**
+ * virt_to_phys() - Return the physical address that a virtual address maps to
+ * @vaddr: the virtual address
+ *
+ * Returns the physical address which the CPU-accessible virtual address @vaddr
+ * maps to.
+ *
+ * Returns: the physical address which @vaddr maps to
+ */
+#ifndef virt_to_phys
+static inline phys_addr_t virt_to_phys(void *vaddr)
+{
+   return (phys_addr_t)((unsigned long)vaddr);
+}
+#endif
+
+/*
+ * Flags for use with map_physmem() & unmap_physmem(). Architectures need not
+ * support all of these, in which case they will be defined as zero here &
+ * ignored. Callers that may run on multiple architectures should therefore
+ * treat them as hints rather than requirements.
+ */
+#ifndef MAP_NOCACHE
+# define MAP_NOCACHE   0   /* Produce an uncached mapping */
+#endif
+#ifndef MAP_WRCOMBINE
+# define MAP_WRCOMBINE 0   /* Allow write-combining on the mapping */
+#endif
+#ifndef MAP_WRBACK
+# define MAP_WRBACK0   /* Map using write-back caching */
+#endif
+#ifndef MAP_WRTHROUGH
+# define MAP_WRTHROUGH 0   /* Map using write-through caching */
+#endif
+
+/**
+ * map_physmem() - Return a virtual address mapped to a given physical address
+ * @paddr: the physical address
+ * @len: the length of the required mapping
+ * @flags: flags affecting the type of mapping
+ *
+ * Return a virtual address through which the CPU may access the memory at
+ * physical address @paddr. The mapping will be valid for at least @len bytes,
+ * and may be affected by flags passed to the @flags argument. This function
+ * may create new mappings, so should generally be paire

[U-Boot] [PATCH v2 00/13] Add asm-generic/io.h; virt_to_phys(), phys_to_virt() for all arches

2017-09-14 Thread Paul Burton
This series introduces a new asm-generic/io.h header & makes use of it
to reduce duplication between architectures & ensure they all
consistently provide implementations of virt_to_phys() & phys_to_virt().

This was split out from an earlier series which goes on to use
phys_to_virt(), in order to simplify the process of getting it merged
by doing so piecemeal. The v1 patches can be seen at [1].

Thanks,
Paul

[1] https://patchwork.ozlabs.org/bundle/paulburton/old-asm-generic-io/?state=*

Paul Burton (13):
  Provide a generic io.h & address mapping functions
  arc: Use asm-generic/io.h
  arm: Use asm-generic/io.h
  m68k: Use asm-generic/io.h
  microblaze: Use asm-generic/io.h
  nds32: Use asm-generic/io.h
  sh: Use asm-generic/io.h
  x86: Use asm-generic/io.h
  xtensa: Use asm-generic/io.h
  mips: Use asm-generic/io.h
  nios2: Use asm-generic/io.h
  powerpc: Use asm-generic/io.h
  sandbox: Use asm-generic/io.h

 arch/arc/include/asm/io.h|  29 +--
 arch/arm/include/asm/io.h|  30 +--
 arch/m68k/include/asm/io.h   |  29 +--
 arch/microblaze/include/asm/io.h |  29 +--
 arch/mips/include/asm/io.h   |  17 +++---
 arch/nds32/include/asm/io.h  |  32 ++--
 arch/nios2/include/asm/io.h  |  15 +++---
 arch/powerpc/include/asm/io.h|  25 ++---
 arch/sandbox/cpu/cpu.c   |  12 -
 arch/sandbox/include/asm/io.h|  18 +++
 arch/sh/include/asm/io.h |  29 +--
 arch/x86/include/asm/io.h|  31 +--
 arch/xtensa/include/asm/io.h |  25 +
 include/asm-generic/io.h | 110 +++
 14 files changed, 161 insertions(+), 270 deletions(-)
 create mode 100644 include/asm-generic/io.h

-- 
2.14.1

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[U-Boot] [PATCH v2 8/8] test/py: vboot: Remove stderr redirect from openssl command

2017-09-14 Thread Paul Burton
The openssl command specified in test_with_algo() ultimately ends up
being run by RunAndLog::run(), which uses it to construct a Popen object
with the default shell=False. The stderr redirect in the command is
therefore simply passed to openssl as an argument. With at least openssl
1.1.0f this causes openssl, and therefore test_vboot, to fail with:

  genpkey: Use -help for summary.
  Exit code: 1

Any stderr output ought to be captured & stored in the RunAndLog
object's output field and returned from run() via run_and_log() to
test_with_algo() which then ignores it anyway, so we can drop the
shell-like redirection with no ill effects. With this fix test_vboot now
passes for me.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>

---

Changes in v2:
- Place the % operator at the end of the last string line, not the start of the 
next.

 test/py/tests/test_vboot.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index 6e62820743..b1170aa4b0 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -174,8 +174,8 @@ def test_vboot(u_boot_console):
 public_exponent = 65537
 util.run_and_log(cons, 'openssl genpkey -algorithm RSA -out %sdev.key '
  '-pkeyopt rsa_keygen_bits:2048 '
- '-pkeyopt rsa_keygen_pubexp:%d '
- '2>/dev/null'  % (tmpdir, public_exponent))
+ '-pkeyopt rsa_keygen_pubexp:%d' %
+ (tmpdir, public_exponent))
 
 # Create a certificate containing the public key
 util.run_and_log(cons, 'openssl req -batch -new -x509 -key %sdev.key -out '
-- 
2.14.1

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Re: [U-Boot] [PATCH 8/8] test/py: vboot: Remove stderr redirect from openssl command

2017-09-14 Thread Paul Burton
Hi Stephen,

On Thursday, 14 September 2017 13:28:35 PDT Stephen Warren wrote:
> I could have sworn I checked this code ran on Python 3 when I first
> wrote it. Some of the issues you've fixed were clearly introduced since
> then, but not all. Perhaps I'm remembering some other project where I
> used test.py instead. Anyway, the series,
> 
> Reviewed-by: Stephen Warren 

Thanks for the speedy review. I've addressed the nits you raised & submitted 
v2 with your Reviewed-by.

Thanks,
Paul

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[U-Boot] [PATCH v2 6/8] test/py: fit: Open files as binary files

2017-09-14 Thread Paul Burton
The read_file() function in test_fit is used with files that are not
text files, as well as some that are. It is never used in a way that
requires it to decode text files to characters, so open all files in
binary mode such that read() doesn't attempt to decode characters for
files which are not text files.

Without this test_fit fails on python 3.x when reading an FDT in
run_fit_test() with:

  UnicodeDecodeError: 'utf-8' codec can't decode byte 0xd0 in position
   0: invalid continuation byte

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>
---

Changes in v2: None

 test/py/tests/test_fit.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py
index 29b2491f89..01ecde27d5 100755
--- a/test/py/tests/test_fit.py
+++ b/test/py/tests/test_fit.py
@@ -143,7 +143,7 @@ def test_fit(u_boot_console):
 Returns:
 Contents of file as a string
 """
-with open(fname, 'r') as fd:
+with open(fname, 'rb') as fd:
 return fd.read()
 
 def make_dtb():
-- 
2.14.1

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[U-Boot] [PATCH v2 7/8] test/py: hush_if_test: Use open() in place of file()

2017-09-14 Thread Paul Burton
In python 3.x the file() function has been removed. Use open() instead,
which works on both python 2.x & 3.x, and is described as the preferred
method of opening a file by python 2.x documentation anyway.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>
---

Changes in v2: None

 test/py/tests/test_hush_if_test.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/py/tests/test_hush_if_test.py 
b/test/py/tests/test_hush_if_test.py
index c8f4208d31..cdad22b429 100644
--- a/test/py/tests/test_hush_if_test.py
+++ b/test/py/tests/test_hush_if_test.py
@@ -149,7 +149,7 @@ def test_hush_if_test_host_file_exists(u_boot_console):
 exec_hush_if(u_boot_console, expr, False)
 
 try:
-with file(test_file, 'wb'):
+with open(test_file, 'wb'):
 pass
 assert os.path.exists(test_file)
 
-- 
2.14.1

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[U-Boot] [PATCH v2 5/8] test/py: Encode/decode strings for stdio

2017-09-14 Thread Paul Burton
When reading stdin python 3.x will give us byte arrays, and when writing
stdout or stderr it will expect byte arrays. In order to insulate the
rest of the code from this difference, call encode or decode at
appropriate points when reading or writing stdio files. This works fine
on python 2.x too.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>
---

Changes in v2: None

 test/py/multiplexed_log.py | 4 ++--
 test/py/tests/test_ut.py   | 2 +-
 test/py/u_boot_spawn.py| 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py
index bf926c3e77..21bdcb7309 100644
--- a/test/py/multiplexed_log.py
+++ b/test/py/multiplexed_log.py
@@ -140,11 +140,11 @@ class RunAndLog(object):
 if stdout:
 if stderr:
 output += 'stdout:\n'
-output += stdout
+output += stdout.decode('utf8')
 if stderr:
 if stdout:
 output += 'stderr:\n'
-output += stderr
+output += stderr.decode('utf8')
 exit_status = p.returncode
 exception = None
 except subprocess.CalledProcessError as cpe:
diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py
index 5c25a2d465..1f40e2c2d0 100644
--- a/test/py/tests/test_ut.py
+++ b/test/py/tests/test_ut.py
@@ -14,7 +14,7 @@ def test_ut_dm_init(u_boot_console):
 data = 'this is a test'
 data += '\x00' * ((4 * 1024 * 1024) - len(data))
 with open(fn, 'wb') as fh:
-fh.write(data)
+fh.write(data.encode('utf-8'))
 
 fn = u_boot_console.config.source_dir + '/spi.bin'
 if not os.path.exists(fn):
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 638c5dd31d..751302a529 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -114,7 +114,7 @@ class Spawn(object):
 Nothing.
 """
 
-os.write(self.fd, data)
+os.write(self.fd, data.encode('utf8'))
 
 def expect(self, patterns):
 """Wait for the sub-process to emit specific data.
@@ -172,7 +172,7 @@ class Spawn(object):
 events = self.poll.poll(poll_maxwait)
 if not events:
 raise Timeout()
-c = os.read(self.fd, 1024)
+c = os.read(self.fd, 1024).decode('utf8')
 if not c:
 raise EOFError()
 if self.logfile_read:
-- 
2.14.1

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[U-Boot] [PATCH v2 4/8] test/py: Import StringIO from io module for python 3.x

2017-09-14 Thread Paul Burton
In python 3.x the StringIO module is gone, and instead StringIO can be
imported from the io module. Do this in order to run on python 3.x, and
fall back to importing StringIO as a module in order to continue working
with python 2.x.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>

---

Changes in v2:
- Try python 3.x style, fall back to python 2.x style rather than the reverse.

 test/py/conftest.py | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/test/py/conftest.py b/test/py/conftest.py
index bf55bd3d13..0d564942d0 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -20,7 +20,6 @@ import os.path
 import pytest
 from _pytest.runner import runtestprotocol
 import re
-import StringIO
 import sys
 
 try:
@@ -28,6 +27,11 @@ try:
 except:
 import ConfigParser as configparser
 
+try:
+from io import StringIO
+except ImportError:
+from StringIO import StringIO
+
 # Globals: The HTML log file, and the connection to the U-Boot console.
 log = None
 console = None
@@ -170,7 +174,7 @@ def pytest_configure(config):
 
 with open(dot_config, 'rt') as f:
 ini_str = '[root]\n' + f.read()
-ini_sio = StringIO.StringIO(ini_str)
+ini_sio = StringIO(ini_str)
 parser = configparser.RawConfigParser()
 parser.readfp(ini_sio)
 ubconfig.buildconfig.update(parser.items('root'))
-- 
2.14.1

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[U-Boot] [PATCH v2 3/8] test/py: Import 'configparser' lower case to be python 3.x safe

2017-09-14 Thread Paul Burton
In python 3.x the configparser module is named with all lower case.
Import it as such in order to avoid errors when running on python 3.x,
and fall back to the CamelCase version in order to keep working with
python 2.x.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>

---

Changes in v2:
- Import python 2.x ConfigParser as the python 3.x style configparser, rather 
than the other way around.

 test/py/conftest.py | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/test/py/conftest.py b/test/py/conftest.py
index ced96f1006..bf55bd3d13 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -19,11 +19,15 @@ import os
 import os.path
 import pytest
 from _pytest.runner import runtestprotocol
-import ConfigParser
 import re
 import StringIO
 import sys
 
+try:
+import configparser
+except:
+import ConfigParser as configparser
+
 # Globals: The HTML log file, and the connection to the U-Boot console.
 log = None
 console = None
@@ -167,7 +171,7 @@ def pytest_configure(config):
 with open(dot_config, 'rt') as f:
 ini_str = '[root]\n' + f.read()
 ini_sio = StringIO.StringIO(ini_str)
-parser = ConfigParser.RawConfigParser()
+parser = configparser.RawConfigParser()
 parser.readfp(ini_sio)
 ubconfig.buildconfig.update(parser.items('root'))
 
-- 
2.14.1

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[U-Boot] [PATCH v2 2/8] test/py: Use range() rather than xrange()

2017-09-14 Thread Paul Burton
In python 3.x the xrange() function has been removed, and range()
returns an iterator much like Python 2.x's xrange(). Simply use range()
in place of xrange() in order to work on both python 2.x & 3.x. This
will mean a small cost on python 2.x since range() will return a list
there rather than an iterator, but the cost should be negligible.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>
---

Changes in v2: None

 test/py/u_boot_console_sandbox.py | 2 +-
 test/py/u_boot_spawn.py   | 6 +++---
 test/py/u_boot_utils.py   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/test/py/u_boot_console_sandbox.py 
b/test/py/u_boot_console_sandbox.py
index 9a2fe9cb59..5c91d926c5 100644
--- a/test/py/u_boot_console_sandbox.py
+++ b/test/py/u_boot_console_sandbox.py
@@ -82,7 +82,7 @@ class ConsoleSandbox(ConsoleBase):
 
 p = self.p
 self.p = None
-for i in xrange(100):
+for i in range(100):
 ret = not p.isalive()
 if ret:
 break
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 15ca4ac838..638c5dd31d 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -135,7 +135,7 @@ class Spawn(object):
 the expected time.
 """
 
-for pi in xrange(len(patterns)):
+for pi in range(len(patterns)):
 if type(patterns[pi]) == type(''):
 patterns[pi] = re.compile(patterns[pi])
 
@@ -144,7 +144,7 @@ class Spawn(object):
 while True:
 earliest_m = None
 earliest_pi = None
-for pi in xrange(len(patterns)):
+for pi in range(len(patterns)):
 pattern = patterns[pi]
 m = pattern.search(self.buf)
 if not m:
@@ -199,7 +199,7 @@ class Spawn(object):
 """
 
 os.close(self.fd)
-for i in xrange(100):
+for i in range(100):
 if not self.isalive():
 break
 time.sleep(0.1)
diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py
index 2ba4baed07..264508da4e 100644
--- a/test/py/u_boot_utils.py
+++ b/test/py/u_boot_utils.py
@@ -120,7 +120,7 @@ def wait_until_open_succeeds(fn):
 An open file handle to the file.
 """
 
-for i in xrange(100):
+for i in range(100):
 fh = attempt_to_open_file(fn)
 if fh:
 return fh
@@ -143,7 +143,7 @@ def wait_until_file_open_fails(fn, ignore_errors):
 Nothing.
 """
 
-for i in xrange(100):
+for i in range(100):
 fh = attempt_to_open_file(fn)
 if not fh:
 return
-- 
2.14.1

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[U-Boot] [PATCH v2 1/8] test/py: Make print statements python 3.x safe

2017-09-14 Thread Paul Burton
In python 3.x print must be called as a function rather than used as a
statement. Update uses of print to the function call syntax in order to
be python 3.x safe.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Reviewed-by: Stephen Warren <swar...@nvidia.com>
---

Changes in v2: None

 test/py/conftest.py   |  2 +-
 test/py/test.py   |  6 --
 test/py/tests/test_fit.py | 12 +++-
 test/py/u_boot_console_sandbox.py |  2 +-
 test/py/u_boot_spawn.py   |  2 +-
 5 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/test/py/conftest.py b/test/py/conftest.py
index 65e1d75626..ced96f1006 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -545,7 +545,7 @@ def pytest_runtest_protocol(item, nextitem):
 # is fixed, if this exception still exists, it will then be logged as
 # part of the test's stdout.
 import traceback
-print 'Exception occurred while logging runtest status:'
+print('Exception occurred while logging runtest status:')
 traceback.print_exc()
 # FIXME: Can we force a test failure here?
 
diff --git a/test/py/test.py b/test/py/test.py
index 74e560a4d3..215f2651a7 100755
--- a/test/py/test.py
+++ b/test/py/test.py
@@ -8,6 +8,8 @@
 # Wrapper script to invoke pytest with the directory name that contains the
 # U-Boot tests.
 
+from __future__ import print_function
+
 import os
 import os.path
 import sys
@@ -27,7 +29,7 @@ except:
 traceback.print_exc()
 # Hint to the user that they likely simply haven't installed the required
 # dependencies.
-print >>sys.stderr, '''
+print('''
 exec(py.test) failed; perhaps you are missing some dependencies?
-See test/py/README.md for the list.'''
+See test/py/README.md for the list.''', file=sys.stderr)
 sys.exit(1)
diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py
index 7e6b96dae4..29b2491f89 100755
--- a/test/py/tests/test_fit.py
+++ b/test/py/tests/test_fit.py
@@ -4,6 +4,8 @@
 #
 # Sanity check of the FIT handling in U-Boot
 
+from __future__ import print_function
+
 import os
 import pytest
 import struct
@@ -153,7 +155,7 @@ def test_fit(u_boot_console):
 src = make_fname('u-boot.dts')
 dtb = make_fname('u-boot.dtb')
 with open(src, 'w') as fd:
-print >> fd, base_fdt
+print(base_fdt, file=fd)
 util.run_and_log(cons, ['dtc', src, '-O', 'dtb', '-o', dtb])
 return dtb
 
@@ -167,7 +169,7 @@ def test_fit(u_boot_console):
 """
 its = make_fname('test.its')
 with open(its, 'w') as fd:
-print >> fd, base_its % params
+print(base_its % params, file=fd)
 return its
 
 def make_fit(mkimage, params):
@@ -186,7 +188,7 @@ def test_fit(u_boot_console):
 its = make_its(params)
 util.run_and_log(cons, [mkimage, '-f', its, fit])
 with open(make_fname('u-boot.dts'), 'w') as fd:
-print >> fd, base_fdt
+print(base_fdt, file=fd)
 return fit
 
 def make_kernel(filename, text):
@@ -202,7 +204,7 @@ def test_fit(u_boot_console):
 for i in range(100):
 data += 'this %s %d is unlikely to boot\n' % (text, i)
 with open(fname, 'w') as fd:
-print >> fd, data
+print(data, file=fd)
 return fname
 
 def make_ramdisk(filename, text):
@@ -216,7 +218,7 @@ def test_fit(u_boot_console):
 for i in range(100):
 data += '%s %d was seldom used in the middle ages\n' % (text, i)
 with open(fname, 'w') as fd:
-print >> fd, data
+print(data, file=fd)
 return fname
 
 def find_matching(text, match):
diff --git a/test/py/u_boot_console_sandbox.py 
b/test/py/u_boot_console_sandbox.py
index 647e1f879f..9a2fe9cb59 100644
--- a/test/py/u_boot_console_sandbox.py
+++ b/test/py/u_boot_console_sandbox.py
@@ -42,7 +42,7 @@ class ConsoleSandbox(ConsoleBase):
 bcfg = self.config.buildconfig
 config_spl = bcfg.get('config_spl', 'n') == 'y'
 fname = '/spl/u-boot-spl' if config_spl else '/u-boot'
-print fname
+print(fname)
 cmd = []
 if self.config.gdbserver:
 cmd += ['gdbserver', self.config.gdbserver]
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 3a0fbfad90..15ca4ac838 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -59,7 +59,7 @@ class Spawn(object):
 os.chdir(cwd)
 os.execvp(args[0], args)
 except:
-print 'CHILD EXECEPTION:'
+print('CHILD EXECEPTION:')
 import traceback
 traceback.print_exc()
 finally:
-- 
2.14.1

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[U-Boot] [PATCH v2 0/8] test/py: Fixes for python 3.x

2017-09-14 Thread Paul Burton
This series allows test/py to run on python 3.x in addition to the
already supported python 2.x. With it applied I currently see only one
failure (test_ut[ut_dm_usb_flash]) which doesn't appear to be python
related when running with:

$ ./test/py/test.py --bd sandbox --build

Thanks,
Paul

Paul Burton (8):
  test/py: Make print statements python 3.x safe
  test/py: Use range() rather than xrange()
  test/py: Import 'configparser' lower case to be python 3.x safe
  test/py: Import StringIO from io module for python 3.x
  test/py: Encode/decode strings for stdio
  test/py: fit: Open files as binary files
  test/py: hush_if_test: Use open() in place of file()
  test/py: vboot: Remove stderr redirect from openssl command

 test/py/conftest.py| 18 +-
 test/py/multiplexed_log.py |  4 ++--
 test/py/test.py|  6 --
 test/py/tests/test_fit.py  | 14 --
 test/py/tests/test_hush_if_test.py |  2 +-
 test/py/tests/test_ut.py   |  2 +-
 test/py/tests/test_vboot.py|  4 ++--
 test/py/u_boot_console_sandbox.py  |  4 ++--
 test/py/u_boot_spawn.py| 12 ++--
 test/py/u_boot_utils.py|  4 ++--
 10 files changed, 41 insertions(+), 29 deletions(-)

-- 
2.14.1

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[U-Boot] [PATCH 8/8] test/py: vboot: Remove stderr redirect from openssl command

2017-09-14 Thread Paul Burton
The openssl command specified in test_with_algo() ultimately ends up
being run by RunAndLog::run(), which uses it to construct a Popen object
with the default shell=False. The stderr redirect in the command is
therefore simply passed to openssl as an argument. With at least openssl
1.1.0f this causes openssl, and therefore test_vboot, to fail with:

  genpkey: Use -help for summary.
  Exit code: 1

Any stderr output ought to be captured & stored in the RunAndLog
object's output field and returned from run() via run_and_log() to
test_with_algo() which then ignores it anyway, so we can drop the
shell-like redirection with no ill effects. With this fix test_vboot now
passes for me.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>

---

 test/py/tests/test_vboot.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py
index 6e62820743..ba86a08e2e 100644
--- a/test/py/tests/test_vboot.py
+++ b/test/py/tests/test_vboot.py
@@ -174,8 +174,8 @@ def test_vboot(u_boot_console):
 public_exponent = 65537
 util.run_and_log(cons, 'openssl genpkey -algorithm RSA -out %sdev.key '
  '-pkeyopt rsa_keygen_bits:2048 '
- '-pkeyopt rsa_keygen_pubexp:%d '
- '2>/dev/null'  % (tmpdir, public_exponent))
+ '-pkeyopt rsa_keygen_pubexp:%d'
+ % (tmpdir, public_exponent))
 
 # Create a certificate containing the public key
 util.run_and_log(cons, 'openssl req -batch -new -x509 -key %sdev.key -out '
-- 
2.14.1

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[U-Boot] [PATCH 5/8] test/py: Encode/decode strings for stdio

2017-09-14 Thread Paul Burton
When reading stdin python 3.x will give us byte arrays, and when writing
stdout or stderr it will expect byte arrays. In order to insulate the
rest of the code from this difference, call encode or decode at
appropriate points when reading or writing stdio files. This works fine
on python 2.x too.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/multiplexed_log.py | 4 ++--
 test/py/tests/test_ut.py   | 2 +-
 test/py/u_boot_spawn.py| 4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/test/py/multiplexed_log.py b/test/py/multiplexed_log.py
index bf926c3e77..21bdcb7309 100644
--- a/test/py/multiplexed_log.py
+++ b/test/py/multiplexed_log.py
@@ -140,11 +140,11 @@ class RunAndLog(object):
 if stdout:
 if stderr:
 output += 'stdout:\n'
-output += stdout
+output += stdout.decode('utf8')
 if stderr:
 if stdout:
 output += 'stderr:\n'
-output += stderr
+output += stderr.decode('utf8')
 exit_status = p.returncode
 exception = None
 except subprocess.CalledProcessError as cpe:
diff --git a/test/py/tests/test_ut.py b/test/py/tests/test_ut.py
index 5c25a2d465..1f40e2c2d0 100644
--- a/test/py/tests/test_ut.py
+++ b/test/py/tests/test_ut.py
@@ -14,7 +14,7 @@ def test_ut_dm_init(u_boot_console):
 data = 'this is a test'
 data += '\x00' * ((4 * 1024 * 1024) - len(data))
 with open(fn, 'wb') as fh:
-fh.write(data)
+fh.write(data.encode('utf-8'))
 
 fn = u_boot_console.config.source_dir + '/spi.bin'
 if not os.path.exists(fn):
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 638c5dd31d..751302a529 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -114,7 +114,7 @@ class Spawn(object):
 Nothing.
 """
 
-os.write(self.fd, data)
+os.write(self.fd, data.encode('utf8'))
 
 def expect(self, patterns):
 """Wait for the sub-process to emit specific data.
@@ -172,7 +172,7 @@ class Spawn(object):
 events = self.poll.poll(poll_maxwait)
 if not events:
 raise Timeout()
-c = os.read(self.fd, 1024)
+c = os.read(self.fd, 1024).decode('utf8')
 if not c:
 raise EOFError()
 if self.logfile_read:
-- 
2.14.1

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[U-Boot] [PATCH 6/8] test/py: fit: Open files as binary files

2017-09-14 Thread Paul Burton
The read_file() function in test_fit is used with files that are not
text files, as well as some that are. It is never used in a way that
requires it to decode text files to characters, so open all files in
binary mode such that read() doesn't attempt to decode characters for
files which are not text files.

Without this test_fit fails on python 3.x when reading an FDT in
run_fit_test() with:

  UnicodeDecodeError: 'utf-8' codec can't decode byte 0xd0 in position
   0: invalid continuation byte

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/tests/test_fit.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py
index 29b2491f89..01ecde27d5 100755
--- a/test/py/tests/test_fit.py
+++ b/test/py/tests/test_fit.py
@@ -143,7 +143,7 @@ def test_fit(u_boot_console):
 Returns:
 Contents of file as a string
 """
-with open(fname, 'r') as fd:
+with open(fname, 'rb') as fd:
 return fd.read()
 
 def make_dtb():
-- 
2.14.1

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[U-Boot] [PATCH 7/8] test/py: hush_if_test: Use open() in place of file()

2017-09-14 Thread Paul Burton
In python 3.x the file() function has been removed. Use open() instead,
which works on both python 2.x & 3.x, and is described as the preferred
method of opening a file by python 2.x documentation anyway.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/tests/test_hush_if_test.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/py/tests/test_hush_if_test.py 
b/test/py/tests/test_hush_if_test.py
index c8f4208d31..cdad22b429 100644
--- a/test/py/tests/test_hush_if_test.py
+++ b/test/py/tests/test_hush_if_test.py
@@ -149,7 +149,7 @@ def test_hush_if_test_host_file_exists(u_boot_console):
 exec_hush_if(u_boot_console, expr, False)
 
 try:
-with file(test_file, 'wb'):
+with open(test_file, 'wb'):
 pass
 assert os.path.exists(test_file)
 
-- 
2.14.1

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[U-Boot] [PATCH 4/8] test/py: Import StringIO from io module for python 3.x

2017-09-14 Thread Paul Burton
In python 3.x the StringIO module is gone, and instead StringIO can be
imported from the io module. Do this in order to run on python 3.x, and
fall back to importing StringIO as a module in order to continue working
with python 2.x.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/conftest.py | 8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/test/py/conftest.py b/test/py/conftest.py
index dc444cc866..98093540fd 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -20,7 +20,6 @@ import os.path
 import pytest
 from _pytest.runner import runtestprotocol
 import re
-import StringIO
 import sys
 
 try:
@@ -28,6 +27,11 @@ try:
 except:
 import ConfigParser
 
+try:
+from StringIO import StringIO
+except ImportError:
+from io import StringIO
+
 # Globals: The HTML log file, and the connection to the U-Boot console.
 log = None
 console = None
@@ -170,7 +174,7 @@ def pytest_configure(config):
 
 with open(dot_config, 'rt') as f:
 ini_str = '[root]\n' + f.read()
-ini_sio = StringIO.StringIO(ini_str)
+ini_sio = StringIO(ini_str)
 parser = ConfigParser.RawConfigParser()
 parser.readfp(ini_sio)
 ubconfig.buildconfig.update(parser.items('root'))
-- 
2.14.1

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[U-Boot] [PATCH 3/8] test/py: Import 'configparser' lower case to be python 3.x safe

2017-09-14 Thread Paul Burton
In python 3.x the configparser module is named with all lower case.
Import it as such in order to avoid errors when running on python 3.x,
and fall back to the CamelCase version in order to keep working with
python 2.x.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/conftest.py | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/test/py/conftest.py b/test/py/conftest.py
index ced96f1006..dc444cc866 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -19,11 +19,15 @@ import os
 import os.path
 import pytest
 from _pytest.runner import runtestprotocol
-import ConfigParser
 import re
 import StringIO
 import sys
 
+try:
+import configparser as ConfigParser
+except:
+import ConfigParser
+
 # Globals: The HTML log file, and the connection to the U-Boot console.
 log = None
 console = None
-- 
2.14.1

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[U-Boot] [PATCH 2/8] test/py: Use range() rather than xrange()

2017-09-14 Thread Paul Burton
In python 3.x the xrange() function has been removed, and range()
returns an iterator much like Python 2.x's xrange(). Simply use range()
in place of xrange() in order to work on both python 2.x & 3.x. This
will mean a small cost on python 2.x since range() will return a list
there rather than an iterator, but the cost should be negligible.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/u_boot_console_sandbox.py | 2 +-
 test/py/u_boot_spawn.py   | 6 +++---
 test/py/u_boot_utils.py   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/test/py/u_boot_console_sandbox.py 
b/test/py/u_boot_console_sandbox.py
index 9a2fe9cb59..5c91d926c5 100644
--- a/test/py/u_boot_console_sandbox.py
+++ b/test/py/u_boot_console_sandbox.py
@@ -82,7 +82,7 @@ class ConsoleSandbox(ConsoleBase):
 
 p = self.p
 self.p = None
-for i in xrange(100):
+for i in range(100):
 ret = not p.isalive()
 if ret:
 break
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 15ca4ac838..638c5dd31d 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -135,7 +135,7 @@ class Spawn(object):
 the expected time.
 """
 
-for pi in xrange(len(patterns)):
+for pi in range(len(patterns)):
 if type(patterns[pi]) == type(''):
 patterns[pi] = re.compile(patterns[pi])
 
@@ -144,7 +144,7 @@ class Spawn(object):
 while True:
 earliest_m = None
 earliest_pi = None
-for pi in xrange(len(patterns)):
+for pi in range(len(patterns)):
 pattern = patterns[pi]
 m = pattern.search(self.buf)
 if not m:
@@ -199,7 +199,7 @@ class Spawn(object):
 """
 
 os.close(self.fd)
-for i in xrange(100):
+for i in range(100):
 if not self.isalive():
 break
 time.sleep(0.1)
diff --git a/test/py/u_boot_utils.py b/test/py/u_boot_utils.py
index 2ba4baed07..264508da4e 100644
--- a/test/py/u_boot_utils.py
+++ b/test/py/u_boot_utils.py
@@ -120,7 +120,7 @@ def wait_until_open_succeeds(fn):
 An open file handle to the file.
 """
 
-for i in xrange(100):
+for i in range(100):
 fh = attempt_to_open_file(fn)
 if fh:
 return fh
@@ -143,7 +143,7 @@ def wait_until_file_open_fails(fn, ignore_errors):
 Nothing.
 """
 
-for i in xrange(100):
+for i in range(100):
 fh = attempt_to_open_file(fn)
 if not fh:
 return
-- 
2.14.1

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[U-Boot] [PATCH 1/8] test/py: Make print statements python 3.x safe

2017-09-14 Thread Paul Burton
In python 3.x print must be called as a function rather than used as a
statement. Update uses of print to the function call syntax in order to
be python 3.x safe.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 test/py/conftest.py   |  2 +-
 test/py/test.py   |  6 --
 test/py/tests/test_fit.py | 12 +++-
 test/py/u_boot_console_sandbox.py |  2 +-
 test/py/u_boot_spawn.py   |  2 +-
 5 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/test/py/conftest.py b/test/py/conftest.py
index 65e1d75626..ced96f1006 100644
--- a/test/py/conftest.py
+++ b/test/py/conftest.py
@@ -545,7 +545,7 @@ def pytest_runtest_protocol(item, nextitem):
 # is fixed, if this exception still exists, it will then be logged as
 # part of the test's stdout.
 import traceback
-print 'Exception occurred while logging runtest status:'
+print('Exception occurred while logging runtest status:')
 traceback.print_exc()
 # FIXME: Can we force a test failure here?
 
diff --git a/test/py/test.py b/test/py/test.py
index 74e560a4d3..215f2651a7 100755
--- a/test/py/test.py
+++ b/test/py/test.py
@@ -8,6 +8,8 @@
 # Wrapper script to invoke pytest with the directory name that contains the
 # U-Boot tests.
 
+from __future__ import print_function
+
 import os
 import os.path
 import sys
@@ -27,7 +29,7 @@ except:
 traceback.print_exc()
 # Hint to the user that they likely simply haven't installed the required
 # dependencies.
-print >>sys.stderr, '''
+print('''
 exec(py.test) failed; perhaps you are missing some dependencies?
-See test/py/README.md for the list.'''
+See test/py/README.md for the list.''', file=sys.stderr)
 sys.exit(1)
diff --git a/test/py/tests/test_fit.py b/test/py/tests/test_fit.py
index 7e6b96dae4..29b2491f89 100755
--- a/test/py/tests/test_fit.py
+++ b/test/py/tests/test_fit.py
@@ -4,6 +4,8 @@
 #
 # Sanity check of the FIT handling in U-Boot
 
+from __future__ import print_function
+
 import os
 import pytest
 import struct
@@ -153,7 +155,7 @@ def test_fit(u_boot_console):
 src = make_fname('u-boot.dts')
 dtb = make_fname('u-boot.dtb')
 with open(src, 'w') as fd:
-print >> fd, base_fdt
+print(base_fdt, file=fd)
 util.run_and_log(cons, ['dtc', src, '-O', 'dtb', '-o', dtb])
 return dtb
 
@@ -167,7 +169,7 @@ def test_fit(u_boot_console):
 """
 its = make_fname('test.its')
 with open(its, 'w') as fd:
-print >> fd, base_its % params
+print(base_its % params, file=fd)
 return its
 
 def make_fit(mkimage, params):
@@ -186,7 +188,7 @@ def test_fit(u_boot_console):
 its = make_its(params)
 util.run_and_log(cons, [mkimage, '-f', its, fit])
 with open(make_fname('u-boot.dts'), 'w') as fd:
-print >> fd, base_fdt
+print(base_fdt, file=fd)
 return fit
 
 def make_kernel(filename, text):
@@ -202,7 +204,7 @@ def test_fit(u_boot_console):
 for i in range(100):
 data += 'this %s %d is unlikely to boot\n' % (text, i)
 with open(fname, 'w') as fd:
-print >> fd, data
+print(data, file=fd)
 return fname
 
 def make_ramdisk(filename, text):
@@ -216,7 +218,7 @@ def test_fit(u_boot_console):
 for i in range(100):
 data += '%s %d was seldom used in the middle ages\n' % (text, i)
 with open(fname, 'w') as fd:
-print >> fd, data
+print(data, file=fd)
 return fname
 
 def find_matching(text, match):
diff --git a/test/py/u_boot_console_sandbox.py 
b/test/py/u_boot_console_sandbox.py
index 647e1f879f..9a2fe9cb59 100644
--- a/test/py/u_boot_console_sandbox.py
+++ b/test/py/u_boot_console_sandbox.py
@@ -42,7 +42,7 @@ class ConsoleSandbox(ConsoleBase):
 bcfg = self.config.buildconfig
 config_spl = bcfg.get('config_spl', 'n') == 'y'
 fname = '/spl/u-boot-spl' if config_spl else '/u-boot'
-print fname
+print(fname)
 cmd = []
 if self.config.gdbserver:
 cmd += ['gdbserver', self.config.gdbserver]
diff --git a/test/py/u_boot_spawn.py b/test/py/u_boot_spawn.py
index 3a0fbfad90..15ca4ac838 100644
--- a/test/py/u_boot_spawn.py
+++ b/test/py/u_boot_spawn.py
@@ -59,7 +59,7 @@ class Spawn(object):
 os.chdir(cwd)
 os.execvp(args[0], args)
 except:
-print 'CHILD EXECEPTION:'
+print('CHILD EXECEPTION:')
 import traceback
 traceback.print_exc()
 finally:
-- 
2.14.1

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[U-Boot] [PATCH 0/8] test/py: Fixes for python 3.x

2017-09-14 Thread Paul Burton
This series allows test/py to run on python 3.x in addition to the
already supported python 2.x. With it applied I currently see only one
failure (test_ut[ut_dm_usb_flash]) which doesn't appear to be python
related when running with:

$ ./test/py/test.py --bd sandbox --build

Thanks,
Paul

Paul Burton (8):
  test/py: Make print statements python 3.x safe
  test/py: Use range() rather than xrange()
  test/py: Import 'configparser' lower case to be python 3.x safe
  test/py: Import StringIO from io module for python 3.x
  test/py: Encode/decode strings for stdio
  test/py: fit: Open files as binary files
  test/py: hush_if_test: Use open() in place of file()
  test/py: vboot: Remove stderr redirect from openssl command

 test/py/conftest.py| 16 
 test/py/multiplexed_log.py |  4 ++--
 test/py/test.py|  6 --
 test/py/tests/test_fit.py  | 14 --
 test/py/tests/test_hush_if_test.py |  2 +-
 test/py/tests/test_ut.py   |  2 +-
 test/py/tests/test_vboot.py|  4 ++--
 test/py/u_boot_console_sandbox.py  |  4 ++--
 test/py/u_boot_spawn.py| 12 ++--
 test/py/u_boot_utils.py|  4 ++--
 10 files changed, 40 insertions(+), 28 deletions(-)

-- 
2.14.1

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Re: [U-Boot] [PATCH v3 2/2] MIPS: Stop building position independent code

2017-07-31 Thread Paul Burton
On Monday, 31 July 2017 03:52:57 PDT Daniel Schwierzeck wrote:
> 2017-07-30 18:04 GMT+02:00 Álvaro Fernández Rojas :
> > El 30/07/2017 a las 16:05, Daniel Schwierzeck escribió:
> >> Am 30.07.2017 um 14:27 schrieb Álvaro Fernández Rojas:
> >>> I've been a bit busy lately and I couldn't test this until now, but I
> >>> have to say that this commit breaks u-boot bmips support :(
> >>> 
> >>> BTW, I tried this on several bmips boards (one of them is a Netgear
> >>> CG3100D, which uses u-boot.bin instead of u-boot.elf)
> >>> 
> >>> Do you have any idea on what could be hapenning?
> >> 
> >> maybe you need to specify "--emit-relocs" too when linking u-boot.elf
> >> from u-boot-elf.o. But u-boot-elf.o should already contain the correct
> >> .reloc section with the updated relocation entries so you don't need to
> >> rerun the reloc-tool on u-boot.elf.
> > 
> > I tried that and it doesn't work.
> > However, I've just found out that if I remove the relocs call it boots
> > again... https://gist.github.com/Noltari/ce3a6a9dda69e74caf7ba33c9c8ade9a
> 
> I wonder how this can work. Even the u-boot.elf now contains
> position-dependent code so that an update of the relocation entries is
> required there too. Without the updated entries, U-Boot can't execute
> after jumping from relocate_code() to board_init_r(). Did you use a
> clean build if U-Boot?

Indeed - without the .rel section being generated by the mips-relocs tool I'd 
expect relocate_code() to either apply some bogus relocations or none at all 
(depending what's in the memory starting from __rel_start) and then, if it 
gets there at all, for the "relocated" U-Boot to fall over pretty quickly.

Fernandez - I don't suppose you're aware of an emulated version of any of the 
supported bmips systems? That would be an easy way for me to take a look. FYI 
the systems I use most (Boston & Malta) also use u-boot.bin or derivatives 
thereof & I'm sure the .rel section is copied across to it, so I doubt it has 
anything to do with binary formats.

Thanks,
Paul

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Re: [U-Boot] Pull request: u-boot-mips

2017-07-25 Thread Paul Burton
Hi Daniel,

On Tuesday, 25 July 2017 14:38:44 BST Daniel Schwierzeck wrote:
> Hi Paul,
> 
> 2017-07-19 15:04 GMT+02:00 Tom Rini <tr...@konsulko.com>:
> > On Wed, Jul 19, 2017 at 01:59:16PM +0100, Paul Burton wrote:
> >> Hi Tom,
> >> 
> >> On Tuesday, 18 July 2017 02:07:59 BST Tom Rini wrote:
> >> > On Thu, Jul 13, 2017 at 10:58:47AM -0700, Paul Burton wrote:
> >> > > Hi Daniel & Tom,
> >> > > 
> >> > > On Thursday, 13 July 2017 03:51:00 PDT Daniel Schwierzeck wrote:
> >> > > > Hi Paul,
> >> > > > 
> >> > > > 2017-07-13 2:33 GMT+02:00 Tom Rini <tr...@konsulko.com>:
> >> > > > > On Wed, Jul 12, 2017 at 04:57:42PM -0400, Tom Rini wrote:
> >> > > > >> On Wed, Jul 12, 2017 at 10:32:29PM +0200, Daniel Schwierzeck 
wrote:
> >> > > > >> > Hi Tom,
> >> > > > >> > 
> >> > > > >> > This supports dynamic relocation on MIPS without the need for
> >> > > > >> > building
> >> > > > >> > a
> >> > > > >> > position-independent executable. This notably reduces the code
> >> > > > >> > size
> >> > > > >> > for
> >> > > > >> > all MIPS boards.
> >> > > > >> > 
> >> > > > >> > The following changes since commit
> >> > > 
> >> > > d85ca029f257b53a96da6c2fb421e78a003a9943:
> >> > > > >> >   Prepare v2017.07 (2017-07-10 13:07:38 -0400)
> >> > > > >> > 
> >> > > > >> > are available in the git repository at:
> >> > > > >> >   git://git.denx.de/u-boot-mips.git master
> >> > > > >> > 
> >> > > > >> > for you to fetch changes up to
> >> > > 
> >> > > f653dcd5720c4135607211f7304283d7a8ec3b8a:
> >> > > > >> >   MIPS: bootm: Fix broken boot_env_legacy codepath (2017-07-12
> >> > > > >> >   22:10:42
> >> > > > >> >   +0200)>>
> >> > > > >> 
> >> > > > >> I'm seeing:
> >> > > > >>   mips:  +   tplink_wdr4300
> >> > > > >> 
> >> > > > >> +(tplink_wdr4300)pfx##hdr32[idx].field = _val;   \
> >> > > > >> +(tplink_wdr4300)  ^
> >> > > > >> +(tplink_wdr4300) ../tools/mips-relocs.c:51:11: note: ?_val? was
> >> > > > >> declared
> >> > > > >> here +(tplink_wdr4300)   uint64_t _val;  \
> >> > > > >> +(tplink_wdr4300)^
> >> > > > >> +(tplink_wdr4300) ../tools/mips-relocs.c:88:2: note: in
> >> > > > >> expansion of
> >> > > > >> macro ?set_hdr_field? +(tplink_wdr4300)   set_hdr_field(p, idx,
> >> > > > >> field,
> >> > > > >> val)
> >> > > > >> +(tplink_wdr4300)   ^
> >> > > > >> +(tplink_wdr4300) ../tools/mips-relocs.c:408:3: note: in
> >> > > > >> expansion of
> >> > > > >> macro ?set_phdr_field? +(tplink_wdr4300)set_phdr_field(i,
> >> > > > >> p_filesz,
> >> > > > >> load_sz);
> >> > > > >> +(tplink_wdr4300)^~
> >> > > > >> w+(tplink_wdr4300) ../tools/mips-relocs.c: In function ?main?:
> >> > > > >> w+(tplink_wdr4300) ../tools/mips-relocs.c:77:25: warning: ?_val?
> >> > > > >> may
> >> > > > >> be
> >> > > > >> used uninitialized in this function [-Wmaybe-uninitialized]
> >> > > > >> 
> >> > > > >> for what I suspect is going to be all MIPS.  Host tools here are
> >> > > > >> gcc-6.3.
> >> > > > > 
> >> > > > > Yeah, this is all MIPS boards.  Please fix, thanks!
> >> > > > 
> >> > > > Paul, could you send a follow-up patch to fix this? Thanks.
> >> > > 
> >> > > Sure. I'm on gcc 7.1.1 which doesn't show this issue. Is the
> >> > > following
> >> > > sufficient to fix this for you Tom? I can submit it as a proper patch

[U-Boot] [PATCH] mips-relocs: Fix warning from gcc 6.3

2017-07-25 Thread Paul Burton
It seems that gcc 6.3 at least is smart enough to warn about the _val
variable being unassigned in the default case in the set_hdr_field()
macro, but not smart enough to figure out that the default case is never
taken. This results in warnings such as the following:

  pfx##hdr32[idx].field = _val;   \
  ^
 ../tools/mips-relocs.c:51:11: note: _val was declared here
   uint64_t _val;  \
^
 ../tools/mips-relocs.c:88:2: note: in expansion of macro set_hdr_field
   set_hdr_field(p, idx, field, val)
   ^
 ../tools/mips-relocs.c:408:3: note: in expansion of macro set_phdr_field
set_phdr_field(i, p_filesz, load_sz);
^~
 ../tools/mips-relocs.c: In function main:
 ../tools/mips-relocs.c:77:25: warning: _val may be used uninitialized
in this function [-Wmaybe-uninitialized]

Avoid this by assigning _val = 0 in the default case, and asserting that
we didn't actually hit it for good measure.

For reference gcc 7.1.1 seems to be smart enough to not hit the above
warning without this patch.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Fixes: 011dd93ca97a ("MIPS: Stop building position independent code")
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Tom Rini <tr...@konsulko.com>
Cc: u-boot@lists.denx.de
---
Feel free to fold this in as a fixup for 011dd93ca97a ("MIPS: Stop
building position independent code") if preferred.
---
 tools/mips-relocs.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/tools/mips-relocs.c b/tools/mips-relocs.c
index b690fa53c4..8be69d320f 100644
--- a/tools/mips-relocs.c
+++ b/tools/mips-relocs.c
@@ -6,6 +6,7 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -69,6 +70,11 @@
case 8: \
_val = is_be ? htobe64(val) : htole64(val); \
break;  \
+   default:\
+   /* We should never reach here */\
+   _val = 0;   \
+   assert(0);  \
+   break;  \
}   \
\
if (is_64)  \
-- 
2.13.2

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[U-Boot] [PATCH] mips-relocs: Fix warning from gcc 6.3

2017-07-25 Thread Paul Burton
It seems that gcc 6.3 at least is smart enough to warn about the _val
variable being unassigned in the default case in the set_hdr_field()
macro, but not smart enough to figure out that the default case is never
taken. This results in warnings such as the following:

  pfx##hdr32[idx].field = _val;   \
  ^
 ../tools/mips-relocs.c:51:11: note: _val was declared here
   uint64_t _val;  \
^
 ../tools/mips-relocs.c:88:2: note: in expansion of macro set_hdr_field
   set_hdr_field(p, idx, field, val)
   ^
 ../tools/mips-relocs.c:408:3: note: in expansion of macro set_phdr_field
set_phdr_field(i, p_filesz, load_sz);
^~
 ../tools/mips-relocs.c: In function main:
 ../tools/mips-relocs.c:77:25: warning: _val may be used uninitialized
in this function [-Wmaybe-uninitialized]

Avoid this by assigning _val = 0 in the default case, and asserting that
we didn't actually hit it for good measure.

For reference gcc 7.1.1 seems to be smart enough to not hit the above
warning without this patch.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Fixes: 011dd93ca97a ("MIPS: Stop building position independent code")
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Tom Rini <tr...@konsulko.com>
Cc: u-boot@lists.denx.de
---
Feel free to fold this in as a fixup for 011dd93ca97a ("MIPS: Stop
building position independent code") if preferred.
---
 tools/mips-relocs.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/tools/mips-relocs.c b/tools/mips-relocs.c
index b690fa53c4..8be69d320f 100644
--- a/tools/mips-relocs.c
+++ b/tools/mips-relocs.c
@@ -6,6 +6,7 @@
  * SPDX-License-Identifier:GPL-2.0+
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -69,6 +70,11 @@
case 8: \
_val = is_be ? htobe64(val) : htole64(val); \
break;  \
+   default:\
+   /* We should never reach here */\
+   _val = 0;   \
+   assert(0);  \
+   break;  \
}   \
\
if (is_64)  \
-- 
2.13.2

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Re: [U-Boot] Pull request: u-boot-mips

2017-07-19 Thread Paul Burton
Hi Tom,

On Tuesday, 18 July 2017 02:07:59 BST Tom Rini wrote:
> On Thu, Jul 13, 2017 at 10:58:47AM -0700, Paul Burton wrote:
> > Hi Daniel & Tom,
> > 
> > On Thursday, 13 July 2017 03:51:00 PDT Daniel Schwierzeck wrote:
> > > Hi Paul,
> > > 
> > > 2017-07-13 2:33 GMT+02:00 Tom Rini <tr...@konsulko.com>:
> > > > On Wed, Jul 12, 2017 at 04:57:42PM -0400, Tom Rini wrote:
> > > >> On Wed, Jul 12, 2017 at 10:32:29PM +0200, Daniel Schwierzeck wrote:
> > > >> > Hi Tom,
> > > >> > 
> > > >> > This supports dynamic relocation on MIPS without the need for
> > > >> > building
> > > >> > a
> > > >> > position-independent executable. This notably reduces the code size
> > > >> > for
> > > >> > all MIPS boards.
> > > >> > 
> > > >> > The following changes since commit
> > 
> > d85ca029f257b53a96da6c2fb421e78a003a9943:
> > > >> >   Prepare v2017.07 (2017-07-10 13:07:38 -0400)
> > > >> > 
> > > >> > are available in the git repository at:
> > > >> >   git://git.denx.de/u-boot-mips.git master
> > > >> > 
> > > >> > for you to fetch changes up to
> > 
> > f653dcd5720c4135607211f7304283d7a8ec3b8a:
> > > >> >   MIPS: bootm: Fix broken boot_env_legacy codepath (2017-07-12
> > > >> >   22:10:42
> > > >> >   +0200)>>
> > > >> 
> > > >> I'm seeing:
> > > >>   mips:  +   tplink_wdr4300
> > > >> 
> > > >> +(tplink_wdr4300)pfx##hdr32[idx].field = _val;   \
> > > >> +(tplink_wdr4300)  ^
> > > >> +(tplink_wdr4300) ../tools/mips-relocs.c:51:11: note: ?_val? was
> > > >> declared
> > > >> here +(tplink_wdr4300)   uint64_t _val;  \
> > > >> +(tplink_wdr4300)^
> > > >> +(tplink_wdr4300) ../tools/mips-relocs.c:88:2: note: in expansion of
> > > >> macro ?set_hdr_field? +(tplink_wdr4300)   set_hdr_field(p, idx,
> > > >> field,
> > > >> val)
> > > >> +(tplink_wdr4300)   ^
> > > >> +(tplink_wdr4300) ../tools/mips-relocs.c:408:3: note: in expansion of
> > > >> macro ?set_phdr_field? +(tplink_wdr4300)set_phdr_field(i,
> > > >> p_filesz,
> > > >> load_sz);
> > > >> +(tplink_wdr4300)^~
> > > >> w+(tplink_wdr4300) ../tools/mips-relocs.c: In function ?main?:
> > > >> w+(tplink_wdr4300) ../tools/mips-relocs.c:77:25: warning: ?_val? may
> > > >> be
> > > >> used uninitialized in this function [-Wmaybe-uninitialized]
> > > >> 
> > > >> for what I suspect is going to be all MIPS.  Host tools here are
> > > >> gcc-6.3.
> > > > 
> > > > Yeah, this is all MIPS boards.  Please fix, thanks!
> > > 
> > > Paul, could you send a follow-up patch to fix this? Thanks.
> > 
> > Sure. I'm on gcc 7.1.1 which doesn't show this issue. Is the following
> > sufficient to fix this for you Tom? I can submit it as a proper patch if
> > you like & it works out.
> 
> Oh?  That it doesn't show up with a newer compiler is interesting...

Yeah, I imagine gcc got smarter at recognising that the path it was 
complaining about is never actually taken.

> > Thanks,
> > 
> > Paul
> > 
> > diff --git a/tools/mips-relocs.c b/tools/mips-relocs.c
> > index b690fa53c4..75d532546b 100644
> > --- a/tools/mips-relocs.c
> > +++ b/tools/mips-relocs.c
> > @@ -69,6 +69,9 @@
> > 
> > case 8: \
> > 
> > _val = is_be ? htobe64(val) : htole64(val); \
> > break;  \
> > 
> > +   default:\
> > +   __builtin_unreachable();\
> > +   break;  \
> > 
> > }   \
> 
> I'm not a huge fan of adding builtin calls like this.  Is there some
> other way to restructure the code perhaps, while still being clear?
> Thanks!

An alternative would be to assign _val = 0 to silence the warning, and 
probably call abort() or assert(0) or something similar in that path. Would 
that be preferrable to you?

Thanks,
Paul

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Re: [U-Boot] [PATCH 2/2] MIPS: Stop building position independent code

2017-06-19 Thread Paul Burton
Hi Daniel,

On Monday, 19 June 2017 12:48:12 PDT Daniel Schwierzeck wrote:
> Am 19.06.2017 um 20:53 schrieb Paul Burton:
> > Hi Daniel,
> > 
> > On Friday, 16 June 2017 15:48:06 PDT Daniel Schwierzeck wrote:
> >> Am 16.06.2017 um 02:05 schrieb Paul Burton:
> >>> U-Boot has up until now built with -fpic for the MIPS architecture,
> >>> producing position independent code which uses indirection through a
> >>> global offset table, making relocation fairly straightforward as it
> >>> simply involves patching up GOT entries.
> >>> 
> >>> Using -fpic does however have some downsides. The biggest of these is
> >>> that generated code is bloated in various ways. For example, function
> >>> 
> >>> calls are indirected through the GOT & the t9 register:
> >>>   8f998064   lw t9,-32668(gp)
> >>>   0320f809   jalr   t9
> >>> 
> >>> Without -fpic the call is simply:
> >>>   0f803f01   jalbe00fc04 
> >>> 
> >>> This is more compact & faster (due to the lack of the load & the
> >>> dependency the jump has on its result). It is also easier to read &
> >>> debug because the disassembly shows what function is being called,
> >>> rather than just an offset from gp which would then have to be looked up
> >>> in the ELF to discover the target function.
> >>> 
> >>> Another disadvantage of -fpic is that each function begins with a
> >>> 
> >>> sequence to calculate the value of the gp register, for example:
> >>>   3c1c0004   luigp,0x4
> >>>   279c3384   addiu  gp,gp,13188
> >>>   0399e021   addu   gp,gp,t9
> >>> 
> >>> Without using -fpic this sequence no longer appears at the start of each
> >>> function, reducing code size considerably.
> >>> 
> >>> This patch switches U-Boot from building with -fpic to building with
> >>> -fno-pic, in order to gain the benefits described above. The cost of
> >>> this is an extra step during the build process to extract relocation
> >>> data from the ELF & write it into a new .rel section in a compact
> >>> format, plus the added complexity of dealing with multiple types of
> >>> relocation rather than the single type that applied to the GOT. The
> >>> benefit is smaller, cleaner, more debuggable code. The relocate_code()
> >>> function is reimplemented in C to handle the new relocation scheme,
> >>> which also makes it easier to read & debug.
> >>> 
> >>> Taking maltael_defconfig as an example the size of u-boot.bin built
> >>> using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
> >>> 2.24.90) shrinks from 254KiB to 224KiB.
> >>> 
> >>> Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
> >>> Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
> >>> Cc: u-boot@lists.denx.de
> >>> ---
> >>> 
> >>>  arch/mips/Makefile.postlink|  23 +++
> >>>  arch/mips/config.mk|  19 +-
> >>>  arch/mips/cpu/start.S  | 130 -
> >>>  arch/mips/cpu/u-boot.lds   |  41 +---
> >>>  arch/mips/include/asm/relocs.h |  24 +++
> >>>  arch/mips/lib/Makefile |   1 +
> >>>  arch/mips/lib/reloc.c  | 164 
> >>>  common/board_f.c   |   2 +-
> >>>  tools/.gitignore   |   1 +
> >>>  tools/Makefile |   2 +
> >>>  tools/mips-relocs.c| 426
> >>>  + 11 files changed, 656
> >>>  insertions(+), 177 deletions(-)
> >>>  create mode 100644 arch/mips/Makefile.postlink
> >>>  create mode 100644 arch/mips/include/asm/relocs.h
> >>>  create mode 100644 arch/mips/lib/reloc.c
> >>>  create mode 100644 tools/mips-relocs.c
> >> 
> >> there is a regression on qemu_mips when started with Qemu. The code
> >> execution hangs in an endless loop and doesn't reach the console prompt.
> >> 
> >> I could debug it to following location:
> >> 
> >> int bootm_find_images(int flag, int argc, char * const argv[])
> >> {
> >> 
> >>int ret;
> >>
> >>/* find ramdisk */
> >>ret = boot_get_ramdisk(argc, argv, , IH_INITRD_ARCH,
> >>
> >> 

[U-Boot] [PATCH v3 2/2] MIPS: Stop building position independent code

2017-06-19 Thread Paul Burton
U-Boot has up until now built with -fpic for the MIPS architecture,
producing position independent code which uses indirection through a
global offset table, making relocation fairly straightforward as it
simply involves patching up GOT entries.

Using -fpic does however have some downsides. The biggest of these is
that generated code is bloated in various ways. For example, function
calls are indirected through the GOT & the t9 register:

  8f998064   lw t9,-32668(gp)
  0320f809   jalr   t9

Without -fpic the call is simply:

  0f803f01   jalbe00fc04 

This is more compact & faster (due to the lack of the load & the
dependency the jump has on its result). It is also easier to read &
debug because the disassembly shows what function is being called,
rather than just an offset from gp which would then have to be looked up
in the ELF to discover the target function.

Another disadvantage of -fpic is that each function begins with a
sequence to calculate the value of the gp register, for example:

  3c1c0004   luigp,0x4
  279c3384   addiu  gp,gp,13188
  0399e021   addu   gp,gp,t9

Without using -fpic this sequence no longer appears at the start of each
function, reducing code size considerably.

This patch switches U-Boot from building with -fpic to building with
-fno-pic, in order to gain the benefits described above. The cost of
this is an extra step during the build process to extract relocation
data from the ELF & write it into a new .rel section in a compact
format, plus the added complexity of dealing with multiple types of
relocation rather than the single type that applied to the GOT. The
benefit is smaller, cleaner, more debuggable code. The relocate_code()
function is reimplemented in C to handle the new relocation scheme,
which also makes it easier to read & debug.

Taking maltael_defconfig as an example the size of u-boot.bin built
using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
2.24.90) shrinks from 254KiB to 224KiB.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

Changes in v3:
- Fix R_MIPS_26 case that was breaking qemu_mips_defconfig.

Changes in v2:
- Drop unused .$@.relocs from Makefile.postlink.
- Remove PF_OBJCOPY & assign to OBJCOPYFLAGS directly in config.mk.
- Move declaration of __rel_start to asm/sections.h.

 arch/mips/Makefile.postlink  |  23 +++
 arch/mips/config.mk  |  21 +-
 arch/mips/cpu/start.S| 130 
 arch/mips/cpu/u-boot.lds |  41 +---
 arch/mips/include/asm/relocs.h   |  24 +++
 arch/mips/include/asm/sections.h |   7 +
 arch/mips/lib/Makefile   |   1 +
 arch/mips/lib/reloc.c| 164 +++
 common/board_f.c |   2 +-
 tools/.gitignore |   1 +
 tools/Makefile   |   2 +
 tools/mips-relocs.c  | 426 +++
 12 files changed, 663 insertions(+), 179 deletions(-)
 create mode 100644 arch/mips/Makefile.postlink
 create mode 100644 arch/mips/include/asm/relocs.h
 create mode 100644 arch/mips/lib/reloc.c
 create mode 100644 tools/mips-relocs.c

diff --git a/arch/mips/Makefile.postlink b/arch/mips/Makefile.postlink
new file mode 100644
index 00..7da3acdf52
--- /dev/null
+++ b/arch/mips/Makefile.postlink
@@ -0,0 +1,23 @@
+#
+# Copyright (c) 2017 Imagination Technologies Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+PHONY := __archpost
+__archpost:
+
+-include include/config/auto.conf
+include scripts/Kbuild.include
+
+CMD_RELOCS = tools/mips-relocs
+quiet_cmd_relocs = RELOCS  $@
+  cmd_relocs = $(CMD_RELOCS) $@
+
+u-boot: FORCE
+   @true
+   $(call if_changed,relocs)
+
+.PHONY: FORCE
+
+FORCE:
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 2c72c1553d..cefdbe65e1 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -56,25 +56,14 @@ PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
 # LDFLAGS_vmlinux  += -G 0 -static -n -nostdlib
 # MODFLAGS += -mlong-calls
 #
-# On the other hand, we want PIC in the U-Boot code to relocate it from ROM
-# to RAM. $28 is always used as gp.
-#
-ifdef CONFIG_SPL_BUILD
-PF_ABICALLS:= -mno-abicalls
-PF_PIC := -fno-pic
-PF_PIE :=
-else
-PF_ABICALLS:= -mabicalls
-PF_PIC := -fpic
-PF_PIE := -pie
-PF_OBJCOPY := -j .got -j .rel.dyn -j .padding
-PF_OBJCOPY += -j .dtb.init.rodata
+ifndef CONFIG_SPL_BUILD
+OBJCOPYFLAGS   += -j .got -j .rel -j .padding -j 
.dtb.init.rodata
+LDFLAGS_FINAL  += --emit-relocs
 endif
 
-PLATFORM_CPPFLAGS  += -G 0 $(PF_ABICALLS) $(PF_PIC)
+PLATFORM_CPPFLAGS  += -G 0 -mno-abicalls -fno-pic
 PLATFORM_CPPFLAGS   

Re: [U-Boot] [PATCH 2/2] MIPS: Stop building position independent code

2017-06-19 Thread Paul Burton
Hi Daniel,

On Friday, 16 June 2017 15:48:06 PDT Daniel Schwierzeck wrote:
> Am 16.06.2017 um 02:05 schrieb Paul Burton:
> > U-Boot has up until now built with -fpic for the MIPS architecture,
> > producing position independent code which uses indirection through a
> > global offset table, making relocation fairly straightforward as it
> > simply involves patching up GOT entries.
> > 
> > Using -fpic does however have some downsides. The biggest of these is
> > that generated code is bloated in various ways. For example, function
> > 
> > calls are indirected through the GOT & the t9 register:
> >   8f998064   lw t9,-32668(gp)
> >   0320f809   jalr   t9
> > 
> > Without -fpic the call is simply:
> >   0f803f01   jalbe00fc04 
> > 
> > This is more compact & faster (due to the lack of the load & the
> > dependency the jump has on its result). It is also easier to read &
> > debug because the disassembly shows what function is being called,
> > rather than just an offset from gp which would then have to be looked up
> > in the ELF to discover the target function.
> > 
> > Another disadvantage of -fpic is that each function begins with a
> > 
> > sequence to calculate the value of the gp register, for example:
> >   3c1c0004   luigp,0x4
> >   279c3384   addiu  gp,gp,13188
> >   0399e021   addu   gp,gp,t9
> > 
> > Without using -fpic this sequence no longer appears at the start of each
> > function, reducing code size considerably.
> > 
> > This patch switches U-Boot from building with -fpic to building with
> > -fno-pic, in order to gain the benefits described above. The cost of
> > this is an extra step during the build process to extract relocation
> > data from the ELF & write it into a new .rel section in a compact
> > format, plus the added complexity of dealing with multiple types of
> > relocation rather than the single type that applied to the GOT. The
> > benefit is smaller, cleaner, more debuggable code. The relocate_code()
> > function is reimplemented in C to handle the new relocation scheme,
> > which also makes it easier to read & debug.
> > 
> > Taking maltael_defconfig as an example the size of u-boot.bin built
> > using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
> > 2.24.90) shrinks from 254KiB to 224KiB.
> > 
> > Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
> > Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
> > Cc: u-boot@lists.denx.de
> > ---
> > 
> >  arch/mips/Makefile.postlink|  23 +++
> >  arch/mips/config.mk|  19 +-
> >  arch/mips/cpu/start.S  | 130 -
> >  arch/mips/cpu/u-boot.lds   |  41 +---
> >  arch/mips/include/asm/relocs.h |  24 +++
> >  arch/mips/lib/Makefile |   1 +
> >  arch/mips/lib/reloc.c  | 164 
> >  common/board_f.c   |   2 +-
> >  tools/.gitignore   |   1 +
> >  tools/Makefile |   2 +
> >  tools/mips-relocs.c| 426
> >  + 11 files changed, 656
> >  insertions(+), 177 deletions(-)
> >  create mode 100644 arch/mips/Makefile.postlink
> >  create mode 100644 arch/mips/include/asm/relocs.h
> >  create mode 100644 arch/mips/lib/reloc.c
> >  create mode 100644 tools/mips-relocs.c
> 
> there is a regression on qemu_mips when started with Qemu. The code
> execution hangs in an endless loop and doesn't reach the console prompt.
> 
> I could debug it to following location:
> 
> int bootm_find_images(int flag, int argc, char * const argv[])
> {
>   int ret;
> 
>   /* find ramdisk */
>   ret = boot_get_ramdisk(argc, argv, , IH_INITRD_ARCH,
>  _start, _end);
>   if (ret) {
>   puts("Ramdisk image is corrupt or invalid\n");
>   return 1;
>   }
> ...
> }
> 
> The code flow goes into the "if (ret)" branch. At the "return 1" the $ra
> register contains the address of bootm_find_images(). Thus the code is
> executed in an endless loop. I don't know yet if that's a miscalculated
> relocation or a stack overflow (maybe due to the changed 64KiB alignment
> of the U-Boot relocation address) because $ra in bootm_find_images() is
> loaded from stack:
> 
> bfc08f1c :
> bfc08f1c: 3c02bfc3lui v0,0xbfc3
> bfc08f20: 27bdffe0addiu   sp,sp,-32
> ...
> bfc08f6c: 8fbf001clw  ra,28(sp)
> bfc08f70: 00601025mo

[U-Boot] [PATCH v2 2/2] MIPS: Stop building position independent code

2017-06-16 Thread Paul Burton
U-Boot has up until now built with -fpic for the MIPS architecture,
producing position independent code which uses indirection through a
global offset table, making relocation fairly straightforward as it
simply involves patching up GOT entries.

Using -fpic does however have some downsides. The biggest of these is
that generated code is bloated in various ways. For example, function
calls are indirected through the GOT & the t9 register:

  8f998064   lw t9,-32668(gp)
  0320f809   jalr   t9

Without -fpic the call is simply:

  0f803f01   jalbe00fc04 

This is more compact & faster (due to the lack of the load & the
dependency the jump has on its result). It is also easier to read &
debug because the disassembly shows what function is being called,
rather than just an offset from gp which would then have to be looked up
in the ELF to discover the target function.

Another disadvantage of -fpic is that each function begins with a
sequence to calculate the value of the gp register, for example:

  3c1c0004   luigp,0x4
  279c3384   addiu  gp,gp,13188
  0399e021   addu   gp,gp,t9

Without using -fpic this sequence no longer appears at the start of each
function, reducing code size considerably.

This patch switches U-Boot from building with -fpic to building with
-fno-pic, in order to gain the benefits described above. The cost of
this is an extra step during the build process to extract relocation
data from the ELF & write it into a new .rel section in a compact
format, plus the added complexity of dealing with multiple types of
relocation rather than the single type that applied to the GOT. The
benefit is smaller, cleaner, more debuggable code. The relocate_code()
function is reimplemented in C to handle the new relocation scheme,
which also makes it easier to read & debug.

Taking maltael_defconfig as an example the size of u-boot.bin built
using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
2.24.90) shrinks from 254KiB to 224KiB.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de

---

Changes in v2:
- Drop unused .$@.relocs from Makefile.postlink.
- Remove PF_OBJCOPY & assign to OBJCOPYFLAGS directly in config.mk.
- Move declaration of __rel_start to asm/sections.h.

 arch/mips/Makefile.postlink  |  23 +++
 arch/mips/config.mk  |  21 +-
 arch/mips/cpu/start.S| 130 
 arch/mips/cpu/u-boot.lds |  41 +---
 arch/mips/include/asm/relocs.h   |  24 +++
 arch/mips/include/asm/sections.h |   7 +
 arch/mips/lib/Makefile   |   1 +
 arch/mips/lib/reloc.c| 159 +++
 common/board_f.c |   2 +-
 tools/.gitignore |   1 +
 tools/Makefile   |   2 +
 tools/mips-relocs.c  | 426 +++
 12 files changed, 658 insertions(+), 179 deletions(-)
 create mode 100644 arch/mips/Makefile.postlink
 create mode 100644 arch/mips/include/asm/relocs.h
 create mode 100644 arch/mips/lib/reloc.c
 create mode 100644 tools/mips-relocs.c

diff --git a/arch/mips/Makefile.postlink b/arch/mips/Makefile.postlink
new file mode 100644
index 00..7da3acdf52
--- /dev/null
+++ b/arch/mips/Makefile.postlink
@@ -0,0 +1,23 @@
+#
+# Copyright (c) 2017 Imagination Technologies Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+PHONY := __archpost
+__archpost:
+
+-include include/config/auto.conf
+include scripts/Kbuild.include
+
+CMD_RELOCS = tools/mips-relocs
+quiet_cmd_relocs = RELOCS  $@
+  cmd_relocs = $(CMD_RELOCS) $@
+
+u-boot: FORCE
+   @true
+   $(call if_changed,relocs)
+
+.PHONY: FORCE
+
+FORCE:
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 2c72c1553d..cefdbe65e1 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -56,25 +56,14 @@ PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
 # LDFLAGS_vmlinux  += -G 0 -static -n -nostdlib
 # MODFLAGS += -mlong-calls
 #
-# On the other hand, we want PIC in the U-Boot code to relocate it from ROM
-# to RAM. $28 is always used as gp.
-#
-ifdef CONFIG_SPL_BUILD
-PF_ABICALLS:= -mno-abicalls
-PF_PIC := -fno-pic
-PF_PIE :=
-else
-PF_ABICALLS:= -mabicalls
-PF_PIC := -fpic
-PF_PIE := -pie
-PF_OBJCOPY := -j .got -j .rel.dyn -j .padding
-PF_OBJCOPY += -j .dtb.init.rodata
+ifndef CONFIG_SPL_BUILD
+OBJCOPYFLAGS   += -j .got -j .rel -j .padding -j 
.dtb.init.rodata
+LDFLAGS_FINAL  += --emit-relocs
 endif
 
-PLATFORM_CPPFLAGS  += -G 0 $(PF_ABICALLS) $(PF_PIC)
+PLATFORM_CPPFLAGS  += -G 0 -mno-abicalls -fno-pic
 PLATFORM_CPPFLAGS  += -msoft-float
 PLATFORM_LDFLAGS   += -G 0

Re: [U-Boot] [PATCH 2/2] MIPS: Stop building position independent code

2017-06-16 Thread Paul Burton
Hi Daniel,

On Friday, 16 June 2017 06:49:55 PDT Daniel Schwierzeck wrote:
> Hi Paul,
> 
> Am 16.06.2017 um 02:05 schrieb Paul Burton:
> > U-Boot has up until now built with -fpic for the MIPS architecture,
> > producing position independent code which uses indirection through a
> > global offset table, making relocation fairly straightforward as it
> > simply involves patching up GOT entries.
> > 
> > Using -fpic does however have some downsides. The biggest of these is
> > that generated code is bloated in various ways. For example, function
> > calls are indirected through the GOT & the t9 register:
> > 
> >   8f998064   lw t9,-32668(gp)
> >   0320f809   jalr   t9
> > 
> > Without -fpic the call is simply:
> > 
> >   0f803f01   jalbe00fc04 
> > 
> > This is more compact & faster (due to the lack of the load & the
> > dependency the jump has on its result). It is also easier to read &
> > debug because the disassembly shows what function is being called,
> > rather than just an offset from gp which would then have to be looked up
> > in the ELF to discover the target function.
> > 
> > Another disadvantage of -fpic is that each function begins with a
> > sequence to calculate the value of the gp register, for example:
> > 
> >   3c1c0004   luigp,0x4
> >   279c3384   addiu  gp,gp,13188
> >   0399e021   addu   gp,gp,t9
> > 
> > Without using -fpic this sequence no longer appears at the start of each
> > function, reducing code size considerably.
> > 
> > This patch switches U-Boot from building with -fpic to building with
> > -fno-pic, in order to gain the benefits described above. The cost of
> > this is an extra step during the build process to extract relocation
> > data from the ELF & write it into a new .rel section in a compact
> > format, plus the added complexity of dealing with multiple types of
> > relocation rather than the single type that applied to the GOT. The
> > benefit is smaller, cleaner, more debuggable code. The relocate_code()
> > function is reimplemented in C to handle the new relocation scheme,
> > which also makes it easier to read & debug.
> > 
> > Taking maltael_defconfig as an example the size of u-boot.bin built
> > using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
> > 2.24.90) shrinks from 254KiB to 224KiB.
> > 
> > Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
> > Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
> > Cc: u-boot@lists.denx.de
> 
> nice work, thanks. Nits below

Thanks for reviewing. Hope to get more submitted soon..!

> > ---
> > 
> >  arch/mips/Makefile.postlink|  23 +++
> >  arch/mips/config.mk|  19 +-
> >  arch/mips/cpu/start.S  | 130 -
> >  arch/mips/cpu/u-boot.lds   |  41 +---
> >  arch/mips/include/asm/relocs.h |  24 +++
> >  arch/mips/lib/Makefile |   1 +
> >  arch/mips/lib/reloc.c  | 164 
> >  common/board_f.c   |   2 +-
> >  tools/.gitignore   |   1 +
> >  tools/Makefile |   2 +
> >  tools/mips-relocs.c| 426
> >  + 11 files changed, 656
> >  insertions(+), 177 deletions(-)
> >  create mode 100644 arch/mips/Makefile.postlink
> >  create mode 100644 arch/mips/include/asm/relocs.h
> >  create mode 100644 arch/mips/lib/reloc.c
> >  create mode 100644 tools/mips-relocs.c
> > 
> > diff --git a/arch/mips/Makefile.postlink b/arch/mips/Makefile.postlink
> > new file mode 100644
> > index 00..d6fbc0d404
> > --- /dev/null
> > +++ b/arch/mips/Makefile.postlink
> > @@ -0,0 +1,23 @@
> > +#
> > +# Copyright (c) 2017 Imagination Technologies Ltd.
> > +#
> > +# SPDX-License-Identifier: GPL-2.0+
> > +#
> > +
> > +PHONY := __archpost
> > +__archpost:
> > +
> > +-include include/config/auto.conf
> > +include scripts/Kbuild.include
> > +
> > +CMD_RELOCS = tools/mips-relocs
> > +quiet_cmd_relocs = RELOCS  $@
> > +  cmd_relocs = $(CMD_RELOCS) $@ .$@.relocs
> 
> what's the purpose of .$@.relocs? The mips-relocs tool only has one
> arguments and the kernel Makefile doesn't have this

Well spotted. At one point I experimented with having the mips-relocs tool 
output a separate file then inserting it into the ELF using objcopy, but that 
didn't work out so well. Will remove for v2.

> > +
> > +u-boot: FORCE
> > +   @true
> > +   $(call if_changed,relocs

[U-Boot] [PATCH 2/2] MIPS: Stop building position independent code

2017-06-15 Thread Paul Burton
U-Boot has up until now built with -fpic for the MIPS architecture,
producing position independent code which uses indirection through a
global offset table, making relocation fairly straightforward as it
simply involves patching up GOT entries.

Using -fpic does however have some downsides. The biggest of these is
that generated code is bloated in various ways. For example, function
calls are indirected through the GOT & the t9 register:

  8f998064   lw t9,-32668(gp)
  0320f809   jalr   t9

Without -fpic the call is simply:

  0f803f01   jalbe00fc04 

This is more compact & faster (due to the lack of the load & the
dependency the jump has on its result). It is also easier to read &
debug because the disassembly shows what function is being called,
rather than just an offset from gp which would then have to be looked up
in the ELF to discover the target function.

Another disadvantage of -fpic is that each function begins with a
sequence to calculate the value of the gp register, for example:

  3c1c0004   luigp,0x4
  279c3384   addiu  gp,gp,13188
  0399e021   addu   gp,gp,t9

Without using -fpic this sequence no longer appears at the start of each
function, reducing code size considerably.

This patch switches U-Boot from building with -fpic to building with
-fno-pic, in order to gain the benefits described above. The cost of
this is an extra step during the build process to extract relocation
data from the ELF & write it into a new .rel section in a compact
format, plus the added complexity of dealing with multiple types of
relocation rather than the single type that applied to the GOT. The
benefit is smaller, cleaner, more debuggable code. The relocate_code()
function is reimplemented in C to handle the new relocation scheme,
which also makes it easier to read & debug.

Taking maltael_defconfig as an example the size of u-boot.bin built
using the Codescape MIPS 2016.05-06 toolchain (gcc 4.9.2, binutils
2.24.90) shrinks from 254KiB to 224KiB.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: u-boot@lists.denx.de
---

 arch/mips/Makefile.postlink|  23 +++
 arch/mips/config.mk|  19 +-
 arch/mips/cpu/start.S  | 130 -
 arch/mips/cpu/u-boot.lds   |  41 +---
 arch/mips/include/asm/relocs.h |  24 +++
 arch/mips/lib/Makefile |   1 +
 arch/mips/lib/reloc.c  | 164 
 common/board_f.c   |   2 +-
 tools/.gitignore   |   1 +
 tools/Makefile |   2 +
 tools/mips-relocs.c| 426 +
 11 files changed, 656 insertions(+), 177 deletions(-)
 create mode 100644 arch/mips/Makefile.postlink
 create mode 100644 arch/mips/include/asm/relocs.h
 create mode 100644 arch/mips/lib/reloc.c
 create mode 100644 tools/mips-relocs.c

diff --git a/arch/mips/Makefile.postlink b/arch/mips/Makefile.postlink
new file mode 100644
index 00..d6fbc0d404
--- /dev/null
+++ b/arch/mips/Makefile.postlink
@@ -0,0 +1,23 @@
+#
+# Copyright (c) 2017 Imagination Technologies Ltd.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+PHONY := __archpost
+__archpost:
+
+-include include/config/auto.conf
+include scripts/Kbuild.include
+
+CMD_RELOCS = tools/mips-relocs
+quiet_cmd_relocs = RELOCS  $@
+  cmd_relocs = $(CMD_RELOCS) $@ .$@.relocs
+
+u-boot: FORCE
+   @true
+   $(call if_changed,relocs)
+
+.PHONY: FORCE
+
+FORCE:
diff --git a/arch/mips/config.mk b/arch/mips/config.mk
index 2c72c1553d..56d150171e 100644
--- a/arch/mips/config.mk
+++ b/arch/mips/config.mk
@@ -56,25 +56,16 @@ PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
 # LDFLAGS_vmlinux  += -G 0 -static -n -nostdlib
 # MODFLAGS += -mlong-calls
 #
-# On the other hand, we want PIC in the U-Boot code to relocate it from ROM
-# to RAM. $28 is always used as gp.
-#
-ifdef CONFIG_SPL_BUILD
-PF_ABICALLS:= -mno-abicalls
-PF_PIC := -fno-pic
-PF_PIE :=
-else
-PF_ABICALLS:= -mabicalls
-PF_PIC := -fpic
-PF_PIE := -pie
-PF_OBJCOPY := -j .got -j .rel.dyn -j .padding
+ifndef CONFIG_SPL_BUILD
+PF_OBJCOPY := -j .got -j .rel -j .padding
 PF_OBJCOPY += -j .dtb.init.rodata
+LDFLAGS_FINAL  += --emit-relocs
 endif
 
-PLATFORM_CPPFLAGS  += -G 0 $(PF_ABICALLS) $(PF_PIC)
+PLATFORM_CPPFLAGS  += -G 0 -mno-abicalls -fno-pic
 PLATFORM_CPPFLAGS  += -msoft-float
 PLATFORM_LDFLAGS   += -G 0 -static -n -nostdlib
 PLATFORM_RELFLAGS  += -ffunction-sections -fdata-sections
-LDFLAGS_FINAL  += --gc-sections $(PF_PIE)
+LDFLAGS_FINAL  += --gc-sections
 OBJCOPYFLAGS   += -j .text -j .rodata -j

[U-Boot] [PATCH 1/2] Makefile: Allow arch post-link hook

2017-06-15 Thread Paul Burton
This commit allows an architecture to provide a Makefile.postlink whose
u-boot target gets invoked after the u-boot ELF is linked. This will be
of use for MIPS in a following commit.

This mirrors Linux commit fbe6e37dab97 ("kbuild: add arch specific
post-link Makefile").

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Masahiro Yamada <yamada.masah...@socionext.com>
Cc: Simon Glass <s...@chromium.org>
Cc: u-boot@lists.denx.de
---

 Makefile | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 62d0482bcf..3c3bbc5109 100644
--- a/Makefile
+++ b/Makefile
@@ -1215,13 +1215,16 @@ u-boot.elf: u-boot.bin
$(Q)$(OBJCOPY) -I binary $(PLATFORM_ELFFLAGS) $< u-boot-elf.o
$(call if_changed,u-boot-elf)
 
+ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
+
 # Rule to link u-boot
 # May be overridden by arch/$(ARCH)/config.mk
 quiet_cmd_u-boot__ ?= LD  $@
   cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
   -T u-boot.lds $(u-boot-init) \
   --start-group $(u-boot-main) --end-group \
-  $(PLATFORM_LIBS) -Map u-boot.map
+  $(PLATFORM_LIBS) -Map u-boot.map;\
+  $(if $(ARCH_POSTLINK), $(MAKE) -f $(ARCH_POSTLINK) $@, true)
 
 quiet_cmd_smap = GEN common/system_map.o
 cmd_smap = \
@@ -1231,7 +1234,7 @@ cmd_smap = \
-c $(srctree)/common/system_map.c -o common/system_map.o
 
 u-boot:$(u-boot-init) $(u-boot-main) u-boot.lds FORCE
-   $(call if_changed,u-boot__)
+   +$(call if_changed,u-boot__)
 ifeq ($(CONFIG_KALLSYMS),y)
$(call cmd,smap)
$(call cmd,u-boot__) common/system_map.o
-- 
2.13.1

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Re: [U-Boot] [PATCH 01/27] Provide a generic io.h & address mapping functions

2016-11-17 Thread Paul Burton
On Monday, 3 October 2016 15:49:33 GMT Simon Glass wrote:
> Hi Paul,
> 
> On 1 October 2016 at 08:19, Paul Burton <paul.bur...@imgtec.com> wrote:
> > Most architectures currently supported by U-Boot use trivial
> > implementations of map_to_physmem & virt_to_phys which simply cast a
> > physical address to a pointer for use a virtual address & vice-versa.
> > This results in a lot of duplicate implementations of these mapping
> > functions.
> > 
> > The functions provided by different architectures also differs, with
> > some having implementations of phys_to_virt & others not. A later patch
> > in this series will make use of phys_to_virt, so requires that it be
> > provided for all architectures.
> > 
> > This patch introduces an asm-generic/io.h which provides generic
> > implementations of address mapping functions, allowing the duplication
> > of them between architectures to be removed. Once architectures are
> > converted to make use of this generic header it will also ensure that
> > all of phys_to_virt, virt_to_phys, map_physmem & unmap_physmem are
> > provided. The 2 families of functions differ in that map_physmem may
> > create dynamic mappings whilst phys_to_virt may not & therefore is more
> > limited in scope but doesn't require information such as a length &
> > flags.
> > 
> > This patch doesn't convert any architectures to make use of this generic
> > header - later patches in the series will do so.
> > 
> > Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
> > Cc: Albert Aribaud <albert.u.b...@aribaud.net>
> > Cc: Alexey Brodkin <alexey.brod...@synopsys.com>
> > Cc: Alison Wang <alison.w...@freescale.com>
> > Cc: Angelo Dureghello <ang...@sysam.it>
> > Cc: Bin Meng <bmeng...@gmail.com>
> > Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
> > Cc: Francois Retief <fgret...@spaceteq.co.za>
> > Cc: Macpaul Lin <macp...@andestech.com>
> > Cc: Michal Simek <mon...@monstr.eu>
> > Cc: Mike Frysinger <vap...@gentoo.org>
> > Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
> > Cc: Scott McNutt <smcn...@psyent.com>
> > Cc: Sonic Zhang <sonic@gmail.com>
> > Cc: Thomas Chou <tho...@wytron.com.tw>
> > Cc: Wolfgang Denk <w...@denx.de>
> > ---
> > 
> >  include/asm-generic/io.h | 110
> >  +++ 1 file changed, 110
> >  insertions(+)
> >  create mode 100644 include/asm-generic/io.h
> 
> Reviewed-by: Simon Glass <s...@chromium.org>
> 
> Question and nits below.
> 
> > diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h
> > new file mode 100644
> > index 000..dd3a46d
> > --- /dev/null
> > +++ b/include/asm-generic/io.h
> > @@ -0,0 +1,110 @@
> > +/*
> > + * Generic I/O functions.
> > + *
> > + * Copyright (c) 2016 Imagination Technologies Ltd.
> > + *
> > + * SPDX-License-Identifier:GPL-2.0+
> > + */
> > +
> > +#ifndef __ASM_GENERIC_IO_H__
> > +#define __ASM_GENERIC_IO_H__
> > +
> > +/*
> > + * This file should be included at the end of each architecture-specific
> > + * asm/io.h such that we may provide generic implementations without
> > + * conflicting with architecture-specific code.
> > + */
> > +
> > +#ifndef __ASSEMBLY__
> > +
> > +/**
> > + * phys_to_virt() - Return a virtual address mapped to a given physical
> > address + * @paddr: the physical address
> > + *
> 
> @return

Hi Simon,

I was under the impression that we're following the kernel-doc style, both 
based on the style of existing comments & the statement from the CodingStyle 
page of the wiki:

  U-Boot adopted the kernel-doc annotation style, this is the only exception
  from multi-line comment rule of Coding Style. While not mandatory, adding
  documentation is strongly advised. The Linux kernel kernel-doc document
  applies with no changes.

  (From http://www.denx.de/wiki/U-Boot/CodingStyle)

The kernel-doc-nano-HOWTO.txt file linked to from that wiki paragraph & 
included in the Linux kernel source shows this example:

  /**
   * foobar() - short function description of foobar
   * @arg1: Describe the first argument to foobar.
   * @arg2: Describe the second argument to foobar.
   *One can provide multiple line descriptions
   *for arguments.
   *
   * A longer description, with more discussion of the function foobar()
   * that might be useful to those using or modifying it.  Begins with
   * empty comment line, and

Re: [U-Boot] [PATCH 00/27] Clean up address mapping functions & CONFIG_SYS_SDRAM_BASE

2016-10-03 Thread Paul Burton
On Sunday, 2 October 2016 22:46:45 BST Masahiro Yamada wrote:
> Hi Paul,
> 
> 2016-10-01 23:19 GMT+09:00 Paul Burton <paul.bur...@imgtec.com>:
> > README states that CONFIG_SYS_SDRAM_BASE should be the physical address
> > of the base of SDRAM memory. This is expected by some code such as the
> > PCI layer, which uses CONFIG_SYS_SDRAM_BASE to set up a region for
> > system memory. Other code such as the image loading code used by bootm
> > or the generic board_f.c expect CONFIG_SYS_SDRAM_BASE to be directly
> > accessible by the CPU, which necessitates that it be a virtual address.
> > 
> > Where virtual & physical addresses aren't identity mapped, as is the
> > case for MIPS, we cannot possibly satisfy both. Until now MIPS has used
> > a virtual CONFIG_SYS_SDRAM_BASE. This series fixes up the mess by doing
> > 
> > a few things:
> >   - Ensuring that we provide virt_to_phys() on all architectures.
> >   
> >   - Fixing code that expects to use CONFIG_SYS_SDRAM_BASE as a virtual
> >   
> > address to instead convert it to a physical address using
> > virt_to_phys().
> >   
> >   - Converts MIPS code & all MIPS boards to provide a physical
> >   
> > CONFIG_SYS_SDRAM_BASE, which typically is zero.
> 
> Thanks for working on this.
> 
> As you may notice, include/linux/io.h defines
> the generic implementation of ioremap().
> 
> (It is guarded by #ifndef CONFIG_HAVE_ARCH_IOREMAP
> so that MIPS can work-around it.)

Hi Masahiro,

I hadn't actually noticed the generic ioremap - I suspect few do since you 
don't get it by 
including asm/io.h as you would in Linux. It'll also be wrong for other 
architectures that 
don't do a simple 1:1 physical:virtual translation but don't select 
CONFIG_HAVE_ARCH_IOREMAP (nios2, sandbox).

> If you go with asm-generic/io.h,
> perhaps should we be consistent, that is,
> move the generic ioremap() to asm-generic/io.h?
> 
> We do not have to do it in this series,
> but it would be appreciated
> if you volunteer to make it in a better way.

Yeah I'd be fine with cleaning that up, preferrably after this series is merged 
so I don't have 
more out of tree patches to juggle. I'd propose that we implement the generic 
ioremap 
atop map_physmem, which we ought to be able to do for every arch if we clean up 
MIPS a 
little.

Thanks,
Paul


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Re: [U-Boot] [PATCH 07/23] pci: Handle MIPS systems with virtual CONFIG_SYS_SDRAM_BASE

2016-10-01 Thread Paul Burton
On Tuesday, 27 September 2016 12:01:32 BST Daniel Schwierzeck wrote:
> 2016-09-27 2:35 GMT+02:00 Simon Glass <s...@chromium.org>:
> > Hi Paul,
> > 
> > On 26 September 2016 at 12:29, Paul Burton <paul.bur...@imgtec.com> wrote:
> >> The decode_regions() function in the PCI code presumes that
> >> CONFIG_SYS_SDRAM_BASE is a physical address, which seems reasonable
> >> given that README states that it should be.
> >> 
> >> However there is also common code which expects CONFIG_SYS_SDRAM_BASE to
> >> be an address accessible by the CPU, ie. a valid virtual address -
> >> notably gd->ram_top is set to it & various pieces of data are located
> >> relative to that, and getenv_bootm_low() defaults to
> >> CONFIG_SYS_SDRAM_BASE as the lower bound on addresses to load into. Thus
> >> on MIPS CONFIG_SYS_SDRAM_BASE is a virtual address.
> >> 
> >> This patch takes the simple approach to fixing this & converts
> >> CONFIG_SYS_SDRAM_BASE to a physical address for use by the PCI code when
> >> built for MIPS.
> >> 
> >> Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
> >> 
> >> ---
> >> 
> >>  drivers/pci/pci-uclass.c | 4 +++-
> >>  1 file changed, 3 insertions(+), 1 deletion(-)
> >> 
> >> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> >> index 415c632..26fe0f4 100644
> >> --- a/drivers/pci/pci-uclass.c
> >> +++ b/drivers/pci/pci-uclass.c
> >> @@ -848,7 +848,9 @@ static int decode_regions(struct pci_controller
> >> *hose, const void *blob,>> 
> >> /* Add a region for our local memory */
> >> size = gd->ram_size;
> >> 
> >> -#ifdef CONFIG_SYS_SDRAM_BASE
> >> +#if defined(CONFIG_MIPS)
> >> +   base = virt_to_phys((void *)CONFIG_SYS_SDRAM_BASE);
> >> +#elif defined(CONFIG_SYS_SDRAM_BASE)
> >> 
> >> base = CONFIG_SYS_SDRAM_BASE;
> >>  
> >>  #endif
> >>  
> >> if (gd->pci_ram_top && gd->pci_ram_top < base + size)
> >> 
> >> --
> >> 2.10.0
> > 
> > Can you find another way? We don't want arch- or board-specific
> > #ifdefs in uclasses or driver code.
> 
> I suggest that we fix all MIPS boards to configure
> CONFIG_SYS_SDRAM_BASE as physical address. I guess that would be
> simply 0 for all current supported MIPS boards. In "arch/mips/" there
> are only two users ("arch/mips/cpu/start.S" and
> "arch/mips/lib/bootm.c") which could be easily fixed to map
> CONFIG_SYS_SDRAM_BASE to KSEG0.

Hi Daniel & Simon,

So doing that led to the 27 patch series I just sent out. It's never simple :) 
It's not so much 
the 2 users in arch/mips/ as the generic uses which cause the trouble - and 
avoiding them 
needs something like phys_to_virt() so the bulk of that series is about 
providing that for all 
architectures.

FYI CONFIG_SYS_SDRAM_BASE is zero for all MIPS boards except the PIC32 one. 
I've tested 
the series on a 32 bit Malta & a 64 bit boston, and build tested a bunch of 
other boards. The 
only thing to really take note of is that for MIPS64 systems using a physical 
CONFIG_SYS_SDRAM_BASE and phys_to_virt we end up accessing memory through 
xkphys 
instead of ckseg0. Nothing seems to have exploded too badly from that (just the 
boston 
board_get_usable_ram_top() needed adjusting) but it's probably worth pointing 
out.

Thanks,
Paul


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[U-Boot] [PATCH 26/27] mips: Use a physical CONFIG_SYS_SDRAM_BASE for remaining boards

2016-10-01 Thread Paul Burton
README states that CONFIG_SYS_SDRAM_BASE should the physical base
address of SDRAM, whilst up until now various pieces of generic code
have presumed that it can be directly accessed by the CPU & MIPS has
provided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code
expects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the
inconsistency a mess.

Now that the preceding patches have prepared us to handle using a
physical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for the
remaining MIPS boards by providing a physical CONFIG_SYS_SDRAM_BASE.

None of these boards use CONFIG_SYS_SDRAM_BASE in their code, so they're
handled together.

This has only been build-tested, feedback welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Marek Vasut <ma...@denx.de>
Cc: Purna Chandra Mandal <purna.man...@microchip.com>
Cc: Wills Wang <wills.w...@live.com>
---

 include/configs/ap121.h  | 2 +-
 include/configs/ap143.h  | 2 +-
 include/configs/dbau1x00.h   | 2 +-
 include/configs/pb1x00.h | 2 +-
 include/configs/pic32mzdask.h| 2 +-
 include/configs/qemu-mips.h  | 2 +-
 include/configs/qemu-mips64.h| 2 +-
 include/configs/tplink_wdr4300.h | 2 +-
 include/configs/vct.h| 2 +-
 9 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/configs/ap121.h b/include/configs/ap121.h
index bf5746f..63e0015 100644
--- a/include/configs/ap121.h
+++ b/include/configs/ap121.h
@@ -20,7 +20,7 @@
 #define CONFIG_SYS_MALLOC_LEN   0x4
 #define CONFIG_SYS_BOOTPARAMS_LEN   0x2
 
-#define CONFIG_SYS_SDRAM_BASE   0x8000
+#define CONFIG_SYS_SDRAM_BASE   0x0
 #define CONFIG_SYS_LOAD_ADDR0x8100
 
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/ap143.h b/include/configs/ap143.h
index 5d7e49e..a8721e6 100644
--- a/include/configs/ap143.h
+++ b/include/configs/ap143.h
@@ -20,7 +20,7 @@
 #define CONFIG_SYS_MALLOC_LEN   0x4
 #define CONFIG_SYS_BOOTPARAMS_LEN   0x2
 
-#define CONFIG_SYS_SDRAM_BASE   0x8000
+#define CONFIG_SYS_SDRAM_BASE   0x0
 #define CONFIG_SYS_LOAD_ADDR0x8100
 
 #define CONFIG_SYS_NO_FLASH
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index dbd2bb3..b369d71 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -105,7 +105,7 @@
 
 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 100)
 
-#define CONFIG_SYS_SDRAM_BASE  0x8000 /* Cached addr */
+#define CONFIG_SYS_SDRAM_BASE  0x0/* Cached addr */
 
 #defineCONFIG_SYS_LOAD_ADDR0x8100 /* default load 
address  */
 
diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index fb5278f..8ef334f 100644
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -61,7 +61,7 @@
 
 #define CONFIG_SYS_MIPS_TIMER_FREQ 39600
 
-#define CONFIG_SYS_SDRAM_BASE  0x8000 /* Cached addr */
+#define CONFIG_SYS_SDRAM_BASE  0x0/* Cached addr */
 
 #defineCONFIG_SYS_LOAD_ADDR0x8100 /* default load 
address  */
 
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 49c98d8..5b80b46 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -35,7 +35,7 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE - 1)
 
 /* SDRAM Configuration (for final code, data, stack, heap) */
-#define CONFIG_SYS_SDRAM_BASE  0x8800
+#define CONFIG_SYS_SDRAM_BASE  0x0800
 #define CONFIG_SYS_MALLOC_LEN  (256 << 10)
 #define CONFIG_SYS_BOOTPARAMS_LEN  (4 << 10)
 #define CONFIG_STACKSIZE   (4 << 10) /* regular stack */
diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h
index 546c508..7e839a8 100644
--- a/include/configs/qemu-mips.h
+++ b/include/configs/qemu-mips.h
@@ -94,7 +94,7 @@
 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 100)
 
 /* Cached addr */
-#define CONFIG_SYS_SDRAM_BASE  0x8000
+#define CONFIG_SYS_SDRAM_BASE  0x0
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR   0x8100
diff --git a/include/configs/qemu-mips64.h b/include/configs/qemu-mips64.h
index 6cab719..18e3294 100644
--- a/include/configs/qemu-mips64.h
+++ b/include/configs/qemu-mips64.h
@@ -94,7 +94,7 @@
 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 100)
 
 /* Cached addr */
-#define CONFIG_SYS_SDRAM_BASE  0x8000
+#define CONFIG_SYS_SDRAM_BASE  0x0
 
 /* default load address */
 #define CONFIG_SYS_LOAD_ADDR   0x8100
diff --git a/include/configs/tplink_wdr4300.h b/include/configs/tplink_wdr4300.h
index 7bf8e4c..5a6a0d4 100644
--- a/include/configs/tplink_wdr4300.h
+++ b/include

[U-Boot] [PATCH 27/27] mips: Remove virt_to_phys call on bi_memstart

2016-10-01 Thread Paul Burton
CONFIG_SYS_SDRAM_BASE & by extension bi_memstart are now physical
addresses, so there's no need to call virt_to_phys in arch_fixup_fdt.
Remove the call.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>

---

 arch/mips/lib/bootm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 9fec4ad..00991cb 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -257,7 +257,7 @@ static int boot_reloc_fdt(bootm_headers_t *images)
 int arch_fixup_fdt(void *blob)
 {
 #if CONFIG_IS_ENABLED(MIPS_BOOT_FDT) && CONFIG_IS_ENABLED(OF_LIBFDT)
-   u64 mem_start = virt_to_phys((void *)gd->bd->bi_memstart);
+   u64 mem_start = gd->bd->bi_memstart;
u64 mem_size = gd->ram_size;
 
return fdt_fixup_memory_banks(blob, _start, _size, 1);
-- 
2.10.0

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[U-Boot] [PATCH 24/27] malta: Use a physical CONFIG_SYS_SDRAM_BASE

2016-10-01 Thread Paul Burton
README states that CONFIG_SYS_SDRAM_BASE should the physical base
address of SDRAM, whilst up until now various pieces of generic code
have presumed that it can be directly accessed by the CPU & MIPS has
provided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code
expects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the
inconsistency a mess.

Now that the preceding patches have prepared us to handle using a
physical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for malta by
providing a physical CONFIG_SYS_SDRAM_BASE.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 include/configs/malta.h | 18 ++
 1 file changed, 10 insertions(+), 8 deletions(-)

diff --git a/include/configs/malta.h b/include/configs/malta.h
index fc4baba..5bc9f23 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -39,18 +39,20 @@
  */
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE
 
-#ifdef CONFIG_64BIT
-# define CONFIG_SYS_SDRAM_BASE 0x8000
-#else
-# define CONFIG_SYS_SDRAM_BASE 0x8000
-#endif
+#define CONFIG_SYS_SDRAM_BASE  0x0
 #define CONFIG_SYS_MEM_SIZE(256 * 1024 * 1024)
 
 #define CONFIG_SYS_INIT_SP_OFFSET  0x40
 
-#define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 0x0100)
-#define CONFIG_SYS_MEMTEST_START   (CONFIG_SYS_SDRAM_BASE + 0x0010)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x0080)
+#ifdef CONFIG_64BIT
+# define CONFIG_SYS_LOAD_ADDR  0x8100
+# define CONFIG_SYS_MEMTEST_START  0x8010
+# define CONFIG_SYS_MEMTEST_END0x8080
+#else
+# define CONFIG_SYS_LOAD_ADDR  0x8100
+# define CONFIG_SYS_MEMTEST_START  0x8010
+# define CONFIG_SYS_MEMTEST_END0x8080
+#endif
 
 #define CONFIG_SYS_MALLOC_LEN  (128 * 1024)
 #define CONFIG_SYS_BOOTPARAMS_LEN  (128 * 1024)
-- 
2.10.0

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[U-Boot] [PATCH 25/27] xilfpga: Use a physical CONFIG_SYS_SDRAM_BASE

2016-10-01 Thread Paul Burton
README states that CONFIG_SYS_SDRAM_BASE should the physical base
address of SDRAM, whilst up until now various pieces of generic code
have presumed that it can be directly accessed by the CPU & MIPS has
provided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code
expects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the
inconsistency a mess.

Now that the preceding patches have prepared us to handle using a
physical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for malta by
providing a physical CONFIG_SYS_SDRAM_BASE.

This has only been build-tested, feedback welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
Cc: Zubair Lutfullah Kakakhel <zubair.kakak...@imgtec.com>
---

 include/configs/imgtec_xilfpga.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h
index 0a7fe60..1583f21 100644
--- a/include/configs/imgtec_xilfpga.h
+++ b/include/configs/imgtec_xilfpga.h
@@ -28,10 +28,10 @@
  */
 
 /* SDRAM Configuration (for final code, data, stack, heap) */
-#define CONFIG_SYS_SDRAM_BASE  0x8000
+#define CONFIG_SYS_SDRAM_BASE  0x0
 #define CONFIG_SYS_SDRAM_SIZE  0x0800  /* 128 Mbytes */
 #define CONFIG_SYS_INIT_SP_ADDR\
-   (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000)
+   (0x8000 + CONFIG_SYS_SDRAM_SIZE - 0x1000)
 
 #define CONFIG_SYS_MALLOC_LEN  (256 << 10)
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE
-- 
2.10.0

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[U-Boot] [PATCH 22/27] mips: Ensure stack is at a virtual address

2016-10-01 Thread Paul Burton
In preparation for making CONFIG_SYS_SDRAM_BASE a physical address on
MIPS as README says it should be, ensure that our default
CONFIG_SYS_INIT_SP_ADDR is placed in (c)kseg0 rather than being a simple
offset addition to CONFIG_SYS_SDRAM_BASE.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 arch/mips/cpu/start.S | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S
index 3f0fc12..936d63c 100644
--- a/arch/mips/cpu/start.S
+++ b/arch/mips/cpu/start.S
@@ -8,12 +8,13 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
 
 #ifndef CONFIG_SYS_INIT_SP_ADDR
-#define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + \
+#define CONFIG_SYS_INIT_SP_ADDRCKSEG0ADDR(CONFIG_SYS_SDRAM_BASE + \
CONFIG_SYS_INIT_SP_OFFSET)
 #endif
 
-- 
2.10.0

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[U-Boot] [PATCH 23/27] boston: Provide physical CONFIG_SYS_SDRAM_BASE

2016-10-01 Thread Paul Burton
README states that CONFIG_SYS_SDRAM_BASE should the physical base
address of SDRAM, whilst up until now various pieces of generic code
have presumed that it can be directly accessed by the CPU & MIPS has
provided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code
expects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the
inconsistency a mess.

Now that the preceding patches have prepared us to handle using a
physical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for boston by
providing a physical CONFIG_SYS_SDRAM_BASE. A side effect of this & use
of phys_to_virt is that on MIPS64 U-Boot will now access DDR through the
xkphys region of the virtual address space rather than ckseg0, which
necessitates the change to board_get_usable_ram_top().

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 board/imgtec/boston/ddr.c |  8 ++--
 include/configs/boston.h  | 21 ++---
 2 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c
index ceffef6..e765627 100644
--- a/board/imgtec/boston/ddr.c
+++ b/board/imgtec/boston/ddr.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 
 #include 
 
@@ -21,10 +22,5 @@ ulong board_get_usable_ram_top(ulong total_size)
 {
DECLARE_GLOBAL_DATA_PTR;
 
-   if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) {
-   /* 2GB wrapped around to 0 */
-   return CKSEG0ADDR(256 << 20);
-   }
-
-   return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20));
+   return min_t(ulong, gd->ram_top, (ulong)phys_to_virt(SZ_256M));
 }
diff --git a/include/configs/boston.h b/include/configs/boston.h
index e958054..37060b0 100644
--- a/include/configs/boston.h
+++ b/include/configs/boston.h
@@ -27,20 +27,19 @@
 /*
  * Memory map
  */
-#ifdef CONFIG_64BIT
-# define CONFIG_SYS_SDRAM_BASE 0x8000
-#else
-# define CONFIG_SYS_SDRAM_BASE 0x8000
-#endif
-
+#define CONFIG_SYS_SDRAM_BASE  0x0
 #define CONFIG_SYS_INIT_SP_OFFSET  0x40
-
 #define CONFIG_SYS_MONITOR_BASECONFIG_SYS_TEXT_BASE
 
-#define CONFIG_SYS_LOAD_ADDR   (CONFIG_SYS_SDRAM_BASE + 0x10)
-
-#define CONFIG_SYS_MEMTEST_START   (CONFIG_SYS_SDRAM_BASE + 0)
-#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
+#ifdef CONFIG_64BIT
+# define CONFIG_SYS_LOAD_ADDR  0x8010
+# define CONFIG_SYS_MEMTEST_START  0x8000
+# define CONFIG_SYS_MEMTEST_END0x9000
+#else
+# define CONFIG_SYS_LOAD_ADDR  0x8010
+# define CONFIG_SYS_MEMTEST_START  0x8000
+# define CONFIG_SYS_MEMTEST_END0x9000
+#endif
 
 #define CONFIG_SYS_MALLOC_LEN  (256 * 1024)
 
-- 
2.10.0

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[U-Boot] [PATCH 21/27] mips: Use ram_top, not bi_memsize, in arch_lmb_reserve

2016-10-01 Thread Paul Burton
When calculating the region to reserve for the stack in
arch_lmb_reserve, make use of ram_top instead of adding bi_memsize to
CONFIG_SYS_SDRAM_BASE. This avoids overflow if the system has enough
memory to reach the end of the address space.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 arch/mips/lib/bootm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/lib/bootm.c b/arch/mips/lib/bootm.c
index 0c6a4ab..9fec4ad 100644
--- a/arch/mips/lib/bootm.c
+++ b/arch/mips/lib/bootm.c
@@ -42,7 +42,7 @@ void arch_lmb_reserve(struct lmb *lmb)
 
/* adjust sp by 4K to be safe */
sp -= 4096;
-   lmb_reserve(lmb, sp, CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp);
+   lmb_reserve(lmb, sp, gd->ram_top - sp);
 }
 
 static void linux_cmdline_init(void)
-- 
2.10.0

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[U-Boot] [PATCH 20/27] image: Use ram_top, not bi_memsize, in getenv_bootm_size

2016-10-01 Thread Paul Burton
When determining the region of memory to allow for use by bootm, using
bi_memstart & adding bi_memsize can cause problems if that leads to an
integer overflow. For example on some MIPS systems bi_memstart would be
0x8000 (ie. the start of the MIPS ckseg0 region) and if the
system has 2GB of memory then the addition would wrap around to 0.

The maximum amount of memory to be used by U-Boot is already accounted
for by the ram_top field of struct global_data, so make use of that for
the calculation instead.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 common/image.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/common/image.c b/common/image.c
index 1581022..25e632b 100644
--- a/common/image.c
+++ b/common/image.c
@@ -489,7 +489,7 @@ phys_size_t getenv_bootm_size(void)
size = gd->bd->bi_dram[0].size;
 #else
start = (ulong)phys_to_virt(gd->bd->bi_memstart);
-   size = gd->bd->bi_memsize;
+   size = gd->ram_top - start;
 #endif
 
s = getenv("bootm_low");
-- 
2.10.0

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[U-Boot] [PATCH 19/27] image: Account for CONFIG_SYS_SDRAM_BASE being physical

2016-10-01 Thread Paul Burton
README declares that CONFIG_SYS_SDRAM_BASE is meant to be the physical
address of SDRAM, but right now that is not the case on MIPS systems,
where it is instead a virtual address. In preparation for making it
physical, use phys_to_virt to translate CONFIG_SYS_SDRAM_BASE & the
associated bi_memstart field of struct bd_info to virtual addresses for
use.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 common/image.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/image.c b/common/image.c
index a5d19ab..1581022 100644
--- a/common/image.c
+++ b/common/image.c
@@ -466,7 +466,7 @@ ulong getenv_bootm_low(void)
}
 
 #if defined(CONFIG_SYS_SDRAM_BASE)
-   return CONFIG_SYS_SDRAM_BASE;
+   return (ulong)phys_to_virt(CONFIG_SYS_SDRAM_BASE);
 #elif defined(CONFIG_ARM)
return gd->bd->bi_dram[0].start;
 #else
@@ -488,7 +488,7 @@ phys_size_t getenv_bootm_size(void)
start = gd->bd->bi_dram[0].start;
size = gd->bd->bi_dram[0].size;
 #else
-   start = gd->bd->bi_memstart;
+   start = (ulong)phys_to_virt(gd->bd->bi_memstart);
size = gd->bd->bi_memsize;
 #endif
 
-- 
2.10.0

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[U-Boot] [PATCH 18/27] board_f: Account for CONFIG_SYS_SDRAM_BASE being physical

2016-10-01 Thread Paul Burton
README declares that CONFIG_SYS_SDRAM_BASE is meant to be the physical
address of SDRAM, but right now that is not the case on MIPS systems. In
preparation for making it so, use phys_to_virt to translate
CONFIG_SYS_SDRAM_BASE to the ram_top field of struct global_data which
is then used to calculate most memory addresses used by U-Boot.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 common/board_f.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/common/board_f.c b/common/board_f.c
index 2c88595..1afc80d 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -315,7 +315,7 @@ __weak ulong board_get_usable_ram_top(ulong total_size)
 * Detect whether we have so much RAM that it goes past the end of our
 * 32-bit address space. If so, clip the usable RAM so it doesn't.
 */
-   if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
+   if (gd->ram_top < (ulong)phys_to_virt(CONFIG_SYS_SDRAM_BASE))
/*
 * Will wrap back to top of 32-bit space when reservations
 * are made.
@@ -362,7 +362,7 @@ static int setup_dest_addr(void)
gd->ram_size = board_reserve_ram_top(gd->ram_size);
 
 #ifdef CONFIG_SYS_SDRAM_BASE
-   gd->ram_top = CONFIG_SYS_SDRAM_BASE;
+   gd->ram_top = (ulong)phys_to_virt(CONFIG_SYS_SDRAM_BASE);
 #endif
gd->ram_top += get_effective_memsize();
gd->ram_top = board_get_usable_ram_top(gd->mon_len);
-- 
2.10.0

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[U-Boot] [PATCH 17/27] sandbox: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the sandbox architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As sandbox actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic mapping functions, but are able to
implement phys_to_virt() & make use of it from map_physmem().

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Simon Glass <s...@chromium.org>
---

 arch/sandbox/cpu/cpu.c| 12 +++-
 arch/sandbox/include/asm/io.h | 17 -
 2 files changed, 19 insertions(+), 10 deletions(-)

diff --git a/arch/sandbox/cpu/cpu.c b/arch/sandbox/cpu/cpu.c
index 2def722..e160f62 100644
--- a/arch/sandbox/cpu/cpu.c
+++ b/arch/sandbox/cpu/cpu.c
@@ -55,6 +55,16 @@ int cleanup_before_linux_select(int flags)
return 0;
 }
 
+void *phys_to_virt(phys_addr_t paddr)
+{
+   return (void *)(gd->arch.ram_buf + paddr);
+}
+
+phys_addr_t virt_to_phys(void *vaddr)
+{
+   return (phys_addr_t)(vaddr - gd->arch.ram_buf);
+}
+
 void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
 {
 #if defined(CONFIG_PCI) && !defined(CONFIG_SPL_BUILD)
@@ -72,7 +82,7 @@ void *map_physmem(phys_addr_t paddr, unsigned long len, 
unsigned long flags)
}
 #endif
 
-   return (void *)(gd->arch.ram_buf + paddr);
+   return phys_to_virt(paddr);
 }
 
 void unmap_physmem(const void *vaddr, unsigned long flags)
diff --git a/arch/sandbox/include/asm/io.h b/arch/sandbox/include/asm/io.h
index 6919632..3afbcea 100644
--- a/arch/sandbox/include/asm/io.h
+++ b/arch/sandbox/include/asm/io.h
@@ -7,22 +7,20 @@
 #ifndef __SANDBOX_ASM_IO_H
 #define __SANDBOX_ASM_IO_H
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
+void *phys_to_virt(phys_addr_t paddr);
+#define phys_to_virt phys_to_virt
+
+phys_addr_t virt_to_phys(void *vaddr);
+#define virt_to_phys virt_to_phys
 
 void *map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags);
+#define map_physmem map_physmem
 
 /*
  * Take down a mapping set up by map_physmem().
  */
 void unmap_physmem(const void *vaddr, unsigned long flags);
+#define unmap_physmem unmap_physmem
 
 /* For sandbox, we want addresses to point into our RAM buffer */
 static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
@@ -71,6 +69,7 @@ static inline void _outsw(volatile u16 *port, const void 
*buf, int ns)
 #define out16(addr, val)
 #define in16(addr) 0
 
+#include 
 #include 
 #include 
 
-- 
2.10.0

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[U-Boot] [PATCH 16/27] powerpc: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the powerpc architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As powerpc can actually perform
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic phys_to_virt() & virt_to_phys()
functions. However since map_physmem() already effectively implemented
the same thing as virt_to_phys() we can simply implement virt_to_phys()
instead of map_physmem() & use the generic map_physmem(). We also drop
the no-op unmap_physmem().

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Wolfgang Denk <w...@denx.de>
---

 arch/powerpc/include/asm/io.h | 25 +
 1 file changed, 5 insertions(+), 20 deletions(-)

diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index a54fc46..34fbfdf 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -282,18 +282,7 @@ static inline void out_be32(volatile unsigned __iomem 
*addr, u32 val)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+static inline void *phys_to_virt(phys_addr_t paddr)
 {
 #ifdef CONFIG_ADDR_MAP
return addrmap_phys_to_virt(paddr);
@@ -301,14 +290,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
return (void *)((unsigned long)paddr);
 #endif
 }
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
+#define phys_to_virt phys_to_virt
 
 static inline phys_addr_t virt_to_phys(void * vaddr)
 {
@@ -318,5 +300,8 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
return (phys_addr_t)((unsigned long)vaddr);
 #endif
 }
+#define virt_to_phys virt_to_phys
+
+#include 
 
 #endif
-- 
2.10.0

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[U-Boot] [PATCH 15/27] nios2: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the nios2 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As nios2 actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Thomas Chou <tho...@wytron.com.tw>
---

 arch/nios2/include/asm/io.h | 15 ---
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/arch/nios2/include/asm/io.h b/arch/nios2/include/asm/io.h
index e951500..4e5b44a 100644
--- a/arch/nios2/include/asm/io.h
+++ b/arch/nios2/include/asm/io.h
@@ -19,9 +19,6 @@ static inline void sync(void)
  * properties specified by "flags".
  */
 #define MAP_NOCACHE1
-#define MAP_WRCOMBINE  0
-#define MAP_WRBACK 0
-#define MAP_WRTHROUGH  0
 
 static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
@@ -32,20 +29,22 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
else
return (void *)(paddr | gd->arch.mem_region_base);
 }
+#define map_physmem map_physmem
 
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
+static inline void *phys_to_virt(phys_addr_t paddr)
 {
+   DECLARE_GLOBAL_DATA_PTR;
 
+   return (void *)(paddr | gd->arch.mem_region_base);
 }
+#define phys_to_virt phys_to_virt
 
 static inline phys_addr_t virt_to_phys(void * vaddr)
 {
DECLARE_GLOBAL_DATA_PTR;
return (phys_addr_t)vaddr & gd->arch.physaddr_mask;
 }
+#define virt_to_phys virt_to_phys
 
 #define __raw_writeb(v,a)   (*(volatile unsigned char  *)(a) = (v))
 #define __raw_writew(v,a)   (*(volatile unsigned short *)(a) = (v))
@@ -171,4 +170,6 @@ static inline void outsl (unsigned long port, const void 
*src, unsigned long cou
 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
 #define memcpy_toio(a, b, c)   memcpy((void *)(a), (b), (c))
 
+#include 
+
 #endif /* __ASM_NIOS2_IO_H_ */
-- 
2.10.0

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[U-Boot] [PATCH 14/27] mips: Fix map_physmem for cached mappings

2016-10-01 Thread Paul Burton
map_physmem should return a pointer that can be used by the CPU to
access the given memory - on MIPS simply returning the physical address
as it does prior to this patch doesn't achieve that. Instead return a
pointer to the memory within (c)kseg0, which matches up consistently
with the (c)kseg1 pointer that uncached mappings return via ioremap.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 arch/mips/include/asm/io.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index be9616a..45d7ca0 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -500,7 +500,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
if (flags == MAP_NOCACHE)
return ioremap(paddr, len);
 
-   return (void *)paddr;
+   return (void *)CKSEG0ADDR(paddr);
 }
 #define map_physmem map_physmem
 
-- 
2.10.0

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[U-Boot] [PATCH 13/27] mips: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the mips architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As mips actually performs
non-identity mapping between physical & virtual addresses we can't
simply make use of the generic functions, with the exception of being
able to drop our no-op unmap_physmem() and definitions of unused map
flags.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierz...@gmail.com>
---

 arch/mips/include/asm/io.h | 17 ++---
 1 file changed, 6 insertions(+), 11 deletions(-)

diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 5b86386..be9616a 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -95,6 +95,7 @@ static inline unsigned long virt_to_phys(volatile const void 
*address)
 #endif
return CPHYSADDR(addr);
 }
+#define virt_to_phys virt_to_phys
 
 /*
  * phys_to_virt-   map physical address to virtual
@@ -112,6 +113,7 @@ static inline void *phys_to_virt(unsigned long address)
 {
return (void *)(address + PAGE_OFFSET - PHYS_OFFSET);
 }
+#define phys_to_virt phys_to_virt
 
 /*
  * ISA I/O bus memory addresses are 1:1 with the physical address.
@@ -490,10 +492,7 @@ static inline void memcpy_toio(volatile void __iomem *dst, 
const void *src, int
  */
 #define sync() mmiowb()
 
-#define MAP_NOCACHE(1)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
+#define MAP_NOCACHE1
 
 static inline void *
 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
@@ -503,13 +502,7 @@ map_physmem(phys_addr_t paddr, unsigned long len, unsigned 
long flags)
 
return (void *)paddr;
 }
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-}
+#define map_physmem map_physmem
 
 #define __BUILD_CLRBITS(bwlq, sfx, end, type)  \
\
@@ -566,4 +559,6 @@ BUILD_CLRSETBITS(q, le64, le64, u64)
 BUILD_CLRSETBITS(q, be64, be64, u64)
 BUILD_CLRSETBITS(q, 64, _, u64)
 
+#include 
+
 #endif /* _ASM_IO_H */
-- 
2.10.0

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[U-Boot] [PATCH 12/27] xtensa: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the xtensa architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for xtensa this is primarily a matter of moving code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Max Filippov <jcmvb...@gmail.com>
---

 arch/xtensa/include/asm/io.h | 25 ++---
 1 file changed, 2 insertions(+), 23 deletions(-)

diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index e34d6e1..c9e335f 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -115,29 +115,6 @@ void outsl(unsigned long port, const void *src, unsigned 
long count);
  */
 #define xlate_dev_kmem_ptr(p)   p
 
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-}
-
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)((unsigned long)vaddr);
-}
-
 /*
  * Dummy function to keep U-Boot's cfi_flash.c driver happy.
  */
@@ -145,4 +122,6 @@ static inline void sync(void)
 {
 }
 
+#include 
+
 #endif /* _XTENSA_IO_H */
-- 
2.10.0

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[U-Boot] [PATCH 11/27] x86: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the x86 architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for x86 this is primarily a matter of moving code.

This has only been build-tested, feedback from architecture maintainers
is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Simon Glass <s...@chromium.org>
---

 arch/x86/include/asm/io.h | 31 ++-
 1 file changed, 2 insertions(+), 29 deletions(-)

diff --git a/arch/x86/include/asm/io.h b/arch/x86/include/asm/io.h
index 3156781..6f29a73 100644
--- a/arch/x86/include/asm/io.h
+++ b/arch/x86/include/asm/io.h
@@ -289,35 +289,6 @@ static inline void sync(void)
 }
 
 /*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)(uintptr_t)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(uintptr_t)(vaddr);
-}
-
-/*
  * TODO: The kernel offers some more advanced versions of barriers, it might
  * have some advantages to use them instead of the simple one here.
  */
@@ -325,4 +296,6 @@ static inline phys_addr_t virt_to_phys(void * vaddr)
 #define __iormb()  dmb()
 #define __iowmb()  dmb()
 
+#include 
+
 #endif
-- 
2.10.0

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[U-Boot] [PATCH 08/27] openrisc: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the openrisc architecture to make use of the new
asm-generic/io.h to provide address mapping functions. As the generic
implementations are suitable for openrisc this is primarily a matter of
removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Stefan Kristiansson <stefan.kristians...@saunalahti.fi>
---

 arch/openrisc/include/asm/io.h | 35 ++-
 1 file changed, 2 insertions(+), 33 deletions(-)

diff --git a/arch/openrisc/include/asm/io.h b/arch/openrisc/include/asm/io.h
index 86fbbc4..45c41b7 100644
--- a/arch/openrisc/include/asm/io.h
+++ b/arch/openrisc/include/asm/io.h
@@ -8,39 +8,6 @@
 #define __ASM_OPENRISC_IO_H
 
 /*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-/*
- * Change virtual addresses to physical addresses
- */
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
-
-
-/*
  * readX/writeX() are used to access memory mapped devices. On some
  * architectures the memory mapped IO stuff needs to be accessed
  * differently. On the openrisc architecture, we just read/write the
@@ -96,4 +63,6 @@ static inline phys_addr_t virt_to_phys(void *vaddr)
 #define iowrite16(v, addr) writew((v), (addr))
 #define iowrite32(v, addr) writel((v), (addr))
 
+#include 
+
 #endif
-- 
2.10.0

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[U-Boot] [PATCH 09/27] sh: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the sh architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for sh this is primarily a matter of moving code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Nobuhiro Iwamatsu <iwama...@nigauri.org>
---

 arch/sh/include/asm/io.h | 29 +
 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h
index 5dc27be..2847d8d 100644
--- a/arch/sh/include/asm/io.h
+++ b/arch/sh/include/asm/io.h
@@ -241,34 +241,7 @@ static inline void sync(void)
 #define setbits_8(addr, set) setbits(8, addr, set)
 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE (0)
-#define MAP_WRCOMBINE   (0)
-#define MAP_WRBACK  (0)
-#define MAP_WRTHROUGH   (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
+#include 
 
 #endif /* __KERNEL__ */
 #endif /* __ASM_SH_IO_H */
-- 
2.10.0

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[U-Boot] [PATCH 10/27] sparc: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the sparc architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for sparc this is primarily a matter of moving code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
---

 arch/sparc/include/asm/io.h | 30 +-
 1 file changed, 1 insertion(+), 29 deletions(-)

diff --git a/arch/sparc/include/asm/io.h b/arch/sparc/include/asm/io.h
index a317d13..08ec7d5 100644
--- a/arch/sparc/include/asm/io.h
+++ b/arch/sparc/include/asm/io.h
@@ -63,34 +63,6 @@
 #define readl  __raw_readl
 #define readq  __raw_readq
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
-   unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
+#include 
 
 #endif
-- 
2.10.0

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[U-Boot] [PATCH 07/27] nds32: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the nds32 architecture to make use of the new asm-generic/io.h
to provide address mapping functions. As the generic implementations are
suitable for nds32 this is primarily a matter of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Macpaul Lin <macp...@andestech.com>
---

 arch/nds32/include/asm/io.h | 32 +++-
 1 file changed, 3 insertions(+), 29 deletions(-)

diff --git a/arch/nds32/include/asm/io.h b/arch/nds32/include/asm/io.h
index b2c4d0e..46ce8c4 100644
--- a/arch/nds32/include/asm/io.h
+++ b/arch/nds32/include/asm/io.h
@@ -39,35 +39,6 @@ static inline void sync(void)
 }
 
 /*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void *vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
-
-/*
  * Generic virtual read/write.  Note that we don't support half-word
  * read/writes.  We define __arch_*[bl] here, and leave __arch_*w
  * to the architecture specific code.
@@ -459,5 +430,8 @@ out:
 #define isa_check_signature(io, sig, len)  (0)
 
 #endif /* __mem_isa */
+
+#include 
+
 #endif /* __KERNEL__ */
 #endif /* __ASM_NDS_IO_H */
-- 
2.10.0

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[U-Boot] [PATCH 06/27] microblaze: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the microblaze architecture to make use of the new
asm-generic/io.h to provide address mapping functions. As the generic
implementations are suitable for microblaze this is primarily a matter
of removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Michal Simek <mon...@monstr.eu>
---

 arch/microblaze/include/asm/io.h | 29 +
 1 file changed, 1 insertion(+), 28 deletions(-)

diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 584cbce..c7516a4 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -131,33 +131,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
+#include 
 
 #endif /* __MICROBLAZE_IO_H__ */
-- 
2.10.0

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[U-Boot] [PATCH 04/27] blackfin: Use asm-generic/io.h

2016-10-01 Thread Paul Burton
Convert the blackfin architecture to make use of the new
asm-generic/io.h to provide address mapping functions. As the generic
implementations are suitable for blackfin this is primarily a matter of
removing code.

Feedback from architecture maintainers is welcome.

Signed-off-by: Paul Burton <paul.bur...@imgtec.com>
Cc: Sonic Zhang <sonic@gmail.com>
---

 arch/blackfin/include/asm/io.h | 31 ++-
 1 file changed, 2 insertions(+), 29 deletions(-)

diff --git a/arch/blackfin/include/asm/io.h b/arch/blackfin/include/asm/io.h
index d3337e4..dad8ac6 100644
--- a/arch/blackfin/include/asm/io.h
+++ b/arch/blackfin/include/asm/io.h
@@ -20,35 +20,6 @@ static inline void sync(void)
 }
 
 /*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- */
-#define MAP_NOCACHE(0)
-#define MAP_WRCOMBINE  (0)
-#define MAP_WRBACK (0)
-#define MAP_WRTHROUGH  (0)
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-   return (void *)paddr;
-}
-
-/*
- * Take down a mapping set up by map_physmem().
- */
-static inline void unmap_physmem(void *vaddr, unsigned long flags)
-{
-
-}
-
-static inline phys_addr_t virt_to_phys(void * vaddr)
-{
-   return (phys_addr_t)(vaddr);
-}
-
-/*
  * These are for ISA/PCI shared memory _only_ and should never be used
  * on any other type of memory, including Zorro memory. They are meant to
  * access the bus in the bus byte order which is little-endian!.
@@ -223,6 +194,8 @@ extern void cf_outb(unsigned char val, volatile unsigned 
char *addr);
 
 #endif
 
+#include 
+
 #endif /* __KERNEL__ */
 
 #endif
-- 
2.10.0

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