[U-Boot] [PATCH] arm: pxa: Add support for ICP DAS LP-8x4x

2013-02-18 Thread Sergey Yanovich
LP-8x4x is a programmable automation controller by ICP DAS. It is
shipped with outdated U-Boot v1.3.0

This patch adds enough supports to boot the board:
 - 128M of 128M SDRAM
 - 32M of 48M NOR Flash memory
 - 1 of 4 Serial console (PXA FFUART)
 - 1 of 2 Ethernet controller (DM9000)

Signed-off-by: Sergey Yanovich 
---
 arch/arm/include/asm/mach-types.h |   13 ++
 board/icpdas/lp8x4x/Makefile  |   41 ++
 board/icpdas/lp8x4x/lp8x4x.c  |  133 ++
 boards.cfg|1 +
 include/configs/lp8x4x.h  |  272 +
 5 files changed, 460 insertions(+)
 create mode 100644 board/icpdas/lp8x4x/Makefile
 create mode 100644 board/icpdas/lp8x4x/lp8x4x.c
 create mode 100644 include/configs/lp8x4x.h

diff --git a/arch/arm/include/asm/mach-types.h 
b/arch/arm/include/asm/mach-types.h
index a676b6d..644b937 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -1107,6 +1107,7 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_OMAP5_SEVM   3777
 #define MACH_TYPE_ARMADILLO_800EVA 3863
 #define MACH_TYPE_KZM9G4140
+#define MACH_TYPE_LP8X4X   4539
 
 #ifdef CONFIG_ARCH_EBSA110
 # ifdef machine_arch_type
@@ -14248,6 +14249,18 @@ extern unsigned int __machine_arch_type;
 # define machine_is_kzm9g()(0)
 #endif
 
+#ifdef CONFIG_MACH_LP8X4X
+# ifdef machine_arch_type
+#  undef machine_arch_type
+#  define machine_arch_type __machine_arch_type
+# else
+#  define machine_arch_type MACH_TYPE_LP8X4X
+# endif
+# define machine_is_lp8x4x()   (machine_arch_type == MACH_TYPE_LP8X4X)
+#else
+# define machine_is_lp8x4x()   (0)
+#endif
+
 /*
  * These have not yet been registered
  */
diff --git a/board/icpdas/lp8x4x/Makefile b/board/icpdas/lp8x4x/Makefile
new file mode 100644
index 000..cbe6aa9
--- /dev/null
+++ b/board/icpdas/lp8x4x/Makefile
@@ -0,0 +1,41 @@
+#
+# ICPDAS LP-8x4x Support
+#
+# Copyright (C) 2013 Sergey Yanovich 
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := lp8x4x.o
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c
new file mode 100644
index 000..abdb84a
--- /dev/null
+++ b/board/icpdas/lp8x4x/lp8x4x.c
@@ -0,0 +1,133 @@
+/*
+ * ICP DAS LP-8x4x Support
+ *
+ * Copyright (C) 2010 Marek Vasut 
+ * adapted from Voipac PXA270 Support by
+ * Copyright (C) 2013 Sergey Yanovich 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+   /* We have RAM, disable cache */
+   dcache_disable();
+   icache_disable();
+
+   /* memory and cpu-speed are setup before relocation */
+   /* so we do _nothing_ here */
+
+   /* Arch number of lp8x4x */
+   gd->bd->bi_arch_number = MACH_TYPE_LP8X4X;
+
+   /* adress of boot parameters */
+   gd->bd->bi_boot_params = 0xa100;
+
+   return 0;
+}
+
+int dram_init(void)
+{
+   pxa2xx_dram_init();
+   gd->ram_size = PHYS_SDRAM_1_SIZE;
+   retur

Re: [U-Boot] Your message to U-Boot awaits moderator approval

2013-05-06 Thread Sergey Yanovich
On Mon, 2013-05-06 at 17:14 +0200, Wolfgang Denk wrote:
> I have no idea what you are talking about.  As far as I can tell, your
> patch was acknowledged within minutes, and made it to the mailing list
> and into the archives.  Tomini replied to it, and now we are waiting
> for you to incorporate the respective changes.

Thanks for a prompt reply. I see now that the post made it to this list
[1], but strangely I neither got the acknowledgement, nor the reply.
I'll fix and resubmit.

http://lists.denx.de/pipermail/u-boot/2013-February/147060.html

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[U-Boot] [PATCH v2] arm: pxa: Add support for ICP DAS LP-8x4x

2013-05-20 Thread Sergey Yanovich
LP-8x4x is a programmable automation controller by ICP DAS. It is
shipped with outdated U-Boot v1.3.0

This patch adds enough supports to boot the board:
 - 128M of 128M SDRAM
 - 32M of 48M NOR Flash memory
 - 1 of 4 Serial consoles (PXA FFUART)
 - 2 of 2 Ethernet controllers (DM9000)

Signed-off-by: Sergey Yanovich 
Series-to: u-boot
Series-cc: marex

---
Changes for v2:
   - use get_ram_size(...) to init ram size
   - fix defines
   - fix formatting
   - fix board GPIO settings
   - initialize eth1 MAC for kernel
   - use proper CONFIG_MACH_TYPE to init r1 in kernel call
   - use proper image format in default boot cmd

 MAINTAINERS  |4 +
 board/icpdas/lp8x4x/Makefile |   41 +++
 board/icpdas/lp8x4x/lp8x4x.c |  147 
 boards.cfg   |1 +
 include/configs/lp8x4x.h |  262 ++
 5 files changed, 455 insertions(+)
 create mode 100644 board/icpdas/lp8x4x/Makefile
 create mode 100644 board/icpdas/lp8x4x/lp8x4x.c
 create mode 100644 include/configs/lp8x4x.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 643a5ac..c696700 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1052,6 +1052,10 @@ Eric Nelson 
nitrogen6s  i.MX6S  512MB
nitrogen6s1gi.MX6S  1GB
 
+Sergey Yanovich 
+
+   lp8x4x  xscale/pxa
+
 -
 
 Unknown / orphaned boards:
diff --git a/board/icpdas/lp8x4x/Makefile b/board/icpdas/lp8x4x/Makefile
new file mode 100644
index 000..cbe6aa9
--- /dev/null
+++ b/board/icpdas/lp8x4x/Makefile
@@ -0,0 +1,41 @@
+#
+# ICPDAS LP-8x4x Support
+#
+# Copyright (C) 2013 Sergey Yanovich 
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := lp8x4x.o
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c
new file mode 100644
index 000..76f0700
--- /dev/null
+++ b/board/icpdas/lp8x4x/lp8x4x.c
@@ -0,0 +1,147 @@
+/*
+ * ICP DAS LP-8x4x Support
+ *
+ * Copyright (C) 2010 Marek Vasut 
+ * adapted from Voipac PXA270 Support by
+ * Copyright (C) 2013 Sergey Yanovich 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+int board_init(void)
+{
+   /* We have RAM, disable cache */
+   dcache_disable();
+   icache_disable();
+
+   /* memory and cpu-speed are setup before relocation */
+   /* so we do _nothing_ here */
+
+   /* adress of boot parameters */
+   gd->bd->bi_boot_params = 0xa100;
+
+   return 0;
+}
+
+int dram_init(void)
+{
+   pxa2xx_dram_init();
+   gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
+   return 0;
+}
+
+void dram_init_banksize(void)
+{
+   gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+   gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
+
+#ifdef CONFIG_CMD_MMC
+int board_mmc_init(bd_t *bis)
+{
+   pxa_mmc_register(0);
+   return 0;
+}
+#endif
+
+#ifdef CONFIG_CMD_USB
+int usb_board_init(vo

[U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-20 Thread Sergey Yanovich
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.

Signed-off-by: Sergey Yanovich 
---
 arch/arm/cpu/pxa/pxa2xx.c |7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index 09e8177..6c918ac 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -32,6 +32,10 @@
 #include 
 #include 
 
+#ifndef CONFIG_SYS_CLKCFG
+#define CONFIG_SYS_CLKCFG  0x0002
+#endif
+
 /* Flush I/D-cache */
 static void cache_flush(void)
 {
@@ -244,7 +248,8 @@ void pxa_clock_setup(void)
 {
writel(CONFIG_SYS_CKEN, CKEN);
writel(CONFIG_SYS_CCCR, CCCR);
-   asm volatile("mcr   p14, 0, %0, c6, c0, 0" : : "r"(2));
+   asm volatile("mcr   p14, 0, %0, c6, c0, 0" : :
+   "r"(CONFIG_SYS_CLKCFG));
 
/* enable the 32Khz oscillator for RTC and PowerManager */
writel(OSCC_OON, OSCC);
-- 
1.7.10.4

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[U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-20 Thread Sergey Yanovich
2.2.5.2 of Marvell PXA27x Processor Family Developers Manual says:
"The PXA27x processor cache configuration is identical to that of
the PXA255 processor."

As a result, it is perfectly legitimate to use PXA25X
'lock_cache_for_stack' on PXA27X as well.

Signed-off-by: Sergey Yanovich 
---
 arch/arm/cpu/pxa/start.S |   10 --
 include/configs/lp8x4x.h |5 +++--
 2 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index ada91a6..5ea512e 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -40,6 +40,12 @@
 #include 
 
 #ifdef CONFIG_CPU_PXA25X
+#ifndef CONFIG_PXA2XX_CACHE_AS_RAM
+#define CONFIG_PXA2XX_CACHE_AS_RAM
+#endif
+#endif
+
+#ifdef CONFIG_PXA2XX_CACHE_AS_RAM
 #if ((CONFIG_SYS_INIT_SP_ADDR) != 0xf800)
 #error "Init SP address must be set to 0xf800 for PXA250"
 #endif
@@ -164,7 +170,7 @@ reset:
bl  cpu_init_crit
 #endif
 
-#ifdef CONFIG_CPU_PXA25X
+#ifdef CONFIG_PXA2XX_CACHE_AS_RAM
bl  lock_cache_for_stack
 #endif
 
@@ -482,7 +488,7 @@ fiq:
  * This is useful on PXA25x and PXA26x in early bootstages, where there is no
  * other possible memory available to hold stack.
  */
-#ifdef CONFIG_CPU_PXA25X
+#ifdef CONFIG_PXA2XX_CACHE_AS_RAM
 .macro CPWAIT reg
mrc p15, 0, \reg, c2, c0, 0
mov \reg, \reg
diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h
index 026f321..27ff2f4 100644
--- a/include/configs/lp8x4x.h
+++ b/include/configs/lp8x4x.h
@@ -149,8 +149,9 @@
 
 #defineCONFIG_SYS_LOAD_ADDR0xa0008000
 #define CONFIG_SYS_SDRAM_BASE  PHYS_SDRAM_1
-/* Use first 64kb bank of the internal SRAM */
-#defineCONFIG_SYS_INIT_SP_ADDR 0x5c01
+/* Use CPU data cache as internal RAM */
+#define CONFIG_PXA2XX_CACHE_AS_RAM
+#defineCONFIG_SYS_INIT_SP_ADDR 0xf800
 
 /*
  * NOR FLASH
-- 
1.7.10.4

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 12:39 +0200, Marek Vasut wrote:
> > 2.2.5.2 of Marvell PXA27x Processor Family Developers Manual says:
> > "The PXA27x processor cache configuration is identical to that of
> > the PXA255 processor."
> > 
> > As a result, it is perfectly legitimate to use PXA25X
> > 'lock_cache_for_stack' on PXA27X as well.

> Why would you need this on PXA27x ? Is SRAM not enough?

SRAM is battery-backup. It can be used as a ultra-fast persistent
storage in OS. Wasting a quater of it just to boot the system isn't the
best choice.

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Re: [U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 12:35 +0200, Marek Vasut wrote:
> > PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
> > default run mode. Activating the mode early significantly speeds
> > up boot process.

> What's the difference? Where does this macro get used ?

Difference -- approx. 2.5 times faster system.

Who uses it -- ex. LP-8x4x board, support for which I am trying to merge
in a separate patch. Any PXA27X board can use it.

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Re: [U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 12:55 +0200, Marek Vasut wrote:
> > Difference -- approx. 2.5 times faster system.
> > 
> > Who uses it -- ex. LP-8x4x board, support for which I am trying to merge
> > in a separate patch. Any PXA27X board can use it.
> 
> Why don't you enable it globally then ?

It increases power consumption proportionally. Not everyone would agree
with this. Especially those with portable devices may rightfully object.

It is up to you to enable it globally. I could alter the patch to switch
turbo mode on by default and provide an option to disable it.

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 12:54 +0200, Marek Vasut wrote:
> SRAM is just the in-CPU bit of fast RAM. What do you mean by "battery-backup" 
> ?

Yes, you are right. It is 'for high speed code or data storage preserved
during low-power states' using a quote from PXA270 EMTS (top of page 1).
Battery-backup is optional. I mixed PXA270 and LP-8x4x specs.

> > It can be used as a ultra-fast persistent
> > storage in OS. Wasting a quater of it just to boot the system isn't the
> > best choice.
> 
> The SRAM is used for stack in U-Boot until you leave board_init_f, then the 
> stack is relocated to DRAM. The OS can use SRAM as needed, U-Boot is no 
> longer 
> operational once you load subsequent OS. What's the problem?

Anyway, SRAM preserves its state when power is off. Poweroff time could
be in years with a backup battery. In addition, D-Cache is an order of
magnitude faster than SRAM (approx. 9 times) for both reads and writes.

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[U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.

Signed-off-by: Sergey Yanovich 

---
Changes for v2:
- activate turbo mode and fast bus by default
---
 arch/arm/cpu/pxa/pxa2xx.c |7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index 09e8177..c874ec0 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -32,6 +32,10 @@
 #include 
 #include 
 
+#ifndef CONFIG_SYS_CLKCFG
+#define CONFIG_SYS_CLKCFG  0x000b
+#endif
+
 /* Flush I/D-cache */
 static void cache_flush(void)
 {
@@ -244,7 +248,8 @@ void pxa_clock_setup(void)
 {
writel(CONFIG_SYS_CKEN, CKEN);
writel(CONFIG_SYS_CCCR, CCCR);
-   asm volatile("mcr   p14, 0, %0, c6, c0, 0" : : "r"(2));
+   asm volatile("mcr   p14, 0, %0, c6, c0, 0" : :
+   "r"(CONFIG_SYS_CLKCFG));
 
/* enable the 32Khz oscillator for RTC and PowerManager */
writel(OSCC_OON, OSCC);
-- 
1.7.10.4

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 13:38 +0200, Marek Vasut wrote:
> Yes, it's just an in-CPU RAM.

Well, it is not 'just' RAM. It preserves its state during deep sleep and
power off modes.

> > Anyway, SRAM preserves its state when power is off. Poweroff time could
> > be in years with a backup battery. In addition, D-Cache is an order of
> > magnitude faster than SRAM (approx. 9 times) for both reads and writes.
> 
> Is there any measurable difference between using DCache and SRAM? Do you have 
> any evidence that a speedup happens?

I haven't done any special profiling. I am just relying on PXA270 EMTS
table 6-14. The table says SRAM reads take 9 cycles, writes take 7
cycles. D-Cache operations take 1 cycle.

> Still, the SRAM/DCache is only used until you leave board_init_f(), then it's 
> all DRAM.

Yes, the patch as it is will only affects relocation speed and preserve
SRAM from corruption. The speed gain can also be applied to uImage
copying/unpacking, but that requires deeper understanding than I have at
the moment.

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Re: [U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
On Tue, 2013-05-21 at 13:22 +0200, Marek Vasut wrote:
> > Actually, I wonder if Linux's cpufreq still does depend on bootloader speed
> > settings. Especially the turbo bit. Can you please check that? It'd be
> > interesting to know ...
> > 
> > I'd say enable it by default ... I probably have all the PXA devices
> > supported in U-Boot and I'm quite sure none of them will mind ;-)
> 
> Still, I'm surprised it wasn't enabled. I recall seeing it enabled. Weird ...

Yes, you are right. Linux's cpufreq-pxa2xx.c always sets the turbo bit.

However, if CONFIG_CPU_FREQ is not set (my case), bootloader's settings
are used.

I work on a system that has focus on low latency (industrial controller)
rather than battery life (since it has no battery).

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
On Tue, 2013-05-21 at 17:00 +0200, Marek Vasut wrote:
> > Yes, the patch as it is will only affects relocation speed and preserve
> > SRAM from corruption.
> 
> Now this is the right (convincing) argument! What kind of corruption ? When 
> does 
> it occur ?

The whole 256 kB of SRAM could be used for persistent storage with the
patch. Without it, part of SRAM should be dedicated for U-Boot stack or
be overwritten on boot.

> > The speed gain can also be applied to uImage
> > copying/unpacking, but that requires deeper understanding than I have at
> > the moment.
> 
> Uh ... I lost you here. Can you please elaborate some more ?

You are right. After SDRAM is configured, it is enough to turn on data
caching to receive its speed benefits.

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 21:02 +0200, Marek Vasut wrote:
> > The whole 256 kB of SRAM could be used for persistent storage with the
> > patch. Without it, part of SRAM should be dedicated for U-Boot stack or
> > be overwritten on boot.
> 
> This won't hold on any PXA that uses SPL, like the vpac270 with OneNAND SPL 
> and 
> PXA3xx (which is out of tree, none of your concern ;-) )

I am no way trying to enforce D-Cache as RAM. The patch just provides an
option for those who needs it.

> > You are right. After SDRAM is configured, it is enough to turn on data
> > caching to receive its speed benefits.
> 
> You must make sure anything that uses DMA won't crash.

I wasn't sure why data cache is disabled in U-Boot for every board I saw
configuration of. Thanks for pointing out.

> But I don't understand 
> how locking cachelines as RAM and enabling dcache relate to each other in 
> this 
> context.

I meant D-Cache is several times faster than SDRAM, so it may be
possible to get a bit faster, if stack remains on D-Cache even after
SDRAM is configured. Repeating my hedge, I don't see the full picture,
yet. It may well be impossible (if U-Boot needs more than 32 kB of
stack) or not worth the effort (if the gain is too small).

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 21:24 +0200, Marek Vasut wrote:
> I'd love to have a uniform way to do this cache thing, really ...

Requoting the spec 'The PXA27x processor cache configuration is
identical to that of the PXA255 processor'. It looks safe to configure
all PXA2XX chipsets this way.

Maybe I am missing something, but SPL is no exception in this case.

> Not really, enabling dcache altogether and marking DRAM region as cached 
> would 
> be much better.
> 
> > Repeating my hedge, I don't see the full picture,
> > yet. It may well be impossible (if U-Boot needs more than 32 kB of
> > stack)
> 
> No way.
> 
> > or not worth the effort (if the gain is too small).
> 
> The larger gain would be from fixing the U-Boot drivers for PXA to work well 
> with DCache ;-) Then the speedup would really be plenty significant, this can 
> be 
> well confirmed on many other ARM chips.

I have plans to dig deeper into this after I complete the current
project. Faster boot is always a good thing. Thanks for explaining in
details.

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Re: [U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 21:25 +0200,  wrote:
> So why not just make this patch into
> 
> -(2)
> +(0xb)
> 
> instead of adding new (and undocumented ...) macro?

Point taken. Looks like I am too careful in this case.

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[U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
PXA270 CPU has turbo mode. The mode is 2.5 times faster than the
default run mode. Activating the mode early significantly speeds
up boot process.

Signed-off-by: Sergey Yanovich 

---
Changes for v3:
- make the change unconditional

Changes for v2:
- activate turbo mode and fast bus by default
---
 arch/arm/cpu/pxa/pxa2xx.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index 09e8177..67a2ce1 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -244,7 +244,7 @@ void pxa_clock_setup(void)
 {
writel(CONFIG_SYS_CKEN, CKEN);
writel(CONFIG_SYS_CCCR, CCCR);
-   asm volatile("mcr   p14, 0, %0, c6, c0, 0" : : "r"(2));
+   asm volatile("mcr   p14, 0, %0, c6, c0, 0" : : "r"(0x0b));
 
/* enable the 32Khz oscillator for RTC and PowerManager */
writel(OSCC_OON, OSCC);
-- 
1.7.10.4

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Re: [U-Boot] [PATCH] arm: pxa: config option for PXA270 turbo mode

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 21:58 +0200, Marek Vasut wrote:
> OK, applied. Thanks

Thanks for your time, too.


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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-21 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 22:07 +0200, Marek Vasut wrote:
> The OneNAND has 1kbyte limit on code it will directly address when booting 
> from 
> it, you can't even make generate the MMU table there.

Do you mean there is no space left inside that 1K for
lock_cache_for_stack()?

> > I have plans to dig deeper into this after I complete the current
> > project. Faster boot is always a good thing. Thanks for explaining in
> > details.
> 
> Sure, yet I think I just piled work onto you ;-)

It's OK. I have plans to do this anyway.

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-22 Thread Sergey Yanovich
Dear Marek Vasut,

On Tue, 2013-05-21 at 23:38 +0200, Marek Vasut wrote:
> > Do you mean there is no space left inside that 1K for
> > lock_cache_for_stack()?
> 
> How would you do that ? You need MMU enabled to lock lines IIRC.

I see I don't know enough to continue the discussion, yet.

Concerning the patch in question, is it possible to allow cache for ram
on PXA270 somehow before we have a final solution?

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Re: [U-Boot] [PATCH] arm: pxa: PXA270 D-Cache as ram

2013-05-22 Thread Sergey Yanovich
Dear Marek Vasut,

On Wed, 2013-05-22 at 15:04 +0200, Marek Vasut wrote:
> > Concerning the patch in question, is it possible to allow cache for ram
> > on PXA270 somehow before we have a final solution?
> 
> I dont mind discussing this further and even using DCache for stack in 
> board_init_f(), but we must make sure nothing gets broken.

If it is possible, I would like to have a configuration option, which
allows to use D-Cache as RAM not only on PXA25X, but also on PXA27X. I
propose to preserve status-quo for now and only use D-Cache as RAM when
it is explicitly configured so.

You mentioned in a separate letter, that config options need
documenting. This part is missing in my patch, and I'll fix this, if the
above is OK.

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