[U-Boot] [PATCH 2/5] MSM 7x27a: Add support for qualcomm msm 7x27a SOC
Signed-off-by: Srikanth Reddy Vintha --- arch/arm/cpu/armv7/msm7x27a/Makefile | 53 arch/arm/cpu/armv7/msm7x27a/acpuclock.c| 252 +++ arch/arm/cpu/armv7/msm7x27a/board.c| 66 arch/arm/cpu/armv7/msm7x27a/config.mk | 21 ++ arch/arm/cpu/armv7/msm7x27a/gpio.c | 287 + arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S| 118 +++ arch/arm/cpu/armv7/msm7x27a/timer.c| 127 arch/arm/include/asm/arch-msm7x27a/gpio.h | 47 +++ arch/arm/include/asm/arch-msm7x27a/iomap.h | 105 +++ arch/arm/include/asm/arch-msm7x27a/mmc.h | 399 arch/arm/include/asm/arch-msm7x27a/proc_comm.h | 42 +++ arch/arm/include/asm/arch-msm7x27a/sys_proto.h | 27 ++ 12 files changed, 1544 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7x27a/Makefile create mode 100644 arch/arm/cpu/armv7/msm7x27a/acpuclock.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/board.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/config.mk create mode 100644 arch/arm/cpu/armv7/msm7x27a/gpio.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/msm7x27a/timer.c create mode 100644 arch/arm/include/asm/arch-msm7x27a/gpio.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/iomap.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/mmc.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/proc_comm.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/sys_proto.h diff --git a/arch/arm/cpu/armv7/msm7x27a/Makefile b/arch/arm/cpu/armv7/msm7x27a/Makefile new file mode 100644 index 000..5f493d7 --- /dev/null +++ b/arch/arm/cpu/armv7/msm7x27a/Makefile @@ -0,0 +1,53 @@ +# +# (C) Copyright 2012 +# Larsen & Toubro Infotech Ltd. +# +# (C) Copyright 2010,2011 Nvidia Corporation. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +SOBJS-y:= lowlevel_init.o +COBJS-y:= board.o +COBJS-y+= timer.o +COBJS-y+= acpuclock.o +COBJS-y+= gpio.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y)) + +all:$(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c new file mode 100644 index 000..c144233 --- /dev/null +++ b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c @@ -0,0 +1,252 @@ +/* + * (C) Copyright 2012 + * Larsen & Toubro Infotech Ltd. + * + * This source code is dual-licensed. You may use it under the terms of the + * GNU General Public License version 2, or under the license below. + * + * Copyright (c) 2008, Google Inc. + * All rights reserved. + * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + *
[U-Boot] [PATCH 4/5] MSM7x27a: USB Gadget support
Signed-off-by: Srikanth Reddy Vintha
---
arch/arm/cpu/armv7/msm7x27a/acpuclock.c|6 +
arch/arm/include/asm/arch-msm7x27a/iomap.h |1 +
arch/arm/include/asm/arch-msm7x27a/irqs.h | 138
include/configs/msm7x27a_surf.h| 13 +--
4 files changed, 151 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
diff --git a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
index c144233..7af80ef 100644
--- a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
+++ b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
@@ -222,6 +222,12 @@ void acpu_clock_init(void)
udelay(1000);
}
}
+void hsusb_clock_init(void)
+{
+ /* USB local clock control not enabled; use proc comm */
+ usb_clock_init();
+}
+
#ifdef CONFIG_QC_MMC
/* Configure MMC clock */
diff --git a/arch/arm/include/asm/arch-msm7x27a/iomap.h
b/arch/arm/include/asm/arch-msm7x27a/iomap.h
index 4c9d434..bc875ff 100644
--- a/arch/arm/include/asm/arch-msm7x27a/iomap.h
+++ b/arch/arm/include/asm/arch-msm7x27a/iomap.h
@@ -48,6 +48,7 @@
#define MSM_SHARED_BASE 0x0010
+#define MSM_USB_BASE 0xA080
#define MSM_SDC1_BASE 0xA040
#define MSM_SDC3_BASE 0xA060
diff --git a/arch/arm/include/asm/arch-msm7x27a/irqs.h
b/arch/arm/include/asm/arch-msm7x27a/irqs.h
new file mode 100644
index 000..798fd43
--- /dev/null
+++ b/arch/arm/include/asm/arch-msm7x27a/irqs.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd.
+ *
+ * This source code is dual-licensed. You may use it under the terms of the
+ * GNU General Public License version 2, or under the license below.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM7K_IRQS_H_
+#define _PLATFORM_MSM7K_IRQS_H_
+
+#define VIC_REG(off) (MSM_VIC_BASE + (off))
+
+#define VIC_INT_SELECT0 VIC_REG(0x) /* 1: FIQ, 0: IRQ */
+#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */
+#define VIC_INT_EN0 VIC_REG(0x0010)
+#define VIC_INT_EN1 VIC_REG(0x0014)
+#define VIC_INT_ENCLEAR0VIC_REG(0x0020)
+#define VIC_INT_ENCLEAR1VIC_REG(0x0024)
+#define VIC_INT_ENSET0VIC_REG(0x0030)
+#define VIC_INT_ENSET1VIC_REG(0x0034)
+#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */
+#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */
+#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */
+#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */
+#define VIC_NO_PEND_VAL VIC_REG(0x0060)
+#define VIC_INT_MASTERENVIC_REG(0x0064) /* 1: IRQ, 2: FIQ */
+#define VIC_PROTECTIONVIC_REG(0x006C) /* 1: ENABLE */
+#define VIC_CONFIGVIC_REG(0x0068) /* 1: USE ARM1136 VIC */
+#define VIC_IRQ_STATUS0 VIC_REG(0x0080)
+#define VIC_IRQ_STATUS1 VIC_REG(0x0084)
+#define VIC_FIQ_STATUS0 VIC_REG(0x0090)
+#define VIC_FIQ_STATUS1 VIC_REG(0x0094)
+#define VIC_RAW_STATUS0 VIC_REG(0x00A0)
+#define VIC_RAW_STATUS1 VIC_REG(0x00A4)
+#define VIC_INT_CLEAR0VIC_REG(0x00B0)
+#define VIC_INT_CLEAR1VIC_REG(0x00B4)
+#define VIC_SOFTINT0VIC_REG(0x00C0)
+#define VIC_SOFTINT1VIC_REG(0x00C4)
+#define VIC_IRQ_VEC_RDVIC_REG(0x00D0) /* pending int # */
+#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */
+#define
[U-Boot] [PATCH 5/5] fix for MMC write issue
From: Shrinivas Sahukar
Signed-off-by: Shrinivas Sahukar
---
drivers/mmc/qc_mmc.c | 71 +++--
1 files changed, 68 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/qc_mmc.c b/drivers/mmc/qc_mmc.c
index 930c410..9949cda 100644
--- a/drivers/mmc/qc_mmc.c
+++ b/drivers/mmc/qc_mmc.c
@@ -180,6 +180,65 @@ static unsigned int mmc_boot_fifo_read(unsigned int
*mmc_ptr,
return mmc_ret;
}
+/*
+ * Write data to SDC FIFO.
+ */
+static unsigned int mmc_boot_fifo_write(unsigned int *mmc_ptr,
+ unsigned int data_len, struct mmc *mmc)
+{
+ unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
+ unsigned int mmc_status = 0;
+ unsigned int mmc_count = 0;
+ unsigned int write_error = MMC_BOOT_MCI_STAT_DATA_CRC_FAIL |
+ MMC_BOOT_MCI_STAT_DATA_TIMEOUT | MMC_BOOT_MCI_STAT_TX_UNDRUN;
+ unsigned int i;
+ struct mmc_priv *priv = (struct mmc_priv *)mmc->priv;
+ unsigned long reg_status, reg_fifo;
+
+ reg_status = mmc_boot_mci_reg(priv->base, MMC_BOOT_MCI_STATUS);
+ reg_fifo = mmc_boot_mci_reg(priv->base, MMC_BOOT_MCI_FIFO);
+
+ /* Write the transfer data to SDCC3 FIFO */
+ do {
+ mmc_ret = MMC_BOOT_E_SUCCESS;
+ mmc_status = readl(reg_status);
+ if (mmc_status & write_error) {
+ mmc_ret = mmc_boot_status_error(mmc_status);
+ break;
+ }
+ /* Write the data in MCI_FIFO register as long as TXFIFO_FULL
+ bit of MCI_STATUS register is 0. Continue the writes until
+ the whole transfer data is written. */
+ if (((data_len - mmc_count) >= MMC_BOOT_MCI_FIFO_SIZE / 2) &&
+ (mmc_status & MMC_BOOT_MCI_STAT_TX_FIFO_HFULL)) {
+ unsigned write_count = 1;
+ write_count = MMC_BOOT_MCI_HFIFO_COUNT;
+ for (i = 0; i < write_count; i++) {
+ /* FIFO contains 16 32-bit data buffer
+ on 16 sequential addresses */
+ writel(*mmc_ptr, reg_fifo +
+ (mmc_count % MMC_BOOT_MCI_FIFO_SIZE));
+ mmc_ptr++;
+ /* increase mmc_count by word size */
+ mmc_count += sizeof(unsigned int);
+ }
+
+ } else if (!(mmc_status & MMC_BOOT_MCI_STAT_TX_FIFO_FULL)
+ && (mmc_count != data_len)) {
+ /* FIFO contains 16 32-bit data buffer
+ on 16 sequential addresses */
+ writel(*mmc_ptr, reg_fifo +
+ (mmc_count % MMC_BOOT_MCI_FIFO_SIZE));
+ mmc_ptr++;
+ /* increase mmc_count by word size */
+ mmc_count += sizeof(unsigned int);
+ } else if ((mmc_status & MMC_BOOT_MCI_STAT_DATA_END)) {
+ break;
+ }
+ } while (1);
+ return mmc_ret;
+}
+
static unsigned int mmc_boot_fifo_data_transfer(unsigned int *data_ptr,
unsigned int data_len,
unsigned char direction,
@@ -189,6 +248,8 @@ static unsigned int mmc_boot_fifo_data_transfer(unsigned
int *data_ptr,
if (direction == MMC_BOOT_DATA_READ)
mmc_ret = mmc_boot_fifo_read(data_ptr, data_len, mmc);
+ else
+ mmc_ret = mmc_boot_fifo_write(data_ptr, data_len, mmc);
return mmc_ret;
}
@@ -350,7 +411,7 @@ static unsigned int mmc_boot_send_command(struct mmc_cmd
*cmd,
break;
}
- } while (1);
+ } while (1);
return mmc_return;
}
@@ -413,6 +474,7 @@ int mmc_boot_send_command_map(struct mmc *mmc,
struct mmc_data *data)
{
unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
+ unsigned char direction = 0;
/* todo: do we need to fill in command type ?? */
@@ -434,6 +496,10 @@ int mmc_boot_send_command_map(struct mmc *mmc,
mmc->read_bl_len = MMC_BOOT_RD_BLOCK_LEN;
data->blocksize = MMC_BOOT_RD_BLOCK_LEN;
}
+ direction = MMC_BOOT_DATA_READ;
+ } else if ((cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK) ||
+ (cmd->cmdidx == MMC_CMD_WRITE_SINGLE_BLOCK)) {
+ direction = MMC_BOOT_DATA_WRITE;
} else if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) {
/* explicitly disable the prg enabled flag */
cmd->flags &= ~MMC_BOOT_PROGRAM_ENABLED;
@@ -441,7 +507,6 @
[U-Boot] [PATCH 1/5] MSM7630: USB Gadget support
Signed-off-by: Srikanth Reddy Vintha --- arch/arm/include/asm/arch-msm7630/irqs.h | 162 + drivers/serial/usbtty.h |2 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/msm_udc.c | 540 ++ include/configs/msm7630_surf.h | 11 +- include/usb/msm_udc.h| 178 ++ 6 files changed, 891 insertions(+), 3 deletions(-) create mode 100644 arch/arm/include/asm/arch-msm7630/irqs.h create mode 100644 drivers/usb/gadget/msm_udc.c create mode 100644 include/usb/msm_udc.h diff --git a/arch/arm/include/asm/arch-msm7630/irqs.h b/arch/arm/include/asm/arch-msm7630/irqs.h new file mode 100644 index 000..b0c011f --- /dev/null +++ b/arch/arm/include/asm/arch-msm7630/irqs.h @@ -0,0 +1,162 @@ +/* + * (C) Copyright 2012 + * Larsen & Toubro Infotech Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_MSM_IRQS_7X30_H +#define __ASM_ARCH_MSM_IRQS_7X30_H + +/* MSM ACPU Interrupt Numbers */ + +#define INT_DEBUG_TIMER_EXP0 +#define INT_GPT0_TIMER_EXP 1 +#define INT_GPT1_TIMER_EXP 2 +#define INT_WDT0_ACCSCSSBARK 3 +#define INT_WDT1_ACCSCSSBARK 4 +#define INT_AVS_SVIC 5 +#define INT_AVS_SVIC_SW_DONE 6 +#define INT_SC_DBG_RX_FULL 7 +#define INT_SC_DBG_TX_EMPTY8 +#define INT_SC_PERF_MON9 +#define INT_AVS_REQ_DOWN 10 +#define INT_AVS_REQ_UP 11 +#define INT_SC_ACG 12 +/* SCSS_VICFIQSTS1[13:15] are RESERVED */ +#define INT_L2_SVICCPUIRPTREQ 16 +#define INT_L2_SVICDMANSIRPTREQ 17 +#define INT_L2_SVICDMASIRPTREQ 18 +#define INT_L2_SVICSLVIRPTREQ 19 +#define INT_AD5A_MPROC_APPS_0 20 +#define INT_AD5A_MPROC_APPS_1 21 +#define INT_A9_M2A_0 22 +#define INT_A9_M2A_1 23 +#define INT_A9_M2A_2 24 +#define INT_A9_M2A_3 25 +#define INT_A9_M2A_4 26 +#define INT_A9_M2A_5 27 +#define INT_A9_M2A_6 28 +#define INT_A9_M2A_7 29 +#define INT_A9_M2A_8 30 +#define INT_A9_M2A_9 31 + +#define INT_AXI_EBI1_SC(32 + 0) +#define INT_IMEM_ERR (32 + 1) +#define INT_AXI_EBI0_SC(32 + 2) +#define INT_PBUS_SC_IRQC (32 + 3) +#define INT_PERPH_BUS_BPM (32 + 4) +#define INT_CC_TEMP_SENSE (32 + 5) +#define INT_UXMC_EBI0 (32 + 6) +#define INT_UXMC_EBI1 (32 + 7) +#define INT_EBI2_OP_DONE (32 + 8) +#define INT_EBI2_WR_ER_DONE(32 + 9) +#define INT_TCSR_SPSS_CE (32 + 10) +#define INT_EMDH (32 + 11) +#define INT_PMDH (32 + 12) +#define INT_MDC(32 + 13) +#define INT_MIDI_TO_SUPSS (32 + 14) +#define INT_LPA_2 (32 + 15) +#define INT_GPIO_GROUP1_SECURE (32 + 16) +#define INT_GPIO_GROUP2_SECURE (32 + 17) +#define INT_GPIO_GROUP1(32 + 18) +#define INT_GPIO_GROUP2(32 + 19) +#define INT_MPRPH_SOFTRESET(32 + 20) +#define INT_PWB_I2C(32 + 21) +#define INT_PWB_I2C_2 (32 + 22) +#define INT_TSSC_SAMPLE(32 + 23) +#define INT_TSSC_PENUP (32 + 24) +#define INT_TCHSCRN_SSBI (32 + 25) +#define INT_FM_RDS (32 + 26) +#define INT_KEYSENSE (32 + 27) +#define INT_USB_OTG_HS (32 + 28) +#define INT_USB_OTG_HS2(32 + 29) +#define INT_USB_OTG_HS3(32 + 30) +#define INT_RESERVED_BIT31 (32 + 31) + +#define INT_SPI_OUTPUT (64 + 0) +#define INT_SPI_INPUT (64 + 1) +#define INT_SPI_ERROR (64 + 2) +#define INT_UART1 (64 + 3) +#define INT_UART1_RX (64 + 4) +#define INT_UART2 (64 + 5) +#define INT_UART2_RX (64 + 6) +#define INT_UART3 (64 + 7) +#define INT_UART3_RX (64 + 8) +#define INT_UART1DM_IRQ(64 + 9) +#define INT_UART1DM_RX (64 + 10) +#define INT_UART2DM_IRQ(64 + 11) +#define INT_UART2DM_RX (64 + 12) +#define INT_TSIF (64 + 13) +#define INT_ADM_SC1(64 + 14) +#define INT_ADM_SC2(64 + 15) +#define INT_MDP(64 + 16) +#define INT_VPE(64 + 17) +#define INT_GR
[U-Boot] [PATCH 0/5] *** Qualcomm chipset support patches ***
From: Shrinivas Sahukar *** This patch series contains the following support for Qualcomm chipsets *** * MSM7630: USB Gadget support * MSM 7x27a: Add support for qualcomm msm 7x27a SOC * MSM 7x27a: Add support for qualcomm msm7x27a surf board * MSM7x27a: USB Gadget support * Fix for MMC Write Issue Shrinivas Sahukar (1): fix for MMC write issue Srikanth Reddy Vintha (4): MSM7630: USB Gadget support MSM 7x27a: Add support for qualcomm msm 7x27a SOC MSM 7x27a: Add support for qualcomm msm7x27a surf board MSM7x27a: USB Gadget support arch/arm/cpu/armv7/msm7x27a/Makefile | 53 +++ arch/arm/cpu/armv7/msm7x27a/acpuclock.c| 258 +++ arch/arm/cpu/armv7/msm7x27a/board.c| 66 +++ arch/arm/cpu/armv7/msm7x27a/config.mk | 21 + arch/arm/cpu/armv7/msm7x27a/gpio.c | 287 + arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S| 118 + arch/arm/cpu/armv7/msm7x27a/timer.c| 127 ++ arch/arm/include/asm/arch-msm7630/irqs.h | 162 +++ arch/arm/include/asm/arch-msm7x27a/gpio.h | 47 ++ arch/arm/include/asm/arch-msm7x27a/iomap.h | 106 + arch/arm/include/asm/arch-msm7x27a/irqs.h | 138 ++ arch/arm/include/asm/arch-msm7x27a/mmc.h | 399 + arch/arm/include/asm/arch-msm7x27a/proc_comm.h | 42 ++ arch/arm/include/asm/arch-msm7x27a/sys_proto.h | 27 ++ board/qcom/msm7x27a_surf/Makefile | 56 +++ board/qcom/msm7x27a_surf/msm7x27a_surf.c | 126 ++ board/qcom/msm7x27a_surf/msm7x27a_surf.h | 27 ++ boards.cfg |1 + drivers/mmc/qc_mmc.c | 71 +++- drivers/serial/usbtty.h|2 + drivers/usb/gadget/Makefile|1 + drivers/usb/gadget/msm_udc.c | 540 include/configs/msm7630_surf.h | 11 +- include/configs/msm7x27a_surf.h| 127 ++ include/usb/msm_udc.h | 178 25 files changed, 2985 insertions(+), 6 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7x27a/Makefile create mode 100644 arch/arm/cpu/armv7/msm7x27a/acpuclock.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/board.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/config.mk create mode 100644 arch/arm/cpu/armv7/msm7x27a/gpio.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/msm7x27a/timer.c create mode 100644 arch/arm/include/asm/arch-msm7630/irqs.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/gpio.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/iomap.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/mmc.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/proc_comm.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/sys_proto.h create mode 100644 board/qcom/msm7x27a_surf/Makefile create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.c create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.h create mode 100644 drivers/usb/gadget/msm_udc.c create mode 100644 include/configs/msm7x27a_surf.h create mode 100644 include/usb/msm_udc.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/5] MSM 7x27a: Add support for qualcomm msm7x27a surf board
Signed-off-by: Srikanth Reddy Vintha
---
board/qcom/msm7x27a_surf/Makefile| 56 +
board/qcom/msm7x27a_surf/msm7x27a_surf.c | 126 +
board/qcom/msm7x27a_surf/msm7x27a_surf.h | 27 ++
boards.cfg |1 +
include/configs/msm7x27a_surf.h | 128 ++
5 files changed, 338 insertions(+), 0 deletions(-)
create mode 100644 board/qcom/msm7x27a_surf/Makefile
create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.c
create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.h
create mode 100644 include/configs/msm7x27a_surf.h
diff --git a/board/qcom/msm7x27a_surf/Makefile
b/board/qcom/msm7x27a_surf/Makefile
new file mode 100644
index 000..123099d
--- /dev/null
+++ b/board/qcom/msm7x27a_surf/Makefile
@@ -0,0 +1,56 @@
+#
+# (C) Copyright 2012
+# Larsen & Toubro Infotech Ltd.
+#
+# (C) Copyright 2010,2011
+# NVIDIA Corporation
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../../qcom/msm7x27a_surf/)
+endif
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := $(BOARD).o
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(OBJS)
+
+distclean:
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/qcom/msm7x27a_surf/msm7x27a_surf.c
b/board/qcom/msm7x27a_surf/msm7x27a_surf.c
new file mode 100644
index 000..9199f48
--- /dev/null
+++ b/board/qcom/msm7x27a_surf/msm7x27a_surf.c
@@ -0,0 +1,126 @@
+/*
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "msm7x27a_surf.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f()
+{
+ uart1_clock_init();
+ return 0;
+}
+#endif
+int board_init()
+{
+ unsigned long new_addr;
+ unsigned long offset;
+ offset = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
+ new_addr = CONFIG_SYS_TEXT_BASE + offset;
+ set_vector_base(new_addr);
+ acpu_clock_init();
+ bd_t *bd = gd->bd;
+ bd->bi_arch_number = MACH_TYPE_MSM7X27_SURF;
+ return 0;
+}
+
+#ifdef CONFIG_QC_MMC
+
+/* called during the scan of each mmc device */
+int qc_board_mmc_init(struct mmc *mmc)
+{
+
+ struct mmc_priv *sd = (struct mmc_priv *)mmc->priv;
+ u32 smem_val;
+ do {
+ smem_val = 0;
+ smem_val = readl(MSM_SHARED_BASE + 0x14);
+ } while (smem_val != 1);
+
+ if (sd->instance == 3 || sd->instance == 4) {
+ mmc_boot_main(mmc);
+ return 0;
+ } else
+ /* this board does not have an sd/mmc card on this interface. */
+ return 1;
+ }
+int board_mmc_init(bd_t *bis)
+{
+#ifdef QC_SD
+ struct mmc *mmc_4;
+ struct mmc_priv *sdcc_4;
+ mmc_4 = (struct mmc *) malloc(sizeof(struct mmc));
+ if (!mmc_4)
+ return 1;
+ sdcc_4 = (struct mmc_priv *) malloc(sizeof(struct mmc_priv));
+ if (!
[U-Boot] [PATCH 2/5] MSM 7x27a: Add support for qualcomm msm 7x27a SOC
Signed-off-by: Srikanth Reddy Vintha --- arch/arm/cpu/armv7/msm7x27a/Makefile | 53 arch/arm/cpu/armv7/msm7x27a/acpuclock.c| 252 +++ arch/arm/cpu/armv7/msm7x27a/board.c| 66 arch/arm/cpu/armv7/msm7x27a/config.mk | 21 ++ arch/arm/cpu/armv7/msm7x27a/gpio.c | 287 + arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S| 118 +++ arch/arm/cpu/armv7/msm7x27a/timer.c| 127 arch/arm/include/asm/arch-msm7x27a/gpio.h | 47 +++ arch/arm/include/asm/arch-msm7x27a/iomap.h | 105 +++ arch/arm/include/asm/arch-msm7x27a/mmc.h | 399 arch/arm/include/asm/arch-msm7x27a/proc_comm.h | 42 +++ arch/arm/include/asm/arch-msm7x27a/sys_proto.h | 27 ++ 12 files changed, 1544 insertions(+), 0 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7x27a/Makefile create mode 100644 arch/arm/cpu/armv7/msm7x27a/acpuclock.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/board.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/config.mk create mode 100644 arch/arm/cpu/armv7/msm7x27a/gpio.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/msm7x27a/timer.c create mode 100644 arch/arm/include/asm/arch-msm7x27a/gpio.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/iomap.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/mmc.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/proc_comm.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/sys_proto.h diff --git a/arch/arm/cpu/armv7/msm7x27a/Makefile b/arch/arm/cpu/armv7/msm7x27a/Makefile new file mode 100644 index 000..5f493d7 --- /dev/null +++ b/arch/arm/cpu/armv7/msm7x27a/Makefile @@ -0,0 +1,53 @@ +# +# (C) Copyright 2012 +# Larsen & Toubro Infotech Ltd. +# +# (C) Copyright 2010,2011 Nvidia Corporation. +# +# (C) Copyright 2000-2003 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(SOC).o + +SOBJS-y:= lowlevel_init.o +COBJS-y:= board.o +COBJS-y+= timer.o +COBJS-y+= acpuclock.o +COBJS-y+= gpio.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y)) + +all:$(obj).depend $(LIB) + +$(LIB):$(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c new file mode 100644 index 000..c144233 --- /dev/null +++ b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c @@ -0,0 +1,252 @@ +/* + * (C) Copyright 2012 + * Larsen & Toubro Infotech Ltd. + * + * This source code is dual-licensed. You may use it under the terms of the + * GNU General Public License version 2, or under the license below. + * + * Copyright (c) 2008, Google Inc. + * All rights reserved. + * Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + *
[U-Boot] [PATCH 5/5] fix for MMC write issue
From: Shrinivas Sahukar
Signed-off-by: Shrinivas Sahukar
---
drivers/mmc/qc_mmc.c | 71 +++--
1 files changed, 68 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/qc_mmc.c b/drivers/mmc/qc_mmc.c
index 930c410..9949cda 100644
--- a/drivers/mmc/qc_mmc.c
+++ b/drivers/mmc/qc_mmc.c
@@ -180,6 +180,65 @@ static unsigned int mmc_boot_fifo_read(unsigned int
*mmc_ptr,
return mmc_ret;
}
+/*
+ * Write data to SDC FIFO.
+ */
+static unsigned int mmc_boot_fifo_write(unsigned int *mmc_ptr,
+ unsigned int data_len, struct mmc *mmc)
+{
+ unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
+ unsigned int mmc_status = 0;
+ unsigned int mmc_count = 0;
+ unsigned int write_error = MMC_BOOT_MCI_STAT_DATA_CRC_FAIL |
+ MMC_BOOT_MCI_STAT_DATA_TIMEOUT | MMC_BOOT_MCI_STAT_TX_UNDRUN;
+ unsigned int i;
+ struct mmc_priv *priv = (struct mmc_priv *)mmc->priv;
+ unsigned long reg_status, reg_fifo;
+
+ reg_status = mmc_boot_mci_reg(priv->base, MMC_BOOT_MCI_STATUS);
+ reg_fifo = mmc_boot_mci_reg(priv->base, MMC_BOOT_MCI_FIFO);
+
+ /* Write the transfer data to SDCC3 FIFO */
+ do {
+ mmc_ret = MMC_BOOT_E_SUCCESS;
+ mmc_status = readl(reg_status);
+ if (mmc_status & write_error) {
+ mmc_ret = mmc_boot_status_error(mmc_status);
+ break;
+ }
+ /* Write the data in MCI_FIFO register as long as TXFIFO_FULL
+ bit of MCI_STATUS register is 0. Continue the writes until
+ the whole transfer data is written. */
+ if (((data_len - mmc_count) >= MMC_BOOT_MCI_FIFO_SIZE / 2) &&
+ (mmc_status & MMC_BOOT_MCI_STAT_TX_FIFO_HFULL)) {
+ unsigned write_count = 1;
+ write_count = MMC_BOOT_MCI_HFIFO_COUNT;
+ for (i = 0; i < write_count; i++) {
+ /* FIFO contains 16 32-bit data buffer
+ on 16 sequential addresses */
+ writel(*mmc_ptr, reg_fifo +
+ (mmc_count % MMC_BOOT_MCI_FIFO_SIZE));
+ mmc_ptr++;
+ /* increase mmc_count by word size */
+ mmc_count += sizeof(unsigned int);
+ }
+
+ } else if (!(mmc_status & MMC_BOOT_MCI_STAT_TX_FIFO_FULL)
+ && (mmc_count != data_len)) {
+ /* FIFO contains 16 32-bit data buffer
+ on 16 sequential addresses */
+ writel(*mmc_ptr, reg_fifo +
+ (mmc_count % MMC_BOOT_MCI_FIFO_SIZE));
+ mmc_ptr++;
+ /* increase mmc_count by word size */
+ mmc_count += sizeof(unsigned int);
+ } else if ((mmc_status & MMC_BOOT_MCI_STAT_DATA_END)) {
+ break;
+ }
+ } while (1);
+ return mmc_ret;
+}
+
static unsigned int mmc_boot_fifo_data_transfer(unsigned int *data_ptr,
unsigned int data_len,
unsigned char direction,
@@ -189,6 +248,8 @@ static unsigned int mmc_boot_fifo_data_transfer(unsigned
int *data_ptr,
if (direction == MMC_BOOT_DATA_READ)
mmc_ret = mmc_boot_fifo_read(data_ptr, data_len, mmc);
+ else
+ mmc_ret = mmc_boot_fifo_write(data_ptr, data_len, mmc);
return mmc_ret;
}
@@ -350,7 +411,7 @@ static unsigned int mmc_boot_send_command(struct mmc_cmd
*cmd,
break;
}
- } while (1);
+ } while (1);
return mmc_return;
}
@@ -413,6 +474,7 @@ int mmc_boot_send_command_map(struct mmc *mmc,
struct mmc_data *data)
{
unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
+ unsigned char direction = 0;
/* todo: do we need to fill in command type ?? */
@@ -434,6 +496,10 @@ int mmc_boot_send_command_map(struct mmc *mmc,
mmc->read_bl_len = MMC_BOOT_RD_BLOCK_LEN;
data->blocksize = MMC_BOOT_RD_BLOCK_LEN;
}
+ direction = MMC_BOOT_DATA_READ;
+ } else if ((cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK) ||
+ (cmd->cmdidx == MMC_CMD_WRITE_SINGLE_BLOCK)) {
+ direction = MMC_BOOT_DATA_WRITE;
} else if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) {
/* explicitly disable the prg enabled flag */
cmd->flags &= ~MMC_BOOT_PROGRAM_ENABLED;
@@ -441,7 +507,6 @
[U-Boot] [PATCH 4/5] MSM7x27a: USB Gadget support
Signed-off-by: Srikanth Reddy Vintha
---
arch/arm/cpu/armv7/msm7x27a/acpuclock.c|6 +
arch/arm/include/asm/arch-msm7x27a/iomap.h |1 +
arch/arm/include/asm/arch-msm7x27a/irqs.h | 138
include/configs/msm7x27a_surf.h| 13 +--
4 files changed, 151 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h
diff --git a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
index c144233..7af80ef 100644
--- a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
+++ b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
@@ -222,6 +222,12 @@ void acpu_clock_init(void)
udelay(1000);
}
}
+void hsusb_clock_init(void)
+{
+ /* USB local clock control not enabled; use proc comm */
+ usb_clock_init();
+}
+
#ifdef CONFIG_QC_MMC
/* Configure MMC clock */
diff --git a/arch/arm/include/asm/arch-msm7x27a/iomap.h
b/arch/arm/include/asm/arch-msm7x27a/iomap.h
index 4c9d434..bc875ff 100644
--- a/arch/arm/include/asm/arch-msm7x27a/iomap.h
+++ b/arch/arm/include/asm/arch-msm7x27a/iomap.h
@@ -48,6 +48,7 @@
#define MSM_SHARED_BASE 0x0010
+#define MSM_USB_BASE 0xA080
#define MSM_SDC1_BASE 0xA040
#define MSM_SDC3_BASE 0xA060
diff --git a/arch/arm/include/asm/arch-msm7x27a/irqs.h
b/arch/arm/include/asm/arch-msm7x27a/irqs.h
new file mode 100644
index 000..798fd43
--- /dev/null
+++ b/arch/arm/include/asm/arch-msm7x27a/irqs.h
@@ -0,0 +1,138 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd.
+ *
+ * This source code is dual-licensed. You may use it under the terms of the
+ * GNU General Public License version 2, or under the license below.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Google, Inc. nor the names of its contributors
+ * may be used to endorse or promote products derived from this
+ * software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _PLATFORM_MSM7K_IRQS_H_
+#define _PLATFORM_MSM7K_IRQS_H_
+
+#define VIC_REG(off) (MSM_VIC_BASE + (off))
+
+#define VIC_INT_SELECT0 VIC_REG(0x) /* 1: FIQ, 0: IRQ */
+#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */
+#define VIC_INT_EN0 VIC_REG(0x0010)
+#define VIC_INT_EN1 VIC_REG(0x0014)
+#define VIC_INT_ENCLEAR0VIC_REG(0x0020)
+#define VIC_INT_ENCLEAR1VIC_REG(0x0024)
+#define VIC_INT_ENSET0VIC_REG(0x0030)
+#define VIC_INT_ENSET1VIC_REG(0x0034)
+#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */
+#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */
+#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */
+#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */
+#define VIC_NO_PEND_VAL VIC_REG(0x0060)
+#define VIC_INT_MASTERENVIC_REG(0x0064) /* 1: IRQ, 2: FIQ */
+#define VIC_PROTECTIONVIC_REG(0x006C) /* 1: ENABLE */
+#define VIC_CONFIGVIC_REG(0x0068) /* 1: USE ARM1136 VIC */
+#define VIC_IRQ_STATUS0 VIC_REG(0x0080)
+#define VIC_IRQ_STATUS1 VIC_REG(0x0084)
+#define VIC_FIQ_STATUS0 VIC_REG(0x0090)
+#define VIC_FIQ_STATUS1 VIC_REG(0x0094)
+#define VIC_RAW_STATUS0 VIC_REG(0x00A0)
+#define VIC_RAW_STATUS1 VIC_REG(0x00A4)
+#define VIC_INT_CLEAR0VIC_REG(0x00B0)
+#define VIC_INT_CLEAR1VIC_REG(0x00B4)
+#define VIC_SOFTINT0VIC_REG(0x00C0)
+#define VIC_SOFTINT1VIC_REG(0x00C4)
+#define VIC_IRQ_VEC_RDVIC_REG(0x00D0) /* pending int # */
+#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */
+#define
[U-Boot] [PATCH 1/5] MSM7630: USB Gadget support
Signed-off-by: Srikanth Reddy Vintha --- arch/arm/include/asm/arch-msm7630/irqs.h | 162 + drivers/serial/usbtty.h |2 + drivers/usb/gadget/Makefile |1 + drivers/usb/gadget/msm_udc.c | 540 ++ include/configs/msm7630_surf.h | 11 +- include/usb/msm_udc.h| 178 ++ 6 files changed, 891 insertions(+), 3 deletions(-) create mode 100644 arch/arm/include/asm/arch-msm7630/irqs.h create mode 100644 drivers/usb/gadget/msm_udc.c create mode 100644 include/usb/msm_udc.h diff --git a/arch/arm/include/asm/arch-msm7630/irqs.h b/arch/arm/include/asm/arch-msm7630/irqs.h new file mode 100644 index 000..b0c011f --- /dev/null +++ b/arch/arm/include/asm/arch-msm7630/irqs.h @@ -0,0 +1,162 @@ +/* + * (C) Copyright 2012 + * Larsen & Toubro Infotech Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_MSM_IRQS_7X30_H +#define __ASM_ARCH_MSM_IRQS_7X30_H + +/* MSM ACPU Interrupt Numbers */ + +#define INT_DEBUG_TIMER_EXP0 +#define INT_GPT0_TIMER_EXP 1 +#define INT_GPT1_TIMER_EXP 2 +#define INT_WDT0_ACCSCSSBARK 3 +#define INT_WDT1_ACCSCSSBARK 4 +#define INT_AVS_SVIC 5 +#define INT_AVS_SVIC_SW_DONE 6 +#define INT_SC_DBG_RX_FULL 7 +#define INT_SC_DBG_TX_EMPTY8 +#define INT_SC_PERF_MON9 +#define INT_AVS_REQ_DOWN 10 +#define INT_AVS_REQ_UP 11 +#define INT_SC_ACG 12 +/* SCSS_VICFIQSTS1[13:15] are RESERVED */ +#define INT_L2_SVICCPUIRPTREQ 16 +#define INT_L2_SVICDMANSIRPTREQ 17 +#define INT_L2_SVICDMASIRPTREQ 18 +#define INT_L2_SVICSLVIRPTREQ 19 +#define INT_AD5A_MPROC_APPS_0 20 +#define INT_AD5A_MPROC_APPS_1 21 +#define INT_A9_M2A_0 22 +#define INT_A9_M2A_1 23 +#define INT_A9_M2A_2 24 +#define INT_A9_M2A_3 25 +#define INT_A9_M2A_4 26 +#define INT_A9_M2A_5 27 +#define INT_A9_M2A_6 28 +#define INT_A9_M2A_7 29 +#define INT_A9_M2A_8 30 +#define INT_A9_M2A_9 31 + +#define INT_AXI_EBI1_SC(32 + 0) +#define INT_IMEM_ERR (32 + 1) +#define INT_AXI_EBI0_SC(32 + 2) +#define INT_PBUS_SC_IRQC (32 + 3) +#define INT_PERPH_BUS_BPM (32 + 4) +#define INT_CC_TEMP_SENSE (32 + 5) +#define INT_UXMC_EBI0 (32 + 6) +#define INT_UXMC_EBI1 (32 + 7) +#define INT_EBI2_OP_DONE (32 + 8) +#define INT_EBI2_WR_ER_DONE(32 + 9) +#define INT_TCSR_SPSS_CE (32 + 10) +#define INT_EMDH (32 + 11) +#define INT_PMDH (32 + 12) +#define INT_MDC(32 + 13) +#define INT_MIDI_TO_SUPSS (32 + 14) +#define INT_LPA_2 (32 + 15) +#define INT_GPIO_GROUP1_SECURE (32 + 16) +#define INT_GPIO_GROUP2_SECURE (32 + 17) +#define INT_GPIO_GROUP1(32 + 18) +#define INT_GPIO_GROUP2(32 + 19) +#define INT_MPRPH_SOFTRESET(32 + 20) +#define INT_PWB_I2C(32 + 21) +#define INT_PWB_I2C_2 (32 + 22) +#define INT_TSSC_SAMPLE(32 + 23) +#define INT_TSSC_PENUP (32 + 24) +#define INT_TCHSCRN_SSBI (32 + 25) +#define INT_FM_RDS (32 + 26) +#define INT_KEYSENSE (32 + 27) +#define INT_USB_OTG_HS (32 + 28) +#define INT_USB_OTG_HS2(32 + 29) +#define INT_USB_OTG_HS3(32 + 30) +#define INT_RESERVED_BIT31 (32 + 31) + +#define INT_SPI_OUTPUT (64 + 0) +#define INT_SPI_INPUT (64 + 1) +#define INT_SPI_ERROR (64 + 2) +#define INT_UART1 (64 + 3) +#define INT_UART1_RX (64 + 4) +#define INT_UART2 (64 + 5) +#define INT_UART2_RX (64 + 6) +#define INT_UART3 (64 + 7) +#define INT_UART3_RX (64 + 8) +#define INT_UART1DM_IRQ(64 + 9) +#define INT_UART1DM_RX (64 + 10) +#define INT_UART2DM_IRQ(64 + 11) +#define INT_UART2DM_RX (64 + 12) +#define INT_TSIF (64 + 13) +#define INT_ADM_SC1(64 + 14) +#define INT_ADM_SC2(64 + 15) +#define INT_MDP(64 + 16) +#define INT_VPE(64 + 17) +#define INT_GR
[U-Boot] [PATCH 3/5] MSM 7x27a: Add support for qualcomm msm7x27a surf board
Signed-off-by: Srikanth Reddy Vintha
---
board/qcom/msm7x27a_surf/Makefile| 56 +
board/qcom/msm7x27a_surf/msm7x27a_surf.c | 126 +
board/qcom/msm7x27a_surf/msm7x27a_surf.h | 27 ++
boards.cfg |1 +
include/configs/msm7x27a_surf.h | 128 ++
5 files changed, 338 insertions(+), 0 deletions(-)
create mode 100644 board/qcom/msm7x27a_surf/Makefile
create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.c
create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.h
create mode 100644 include/configs/msm7x27a_surf.h
diff --git a/board/qcom/msm7x27a_surf/Makefile
b/board/qcom/msm7x27a_surf/Makefile
new file mode 100644
index 000..123099d
--- /dev/null
+++ b/board/qcom/msm7x27a_surf/Makefile
@@ -0,0 +1,56 @@
+#
+# (C) Copyright 2012
+# Larsen & Toubro Infotech Ltd.
+#
+# (C) Copyright 2010,2011
+# NVIDIA Corporation
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)../../qcom/msm7x27a_surf/)
+endif
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS := $(BOARD).o
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+ $(call cmd_link_o_target, $(OBJS))
+
+clean:
+ rm -f $(OBJS)
+
+distclean:
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/qcom/msm7x27a_surf/msm7x27a_surf.c
b/board/qcom/msm7x27a_surf/msm7x27a_surf.c
new file mode 100644
index 000..9199f48
--- /dev/null
+++ b/board/qcom/msm7x27a_surf/msm7x27a_surf.c
@@ -0,0 +1,126 @@
+/*
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "msm7x27a_surf.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f()
+{
+ uart1_clock_init();
+ return 0;
+}
+#endif
+int board_init()
+{
+ unsigned long new_addr;
+ unsigned long offset;
+ offset = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
+ new_addr = CONFIG_SYS_TEXT_BASE + offset;
+ set_vector_base(new_addr);
+ acpu_clock_init();
+ bd_t *bd = gd->bd;
+ bd->bi_arch_number = MACH_TYPE_MSM7X27_SURF;
+ return 0;
+}
+
+#ifdef CONFIG_QC_MMC
+
+/* called during the scan of each mmc device */
+int qc_board_mmc_init(struct mmc *mmc)
+{
+
+ struct mmc_priv *sd = (struct mmc_priv *)mmc->priv;
+ u32 smem_val;
+ do {
+ smem_val = 0;
+ smem_val = readl(MSM_SHARED_BASE + 0x14);
+ } while (smem_val != 1);
+
+ if (sd->instance == 3 || sd->instance == 4) {
+ mmc_boot_main(mmc);
+ return 0;
+ } else
+ /* this board does not have an sd/mmc card on this interface. */
+ return 1;
+ }
+int board_mmc_init(bd_t *bis)
+{
+#ifdef QC_SD
+ struct mmc *mmc_4;
+ struct mmc_priv *sdcc_4;
+ mmc_4 = (struct mmc *) malloc(sizeof(struct mmc));
+ if (!mmc_4)
+ return 1;
+ sdcc_4 = (struct mmc_priv *) malloc(sizeof(struct mmc_priv));
+ if (!
[U-Boot] [PATCH 0/5] *** Qualcomm chipset support patches ***
From: Shrinivas Sahukar *** This patch series contains the following support for Qualcomm chipsets *** * MSM7630: USB Gadget support * MSM 7x27a: Add support for qualcomm msm 7x27a SOC * MSM 7x27a: Add support for qualcomm msm7x27a surf board * MSM7x27a: USB Gadget support * Fix for MMC Write Issue Shrinivas Sahukar (1): fix for MMC write issue Srikanth Reddy Vintha (4): MSM7630: USB Gadget support MSM 7x27a: Add support for qualcomm msm 7x27a SOC MSM 7x27a: Add support for qualcomm msm7x27a surf board MSM7x27a: USB Gadget support arch/arm/cpu/armv7/msm7x27a/Makefile | 53 +++ arch/arm/cpu/armv7/msm7x27a/acpuclock.c| 258 +++ arch/arm/cpu/armv7/msm7x27a/board.c| 66 +++ arch/arm/cpu/armv7/msm7x27a/config.mk | 21 + arch/arm/cpu/armv7/msm7x27a/gpio.c | 287 + arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S| 118 + arch/arm/cpu/armv7/msm7x27a/timer.c| 127 ++ arch/arm/include/asm/arch-msm7630/irqs.h | 162 +++ arch/arm/include/asm/arch-msm7x27a/gpio.h | 47 ++ arch/arm/include/asm/arch-msm7x27a/iomap.h | 106 + arch/arm/include/asm/arch-msm7x27a/irqs.h | 138 ++ arch/arm/include/asm/arch-msm7x27a/mmc.h | 399 + arch/arm/include/asm/arch-msm7x27a/proc_comm.h | 42 ++ arch/arm/include/asm/arch-msm7x27a/sys_proto.h | 27 ++ board/qcom/msm7x27a_surf/Makefile | 56 +++ board/qcom/msm7x27a_surf/msm7x27a_surf.c | 126 ++ board/qcom/msm7x27a_surf/msm7x27a_surf.h | 27 ++ boards.cfg |1 + drivers/mmc/qc_mmc.c | 71 +++- drivers/serial/usbtty.h|2 + drivers/usb/gadget/Makefile|1 + drivers/usb/gadget/msm_udc.c | 540 include/configs/msm7630_surf.h | 11 +- include/configs/msm7x27a_surf.h| 127 ++ include/usb/msm_udc.h | 178 25 files changed, 2985 insertions(+), 6 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7x27a/Makefile create mode 100644 arch/arm/cpu/armv7/msm7x27a/acpuclock.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/board.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/config.mk create mode 100644 arch/arm/cpu/armv7/msm7x27a/gpio.c create mode 100644 arch/arm/cpu/armv7/msm7x27a/lowlevel_init.S create mode 100644 arch/arm/cpu/armv7/msm7x27a/timer.c create mode 100644 arch/arm/include/asm/arch-msm7630/irqs.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/gpio.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/iomap.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/mmc.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/proc_comm.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/sys_proto.h create mode 100644 board/qcom/msm7x27a_surf/Makefile create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.c create mode 100644 board/qcom/msm7x27a_surf/msm7x27a_surf.h create mode 100644 drivers/usb/gadget/msm_udc.c create mode 100644 include/configs/msm7x27a_surf.h create mode 100644 include/usb/msm_udc.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] MSM7x27a:Add support for USB gadget
* USB gadget support
Signed-off-by: Srikanth Reddy Vintha
---
arch/arm/cpu/armv7/msm7x27a/acpuclock.c|7 +
arch/arm/include/asm/arch-msm7x27a/hsusb.h | 183
arch/arm/include/asm/arch-msm7x27a/iomap.h |2 +
drivers/usb/gadget/msm_udc.c | 11 +-
include/configs/msm7x27a_surf.h| 12 +-
5 files changed, 205 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/include/asm/arch-msm7x27a/hsusb.h
diff --git a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
index 7f46d18..ae9db0d 100644
--- a/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
+++ b/arch/arm/cpu/armv7/msm7x27a/acpuclock.c
@@ -220,6 +220,13 @@ void acpu_clock_init(void)
}
}
+void hsusb_clock_init(void)
+{
+ /* USB local clock control not enabled; use proc comm */
+ usb_clock_init();
+}
+
+
#ifdef CONFIG_QC_MMC
/* Configure MMC clock */
void clock_config_mmc(uint32_t interface, uint32_t freq)
diff --git a/arch/arm/include/asm/arch-msm7x27a/hsusb.h
b/arch/arm/include/asm/arch-msm7x27a/hsusb.h
new file mode 100644
index 000..0a8f853
--- /dev/null
+++ b/arch/arm/include/asm/arch-msm7x27a/hsusb.h
@@ -0,0 +1,183 @@
+/*
+ * Copyright (c) 2008, Google Inc.
+ * All rights reserved.
+ *
+ * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
+ *
+ * (C) Copyright 2012
+ * Larsen & Toubro Infotech Ltd.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in
+ *the documentation and/or other materials provided with the
+ *distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _HSUSB_H_
+#define _HSUSB_H_
+
+#include
+
+#ifndef MSM_USB_BASE
+#error Must define base address for USB controller MSM_USB_BASE
+#endif
+
+#define USB_ID (MSM_USB_BASE + 0x)
+#define USB_HWGENERAL(MSM_USB_BASE + 0x0004)
+#define USB_HWHOST (MSM_USB_BASE + 0x0008)
+#define USB_HWDEVICE (MSM_USB_BASE + 0x000C)
+#define USB_HWTXBUF (MSM_USB_BASE + 0x0010)
+#define USB_HWRXBUF (MSM_USB_BASE + 0x0014)
+#define USB_SBUSCFG (MSM_USB_BASE + 0x0090)
+
+#define USB_AHB_BURST(MSM_USB_BASE + 0x0090)
+#define USB_AHB_MODE (MSM_USB_BASE + 0x0098)
+#define USB_CAPLENGTH(MSM_USB_BASE + 0x0100) /* 8 bit */
+#define USB_HCIVERSION (MSM_USB_BASE + 0x0102) /* 16 bit */
+#define USB_HCSPARAMS(MSM_USB_BASE + 0x0104)
+#define USB_HCCPARAMS(MSM_USB_BASE + 0x0108)
+#define USB_DCIVERSION (MSM_USB_BASE + 0x0120) /* 16 bit */
+#define USB_USBCMD (MSM_USB_BASE + 0x0140)
+#define USB_USBSTS (MSM_USB_BASE + 0x0144)
+#define USB_USBINTR (MSM_USB_BASE + 0x0148)
+#define USB_FRINDEX (MSM_USB_BASE + 0x014C)
+#define USB_DEVICEADDR (MSM_USB_BASE + 0x0154)
+#define USB_ENDPOINTLISTADDR (MSM_USB_BASE + 0x0158)
+#define USB_BURSTSIZE(MSM_USB_BASE + 0x0160)
+#define USB_TXFILLTUNING (MSM_USB_BASE + 0x0164)
+#define USB_ULPI_VIEWPORT(MSM_USB_BASE + 0x0170)
+#define USB_ENDPTNAK (MSM_USB_BASE + 0x0178)
+#define USB_ENDPTNAKEN (MSM_USB_BASE + 0x017C)
+#define USB_PORTSC (MSM_USB_BASE + 0x0184)
+#define USB_OTGSC(MSM_USB_BASE + 0x01A4)
+#define USB_USBMODE (MSM_USB_BASE + 0x01A8)
+#define USB_ENDPTSETUPSTAT (MSM_USB_BASE + 0x01AC)
+#define USB_ENDPTPRIME (MSM_USB_BASE + 0x01B0)
+#define USB_ENDPTFLUSH (MSM_USB_BASE + 0x01B4)
+#define USB_ENDPTSTAT(MSM_USB_BASE + 0x01B8)
+#define USB_ENDPTCOMPLETE(MSM_USB_BASE + 0x01BC)
+#define USB_ENDPTCTRL(n) (MSM_USB_BASE + 0x01C0 + (4 * (n)))
+
+
+#define USBCMD_RESET 2
+#define USBCMD_ATTACH 1
+
+#define USBMODE_DEVICE 2
+#define USBMODE_HOST 3
+
+/* Endpoint Txfer Descriptor dTD as defined by DC */
+struct
[U-Boot] [PATCH 1/2] MSM7x27a:Add support for interrupt
* support for msm7x27a interrupt Signed-off-by: Srikanth Reddy Vintha --- arch/arm/cpu/armv7/msm7x27a/Makefile|1 + arch/arm/cpu/armv7/msm7x27a/interrupts.c| 136 +++ arch/arm/include/asm/arch-msm7x27a/exclusion.h | 42 +++ arch/arm/include/asm/arch-msm7x27a/interrupts.h | 39 +++ arch/arm/include/asm/arch-msm7x27a/irqs.h | 98 board/qcom/msm7x27a_surf/msm7x27a_surf.c|2 + include/configs/msm7x27a_surf.h |2 +- 7 files changed, 319 insertions(+), 1 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h diff --git a/arch/arm/cpu/armv7/msm7x27a/Makefile b/arch/arm/cpu/armv7/msm7x27a/Makefile index 5f493d7..19e7546 100644 --- a/arch/arm/cpu/armv7/msm7x27a/Makefile +++ b/arch/arm/cpu/armv7/msm7x27a/Makefile @@ -34,6 +34,7 @@ COBJS-y := board.o COBJS-y+= timer.o COBJS-y+= acpuclock.o COBJS-y+= gpio.o +COBJS-$(CONFIG_USE_IRQ)+= interrupts.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS-y)) diff --git a/arch/arm/cpu/armv7/msm7x27a/interrupts.c b/arch/arm/cpu/armv7/msm7x27a/interrupts.c new file mode 100644 index 000..cc45c4b --- /dev/null +++ b/arch/arm/cpu/armv7/msm7x27a/interrupts.c @@ -0,0 +1,136 @@ +/* + * Copyright (c) 2008, Google Inc. + * All rights reserved. + * + * (C) Copyright 2012 + * Larsen & Toubro Infotech Ltd. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Google, Inc. nor the names of its contributors + * may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include + +#define VIC_REG(off) (MSM_VIC_BASE + (off)) + +#define VIC_INT_SELECT0 VIC_REG(0x) /* 1: FIQ, 0: IRQ */ +#define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ +#define VIC_INT_EN0 VIC_REG(0x0010) +#define VIC_INT_EN1 VIC_REG(0x0014) +#define VIC_INT_ENCLEAR0 VIC_REG(0x0020) +#define VIC_INT_ENCLEAR1 VIC_REG(0x0024) +#define VIC_INT_ENSET0 VIC_REG(0x0030) +#define VIC_INT_ENSET1 VIC_REG(0x0034) +#define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ +#define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ +#define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ +#define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ +#define VIC_NO_PEND_VAL VIC_REG(0x0060) +#define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ +#define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ +#define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ +#define VIC_IRQ_STATUS0 VIC_REG(0x0080) +#define VIC_IRQ_STATUS1 VIC_REG(0x0084) +#define VIC_FIQ_STATUS0 VIC_REG(0x0090) +#define VIC_FIQ_STATUS1 VIC_REG(0x0094) +#define VIC_RAW_STATUS0 VIC_REG(0x00A0) +#define VIC_RAW_STATUS1 VIC_REG(0x00A4) +#define VIC_INT_CLEAR0 VIC_REG(0x00B0) +#define VIC_INT_CLEAR1 VIC_REG(0x00B4) +#define VIC_SOFTINT0 VIC_REG(0x00C0) +#define VIC_SOFTINT1 VIC_REG(0x00C4) +#define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ +#define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ +#define VIC_IRQ_VEC_WR VIC_REG(0x00D8) +#define VIC_IRQ_IN_SERVICE
[U-Boot] [PATCH 0/2] This patch series contains support for interrupt and USB gadget in MSM7x27a surf board
Srikanth Reddy Vintha (2): MSM7x27a:Add support for interrupt MSM7x27a:Add support for USB gadget arch/arm/cpu/armv7/msm7x27a/Makefile|1 + arch/arm/cpu/armv7/msm7x27a/acpuclock.c |7 + arch/arm/cpu/armv7/msm7x27a/interrupts.c| 136 + arch/arm/include/asm/arch-msm7x27a/exclusion.h | 42 + arch/arm/include/asm/arch-msm7x27a/hsusb.h | 183 +++ arch/arm/include/asm/arch-msm7x27a/interrupts.h | 39 + arch/arm/include/asm/arch-msm7x27a/iomap.h |2 + arch/arm/include/asm/arch-msm7x27a/irqs.h | 98 board/qcom/msm7x27a_surf/msm7x27a_surf.c|2 + drivers/usb/gadget/msm_udc.c| 11 +- include/configs/msm7x27a_surf.h | 14 +- 11 files changed, 524 insertions(+), 11 deletions(-) create mode 100644 arch/arm/cpu/armv7/msm7x27a/interrupts.c create mode 100644 arch/arm/include/asm/arch-msm7x27a/exclusion.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/hsusb.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/interrupts.h create mode 100644 arch/arm/include/asm/arch-msm7x27a/irqs.h ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
