Re: [U-Boot] [PATCH] powerpc/corenet_ds: move SATA config to board configuration

2012-11-02 Thread Zang Roy-R61911


 -Original Message-
 From: Tabi Timur-B04825
 Sent: Friday, November 02, 2012 12:25 AM
 To: Tabi Timur-B04825
 Cc: Zang Roy-R61911; u-boot@lists.denx.de; aflem...@gmail.com
 Subject: Re: [U-Boot] [PATCH] powerpc/corenet_ds: move SATA config to
 board configuration
 
 On Thu, Nov 1, 2012 at 11:20 AM, Tabi Timur-B04825 b04...@freescale.com
 wrote:
 
  To solve this problem, move CONFIG_FSL_SATA_V2 to board configuration
  header file.
 
  http://patchwork.ozlabs.org/patch/126958/
 
 To be clear, I think you should say in the patch description that your
 patch effectively reverts mine.
I noticed your patch. 
OK, I will re-post the patch to add the description.
Roy

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Re: [U-Boot] [PATCH v2] QorIQ: fix network frame manager TBI PHY address settings

2011-11-03 Thread Zang Roy-R61911


 -Original Message-
 From: Zang Roy-R61911
 Sent: Friday, October 28, 2011 13:16 PM
 To: u-boot@lists.denx.de
 Cc: Zang Roy-R61911; Fleming Andy-AFLEMING; Kumar Gala
 Subject: [PATCH v2] QorIQ: fix network frame manager TBI PHY address settings
 
 TBI PHY address (TBIPA) register has been set in general frame manager
 phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c
 
 So remove the duplicate code on QorIQ frame manager Ethernet related
 platforms, which include Hydra board, P4080DS board and P2041rdb board.
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Cc: Andy Fleming aflem...@freescale.com
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
 v2: refine the subject and description according to feedback
Hi, Wolfgang
Any feedback for the update patch?
Thanks.
Roy

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Re: [U-Boot] [PATCH v2] Phy/Marvell: Rewrite the MV88E1111 phy config function based on kernel code

2011-11-03 Thread Zang Roy-R61911


 -Original Message-
 From: Zang Roy-R61911
 Sent: Friday, October 28, 2011 12:52 PM
 To: u-boot@lists.denx.de
 Cc: Zang Roy-R61911; Kumar Gala
 Subject: [PATCH v2] Phy/Marvell: Rewrite the MV88E phy config function 
 based
 on kernel code
 
 The original m88es_config() does not do the SGMII mode
 initialization and is buggy. Rewrite the function according to
 3.0.6 kernel function m88e_config_init() in drivers/net/phy/marvell.c
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Acked-by: Andy Fleming aflem...@freescale.com
 Cc: Kumar Gala ga...@kernel.crashing.org
 ---
 v2: Use timeout instead of infinite loop
How about this patch?
Any feedback?
Thanks.
Roy

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Re: [U-Boot] [PATCH] powerpc/fm: remove the TBIPA setting on platform code

2011-10-24 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Monday, October 24, 2011 13:24 PM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Fleming Andy-AFLEMING; Kumar Gala
 Subject: Re: [U-Boot] [PATCH] powerpc/fm: remove the TBIPA setting on platform
 code
 
 Dear Zang Roy-R61911,
 
 In message 2239AC579C7D3646A720227A37E02681200AAA@039-SN1MPN1-
 004.039d.mgd.msft.net you wrote:
 
   Please change the Subject: so everybody understands what you are
   doing. powerpc/fm is not exactly clear to everybody, and neither is
   TBIPA.
  
   Nor is clear which processors / processor families / boards are
   affected.
  Per my understand, subject is a summary of the patch. poweper/fm and TBIPA
 should almost be OK for the subject. I can point out that the code is about 
 the
 network code in subject.
  for example, Subject:
  powerpc/fm: remove the TBIPA setting on platform network related code
 
 No.  I have not the lightest idea what FM (Frequency Modulation?) or
 TBIPA might be.

Any way you are the owner.
How about this way:
Subject: net/frame manager: remove TBI PHY address register setting on platform 
related code

Then I add the other more detailed required information in the description body?
Thanks.
Roy




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Re: [U-Boot] [PATCH] powerpc/fm: remove the TBIPA setting on platform code

2011-10-24 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Tuesday, October 25, 2011 3:05 AM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Fleming Andy-AFLEMING; Kumar Gala
 Subject: Re: [U-Boot] [PATCH] powerpc/fm: remove the TBIPA setting on platform
 code
 
 Dear Zang Roy-R61911,
 
 In message 2239AC579C7D3646A720227A37E02681200C29@039-SN1MPN1-
 004.039d.mgd.msft.net you wrote:
 
  How about this way:
  Subject: net/frame manager: remove TBI PHY address register setting on plat=
  form related code
 
  Then I add the other more detailed required information in the description =
  body?
 
 You are putting too much low level detail into the Subject: line,
 while leaving out important higher level information, like
 architecture, SoC, etc.
 
 How about something like:
 
   QorIQ: fix network frame manager settings
This subject is too big. What kind of network frame manager setting? It will be 
hard for someone to find useful information in the subject.
Prefer:
QorIQ: fix network frame manager TBI PHY address settings

Roy

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Re: [U-Boot] [PATCH] phy/marvell: Rewrite the MV88E1111 phy config function based on kernel code

2011-10-23 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Monday, October 24, 2011 3:42 AM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Kumar Gala
 Subject: Re: [U-Boot] [PATCH] phy/marvell: Rewrite the MV88E phy config
 function based on kernel code
 
 Dear Roy Zang,
 
 In message 1319178713-12472-2-git-send-email-tie-fei.z...@freescale.com you
 wrote:
  The original m88es_config() does not do the SGMII mode
  initialization and is buggy. Rewrite the function according to
  3.0.6 kernel function m88e_config_init() in drivers/net/phy/marvell.c
 
  Signed-off-by: Roy Zang tie-fei.z...@freescale.com
  Acked-by: Andy Fleming aflem...@freescale.com
  Cc: Kumar Gala ga...@kernel.crashing.org
 ...
  +   /* soft reset */
  +   phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
  +   do
  +   reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  +   while (reg  BMCR_RESET);
 ...
  +   /* soft reset */
  +   phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);
  +   do
  +   reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  +   while (reg  BMCR_RESET);
 
 Do we really need this double reset?
The MV88E user manual requests any changes to HWCFG_MODE of Extended PHY 
Specific Status Register must be followed by software reset to take effect
From the code flow, double reset is only for RTBI mode, which really doubly 
changes the HWCFG_MODE bits.

 
 Also, I dislike the potentially infinite loop here - please add a
 timeout and an error exit.
This makes sense. Will update and resend.
Thanks.
Roy


 
 Best regards,
 
 Wolfgang Denk
 
 --
 DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 A supercomputer is a machine that runs an endless loop in 2 seconds.


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Re: [U-Boot] [PATCH] powerpc/fm: remove the TBIPA setting on platform code

2011-10-23 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Monday, October 24, 2011 3:37 AM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Fleming Andy-AFLEMING; Kumar Gala
 Subject: Re: [U-Boot] [PATCH] powerpc/fm: remove the TBIPA setting on platform
 code
 
 Dear Roy Zang,
 
 In message 1319178713-12472-1-git-send-email-tie-fei.z...@freescale.com you
 wrote:
  TBIPA has been set in dtsec_init_phy () funciton in drivers/net/fm/eth.c
 
  So remove the duplicate code on platform Ethernet code.
 
  Signed-off-by: Roy Zang tie-fei.z...@freescale.com
  Cc: Andy Fleming aflem...@freescale.com
  Cc: Kumar Gala ga...@kernel.crashing.org
 
 Please change the Subject: so everybody understands what you are
 doing. powerpc/fm is not exactly clear to everybody, and neither is
 TBIPA.
 
 Nor is clear which processors / processor families / boards are
 affected.
Per my understand, subject is a summary of the patch. poweper/fm and TBIPA 
should almost be OK for the subject. I can point out that the code is about the 
network code in subject.
for example, Subject:
powerpc/fm: remove the TBIPA setting on platform network related code

Then I add more in the patch description to explain fm, TBIPA, processors, 
processor families/boards affected.

Thanks.
Roy

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Re: [U-Boot] [PATCH v2] powerpc/85xx: Add basic support for P1023RDS board

2011-06-24 Thread Zang Roy-R61911
any feedback for this patch?
Thanks.
Roy

 -Original Message-
 From: Zang Roy-R61911
 Sent: Thursday, June 09, 2011 11:31 AM
 To: u-boot@lists.denx.de
 Cc: Zang Roy-R61911; Wang Haiying-R54964; Lan Chunhe-B25806; Xu Lei-B33228;
 sun york-R58495; Kumar Gala
 Subject: [PATCH v2] powerpc/85xx: Add basic support for P1023RDS board
 
 The P1023RDS board is the reference board for the P1023 SoC.
 
 Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
 UART, I2C, etc.
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Signed-off-by: Haiying Wang haiying.w...@freescale.com
 Signed-off-by: Chunhe Lan chunhe@freescale.com
 Signed-off-by: Lei Xu b33...@freescale.com
 Signed-off-by: York Sun york...@freescale.com
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 based on Prepare v2011.06-rc2
 v2 vs. v1: some code style clean up
 
  MAINTAINERS   |1 +
  board/freescale/p1023rds/Makefile |   38 ++
  board/freescale/p1023rds/bcsr.h   |   53 +++
  board/freescale/p1023rds/law.c|   35 ++
  board/freescale/p1023rds/p1023rds.c   |  162 +++
  board/freescale/p1023rds/tlb.c|  118 ++
  boards.cfg|2 +
  doc/README.p1023rds   |  102 +
  include/configs/P1023RDS.h|  562
 +
  nand_spl/board/freescale/p1023rds/Makefile|  133 ++
  nand_spl/board/freescale/p1023rds/nand_boot.c |   99 +
  11 files changed, 1305 insertions(+), 0 deletions(-)
  create mode 100644 board/freescale/p1023rds/Makefile
  create mode 100644 board/freescale/p1023rds/bcsr.h
  create mode 100644 board/freescale/p1023rds/law.c
  create mode 100644 board/freescale/p1023rds/p1023rds.c
  create mode 100644 board/freescale/p1023rds/tlb.c
  create mode 100644 doc/README.p1023rds
  create mode 100644 include/configs/P1023RDS.h
  create mode 100644 nand_spl/board/freescale/p1023rds/Makefile
  create mode 100644 nand_spl/board/freescale/p1023rds/nand_boot.c
 
 diff --git a/MAINTAINERS b/MAINTAINERS
 index c462ae2..af31552 100644
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
 @@ -511,6 +511,7 @@ Ilya Yanok ya...@emcraft.com
  Roy Zang tie-fei.z...@freescale.com
 
   mpc7448hpc2 MPC7448
 + P1023RDSP1023
 
  John Zhan zh...@sinovee.com
 
 diff --git a/board/freescale/p1023rds/Makefile
 b/board/freescale/p1023rds/Makefile
 new file mode 100644
 index 000..bf87580
 --- /dev/null
 +++ b/board/freescale/p1023rds/Makefile
 @@ -0,0 +1,38 @@
 +#
 +# Copyright 2010-2011 Freescale Semiconductor, Inc.
 +#
 +# This program is free software; you can redistribute it and/or modify it
 +# under the terms of the GNU General Public License as published by the Free
 +# Software Foundation; either version 2 of the License, or (at your option)
 +# any later version.
 +#
 +
 +include $(TOPDIR)/config.mk
 +
 +LIB  = $(obj)lib$(BOARD).o
 +
 +COBJS-y  += $(BOARD).o
 +COBJS-y  += law.o
 +COBJS-y  += tlb.o
 +
 +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 +OBJS := $(addprefix $(obj),$(COBJS-y))
 +SOBJS:= $(addprefix $(obj),$(SOBJS))
 +
 +$(LIB):  $(obj).depend $(OBJS) $(SOBJS)
 + $(AR) $(ARFLAGS) $@ $(OBJS)
 +
 +clean:
 + rm -f $(OBJS) $(SOBJS)
 +
 +distclean:   clean
 + rm -f $(LIB) core *.bak .depend
 +
 +#
 +
 +# defines $(obj).depend target
 +include $(SRCTREE)/rules.mk
 +
 +sinclude $(obj).depend
 +
 +#
 diff --git a/board/freescale/p1023rds/bcsr.h b/board/freescale/p1023rds/bcsr.h
 new file mode 100644
 index 000..0995aa4
 --- /dev/null
 +++ b/board/freescale/p1023rds/bcsr.h
 @@ -0,0 +1,53 @@
 +/*
 + * Copyright (C) 2011 Freescale Semiconductor, Inc.
 + *
 + * Authors:  Chunhe Lan b25...@freescale.com
 + *
 + * This program is free software; you can redistribute it and/or modify it
 + * under the terms of the GNU General Public License as published by the Free
 + * Software Foundation; either version 2 of the License, or (at your option)
 + * any later version.
 + *
 + */
 +
 +#ifndef __BCSR_H_
 +#define __BCSR_H_
 +
 +#include common.h
 +
 +/*
 + * BCSR Bit definitions
 + * BCSR 15 *
 + 0   device insertion oriention
 + 1   stack processor present
 + 2   power supply shut down/normal operation
 + 3   I2C bus0 drive enable
 + 4   reserved
 + 5:7 I2C bus0 select
 + 5 - I2C_BUS_0_SS0
 + 6 - I2C_BUS_0_SS1
 + 7 - I2C_BUS_0_SS2
 +*/
 +
 +/* BCSR register base address is 0xFX20 */
 +#define BCSR_BASE_REG_OFFSET 0x20
 +#define BCSR_ACCESS_REG_ADDR (CONFIG_SYS_BCSR_BASE + BCSR_BASE_REG_OFFSET)
 +
 +#define BCSR15_DEV_INS_ORI   0x80
 +#define BCSR15_STACK_PRO_PRE 0x40
 +#define BCSR15_POWER_SUPPLY

Re: [U-Boot] [PATCH] powerpc/85xx: Add basic support for P1023RDS board

2011-06-07 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Wednesday, June 08, 2011 13:31 PM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Xu Lei-B33228; Kumar Gala; Wang Haiying-R54964; sun
 york-R58495; Lan Chunhe-B25806
 Subject: Re: [U-Boot] [PATCH] powerpc/85xx: Add basic support for P1023RDS
 board
 
 Dear Roy Zang,
 
 In message 1307508687-12522-1-git-send-email-tie-fei.z...@freescale.com you
 wrote:
  The P1023RDS board is the reference board for the P1023 SoC.
 
  Add support for booting it from NOR or NAND, with fixed 2G of DDR, PCIe,
  UART, I2C, etc.
 
 Please fix the checkpatch warnings (7 lines over 80 characters)

I can fix it. In fact, I use checkpatch every time before I send out patch.
If you check the board header file, most of them has this problem.

Do you think 
+ /* physical addr of CCSRBAR */
+#define CONFIG_SYS_CCSRBAR_PHYSCONFIG_SYS_CCSRBAR
is better than
+#define CONFIG_SYS_CCSRBAR_PHYSCONFIG_SYS_CCSRBAR  /* physical 
addr of CCSRBAR */
???
Please clarify.

 
 ...
  +/* ECC will be enabled based on perf_mode environment variable */
  +#undef CONFIG_DDR_ECC
 ...
  +#undef CONFIG_CLOCKS_IN_MHZ
 ...
  +#undef CONFIG_SYS_RAMBOOT
 ...
  +#undef CONFIG_SERIAL_SOFTWARE_FIFO
 ...
  +#undef CONFIG_SOFT_I2C /* I2C bit-banged */
 ...
  +#undef CONFIG_WATCHDOG /* watchdog disabled */
 ...
  +#undef  CONFIG_BOOTARGS/* the boot command will set bootargs
 */
 
 etc.  Please do not undef what is not defined in the first place.
Will fix.
Thanks.
Roy

 
 
 
 Best regards,
 
 Wolfgang Denk
 
 --
 DENX Software Engineering GmbH, MD: Wolfgang Denk  Detlev Zundel
 HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
 Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
 Real Programmers always confuse Christmas and Halloween because
 OCT 31 == DEC 25 !  - Andrew Rutherford (andr...@ucs.adelaide.edu.au)


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Re: [U-Boot] [PATCH] powerpc:Enable compiler debug option for powerpc platforms

2011-04-25 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Monday, April 25, 2011 16:39 PM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Wood Scott-B07421; Kumar Gala
 Subject: Re: [PATCH] powerpc:Enable compiler debug option for powerpc
 platforms
 
 Dear Zang Roy-R61911,
 
 In message 2239AC579C7D3646A720227A37E02681124B78@039-SN1MPN1-
 004.039d.mgd.msft.net you wrote:
 
   You did not comment to these questions, and your current code is
   still powerpc-centric.
  Yes. because there is other voice:
  http://lists.denx.de/pipermail/u-boot/2011-January/086489.html
  http://lists.denx.de/pipermail/u-boot/2011-January/086512.html
  any  comment?
 
 It would be nice if you actually quoted the text parts that you are
 referring to.
Will.
 
 In any case, I read for example this:
 
 |... I can't
 | provide exact details, since the current toolchains work fine without
 | such tweaking - I only wanted to point out that if you need to specify
 | the exact debug format, then it might be platform-specific.
 |
 | A simple -g should be fine in the common area.
 
 I agree to this.
So -g in the common area and leave -gdwarf2 for platform-specific?
Roy

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Re: [U-Boot] [PATCH] powerpc:Enable compiler debug option for powerpc platforms

2011-04-25 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Monday, April 25, 2011 16:39 PM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Wood Scott-B07421; Kumar Gala
 Subject: Re: [PATCH] powerpc:Enable compiler debug option for powerpc
 platforms
 
 Dear Zang Roy-R61911,
 
 In message 2239AC579C7D3646A720227A37E02681124B78@039-SN1MPN1-
 004.039d.mgd.msft.net you wrote:
 
   You did not comment to these questions, and your current code is
   still powerpc-centric.
  Yes. because there is other voice:
  http://lists.denx.de/pipermail/u-boot/2011-January/086489.html
  http://lists.denx.de/pipermail/u-boot/2011-January/086512.html
  any  comment?
 
 It would be nice if you actually quoted the text parts that you are
 referring to.
 
 In any case, I read for example this:
 
 |... I can't
 | provide exact details, since the current toolchains work fine without
 | such tweaking - I only wanted to point out that if you need to specify
 | the exact debug format, then it might be platform-specific.
 |
 | A simple -g should be fine in the common area.
 
 I agree to this.
Also for a -g option, do you prefer adding to PLATFORM_CPPFLAGS or
CPPFLAGS ?
Thanks.
Roy

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Re: [U-Boot] [PATCH] powerpc:Enable compiler debug option for powerpc platforms

2011-04-24 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Monday, April 25, 2011 7:17 AM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Wood Scott-B07421; Kumar Gala
 Subject: Re: [PATCH] powerpc:Enable compiler debug option for powerpc
 platforms
 
 Dear Roy Zang,
 
 In message 1300161222-19050-1-git-send-email-tie-fei.z...@freescale.com you
 wrote:
  This patch enables compiler debug option for powerpc platforms
  by default.  Patch is tested on 85xx/QorIQ platforms in u-boot
  with CodeWarrior.
 
  Signed-off-by: Roy Zang tie-fei.z...@freescale.com
  Cc: Wood Scott-B07421 b07...@freescale.com
  Cc: Kumar Gala ga...@kernel.crashing.org
  ---
  Consider the comments
  http://lists.denx.de/pipermail/u-boot/2010-October/080689.html
  http://lists.denx.de/pipermail/u-boot/2011-January/086485.html
 
 Indeed.  In
 http://lists.denx.de/pipermail/u-boot/2011-January/086485.html
 I wrote:
 
 | I don't see where this is specific to the Power architecture either -
 | expect that you only tested it there.
 |
 | My understanding is that you enable debug settings for the GNU
 | debugger.
 |
 | Do these need to be architecture specific? Probably not.
 |
 | Do these need to be enabled by a new #define?  What would be the
 | disadvantages of having these options always enabled, for all
 | architectures?
 
 You did not comment to these questions, and your current code is
 still powerpc-centric.
Yes. because there is other voice:
http://lists.denx.de/pipermail/u-boot/2011-January/086489.html
http://lists.denx.de/pipermail/u-boot/2011-January/086512.html
any  comment?
Roy


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Re: [U-Boot] [PATCH v2] Net: Add Intel E1000 82574L PCIe card support

2011-04-11 Thread Zang Roy-R61911
Hi, Wolfgang
Could you help to consider this patch?
Thanks.
Roy
 -Original Message-
 From: Zang Roy-R61911
 Sent: Friday, January 21, 2011 11:30 AM
 To: u-boot@lists.denx.de
 Cc: Zang Roy-R61911
 Subject: [PATCH v2] Net: Add Intel E1000 82574L PCIe card support
 
 Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
 and MPC8572 board.
 Add the missing contact information for future support.
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Acked-by: Kumar Gala ga...@kernel.crashing.org
 ---
 minor style clean up vs. v1 version.
 
  drivers/net/e1000.c |   33 +
  drivers/net/e1000.h |6 ++
  include/pci_ids.h   |1 +
  3 files changed, 32 insertions(+), 8 deletions(-)
 
 diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
 index 5f390bd..98145bc 100644
 --- a/drivers/net/e1000.c
 +++ b/drivers/net/e1000.c
 @@ -40,6 +40,8 @@ tested on both gig copper and gig fiber boards
   *  Copyright (C) Linux Networx.
   *  Massive upgrade to work with the new intel gigabit NICs.
   *  ebiederman at lnxi dot com
 + *
 + *  Copyright 2011 Freescale Semiconductor, Inc.
   */
 
  #include e1000.h
 @@ -100,6 +102,7 @@ static struct pci_device_id supported[] = {
   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573E},
   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573E_IAMT},
   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82573L},
 + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82574L},
   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82546GB_QUAD_COPPER_KSP3},
   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_COPPER_DPT},
   {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_80003ES2LAN_SERDES_DPT},
 @@ -331,7 +334,7 @@ static boolean_t e1000_is_onboard_nvm_eeprom(struct
 e1000_hw *hw)
   if (hw-mac_type == e1000_ich8lan)
   return FALSE;
 
 - if (hw-mac_type == e1000_82573) {
 + if (hw-mac_type == e1000_82573 || hw-mac_type == e1000_82574) {
   eecd = E1000_READ_REG(hw, EECD);
 
   /* Isolate bits 15  16 */
 @@ -364,7 +367,7 @@ e1000_acquire_eeprom(struct e1000_hw *hw)
   return -E1000_ERR_SWFW_SYNC;
   eecd = E1000_READ_REG(hw, EECD);
 
 - if (hw-mac_type != e1000_82573) {
 + if (hw-mac_type != e1000_82573 || hw-mac_type != e1000_82574) {
   /* Request EEPROM Access */
   if (hw-mac_type  e1000_82544) {
   eecd |= E1000_EECD_REQ;
 @@ -498,6 +501,7 @@ static int32_t e1000_init_eeprom_params(struct e1000_hw
 *hw)
   eeprom-use_eewr = FALSE;
   break;
   case e1000_82573:
 + case e1000_82574:
   eeprom-type = e1000_eeprom_spi;
   eeprom-opcode_bits = 8;
   eeprom-delay_usec = 1;
 @@ -1317,6 +1321,9 @@ e1000_set_mac_type(struct e1000_hw *hw)
   case E1000_DEV_ID_82573L:
   hw-mac_type = e1000_82573;
   break;
 + case E1000_DEV_ID_82574L:
 + hw-mac_type = e1000_82574;
 + break;
   case E1000_DEV_ID_80003ES2LAN_COPPER_SPT:
   case E1000_DEV_ID_80003ES2LAN_SERDES_SPT:
   case E1000_DEV_ID_80003ES2LAN_COPPER_DPT:
 @@ -1487,6 +1494,7 @@ e1000_initialize_hardware_bits(struct e1000_hw *hw)
   E1000_WRITE_REG(hw, TARC1, reg_tarc1);
   break;
   case e1000_82573:
 + case e1000_82574:
   reg_ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
   reg_ctrl_ext = ~(1  23);
   reg_ctrl_ext |= (1  22);
 @@ -1728,12 +1736,11 @@ e1000_init_hw(struct eth_device *nic)
   | E1000_TXDCTL_FULL_TX_DESC_WB;
   E1000_WRITE_REG(hw, TXDCTL1, ctrl);
   break;
 - }
 -
 - if (hw-mac_type == e1000_82573) {
 - uint32_t gcr = E1000_READ_REG(hw, GCR);
 - gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
 - E1000_WRITE_REG(hw, GCR, gcr);
 + case e1000_82573:
 + case e1000_82574:
 + reg_data = E1000_READ_REG(hw, GCR);
 + reg_data |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX;
 + E1000_WRITE_REG(hw, GCR, reg_data);
   }
 
  #if 0
 @@ -1812,6 +1819,7 @@ e1000_setup_link(struct eth_device *nic)
   switch (hw-mac_type) {
   case e1000_ich8lan:
   case e1000_82573:
 + case e1000_82574:
   hw-fc = e1000_fc_full;
   break;
   default:
 @@ -4560,6 +4568,9 @@ static int e1000_set_phy_type (struct e1000_hw *hw)
   hw-phy_type = e1000_phy_gg82563;
   break;
   }
 + case BME1000_E_PHY_ID:
 + hw-phy_type = e1000_phy_bm;
 + break;
   /* Fall Through */
   default:
   /* Should never have loaded on this device */
 @@ -4646,6 +4657,10 @@ e1000_detect_gig_phy(struct e1000_hw *hw)
   if (hw-phy_id

Re: [U-Boot] [PATCH v2] Adds general Freescale external debugger support

2011-03-06 Thread Zang Roy-R61911


 -Original Message-
 From: Michael Schwingen [mailto:rincew...@discworld.dascon.de]
 Sent: Monday, January 31, 2011 6:50 AM
 To: Wolfgang Denk
 Cc: Zang Roy-R61911; u-boot@lists.denx.de; Kumar Gala; Wood Scott-B07421
 Subject: Re: [U-Boot] [PATCH v2] Adds general Freescale external debugger
 support
 
[snip]

  Do these need to be enabled by a new #define?  What would be the
  disadvantages of having these options always enabled, for all
  architectures?
 Always having debug info in the ELF file should not cause problems IMHO,
 and one set of settings per platform should be enough.
Including the debug information, size should be consideration.
Roy

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Re: [U-Boot] [PATCH v2] Adds general Freescale external debugger support

2011-03-06 Thread Zang Roy-R61911


 -Original Message-
 From: Michael Schwingen [mailto:rincew...@discworld.dascon.de]
 Sent: Monday, January 31, 2011 19:18 PM
 To: Wolfgang Denk
 Cc: Zang Roy-R61911; u-boot@lists.denx.de; Kumar Gala; Wood Scott-B07421
 Subject: Re: [U-Boot] [PATCH v2] Adds general Freescale external debugger
 support
 
 Wolfgang Denk wrote:
  Dear Michael Schwingen,
 
  In message 4d45eb1d.4020...@discworld.dascon.de you wrote:
 
  Do these need to be architecture specific? Probably not.
 
  I do remember that we needed architecture-dependent debug options on a
  system I worked on in the past, because the preferred debug format was
  different on different platforms (all using gcc/binutils/gdb).
 
 
  Can you please be a bit more specific here?
 
 I can only tell from memory, since this was some years ago - IIRC, we
 needed dwarf debug info on some platforms and stabs on others. I can't
 provide exact details, since the current toolchains work fine without
 such tweaking - I only wanted to point out that if you need to specify
 the exact debug format, then it might be platform-specific.
 
 A simple -g should be fine in the common area.
Hi, Wolfgang
Considering the name, how about 
CONFIG_POWERPC_GNU_DEBUGGER?
thanks.
Roy

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Re: [U-Boot] need your help

2011-02-15 Thread Zang Roy-R61911


 -Original Message-
 From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On
 Behalf Of Wolfgang Denk
 Sent: Wednesday, February 16, 2011 1:44 AM
 To: nice
 Cc: u-boot@lists.denx.de
 Subject: Re: [U-Boot] need your help
[snip]
 Here are more errors.
 
  ## Flattened Device Tree blob at 0040
 
 This is a pretty low address. Eventyally the device tree blob gets
 overwritten during uncompression.

try 0xc0.
Roy

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Re: [U-Boot] [PATCH] Net: Add Intel E1000 82574L PCIe card support

2011-01-18 Thread Zang Roy-R61911


 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de]
 Sent: Wednesday, January 19, 2011 6:33 AM
 To: Zang Roy-R61911
 Cc: u-boot@lists.denx.de; Gala Kumar-B11780
 Subject: Re: [U-Boot] [PATCH] Net: Add Intel E1000 82574L PCIe card support
 
 Dear Roy Zang,
 
 In message 1295351719-2687-1-git-send-email-tie-fei.z...@freescale.com you
 wrote:
  Add Intel E1000 82574L PCIe card support. Test on MPC8544DS
  and MPC8572 board.
  Add the missing contact information for future support.
 
  Signed-off-by: Roy Zang tie-fei.z...@freescale.com
  ---
[snip]

  diff --git a/drivers/net/e1000.h b/drivers/net/e1000.h
  index eb0804b..4c60b70 100644
  --- a/drivers/net/e1000.h
  +++ b/drivers/net/e1000.h
  @@ -24,12 +24,18 @@
 Linux NICS linux.n...@intel.com
 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 
  +
 
 **
 */
 
 Please drop the additional blank line
 
  +/* Copyright 2009, 2011 Freescale Semiconductor, Inc.
  + * Authors: Roy Zang tie-fei.z...@freescale.com
  + *   - Add PCI Express card support in Jul. 2009
  + */
 
 If you really insist on adding this, thenmove it up into the header.


In fact, my original internal code put it to the header, but when I check it 
with checkpatch.pl, I will get a warning such as:
WARNING: please, no spaces at the start of a line
#156: FILE: drivers/net/e1000.h:5:
+  Copyright 2011 Freescale Semiconductor, Inc.$

How to balance?
Thanks.
Roy


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Re: [U-Boot] [PATCH 1/2] PBL: add support for boot from SPI flash.

2010-11-12 Thread Zang Roy-R61911


 -Original Message-
 From: Gala Kumar-B11780
 Sent: Friday, November 12, 2010 17:50 PM
 To: Xie Shaohui-B21989
 Cc: u-boot@lists.denx.de; Zang Roy-R61911; Lan Chunhe-B25806; Hu
Mingkai-
 B21284
 Subject: Re: [PATCH 1/2] PBL: add support for boot from SPI flash.
 
 
 On Nov 12, 2010, at 12:36 AM, Shaohui Xie wrote:
 
  PBL: SPI flash used as RCW and PBI source, CPC1 used as 1M SRAM
  where PBL will copy whole U-BOOT image to, U-boot can boot from CPC1
  after PBL completes RCW and PBI phases.
 
  To produces the U-boot image which can used by PBL,
pbl_image_tool.html
  is a necessary tool.
 
 (drop this bit about pbl_image_tool.html, I assume this is the RCW
tool??)
 
 
  Signed-off-by: Chunhe Lan b25...@freescale.com
  Signed-off-by: Mingkai Hu mingkai...@freescale.com
  Signed-off-by: Shaohui Xie b21...@freescale.com
  ---
  arch/powerpc/cpu/mpc85xx/cpu_init.c  |   25
+
  board/freescale/corenet_ds/config.mk |   6 ++
  board/freescale/corenet_ds/tlb.c |9 +
  boards.cfg   |1 +
  include/configs/corenet_ds.h |   31
+--
  5 files changed, 70 insertions(+), 2 deletions(-)
 
 Let's use CONFIG_SPIFLASH like we do on all other boards instead of
 CONFIG_PBLSPI

This patch is for PBL boot and is not dedicated to SPI. SD/MMC boot can
also use it.
CONFIG_SPIFLASH can't reflect the boot information.
How about CONFIG_PBL_BOOT?
Thanks.
Roy

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Re: [U-Boot] [PATCH v2] fsl_esdhc: Only modify the field we are changing in WML

2010-03-22 Thread Zang Roy-R61911
 

 -Original Message-
 From: Kumar Gala [mailto:ga...@kernel.crashing.org] 
 Sent: Monday, March 22, 2010 2:12 AM
 To: u-boot@lists.denx.de
 Cc: Zang Roy-R61911
 Subject: [PATCH v2] fsl_esdhc: Only modify the field we are 
 changing in WML
 
 From: Roy Zang tie-fei.z...@freescale.com
 
 When we set the read or write watermark in WML we should maintain the
 rest of the register as is, rather than using some hard coded value.
 
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 Acked-by: Stefano Babic sba...@denx.de
 Signed-off-by: Kumar Gala ga...@kernel.crashing.org
 ---
 * Fixed line length
 
  drivers/mmc/fsl_esdhc.c |9 -
  include/fsl_esdhc.h |2 ++
  2 files changed, 6 insertions(+), 5 deletions(-)
Thanks.
I have posted this about one month ago:
http://lists.denx.de/pipermail/u-boot/2010-February/068020.html
Roy
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Re: [U-Boot] [PATCH] Enable usb ehci support for p2020ds board

2009-09-15 Thread Zang Roy-R61911
 

 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de] 
 Sent: Tuesday, September 15, 2009 2:55 AM
 To: Zang Roy-R61911
 Cc: Felix Radensky; U-Boot-Denx; Zhang Junjie-B18070; Kumar Gala
 Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
 p2020ds board
 
 Dear Zang Roy-R61911,
 
 In message 
 7df0af56456b8f4081e3c44ccce311de5a3...@zch01exm23.fsl.freesca
 le.net you wrote:
   
 ...
  You need to run
  = usb start
  to start usb, then run
  = usb dev 0
  to specify the device, then run
 
 This should not be needed...
 
  = ext2ls usb 0:1
  to ls the sda1 content. make sure it is ext2.
 
 ... as this command explicitly sets the device.
You are correct.
Thanks.
Roy
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Re: [U-Boot] [PATCH] Enable usb ehci support for p2020ds board

2009-09-14 Thread Zang Roy-R61911
 

 -Original Message-
 From: Felix Radensky [mailto:fe...@embedded-sol.com] 
 Sent: Monday, September 14, 2009 15:50 PM
 To: Zang Roy-R61911
 Cc: U-Boot-Denx; Kumar Gala; Zhang Junjie-B18070
 Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
 p2020ds board
 
 Hi,
 
 Zang Roy-R61911 wrote:
   
 

  -Original Message-
  From: Felix Radensky [mailto:fe...@embedded-sol.com] 
  Sent: Sunday, September 13, 2009 17:19 PM
  To: Zang Roy-R61911
  Cc: U-Boot-Denx; Kumar Gala
  Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
  p2020ds board
 
  Hi, Roy
 
  Does this mean that USB mass storage devices are actually
  usable on P2020DS ? 
  
  Yes, it works.
 

  Similar patch for MPC8536DS was
  added during 2008.08 merge window, but USB mass storage
  devices are not recognized by u-boot.
  
  Why? I do not try on 8536DS, but I think it should work. 
 The same ip and
  the same code :-).
 

  Since I don't see any FSL
  ehici driver changes, I suspect situation may be similar on
  P2020DS.
  
  P2020DS and 8536DS should use the same driver. it works. 
  user ext2 command  to opertate usb interface.
 
  My log here on P2020:
 
  U-Boot 2009.08-00126-g0fc8f56-dirty (Sep 09 2009 - 18:00:43)
 
  CPU0:  P2020E, Version: 1.0, (0x80ea0010)
  Core:  E500, Version: 4.0, (0x80211040)
  Clock Configuration:
 CPU0:1199.988 MHz, CPU1:1199.988 MHz,
 CCB:599.994 MHz,
 DDR:333.330 MHz (666.660 MT/s data rate) (Asynchronous),
  LBC:37.500 MHz
  L1:D-cache 32 kB enabled
 I-cache 32 kB enabled
  Board: P2020DS Sys ID: 0x16, Sys Ver: 0x02, FPGA Ver: 0x03, vBank: 0
  I2C:   ready
  DRAM:  InitializingDDR:  1 GB
  FLASH: 128 MB
  L2:512 KB enabled
  NAND:  No NAND device found!!!
  No NAND device found!!!
  No NAND device found!!!
  2048 MiB
  *** Warning - bad CRC, using default environment
 
  EEPROM: NXID v0
 
  PCIE2 connected to ULI as Root Complex (base addr ffe09000)
 Scanning PCI bus 01
  02  11  8086  100f  0200  00
  02  1c  10b9  5237  0c03  00
  02  1c  10b9  5237  0c03  00
  02  1c  10b9  5237  0c03  00
  02  1c  10b9  5239  0c03  00
  02  1e  10b9  1575  0601  00
  02  1e  10b9  7101  0680  00
  02  1f  10b9  5229  0101  00
  02  1f  10b9  5288  0101  00
  01  00  10b9  5249  0604  00
  PCIE2 on bus 00 - 02
 
  PCIE3 connected to Slot 1 as Root Complex (base addr ffe08000)
  PCIE3 on bus 03 - 03
 
  PCIE1 connected to Slot 2 as Root Complex (base addr ffe0a000)
  PCIE1 on bus 04 - 04
  Video: No radeon video card found!
  In:serial
  Out:   serial
  Err:   serial
  SCSI:  AHCI 0001. 32 slots 4 ports 3 Gbps 0xf impl IDE mode
  flags: ncq ilck pm led clo pmp pio slum part
  scanning bus for devices...
  Net:   e1000: 00:07:e9:14:4d:e3
  eTSEC1, eTSEC2, eTSEC3, e1000#0
  Warning: e1000#0 MAC addresses don't match:
  Address in SROM is 00:07:e9:14:4d:e3
  Address in environment is  00:e0:0c:02:03:fd
 
  Hit any key to stop autoboot:  0
  =
  = help usb
  usb - USB sub-system
 
  Usage:
  usb reset - reset (rescan) USB controller
  usb stop [f]  - stop USB [f]=force stop
  usb tree  - show USB device tree
  usb info [dev] - show available USB devices
  usb storage  - show details of USB storage devices
  usb dev [dev] - show or set current USB storage device
  usb part [dev] - print partition table of one or all USB 
 storage devices
  usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'
  to memory address `addr'
  = usb start
  (Re)start USB...
  USB:   Register 10011 NbrPorts 1
  USB EHCI 1.00
  scanning bus for devices... 2 USB Device(s) found
 scanning bus for storage devices... 1 Storage Device(s) found
  = usb info
  1: Hub,  USB Revision 2.0
   - u-boot EHCI Host Controller
   - Class: Hub
   - PacketSize: 64  Configurations: 1
   - Vendor: 0x  Product 0x Version 1.0
 Configuration: 1
 - Interfaces: 1 Self Powered 0mA
   Interface: 0
   - Alternate Setting 0, Endpoints: 1
   - Class Hub
   - Endpoint 1 In Interrupt MaxPacket 2048 Interval 0ms
 
  2: Mass Storage,  USB Revision 2.0
   - SanDisk U3 Cruzer Micro 0774700CB28059E2
   - Class: (from Interface) Mass Storage
   - PacketSize: 64  Configurations: 1
   - Vendor: 0x0781  Product 0x5406 Version 2.0
 Configuration: 1
 - Interfaces: 1 Bus Powered 200mA
   Interface: 0
   - Alternate Setting 0, Endpoints: 2
   - Class Mass Storage, Transp. SCSI, Bulk only
   - Endpoint 1 In Bulk MaxPacket 512
   - Endpoint 2 Out Bulk MaxPacket 512
 
  = usb dev 0
 
  USB device 0:
  Device 0: Vendor: SanDisk  Rev: 7.01 Prod: Cruzer
  Type: Removable Hard Disk
  Capacity: 1907.9 MB = 1.8 GB (3907583 x 512)
  ... is now current device
  = ext2ls usb 0:1
  DIR   4096 .
  DIR   4096 ..
   2196128 vmlinuz
  = help ext2load

Re: [U-Boot] [PATCH] Enable usb ehci support for p2020ds board

2009-09-14 Thread Zang Roy-R61911
 

 -Original Message-
 From: Felix Radensky [mailto:fe...@embedded-sol.com] 
 Sent: Monday, September 14, 2009 16:16 PM
 To: Zang Roy-R61911
 Cc: U-Boot-Denx; Kumar Gala; Zhang Junjie-B18070
 Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
 p2020ds board
 
 Zang Roy-R61911 wrote:
   
 

  -Original Message-
  From: Felix Radensky [mailto:fe...@embedded-sol.com] 
  Sent: Monday, September 14, 2009 15:50 PM
  To: Zang Roy-R61911
  Cc: U-Boot-Denx; Kumar Gala; Zhang Junjie-B18070
  Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
  p2020ds board
 
  Hi,
 
  Zang Roy-R61911 wrote:
  
   
 


  -Original Message-
  From: Felix Radensky [mailto:fe...@embedded-sol.com] 
  Sent: Sunday, September 13, 2009 17:19 PM
  To: Zang Roy-R61911
  Cc: U-Boot-Denx; Kumar Gala
  Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
  p2020ds board
 
  Hi, Roy
 
  Does this mean that USB mass storage devices are actually
  usable on P2020DS ? 
  
  
  Yes, it works.
 


  Similar patch for MPC8536DS was
  added during 2008.08 merge window, but USB mass storage
  devices are not recognized by u-boot.
  
  
  Why? I do not try on 8536DS, but I think it should work. 

  The same ip and
  
  the same code :-).
 


  Since I don't see any FSL
  ehici driver changes, I suspect situation may be similar on
  P2020DS.
  
  
  P2020DS and 8536DS should use the same driver. it works. 
  user ext2 command  to opertate usb interface.
 
  My log here on P2020:
 
  U-Boot 2009.08-00126-g0fc8f56-dirty (Sep 09 2009 - 18:00:43)
 
  CPU0:  P2020E, Version: 1.0, (0x80ea0010)
  Core:  E500, Version: 4.0, (0x80211040)
  Clock Configuration:
 CPU0:1199.988 MHz, CPU1:1199.988 MHz,
 CCB:599.994 MHz,
 DDR:333.330 MHz (666.660 MT/s data rate) (Asynchronous),
  LBC:37.500 MHz
  L1:D-cache 32 kB enabled
 I-cache 32 kB enabled
  Board: P2020DS Sys ID: 0x16, Sys Ver: 0x02, FPGA Ver: 
 0x03, vBank: 0
  I2C:   ready
  DRAM:  InitializingDDR:  1 GB
  FLASH: 128 MB
  L2:512 KB enabled
  NAND:  No NAND device found!!!
  No NAND device found!!!
  No NAND device found!!!
  2048 MiB
  *** Warning - bad CRC, using default environment
 
  EEPROM: NXID v0
 
  PCIE2 connected to ULI as Root Complex (base addr ffe09000)
 Scanning PCI bus 01
  02  11  8086  100f  0200  00
  02  1c  10b9  5237  0c03  00
  02  1c  10b9  5237  0c03  00
  02  1c  10b9  5237  0c03  00
  02  1c  10b9  5239  0c03  00
  02  1e  10b9  1575  0601  00
  02  1e  10b9  7101  0680  00
  02  1f  10b9  5229  0101  00
  02  1f  10b9  5288  0101  00
  01  00  10b9  5249  0604  00
  PCIE2 on bus 00 - 02
 
  PCIE3 connected to Slot 1 as Root Complex (base addr ffe08000)
  PCIE3 on bus 03 - 03
 
  PCIE1 connected to Slot 2 as Root Complex (base addr ffe0a000)
  PCIE1 on bus 04 - 04
  Video: No radeon video card found!
  In:serial
  Out:   serial
  Err:   serial
  SCSI:  AHCI 0001. 32 slots 4 ports 3 Gbps 0xf impl IDE mode
  flags: ncq ilck pm led clo pmp pio slum part
  scanning bus for devices...
  Net:   e1000: 00:07:e9:14:4d:e3
  eTSEC1, eTSEC2, eTSEC3, e1000#0
  Warning: e1000#0 MAC addresses don't match:
  Address in SROM is 00:07:e9:14:4d:e3
  Address in environment is  00:e0:0c:02:03:fd
 
  Hit any key to stop autoboot:  0
  =
  = help usb
  usb - USB sub-system
 
  Usage:
  usb reset - reset (rescan) USB controller
  usb stop [f]  - stop USB [f]=force stop
  usb tree  - show USB device tree
  usb info [dev] - show available USB devices
  usb storage  - show details of USB storage devices
  usb dev [dev] - show or set current USB storage device
  usb part [dev] - print partition table of one or all USB 

  storage devices
  
  usb read addr blk# cnt - read `cnt' blocks starting at 
 block `blk#'
  to memory address `addr'
  = usb start
  (Re)start USB...
  USB:   Register 10011 NbrPorts 1
  USB EHCI 1.00
  scanning bus for devices... 2 USB Device(s) found
 scanning bus for storage devices... 1 Storage 
 Device(s) found
  = usb info
  1: Hub,  USB Revision 2.0
   - u-boot EHCI Host Controller
   - Class: Hub
   - PacketSize: 64  Configurations: 1
   - Vendor: 0x  Product 0x Version 1.0
 Configuration: 1
 - Interfaces: 1 Self Powered 0mA
   Interface: 0
   - Alternate Setting 0, Endpoints: 1
   - Class Hub
   - Endpoint 1 In Interrupt MaxPacket 2048 Interval 0ms
 
  2: Mass Storage,  USB Revision 2.0
   - SanDisk U3 Cruzer Micro 0774700CB28059E2
   - Class: (from Interface) Mass Storage
   - PacketSize: 64  Configurations: 1
   - Vendor: 0x0781  Product 0x5406 Version 2.0
 Configuration: 1
 - Interfaces: 1 Bus Powered 200mA
   Interface: 0
   - Alternate Setting 0, Endpoints: 2
   - Class Mass Storage

Re: [U-Boot] [PATCH] Enable usb ehci support for p2020ds board

2009-09-13 Thread Zang Roy-R61911
 

 -Original Message-
 From: Felix Radensky [mailto:fe...@embedded-sol.com] 
 Sent: Sunday, September 13, 2009 17:19 PM
 To: Zang Roy-R61911
 Cc: U-Boot-Denx; Kumar Gala
 Subject: Re: [U-Boot] [PATCH] Enable usb ehci support for 
 p2020ds board
 
 Hi, Roy
 
 Does this mean that USB mass storage devices are actually
 usable on P2020DS ? 
Yes, it works.

 Similar patch for MPC8536DS was
 added during 2008.08 merge window, but USB mass storage
 devices are not recognized by u-boot.
Why? I do not try on 8536DS, but I think it should work. The same ip and
the same code :-).

 Since I don't see any FSL
 ehici driver changes, I suspect situation may be similar on
 P2020DS.
P2020DS and 8536DS should use the same driver. it works. 
user ext2 command  to opertate usb interface.

My log here on P2020:

U-Boot 2009.08-00126-g0fc8f56-dirty (Sep 09 2009 - 18:00:43)

CPU0:  P2020E, Version: 1.0, (0x80ea0010)
Core:  E500, Version: 4.0, (0x80211040)
Clock Configuration:
   CPU0:1199.988 MHz, CPU1:1199.988 MHz,
   CCB:599.994 MHz,
   DDR:333.330 MHz (666.660 MT/s data rate) (Asynchronous),
LBC:37.500 MHz
L1:D-cache 32 kB enabled
   I-cache 32 kB enabled
Board: P2020DS Sys ID: 0x16, Sys Ver: 0x02, FPGA Ver: 0x03, vBank: 0
I2C:   ready
DRAM:  InitializingDDR:  1 GB
FLASH: 128 MB
L2:512 KB enabled
NAND:  No NAND device found!!!
No NAND device found!!!
No NAND device found!!!
2048 MiB
*** Warning - bad CRC, using default environment

EEPROM: NXID v0

PCIE2 connected to ULI as Root Complex (base addr ffe09000)
   Scanning PCI bus 01
02  11  8086  100f  0200  00
02  1c  10b9  5237  0c03  00
02  1c  10b9  5237  0c03  00
02  1c  10b9  5237  0c03  00
02  1c  10b9  5239  0c03  00
02  1e  10b9  1575  0601  00
02  1e  10b9  7101  0680  00
02  1f  10b9  5229  0101  00
02  1f  10b9  5288  0101  00
01  00  10b9  5249  0604  00
PCIE2 on bus 00 - 02

PCIE3 connected to Slot 1 as Root Complex (base addr ffe08000)
PCIE3 on bus 03 - 03

PCIE1 connected to Slot 2 as Root Complex (base addr ffe0a000)
PCIE1 on bus 04 - 04
Video: No radeon video card found!
In:serial
Out:   serial
Err:   serial
SCSI:  AHCI 0001. 32 slots 4 ports 3 Gbps 0xf impl IDE mode
flags: ncq ilck pm led clo pmp pio slum part
scanning bus for devices...
Net:   e1000: 00:07:e9:14:4d:e3
eTSEC1, eTSEC2, eTSEC3, e1000#0
Warning: e1000#0 MAC addresses don't match:
Address in SROM is 00:07:e9:14:4d:e3
Address in environment is  00:e0:0c:02:03:fd

Hit any key to stop autoboot:  0
=
= help usb
usb - USB sub-system

Usage:
usb reset - reset (rescan) USB controller
usb stop [f]  - stop USB [f]=force stop
usb tree  - show USB device tree
usb info [dev] - show available USB devices
usb storage  - show details of USB storage devices
usb dev [dev] - show or set current USB storage device
usb part [dev] - print partition table of one or all USB storage devices
usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'
to memory address `addr'
= usb start
(Re)start USB...
USB:   Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
   scanning bus for storage devices... 1 Storage Device(s) found
= usb info
1: Hub,  USB Revision 2.0
 - u-boot EHCI Host Controller
 - Class: Hub
 - PacketSize: 64  Configurations: 1
 - Vendor: 0x  Product 0x Version 1.0
   Configuration: 1
   - Interfaces: 1 Self Powered 0mA
 Interface: 0
 - Alternate Setting 0, Endpoints: 1
 - Class Hub
 - Endpoint 1 In Interrupt MaxPacket 2048 Interval 0ms

2: Mass Storage,  USB Revision 2.0
 - SanDisk U3 Cruzer Micro 0774700CB28059E2
 - Class: (from Interface) Mass Storage
 - PacketSize: 64  Configurations: 1
 - Vendor: 0x0781  Product 0x5406 Version 2.0
   Configuration: 1
   - Interfaces: 1 Bus Powered 200mA
 Interface: 0
 - Alternate Setting 0, Endpoints: 2
 - Class Mass Storage, Transp. SCSI, Bulk only
 - Endpoint 1 In Bulk MaxPacket 512
 - Endpoint 2 Out Bulk MaxPacket 512

= usb dev 0

USB device 0:
Device 0: Vendor: SanDisk  Rev: 7.01 Prod: Cruzer
Type: Removable Hard Disk
Capacity: 1907.9 MB = 1.8 GB (3907583 x 512)
... is now current device
= ext2ls usb 0:1
DIR   4096 .
DIR   4096 ..
 2196128 vmlinuz
= help ext2load
ext2load - load binary file from a Ext2 filesystem

Usage:
ext2load interface dev[:part] [addr] [filename] [bytes]
- load binary file 'filename' from 'dev' on 'interface'
  to address 'addr' from ext2 filesystem
= ext2load usb 0:1 100 vmlinuz
Loading file vmlinuz from usb device 0:1 (usbda1)
2196128 bytes read
= md 100
0100: ea0500c0 078cc88e d88ec08e d031e4fb.1..
0110: fcbe2d00 ac20c074 09b40ebb 0700cd10..-.. .t
0120: ebf231c0 cd16cd19 eaf0ff00 f0446972..1..Dir
0130: 65637420 626f6f74 696e6720 66726f6dect booting from

Re: [U-Boot] e1000 Rx timeout with 82541ER

2009-08-21 Thread Zang Roy-R61911
I will provide a patch in two hours and need to andre to verify .
Roy 

 -Original Message-
 From: Ben Warren [mailto:biggerbadder...@gmail.com] 
 Sent: Friday, August 21, 2009 12:02 PM
 To: André Schwarz; Zang Roy-R61911
 Cc: U-Boot List
 Subject: Re: e1000 Rx timeout with 82541ER
 
 Andre and Roy,
 André Schwarz wrote:
  Roy,
 
  the problem is the modified PBA (packet buffer allocation) constant 
  E1000_DEFAULT_PBA. It changed from 0x0030 to 0x000a0026 lately.
 
  Regarding to the Intel's software developer manual the chips come up
  with sane defaults. There are few which needs modification, 
 like e.g.
  82547GI/EI.
 
  Having a look at the Kernel driver clearly shows that the programmed
  parameter depends on MAC type and using a fixed value for 
 all chips is
  not reasonable at all.
 
  In any case the 82540/1/2/3/4/5/6 are working perfectly fine with
  0x0030.
 
  I'd recommend to revert this change and only apply the new 
 default value
  to those MAC (PCIe ?) where you can verify functionality.
 

 We're getting very close to the release date.  Please supply a patch 
 soon, or we'll revert Roy's original.
 
 regards,
 Ben
 
 
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Re: [U-Boot] e1000 Rx timeout with 82541ER

2009-08-20 Thread Zang Roy-R61911
 

 -Original Message-
 From: André Schwarz [mailto:andre.schw...@matrix-vision.de] 
 Sent: Wednesday, August 19, 2009 7:10 AM
 To: Zang Roy-R61911; Ben Warren
 Cc: U-Boot List
 Subject: e1000 Rx timeout with 82541ER
 
 Roy, Ben,
 
 with latest e1000.c my 82541ER connected to a MPC5200 via PCI is no
 longer working correctly - I get timeouts after few packets. After
 having a quick look at the code changes it's obvious that I 
 can't figure
 out the problem quickly since there has been a lot of changes.
 
  This is output of today's version :
 
 U-Boot 2009.08-rc2-00025-g2bcbd42-dirty (Aug 19 2009 - 11:28:10)
 
 CPU:   MPC5200B v2.2, Core v1.4 at 396 MHz
Bus 132 MHz, IPB 132 MHz, PCI 66 MHz
 Board: Matrix Vision mvBlueCOUGAR-P
 Net:   e1000: 00:0c:8d:40:00:50
 e1000#0
 ...
 Random delay: 734 ms...
 BOOTP broadcast 1
 DHCP client bound to address 192.168.65.230
 Using e1000#0 device
 TFTP from server 192.168.64.1; our IP address is 
 192.168.65.230; sending
 through gateway 192.168.65.15
 Filename '/mvbc-p2625.boot'.
 Load address: 0x20
 Loading: ###T T T T T T T T T T
 Retry count exceeded; starting again
 
 
  This is output of v2009.6 :
 
 U-Boot 2009.06-00185-g57fe301-dirty (Jun 22 2009 - 12:07:54)
 
 CPU:   MPC5200B v2.2, Core v1.4 at 396 MHz
Bus 132 MHz, IPB 132 MHz, PCI 66 MHz
 Board: Matrix Vision mvBlueCOUGAR-P
 Net:   e1000: 00:0c:8d:40:00:50
 e1000#0
 
 Random delay: 815 ms...
 BOOTP broadcast 1
 DHCP client bound to address 192.168.65.230
 Using e1000#0 device
 TFTP from server 192.168.64.1; our IP address is 
 192.168.65.230; sending
 through gateway 192.168.65.15
 Filename '/mvbc-p2625.boot'.
 Load address: 0x20
 Loading:
 #
  #
 done
 Bytes transferred = 1487889 (16b411 hex)
 
 
 
 
 Using drivers/net/e1000.c from v2009.6 gives me back a 
 working NIC, i.e.
 the problem is likely to be there.
 
 Have you tried some PCI cards after the PCIe changes ?
I have tried 
 82545EM_COPPER,
 82541GI_LF
PCI card on 8544DS and 8536DS board.
 
 
 Any ideas ?

Try to increase tx_pool and rx_pool to see whether there is improment.
static char tx_pool[128 + 16];
static char rx_pool[128 + 16];

Change 128 to 256 or 512 to see.
How about ping command?

Roy
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Re: [U-Boot] e1000 Rx timeout with 82541ER

2009-08-19 Thread Zang Roy-R61911
 

 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de] 
 Sent: Wednesday, August 19, 2009 7:58 AM
 To: André Schwarz
 Cc: Zang Roy-R61911; Ben Warren; U-Boot List
 Subject: Re: [U-Boot] e1000 Rx timeout with 82541ER
 
 Dear =?ISO-8859-1?Q?Andr=E9?= Schwarz,
 
 In message 1250683805.22118.22.ca...@swa-m460 you wrote:
  
  with latest e1000.c my 82541ER connected to a MPC5200 via PCI is no
  longer working correctly - I get timeouts after few packets. After
  having a quick look at the code changes it's obvious that I can't
  figure out the problem quickly since there has been a lot 
 of changes.
 
 Well, it should be straightforward to git-bisect this issue...
 
Could you help to send me the error log?
I do not have 82541ER card to try.
Thank.s
roy
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Re: [U-Boot] 85xx: MPC8536DS board does not build

2009-08-10 Thread Zang Roy-R61911
 

 -Original Message-
 From: Kumar Gala [mailto:ga...@kernel.crashing.org] 
 Sent: Monday, August 10, 2009 13:41 PM
 To: Wolfgang Denk
 Cc: U-Boot-Users ML; Zang Roy-R61911
 Subject: Re: 85xx: MPC8536DS board does not build
 
 
 On Aug 10, 2009, at 1:22 PM, Wolfgang Denk wrote:
 
  Dear Kumar Gala,
 
  In message 0EB7516A-2F14-42F7- 
  a6ed-555adfab3...@kernel.crashing.org you wrote:
 
  Allocate more space for U-Boot?
 
  I might turn of BEDBUG as its never been properly enabled on  
  e500/85xx
  platforms.
 
  Is there any problem with the bigger image which I don't understand
  yet? Normally we just move down the TEXT_BASE by a sector, 
 and that's
  it.
 
 Not specifically, its just that ever 85xx image to date has been  
 512k.  I'm just trying to avoid this being the first one that 
 changes  
 that historic fact.  Especially since compilers like gcc-4.3 seem to  
 be able to fit the size in 512k.
We may have more requirements to support graphic in u-boot.
Sooner and later, the size will exceed 512K. Should we have some plan
for this?
Roy
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Re: [U-Boot] 85xx: MPC8536DS board does not build

2009-08-10 Thread Zang Roy-R61911
 

 -Original Message-
 From: Kumar Gala [mailto:ga...@kernel.crashing.org] 
 Sent: Monday, August 10, 2009 14:06 PM
 To: Zang Roy-R61911
 Cc: Wolfgang Denk; U-Boot-Users ML
 Subject: Re: 85xx: MPC8536DS board does not build
 
 
 On Aug 10, 2009, at 1:59 PM, Zang Roy-R61911 wrote:
 
 
 
  -Original Message-
  From: Kumar Gala [mailto:ga...@kernel.crashing.org]
  Sent: Monday, August 10, 2009 13:41 PM
  To: Wolfgang Denk
  Cc: U-Boot-Users ML; Zang Roy-R61911
  Subject: Re: 85xx: MPC8536DS board does not build
 
 
  On Aug 10, 2009, at 1:22 PM, Wolfgang Denk wrote:
 
  Dear Kumar Gala,
 
  In message 0EB7516A-2F14-42F7-
  a6ed-555adfab3...@kernel.crashing.org you wrote:
 
  Allocate more space for U-Boot?
 
  I might turn of BEDBUG as its never been properly enabled on
  e500/85xx
  platforms.
 
  Is there any problem with the bigger image which I don't 
 understand
  yet? Normally we just move down the TEXT_BASE by a sector,
  and that's
  it.
 
  Not specifically, its just that ever 85xx image to date has been
  512k.  I'm just trying to avoid this being the first one that
  changes
  that historic fact.  Especially since compilers like 
 gcc-4.3 seem to
  be able to fit the size in 512k.
  We may have more requirements to support graphic in u-boot.
  Sooner and later, the size will exceed 512K. Should we have 
 some plan
  for this?
 
 So if we are going to increase the limit from 512k do we go 
 to 768k or  
 1M?  (Sector size on the board appears to 128k)
If there is no special reason, I'd like to expand it to 768K.
But my concern here is that it is better to limit 8536DS image to 512K.
For SD/NAND boot code, the u-boot will be copy to L2 cache. It is only
512K.

 
 I would also like to know how big the flashes are on some of 
 the other  
 85xx boards that u-boot supports.
From 8540ads board, at lease we may have 4M flash to use considering the
swap.
Roy
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Re: [U-Boot] Please pull u-boot-mpc85xx (updated)

2009-07-26 Thread Zang Roy-R61911
 

 -Original Message-
 From: Kumar Gala [mailto:ga...@kernel.crashing.org] 
 Sent: Saturday, July 25, 2009 4:59 AM
 To: Tabi Timur-B04825
 Cc: Wolfgang Denk; u-boot Mailing List; Ben Warren; Zang Roy-R61911
 Subject: Re: [U-Boot] Please pull u-boot-mpc85xx (updated)
 
 
 On Jul 24, 2009, at 3:58 PM, Timur Tabi wrote:
 
  On Wed, Jul 22, 2009 at 11:11 AM, Kumar  
  Galaga...@kernel.crashing.org wrote:
 
  Roy Zang (1):
   85xx: Add pci/pcie E1000 ethernet support for MPC8544DS and  
  MPC8536 boards
 
  Doesn't this depend on this other patch from Roy:
 
 [PATCH 1/2] Add ntel PCIE PRO/1000 Network Driver support
 
  Ben was going to review this patch, but it's not in his 'net' git  
  repository.
 
 Not exactly.  The 2nd patch just enables support for the 
 e1000 driver  
 that already exists.  The first adds support for more 
 variants of the  
 e1000.  So we can safely apply the second patch.
Correct. 2nd patch does not depend on the first one. Other pci Intel
e1000 card should work with original driver.
I will send out the updated e1000 driver this week according to Ben's
feedback.
Thanks.
Roy
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Re: [U-Boot] [PATCH 1/2] Add ntel PCIE PRO/1000 Network Driver support

2009-07-21 Thread Zang Roy-R61911
 

 -Original Message-
 From: Ben Warren [mailto:biggerbadder...@gmail.com] 
 Sent: Tuesday, July 21, 2009 14:17 PM
 To: Zang Roy-R61911
 Cc: Kumar Gala; U-Boot-Denx
 Subject: Re: [U-Boot] [PATCH 1/2] Add ntel PCIE PRO/1000 
 Network Driver support
 
 Hi Roy,
 Roy Zang wrote:
  From: Roy Zang tie-fei.z...@freescale.com
 
Based on Intel PRO/1000 Network Driver 7.3.20-k2
Add Intel E1000 PCIE card support. The following cards are added:
INTEL_82571EB_COPPER
INTEL_82571EB_FIBER,
INTEL_82571EB_SERDES
INTEL_82571EB_QUAD_COPPER
INTEL_82571PT_QUAD_COPPER
INTEL_82571EB_QUAD_FIBER
INTEL_82571EB_QUAD_COPPER_LOWPROFILE
INTEL_82571EB_SERDES_DUAL
INTEL_82571EB_SERDES_QUAD
INTEL_82572EI_COPPER
INTEL_82572EI_FIBER
INTEL_82572EI_SERDES
INTEL_82572EI
INTEL_82573E
INTEL_82573E_IAMT
INTEL_82573L
INTEL_82546GB_QUAD_COPPER_KSP3
INTEL_80003ES2LAN_COPPER_DPT
INTEL_80003ES2LAN_SERDES_DPT
INTEL_80003ES2LAN_COPPER_SPT
INTEL_80003ES2LAN_SERDES_SPT
 
   82571EB_COPPER dual ports,
   82572EI single port,
   82572EI_COPPER single port PCIE cards
   and
   82545EM_COPPER,
   82541GI_LF
   pci cards are tested on P2020 board, MPC8536DS
   and MPC8544DS boards.
 
   Signed-off-by: Roy Zang tie-fei.z...@freescale.com

 I have no objections to any of the content.  A few themes, though:
 
 1. Please ensure that the multi-line comments are formatted 
 correctly.  
 Lines 2+ should have a space in the first character.
Do you find this issue in the patch?

 2. If you insist on including dead code (i.e. #if 0), please 
 provide a 
 comment on why it's there
Thanks for the understanding.  The dead code in the previous file helped
me track the code.
That is why I left them. I will add the comment and remove the
unnecessary one.

 3. I have a hard time believing that most of this is necessary.  Sure 
 it's a complicated chip and you're pulling it from Intel's 
 driver, but 
 3000+ lines is too much.  Please try to remove stuff that's 
 not needed.
I will double check it.
Do not believe Intel's code. It take me two days to clean the code
style.
I will resend it after the code is ready.
Thanks.
Roy
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Re: [U-Boot] PATCH 2/2] Add pci/pcie E1000 ethernet support for MPC8544DS and MPC8536 boards

2009-07-21 Thread Zang Roy-R61911
 

 -Original Message-
 From: Kumar Gala [mailto:ga...@kernel.crashing.org] 
 Sent: Tuesday, July 21, 2009 22:04 PM
 To: Zang Roy-R61911
 Cc: U-Boot-Denx
 Subject: Re: PATCH 2/2] Add pci/pcie E1000 ethernet support 
 for MPC8544DS and MPC8536 boards
 
 
 On Jul 8, 2009, at 9:05 PM, Roy Zang wrote:
 
  correct ? :)
  It is 8544DS board. Thanks.
  Sorry for the mistake. It is my oversight when I regenerate 
 the patch
  before send out.
  Pick up this one:
 
   From: Roy Zang tie-fei.z...@freescale.com
Add pci/pcie E1000 ethernet support for MPC8544DS and MPC8536  
  boards.
Signed-off-by: Roy Zang tie-fei.z...@freescale.com
 
  ---
  include/configs/MPC8536DS.h |1 +
  include/configs/MPC8544DS.h |1 +
  2 files changed, 2 insertions(+), 0 deletions(-)
Then I will send out the individual e1000 driver update to Ben.
Thanks.
Roy
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Re: [U-Boot] PATCH 2/2] Add pci/pcie E1000 ethernet support for MPC8544DS and MPC8536 boards

2009-07-16 Thread Zang Roy-R61911
 

 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de] 
 Sent: Friday, July 17, 2009 6:26 AM
 To: Ben Warren
 Cc: Zang Roy-R61911; U-Boot-Denx; Kumar Gala
 Subject: Re: [U-Boot] PATCH 2/2] Add pci/pcie E1000 ethernet 
 support for MPC8544DS and MPC8536 boards
 
 Dear Ben Warren,
 
 In message 4a5f9a05.70...@gmail.com you wrote:
 
 From: Roy Zang tie-fei.z...@freescale.com
  Add pci/pcie E1000 ethernet support for MPC8544DS and 
 MPC8536 boards.
  Signed-off-by: Roy Zang tie-fei.z...@freescale.com
  
   Doesn't apply with git-am. Please use git-format-patch to create
   patches.
 ...
  Still undergoing review (sorry it's taking so long).  
 Please don't apply 
  yet.
 
 I did not intend to meddle with your business. Just wanted to point
 out formal deficiencies of the patch.
I always use git-format-patch to create patches :-(. 
The issue maybe induced by wrong 
format when I reply the mail.
Anyway, I will resend it . Before that, I'd like to get Ben's feedback.
Thanks.
Roy
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Re: [U-Boot] PATCH 2/2] Add pci/pcie E1000 ethernet support for MPC8544DS and MPC8536 boards

2009-07-16 Thread Zang Roy-R61911
 

 -Original Message-
 From: Ben Warren [mailto:biggerbadder...@gmail.com] 
 Sent: Friday, July 17, 2009 5:22 AM
 To: Wolfgang Denk
 Cc: Zang Roy-R61911; U-Boot-Denx; Kumar Gala
 Subject: Re: [U-Boot] PATCH 2/2] Add pci/pcie E1000 ethernet 
 support for MPC8544DS and MPC8536 boards
 
 Wolfgang Denk wrote:
  Dear Roy Zang,
 
  In message 1247105148.29920.3.ca...@rock.ap.freescale.net 
 you wrote:

  Sorry for the mistake. It is my oversight when I 
 regenerate the patch
  before send out. 
  Pick up this one:
 
From: Roy Zang tie-fei.z...@freescale.com
 Add pci/pcie E1000 ethernet support for MPC8544DS and 
 MPC8536 boards.
 Signed-off-by: Roy Zang tie-fei.z...@freescale.com
  
 
  Doesn't apply with git-am. Please use git-format-patch to create
  patches.
 
  Best regards,
 
  Wolfgang Denk
 

 Still undergoing review (sorry it's taking so long).  Please 
 don't apply 
 yet.
Sorry. It is really long, but I do not see reason to split it :-(.
In fact the kernel file is bigger than this one.
Thanks.
Roy
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Re: [U-Boot] Support in u-boot for PCI-Express NIC

2009-06-07 Thread Zang Roy-R61911
 

 -Original Message-
 From: Wolfgang Denk [mailto:w...@denx.de] 
 Sent: Friday, June 05, 2009 18:16 PM
 To: Zang Roy-R61911
 Cc: Srinivasan Srikanth-R9AABP; u-boot@lists.denx.de
 Subject: Re: [U-Boot] Support in u-boot for PCI-Express NIC
 
 Dear Zang Roy-R61911,
 
 In message 
 7df0af56456b8f4081e3c44ccce311de34e...@zch01exm23.fsl.freesca
 le.net you wrote:
  
 At least the e1000 has been successfully tested not 
 so long ago.

Thanks Wolfgang. That's good news. 
Can you pl point me to the pci-express card/device id that 
   was tested
recently (and/or the mails that talk about it)?
   
   I think that was it:
   
   commit aa3b8bf9c30065bb2ea852799d32db5020598495
   Author: Wolfgang Grandegger w...@grandegger.com
   Date:   Wed May 28 19:55:19 2008 +0200
   
   E1000: Add support for the 82541GI LF Intel Pro 1000 
 GT Desktop
   Adapter
  82541 is pci based e1000 silicon.  For pcie based e1000 
 chip, extra code
  is needed.
 
 You are right, my memory was wrong. The testing I remembered was done
 under Linux only for this very reason.
I have began to port e1000 pcie driver to u-boot. 82572EI is used for
this work. 
I just curious that is there anyone else in this list to do the similar
work previously. 
Roy
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Re: [U-Boot] Support in u-boot for PCI-Express NIC

2009-05-26 Thread Zang Roy-R61911
 

 -Original Message-
 From: u-boot-boun...@lists.denx.de 
 [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Wolfgang Denk
 Sent: Friday, May 22, 2009 4:06 AM
 To: Srinivasan Srikanth-R9AABP
 Cc: u-boot@lists.denx.de
 Subject: Re: [U-Boot] Support in u-boot for PCI-Express NIC
 
 Dear Srinivasan Srikanth-R9AABP,
 
 In message 
 fd7805b55f061e408ef265c9bdfcb64c0329a...@az33exm23.fsl.freesc
 ale.net you wrote:
 
   At least the e1000 has been successfully tested not so long ago.
  
  Thanks Wolfgang. That's good news. 
  Can you pl point me to the pci-express card/device id that 
 was tested
  recently (and/or the mails that talk about it)?
 
 I think that was it:
 
 commit aa3b8bf9c30065bb2ea852799d32db5020598495
 Author: Wolfgang Grandegger w...@grandegger.com
 Date:   Wed May 28 19:55:19 2008 +0200
 
 E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop
 Adapter
82541 is pci based e1000 silicon.  For pcie based e1000 chip, extra code
is needed.
Roy
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