[PATCH 1/2] clk: sunxi: add THS clk/reset
From: qianfan Zhao
Add clock/reset definitions for THS peripherals.
Signed-off-by: qianfan Zhao
---
drivers/clk/sunxi/clk_h3.c | 5 +
drivers/clk/sunxi/clk_h6.c | 4
drivers/clk/sunxi/clk_r40.c | 5 +
3 files changed, 14 insertions(+)
diff --git a/drivers/clk/sunxi/clk_h3.c b/drivers/clk/sunxi/clk_h3.c
index 213ab510ed..774d67cbfa 100644
--- a/drivers/clk/sunxi/clk_h3.c
+++ b/drivers/clk/sunxi/clk_h3.c
@@ -38,6 +38,7 @@ static struct ccu_clk_gate h3_gates[] = {
[CLK_BUS_DE]= GATE(0x064, BIT(12)),
[CLK_BUS_PIO] = GATE(0x068, BIT(5)),
+ [CLK_BUS_THS] = GATE(0x068, BIT(8)),
[CLK_BUS_I2C0] = GATE(0x06c, BIT(0)),
[CLK_BUS_I2C1] = GATE(0x06c, BIT(1)),
@@ -49,6 +50,8 @@ static struct ccu_clk_gate h3_gates[] = {
[CLK_BUS_EPHY] = GATE(0x070, BIT(0)),
+ [CLK_THS] = GATE(0x074, BIT(31)),
+
[CLK_SPI0] = GATE(0x0a0, BIT(31)),
[CLK_SPI1] = GATE(0x0a4, BIT(31)),
@@ -98,6 +101,8 @@ static struct ccu_reset h3_resets[] = {
[RST_BUS_EPHY] = RESET(0x2c8, BIT(2)),
+ [RST_BUS_THS] = RESET(0x2d0, BIT(8)),
+
[RST_BUS_I2C0] = RESET(0x2d8, BIT(0)),
[RST_BUS_I2C1] = RESET(0x2d8, BIT(1)),
[RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index 24eb9725db..5464530056 100644
--- a/drivers/clk/sunxi/clk_h6.c
+++ b/drivers/clk/sunxi/clk_h6.c
@@ -42,6 +42,8 @@ static struct ccu_clk_gate h6_gates[] = {
[CLK_BUS_EMAC] = GATE(0x97c, BIT(0)),
+ [CLK_BUS_THS] = GATE(0x9fc, BIT(0)),
+
[CLK_USB_PHY0] = GATE(0xa70, BIT(29)),
[CLK_USB_OHCI0] = GATE(0xa70, BIT(31)),
@@ -91,6 +93,8 @@ static struct ccu_reset h6_resets[] = {
[RST_BUS_EMAC] = RESET(0x97c, BIT(16)),
+ [RST_BUS_THS] = RESET(0x9fc, BIT(16)),
+
[RST_USB_PHY0] = RESET(0xa70, BIT(30)),
[RST_USB_PHY1] = RESET(0xa74, BIT(30)),
diff --git a/drivers/clk/sunxi/clk_r40.c b/drivers/clk/sunxi/clk_r40.c
index 630e80d2b4..4fbfd28207 100644
--- a/drivers/clk/sunxi/clk_r40.c
+++ b/drivers/clk/sunxi/clk_r40.c
@@ -42,6 +42,7 @@ static struct ccu_clk_gate r40_gates[] = {
[CLK_BUS_TCON_TOP] = GATE(0x064, BIT(30)),
[CLK_BUS_PIO] = GATE(0x068, BIT(5)),
+ [CLK_BUS_THS] = GATE(0x068, BIT(8)),
[CLK_BUS_I2C0] = GATE(0x06c, BIT(0)),
[CLK_BUS_I2C1] = GATE(0x06c, BIT(1)),
@@ -57,6 +58,8 @@ static struct ccu_clk_gate r40_gates[] = {
[CLK_BUS_UART6] = GATE(0x06c, BIT(22)),
[CLK_BUS_UART7] = GATE(0x06c, BIT(23)),
+ [CLK_THS] = GATE(0x074, BIT(31)),
+
[CLK_SPI0] = GATE(0x0a0, BIT(31)),
[CLK_SPI1] = GATE(0x0a4, BIT(31)),
[CLK_SPI2] = GATE(0x0a8, BIT(31)),
@@ -113,6 +116,8 @@ static struct ccu_reset r40_resets[] = {
[RST_BUS_TCON_TV1] = RESET(0x2c4, BIT(29)),
[RST_BUS_TCON_TOP] = RESET(0x2c4, BIT(30)),
+ [RST_BUS_THS] = RESET(0x2d0, BIT(8)),
+
[RST_BUS_I2C0] = RESET(0x2d8, BIT(0)),
[RST_BUS_I2C1] = RESET(0x2d8, BIT(1)),
[RST_BUS_I2C2] = RESET(0x2d8, BIT(2)),
--
2.17.1
[PATCH 2/2] drivers: thermal: Introduce sun8i_thermal
From: qianfan Zhao
Portting sun8i_thermal.c from linux-5.15 drivers and drop interrupt
features. Next is an example from allwinner T3:
=> temperature get thermal-sensor@1c24c00
thermal-sensor@1c24c00: 39437 C
=>
thermal-sensor@1c24c00: 39776 C
=>
thermal-sensor@1c24c00: 39437 C
Signed-off-by: qianfan Zhao
---
drivers/thermal/Kconfig | 8 +
drivers/thermal/Makefile| 1 +
drivers/thermal/sun8i_thermal.c | 368
3 files changed, 377 insertions(+)
create mode 100644 drivers/thermal/sun8i_thermal.c
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig
index 97d4163e8e..be3118175f 100644
--- a/drivers/thermal/Kconfig
+++ b/drivers/thermal/Kconfig
@@ -41,4 +41,12 @@ config TI_DRA7_THERMAL
Enable thermal support for for the Texas Instruments DRA752 SoC family.
The driver supports reading CPU temperature.
+config SUN8I_THERMAL
+ bool "Temperature sensor driver for allwinner sunxi SOCs"
+ depends on ARCH_SUNXI
+ select REGMAP
+ help
+Enable thermal support for for the sunxi SoC family.
+The driver supports reading CPU temperature.
+
endif # if DM_THERMAL
diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile
index 8acc7d20cb..9f419962cc 100644
--- a/drivers/thermal/Makefile
+++ b/drivers/thermal/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
obj-$(CONFIG_IMX_SCU_THERMAL) += imx_scu_thermal.o
obj-$(CONFIG_TI_DRA7_THERMAL) += ti-bandgap.o
obj-$(CONFIG_IMX_TMU) += imx_tmu.o
+obj-$(CONFIG_SUN8I_THERMAL) += sun8i_thermal.o
diff --git a/drivers/thermal/sun8i_thermal.c b/drivers/thermal/sun8i_thermal.c
new file mode 100644
index 00..51ea81ccf7
--- /dev/null
+++ b/drivers/thermal/sun8i_thermal.c
@@ -0,0 +1,368 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Thermal sensor driver for Allwinner SOC
+ * Based on the linux driver
+ *
+ * Copyright (C) 2023 qianfan Zhao
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define FT_TEMP_MASK GENMASK(11, 0)
+#define TEMP_CALIB_MASKGENMASK(11, 0)
+#define CALIBRATE_DEFAULT 0x800
+
+#define SUN8I_THS_CTRL00x00
+#define SUN8I_THS_CTRL20x40
+#define SUN8I_THS_IC 0x44
+#define SUN8I_THS_IS 0x48
+#define SUN8I_THS_MFC 0x70
+#define SUN8I_THS_TEMP_CALIB 0x74
+#define SUN8I_THS_TEMP_DATA0x80
+
+#define SUN50I_THS_CTRL0 0x00
+#define SUN50I_H6_THS_ENABLE 0x04
+#define SUN50I_H6_THS_PC 0x08
+#define SUN50I_H6_THS_DIC 0x10
+#define SUN50I_H6_THS_DIS 0x20
+#define SUN50I_H6_THS_MFC 0x30
+#define SUN50I_H6_THS_TEMP_CALIB 0xa0
+#define SUN50I_H6_THS_TEMP_DATA0xc0
+
+#define SUN8I_THS_CTRL0_T_ACQ0(x) (GENMASK(15, 0) & (x))
+#define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16)
+#define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8)
+
+#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16)
+#define SUN50I_THS_FILTER_EN BIT(2)
+#define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x))
+#define SUN50I_H6_THS_PC_TEMP_PERIOD(x)((GENMASK(19, 0) & (x))
<< 12)
+#define SUN50I_H6_THS_DATA_IRQ_STS(x) BIT(x)
+
+struct ths_device;
+
+struct ths_thermal_chip {
+ boolhas_mod_clk;
+ boolhas_bus_clk_reset;
+ int sensor_num;
+ int offset;
+ int scale;
+ int ft_deviation;
+ int temp_data_base;
+ int (*init)(struct ths_device *tmdev);
+ int (*calc_temp)(struct ths_device *tmdev,
+int id, int reg);
+};
+
+struct ths_device {
+ const struct ths_thermal_chip *chip;
+ struct udevice *dev;
+ struct regmap *regmap;
+ struct reset_ctl*reset;
+ struct clk *bus_clk;
+ struct clk *mod_clk;
+};
+
+/* Temp Unit: millidegree Celsius */
+static int sun8i_ths_calc_temp(struct ths_device *tmdev,
+ int id, int reg)
+{
+ return tmdev->chip->offset - (reg * tmdev->chip->scale / 10);
+}
+
+static int sun50i_h5_calc_temp(struct ths_device *tmdev,
+ int id, int reg)
+{
+ if (reg >= 0x500)
+ return -1191 * reg / 10 + 223000;
+ else if (!id)
[PATCH] drivers: usb: fastboot: Fix full-speed usb descriptor
From: qianfan Zhao
The host will report such error message if the fastboot device work in
full-speed mode: "Duplicate descriptor for config 1 interface 0
altsetting 0, skipping"
Fastboot device ack both full and high speed interface descriptors when
work in full-speed mode, that's will cause this issue.
Fix it.
Signed-off-by: qianfan Zhao
---
drivers/usb/gadget/f_fastboot.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 8ba55aab9f..d0e92c7a07 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -119,6 +119,7 @@ static struct usb_descriptor_header *fb_fs_function[] = {
(struct usb_descriptor_header *)&interface_desc,
(struct usb_descriptor_header *)&fs_ep_in,
(struct usb_descriptor_header *)&fs_ep_out,
+ NULL,
};
static struct usb_descriptor_header *fb_hs_function[] = {
--
2.25.1
[PATCH] drivers: mmc: Reset watchdog when accessing mmc device
From: qianfan Zhao watchdog will reset when 'mmc read' or 'ext4load' a large file from mmc device. Reset watchdog when accessing mmc device. Signed-off-by: qianfan Zhao --- drivers/mmc/mmc.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 4d9871d69f..27ffdb7fa7 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -24,6 +24,7 @@ #include #include #include +#include #include "mmc_private.h" #define DEFAULT_CMD6_TIMEOUT_MS 500 @@ -297,6 +298,7 @@ int mmc_poll_for_busy(struct mmc *mmc, int timeout_ms) if (timeout_ms-- <= 0) break; + WATCHDOG_RESET(); udelay(1000); } @@ -500,6 +502,8 @@ ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt, blocks_todo -= cur; start += cur; dst += cur * mmc->read_bl_len; + + WATCHDOG_RESET(); } while (blocks_todo > 0); return blkcnt; -- 2.25.1
[PATCH v1] common: image-android: Add signature verification feature
From: qianfan Zhao
Not all Android tools use the id field for signing the image with sha1,
so make this feature as optional and disabled default.
Signed-off-by: qianfan Zhao
---
common/Kconfig.boot| 14 +++
common/image-android.c | 55 +-
2 files changed, 63 insertions(+), 6 deletions(-)
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index a8d4be23a9..11fc8410a9 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -9,6 +9,20 @@ config ANDROID_BOOT_IMAGE
This enables support for booting images which use the Android
image format header.
+if ANDROID_BOOT_IMAGE
+
+config ANDROID_BOOT_IMAGE_VERIFY
+ bool "Enable signature verification"
+ select SHA1
+ default n
+ help
+ This option enables signature verification of Android Boot Images,
+ using a hash signed and verified using SHA1.
+ Not all Android tools use the id field for signing the image with
+ sha1, if you are unsure about this, Say N here.
+
+endif # ANDROID_BOOT_IMAGE
+
config FIT
bool "Support Flattened Image Tree"
select HASH
diff --git a/common/image-android.c b/common/image-android.c
index 1fa1eb..011ef756a7 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -44,11 +44,54 @@ static ulong android_image_get_kernel_addr(const struct
andr_img_hdr *hdr)
return hdr->kernel_addr;
}
+#if CONFIG_IS_ENABLED(ANDROID_BOOT_IMAGE_VERIFY)
+/*
+ * Not all Android tools use the id field for signing the image with
+ * sha1 (or anything) so we make this as an optional.
+ */
+static void android_image_update_sha1(sha1_context *ctx, const void *buf,
+ u32 size)
+{
+ if (size > 0) {
+ sha1_update(ctx, buf, size);
+ size = cpu_to_le32(size);
+ sha1_update(ctx, (unsigned char *)&size, sizeof(size));
+ }
+}
+
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+ unsigned char output[SHA1_SUM_LEN];
+ sha1_context ctx;
+ const void *p;
+
+ sha1_starts(&ctx);
+
+ p = (void *)hdr + hdr->page_size; /* kernel */
+ android_image_update_sha1(&ctx, p, hdr->kernel_size);
+
+ p += ALIGN(hdr->kernel_size, hdr->page_size); /* ramdisk */
+ android_image_update_sha1(&ctx, p, hdr->ramdisk_size);
+
+ p += ALIGN(hdr->ramdisk_size, hdr->page_size); /* second */
+ android_image_update_sha1(&ctx, p, hdr->second_size);
+
+ sha1_finish(&ctx, output);
+
+ return memcmp(output, (unsigned char *)hdr->id, sizeof(output));
+}
+#else
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+ return 0;
+}
+#endif
+
/**
* android_image_get_kernel() - processes kernel part of Android boot images
* @hdr: Pointer to image header, which is at the start
* of the image.
- * @verify:Checksum verification flag. Currently unimplemented.
+ * @verify:Checksum verification flag.
* @os_data: Pointer to a ulong variable, will hold os data start
* address.
* @os_len:Pointer to a ulong variable, will hold os data length.
@@ -66,11 +109,11 @@ int android_image_get_kernel(const struct andr_img_hdr
*hdr, int verify,
const struct image_header *ihdr = (const struct image_header *)
((uintptr_t)hdr + hdr->page_size);
- /*
-* Not all Android tools use the id field for signing the image with
-* sha1 (or anything) so we don't check it. It is not obvious that the
-* string is null terminated so we take care of this.
-*/
+ if (verify && android_image_verify_sha1(hdr)) {
+ puts("Bad Data Hash\n");
+ return -EACCES;
+ }
+
strncpy(andr_tmp_str, hdr->name, ANDR_BOOT_NAME_SIZE);
andr_tmp_str[ANDR_BOOT_NAME_SIZE] = '\0';
if (strlen(andr_tmp_str))
--
2.25.1
[PATCH] common: image-android: Add signature verification feature
From: qianfan Zhao
Not all Android tools use the id field for signing the image with sha1,
so make this feature as optional and disabled default.
Signed-off-by: qianfan Zhao
---
common/Kconfig.boot| 14 +++
common/image-android.c | 55 +-
2 files changed, 63 insertions(+), 6 deletions(-)
diff --git a/common/Kconfig.boot b/common/Kconfig.boot
index a8d4be23a9..11fc8410a9 100644
--- a/common/Kconfig.boot
+++ b/common/Kconfig.boot
@@ -9,6 +9,20 @@ config ANDROID_BOOT_IMAGE
This enables support for booting images which use the Android
image format header.
+if ANDROID_BOOT_IMAGE
+
+config ANDROID_BOOT_IMAGE_VERIFY
+ bool "Enable signature verification"
+ select SHA1
+ default n
+ help
+ This option enables signature verification of Android Boot Images,
+ using a hash signed and verified using SHA1.
+ Not all Android tools use the id field for signing the image with
+ sha1, if you are unsure about this, Say N here.
+
+endif # ANDROID_BOOT_IMAGE
+
config FIT
bool "Support Flattened Image Tree"
select HASH
diff --git a/common/image-android.c b/common/image-android.c
index 1fa1eb..12b84d6fdc 100644
--- a/common/image-android.c
+++ b/common/image-android.c
@@ -44,11 +44,54 @@ static ulong android_image_get_kernel_addr(const struct
andr_img_hdr *hdr)
return hdr->kernel_addr;
}
+#if CONFIG_IS_ENABLED(ANDROID_BOOT_IMAGE_VERIFY)
+/*
+ * Not all Android tools use the id field for signing the image with
+ * sha1 (or anything) so we make this as an optional.
+ */
+static void android_image_update_sha1(sha1_context *ctx, const void *buf,
+ u32 size)
+{
+ if (size > 0) {
+ sha1_update(ctx, buf, size);
+ size = cpu_to_le32(size);
+ sha1_update(ctx, (unsigned char *)&size, sizeof(size));
+ }
+}
+
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+ unsigned char output[20];
+ sha1_context ctx;
+ const void *p;
+
+ sha1_starts(&ctx);
+
+ p = (void *)hdr + hdr->page_size; /* kernel */
+ android_image_update_sha1(&ctx, p, hdr->kernel_size);
+
+ p += ALIGN(hdr->kernel_size, hdr->page_size); /* ramdisk */
+ android_image_update_sha1(&ctx, p, hdr->ramdisk_size);
+
+ p += ALIGN(hdr->ramdisk_size, hdr->page_size); /* second */
+ android_image_update_sha1(&ctx, p, hdr->second_size);
+
+ sha1_finish(&ctx, output);
+
+ return memcmp(output, (unsigned char *)hdr->id, sizeof(output));
+}
+#else
+static int android_image_verify_sha1(const struct andr_img_hdr *hdr)
+{
+ return 0;
+}
+#endif
+
/**
* android_image_get_kernel() - processes kernel part of Android boot images
* @hdr: Pointer to image header, which is at the start
* of the image.
- * @verify:Checksum verification flag. Currently unimplemented.
+ * @verify:Checksum verification flag.
* @os_data: Pointer to a ulong variable, will hold os data start
* address.
* @os_len:Pointer to a ulong variable, will hold os data length.
@@ -66,11 +109,11 @@ int android_image_get_kernel(const struct andr_img_hdr
*hdr, int verify,
const struct image_header *ihdr = (const struct image_header *)
((uintptr_t)hdr + hdr->page_size);
- /*
-* Not all Android tools use the id field for signing the image with
-* sha1 (or anything) so we don't check it. It is not obvious that the
-* string is null terminated so we take care of this.
-*/
+ if (verify && android_image_verify_sha1(hdr) < 0) {
+ puts("Bad Data Hash\n");
+ return -EACCES;
+ }
+
strncpy(andr_tmp_str, hdr->name, ANDR_BOOT_NAME_SIZE);
andr_tmp_str[ANDR_BOOT_NAME_SIZE] = '\0';
if (strlen(andr_tmp_str))
--
2.25.1
[PATCH v1] drivers: spi: sunxi: Fix spi speed settting
From: qianfan Zhao
dm_spi_claim_bus run spi_set_speed_mode first and then ops->claim_bus,
but spi clock is enabled when sun4i_spi_claim_bus, that will make
sun4i_spi_set_speed doesn't work.
Fix it.
Signed-off-by: qianfan Zhao
---
drivers/spi/spi-sunxi.c | 78 -
1 file changed, 30 insertions(+), 48 deletions(-)
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index b6cd7ddafa..1043cde976 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -224,6 +224,7 @@ err_ahb:
static int sun4i_spi_claim_bus(struct udevice *dev)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev->parent);
+ u32 div, reg;
int ret;
ret = sun4i_spi_set_clock(dev->parent, true);
@@ -233,12 +234,38 @@ static int sun4i_spi_claim_bus(struct udevice *dev)
setbits_le32(SPI_REG(priv, SPI_GCR), SUN4I_CTL_ENABLE |
SUN4I_CTL_MASTER | SPI_BIT(priv, SPI_GCR_TP));
+ /* Setup clock divider */
+ div = SUN4I_SPI_MAX_RATE / (2 * priv->freq);
+ reg = readl(SPI_REG(priv, SPI_CCR));
+
+ if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
+ if (div > 0)
+ div--;
+
+ reg &= ~(SUN4I_CLK_CTL_CDR2_MASK | SUN4I_CLK_CTL_DRS);
+ reg |= SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
+ } else {
+ div = __ilog2(SUN4I_SPI_MAX_RATE) - __ilog2(priv->freq);
+ reg &= ~((SUN4I_CLK_CTL_CDR1_MASK << 8) | SUN4I_CLK_CTL_DRS);
+ reg |= SUN4I_CLK_CTL_CDR1(div);
+ }
+
+ writel(reg, SPI_REG(priv, SPI_CCR));
+
if (priv->variant->has_soft_reset)
setbits_le32(SPI_REG(priv, SPI_GCR),
SPI_BIT(priv, SPI_GCR_SRST));
- setbits_le32(SPI_REG(priv, SPI_TCR), SPI_BIT(priv, SPI_TCR_CS_MANUAL) |
-SPI_BIT(priv, SPI_TCR_CS_ACTIVE_LOW));
+ /* Setup the transfer control register */
+ reg = SPI_BIT(priv, SPI_TCR_CS_MANUAL) |
+ SPI_BIT(priv, SPI_TCR_CS_ACTIVE_LOW);
+
+ if (priv->mode & SPI_CPOL)
+ reg |= SPI_BIT(priv, SPI_TCR_CPOL);
+ if (priv->mode & SPI_CPHA)
+ reg |= SPI_BIT(priv, SPI_TCR_CPHA);
+
+ writel(reg, SPI_REG(priv, SPI_TCR));
return 0;
}
@@ -329,67 +356,22 @@ static int sun4i_spi_set_speed(struct udevice *dev, uint
speed)
{
struct sun4i_spi_plat *plat = dev_get_plat(dev);
struct sun4i_spi_priv *priv = dev_get_priv(dev);
- unsigned int div;
- u32 reg;
if (speed > plat->max_hz)
speed = plat->max_hz;
if (speed < SUN4I_SPI_MIN_RATE)
speed = SUN4I_SPI_MIN_RATE;
- /*
-* Setup clock divider.
-*
-* We have two choices there. Either we can use the clock
-* divide rate 1, which is calculated thanks to this formula:
-* SPI_CLK = MOD_CLK / (2 ^ (cdr + 1))
-* Or we can use CDR2, which is calculated with the formula:
-* SPI_CLK = MOD_CLK / (2 * (cdr + 1))
-* Whether we use the former or the latter is set through the
-* DRS bit.
-*
-* First try CDR2, and if we can't reach the expected
-* frequency, fall back to CDR1.
-*/
-
- div = SUN4I_SPI_MAX_RATE / (2 * speed);
- reg = readl(SPI_REG(priv, SPI_CCR));
-
- if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) {
- if (div > 0)
- div--;
-
- reg &= ~(SUN4I_CLK_CTL_CDR2_MASK | SUN4I_CLK_CTL_DRS);
- reg |= SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS;
- } else {
- div = __ilog2(SUN4I_SPI_MAX_RATE) - __ilog2(speed);
- reg &= ~((SUN4I_CLK_CTL_CDR1_MASK << 8) | SUN4I_CLK_CTL_DRS);
- reg |= SUN4I_CLK_CTL_CDR1(div);
- }
priv->freq = speed;
- writel(reg, SPI_REG(priv, SPI_CCR));
-
return 0;
}
static int sun4i_spi_set_mode(struct udevice *dev, uint mode)
{
struct sun4i_spi_priv *priv = dev_get_priv(dev);
- u32 reg;
-
- reg = readl(SPI_REG(priv, SPI_TCR));
- reg &= ~(SPI_BIT(priv, SPI_TCR_CPOL) | SPI_BIT(priv, SPI_TCR_CPHA));
-
- if (mode & SPI_CPOL)
- reg |= SPI_BIT(priv, SPI_TCR_CPOL);
-
- if (mode & SPI_CPHA)
- reg |= SPI_BIT(priv, SPI_TCR_CPHA);
priv->mode = mode;
- writel(reg, SPI_REG(priv, SPI_TCR));
-
return 0;
}
@@ -441,7 +423,7 @@ static int sun4i_spi_of_to_plat(struct udevice *bus)
plat->variant = (struct sun4i_spi_variant *)dev_get_driver_data(bus);
plat->max_hz = fdtdec_get_int(gd->fdt_blob, node,
"spi-max-frequency",
- SUN4I_SPI_DEFAULT_RATE);
+ SUN4I_SPI_MAX_RATE);
if (plat->max_hz > SUN4I_SPI_MAX_RATE)
plat->max_hz = SUN4I_SPI_MAX_RATE;
--
2.
[PATCH v2] sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform
From: qianfan Zhao
linux system will die if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online
Fixed sunxi_power_switch based on allwinner lichee 3.10 kernel driver.
Signed-off-by: qianfan Zhao
---
v2 changes: Fix the commit message, the source code doesn't change.
arch/arm/cpu/armv7/sunxi/psci.c | 24 +++-
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 1ac50f558a..63186a9388 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -79,8 +79,7 @@ static void __secure __mdelay(u32 ms)
static void __secure clamp_release(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_H3) || \
- defined(CONFIG_MACH_SUN8I_R40)
+ defined(CONFIG_MACH_SUN8I_H3)
u32 tmp = 0x1ff;
do {
tmp >>= 1;
@@ -88,15 +87,30 @@ static void __secure clamp_release(u32 __maybe_unused
*clamp)
} while (tmp);
__mdelay(10);
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ u8 i, tmp = 0xfe;
+
+ for (i = 0; i < 5; i++) { /* 0xfe, 0xf8, 0xe0, 0x80, 0x00 */
+ writel(tmp, clamp);
+ tmp <<= 2;
+ }
+
+ while (0x00 != readl(clamp)) {
+ ;
+ }
#endif
}
static void __secure clamp_set(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_H3) || \
- defined(CONFIG_MACH_SUN8I_R40)
+ defined(CONFIG_MACH_SUN8I_H3)
writel(0xff, clamp);
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ writel(0xff, clamp);
+ while (0xff != readl(clamp)) {
+ ;
+ }
#endif
}
@@ -153,7 +167,7 @@ static void __secure sunxi_cpu_set_power(int cpu, bool on)
sunxi_power_switch((void *)cpucfg + SUN8I_R40_PWR_CLAMP(cpu),
(void *)cpucfg + SUN8I_R40_PWROFF,
- on, 0);
+ on, cpu);
}
#else /* ! CONFIG_MACH_SUN7I && ! CONFIG_MACH_SUN8I_R40 */
static void __secure sunxi_cpu_set_power(int cpu, bool on)
--
2.25.1
[PATCH v1] sunxi: psci: Fix sunxi_power_switch on sun8i-r40 platform
From: qianfan Zhao
linux system will dead if we offline one of the cpu on R40 based board:
eg: echo 0 > /sys/devices/system/cpu/cpu3/online
Fixed sunxi_power_switch based on allwinner lichee 3.10 kernel driver.
Signed-off-by: qianfan Zhao
---
arch/arm/cpu/armv7/sunxi/psci.c | 24 +++-
1 file changed, 19 insertions(+), 5 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c
index 1ac50f558a..63186a9388 100644
--- a/arch/arm/cpu/armv7/sunxi/psci.c
+++ b/arch/arm/cpu/armv7/sunxi/psci.c
@@ -79,8 +79,7 @@ static void __secure __mdelay(u32 ms)
static void __secure clamp_release(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_H3) || \
- defined(CONFIG_MACH_SUN8I_R40)
+ defined(CONFIG_MACH_SUN8I_H3)
u32 tmp = 0x1ff;
do {
tmp >>= 1;
@@ -88,15 +87,30 @@ static void __secure clamp_release(u32 __maybe_unused
*clamp)
} while (tmp);
__mdelay(10);
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ u8 i, tmp = 0xfe;
+
+ for (i = 0; i < 5; i++) { /* 0xfe, 0xf8, 0xe0, 0x80, 0x00 */
+ writel(tmp, clamp);
+ tmp <<= 2;
+ }
+
+ while (0x00 != readl(clamp)) {
+ ;
+ }
#endif
}
static void __secure clamp_set(u32 __maybe_unused *clamp)
{
#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN7I) || \
- defined(CONFIG_MACH_SUN8I_H3) || \
- defined(CONFIG_MACH_SUN8I_R40)
+ defined(CONFIG_MACH_SUN8I_H3)
writel(0xff, clamp);
+#elif defined(CONFIG_MACH_SUN8I_R40)
+ writel(0xff, clamp);
+ while (0xff != readl(clamp)) {
+ ;
+ }
#endif
}
@@ -153,7 +167,7 @@ static void __secure sunxi_cpu_set_power(int cpu, bool on)
sunxi_power_switch((void *)cpucfg + SUN8I_R40_PWR_CLAMP(cpu),
(void *)cpucfg + SUN8I_R40_PWROFF,
- on, 0);
+ on, cpu);
}
#else /* ! CONFIG_MACH_SUN7I && ! CONFIG_MACH_SUN8I_R40 */
static void __secure sunxi_cpu_set_power(int cpu, bool on)
--
2.25.1
[PATCH v1] splash: splash_storage_read_raw: Add mmc support
From: qianfan Zhao
Add splash_mmc_read_raw for loading splash from mmc's raw partition.
Signed-off-by: qianfan Zhao
---
common/splash_source.c | 90 ++
1 file changed, 90 insertions(+)
diff --git a/common/splash_source.c b/common/splash_source.c
index d05670f5ee..28ec405bcf 100644
--- a/common/splash_source.c
+++ b/common/splash_source.c
@@ -20,6 +20,7 @@
#include
#include
#include
+#include
#include
DECLARE_GLOBAL_DATA_PTR;
@@ -64,6 +65,93 @@ static int splash_nand_read_raw(u32 bmp_load_addr, int
offset, size_t read_size)
}
#endif
+#ifdef CONFIG_MMC
+static size_t blk_dread_size(struct blk_desc *desc, lbaint_t start,
+u32 load_addr, size_t read_size)
+{
+ ALLOC_CACHE_ALIGN_BUFFER(__u8, tmpbuf, desc->blksz);
+ size_t n, sz_read = 0;
+
+ while (sz_read < read_size) {
+ if (blk_dread(desc, start, 1, tmpbuf) < 0)
+ break;
+
+ n = min(read_size - sz_read, (size_t)desc->blksz);
+ memcpy((void *)load_addr, tmpbuf, n);
+ load_addr += n;
+ sz_read += n;
+ start++;
+ }
+
+ return sz_read;
+}
+
+static struct blk_desc *mmc_blk_get_dev(const char *name)
+{
+ struct blk_desc *dev_desc = NULL;
+
+ if (strncmp(name, "mmc", 3) == 0 && strlen(name) > 3) {
+ int mmc_dev;
+ char *endp;
+
+ mmc_dev = (int)simple_strtol(name + 3, &endp, 10);
+ if (*endp == '\0')
+ dev_desc = blk_get_dev("mmc", mmc_dev);
+ }
+
+ return dev_desc;
+}
+
+static int splash_mmc_read_raw(u32 bmp_load_addr, struct splash_location *loc,
+ size_t read_size)
+{
+ struct blk_desc *dev_desc = mmc_blk_get_dev(loc->name);
+ lbaint_t offset;
+ size_t sz;
+
+ if (!dev_desc) {
+ printf("mmc device %s not found\n", loc->name);
+ return -ENODEV;
+ }
+
+ if (loc->devpart) {
+ struct disk_partition partition;
+ int ret;
+
+ ret = part_get_info_by_name(dev_desc, loc->devpart, &partition);
+ if (ret < 0) {
+ printf("%s: partition %s not found\n",
+ loc->name, loc->devpart);
+ return ret;
+ } else if (partition.size * partition.blksz < read_size) {
+ printf("%s: partition %s size less that requested\n",
+ loc->name, loc->devpart);
+ return -E2BIG;
+ }
+
+ offset = partition.start;
+ } else {
+ offset = loc->offset;
+ }
+
+ sz = blk_dread_size(dev_desc, offset, bmp_load_addr, read_size);
+ if (sz != read_size) {
+ printf("%s: got %zu but expected %zu\n",
+ loc->name, sz, read_size);
+ return -EIO;
+ }
+
+ return 0;
+}
+#else
+static int splash_mmc_read_raw(u32 bmp_load_addr, struct splash_location *loc,
+ size_t read_size)
+{
+ debug("%s: mmc support not available\n", __func__);
+ return -ENOSYS;
+}
+#endif
+
static int splash_storage_read_raw(struct splash_location *location,
u32 bmp_load_addr, size_t read_size)
{
@@ -78,6 +166,8 @@ static int splash_storage_read_raw(struct splash_location
*location,
return splash_nand_read_raw(bmp_load_addr, offset, read_size);
case SPLASH_STORAGE_SF:
return splash_sf_read_raw(bmp_load_addr, offset, read_size);
+ case SPLASH_STORAGE_MMC:
+ return splash_mmc_read_raw(bmp_load_addr, location, read_size);
default:
printf("Unknown splash location\n");
}
--
2.25.1
[PATCH v1] drivers: spi: spi-sunxi: Add Kconfig option for sun4i_spi_parse_pins
From: qianfan Zhao
spi-sunxi driver will init pins based on "pinctrl-0", but the
implementation is very limited.
Adding an Kconfig option if you really need this feature, or disable it
and config pinmux at board's board_init.
Signed-off-by: qianfan Zhao
---
drivers/spi/Kconfig | 10 ++
drivers/spi/spi-sunxi.c | 4
2 files changed, 14 insertions(+)
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index d07e9a28af..9c2fe96ac1 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -382,6 +382,16 @@ config SPI_SUNXI
Same controller driver can reuse in all Allwinner SoC variants.
+config SUNXI_SPI_PARSE_PINS
+ bool "Enable sun4i_spi_parse_pins feature"
+ depends on SPI_SUNXI
+ default y
+ help
+ Enable sun4i_spi_parse_pins support when spi driver probing.
+
+ The default pinmux configuration for SUN50I is SUN50I_GPC_SPI0(4),
+ and SUNXI_GPC_SPI0(3) for others.
+
config STM32_QSPI
bool "STM32F7 QSPI driver"
depends on STM32F4 || STM32F7 || ARCH_STM32MP
diff --git a/drivers/spi/spi-sunxi.c b/drivers/spi/spi-sunxi.c
index bc2f544e86..f48562a59b 100644
--- a/drivers/spi/spi-sunxi.c
+++ b/drivers/spi/spi-sunxi.c
@@ -180,6 +180,7 @@ static void sun4i_spi_set_cs(struct udevice *bus, u8 cs,
bool enable)
writel(reg, SPI_REG(priv, SPI_TCR));
}
+#if CONFIG_IS_ENABLED(SUNXI_SPI_PARSE_PINS)
static int sun4i_spi_parse_pins(struct udevice *dev)
{
const void *fdt = gd->fdt_blob;
@@ -259,6 +260,7 @@ static int sun4i_spi_parse_pins(struct udevice *dev)
}
return 0;
}
+#endif /* CONFIG_IS_ENABLED(SUNXI_SPI_PARSE_PINS) */
static inline int sun4i_spi_set_clock(struct udevice *dev, bool enable)
{
@@ -506,7 +508,9 @@ static int sun4i_spi_probe(struct udevice *bus)
return ret;
}
+#if CONFIG_IS_ENABLED(SUNXI_SPI_PARSE_PINS)
sun4i_spi_parse_pins(bus);
+#endif
priv->variant = plat->variant;
priv->base = plat->base;
--
2.25.1
[PATCH v1] sunxi: Make SYS_VENDOR, SYS_BOARD, SYS_CONFIG_NAME configurable
From: qianfan Zhao The board is not configurable if use sunxi soc. Add Kconfig items and make custom board available. Signed-off-by: qianfan Zhao --- arch/arm/mach-sunxi/Kconfig | 17 + 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 2c18cf02d1..03460870db 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -598,6 +598,7 @@ config SYS_CLK_FREQ default 100800 if MACH_SUN50I_H616 config SYS_CONFIG_NAME + string "Board configuration name" default "sun4i" if MACH_SUN4I default "sun5i" if MACH_SUN5I default "sun6i" if MACH_SUN6I @@ -607,9 +608,25 @@ config SYS_CONFIG_NAME default "sun50i" if MACH_SUN50I default "sun50i" if MACH_SUN50I_H6 default "sun50i" if MACH_SUN50I_H616 + help + This option contains information about board configuration name. + Based on this option include/configs/.h header + will be used for board configuration. config SYS_BOARD + string "Board name" default "sunxi" + help + This option contains information about board name. + Based on this option board// will + be used. + +config SYS_VENDOR + string "Vendor name" + help + This option contains information about board name. + Based on this option board// will + be used. config SYS_SOC default "sunxi" -- 2.25.1
[PATCH v2 1/2] net: eth-uclass: Fix eth_halt
From: qianfan Zhao
eth_device_priv maybe unaccessable after @stop handler due to eth device
is removed in @stop, touch it will trigger data abort.
Fix data abort bug when run dhcp or tftp command via usbnet.
Signed-off-by: qianfan Zhao
---
net/eth-uclass.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 0da0e85be0..2b88b6c145 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -339,8 +339,15 @@ void eth_halt(void)
return;
eth_get_ops(current)->stop(current);
- priv->state = ETH_STATE_PASSIVE;
- priv->running = false;
+
+ /* ethernet device maybe removed when @stop handler, that will cause
+* @priv is freed. get private data again to avoid it
+*/
+ priv = dev_get_uclass_priv(current);
+ if (priv) {
+ priv->state = ETH_STATE_PASSIVE;
+ priv->running = false;
+ }
}
int eth_is_active(struct udevice *dev)
--
2.17.1
[PATCH v2 2/2] net: eth-uclass: Fix data abort when tftp get nonexistent file via usb
From: qianfan Zhao
tftp_handler do eth_halt when TFTP_ERROR, but eth_halt will remove eth
device if it is an usb network. usbeth's private data will be unaccessable
when usb_eth_free_pkt, touch it will trigger data abort.
Next is the console messages:
=> tftp xxx
...
Loading: *
TFTP error: 'open failed: No such file or directory' (1)
Not retrying...
data abort
pc : [<9feb6ba2>] lr : [<9feb6b9f>]
Fix it.
Signed-off-by: qianfan Zhao
---
net/eth-uclass.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 2b88b6c145..c9bba4f8de 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -407,6 +407,13 @@ int eth_rx(void)
flags = 0;
if (ret > 0)
net_process_received_packet(packet, ret);
+
+ /* ethernet maybe halted when packet_handler, check again */
+ if (!eth_is_active(current)) {
+ ret = 0;
+ break;
+ }
+
if (ret >= 0 && eth_get_ops(current)->free_pkt)
eth_get_ops(current)->free_pkt(current, packet, ret);
if (ret <= 0)
--
2.17.1
[PATCH v2 3/3] driver: video: font: Introduce 6x8 bitmap font
From: qianfan Zhao
6x8 bitmap font has better display effect on smaller lcd screen.
Signed-off-by: qianfan Zhao
---
drivers/video/Kconfig|3 +
include/video_font.h |4 +-
include/video_font_6x8.h | 2580 ++
3 files changed, 2586 insertions(+), 1 deletion(-)
create mode 100644 include/video_font_6x8.h
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index adc620682e..0526a88ee3 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -148,6 +148,9 @@ choice
config VIDEO_FONT_4X6
bool "4x6"
+config VIDEO_FONT_6X8
+ bool "6x8"
+
config VIDEO_FONT_8X16
bool "8x16"
diff --git a/include/video_font.h b/include/video_font.h
index 5e23f70f85..4eac37a0f0 100644
--- a/include/video_font.h
+++ b/include/video_font.h
@@ -7,8 +7,10 @@
#ifndef _VIDEO_FONT_
#define _VIDEO_FONT_
-#ifdef CONFIG_VIDEO_FONT_4X6
+#if defined(CONFIG_VIDEO_FONT_4X6)
#include
+#elif defined(CONFIG_VIDEO_FONT_6X8)
+#include
#else
#include
#endif
diff --git a/include/video_font_6x8.h b/include/video_font_6x8.h
new file mode 100644
index 00..e090372c02
--- /dev/null
+++ b/include/video_font_6x8.h
@@ -0,0 +1,2580 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022
+ * qianfan Zhao
+ *
+ * This file contains an 6x8 bitmap font for code page 437.
+ */
+
+#ifndef _VIDEO_FONT_DATA_
+#define _VIDEO_FONT_DATA_
+
+#define VIDEO_FONT_CHARS 256
+#define VIDEO_FONT_WIDTH 6
+#define VIDEO_FONT_HEIGHT 8
+#define VIDEO_FONT_SIZE(VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT)
+
+static unsigned char __maybe_unused video_fontdata[VIDEO_FONT_SIZE] = {
+ /* 0 0x00 */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+
+ /* 1 0x01 */
+ 0x38, /* ****/
+ 0x44, /* * * */
+ 0x6c, /* ** ** */
+ 0x44, /* * * */
+ 0x54, /* * * * */
+ 0x44, /* * * */
+ 0x38, /* ****/
+ 0x00, /* */
+
+ /* 2 0x02 */
+ 0x38, /* ****/
+ 0x7c, /* * */
+ 0x54, /* * * * */
+ 0x7c, /* * */
+ 0x44, /* * * */
+ 0x7c, /* * */
+ 0x38, /* ****/
+ 0x00, /* */
+
+ /* 3 0x03 */
+ 0x00, /* */
+ 0x28, /* * **/
+ 0x7c, /* * */
+ 0x7c, /* * */
+ 0x7c, /* * */
+ 0x38, /* ****/
+ 0x10, /** */
+ 0x00, /* */
+
+ /* 4 0x04 */
+ 0x00, /* */
+ 0x10, /** */
+ 0x38, /* ****/
+ 0x7c, /* * */
+ 0x7c, /* * */
+ 0x38, /* ****/
+ 0x10, /** */
+ 0x00, /* */
+
+ /* 5 0x05 */
+ 0x10, /** */
+ 0x38, /* ****/
+ 0x38, /* ****/
+ 0x10, /** */
+ 0x7c, /* * */
+ 0x7c, /* * */
+ 0x10, /** */
+ 0x00, /* */
+
+ /* 6 0x06 */
+ 0x00, /* */
+ 0x10, /** */
+ 0x38, /* ****/
+ 0x7c, /* * */
+ 0x7c, /* * */
+ 0x10, /** */
+ 0x38, /* ****/
+ 0x00, /* */
+
+ /* 7 0x07 */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+
+ /* 8 0x08 */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+
+ /* 9 0x09 */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+
+ /* 10 0x0a */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+ 0x00, /* */
+
+ /* 11 0x0b */
+ 0x00, /* */
+ 0x1c, /**** */
+ 0x0c, /* ** */
+ 0x34, /* ** * */
+ 0x48, /* * **/
+ 0x48, /* * **/
+ 0x30, /* ** */
+ 0x00, /* */
+
+ /* 12 0x0c */
+ 0x38, /* ****/
+ 0x44, /* * * */
+ 0x44, /* * * */
+ 0x38, /* ****/
+ 0x10, /** */
+ 0x38, /* ****/
+ 0x10, /** */
+ 0x00, /*
[PATCH v2 1/3] video: Add VIDEO_FONT_4x6 to Kconfig add fix compile waring
From: qianfan Zhao
CONFIG_VIDEO_FONT_4x6 is referenced in include/video_font.h, but doesn't
has a Kconfig configuration.
Add it.
Signed-off-by: qianfan Zhao
---
drivers/video/Kconfig| 15 +++
include/video_font_4x6.h | 2 +-
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e2cf1e752f..adc620682e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -138,6 +138,21 @@ config CONSOLE_NORMAL
CONFIG_CONSOLE_ROTATION for that). A built-in 8x16 font is used
for the display.
+choice
+ prompt "bitmap video font"
+ default VIDEO_FONT_8X16
+ depends on CONSOLE_NORMAL
+ help
+ Select the default bitmap font.
+
+config VIDEO_FONT_4X6
+ bool "4x6"
+
+config VIDEO_FONT_8X16
+ bool "8x16"
+
+endchoice
+
config CONSOLE_ROTATION
bool "Support rotated displays"
depends on DM_VIDEO
diff --git a/include/video_font_4x6.h b/include/video_font_4x6.h
index c7e6351b64..65dd5e8c1d 100644
--- a/include/video_font_4x6.h
+++ b/include/video_font_4x6.h
@@ -46,7 +46,7 @@ __END__;
#define VIDEO_FONT_HEIGHT 6
#define VIDEO_FONT_SIZE(VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT)
-static unsigned char video_fontdata[VIDEO_FONT_SIZE] = {
+static unsigned char __maybe_unused video_fontdata[VIDEO_FONT_SIZE] = {
/*{*/
/* Char 0: ' ' */
--
2.17.1
[PATCH v2 2/3] cmd: lcdputs: Escape special characters
From: qianfan Zhao
Add support \\, \r, \n, \t and \b.
eg:
=> lcdputs "hello\nworld"
Signed-off-by: qianfan Zhao
---
drivers/video/vidconsole-uclass.c | 34 +--
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/video/vidconsole-uclass.c
b/drivers/video/vidconsole-uclass.c
index f42db40d4c..d2554fd3f7 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -709,15 +709,45 @@ static int do_video_puts(struct cmd_tbl *cmdtp, int flag,
int argc,
{
struct udevice *dev;
const char *s;
+ char c;
if (argc != 2)
return CMD_RET_USAGE;
if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev))
return CMD_RET_FAILURE;
- for (s = argv[1]; *s; s++)
- vidconsole_put_char(dev, *s);
+ for (s = argv[1]; (c = *s); s++) {
+ if (c == '\\') {
+ s++;
+
+ switch (*s) {
+ case '\0':
+ goto sync;
+ case '\\':
+ c = '\\';
+ break;
+ case 'r':
+ c = '\r';
+ break;
+ case 'n':
+ c = '\n';
+ break;
+ case 't':
+ c = '\t';
+ break;
+ case 'b':
+ c = '\b';
+ break;
+ default:
+ continue;
+ }
+ }
+
+ vidconsole_put_char(dev, c);
+ }
+
+sync:
return video_sync(dev->parent, false);
}
--
2.17.1
[PATCH v1 1/2] video: Add VIDEO_FONT_4x6 to Kconfig add fix compile waring
From: qianfan Zhao
CONFIG_VIDEO_FONT_4x6 is referenced in include/video_font.h, but doesn't
has a Kconfig configuration.
Add it.
Signed-off-by: qianfan Zhao
---
drivers/video/Kconfig| 8
include/video_font_4x6.h | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index e2cf1e752f..7b2efdfd8a 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -138,6 +138,14 @@ config CONSOLE_NORMAL
CONFIG_CONSOLE_ROTATION for that). A built-in 8x16 font is used
for the display.
+config VIDEO_FONT_4X6
+ bool "Minuscule 4x6 font"
+ depends on CONSOLE_NORMAL
+ default n
+ help
+ Use Minuscule 4x6 font for code page 437, 8x16 bitmap font is used
+ by default if this options is not selected.
+
config CONSOLE_ROTATION
bool "Support rotated displays"
depends on DM_VIDEO
diff --git a/include/video_font_4x6.h b/include/video_font_4x6.h
index c7e6351b64..65dd5e8c1d 100644
--- a/include/video_font_4x6.h
+++ b/include/video_font_4x6.h
@@ -46,7 +46,7 @@ __END__;
#define VIDEO_FONT_HEIGHT 6
#define VIDEO_FONT_SIZE(VIDEO_FONT_CHARS * VIDEO_FONT_HEIGHT)
-static unsigned char video_fontdata[VIDEO_FONT_SIZE] = {
+static unsigned char __maybe_unused video_fontdata[VIDEO_FONT_SIZE] = {
/*{*/
/* Char 0: ' ' */
--
2.17.1
[PATCH v1 2/2] cmd: lcdputs: Escape special characters
From: qianfan Zhao
Add support \\, \r, \n, \t and \b.
eg:
=> lcdputs "hello\nworld"
Signed-off-by: qianfan Zhao
---
drivers/video/vidconsole-uclass.c | 34 +--
1 file changed, 32 insertions(+), 2 deletions(-)
diff --git a/drivers/video/vidconsole-uclass.c
b/drivers/video/vidconsole-uclass.c
index f42db40d4c..d2554fd3f7 100644
--- a/drivers/video/vidconsole-uclass.c
+++ b/drivers/video/vidconsole-uclass.c
@@ -709,15 +709,45 @@ static int do_video_puts(struct cmd_tbl *cmdtp, int flag,
int argc,
{
struct udevice *dev;
const char *s;
+ char c;
if (argc != 2)
return CMD_RET_USAGE;
if (uclass_first_device_err(UCLASS_VIDEO_CONSOLE, &dev))
return CMD_RET_FAILURE;
- for (s = argv[1]; *s; s++)
- vidconsole_put_char(dev, *s);
+ for (s = argv[1]; (c = *s); s++) {
+ if (c == '\\') {
+ s++;
+
+ switch (*s) {
+ case '\0':
+ goto sync;
+ case '\\':
+ c = '\\';
+ break;
+ case 'r':
+ c = '\r';
+ break;
+ case 'n':
+ c = '\n';
+ break;
+ case 't':
+ c = '\t';
+ break;
+ case 'b':
+ c = '\b';
+ break;
+ default:
+ continue;
+ }
+ }
+
+ vidconsole_put_char(dev, c);
+ }
+
+sync:
return video_sync(dev->parent, false);
}
--
2.17.1
[PATCH v2 2/2] net: eth-uclass: Fix data abort when tftp get nonexistent file via usb
From: qianfan Zhao
tftp_handler do eth_halt when TFTP_ERROR, but eth_halt will remove eth
device if it is an usb network. usbeth's private data will be unaccessable
when usb_eth_free_pkt, touch it will trigger data abort.
Next is the console messages:
=> tftp xxx
...
Loading: *
TFTP error: 'open failed: No such file or directory' (1)
Not retrying...
data abort
pc : [<9feb6ba2>] lr : [<9feb6b9f>]
Fix it.
Signed-off-by: qianfan Zhao
---
net/eth-uclass.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index c6eb1bc8f8..27baf52c26 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -405,6 +405,13 @@ int eth_rx(void)
flags = 0;
if (ret > 0)
net_process_received_packet(packet, ret);
+
+ /* ethernet maybe halted when packet_handler, check again */
+ if (!eth_is_active(current)) {
+ ret = 0;
+ break;
+ }
+
if (ret >= 0 && eth_get_ops(current)->free_pkt)
eth_get_ops(current)->free_pkt(current, packet, ret);
if (ret <= 0)
--
2.17.1
[PATCH v2 1/2] net: eth-uclass: Fix eth_halt
From: qianfan Zhao eth_device_priv maybe unaccessable after @stop handler due to eth device is removed in @stop. Setting private data before @stop handler. This also fix data abort bug when run dhcp or tftp command via usbnet. Signed-off-by: qianfan Zhao --- net/eth-uclass.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 58c308f332..c6eb1bc8f8 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -338,9 +338,14 @@ void eth_halt(void) if (!priv || !priv->running) return; - eth_get_ops(current)->stop(current); - priv->state = ETH_STATE_PASSIVE; + /* Make sure setting private data before @stop handler, it may remove +* ethernet device and will cause @priv unaccessable. +* eg: +* usb_eth_stop -> usb_gadget_release -> device_remove +*/ priv->running = false; + + eth_get_ops(current)->stop(current); } int eth_is_active(struct udevice *dev) -- 2.17.1
[PATCH v1] net: eth-uclass: Fix eth_halt
From: qianfan Zhao eth_device_priv maybe unaccessable after @stop handler due to eth device is removed in @stop. Setting private data before @stop handler. This also fix data abort bug when run dhcp or tftp command via usbnet. Signed-off-by: qianfan Zhao --- net/eth-uclass.c | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 58c308f332..c6eb1bc8f8 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -338,9 +338,14 @@ void eth_halt(void) if (!priv || !priv->running) return; - eth_get_ops(current)->stop(current); - priv->state = ETH_STATE_PASSIVE; + /* Make sure setting private data before @stop handler, it may remove +* ethernet device and will cause @priv unaccessable. +* eg: +* usb_eth_stop -> usb_gadget_release -> device_remove +*/ priv->running = false; + + eth_get_ops(current)->stop(current); } int eth_is_active(struct udevice *dev) -- 2.17.1
Re: data abort when run 'dhcp'
no malloc messages even if i remove the _DEBUG marco check in assert. maybe it can’t detected by do_check_inuse_chunk(). > 在 2022年3月23日，18:12，Heinrich Schuchardt 写道： > On 3/23/22 11:07, qianfan wrote: >> >> 在 2022/3/23 17:51, Heinrich Schuchardt 写道: >>> On 3/23/22 10:13, qianfan wrote: 在 2022/3/23 16:02, qianfan 写道: > 在 2022/3/23 15:45, qianfan 写道: >> 在 2022/3/23 10:28, qianfan 写道: >>> Hi: >>> I had a custom AM335X board connected my computer by usbnet. It >>> always report data abort when 'dhcp': >>> Next it the log: >>> U-Boot 2022.01-rc1-00183-gfa5b4e2d19-dirty (Feb 25 2022 - 15:45:02 >>> +0800) >>> CPU : AM335X-GP rev 2.1 >>> Model: WISDOM AM335X CCT >>> DRAM: 512 MiB >>> NAND: 256 MiB >>> MMC: OMAP SD/MMC: 0 >>> Loading Environment from NAND... *** Warning - bad CRC, using >>> default environment >>> Net: Could not get PHY for ethernet@4a10: addr 0 >>> eth2: ethernet@4a10, eth3: usb_ether >>> Hit any key to stop autoboot: 0 >>> => setenv autoload no >>> => dhcp >>> using musb-hdrc, OUT ep1out IN ep1in STATUS ep2in >>> MAC de:ad:be:ef:00:01 >>> HOST MAC de:ad:be:ef:00:00 >>> RNDIS ready >>> musb-hdrc: peripheral reset irq lost! >>> high speed config #2: 2 mA, Ethernet Gadget, using RNDIS >>> USB RNDIS network up! >>> BOOTP broadcast 1 >>> BOOTP broadcast 2 >>> BOOTP broadcast 3 >>> DHCP client bound to address 192.168.200.4 (757 ms) >>> data abort >>> pc : [<9fe9b0a2>] lr : [<9febbc3f>] >>> reloc pc : [<808130a2>]lr : [<80833c3f>] >>> sp : 9de53410 ip : 9de53578 fp : 0001 >>> r10: 9de5345c r9 : 9de67e80 r8 : 9febbae5 >>> r7 : 9de72c30 r6 : 9feec710 r5 : 000d r4 : 0018 >>> r3 : 3fdd8e04 r2 : 0002 r1 : 9feec728 r0 : 9feec700 >>> Flags: Nzcv IRQs off FIQs on Mode SVC_32 (T) >>> Code: f023 0303 60ca 4403 (6091) 685a >>> Resetting CPU ... >>> resetting ... >>> It's there has any doc about how to debug data abort? Or is the bug >>> is already fixed? >>> Thanks >> This bug doesn't fixed on master code. I found v2021.01 is good and >> v2021.04-rc2 is bad. >> Also I had tested this on beaglebone black with am335x_evm_defconfig, >> has the simliar problem. >> find the first bug commit via 'git bisect': it told me that commit >> e97eb638de0dc8f6e989e20eaeb0342f103cb917 broke it. But it is very >> strange due to this commit doesn't touch any dhcp or network code. >> ➜ u-boot-main git:(e97eb638de) ✗ git bisect bug >> e97eb638de0dc8f6e989e20eaeb0342f103cb917 is the first bug commit >> commit e97eb638de0dc8f6e989e20eaeb0342f103cb917 >> Author: Heinrich Schuchardt >> Date: Wed Jan 20 22:21:53 2021 +0100 >> fs: fat: consistent error handling for flush_dir() >> Provide function description for flush_dir(). >> Move all error messages for flush_dir() from the callers to the >> function. >> Move mapping of errors to -EIO to the function. >> Always check return value of flush_dir() (Coverity CID 316362). >> In fat_unlink() return -EIO if flush_dirty_fat_buffer() fails. >> Signed-off-by: Heinrich Schuchardt >> :04 04 2281a449f2d134078d7faa1ee735a367b55aad7e >> 77d188b1c99181fd71f2167fdeee3434a09db209 M fs >> 184aa6504143b452132e28cd3ebecc7b941cdfa1 is the first commit before >> e97eb638de0dc8f6e989e20eaeb0342f103cb917: >> * e97eb638de0dc8f6e989e20eaeb0342f103cb917 fs: fat: consistent error >> handling for flush_dir() >> * 184aa6504143b452132e28cd3ebecc7b941cdfa1 Merge tag >> 'u-boot-rockchip-20210121' of >> https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip >> |\ >> | * 9ddc0787bd660214366e386ce689dd78299ac9d0 pci: Add Rockchip dwc >> based PCIe controller driver >> I checked 184aa6504143b452132e28cd3ebecc7b941cdfa1 can work fine. >> U-Boot 2021.01-00688-g184aa65041-dirty (Mar 23 2022 - 15:07:56 +0800) >> CPU : AM335X-GP rev 2.1 >> Model: TI AM335x BeagleBone Black >> DRAM: 512 MiB >> WDT: Started with servicing (60s timeout) >> NAND: 0 MiB >> MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 >> Loading Environment from FAT... not set. Validating first >> E-fuse MAC >> Net: eth2: ethernet@4a10, eth3: usb_ether >> Hit any key to stop autoboot: 0 >> => dhcp >> ethernet@4a10 Waiting for PHY auto negotiation to >> complete. TIMEOUT ! >> using musb-hdrc, OUT ep1out IN ep1in STATUS ep2in >> MAC de:ad:be:ef:00:01 >> HOST MAC de:ad:be:ef:00:00 >> RNDIS ready >> musb-hdrc: peripheral reset irq lost! >> high speed config #2: 2 mA, Ethernet Gadget, using RNDIS >> USB RNDIS network up! >> BOOTP broadcast 1 >> BOOTP broadcast 2 >> BOOTP broadcast 3 >> DHCP client bound to address 192.168.2
[PATCH v1] driver: fastboot: Fix getvar_get_part_info when flash nand
From: qianfan Zhao
find_dev_and_part return 0 on success, 1 otherwise.
So fastboot_nand_get_part_info follow this rule.
Signed-off-by: qianfan Zhao
---
drivers/fastboot/fb_getvar.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/fastboot/fb_getvar.c b/drivers/fastboot/fb_getvar.c
index d43f2cfee6..a7a8dc458f 100644
--- a/drivers/fastboot/fb_getvar.c
+++ b/drivers/fastboot/fb_getvar.c
@@ -114,7 +114,10 @@ static int getvar_get_part_info(const char *part_name,
char *response,
struct part_info *part_info;
r = fastboot_nand_get_part_info(part_name, &part_info, response);
- if (r >= 0 && size)
+
+ if (r) /* find nand device and part failed */
+ r = -ENODEV;
+ else if (size)
*size = part_info->size;
# else
fastboot_fail("this storage is not supported in bootloader", response);
--
2.17.1
[PATCH v4] lib: sparse: Make CHUNK_TYPE_RAW buffer aligned
From: qianfan Zhao
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Misaligned operation at range [8428, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]
Fix it
Signed-off-by: qianfan Zhao
---
lib/image-sparse.c | 69 --
1 file changed, 61 insertions(+), 8 deletions(-)
diff --git a/lib/image-sparse.c b/lib/image-sparse.c
index d80fdbbf58..5ec0f94ab3 100644
--- a/lib/image-sparse.c
+++ b/lib/image-sparse.c
@@ -46,9 +46,66 @@
#include
#include
+#include
static void default_log(const char *ignored, char *response) {}
+static lbaint_t write_sparse_chunk_raw(struct sparse_storage *info,
+ lbaint_t blk, lbaint_t blkcnt,
+ void *data,
+ char *response)
+{
+ lbaint_t n = blkcnt, write_blks, blks = 0, aligned_buf_blks = 100;
+ uint32_t *aligned_buf = NULL;
+
+ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) {
+ write_blks = info->write(info, blk, n, data);
+ if (write_blks < n)
+ goto write_fail;
+
+ return write_blks;
+ }
+
+ aligned_buf = memalign(ARCH_DMA_MINALIGN, info->blksz *
aligned_buf_blks);
+ if (!aligned_buf) {
+ info->mssg("Malloc failed for: CHUNK_TYPE_RAW", response);
+ return -ENOMEM;
+ }
+
+ while (blkcnt > 0) {
+ n = min(aligned_buf_blks, blkcnt);
+ memcpy(aligned_buf, data, n * info->blksz);
+
+ /* write_blks might be > n due to NAND bad-blocks */
+ write_blks = info->write(info, blk + blks, n, aligned_buf);
+ if (write_blks < n) {
+ free(aligned_buf);
+ goto write_fail;
+ }
+
+ blks += write_blks;
+ data += n * info->blksz;
+ blkcnt -= n;
+ }
+
+ free(aligned_buf);
+ return blks;
+
+write_fail:
+ if (IS_ERR_VALUE(write_blks)) {
+ printf("%s: Write failed, block #" LBAFU " [" LBAFU "]
(%lld)\n",
+ __func__, blk + blks, n, (long long)write_blks);
+ info->mssg("flash write failure", response);
+ return write_blks;
+ }
+
+ /* write_blks < n */
+ printf("%s: Write failed, block #" LBAFU " [" LBAFU "]\n",
+ __func__, blk + blks, n);
+ info->mssg("flash write failure(incomplete)", response);
+ return -1;
+}
+
int write_sparse_image(struct sparse_storage *info,
const char *part_name, void *data, char *response)
{
@@ -152,15 +209,11 @@ int write_sparse_image(struct sparse_storage *info,
return -1;
}
- blks = info->write(info, blk, blkcnt, data);
- /* blks might be > blkcnt (eg. NAND bad-blocks) */
- if (blks < blkcnt) {
- printf("%s: %s" LBAFU " [" LBAFU "]\n",
- __func__, "Write failed, block #",
- blk, blks);
- info->mssg("flash write failure", response);
+ blks = write_sparse_chunk_raw(info, blk, blkcnt,
+ data, response);
+ if (blks < 0)
return -1;
- }
+
blk += blks;
bytes_written += ((u64)blkcnt) * info->blksz;
total_blocks += chunk_header->chunk_sz;
--
2.17.1
[PATCH] drivers: musb_gadget: Save endpoint desc to usb_ep->desc
From: qianfan Zhao Fix fastboot flash bug. If the downloading file size is equal to the partition size, "fastboot flash" can't work, at least in sunxi platform, because used an uninitalized point: ep->desc. This patch also fixed 'data abort' bug in am335x platform. Reproduce: fastboot flash loader1 spl/sunxi-spl.bin. Signed-off-by: qianfan Zhao --- drivers/usb/musb-new/musb_gadget.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/usb/musb-new/musb_gadget.c b/drivers/usb/musb-new/musb_gadget.c index 1fef00b292..7cca92b970 100644 --- a/drivers/usb/musb-new/musb_gadget.c +++ b/drivers/usb/musb-new/musb_gadget.c @@ -1188,6 +1188,7 @@ static int musb_gadget_enable(struct usb_ep *ep, } else musb_ep->dma = NULL; + musb_ep->end_point.desc = desc; musb_ep->desc = desc; musb_ep->busy = 0; musb_ep->wedged = 0; @@ -1245,9 +1246,7 @@ static int musb_gadget_disable(struct usb_ep *ep) } musb_ep->desc = NULL; -#ifndef __UBOOT__ musb_ep->end_point.desc = NULL; -#endif /* abort all pending DMA and requests */ nuke(musb_ep, -ESHUTDOWN); -- 2.17.1
[PATCH] lib: sparse: Make CHUNK_TYPE_RAW buffer aligned
From: qianfan Zhao
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Misaligned operation at range [8428, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]
Fix it
Signed-off-by: qianfan Zhao
---
lib/image-sparse.c | 54 +++---
1 file changed, 46 insertions(+), 8 deletions(-)
diff --git a/lib/image-sparse.c b/lib/image-sparse.c
index d80fdbbf58..1143c88a79 100644
--- a/lib/image-sparse.c
+++ b/lib/image-sparse.c
@@ -49,6 +49,48 @@
static void default_log(const char *ignored, char *response) {}
+static lbaint_t write_sparse_chunk_raw(struct sparse_storage *info,
+ lbaint_t blk, lbaint_t blkcnt,
+ void *data,
+ char *response)
+{
+ lbaint_t n, write_blks, blks = 0, aligned_buf_blks = 100;
+ uint32_t *aligned_buf = NULL;
+
+ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ return info->write(info, blk, blkcnt, data);
+
+ aligned_buf = memalign(ARCH_DMA_MINALIGN, info->blksz *
aligned_buf_blks);
+ if (!aligned_buf) {
+ info->mssg("Malloc failed for: CHUNK_TYPE_RAW", response);
+ return -ENOMEM;
+ }
+
+ while (blkcnt > 0) {
+ n = min(aligned_buf_blks, blkcnt);
+ memcpy(aligned_buf, data, n * info->blksz);
+
+ /* write_blks might be > n due to NAND bad-blocks */
+ write_blks = info->write(info, blk + blks, n, aligned_buf);
+ if (write_blks < 0 || write_blks < n) {
+ printf("%s: %s" LBAFU " [" LBAFU "]\n",
+ __func__, "Write failed, block #",
+ blk + blks, n);
+ info->mssg("flash write failure", response);
+ free(aligned_buf);
+
+ return min(write_blks, (lbaint_t)-1);
+ }
+
+ blks += write_blks;
+ data += n * info->blksz;
+ blkcnt -= n;
+ }
+
+ free(aligned_buf);
+ return blks;
+}
+
int write_sparse_image(struct sparse_storage *info,
const char *part_name, void *data, char *response)
{
@@ -152,15 +194,11 @@ int write_sparse_image(struct sparse_storage *info,
return -1;
}
- blks = info->write(info, blk, blkcnt, data);
- /* blks might be > blkcnt (eg. NAND bad-blocks) */
- if (blks < blkcnt) {
- printf("%s: %s" LBAFU " [" LBAFU "]\n",
- __func__, "Write failed, block #",
- blk, blks);
- info->mssg("flash write failure", response);
+ blks = write_sparse_chunk_raw(info, blk, blkcnt,
+ data, response);
+ if (blks < 0)
return -1;
- }
+
blk += blks;
bytes_written += ((u64)blkcnt) * info->blksz;
total_blocks += chunk_header->chunk_sz;
--
2.17.1
[PATCH] drivers: musb_gadget: Save endpoint desc to usb_ep->desc
From: qianfan Zhao Fix fastboot flash bug. If the downloading file size is equal to the partition size, "fastboot flash" can't work, at least in sunxi platform, because used an uninitalized point: ep->desc. Reproduce: fastboot flash loader1 spl/sunxi-spl.bin. Signed-off-by: qianfan Zhao --- drivers/usb/musb-new/musb_gadget.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/musb-new/musb_gadget.c b/drivers/usb/musb-new/musb_gadget.c index 5b149dac6d..12d9911ecd 100644 --- a/drivers/usb/musb-new/musb_gadget.c +++ b/drivers/usb/musb-new/musb_gadget.c @@ -1188,6 +1188,7 @@ static int musb_gadget_enable(struct usb_ep *ep, } else musb_ep->dma = NULL; + musb_ep->end_point.desc = desc; musb_ep->desc = desc; musb_ep->busy = 0; musb_ep->wedged = 0; -- 2.17.1
[v2, PATCH] lib: sparse: Make CHUNK_TYPE_RAW buffer aligned
From: qianfan Zhao
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Misaligned operation at range [8428, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]
Fix it
Signed-off-by: qianfan Zhao
---
lib/image-sparse.c | 39 ++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/lib/image-sparse.c b/lib/image-sparse.c
index d80fdbbf58..07aa3dd6ba 100644
--- a/lib/image-sparse.c
+++ b/lib/image-sparse.c
@@ -49,6 +49,41 @@
static void default_log(const char *ignored, char *response) {}
+static lbaint_t write_sparse_chunk_raw(struct sparse_storage *info,
+ lbaint_t blk, lbaint_t blkcnt,
+ void *data,
+ char *response)
+{
+ lbaint_t n, write_blks, blks = 0, aligned_buf_blks = 100;
+ uint32_t *aligned_buf = NULL;
+
+ if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
+ return info->write(info, blk, blkcnt, data);
+
+ aligned_buf = memalign(ARCH_DMA_MINALIGN, info->blksz *
aligned_buf_blks);
+ if (!aligned_buf) {
+ info->mssg("Malloc failed for: CHUNK_TYPE_RAW", response);
+ return -ENOMEM;
+ }
+
+ while (blkcnt > 0) {
+ n = min(aligned_buf_blks, blkcnt);
+ memcpy(aligned_buf, data, n * info->blksz);
+
+ /* write_blks might be > n due to NAND bad-blocks */
+ write_blks = info->write(info, blk + blks, n, aligned_buf);
+ blks += write_blks;
+ if (write_blks < n)
+ break;
+
+ data += n * info->blksz;
+ blkcnt -= n;
+ }
+
+ free(aligned_buf);
+ return blks;
+}
+
int write_sparse_image(struct sparse_storage *info,
const char *part_name, void *data, char *response)
{
@@ -152,7 +187,9 @@ int write_sparse_image(struct sparse_storage *info,
return -1;
}
- blks = info->write(info, blk, blkcnt, data);
+ blks = write_sparse_chunk_raw(info, blk, blkcnt,
+ data, response);
+
/* blks might be > blkcnt (eg. NAND bad-blocks) */
if (blks < blkcnt) {
printf("%s: %s" LBAFU " [" LBAFU "]\n",
--
2.17.1
[PATCH] lib: sparse: Make CHUNK_TYPE_RAW buffer aligned
From: qianfan Zhao
CHUNK_TYPE_RAW buffer is not aligned, and flash sparse images by
fastboot will report "Misaligned operation" if DCACHE is enabled.
Flashing Sparse Image
CACHE: Misaligned operation at range [8428, 84001028]
CACHE: Misaligned operation at range [84001034, 84002034]
CACHE: Misaligned operation at range [8401104c, 8401304c]
Fix it
Signed-off-by: qianfan Zhao
---
lib/image-sparse.c | 46 +-
1 file changed, 45 insertions(+), 1 deletion(-)
diff --git a/lib/image-sparse.c b/lib/image-sparse.c
index d80fdbbf58..1c621cd685 100644
--- a/lib/image-sparse.c
+++ b/lib/image-sparse.c
@@ -49,6 +49,48 @@
static void default_log(const char *ignored, char *response) {}
+static lbaint_t write_sparse_chunk_raw(struct sparse_storage *info,
+ lbaint_t blk, lbaint_t blkcnt,
+ void *data,
+ char *response)
+{
+#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
+ lbaint_t n, blks = 0, aligned_buf_blks = 100;
+ uint32_t *aligned_buf = NULL;
+
+ while (blkcnt > 0) {
+ aligned_buf = (uint32_t *)
+ memalign(ARCH_DMA_MINALIGN,
+ ROUNDUP(
+ info->blksz * aligned_buf_blks,
+ ARCH_DMA_MINALIGN));
+ if (!aligned_buf) {
+ info->mssg("Malloc failed for: CHUNK_TYPE_RAW",
+ response);
+ return -1;
+ }
+
+ n = min(aligned_buf_blks, blkcnt);
+ memcpy(aligned_buf, data, n * info->blksz);
+
+ if (info->write(info, blk + blks, n, aligned_buf) != n) {
+ free(aligned_buf);
+ return n + blks;
+ }
+
+ free(aligned_buf);
+
+ data += n * info->blksz;
+ blkcnt -= n;
+ blks += n;
+ }
+
+ return blks;
+#else
+ return info->write(info, blk, blkcnt, data);
+#endif
+}
+
int write_sparse_image(struct sparse_storage *info,
const char *part_name, void *data, char *response)
{
@@ -152,7 +194,9 @@ int write_sparse_image(struct sparse_storage *info,
return -1;
}
- blks = info->write(info, blk, blkcnt, data);
+ blks = write_sparse_chunk_raw(info, blk, blkcnt,
+ data, response);
+
/* blks might be > blkcnt (eg. NAND bad-blocks) */
if (blks < blkcnt) {
printf("%s: %s" LBAFU " [" LBAFU "]\n",
--
2.17.1
[PATCH] board: myir_6ulx: Use DCD to init DRAM instead of SPL
From: qianfan Zhao The work of SPL did is init DRAM, which can be replaced with DCD scripts. This is very helpful to start u-boot directly through USB. Signed-off-by: qianfan Zhao --- arch/arm/mach-imx/mx6/Kconfig| 1 + board/myir/mys_6ulx/Kconfig | 3 + board/myir/mys_6ulx/imximage.cfg | 115 +++ configs/myir_mys_6ulx_defconfig | 11 --- 4 files changed, 119 insertions(+), 11 deletions(-) create mode 100644 board/myir/mys_6ulx/imximage.cfg diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index ee73006ae8..881d1d9c91 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -673,6 +673,7 @@ source "board/softing/vining_2000/Kconfig" source "board/liebherr/display5/Kconfig" source "board/liebherr/mccmon6/Kconfig" source "board/logicpd/imx6/Kconfig" +source "board/myir/mys_6ulx/Kconfig" source "board/solidrun/mx6cuboxi/Kconfig" source "board/somlabs/visionsom-6ull/Kconfig" source "board/technexion/pico-imx6/Kconfig" diff --git a/board/myir/mys_6ulx/Kconfig b/board/myir/mys_6ulx/Kconfig index cbf72c6eca..4b62053062 100644 --- a/board/myir/mys_6ulx/Kconfig +++ b/board/myir/mys_6ulx/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "mys_6ulx" +config IMX_CONFIG + default "board/myir/mys_6ulx/imximage.cfg" + endif diff --git a/board/myir/mys_6ulx/imximage.cfg b/board/myir/mys_6ulx/imximage.cfg new file mode 100644 index 00..8513da2c05 --- /dev/null +++ b/board/myir/mys_6ulx/imximage.cfg @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * + * Refer doc/imx/mkimage/imximage.txt for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +#define __ASSEMBLY__ +#include + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi/sd/nand/onenand, qspi/nor + */ + +#ifdef CONFIG_QSPI_BOOT +BOOT_FROM qspi +#elif defined(CONFIG_NOR_BOOT) +BOOT_FROM nor +#else +BOOT_FROM sd +#endif + +#ifdef CONFIG_USE_IMXIMG_PLUGIN +/*PLUGINplugin-binary-fileIRAM_FREE_START_ADDR*/ +PLUGIN board/freescale/mx6ullevk/plugin.bin 0x00907000 +#else + +#ifdef CONFIG_IMX_HAB +CSF CONFIG_CSF_SIZE +#endif + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type AddressValue + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* Enable all clocks */ +DATA 4 0x020c4068 0x +DATA 4 0x020c406c 0x +DATA 4 0x020c4070 0x +DATA 4 0x020c4074 0x +DATA 4 0x020c4078 0x +DATA 4 0x020c407c 0x +DATA 4 0x020c4080 0x + +DATA 4 0x020e04b4 0x000C +DATA 4 0x020e04ac 0x +DATA 4 0x020e027c 0x0030 +DATA 4 0x020e0250 0x0030 +DATA 4 0x020e024c 0x0030 +DATA 4 0x020e0490 0x0030 +DATA 4 0x020e0288 0x000C0030 +DATA 4 0x020e0270 0x +DATA 4 0x020e0260 0x0030 +DATA 4 0x020e0264 0x0030 +DATA 4 0x020e04a0 0x0030 +DATA 4 0x020e0494 0x0002 +DATA 4 0x020e0280 0x0030 +DATA 4 0x020e0284 0x0030 +DATA 4 0x020e04b0 0x0002 +DATA 4 0x020e0498 0x0030 +DATA 4 0x020e04a4 0x0030 +DATA 4 0x020e0244 0x0030 +DATA 4 0x020e0248 0x0030 +DATA 4 0x021b001c 0x8000 +DATA 4 0x021b0800 0xA1390003 +DATA 4 0x021b080c 0x00050005 +DATA 4 0x021b083c 0x01400140 +DATA 4 0x021b0848 0x4040363A +DATA 4 0x021b0850 0x40403028 +DATA 4 0x021b081c 0x +DATA 4 0x021b0820 0x +DATA 4 0x021b082c 0xF333 +DATA 4 0x021b0830 0xF333 +DATA 4 0x021b08c0 0x00944009 +DATA 4 0x021b08b8 0x0800 +DATA 4 0x021b0004 0x0002002D +DATA 4 0x021b0008 0x1B333030 +DATA 4 0x021b000c 0x3F4352F3 +DATA 4 0x021b0010 0xB66D0B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00211740 +DATA 4 0x021b001c 0x8000 +DATA 4 0x021b002c 0x26D2 +DATA 4 0x021b0030 0x00431023 +DATA 4 0x021b0040 0x0047 +DATA 4 0x021b 0x8318 +DATA 4 0x021b0890 0x0040 +DATA 4 0x021b001c 0x02008032 +DATA 4 0x021b001c 0x8033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x15208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x7800 +DATA 4 0x021b0818 0x0227 +DATA 4 0x021b0004 0x0002552D +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x + +#endif diff --git a/configs/myir_mys_6ulx_defconfig b/configs/myir_mys_6ulx_defconfig index 5f140a54b7..1af886343c 100644 --- a/configs/myir_mys_6ulx_defconfig +++ b/configs/myir_mys_6ulx_defconfig @@ -1,8 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_SYS_TEXT_BASE=0x8780 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=8 CONFIG_SYS_MEMTEST_START=0x8000 CONFIG_SYS_MEMTEST_END=0x9000 @@ -11,20 +9,11 @@ CONFIG_MX6ULL=y CONFIG_TARGET_MYS_6ULX=y CONFI
[PATCH] driver: gadget: fastboot: Link endpoint and descriptors
From: qianfan Zhao
If the downloading file size is equal to the partition size, "fastboot
flash" can't work, at least in sunxi platform, because used an
uninitalized point: ep->desc.
Reproduce: fastboot flash loader1 spl/sunxi-spl.bin.
Fix it.
Signed-off-by: qianfan Zhao
---
drivers/usb/gadget/f_fastboot.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c
index 8ba55aab9f..45bb3aba66 100644
--- a/drivers/usb/gadget/f_fastboot.c
+++ b/drivers/usb/gadget/f_fastboot.c
@@ -319,13 +319,13 @@ static int fastboot_set_alt(struct usb_function *f,
struct usb_composite_dev *cdev = f->config->cdev;
struct usb_gadget *gadget = cdev->gadget;
struct f_fastboot *f_fb = func_to_fastboot(f);
- const struct usb_endpoint_descriptor *d;
debug("%s: func: %s intf: %d alt: %d\n",
__func__, f->name, interface, alt);
- d = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out, &ss_ep_out);
- ret = usb_ep_enable(f_fb->out_ep, d);
+ f_fb->out_ep->desc = fb_ep_desc(gadget, &fs_ep_out, &hs_ep_out,
+ &ss_ep_out);
+ ret = usb_ep_enable(f_fb->out_ep, f_fb->out_ep->desc);
if (ret) {
puts("failed to enable out ep\n");
return ret;
@@ -339,8 +339,8 @@ static int fastboot_set_alt(struct usb_function *f,
}
f_fb->out_req->complete = rx_handler_command;
- d = fb_ep_desc(gadget, &fs_ep_in, &hs_ep_in, &ss_ep_in);
- ret = usb_ep_enable(f_fb->in_ep, d);
+ f_fb->in_ep->desc = fb_ep_desc(gadget, &fs_ep_in, &hs_ep_in, &ss_ep_in);
+ ret = usb_ep_enable(f_fb->in_ep, f_fb->in_ep->desc);
if (ret) {
puts("failed to enable in ep\n");
goto err;
--
2.17.1
[PATCH 3/3] sunxi: defconfig: bpi-m2u: Enable usb gadget and ums by default
From: qianfan Zhao Since the usb otg driver support R40 device, we enable usb gadget functions and ums. Signed-off-by: qianfan Zhao --- configs/Bananapi_M2_Ultra_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 37bcb3d7bf..af371702f1 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -7,11 +7,11 @@ CONFIG_MACPWR="PA17" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH23" -CONFIG_USB2_VBUS_PIN="PH23" CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y CONFIG_RGMII=y CONFIG_SUN8I_EMAC=y @@ -20,3 +20,4 @@ CONFIG_AXP_ELDO3_VOLT=1200 CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y -- 2.17.1
[PATCH 2/3] dts: bpi-m2u: Enable USB_OTG by default
From: qianfan Zhao
bpi-m2u has a hardware usb_otg, let's enable it in dts.
Signed-off-by: qianfan Zhao
---
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 5 +
arch/arm/dts/sun8i-r40.dtsi | 14 ++
2 files changed, 19 insertions(+)
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index a6a1087a0c..96316f41cb 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -328,6 +328,11 @@
};
};
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&usbphy {
usb1_vbus-supply = <®_vcc5v0>;
usb2_vbus-supply = <®_vcc5v0>;
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index d5ad3b9efd..3edc849d39 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -363,6 +363,20 @@
#size-cells = <0>;
};
+ usb_otg: usb@1c13000 {
+ compatible = "allwinner,sun8i-h3-musb";
+ reg = <0x01c13000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = ;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ dr_mode = "otg";
+ status = "disabled";
+ };
+
usbphy: phy@1c13400 {
compatible = "allwinner,sun8i-r40-usb-phy";
reg = <0x01c13400 0x14>,
--
2.17.1
[PATCH v2 1/3] phy-sun4i-usb: Fix sun8i_r40_cfg
From: qianfan Zhao
the r40 has the same configurations with a33, disable enable_pmu_unk1 and
phy0_dual_route feature.
Signed-off-by: qianfan Zhao
---
drivers/phy/allwinner/phy-sun4i-usb.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index 5723c98032..5ea05a207d 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -589,8 +589,6 @@ static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
.disc_thresh = 3,
.phyctl_offset = REG_PHYCTL_A33,
.dedicated_clocks = true,
- .enable_pmu_unk1 = true,
- .phy0_dual_route = true,
};
static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
--
2.17.1
[PATCH 1/4] phy-sun4i-usb: Fix sun8i_r40_cfg
From: qianfan Zhao
The address of sun8i_r40's phyctrl is 0x01c13404, also fixed
enable_pmu and dual_route.
Signed-off-by: qianfan Zhao
---
drivers/phy/allwinner/phy-sun4i-usb.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index 5723c98032..608ba46242 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -587,10 +587,10 @@ static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
.num_phys = 3,
.type = sun8i_r40_phy,
.disc_thresh = 3,
- .phyctl_offset = REG_PHYCTL_A33,
+ .phyctl_offset = REG_PHYCTL_A10,
.dedicated_clocks = true,
- .enable_pmu_unk1 = true,
- .phy0_dual_route = true,
+ .enable_pmu_unk1 = false,
+ .phy0_dual_route = false,
};
static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
--
2.17.1
[PATCH 3/4] dts: bpi-m2u: Enable USB_OTG by default
From: qianfan Zhao
bpi-m2u has a hardware usb_otg, let's enable it in dts.
Signed-off-by: qianfan Zhao
---
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts | 4
arch/arm/dts/sun8i-r40.dtsi | 13 +
2 files changed, 17 insertions(+)
diff --git a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
index a6a1087a0c..828ddc63ae 100644
--- a/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -117,6 +117,10 @@
status = "okay";
};
+&usb_otg {
+ status = "okay";
+};
+
&ehci1 {
status = "okay";
};
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi
index d5ad3b9efd..7c7a9cd9f8 100644
--- a/arch/arm/dts/sun8i-r40.dtsi
+++ b/arch/arm/dts/sun8i-r40.dtsi
@@ -363,6 +363,19 @@
#size-cells = <0>;
};
+ usb_otg: usb@1c13000 {
+ compatible = "allwinner,sun8i-r40-musb";
+ reg = <0x01c13000 0x0400>;
+ clocks = <&ccu CLK_BUS_OTG>;
+ resets = <&ccu RST_BUS_OTG>;
+ interrupts = ;
+ interrupt-names = "mc";
+ phys = <&usbphy 0>;
+ phy-names = "usb";
+ extcon = <&usbphy 0>;
+ status = "disabled";
+ };
+
usbphy: phy@1c13400 {
compatible = "allwinner,sun8i-r40-usb-phy";
reg = <0x01c13400 0x14>,
--
2.17.1
[PATCH 2/4] sunxi_musb: Add musb configurations of sun8i-r40
From: qianfan Zhao
R40 has 8 user-configurable endpoints and 8KB FIFO for EPs.
Signed-off-by: qianfan Zhao
---
drivers/usb/musb-new/sunxi.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index fea4105f3d..e03299ea5b 100644
--- a/drivers/usb/musb-new/sunxi.c
+++ b/drivers/usb/musb-new/sunxi.c
@@ -263,7 +263,6 @@ static int sunxi_musb_enable(struct musb *musb)
}
USBC_ForceVbusValidToHigh(musb->mregs);
-
enabled = true;
return 0;
}
@@ -438,6 +437,30 @@ static struct musb_hdrc_config musb_config_h3 = {
.ram_bits = SUNXI_MUSB_RAM_BITS,
};
+/* R40/A40 OTG supports only 4 endpoints */
+#define SUNXI_MUSB_MAX_EP_NUM_R40 5
+
+static struct musb_fifo_cfg sunxi_musb_mode_cfg_r40[] = {
+ MUSB_EP_FIFO_SINGLE(1, FIFO_TX, 512),
+ MUSB_EP_FIFO_SINGLE(1, FIFO_RX, 512),
+ MUSB_EP_FIFO_SINGLE(2, FIFO_TX, 512),
+ MUSB_EP_FIFO_SINGLE(2, FIFO_RX, 512),
+ MUSB_EP_FIFO_SINGLE(3, FIFO_TX, 512),
+ MUSB_EP_FIFO_SINGLE(3, FIFO_RX, 512),
+ MUSB_EP_FIFO_SINGLE(4, FIFO_TX, 512),
+ MUSB_EP_FIFO_SINGLE(4, FIFO_RX, 512),
+};
+
+static struct musb_hdrc_config musb_config_r40 = {
+ .fifo_cfg = sunxi_musb_mode_cfg_r40,
+ .fifo_cfg_size = ARRAY_SIZE(sunxi_musb_mode_cfg_r40),
+ .multipoint = true,
+ .dyn_fifo = true,
+ .soft_con = true,
+ .num_eps= SUNXI_MUSB_MAX_EP_NUM_R40,
+ .ram_bits = SUNXI_MUSB_RAM_BITS,
+};
+
static int musb_usb_probe(struct udevice *dev)
{
struct sunxi_glue *glue = dev_get_priv(dev);
@@ -527,6 +550,10 @@ static const struct sunxi_musb_config sun8i_h3_cfg = {
.config = &musb_config_h3,
};
+static const struct sunxi_musb_config sun8i_r40_cfg = {
+ .config = &musb_config_r40,
+};
+
static const struct udevice_id sunxi_musb_ids[] = {
{ .compatible = "allwinner,sun4i-a10-musb",
.data = (ulong)&sun4i_a10_cfg },
@@ -536,6 +563,8 @@ static const struct udevice_id sunxi_musb_ids[] = {
.data = (ulong)&sun6i_a31_cfg },
{ .compatible = "allwinner,sun8i-h3-musb",
.data = (ulong)&sun8i_h3_cfg },
+ { .compatible = "allwinner,sun8i-r40-musb",
+ .data = (ulong)&sun8i_r40_cfg },
{ }
};
--
2.17.1
[PATCH 4/4] sunxi: defconfig: bpi-m2u: Enable usb gadget and ums by default
From: qianfan Zhao Since the usb otg driver support R40 device, we enable usb gadget functions and ums. Signed-off-by: qianfan Zhao --- configs/Bananapi_M2_Ultra_defconfig | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig index 37bcb3d7bf..a0869d56ae 100644 --- a/configs/Bananapi_M2_Ultra_defconfig +++ b/configs/Bananapi_M2_Ultra_defconfig @@ -7,12 +7,13 @@ CONFIG_MACPWR="PA17" CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PH23" -CONFIG_USB2_VBUS_PIN="PH23" CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y +CONFIG_CMD_USB_MASS_STORAGE=y CONFIG_SCSI_AHCI=y +# CONFIG_USB_FUNCTION_FASTBOOT is not set CONFIG_RGMII=y CONFIG_SUN8I_EMAC=y CONFIG_AXP_DLDO4_VOLT=2500 @@ -20,3 +21,5 @@ CONFIG_AXP_ELDO3_VOLT=1200 CONFIG_SCSI=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_OHCI_HCD=y +CONFIG_USB_MUSB_GADGET=y +CONFIG_USB_GADGET_DOWNLOAD=y -- 2.17.1
