Re: [PATCH] riscv: Remove unnecessary instruction

2020-02-02 Thread Bin Meng
On Tue, Jan 28, 2020 at 5:39 AM Sean Anderson  wrote:
>
> The add instruction on risc-v can have any three sources and targets, so there
> is no need for an intermediate mov.
>
> Signed-off-by: Sean Anderson 
> ---
>  arch/riscv/cpu/start.S | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>

Reviewed-by: Bin Meng 


Re: [PATCH] riscv: Remove unnecessary instruction

2020-01-29 Thread Rick Chen
> From: Sean Anderson [mailto:sean...@gmail.com]
> Sent: Tuesday, January 28, 2020 5:40 AM
> To: U-Boot Mailing List
> Cc: Bin Meng; Lukas Auer; anup.pa...@wdc.com; Rick Jian-Zhi Chen(陳建志)
> Subject: [PATCH] riscv: Remove unnecessary instruction
>
> The add instruction on risc-v can have any three sources and targets, so 
> there is no need for an intermediate mov.
>
> Signed-off-by: Sean Anderson 

Reviewed-by: Rick Chen 

> ---
>  arch/riscv/cpu/start.S | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 
> 1a55b7d570..365163ad19 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -359,9 +359,8 @@ relocate_secondary_harts:
>  call_board_init_r:
> jal invalidate_icache_all
> jal flush_dcache_all
> -   la  t0, board_init_r
> -   mv  t4, t0  /* offset of board_init_r() */
> -   add t4, t4, t6  /* real address of board_init_r() */
> +   la  t0, board_init_r/* offset of board_init_r() */
> +   add t4, t0, t6  /* real address of board_init_r() */
>  /*
>   * setup parameters for board_init_r
>   */
> --


[PATCH] riscv: Remove unnecessary instruction

2020-01-27 Thread Sean Anderson
The add instruction on risc-v can have any three sources and targets, so there
is no need for an intermediate mov.

Signed-off-by: Sean Anderson 
---
 arch/riscv/cpu/start.S | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
index 1a55b7d570..365163ad19 100644
--- a/arch/riscv/cpu/start.S
+++ b/arch/riscv/cpu/start.S
@@ -359,9 +359,8 @@ relocate_secondary_harts:
 call_board_init_r:
jal invalidate_icache_all
jal flush_dcache_all
-   la  t0, board_init_r
-   mv  t4, t0  /* offset of board_init_r() */
-   add t4, t4, t6  /* real address of board_init_r() */
+   la  t0, board_init_r/* offset of board_init_r() */
+   add t4, t0, t6  /* real address of board_init_r() */
 /*
  * setup parameters for board_init_r
  */
-- 
2.25.0