Re: [PATCH v2] arm: dts: ti: k3-am64-main: Add RTI watchdog nodes

2022-11-04 Thread Christian Gmeiner 
Am Do., 3. Nov. 2022 um 18:24 Uhr schrieb Tom Rini :
>
> On Thu, Nov 03, 2022 at 12:27:39AM -0500, Nishanth Menon wrote:
> > On 13:15-20221026, Christian Gmeiner wrote:
> > > Add the needed bus mappings for the two main RTI memory ranges and
> > > the required device tree nodes in the main domain.
> > >
> > > Same as kernel commit 6dd8457dc20693e2ba9054c171499b22664fd4e7
> > >
> > > Signed-off-by: Christian Gmeiner 
> > > ---
> > >  arch/arm/dts/k3-am64-main.dtsi | 18 ++
> > >  arch/arm/dts/k3-am64.dtsi  |  2 ++
> > >  2 files changed, 20 insertions(+)
> > >
> > > diff --git a/arch/arm/dts/k3-am64-main.dtsi 
> > > b/arch/arm/dts/k3-am64-main.dtsi
> > > index 02c3fdf9cc..57b0f53ac9 100644
> > > --- a/arch/arm/dts/k3-am64-main.dtsi
> > > +++ b/arch/arm/dts/k3-am64-main.dtsi
> > > @@ -859,4 +859,22 @@
> > > clock-names = "fck";
> > > max-functions = /bits/ 8 <1>;
> > > };
> > > +
> > > +   main_rti0: watchdog@e00 {
> > > +   compatible = "ti,j7-rti-wdt";
> > > +   reg = <0x00 0xe00 0x00 0x100>;
> > > +   clocks = <_clks 125 0>;
> > > +   power-domains = <_pds 125 TI_SCI_PD_EXCLUSIVE>;
> > > +   assigned-clocks = <_clks 125 0>;
> > > +   assigned-clock-parents = <_clks 125 2>;
> > > +   };
> > > +
> > > +   main_rti1: watchdog@e01 {
> > > +   compatible = "ti,j7-rti-wdt";
> > > +   reg = <0x00 0xe01 0x00 0x100>;
> > > +   clocks = <_clks 126 0>;
> > > +   power-domains = <_pds 126 TI_SCI_PD_EXCLUSIVE>;
> > > +   assigned-clocks = <_clks 126 0>;
> > > +   assigned-clock-parents = <_clks 126 2>;
> > > +   };
> > >  };
> > > diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
> > > index 7aa94d5a6e..053e7f42e9 100644
> > > --- a/arch/arm/dts/k3-am64.dtsi
> > > +++ b/arch/arm/dts/k3-am64.dtsi
> > > @@ -70,6 +70,8 @@
> > >  <0x00 0x0100 0x00 0x0100 0x00 0x02330400>, 
> > > /* First peripheral window */
> > >  <0x00 0x0800 0x00 0x0800 0x00 0x0020>, 
> > > /* Main CPSW */
> > >  <0x00 0x0d00 0x00 0x0d00 0x00 0x0080>, 
> > > /* PCIE_CORE */
> > > +<0x00 0x0e00 0x00 0x0e00 0x00 0x0100>, 
> > > /* Main RTI0 */
> > > +<0x00 0x0e01 0x00 0x0e01 0x00 0x0100>, 
> > > /* Main RTI1 */
> > >  <0x00 0x0f00 0x00 0x0f00 0x00 0x00c44200>, 
> > > /* Second peripheral window */
> > >  <0x00 0x2000 0x00 0x2000 0x00 0x0a008000>, 
> > > /* Third peripheral window */
> > >  <0x00 0x3000 0x00 0x3000 0x00 0x000bc100>, 
> > > /* ICSSG0/1 */
> > > --
> > > 2.37.3
> > >
> > As I responded to
> > https://lore.kernel.org/u-boot/20221103052101.l77rsp4siutbe72n@scientist/
> > as well..
> >
> > I think we need to sync upstream kernel dts back into u-boot -> we will end 
> > up
> > having more of these cherry-pick cases otherwise.
>
> Sorry, I had this queued up to merge and missed this email.  How would
> you like to proceed?

I want to see this change in the next U-Boot version. So let's drop my
change here and hope TI mangeses to
come up with the kernel -> U-Boot dts sync patch soon.

-- 
greets
--
Christian Gmeiner, MSc

https://christian-gmeiner.info/privacypolicy

Re: [PATCH v2] arm: dts: ti: k3-am64-main: Add RTI watchdog nodes

2022-11-03 Thread Tom Rini 
On Thu, Nov 03, 2022 at 12:27:39AM -0500, Nishanth Menon wrote:
> On 13:15-20221026, Christian Gmeiner wrote:
> > Add the needed bus mappings for the two main RTI memory ranges and
> > the required device tree nodes in the main domain.
> > 
> > Same as kernel commit 6dd8457dc20693e2ba9054c171499b22664fd4e7
> > 
> > Signed-off-by: Christian Gmeiner 
> > ---
> >  arch/arm/dts/k3-am64-main.dtsi | 18 ++
> >  arch/arm/dts/k3-am64.dtsi  |  2 ++
> >  2 files changed, 20 insertions(+)
> > 
> > diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
> > index 02c3fdf9cc..57b0f53ac9 100644
> > --- a/arch/arm/dts/k3-am64-main.dtsi
> > +++ b/arch/arm/dts/k3-am64-main.dtsi
> > @@ -859,4 +859,22 @@
> > clock-names = "fck";
> > max-functions = /bits/ 8 <1>;
> > };
> > +
> > +   main_rti0: watchdog@e00 {
> > +   compatible = "ti,j7-rti-wdt";
> > +   reg = <0x00 0xe00 0x00 0x100>;
> > +   clocks = <_clks 125 0>;
> > +   power-domains = <_pds 125 TI_SCI_PD_EXCLUSIVE>;
> > +   assigned-clocks = <_clks 125 0>;
> > +   assigned-clock-parents = <_clks 125 2>;
> > +   };
> > +
> > +   main_rti1: watchdog@e01 {
> > +   compatible = "ti,j7-rti-wdt";
> > +   reg = <0x00 0xe01 0x00 0x100>;
> > +   clocks = <_clks 126 0>;
> > +   power-domains = <_pds 126 TI_SCI_PD_EXCLUSIVE>;
> > +   assigned-clocks = <_clks 126 0>;
> > +   assigned-clock-parents = <_clks 126 2>;
> > +   };
> >  };
> > diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
> > index 7aa94d5a6e..053e7f42e9 100644
> > --- a/arch/arm/dts/k3-am64.dtsi
> > +++ b/arch/arm/dts/k3-am64.dtsi
> > @@ -70,6 +70,8 @@
> >  <0x00 0x0100 0x00 0x0100 0x00 0x02330400>, /* 
> > First peripheral window */
> >  <0x00 0x0800 0x00 0x0800 0x00 0x0020>, /* 
> > Main CPSW */
> >  <0x00 0x0d00 0x00 0x0d00 0x00 0x0080>, /* 
> > PCIE_CORE */
> > +<0x00 0x0e00 0x00 0x0e00 0x00 0x0100>, /* 
> > Main RTI0 */
> > +<0x00 0x0e01 0x00 0x0e01 0x00 0x0100>, /* 
> > Main RTI1 */
> >  <0x00 0x0f00 0x00 0x0f00 0x00 0x00c44200>, /* 
> > Second peripheral window */
> >  <0x00 0x2000 0x00 0x2000 0x00 0x0a008000>, /* 
> > Third peripheral window */
> >  <0x00 0x3000 0x00 0x3000 0x00 0x000bc100>, /* 
> > ICSSG0/1 */
> > -- 
> > 2.37.3
> > 
> As I responded to
> https://lore.kernel.org/u-boot/20221103052101.l77rsp4siutbe72n@scientist/
> as well..
> 
> I think we need to sync upstream kernel dts back into u-boot -> we will end up
> having more of these cherry-pick cases otherwise.

Sorry, I had this queued up to merge and missed this email.  How would
you like to proceed?

-- 
Tom


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Re: [PATCH v2] arm: dts: ti: k3-am64-main: Add RTI watchdog nodes

2022-11-03 Thread Tom Rini 
On Wed, Oct 26, 2022 at 01:15:55PM +0200, Christian Gmeiner wrote:

> Add the needed bus mappings for the two main RTI memory ranges and
> the required device tree nodes in the main domain.
> 
> Same as kernel commit 6dd8457dc20693e2ba9054c171499b22664fd4e7
> 
> Signed-off-by: Christian Gmeiner 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH v2] arm: dts: ti: k3-am64-main: Add RTI watchdog nodes

2022-11-02 Thread Nishanth Menon 
On 13:15-20221026, Christian Gmeiner wrote:
> Add the needed bus mappings for the two main RTI memory ranges and
> the required device tree nodes in the main domain.
> 
> Same as kernel commit 6dd8457dc20693e2ba9054c171499b22664fd4e7
> 
> Signed-off-by: Christian Gmeiner 
> ---
>  arch/arm/dts/k3-am64-main.dtsi | 18 ++
>  arch/arm/dts/k3-am64.dtsi  |  2 ++
>  2 files changed, 20 insertions(+)
> 
> diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
> index 02c3fdf9cc..57b0f53ac9 100644
> --- a/arch/arm/dts/k3-am64-main.dtsi
> +++ b/arch/arm/dts/k3-am64-main.dtsi
> @@ -859,4 +859,22 @@
>   clock-names = "fck";
>   max-functions = /bits/ 8 <1>;
>   };
> +
> + main_rti0: watchdog@e00 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0xe00 0x00 0x100>;
> + clocks = <_clks 125 0>;
> + power-domains = <_pds 125 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <_clks 125 0>;
> + assigned-clock-parents = <_clks 125 2>;
> + };
> +
> + main_rti1: watchdog@e01 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0xe01 0x00 0x100>;
> + clocks = <_clks 126 0>;
> + power-domains = <_pds 126 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <_clks 126 0>;
> + assigned-clock-parents = <_clks 126 2>;
> + };
>  };
> diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
> index 7aa94d5a6e..053e7f42e9 100644
> --- a/arch/arm/dts/k3-am64.dtsi
> +++ b/arch/arm/dts/k3-am64.dtsi
> @@ -70,6 +70,8 @@
><0x00 0x0100 0x00 0x0100 0x00 0x02330400>, /* 
> First peripheral window */
><0x00 0x0800 0x00 0x0800 0x00 0x0020>, /* 
> Main CPSW */
><0x00 0x0d00 0x00 0x0d00 0x00 0x0080>, /* 
> PCIE_CORE */
> +  <0x00 0x0e00 0x00 0x0e00 0x00 0x0100>, /* 
> Main RTI0 */
> +  <0x00 0x0e01 0x00 0x0e01 0x00 0x0100>, /* 
> Main RTI1 */
><0x00 0x0f00 0x00 0x0f00 0x00 0x00c44200>, /* 
> Second peripheral window */
><0x00 0x2000 0x00 0x2000 0x00 0x0a008000>, /* 
> Third peripheral window */
><0x00 0x3000 0x00 0x3000 0x00 0x000bc100>, /* 
> ICSSG0/1 */
> -- 
> 2.37.3
> 
As I responded to
https://lore.kernel.org/u-boot/20221103052101.l77rsp4siutbe72n@scientist/
as well..

I think we need to sync upstream kernel dts back into u-boot -> we will end up
having more of these cherry-pick cases otherwise.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 
849D 1736 249D

[PATCH v2] arm: dts: ti: k3-am64-main: Add RTI watchdog nodes

2022-10-26 Thread Christian Gmeiner 
Add the needed bus mappings for the two main RTI memory ranges and
the required device tree nodes in the main domain.

Same as kernel commit 6dd8457dc20693e2ba9054c171499b22664fd4e7

Signed-off-by: Christian Gmeiner 
---
 arch/arm/dts/k3-am64-main.dtsi | 18 ++
 arch/arm/dts/k3-am64.dtsi  |  2 ++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm/dts/k3-am64-main.dtsi b/arch/arm/dts/k3-am64-main.dtsi
index 02c3fdf9cc..57b0f53ac9 100644
--- a/arch/arm/dts/k3-am64-main.dtsi
+++ b/arch/arm/dts/k3-am64-main.dtsi
@@ -859,4 +859,22 @@
clock-names = "fck";
max-functions = /bits/ 8 <1>;
};
+
+   main_rti0: watchdog@e00 {
+   compatible = "ti,j7-rti-wdt";
+   reg = <0x00 0xe00 0x00 0x100>;
+   clocks = <_clks 125 0>;
+   power-domains = <_pds 125 TI_SCI_PD_EXCLUSIVE>;
+   assigned-clocks = <_clks 125 0>;
+   assigned-clock-parents = <_clks 125 2>;
+   };
+
+   main_rti1: watchdog@e01 {
+   compatible = "ti,j7-rti-wdt";
+   reg = <0x00 0xe01 0x00 0x100>;
+   clocks = <_clks 126 0>;
+   power-domains = <_pds 126 TI_SCI_PD_EXCLUSIVE>;
+   assigned-clocks = <_clks 126 0>;
+   assigned-clock-parents = <_clks 126 2>;
+   };
 };
diff --git a/arch/arm/dts/k3-am64.dtsi b/arch/arm/dts/k3-am64.dtsi
index 7aa94d5a6e..053e7f42e9 100644
--- a/arch/arm/dts/k3-am64.dtsi
+++ b/arch/arm/dts/k3-am64.dtsi
@@ -70,6 +70,8 @@
 <0x00 0x0100 0x00 0x0100 0x00 0x02330400>, /* 
First peripheral window */
 <0x00 0x0800 0x00 0x0800 0x00 0x0020>, /* 
Main CPSW */
 <0x00 0x0d00 0x00 0x0d00 0x00 0x0080>, /* 
PCIE_CORE */
+<0x00 0x0e00 0x00 0x0e00 0x00 0x0100>, /* 
Main RTI0 */
+<0x00 0x0e01 0x00 0x0e01 0x00 0x0100>, /* 
Main RTI1 */
 <0x00 0x0f00 0x00 0x0f00 0x00 0x00c44200>, /* 
Second peripheral window */
 <0x00 0x2000 0x00 0x2000 0x00 0x0a008000>, /* 
Third peripheral window */
 <0x00 0x3000 0x00 0x3000 0x00 0x000bc100>, /* 
ICSSG0/1 */
-- 
2.37.3