Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
On Tue, Sep 4, 2018 at 6:20 PM, Fabio Estevam wrote: > On Tue, Sep 4, 2018 at 9:41 AM, Michael Nazzareno Trimarchi > wrote: > >> Well, yes and no. Not all the bits can be writable according to the >> documentation if I remember and if the value you >> put are the value after reset and if I remember are all the clock on, >> you need to explain better you you write them. > > 0x is the value of the CCGR registers after power on reset. > > It is true that some fields are marked as "reserved", but I don't see > the issue in writing '11' to them since this is the POR value. I'm just commenting since Stefano did mention the similar this [1] previously. may be he can found any random problem with setting up all 11's [1] https://lists.denx.de/pipermail/u-boot/2017-January/279566.html ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi On Tue, Sep 4, 2018 at 2:56 PM Fabio Estevam wrote: > > Hi Michael, > > On Tue, Sep 4, 2018 at 9:53 AM, Michael Nazzareno Trimarchi > wrote: > > > Ok, if you resend with the change discussed I'm fine with it. The reason > > that > > I'm trying to make much clean is just because I get random problem in the > > past > > just for few bits ;) > > Sorry, I am not sure what exactly you want me to do differently in v2. > > Please clarify. I miss v2 ;), I think Michael -- | Michael Nazzareno Trimarchi Amarula Solutions BV | | COO - Founder Cruquiuskade 47 | | +31(0)851119172 Amsterdam 1018 AM NL | | [`as] http://www.amarulasolutions.com | ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi Michael, On Tue, Sep 4, 2018 at 9:53 AM, Michael Nazzareno Trimarchi wrote: > Ok, if you resend with the change discussed I'm fine with it. The reason that > I'm trying to make much clean is just because I get random problem in the past > just for few bits ;) Sorry, I am not sure what exactly you want me to do differently in v2. Please clarify. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi Fabio On Tue, Sep 4, 2018 at 2:50 PM Fabio Estevam wrote: > > On Tue, Sep 4, 2018 at 9:41 AM, Michael Nazzareno Trimarchi > wrote: > > > Well, yes and no. Not all the bits can be writable according to the > > documentation if I remember and if the value you > > put are the value after reset and if I remember are all the clock on, > > you need to explain better you you write them. > > 0x is the value of the CCGR registers after power on reset. > > It is true that some fields are marked as "reserved", but I don't see > the issue in writing '11' to them since this is the POR value. > > Again, I am not doing anything different than the DCD table in this aspect. Ok, if you resend with the change discussed I'm fine with it. The reason that I'm trying to make much clean is just because I get random problem in the past just for few bits ;) Michael -- | Michael Nazzareno Trimarchi Amarula Solutions BV | | COO - Founder Cruquiuskade 47 | | +31(0)851119172 Amsterdam 1018 AM NL | | [`as] http://www.amarulasolutions.com | ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
On Tue, Sep 4, 2018 at 9:41 AM, Michael Nazzareno Trimarchi wrote: > Well, yes and no. Not all the bits can be writable according to the > documentation if I remember and if the value you > put are the value after reset and if I remember are all the clock on, > you need to explain better you you write them. 0x is the value of the CCGR registers after power on reset. It is true that some fields are marked as "reserved", but I don't see the issue in writing '11' to them since this is the POR value. Again, I am not doing anything different than the DCD table in this aspect. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi
On Tue, Sep 4, 2018 at 2:33 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On Mon, Sep 3, 2018 at 10:05 AM, Michael Nazzareno Trimarchi
> wrote:
>
> >> >> +static void ccgr_init(void)
> >> >> +{
> >> >> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> >> >> +
> >> >> + writel(0x, &ccm->CCGR0);
> >> >> + writel(0x, &ccm->CCGR1);
> >> >> + writel(0x, &ccm->CCGR2);
> >> >> + writel(0x, &ccm->CCGR3);
> >> >> + writel(0x, &ccm->CCGR4);
> >> >> + writel(0x, &ccm->CCGR5);
> >> >> + writel(0x, &ccm->CCGR6);
> >> >> + writel(0x, &ccm->CCGR7);
> >
> > are you sure that arrive to 7?
>
> You are right. CCGR7 is not available on mx6ul. I will fix it.
>
> > I think that it's not a good strategy to enable all the gate in general
> > here.
>
> Yes, the main point of this patch is to convert from DCD table to SPL.
>
> As the DCD table enables all the clocks I kept the same approach.
>
> I agree that this can be further improved by only turning on the
> clocks that are used by the bootloader.
Well, yes and no. Not all the bits can be writable according to the
documentation if I remember and if the value you
put are the value after reset and if I remember are all the clock on,
you need to explain better you you write them.
Michael
>
> However this is subject for a separate patch.
>
> Thanks
--
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| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi Michael,
On Mon, Sep 3, 2018 at 10:05 AM, Michael Nazzareno Trimarchi
wrote:
>> >> +static void ccgr_init(void)
>> >> +{
>> >> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
>> >> +
>> >> + writel(0x, &ccm->CCGR0);
>> >> + writel(0x, &ccm->CCGR1);
>> >> + writel(0x, &ccm->CCGR2);
>> >> + writel(0x, &ccm->CCGR3);
>> >> + writel(0x, &ccm->CCGR4);
>> >> + writel(0x, &ccm->CCGR5);
>> >> + writel(0x, &ccm->CCGR6);
>> >> + writel(0x, &ccm->CCGR7);
>
> are you sure that arrive to 7?
You are right. CCGR7 is not available on mx6ul. I will fix it.
> I think that it's not a good strategy to enable all the gate in general here.
Yes, the main point of this patch is to convert from DCD table to SPL.
As the DCD table enables all the clocks I kept the same approach.
I agree that this can be further improved by only turning on the
clocks that are used by the bootloader.
However this is subject for a separate patch.
Thanks
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Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi Fabio
On Mon, Sep 3, 2018 at 3:01 PM Fabio Estevam wrote:
>
> Hi Jagan,
>
> On Sun, Sep 2, 2018 at 3:07 PM, Jagan Teki wrote:
>
> >> --- /dev/null
> >> +++ b/board/technexion/pico-imx6ul/spl.c
> >> @@ -0,0 +1,115 @@
> >> +// SPDX-License-Identifier: GPL-2.0+
> >
> > space
> >
>
> >> +static void ccgr_init(void)
> >> +{
> >> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> >> +
> >> + writel(0x, &ccm->CCGR0);
> >> + writel(0x, &ccm->CCGR1);
> >> + writel(0x, &ccm->CCGR2);
> >> + writel(0x, &ccm->CCGR3);
> >> + writel(0x, &ccm->CCGR4);
> >> + writel(0x, &ccm->CCGR5);
> >> + writel(0x, &ccm->CCGR6);
> >> + writel(0x, &ccm->CCGR7);
are you sure that arrive to 7?
> >
> > These can be know values.
>
> I am sorry, but I did not understand your comments.
>
I think that it's not a good strategy to enable all the gate in general here.
Michael
> Please clarify.
>
> Thanks
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| COO - Founder Cruquiuskade 47 |
| +31(0)851119172 Amsterdam 1018 AM NL |
| [`as] http://www.amarulasolutions.com |
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Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
Hi Jagan,
On Sun, Sep 2, 2018 at 3:07 PM, Jagan Teki wrote:
>> --- /dev/null
>> +++ b/board/technexion/pico-imx6ul/spl.c
>> @@ -0,0 +1,115 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>
> space
>
>> +static void ccgr_init(void)
>> +{
>> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
>> +
>> + writel(0x, &ccm->CCGR0);
>> + writel(0x, &ccm->CCGR1);
>> + writel(0x, &ccm->CCGR2);
>> + writel(0x, &ccm->CCGR3);
>> + writel(0x, &ccm->CCGR4);
>> + writel(0x, &ccm->CCGR5);
>> + writel(0x, &ccm->CCGR6);
>> + writel(0x, &ccm->CCGR7);
>
> These can be know values.
I am sorry, but I did not understand your comments.
Please clarify.
Thanks
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Re: [U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
On Fri, Aug 31, 2018 at 12:40 AM, Otavio Salvador
wrote:
> From: Fabio Estevam
>
> There are two versions of imx6ul pico SOMs: one with 256MB and another
> one with 512MB of RAM.
>
> Convert to SPL so that both versions can be supported.
>
> Currently only the 256MB is tested/supported.
>
> Signed-off-by: Fabio Estevam
> Signed-off-by: Fabio Berton
> Signed-off-by: Otavio Salvador
> ---
>
> arch/arm/mach-imx/mx6/Kconfig | 1 +
> board/technexion/pico-imx6ul/Makefile | 2 +-
> board/technexion/pico-imx6ul/spl.c| 115 ++
> configs/pico-imx6ul_defconfig | 14 +++-
> include/configs/pico-imx6ul.h | 1 +
> 5 files changed, 131 insertions(+), 2 deletions(-)
> create mode 100644 board/technexion/pico-imx6ul/spl.c
>
> diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
> index a2799c436e..06c25bae36 100644
> --- a/arch/arm/mach-imx/mx6/Kconfig
> +++ b/arch/arm/mach-imx/mx6/Kconfig
> @@ -402,6 +402,7 @@ config TARGET_OT1200
> config TARGET_PICO_IMX6UL
> bool "PICO-IMX6UL-EMMC"
> select MX6UL
> + select SUPPORT_SPL
>
> config TARGET_LITEBOARD
> bool "Grinn liteBoard (i.MX6UL)"
> diff --git a/board/technexion/pico-imx6ul/Makefile
> b/board/technexion/pico-imx6ul/Makefile
> index 8fdb7875ac..b7493df01c 100644
> --- a/board/technexion/pico-imx6ul/Makefile
> +++ b/board/technexion/pico-imx6ul/Makefile
> @@ -2,4 +2,4 @@
> # (C) Copyright 2015 Technexion Ltd.
> # (C) Copyright 2015 Freescale Semiconductor, Inc.
>
> -obj-y := pico-imx6ul.o
> +obj-y := pico-imx6ul.o spl.o
> diff --git a/board/technexion/pico-imx6ul/spl.c
> b/board/technexion/pico-imx6ul/spl.c
> new file mode 100644
> index 00..6989c81946
> --- /dev/null
> +++ b/board/technexion/pico-imx6ul/spl.c
> @@ -0,0 +1,115 @@
> +// SPDX-License-Identifier: GPL-2.0+
space
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#if defined(CONFIG_SPL_BUILD)
> +#include
> +
> +static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
> + .grp_addds = 0x0030,
> + .grp_ddrmode_ctl = 0x0002,
> + .grp_b0ds = 0x0030,
> + .grp_ctlds = 0x0030,
> + .grp_b1ds = 0x0030,
> + .grp_ddrpke = 0x,
> + .grp_ddrmode = 0x0002,
> + .grp_ddr_type = 0x0008,
> +};
> +
> +static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
> + .dram_dqm0 = 0x0030,
> + .dram_dqm1 = 0x0030,
> + .dram_ras = 0x0030,
> + .dram_cas = 0x0030,
> + .dram_odt0 = 0x0030,
> + .dram_odt1 = 0x0030,
> + .dram_sdba2 = 0x,
> + .dram_sdclk_0 = 0x0030,
> + .dram_sdqs0 = 0x0030,
> + .dram_sdqs1 = 0x0030,
> + .dram_reset = 0x0030,
> +};
> +
> +static struct mx6_mmdc_calibration mx6_mmcd_calib = {
> + .p0_mpwldectrl0 = 0x,
> + .p0_mpdgctrl0 = 0x01380134,
> + .p0_mprddlctl = 0x40404244,
> + .p0_mpwrdlctl = 0x40405050,
> +};
> +
> +static struct mx6_ddr_sysinfo ddr_sysinfo = {
> + .dsize = 0,
> + .cs1_mirror = 0,
> + .cs_density = 32,
> + .ncs= 1,
> + .bi_on = 1,
> + .rtt_nom= 1,
> + .rtt_wr = 0,
> + .ralat = 5,
> + .walat = 0,
> + .mif3_mode = 3,
> + .rst_to_cke = 0x23,
> + .sde_to_rst = 0x10,
> + .refsel = 1,
> + .refr = 3,
> +};
> +
> +static struct mx6_ddr3_cfg mem_ddr = {
> + .mem_speed = 1333,
> + .density = 2,
> + .width = 16,
> + .banks = 8,
> + .rowaddr = 14,
> + .coladdr = 10,
> + .pagesz = 2,
> + .trcd = 1350,
> + .trcmin = 4950,
> + .trasmin = 3600,
> +};
> +
> +static void ccgr_init(void)
> +{
> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> +
> + writel(0x, &ccm->CCGR0);
> + writel(0x, &ccm->CCGR1);
> + writel(0x, &ccm->CCGR2);
> + writel(0x, &ccm->CCGR3);
> + writel(0x, &ccm->CCGR4);
> + writel(0x, &ccm->CCGR5);
> + writel(0x, &ccm->CCGR6);
> + writel(0x, &ccm->CCGR7);
These can be know values.
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[U-Boot] [PATCH 02/13] pico-imx6ul: Convert to SPL
From: Fabio Estevam
There are two versions of imx6ul pico SOMs: one with 256MB and another
one with 512MB of RAM.
Convert to SPL so that both versions can be supported.
Currently only the 256MB is tested/supported.
Signed-off-by: Fabio Estevam
Signed-off-by: Fabio Berton
Signed-off-by: Otavio Salvador
---
arch/arm/mach-imx/mx6/Kconfig | 1 +
board/technexion/pico-imx6ul/Makefile | 2 +-
board/technexion/pico-imx6ul/spl.c| 115 ++
configs/pico-imx6ul_defconfig | 14 +++-
include/configs/pico-imx6ul.h | 1 +
5 files changed, 131 insertions(+), 2 deletions(-)
create mode 100644 board/technexion/pico-imx6ul/spl.c
diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
index a2799c436e..06c25bae36 100644
--- a/arch/arm/mach-imx/mx6/Kconfig
+++ b/arch/arm/mach-imx/mx6/Kconfig
@@ -402,6 +402,7 @@ config TARGET_OT1200
config TARGET_PICO_IMX6UL
bool "PICO-IMX6UL-EMMC"
select MX6UL
+ select SUPPORT_SPL
config TARGET_LITEBOARD
bool "Grinn liteBoard (i.MX6UL)"
diff --git a/board/technexion/pico-imx6ul/Makefile
b/board/technexion/pico-imx6ul/Makefile
index 8fdb7875ac..b7493df01c 100644
--- a/board/technexion/pico-imx6ul/Makefile
+++ b/board/technexion/pico-imx6ul/Makefile
@@ -2,4 +2,4 @@
# (C) Copyright 2015 Technexion Ltd.
# (C) Copyright 2015 Freescale Semiconductor, Inc.
-obj-y := pico-imx6ul.o
+obj-y := pico-imx6ul.o spl.o
diff --git a/board/technexion/pico-imx6ul/spl.c
b/board/technexion/pico-imx6ul/spl.c
new file mode 100644
index 00..6989c81946
--- /dev/null
+++ b/board/technexion/pico-imx6ul/spl.c
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#if defined(CONFIG_SPL_BUILD)
+#include
+
+static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = {
+ .grp_addds = 0x0030,
+ .grp_ddrmode_ctl = 0x0002,
+ .grp_b0ds = 0x0030,
+ .grp_ctlds = 0x0030,
+ .grp_b1ds = 0x0030,
+ .grp_ddrpke = 0x,
+ .grp_ddrmode = 0x0002,
+ .grp_ddr_type = 0x0008,
+};
+
+static struct mx6ul_iomux_ddr_regs mx6_ddr_ioregs = {
+ .dram_dqm0 = 0x0030,
+ .dram_dqm1 = 0x0030,
+ .dram_ras = 0x0030,
+ .dram_cas = 0x0030,
+ .dram_odt0 = 0x0030,
+ .dram_odt1 = 0x0030,
+ .dram_sdba2 = 0x,
+ .dram_sdclk_0 = 0x0030,
+ .dram_sdqs0 = 0x0030,
+ .dram_sdqs1 = 0x0030,
+ .dram_reset = 0x0030,
+};
+
+static struct mx6_mmdc_calibration mx6_mmcd_calib = {
+ .p0_mpwldectrl0 = 0x,
+ .p0_mpdgctrl0 = 0x01380134,
+ .p0_mprddlctl = 0x40404244,
+ .p0_mpwrdlctl = 0x40405050,
+};
+
+static struct mx6_ddr_sysinfo ddr_sysinfo = {
+ .dsize = 0,
+ .cs1_mirror = 0,
+ .cs_density = 32,
+ .ncs= 1,
+ .bi_on = 1,
+ .rtt_nom= 1,
+ .rtt_wr = 0,
+ .ralat = 5,
+ .walat = 0,
+ .mif3_mode = 3,
+ .rst_to_cke = 0x23,
+ .sde_to_rst = 0x10,
+ .refsel = 1,
+ .refr = 3,
+};
+
+static struct mx6_ddr3_cfg mem_ddr = {
+ .mem_speed = 1333,
+ .density = 2,
+ .width = 16,
+ .banks = 8,
+ .rowaddr = 14,
+ .coladdr = 10,
+ .pagesz = 2,
+ .trcd = 1350,
+ .trcmin = 4950,
+ .trasmin = 3600,
+};
+
+static void ccgr_init(void)
+{
+ struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+
+ writel(0x, &ccm->CCGR0);
+ writel(0x, &ccm->CCGR1);
+ writel(0x, &ccm->CCGR2);
+ writel(0x, &ccm->CCGR3);
+ writel(0x, &ccm->CCGR4);
+ writel(0x, &ccm->CCGR5);
+ writel(0x, &ccm->CCGR6);
+ writel(0x, &ccm->CCGR7);
+}
+
+static void spl_dram_init(void)
+{
+ mx6ul_dram_iocfg(mem_ddr.width, &mx6_ddr_ioregs, &mx6_grp_ioregs);
+ mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr);
+}
+
+void board_init_f(ulong dummy)
+{
+ ccgr_init();
+ arch_cpu_init();
+ board_early_init_f();
+ timer_init();
+ preloader_console_init();
+ spl_dram_init();
+ memset(__bss_start, 0, __bss_end - __bss_start);
+ board_init_r(NULL, 0);
+}
+
+void reset_cpu(ulong addr)
+{
+}
+#endif
diff --git a/configs/pico-imx6ul_defconfig b/configs/pico-imx6ul_defconfig
index 3f969a2d6e..589e67be96 100644
--- a/configs/pico-imx6ul_defconfig
+++ b/configs/pico-imx6ul_defconfig
@@ -1,12 +1,23 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x8780
+CONFIG_SPL_GPIO_SUPPORT=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_PICO_IMX6UL=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL=y
+CONFIG_SPL_L
