Re: [U-Boot] [PATCH 2/2] ARM: mxs: Configure 2 Gbit DDR2 RAM for BG0900
On 28/10/2013 12:29, Marek Vasut wrote: > From: Christoph G. Baumann > > The BG0900 module has 2Gbit DRAM module on it, adjust the DataBahn > DRAM controller registers so the DRAM module will be correctly > recognised. > > Signed-off-by: Christoph G. Baumann > Cc: Marek Vasut > Cc: Stefano Babic > Cc: Fabio Estevam > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] ARM: mxs: Configure 2 Gbit DDR2 RAM for BG0900
From: Christoph G. Baumann The BG0900 module has 2Gbit DRAM module on it, adjust the DataBahn DRAM controller registers so the DRAM module will be correctly recognised. Signed-off-by: Christoph G. Baumann Cc: Marek Vasut Cc: Stefano Babic Cc: Fabio Estevam --- board/ppcag/bg0900/spl_boot.c | 13 + 1 file changed, 13 insertions(+) diff --git a/board/ppcag/bg0900/spl_boot.c b/board/ppcag/bg0900/spl_boot.c index 2616e1f..a04c955 100644 --- a/board/ppcag/bg0900/spl_boot.c +++ b/board/ppcag/bg0900/spl_boot.c @@ -118,6 +118,19 @@ const iomux_cfg_t iomux_setup[] = { void mxs_adjust_memory_params(uint32_t *dram_vals) { + /* +* DDR Controller Registers +* Manufacturer:Winbond +* Device Part Number: W972GG6JB-25I +* Clock Freq.: 200MHz +* Density: 2Gb +* Chip Selects:1 +* Number of Banks: 8 +* Row address: 14 +* Column address: 10 +*/ + + dram_vals[0x74 / 4] = 0x0102010A; dram_vals[0x98 / 4] = 0x04005003; dram_vals[0x9c / 4] = 0x09c8; -- 1.8.4.rc3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot