Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
Hi Stefan, On Mon, Dec 8, 2014 at 2:27 PM, Stefan Roese s...@denx.de wrote: Yes, its applied. I'm nearly on mainline right now. And it doesn't help. Which makes sense if my current guess is correct, that the BootROM doesn't load the SPL completely without this CCGR0 register setting in the DCD. On a mx6qsabresd booting via SPL: U-Boot SPL 2015.01-rc3-00158-ge3bf81b (Dec 18 2014 - 11:19:37) U-Boot 2015.01-rc3-00158-ge3bf81b (Dec 18 2014 - 11:19:37) CPU: Freescale i.MX6Q rev1.2 at 792 MHz CPU: Temperature 46 C Reset cause: POR Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment No panel detected: default to Hannstar-XGA Display: Hannstar-XGA (1024x768) In:serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 = bmode sd3 resetting ... U-Boot SPL 2015.01-rc3-00158-ge3bf81b (Dec 18 2014 - 11:19:37) U-Boot 2015.01-rc3-00158-ge3bf81b (Dec 18 2014 - 11:19:37) CPU: Freescale i.MX6Q rev1.2 at 792 MHz CPU: Temperature 47 C Reset cause: WDOG Board: MX6-SabreSD I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment No panel detected: default to Hannstar-XGA Display: Hannstar-XGA (1024x768) In:serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 = However if I move the SD card into SD2 slot, then it fails: = bmode sd2 resetting ... U-Boot SPL 2015.01-rc3-00158-ge3bf81b (Dec 18 2014 - 11:19:37) MMC: no card present spl: mmc init failed: err - -16 ### ERROR ### Please RESET the board ### The spl loaded, but it failed to load U-boot. Probably because SPL did not initialized SD2, so it seems things are working fine here. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
While switching a custom i.MX6DL board port to the common mx6 infrastructure without any board specific DCD file (*.cfg), booting from SD-card (mmc0) via the bmode command (bmode mmc0) did not work any more. Adding this one line for the CCGR0 solves this issue. I have to admit that I'm not really sure why this is needed in this case. So if somebody has an explanation for the need for this CCGR0 register setup in the DCD, then please let me know. Signed-off-by: Stefan Roese s...@denx.de Cc: Fabio Estevam fabio.este...@freescale.com Cc: Stefano Babic sba...@denx.de --- arch/arm/imx-common/spl_sd.cfg | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/arm/imx-common/spl_sd.cfg b/arch/arm/imx-common/spl_sd.cfg index 5fc3e8a..8239def 100644 --- a/arch/arm/imx-common/spl_sd.cfg +++ b/arch/arm/imx-common/spl_sd.cfg @@ -6,3 +6,12 @@ IMAGE_VERSION 2 BOOT_FROM sd + +#define __ASSEMBLY__ +#include config.h +#include asm/arch/mx6-ddr.h +#include asm/arch/iomux.h +#include asm/arch/crm_regs.h + +/* Set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F -- 2.2.0 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
Hi Stefan, On Mon, Dec 8, 2014 at 11:31 AM, Stefan Roese s...@denx.de wrote: While switching a custom i.MX6DL board port to the common mx6 infrastructure without any board specific DCD file (*.cfg), booting from SD-card (mmc0) via the bmode command (bmode mmc0) did not work any more. Adding this one line for the CCGR0 solves this issue. I have to admit that I'm not really sure why this is needed in this case. So if somebody has an explanation for the need for this CCGR0 register setup in the DCD, then please let me know. Could you please try to narrow down what exact field of the CGR0 register makes your board boot? I suspect it could be the AIPS related clocks (CG0 / CG1). Please confirm. If this is the case, then we should turn on the AIPS clocks inside init_aips(). Thanks, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
Hi Fabio, On 08.12.2014 15:15, Fabio Estevam wrote: On Mon, Dec 8, 2014 at 11:31 AM, Stefan Roese s...@denx.de wrote: While switching a custom i.MX6DL board port to the common mx6 infrastructure without any board specific DCD file (*.cfg), booting from SD-card (mmc0) via the bmode command (bmode mmc0) did not work any more. Adding this one line for the CCGR0 solves this issue. I have to admit that I'm not really sure why this is needed in this case. So if somebody has an explanation for the need for this CCGR0 register setup in the DCD, then please let me know. Could you please try to narrow down what exact field of the CGR0 register makes your board boot? I suspect it could be the AIPS related clocks (CG0 / CG1). I tested with these values: 0x00C03F30 0x00C03F33 0x00C03F3C All do not boot. Only the original one does: 0x00C03F3F So yes, AIPS related clocks are definitely needed! I'm wondering about this, since the default value after reset should be 0x for this register, right? All clocks enabled. But this does not seem to be the case. As SPL is not started correctly (no output at all on the console) when I don't add this line to spl_sd.cfg. Its not easy for me to debug this issue since the board usually boots from NAND. I can't strap this board to boot via MMC0 right now. So I have to use the bmode mmc0 command. And JTAG debugging via BDI3000 doesn't seem to survive the bmode command. Please confirm. If this is the case, then we should turn on the AIPS clocks inside init_aips(). See above. Could you test this on one of your board? If your board also fails to boot via the bmode mmc0 command if the CCGR0 register value is missing? Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
Hi Stefan, On Mon, Dec 8, 2014 at 12:32 PM, Stefan Roese s...@denx.de wrote: Could you test this on one of your board? If your board also fails to boot via the bmode mmc0 command if the CCGR0 register value is missing? I am currently out of the office without access to my mx6 board, but looking in board/freescale/mx6sabresd/mx6sabresd.c we have: writel(0x00C03F3F, ccm-CCGR0); ,which turns on the AIPS clocks. Can't you just turn on the AIPS clocks inside in your board file like we do on sabresd? I am not sure where the AIPS clocks are being turned off in your case though. Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
Hi Fabio, On 08.12.2014 15:51, Fabio Estevam wrote: Could you test this on one of your board? If your board also fails to boot via the bmode mmc0 command if the CCGR0 register value is missing? I am currently out of the office without access to my mx6 board, I see. Perhaps you could do that once you are back in the office... but looking in board/freescale/mx6sabresd/mx6sabresd.c we have: writel(0x00C03F3F, ccm-CCGR0); ,which turns on the AIPS clocks. Can't you just turn on the AIPS clocks inside in your board file like we do on sabresd? I'm doing just that. Its copied directly from your code. Problem is, this seems to be too late. The BootROM doesn't seem to load SPL completely from the SD card when this CCGR0 line is missing. At least this is how I'm interpreting this hangup. I am not sure where the AIPS clocks are being turned off in your case though. I'm pretty sure that no code is turning them off. As mentioned before, its not that easy for me to debug this though. Again, my current best guess is, that the BootROM fails to load the SPL from SD card completely. So we have no chance to configure this register via code, but need to do it via the DCD. It might be that this is related to the bmode mmc0 command. As I'm unable to test direct SD card booting via strapping. Not sure though. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
On Mon, Dec 8, 2014 at 1:19 PM, Stefan Roese s...@denx.de wrote: Hi Fabio, On 08.12.2014 15:51, Fabio Estevam wrote: Could you test this on one of your board? If your board also fails to boot via the bmode mmc0 command if the CCGR0 register value is missing? I am currently out of the office without access to my mx6 board, I see. Perhaps you could do that once you are back in the office... Sure, I will test it and will let you know how it goes. In the meantime, I am wondering if the change below would allow your board to boot: --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -105,6 +105,10 @@ void init_aips(void) #ifdef CONFIG_MX6SX struct aipstz_regs *aips3; #endif + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* Turn on AIPS1 and AIPS2 clocks */ + setbits_le32(ccm-CCGR0, 0xf); aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; Regards, Fabio Estevam ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
On 08.12.2014 16:36, Fabio Estevam wrote: Could you test this on one of your board? If your board also fails to boot via the bmode mmc0 command if the CCGR0 register value is missing? I am currently out of the office without access to my mx6 board, I see. Perhaps you could do that once you are back in the office... Sure, I will test it and will let you know how it goes. Thanks! In the meantime, I am wondering if the change below would allow your board to boot: --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -105,6 +105,10 @@ void init_aips(void) #ifdef CONFIG_MX6SX struct aipstz_regs *aips3; #endif + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* Turn on AIPS1 and AIPS2 clocks */ + setbits_le32(ccm-CCGR0, 0xf); aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; I just tested it. And it doesn't help. I really think this code is not reached in this failure case. As the SPL is not loaded completely. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
Hi Stefan, On Mon, Dec 8, 2014 at 1:42 PM, Stefan Roese s...@denx.de wrote: I just tested it. And it doesn't help. I really think this code is not reached in this failure case. As the SPL is not loaded completely. Do you have this patch applied? commit f2863ff3f47c99c4b5ba00be572e3a2c4213c5a2 Author: Nikita Kiryanov nik...@compulab.co.il Date: Wed Oct 29 19:28:33 2014 +0200 arm: imx: make bmode command work with SPL/U-Boot combo The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov nik...@compulab.co.il Cc: Stefano Babic sba...@denx.de Cc: Troy Kisky troy.ki...@boundarydevices.com Cc: Tim Harvey thar...@gateworks.com Cc: Eric Nelson eric.nel...@boundarydevices.com Cc: Fabio Estevam fabio.este...@freescale.com Cc: Heiko Schocher h...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH RFC] arm: mx6: Add CCGR0 configuration to default DCD (spl_sd.cfg)
On 08.12.2014 17:13, Fabio Estevam wrote: I just tested it. And it doesn't help. I really think this code is not reached in this failure case. As the SPL is not loaded completely. Do you have this patch applied? commit f2863ff3f47c99c4b5ba00be572e3a2c4213c5a2 Author: Nikita Kiryanov nik...@compulab.co.il Date: Wed Oct 29 19:28:33 2014 +0200 arm: imx: make bmode command work with SPL/U-Boot combo The bmode command forces the SoC to use a specific boot device by writing its boot mode into SRC_GPR9, and notifying the SoC of the change using SRC_GPR10[28] bit: if the bit is on, bootROM uses the value in SRC_GPR9 instead of SRC_SMBR1 to determine the boot device. SPL on the other hand is oblivious to this distinction, so once the bootROM loads SPL from the device configured in SRC_GPR10, SPL will attempt to load U-Boot from the device configured in SRC_SMBR1, which is not updated by the bootROM to the value in SRC_GPR9. The result is that the selected boot device is not used across all the boot stages. Update spl_boot_device() to look at gpr9 when necessary. Signed-off-by: Nikita Kiryanov nik...@compulab.co.il Cc: Stefano Babic sba...@denx.de Cc: Troy Kisky troy.ki...@boundarydevices.com Cc: Tim Harvey thar...@gateworks.com Cc: Eric Nelson eric.nel...@boundarydevices.com Cc: Fabio Estevam fabio.este...@freescale.com Cc: Heiko Schocher h...@denx.de Yes, its applied. I'm nearly on mainline right now. And it doesn't help. Which makes sense if my current guess is correct, that the BootROM doesn't load the SPL completely without this CCGR0 register setting in the DCD. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
