Re: [U-Boot] [PATCH v2 00/18] dm: Introduce device tree support in SPL (for Rockchip)

2015-06-11 Thread Tom Rini
On Wed, Jun 10, 2015 at 08:50:53PM -0600, Simon Glass wrote:

 Hi Tom,
 
 On 4 June 2015 at 17:48, Simon Glass s...@chromium.org wrote:
  Hi Tom,
 
  On 12 May 2015 at 14:55, Simon Glass s...@chromium.org wrote:
  With driver model SPL support in place the remaining driver difference
  between U-Boot proper and SPL is that SPL does not support device tree.
  This series adds this support, using a Rockchip board as an example.
 
  I'd like to apply some of these - they are assigned to you in
  patchwork. I need to be a little careful with the device tree SPL
  change to make sure it does not affect any existing boards (and do a
  final test with the boards I have). Is this OK with you or would you
  prefer to apply some yourself?
 
  For now I don't want to apply all the Rockchip patches, as I have a
  much more functional port now and want to avoid churn. I'll tidy those
  patches up and see how we get them applied later.
 
  [snip]
 
 I'll go ahead and apply these and send a pull request. It tests out OK
 on the platforms I have.

OK, thanks.

-- 
Tom


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Re: [U-Boot] [PATCH v2 00/18] dm: Introduce device tree support in SPL (for Rockchip)

2015-06-10 Thread Simon Glass
Hi Tom,

On 4 June 2015 at 17:48, Simon Glass s...@chromium.org wrote:
 Hi Tom,

 On 12 May 2015 at 14:55, Simon Glass s...@chromium.org wrote:
 With driver model SPL support in place the remaining driver difference
 between U-Boot proper and SPL is that SPL does not support device tree.
 This series adds this support, using a Rockchip board as an example.

 I'd like to apply some of these - they are assigned to you in
 patchwork. I need to be a little careful with the device tree SPL
 change to make sure it does not affect any existing boards (and do a
 final test with the boards I have). Is this OK with you or would you
 prefer to apply some yourself?

 For now I don't want to apply all the Rockchip patches, as I have a
 much more functional port now and want to avoid churn. I'll tidy those
 patches up and see how we get them applied later.

 [snip]

I'll go ahead and apply these and send a pull request. It tests out OK
on the platforms I have.

Regards,
Simon
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Re: [U-Boot] [PATCH v2 00/18] dm: Introduce device tree support in SPL (for Rockchip)

2015-06-04 Thread Simon Glass
Hi Tom,

On 12 May 2015 at 14:55, Simon Glass s...@chromium.org wrote:
 With driver model SPL support in place the remaining driver difference
 between U-Boot proper and SPL is that SPL does not support device tree.
 This series adds this support, using a Rockchip board as an example.

I'd like to apply some of these - they are assigned to you in
patchwork. I need to be a little careful with the device tree SPL
change to make sure it does not affect any existing boards (and do a
final test with the boards I have). Is this OK with you or would you
prefer to apply some yourself?

For now I don't want to apply all the Rockchip patches, as I have a
much more functional port now and want to avoid churn. I'll tidy those
patches up and see how we get them applied later.

[snip]

Regards,
Simon
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[U-Boot] [PATCH v2 00/18] dm: Introduce device tree support in SPL (for Rockchip)

2015-05-12 Thread Simon Glass
With driver model SPL support in place the remaining driver difference
between U-Boot proper and SPL is that SPL does not support device tree.
This series adds this support, using a Rockchip board as an example.

One problem with device tree is that U-Boot has no way of dropping features
it does not need or use. For SPL this problem needs to be solved and this
series uses a new 'fdtgrep' tool for this. The 45KB Firefly device tree
reduces to 558 bytes when unused material is removed.

This series includes some changes aimed at reduce code size in SPL,
including:
- dropping alias sequence support (the aliases node) since many boards just
use a single UART in SPL
- adding a smaller panic() function that does not support printf()-format
strings
- removing device unbind code which will never be used in SPL

Overall the resulting SPL binary is 8694 bytes with my Linaro 4.8.2 compiler,
including the device tree, using Thumb-2 and with a hacked build so that
CONFIG_USE_PRIVATE_LIBGCC is enabled. Of this:

1768 bytes is driver model core code
1556 bytes is device tree code
558 bytes is the device tree itself
4756 is other code, including serial drivers, rodata and data

The last figure includes rodata incorrectly added by the tool chain [1].
With a bug-fixed gcc 4.9.2 the total size is 6758 bytes including device
tree.

Approximately 750 bytes is used for strings and driver data (root device
and serial) associated with driver model and device tree. This adds up an
overhead of around 4750 bytes for driver model and device tree, including
the code, rodata and device tree itself.

It should therefore be possible to use driver model and device tree in
SPL for board that have enough SRAM. Clearly 4KB is impossible without
further work (perhaps removing some error strings). I suspect 8KB would
be tricky, allowing only 3KB for stack and other code. But 16KB should
work OK.

SRAM sizes for recent SoCs I am aware of are:

Rockchip RK3288: 96KB
Tegra 124:   128KB
Samsung Exynos 5420: 384KB

The Rockchip Firefly was chosen for this work since it is a fairly recent
board and is readily available. Rockchip engineers have been actively
upstreaming code to Linux in the past year and there is a very
full-featured U-Boot available. But it is invisible to most U-Boot
people - mainline Rockchip support seems well overdue. This series does
not make a serious start on that, since it only prints a message in SPL
and then hangs, but additional work should get it booting to a prompt.

This series has not yet been tested on a Radxa Rock Pro but is likely to
work there also, using the Firefly config. Future work will add support
for this board also.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54303

Changes in v2:
- Simplify the support for CONFIG_SYS_NS16550_MEM32
- Also drop the memory table space
- Add a new patch for memalign_simple()
- Add new patch to remove unused strings from a device tree
- Add new patch with fdt_first/next_region() functions
- Add new patch with fdtgrep tool
- Add new patch to reduce SPL device tree size with fdtgrep
- Tidy up license headers and remove SPL #ifdefs
- Tidy up license headers
- Tidy up license headers and remove SPL #ifdefs
- Drop use of CONFIG_USE_PRIVATE_LIBGCC=y
- Tidy up license headers and remove SPL #ifdefs

Simon Glass (18):
  dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver model
  fdt: arm: Drop device tree padding
  dts: Disable device tree for SPL on all boards
  dm: serial: Don't support CONFIG_CONS_INDEX with device tree
  Add a simple version of memalign()
  Remove SPL undefine of CONFIG_OF_CONTROL
  mkimage: Display a better list of available image types
  fdt: Add a function to remove unused strings from a device tree
  fdt: Add fdt_first/next_region() functions
  fdt: Add fdtgrep tool
  dm: Reduce SPL device tree size
  dm: rockchip: Add serial support
  rockchip: Bring in RK3288 device tree file includes and bindings
  rockchip: Add base SoC files
  rockchip: Add basic support for firefly-rk3288
  rockchip: Add the beginnings of an image tool
  rockchip: Add a simple README
  rockchip: Add basic support for jerry

 Makefile   |2 +-
 arch/arm/Kconfig   |   18 +
 arch/arm/Makefile  |1 +
 arch/arm/cpu/armv7/exynos/Kconfig  |8 +
 arch/arm/cpu/armv7/s5pc1xx/Kconfig |2 +
 arch/arm/cpu/u-boot-spl.lds|2 +-
 arch/arm/dts/Makefile  |6 +-
 arch/arm/dts/cros-ec-sbs.dtsi  |   16 +
 arch/arm/dts/rk3288-firefly.dts|   44 +
 arch/arm/dts/rk3288-firefly.dtsi   |  454 ++
 arch/arm/dts/rk3288-jerry.dts  |  203 +++
 arch/arm/dts/rk3288-thermal.dtsi   |   88 ++
 arch/arm/dts/rk3288-veyron-chromebook.dtsi |  200 +++
 arch/arm/dts/rk3288-veyron.dtsi