Re: [U-Boot] [PATCH v2 1/1] TI: Davinci: NAND Driver Cleanup

2010-03-17 Thread Nick Thompson
On 16/03/10 18:51, Cyril Chemparathy wrote:
  #define davinci_emif_regs \
 - ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
 +   ((struct davinci_emif_regs *)DAVINCI_ASYNC_EMIF_CNTRL_BASE)
 +

I didn't check, but I would assume checkpatch would complain about the
spaces that have crept in here? Can you please restore the original tab?
Mainly this would remove these lines from your patch, which cause a
small confusion as to what exactly has changed and why.

If you haven't already done so, it would be a good idea to run
checkpatch to check for any other formatting violations.

Other than that, the patch looks good to me.

Thanks,
Nick.
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Re: [U-Boot] [PATCH v2 1/1] TI: Davinci: NAND Driver Cleanup

2010-03-17 Thread Chemparathy, Cyril
Hi Nick,

 I didn't check, but I would assume checkpatch would complain about the
 spaces that have crept in here?

Interestingly checkpatch complains only if it finds 8 or more spaces at the 
beginning of the line (below).  For some reason, vim cindent inserted 7 spaces 
in there, and that kept checkpatch from complaining.

...
# at the beginning of a line any tabs must come first and anything
# more than 8 must use tabs.
if ($rawline =~ /^\+\s* \t\s*\S/ ||
$rawline =~ /^\+\s*\s*/) {
my $herevet = $here\n . cat_vet($rawline) . \n;
ERROR(code indent should use tabs where possible\n . 
$herevet);
}
...

 If you haven't already done so, it would be a good idea to run
 checkpatch to check for any other formatting violations.

Thanks, resubmitted.

Regards
Cyril.

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[U-Boot] [PATCH v2 1/1] TI: Davinci: NAND Driver Cleanup

2010-03-16 Thread Cyril Chemparathy
Modified to use IO accessor routines consistently.  Eliminated volatile usage
to keep checkpatch.pl happy.

Signed-off-by: Cyril Chemparathy cy...@ti.com
---
1. Added fixes for DA830 EVM and Davinci Schmoogie boards
2. Reverted to include davinci_emif_regs macro definition

 board/davinci/da830evm/da830evm.c|2 +-
 drivers/mtd/nand/davinci_nand.c  |  125 --
 include/asm-arm/arch-davinci/emif_defs.h |   80 +--
 3 files changed, 105 insertions(+), 102 deletions(-)

diff --git a/board/davinci/da830evm/da830evm.c 
b/board/davinci/da830evm/da830evm.c
index ed668af..6385443 100644
--- a/board/davinci/da830evm/da830evm.c
+++ b/board/davinci/da830evm/da830evm.c
@@ -150,7 +150,7 @@ int board_init(void)
DAVINCI_ABCR_RHOLD(0) |
DAVINCI_ABCR_TA(2) |
DAVINCI_ABCR_ASIZE_8BIT),
-  davinci_emif_regs-AB2CR);
+  davinci_emif_regs-ab2cr);
 #endif
 
/* arch number of the board */
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index bfc2acf..1b2141b 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -57,8 +57,6 @@
 #define ECC_STATE_ERR_CORR_COMP_P  0x2
 #define ECC_STATE_ERR_CORR_COMP_N  0x3
 
-static emif_registers *const emif_regs = (void *) 
DAVINCI_ASYNC_EMIF_CNTRL_BASE;
-
 /*
  * Exploit the little endianness of the ARM to do multi-byte transfers
  * per device read. This can perform over twice as quickly as individual
@@ -93,7 +91,7 @@ static void nand_davinci_read_buf(struct mtd_info *mtd, 
uint8_t *buf, int len)
 
/* copy aligned data */
while (len = 4) {
-   *(u32 *)buf = readl(nand);
+   *(u32 *)buf = __raw_readl(nand);
buf += 4;
len -= 4;
}
@@ -138,7 +136,7 @@ static void nand_davinci_write_buf(struct mtd_info *mtd, 
const uint8_t *buf,
 
/* copy aligned data */
while (len = 4) {
-   writel(*(u32 *)buf, nand);
+   __raw_writel(*(u32 *)buf, nand);
buf += 4;
len -= 4;
}
@@ -156,7 +154,8 @@ static void nand_davinci_write_buf(struct mtd_info *mtd, 
const uint8_t *buf,
}
 }
 
-static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int 
ctrl)
+static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd,
+   unsigned int ctrl)
 {
struct  nand_chip *this = mtd-priv;
u_int32_t   IO_ADDR_W = (u_int32_t)this-IO_ADDR_W;
@@ -164,9 +163,9 @@ static void nand_davinci_hwcontrol(struct mtd_info *mtd, 
int cmd, unsigned int c
if (ctrl  NAND_CTRL_CHANGE) {
IO_ADDR_W = ~(MASK_ALE|MASK_CLE);
 
-   if ( ctrl  NAND_CLE )
+   if (ctrl  NAND_CLE)
IO_ADDR_W |= MASK_CLE;
-   if ( ctrl  NAND_ALE )
+   if (ctrl  NAND_ALE)
IO_ADDR_W |= MASK_ALE;
this-IO_ADDR_W = (void __iomem *) IO_ADDR_W;
}
@@ -181,24 +180,25 @@ static void nand_davinci_enable_hwecc(struct mtd_info 
*mtd, int mode)
 {
u_int32_t   val;
 
-   (void)readl((emif_regs-NANDFECC[CONFIG_SYS_NAND_CS - 2]));
+   (void)__raw_readl((davinci_emif_regs-nandfecc[CONFIG_SYS_NAND_CS - 
2]));
 
-   val = readl(emif_regs-NANDFCR);
+   val = __raw_readl(davinci_emif_regs-nandfcr);
val |= DAVINCI_NANDFCR_NAND_ENABLE(CONFIG_SYS_NAND_CS);
val |= DAVINCI_NANDFCR_1BIT_ECC_START(CONFIG_SYS_NAND_CS);
-   writel(val, emif_regs-NANDFCR);
+   __raw_writel(val, davinci_emif_regs-nandfcr);
 }
 
 static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
 {
u_int32_t   ecc = 0;
 
-   ecc = readl((emif_regs-NANDFECC[region - 1]));
+   ecc = __raw_readl((davinci_emif_regs-nandfecc[region - 1]));
 
-   return(ecc);
+   return ecc;
 }
 
-static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, 
u_char *ecc_code)
+static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+   u_char *ecc_code)
 {
u_int32_t   tmp;
const int region = 1;
@@ -232,7 +232,8 @@ static int nand_davinci_calculate_ecc(struct mtd_info *mtd, 
const u_char *dat, u
return 0;
 }
 
-static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char 
*read_ecc, u_char *calc_ecc)
+static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat,
+   u_char *read_ecc, u_char *calc_ecc)
 {
struct nand_chip *this = mtd-priv;
u_int32_t ecc_nand = read_ecc[0] | (read_ecc[1]  8) |
@@ -268,7 +269,7 @@ static int nand_davinci_correct_data(struct mtd_info *mtd, 
u_char *dat, u_char *
return -1;
}
}
-   return(0);
+   return 0;
 }
 #endif /* CONFIG_SYS_NAND_HW_ECC */
 
@@ -315,15 +316,15