Re: [U-Boot] [PATCH v3] mx6: Disable Power Down Bit of watchdog
On 07/02/2013 17:45, Fabio Estevam wrote: > On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted > and it is not able to reach the Linux prompt. > > Comparing the watchdog behaviour on a revB versus revC board: > > - On a mx6qsabresd revB: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: WDOG > ... > > - On a mx6qsabresd revC: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: POR > > So due to revC POR/watchdog circuitry whenever a watchdog occurs, it causes a > POR. > > Clearing the PDE - Power Down Enable bit of WMCR registers fixes the problem > and > is also safe for all mx6 boards. > > Signed-off-by: Fabio Estevam > --- Applied to u-boot-imx, thanks. Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mx6: Disable Power Down Bit of watchdog
On 07/02/2013 17:45, Fabio Estevam wrote: > On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted > and it is not able to reach the Linux prompt. > > Comparing the watchdog behaviour on a revB versus revC board: > > - On a mx6qsabresd revB: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: WDOG > ... > > - On a mx6qsabresd revC: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: POR > > So due to revC POR/watchdog circuitry whenever a watchdog occurs, it causes a > POR. > > Clearing the PDE - Power Down Enable bit of WMCR registers fixes the problem > and > is also safe for all mx6 boards. > > Signed-off-by: Fabio Estevam > --- Acked-by: Stefano Babic Best regards, Stefano Babic -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] mx6: Disable Power Down Bit of watchdog
On Thu, Feb 7, 2013 at 2:45 PM, Fabio Estevam wrote: > On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted > and it is not able to reach the Linux prompt. > > Comparing the watchdog behaviour on a revB versus revC board: > > - On a mx6qsabresd revB: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: WDOG > ... > > - On a mx6qsabresd revC: > > U-Boot > reset > resetting ... > > U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46) > > CPU: Freescale i.MX6Q rev1.1 at 792 MHz > Reset cause: POR > > So due to revC POR/watchdog circuitry whenever a watchdog occurs, it causes a > POR. > > Clearing the PDE - Power Down Enable bit of WMCR registers fixes the problem > and > is also safe for all mx6 boards. > > Signed-off-by: Fabio Estevam Acked-by: Otavio Salvador -- Otavio Salvador O.S. Systems E-mail: ota...@ossystems.com.br http://www.ossystems.com.br Mobile: +55 53 9981-7854 http://projetos.ossystems.com.br ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] mx6: Disable Power Down Bit of watchdog
On a mx6qsabresd revision C board with rev1.2 mx6q, the system gets resetted
and it is not able to reach the Linux prompt.
Comparing the watchdog behaviour on a revB versus revC board:
- On a mx6qsabresd revB:
U-Boot > reset
resetting ...
U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46)
CPU: Freescale i.MX6Q rev1.1 at 792 MHz
Reset cause: WDOG
...
- On a mx6qsabresd revC:
U-Boot > reset
resetting ...
U-Boot 2013.01-10524-g432a3aa-dirty (Feb 07 2013 - 13:34:46)
CPU: Freescale i.MX6Q rev1.1 at 792 MHz
Reset cause: POR
So due to revC POR/watchdog circuitry whenever a watchdog occurs, it causes a
POR.
Clearing the PDE - Power Down Enable bit of WMCR registers fixes the problem and
is also safe for all mx6 boards.
Signed-off-by: Fabio Estevam
---
Changes since v2:
- Using bool can make the code cleaner
Changes since v1:
- Improve commit log
arch/arm/cpu/armv7/mx6/soc.c | 12
arch/arm/include/asm/arch-mx6/imx-regs.h |8
2 files changed, 20 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index a8aad5d..6b089f3 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -30,6 +30,7 @@
#include
#include
#include
+#include
struct scu_regs {
u32 ctrl;
@@ -121,12 +122,23 @@ void set_vddsoc(u32 mv)
writel(reg, &anatop->reg_core);
}
+static void imx_set_wdog_powerdown(bool enable)
+{
+ struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR;
+ struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR;
+
+ /* Write to the PDE (Power Down Enable) bit */
+ writew(enable, &wdog1->wmcr);
+ writew(enable, &wdog2->wmcr);
+}
+
int arch_cpu_init(void)
{
init_aips();
set_vddsoc(1200); /* Set VDDSOC to 1.2V */
+ imx_set_wdog_powerdown(false); /* Disable PDE bit of WMCR register */
return 0;
}
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h
b/arch/arm/include/asm/arch-mx6/imx-regs.h
index 3eb0081..eaa7439 100644
--- a/arch/arm/include/asm/arch-mx6/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx6/imx-regs.h
@@ -601,5 +601,13 @@ struct iomuxc_base_regs {
u32 daisy[104]; /* 0x7b0..94c */
};
+struct wdog_regs {
+ u16 wcr;/* Control */
+ u16 wsr;/* Service */
+ u16 wrsr; /* Reset Status */
+ u16 wicr; /* Interrupt Control */
+ u16 wmcr; /* Miscellaneous Control */
+};
+
#endif /* __ASSEMBLER__*/
#endif /* __ASM_ARCH_MX6_IMX_REGS_H__ */
--
1.7.9.5
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