Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-06 Thread Eric Nelson 

Thanks Ye (and Peng).

On 09/06/2017 02:37 AM, Ye Li wrote:

On 9/5/2017 6:33 PM, Eric Nelson wrote:

Hi Peng,

Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?

On 03/09/2016 01:07 AM, Peng Fan wrote:

The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
19800.

Signed-off-by: Peng Fan 
Signed-off-by: Sandor Yu 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Peter Robinson 
---
include/configs/mx6sabre_common.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/configs/mx6sabre_common.h 
b/include/configs/mx6sabre_common.h
index 29d1f91..a6d821b 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -225,7 +225,11 @@
#define CONFIG_BMP_16BPP
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IPUV3_CLK 26000
+#ifdef CONFIG_MX6DL
+#define CONFIG_IPUV3_CLK 19800
+#else
+#define CONFIG_IPUV3_CLK 26400
+#endif



Note that this should probably be applied for other boards
which are compiled for multiple CPU types.

At least the Boundary Nitrogen boards, but probably others
like Wand have ordering options for DL or Solo processors
and may need the reduced clock rate.



#define CONFIG_IMX_HDMI
#define CONFIG_IMX_VIDEO_SKIP



Please advise,


Eric
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CONFIG_IPUV3_CLK is used to indicate the default rate for IPU HSP clock.
The IPU driver in u-boot won't calculate the HSP clock rate according to
CCM registers, it needs this setting to know current rate. 198Mhz is the
correct value on DL not the 264Mhz.

If you select IPU DI clock (pixel clock) derived from HSP clock not the
external clock like LDB DI clock, I believe the 264Mhz will cause problem.



Do you know what sort of problem was seen (if any)?

Please advise,


Eric
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-06 Thread Fabio Estevam 
Hi Eric/Stefano,

On Tue, Sep 5, 2017 at 10:41 AM, Eric Nelson  wrote:

>
> I don't think it should be reverted until we have a run-time decision
> in place, or we'll re-introduce whatever problem the higher rate
> caused, at least on SABRE boards with Solo or Dual-Lite processors.

I have just sent  a RFC patch that introduces the IPU clock setting in
run-time on mx6.
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-06 Thread Ye Li 
On 9/5/2017 6:33 PM, Eric Nelson wrote:
> Hi Peng,
>
> Pardon the reference to an old update, but do you have a description
> of the symptoms that brought about this patch?
>
> On 03/09/2016 01:07 AM, Peng Fan wrote:
>> The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
>> 19800.
>>
>> Signed-off-by: Peng Fan 
>> Signed-off-by: Sandor Yu 
>> Cc: Stefano Babic 
>> Cc: Fabio Estevam 
>> Cc: Peter Robinson 
>> ---
>>include/configs/mx6sabre_common.h | 6 +-
>>1 file changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/include/configs/mx6sabre_common.h 
>> b/include/configs/mx6sabre_common.h
>> index 29d1f91..a6d821b 100644
>> --- a/include/configs/mx6sabre_common.h
>> +++ b/include/configs/mx6sabre_common.h
>> @@ -225,7 +225,11 @@
>>#define CONFIG_BMP_16BPP
>>#define CONFIG_VIDEO_LOGO
>>#define CONFIG_VIDEO_BMP_LOGO
>> -#define CONFIG_IPUV3_CLK 26000
>> +#ifdef CONFIG_MX6DL
>> +#define CONFIG_IPUV3_CLK 19800
>> +#else
>> +#define CONFIG_IPUV3_CLK 26400
>> +#endif
>
>
> Note that this should probably be applied for other boards
> which are compiled for multiple CPU types.
>
> At least the Boundary Nitrogen boards, but probably others
> like Wand have ordering options for DL or Solo processors
> and may need the reduced clock rate.
>
>
>>#define CONFIG_IMX_HDMI
>>#define CONFIG_IMX_VIDEO_SKIP
>>
>
> Please advise,
>
>
> Eric
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>

CONFIG_IPUV3_CLK is used to indicate the default rate for IPU HSP clock. 
The IPU driver in u-boot won't calculate the HSP clock rate according to 
CCM registers, it needs this setting to know current rate. 198Mhz is the 
correct value on DL not the 264Mhz.

If you select IPU DI clock (pixel clock) derived from HSP clock not the 
external clock like LDB DI clock, I believe the 264Mhz will cause problem.

Best regards,
Ye Li
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-05 Thread Peng Fan 
On Mon, Sep 04, 2017 at 07:37:01PM -0700, Eric Nelson wrote:
>Hi Peng,
>
>Pardon the reference to an old update, but do you have a description
>of the symptoms that brought about this patch?

Sorry for late reply. Runtime calculation is better.

The clk here is IPU HSP clock, which default sources mmdc ch clock.
To DL, the mmdc ch clock is 396M and the IPU HSP podf is 2, so the lock
is 198M.

Regards,
Peng.

>
>On 03/09/2016 01:07 AM, Peng Fan wrote:
>>The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
>>19800.
>>
>>Signed-off-by: Peng Fan 
>>Signed-off-by: Sandor Yu 
>>Cc: Stefano Babic 
>>Cc: Fabio Estevam 
>>Cc: Peter Robinson 
>>---
>>  include/configs/mx6sabre_common.h | 6 +-
>>  1 file changed, 5 insertions(+), 1 deletion(-)
>>
>>diff --git a/include/configs/mx6sabre_common.h 
>>b/include/configs/mx6sabre_common.h
>>index 29d1f91..a6d821b 100644
>>--- a/include/configs/mx6sabre_common.h
>>+++ b/include/configs/mx6sabre_common.h
>>@@ -225,7 +225,11 @@
>>  #define CONFIG_BMP_16BPP
>>  #define CONFIG_VIDEO_LOGO
>>  #define CONFIG_VIDEO_BMP_LOGO
>>-#define CONFIG_IPUV3_CLK 26000
>>+#ifdef CONFIG_MX6DL
>>+#define CONFIG_IPUV3_CLK 19800
>>+#else
>>+#define CONFIG_IPUV3_CLK 26400
>>+#endif
>
>
>Note that this should probably be applied for other boards
>which are compiled for multiple CPU types.
>
>At least the Boundary Nitrogen boards, but probably others
>like Wand have ordering options for DL or Solo processors
>and may need the reduced clock rate.
>
>
>>  #define CONFIG_IMX_HDMI
>>  #define CONFIG_IMX_VIDEO_SKIP
>
>Please advise,
>
>
>Eric
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-05 Thread Eric Nelson 

Hi Stefano,

On 09/05/2017 06:30 AM, Stefano Babic wrote:

On 05/09/2017 14:56, Fabio Estevam wrote:

Hi Eric,

On Mon, Sep 4, 2017 at 11:37 PM, Eric Nelson  wrote:


--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -225,7 +225,11 @@
   #define CONFIG_BMP_16BPP
   #define CONFIG_VIDEO_LOGO
   #define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IPUV3_CLK 26000
+#ifdef CONFIG_MX6DL
+#define CONFIG_IPUV3_CLK 19800
+#else
+#define CONFIG_IPUV3_CLK 26400
+#endif




Note that this should probably be applied for other boards
which are compiled for multiple CPU types.

At least the Boundary Nitrogen boards, but probably others
like Wand have ordering options for DL or Solo processors
and may need the reduced clock rate.


Agreed. The clock frequency decision should be done in run-time rather
than in build-time.


I agree, too. We have mechanism to take decisions at run time, at least
based on SOC type. Anyway, Anatolji has already merged this - should be
better to revert it ?



I don't think it should be reverted until we have a run-time decision
in place, or we'll re-introduce whatever problem the higher rate
caused, at least on SABRE boards with Solo or Dual-Lite processors.

I'm still wondering whether Peng has a description of the ramifications
of the higher rate on DL/Solo processors.

Regards,


Eric
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-05 Thread Stefano Babic 
On 05/09/2017 14:56, Fabio Estevam wrote:
> Hi Eric,
> 
> On Mon, Sep 4, 2017 at 11:37 PM, Eric Nelson  wrote:
> 
>>> --- a/include/configs/mx6sabre_common.h
>>> +++ b/include/configs/mx6sabre_common.h
>>> @@ -225,7 +225,11 @@
>>>   #define CONFIG_BMP_16BPP
>>>   #define CONFIG_VIDEO_LOGO
>>>   #define CONFIG_VIDEO_BMP_LOGO
>>> -#define CONFIG_IPUV3_CLK 26000
>>> +#ifdef CONFIG_MX6DL
>>> +#define CONFIG_IPUV3_CLK 19800
>>> +#else
>>> +#define CONFIG_IPUV3_CLK 26400
>>> +#endif
>>
>>
>>
>> Note that this should probably be applied for other boards
>> which are compiled for multiple CPU types.
>>
>> At least the Boundary Nitrogen boards, but probably others
>> like Wand have ordering options for DL or Solo processors
>> and may need the reduced clock rate.
> 
> Agreed. The clock frequency decision should be done in run-time rather
> than in build-time.

I agree, too. We have mechanism to take decisions at run time, at least
based on SOC type. Anyway, Anatolji has already merged this - should be
better to revert it ?

Regards,
Stefano


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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-05 Thread Fabio Estevam 
Hi Eric,

On Mon, Sep 4, 2017 at 11:37 PM, Eric Nelson  wrote:

>> --- a/include/configs/mx6sabre_common.h
>> +++ b/include/configs/mx6sabre_common.h
>> @@ -225,7 +225,11 @@
>>   #define CONFIG_BMP_16BPP
>>   #define CONFIG_VIDEO_LOGO
>>   #define CONFIG_VIDEO_BMP_LOGO
>> -#define CONFIG_IPUV3_CLK 26000
>> +#ifdef CONFIG_MX6DL
>> +#define CONFIG_IPUV3_CLK 19800
>> +#else
>> +#define CONFIG_IPUV3_CLK 26400
>> +#endif
>
>
>
> Note that this should probably be applied for other boards
> which are compiled for multiple CPU types.
>
> At least the Boundary Nitrogen boards, but probably others
> like Wand have ordering options for DL or Solo processors
> and may need the reduced clock rate.

Agreed. The clock frequency decision should be done in run-time rather
than in build-time.
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-05 Thread Eric Nelson 

Hi Peng,

Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?

On 03/09/2016 01:07 AM, Peng Fan wrote:

The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
19800.

Signed-off-by: Peng Fan 
Signed-off-by: Sandor Yu 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Peter Robinson 
---
  include/configs/mx6sabre_common.h | 6 +-
  1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/configs/mx6sabre_common.h 
b/include/configs/mx6sabre_common.h
index 29d1f91..a6d821b 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -225,7 +225,11 @@
  #define CONFIG_BMP_16BPP
  #define CONFIG_VIDEO_LOGO
  #define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IPUV3_CLK 26000
+#ifdef CONFIG_MX6DL
+#define CONFIG_IPUV3_CLK 19800
+#else
+#define CONFIG_IPUV3_CLK 26400
+#endif



Note that this should probably be applied for other boards
which are compiled for multiple CPU types.

At least the Boundary Nitrogen boards, but probably others
like Wand have ordering options for DL or Solo processors
and may need the reduced clock rate.



  #define CONFIG_IMX_HDMI
  #define CONFIG_IMX_VIDEO_SKIP
  


Please advise,


Eric
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Re: [U-Boot] [U-Boot,2/3] imx: mx6: correct IPU clock

2017-09-04 Thread Eric Nelson 

Hi all,

Adding my normal e-mail account to the chain, since the other account
isn't registered on the list.

On 09/04/2017 07:37 PM, Eric Nelson wrote:

Hi Peng,

Pardon the reference to an old update, but do you have a description
of the symptoms that brought about this patch?

On 03/09/2016 01:07 AM, Peng Fan wrote:

The CONFIG_IPUV3_CLK should be 26400, to i.MX6DL, it should be
19800.

Signed-off-by: Peng Fan 
Signed-off-by: Sandor Yu 
Cc: Stefano Babic 
Cc: Fabio Estevam 
Cc: Peter Robinson 
---
  include/configs/mx6sabre_common.h | 6 +-
  1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/include/configs/mx6sabre_common.h 
b/include/configs/mx6sabre_common.h

index 29d1f91..a6d821b 100644
--- a/include/configs/mx6sabre_common.h
+++ b/include/configs/mx6sabre_common.h
@@ -225,7 +225,11 @@
  #define CONFIG_BMP_16BPP
  #define CONFIG_VIDEO_LOGO
  #define CONFIG_VIDEO_BMP_LOGO
-#define CONFIG_IPUV3_CLK 26000
+#ifdef CONFIG_MX6DL
+#define CONFIG_IPUV3_CLK 19800
+#else
+#define CONFIG_IPUV3_CLK 26400
+#endif



Note that this should probably be applied for other boards
which are compiled for multiple CPU types.

At least the Boundary Nitrogen boards, but probably others
like Wand have ordering options for DL or Solo processors
and may need the reduced clock rate.



  #define CONFIG_IMX_HDMI
  #define CONFIG_IMX_VIDEO_SKIP


Please advise,


Eric


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