[U-Boot] [PATCH v3 09/19] ARM: tegra: Support TZ-only access to PMC

[Thierry Reding]

From: Thierry Reding 

Some devices may restrict access to the PMC to TrustZone software only.
Non-TZ software can detect this and use SMC calls to the firmware that
runs in the TrustZone to perform accesses to PMC registers.

Note that this also fixes reset_cpu() and the enterrcm command on
Tegra186 where they were previously trying to access the PMC at a wrong
physical address.

Based on work by Kalyani Chidambaram  and Tom
Warren .

Signed-off-by: Thierry Reding 
---
 arch/arm/include/asm/arch-tegra/pmc.h   | 20 +-
 arch/arm/include/asm/arch-tegra/tegra.h |  6 ++
 arch/arm/mach-tegra/Kconfig |  5 ++
 arch/arm/mach-tegra/Makefile|  4 +-
 arch/arm/mach-tegra/clock.c | 13 ++--
 arch/arm/mach-tegra/cmd_enterrcm.c  |  6 +-
 arch/arm/mach-tegra/cpu.c   | 20 +++---
 arch/arm/mach-tegra/lowlevel_init.S | 39 ---
 arch/arm/mach-tegra/pmc.c   | 92 +
 arch/arm/mach-tegra/powergate.c | 11 +--
 10 files changed, 151 insertions(+), 65 deletions(-)
 delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S
 create mode 100644 arch/arm/mach-tegra/pmc.c

diff --git a/arch/arm/include/asm/arch-tegra/pmc.h 
b/arch/arm/include/asm/arch-tegra/pmc.h
index 34bbe75d5fdb..1524bf291164 100644
--- a/arch/arm/include/asm/arch-tegra/pmc.h
+++ b/arch/arm/include/asm/arch-tegra/pmc.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- *  (C) Copyright 2010-2015
+ *  (C) Copyright 2010-2019
  *  NVIDIA Corporation 
  */
 
@@ -388,4 +388,22 @@ struct pmc_ctlr {
 /* APBDEV_PMC_CNTRL2_0 0x440 */
 #define HOLD_CKE_LOW_EN(1 << 12)
 
+/* PMC read/write functions */
+u32 tegra_pmc_readl(unsigned long offset);
+void tegra_pmc_writel(u32 value, unsigned long offset);
+
+#define PMC_CNTRL  0x0
+#define  PMC_CNTRL_MAIN_RSTBIT(4)
+
+#if IS_ENABLED(CONFIG_TEGRA186)
+#  define PMC_SCRATCH0 0x32000
+#else
+#  define PMC_SCRATCH0 0x00050
+#endif
+
+/* for secure PMC */
+#define TEGRA_SMC_PMC  0xc2fffe00
+#define  TEGRA_SMC_PMC_READ0xaa
+#define  TEGRA_SMC_PMC_WRITE   0xbb
+
 #endif /* PMC_H */
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h 
b/arch/arm/include/asm/arch-tegra/tegra.h
index 7ae0129e2db3..7a4e0972fb76 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -30,7 +30,13 @@
 #define NV_PA_SLINK5_BASE  (NV_PA_APB_MISC_BASE + 0xDC00)
 #define NV_PA_SLINK6_BASE  (NV_PA_APB_MISC_BASE + 0xDE00)
 #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000)
+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
+   defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \
+   defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210)
 #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
+#else
+#define NV_PA_PMC_BASE 0xc36
+#endif
 #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)
 #define NV_PA_FUSE_BASE(NV_PA_APB_MISC_BASE + 0xF800)
 #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index db9198348d3f..28914a34a1b5 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -35,6 +35,10 @@ config TEGRA_PINCTRL
 config TEGRA_PMC
bool
 
+config TEGRA_PMC_SECURE
+   bool
+   depends on TEGRA_PMC
+
 config TEGRA_COMMON
bool "Tegra common options"
select BINMAN
@@ -127,6 +131,7 @@ config TEGRA210
select TEGRA_NO_BPMP
select TEGRA_PINCTRL
select TEGRA_PMC
+   select TEGRA_PMC_SECURE
 
 config TEGRA186
bool "Tegra186 family"
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 517be21ee5f5..f8bc65aa8b18 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
-# (C) Copyright 2010-2015 Nvidia Corporation.
+# (C) Copyright 2010-2019 Nvidia Corporation.
 #
 # (C) Copyright 2000-2008
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
@@ -27,11 +27,11 @@ obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
 obj-$(CONFIG_TEGRA_IVC) += ivc.o
-obj-y += lowlevel_init.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV7_PSCI) += psci.o
 endif
 obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
+obj-y += pmc.o
 
 obj-$(CONFIG_TEGRA20) += tegra20/
 obj-$(CONFIG_TEGRA30) += tegra30/
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 096330748f2b..c9cd4e6aaeb7 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2010-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2010-2019, NVIDIA CORPORATION.  All rights reserved.
  */
 
 /* Tegra SoC common clock control functions */
@@ -814,11 +814,16 @@ void tegra3

[U-Boot] [PATCH v3 16/19] p2371-2180: Pass Ethernet MAC to the kernel

[Thierry Reding]

From: Thierry Reding 

Pass the ethernet MAC address to the kernel upon boot. This passes both
the local-mac-address property (as passed to U-Boot from cboot) and the
currently set MAC address via the mac-address property. The latter will
only be set if it is different from the address that was already passed
via the local-mac-address property.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2371-2180/p2371-2180.c | 50 
 configs/p2371-2180_defconfig |  1 +
 2 files changed, 51 insertions(+)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index 212037da5ac0..a444d692d7ea 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -5,9 +5,12 @@
  */
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include "../p2571/max77620_init.h"
 #include "pinmux-config-p2371-2180.h"
 
@@ -94,3 +97,50 @@ int tegra_pcie_board_init(void)
return 0;
 }
 #endif /* PCI */
+
+static void ft_mac_address_setup(void *fdt)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
+   const char *path;
+   int offset, err;
+
+   err = cboot_get_ethaddr(cboot_fdt, local_mac);
+   if (err < 0)
+   memset(local_mac, 0, ETH_ALEN);
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path)
+   return;
+
+   debug("ethernet alias found: %s\n", path);
+
+   offset = fdt_path_offset(fdt, path);
+   if (offset < 0) {
+   printf("ethernet alias points to absent node %s\n", path);
+   return;
+   }
+
+   if (is_valid_ethaddr(local_mac)) {
+   err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
+ ETH_ALEN);
+   if (!err)
+   debug("Local MAC address set: %pM\n", local_mac);
+   }
+
+   if (eth_env_get_enetaddr("ethaddr", mac)) {
+   if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
+   err = fdt_setprop(fdt, offset, "mac-address", mac,
+ ETH_ALEN);
+   if (!err)
+   debug("MAC address set: %pM\n", mac);
+   }
+   }
+}
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+   ft_mac_address_setup(fdt);
+
+   return 0;
+}
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index 2fac69917a92..16afbba68ae7 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y
 CONFIG_TARGET_P2371_2180=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
-- 
2.21.0

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[U-Boot] [PATCH v3 12/19] ARM: tegra: Unify Tegra186 builds

[Thierry Reding]

From: Thierry Reding 

Tegra186 build are currently dealt with in very special ways, which is
because Tegra186 is fundamentally different in many respects. It is no
longer necessary to do many of the low-level programming because early
boot firmware will already have taken care of it.

Unfortunately, separating Tegra186 builds from the rest in this way
makes it difficult to share code with prior generations of Tegra. With
all of the low-level programming code behind Kconfig guards, the build
for Tegra186 can again be unified.

As a side-effect, and partial reason for this change, other Tegra SoC
generations can now make use of the code that deals with taking over a
boot from earlier bootloaders. This used to be nvtboot, but has been
replaced by cboot nowadays. Rename the files and functions related to
this to avoid confusion. The implemented protocols are unchanged.

Signed-off-by: Thierry Reding 
---
Changes in v3:
- load cboot DTB address to fdt_addr instead of fdtaddr

 arch/arm/include/asm/arch-tegra/cboot.h   |  39 
 arch/arm/mach-tegra/Makefile  |   4 +-
 arch/arm/mach-tegra/board.c   |  23 ++
 arch/arm/mach-tegra/board186.c|  32 ---
 arch/arm/mach-tegra/board2.c  |  21 ++
 .../{tegra186/nvtboot_board.c => cboot.c} | 200 --
 .../{tegra186/nvtboot_ll.S => cboot_ll.S} |  12 +-
 arch/arm/mach-tegra/tegra186/Makefile |   4 -
 arch/arm/mach-tegra/tegra186/nvtboot_mem.c| 172 ---
 board/nvidia/p2771-/p2771-.c  |  10 +-
 10 files changed, 278 insertions(+), 239 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h
 delete mode 100644 arch/arm/mach-tegra/board186.c
 rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (56%)
 rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%)
 delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c

diff --git a/arch/arm/include/asm/arch-tegra/cboot.h 
b/arch/arm/include/asm/arch-tegra/cboot.h
new file mode 100644
index ..b3441ec178b3
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/cboot.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved.
+ */
+
+#ifndef _TEGRA_CBOOT_H_
+#define _TEGRA_CBOOT_H_
+
+#ifdef CONFIG_ARM64
+extern unsigned long cboot_boot_x0;
+
+void cboot_save_boot_params(unsigned long x0, unsigned long x1,
+   unsigned long x2, unsigned long x3);
+int cboot_dram_init(void);
+int cboot_dram_init_banksize(void);
+ulong cboot_get_usable_ram_top(ulong total_size);
+#else
+static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1,
+ unsigned long x2, unsigned long x3)
+{
+}
+
+static inline int cboot_dram_init(void)
+{
+   return -ENOSYS;
+}
+
+static inline int cboot_dram_init_banksize(void)
+{
+   return -ENOSYS;
+}
+
+static inline ulong cboot_get_usable_ram_top(ulong total_size)
+{
+   return 0;
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index f8bc65aa8b18..41ba674edff4 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -5,7 +5,6 @@
 # (C) Copyright 2000-2008
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
 
-ifndef CONFIG_TEGRA186
 ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
 obj-y += cpu.o
@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o
 obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
 obj-$(CONFIG_TEGRA_PMC) += powergate.o
 obj-y += xusb-padctl-dummy.o
-endif
 
-obj-$(CONFIG_ARM64) += arm64-mmu.o
+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o
 obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 59d2f347485d..c3ba00811e83 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, 
unsigned long r2,
  unsigned long r3)
 {
from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL;
+
+   /*
+* The logic for this is somewhat indirect. The purpose of the marker
+* (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot
+* was loaded from a read-only instance of itself, which is something
+* that can happen in secure boot setups. So basically the presence
+* of the marker is an indication that U-Boot was loaded by one such
+* special variant of U-Boot. Conversely, the absence of the marker
+* indicates that this instance of U-Boot was loaded by something
+* other than a special U-Boot. This could be SPL, but it could just
+* as well be one of any number of other first stage

[U-Boot] [PATCH v3 17/19] p2771-0000: Pass Ethernet MAC to the kernel

[Thierry Reding]

From: Thierry Reding 

Pass the ethernet MAC address to the kernel upon boot. This passes both
the local-mac-address property (as passed to U-Boot from cboot) and the
currently set MAC address via the mac-address property. The latter will
only be set if it is different from the address that was already passed
via the local-mac-address property.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2771-/p2771-.c | 43 
 configs/p2771--000_defconfig |  1 +
 configs/p2771--500_defconfig |  1 +
 3 files changed, 45 insertions(+)

diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index 6f88010c18c3..fe22067f6571 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -4,7 +4,10 @@
  */
 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include "../p2571/max77620_init.h"
 
 void pin_mux_mmc(void)
@@ -52,3 +55,43 @@ int tegra_pcie_board_init(void)
return 0;
 }
 #endif
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
+   const char *path;
+   int offset, err;
+
+   err = cboot_get_ethaddr(cboot_fdt, local_mac);
+   if (err < 0)
+   memset(local_mac, 0, ETH_ALEN);
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path)
+   return 0;
+
+   debug("ethernet alias found: %s\n", path);
+
+   offset = fdt_path_offset(fdt, path);
+   if (offset < 0)
+   return 0;
+
+   if (is_valid_ethaddr(local_mac)) {
+   err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
+ ETH_ALEN);
+   if (!err)
+   debug("Local MAC address set: %pM\n", local_mac);
+   }
+
+   if (eth_env_get_enetaddr("ethaddr", mac)) {
+   if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
+   err = fdt_setprop(fdt, offset, "mac-address", mac,
+ ETH_ALEN);
+   if (!err)
+   debug("MAC address set: %pM\n", mac);
+   }
+   }
+
+   return 0;
+}
diff --git a/configs/p2771--000_defconfig b/configs/p2771--000_defconfig
index ad0802067e73..91896e39a10f 100644
--- a/configs/p2771--000_defconfig
+++ b/configs/p2771--000_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA186=y
 CONFIG_NR_DRAM_BANKS=1026
 CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra186 (P2771--000) # "
diff --git a/configs/p2771--500_defconfig b/configs/p2771--500_defconfig
index 459b67fd195f..20d4393838d6 100644
--- a/configs/p2771--500_defconfig
+++ b/configs/p2771--500_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA186=y
 CONFIG_NR_DRAM_BANKS=1026
 CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra186 (P2771--500) # "
-- 
2.21.0

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[U-Boot] [PATCH v3 15/19] ARM: tegra: Enable position independent build for 64-bit

[Thierry Reding]

From: Thierry Reding 

Note that U-Boot is always chainloaded from cboot starting with L4T
release 28. cboot always loads U-Boot to a fixed address, so making
the builds position independent isn't strictly necessary. However,
position independent builds can be convenient because if U-Boot is
ever loaded to an address different from its link address, it will
still be able to boot.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig  | 1 +
 configs/e2220-1170_defconfig | 2 +-
 configs/p2371-_defconfig | 2 +-
 configs/p2371-2180_defconfig | 2 +-
 configs/p2571_defconfig  | 2 +-
 5 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index faa73559fd42..97e22ead5985 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -87,6 +87,7 @@ config TEGRA_ARMV8_COMMON
bool "Tegra 64-bit common options"
select ARM64
select LINUX_KERNEL_IMAGE_HEADER
+   select POSITION_INDEPENDENT
select TEGRA_COMMON
 
 if TEGRA_ARMV8_COMMON
diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig
index fbca72ace6ed..87668f8e517f 100644
--- a/configs/e2220-1170_defconfig
+++ b/configs/e2220-1170_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_OF_SYSTEM_SETUP=y
diff --git a/configs/p2371-_defconfig b/configs/p2371-_defconfig
index c25872128e07..979cb8ec0a25 100644
--- a/configs/p2371-_defconfig
+++ b/configs/p2371-_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P2371_=y
 CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index b662ef143141..2fac69917a92 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P2371_2180=y
 CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index 5f0f8c519b4c..ff4654cea9b4 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P2571=y
 CONFIG_NR_DRAM_BANKS=2
-- 
2.21.0

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[U-Boot] [PATCH v3 13/19] ARM: tegra: Implement cboot_save_boot_params() in C

[Thierry Reding]

From: Thierry Reding 

This is easier to deal with and works just as well for this simple
function.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Makefile   |  2 +-
 arch/arm/mach-tegra/cboot.c| 12 
 arch/arm/mach-tegra/cboot_ll.S | 20 
 3 files changed, 13 insertions(+), 21 deletions(-)
 delete mode 100644 arch/arm/mach-tegra/cboot_ll.S

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 41ba674edff4..7165d70a60da 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
 obj-$(CONFIG_TEGRA_PMC) += powergate.o
 obj-y += xusb-padctl-dummy.o
 
-obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o
+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o
 obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index 95a097584ac6..acf33b4c4e0c 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data")));
 /* The base address of the region of RAM that ends at ram_top */
 static u64 region_base __attribute__((section(".data")));
 
+/*
+ * Explicitly put this in the .data section because it is written before the
+ * .bss section is zeroed out but it needs to persist.
+ */
+unsigned long cboot_boot_x0 __attribute__((section(".data")));
+
+void cboot_save_boot_params(unsigned long x0, unsigned long x1,
+   unsigned long x2, unsigned long x3)
+{
+   cboot_boot_x0 = x0;
+}
+
 int cboot_dram_init(void)
 {
unsigned int na, ns;
diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S
deleted file mode 100644
index 4c9ddacc2b39..
--- a/arch/arm/mach-tegra/cboot_ll.S
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Save cboot-related boot-time CPU state
- *
- * (C) Copyright 2015-2016 NVIDIA Corporation 
- */
-
-#include 
-#include 
-
-.align 8
-.globl cboot_boot_x0
-cboot_boot_x0:
-   .dword 0
-
-ENTRY(cboot_save_boot_params)
-   adr x8, cboot_boot_x0
-   str x0, [x8]
-   b   save_boot_params_ret
-ENDPROC(cboot_save_boot_params)
-- 
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[U-Boot] [PATCH v3 09/13] fdtdec: test: Use compound statement macros

[Thierry Reding]

From: Thierry Reding 

This eliminates the need for intermediate helper functions and allow the
macros to return a value so that it can be used subsequently.

Signed-off-by: Thierry Reding 
---
Changes in v2:
- new patch

 lib/fdtdec_test.c | 64 ---
 1 file changed, 22 insertions(+), 42 deletions(-)

diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index 065fed278cf3..928950918413 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -15,48 +15,28 @@
 /* The size of our test fdt blob */
 #define FDT_SIZE   (16 * 1024)
 
-/**
- * Check if an operation failed, and if so, print an error
- *
- * @param oper_nameName of operation
- * @param err  Error code to check
- *
- * @return 0 if ok, -1 if there was an error
- */
-static int fdt_checkerr(const char *oper_name, int err)
-{
-   if (err) {
-   printf("%s: %s: %s\n", __func__, oper_name, fdt_strerror(err));
-   return -1;
-   }
-
-   return 0;
-}
-
-/**
- * Check the result of an operation and if incorrect, print an error
- *
- * @param oper_nameName of operation
- * @param expected Expected value
- * @param valueActual value
- *
- * @return 0 if ok, -1 if there was an error
- */
-static int checkval(const char *oper_name, int expected, int value)
-{
-   if (expected != value) {
-   printf("%s: %s: expected %d, but returned %d\n", __func__,
-  oper_name, expected, value);
-   return -1;
-   }
-
-   return 0;
-}
+#define CHECK(op) ({   \
+   int err = op;   \
+   if (err < 0) {  \
+   printf("%s: %s: %s\n", __func__, #op,   \
+  fdt_strerror(err));  \
+   return err; \
+   }   \
+   \
+   err;\
+   })
+
+#define CHECKVAL(op, expected) ({  \
+   int err = op;   \
+   if (err != expected) {  \
+   printf("%s: %s: expected %d, but returned %d\n",\
+  __func__, #op, expected, err);   \
+   return err; \
+   }   \
+   \
+   err;\
+   })
 
-#define CHECK(op)  if (fdt_checkerr(#op, op)) return -1
-#define CHECKVAL(op, expected) \
-   if (checkval(#op, expected, op)) \
-   return -1
 #define CHECKOK(op)CHECKVAL(op, 0)
 
 /* maximum number of nodes / aliases to generate */
@@ -138,7 +118,7 @@ static int run_test(const char *aliases, const char *nodes, 
const char *expect)
CHECKVAL(make_fdt(blob, FDT_SIZE, aliases, nodes), 0);
CHECKVAL(fdtdec_find_aliases_for_id(blob, "i2c",
COMPAT_UNKNOWN,
-   list, ARRAY_SIZE(list)), strlen(expect));
+   list, ARRAY_SIZE(list)), (int)strlen(expect));
 
/* Check we got the right ones */
for (i = 0, s = expect; *s; s++, i++) {
-- 
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[U-Boot] [PATCH v3 01/13] libfdt: Add phandle generation helper

[Thierry Reding]

From: Thierry Reding 

The new fdt_generate_phandle() function can be used to generate a new,
unused phandle given a specific device tree blob. The implementation is
somewhat naive in that it simply walks the entire device tree to find
the highest phandle value and then returns a phandle value one higher
than that. A more clever implementation might try to find holes in the
current set of phandle values and fill them. But this implementation is
relatively simple and works reliably.

Also add a test that validates that phandles generated by this new API
are indeed unique.

Signed-off-by: Thierry Reding 
---
Changes in v3:
- update to latest upstream commit

 lib/libfdt/fdt_ro.c | 31 +++
 scripts/dtc/libfdt/fdt_ro.c | 31 +++
 scripts/dtc/libfdt/libfdt.h | 19 +++
 scripts/dtc/libfdt/libfdt_env.h |  1 +
 4 files changed, 82 insertions(+)

diff --git a/lib/libfdt/fdt_ro.c b/lib/libfdt/fdt_ro.c
index b6ca4e0b0c30..693de9aa5ad8 100644
--- a/lib/libfdt/fdt_ro.c
+++ b/lib/libfdt/fdt_ro.c
@@ -73,6 +73,37 @@ uint32_t fdt_get_max_phandle(const void *fdt)
return 0;
 }
 
+int fdt_generate_phandle(const void *fdt, uint32_t *phandle)
+{
+   uint32_t max = 0;
+   int offset = -1;
+
+   while (true) {
+   uint32_t value;
+
+   offset = fdt_next_node(fdt, offset, NULL);
+   if (offset < 0) {
+   if (offset == -FDT_ERR_NOTFOUND)
+   break;
+
+   return offset;
+   }
+
+   value = fdt_get_phandle(fdt, offset);
+
+   if (value > max)
+   max = value;
+   }
+
+   if (max == FDT_MAX_PHANDLE)
+   return -FDT_ERR_NOPHANDLES;
+
+   if (phandle)
+   *phandle = max + 1;
+
+   return 0;
+}
+
 int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
 {
FDT_CHECK_HEADER(fdt);
diff --git a/scripts/dtc/libfdt/fdt_ro.c b/scripts/dtc/libfdt/fdt_ro.c
index dfb3236da388..dc499884e4d1 100644
--- a/scripts/dtc/libfdt/fdt_ro.c
+++ b/scripts/dtc/libfdt/fdt_ro.c
@@ -115,6 +115,37 @@ uint32_t fdt_get_max_phandle(const void *fdt)
return 0;
 }
 
+int fdt_generate_phandle(const void *fdt, uint32_t *phandle)
+{
+   uint32_t max = 0;
+   int offset = -1;
+
+   while (true) {
+   uint32_t value;
+
+   offset = fdt_next_node(fdt, offset, NULL);
+   if (offset < 0) {
+   if (offset == -FDT_ERR_NOTFOUND)
+   break;
+
+   return offset;
+   }
+
+   value = fdt_get_phandle(fdt, offset);
+
+   if (value > max)
+   max = value;
+   }
+
+   if (max == FDT_MAX_PHANDLE)
+   return -FDT_ERR_NOPHANDLES;
+
+   if (phandle)
+   *phandle = max + 1;
+
+   return 0;
+}
+
 int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
 {
FDT_CHECK_HEADER(fdt);
diff --git a/scripts/dtc/libfdt/libfdt.h b/scripts/dtc/libfdt/libfdt.h
index fd73688f9e9f..cf86ddba8811 100644
--- a/scripts/dtc/libfdt/libfdt.h
+++ b/scripts/dtc/libfdt/libfdt.h
@@ -139,6 +139,10 @@
 
 #define FDT_ERR_MAX17
 
+/* constants */
+#define FDT_MAX_PHANDLE 0xfffe
+   /* Valid values for phandles range from 1 to 2^32-2. */
+
 /**/
 /* Low-level functions (you probably don't need these)*/
 /**/
@@ -313,6 +317,21 @@ const char *fdt_string(const void *fdt, int stroffset);
  */
 uint32_t fdt_get_max_phandle(const void *fdt);
 
+/**
+ * fdt_generate_phandle - return a new, unused phandle for a device tree blob
+ * @fdt: pointer to the device tree blob
+ * @phandle: return location for the new phandle
+ *
+ * Walks the device tree blob and looks for the highest phandle value. On
+ * success, the new, unused phandle value (one higher than the previously
+ * highest phandle value in the device tree blob) will be returned in the
+ * @phandle parameter.
+ *
+ * Returns:
+ *   0 on success or a negative error-code on failure
+ */
+int fdt_generate_phandle(const void *fdt, uint32_t *phandle);
+
 /**
  * fdt_num_mem_rsv - retrieve the number of memory reserve map entries
  * @fdt: pointer to the device tree blob
diff --git a/scripts/dtc/libfdt/libfdt_env.h b/scripts/dtc/libfdt/libfdt_env.h
index bd2474628775..3ff9e2863075 100644
--- a/scripts/dtc/libfdt/libfdt_env.h
+++ b/scripts/dtc/libfdt/libfdt_env.h
@@ -52,6 +52,7 @@
  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+#include 
 #include 
 #include 
 #include 
-- 
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[U-Boot] [PATCH v3 02/13] fdtdec: Add cpu_to_fdt_{addr, size}() macros

[Thierry Reding]

From: Thierry Reding 

These macros are useful for converting the endianness of variables of
type fdt_addr_t and fdt_size_t.

Reviewed-by: Simon Glass 
Signed-off-by: Thierry Reding 
---
Changes in v2:
- add Reviewed-by from Simon

 include/fdtdec.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index b7e35cd87c55..a965c33157c9 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -27,11 +27,15 @@ typedef phys_size_t fdt_size_t;
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be64_to_cpu(reg)
+#define cpu_to_fdt_addr(reg) cpu_to_be64(reg)
+#define cpu_to_fdt_size(reg) cpu_to_be64(reg)
 typedef fdt64_t fdt_val_t;
 #else
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be32_to_cpu(reg)
 #define fdt_size_to_cpu(reg) be32_to_cpu(reg)
+#define cpu_to_fdt_addr(reg) cpu_to_be32(reg)
+#define cpu_to_fdt_size(reg) cpu_to_be32(reg)
 typedef fdt32_t fdt_val_t;
 #endif
 
-- 
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[U-Boot] [PATCH v3 07/13] fdtdec: Add Kconfig symbol for tests

[Thierry Reding]

From: Thierry Reding 

Runtime tests are provided as a test_fdtdec command implementation. Add
a Kconfig symbol that allows this command to be built so that the tests
can be used.

Signed-off-by: Thierry Reding 
---
Changes in v2:
- new patch

 lib/Kconfig | 4 
 1 file changed, 4 insertions(+)

diff --git a/lib/Kconfig b/lib/Kconfig
index 366d164cd760..b1fccf7e8dff 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -423,4 +423,8 @@ source lib/efi/Kconfig
 source lib/efi_loader/Kconfig
 source lib/optee/Kconfig
 
+config TEST_FDTDEC
+   bool "enable fdtdec test"
+   depends on OF_LIBFDT
+
 endmenu
-- 
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Re: [U-Boot] [PATCH v3 03/13] fdtdec: Add fdt_{addr, size}_unpack() helpers

[Thierry Reding]

On Fri, Mar 22, 2019 at 03:53:00PM +0800, Simon Glass wrote:
> Hi Thierry,
> 
> On Fri, 22 Mar 2019 at 02:10, Thierry Reding  wrote:
> >
> > From: Thierry Reding 
> >
> > These helpers can be used to unpack variables of type fdt_addr_t and
> > fdt_size_t into a pair of 32-bit variables. This is useful in cases
> > where such variables need to be written to properties (such as "reg")
> > of a device tree node where they need to be split into cells.
> >
> > Signed-off-by: Thierry Reding 
> > ---
> > Changes in v2:
> > - new patch
> >
> >  include/fdtdec.h | 25 +
> >  1 file changed, 25 insertions(+)
> >
> > diff --git a/include/fdtdec.h b/include/fdtdec.h
> > index a965c33157c9..a0ba57c6318b 100644
> > --- a/include/fdtdec.h
> > +++ b/include/fdtdec.h
> > @@ -23,6 +23,31 @@
> >   */
> >  typedef phys_addr_t fdt_addr_t;
> >  typedef phys_size_t fdt_size_t;
> > +
> > +static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
> > +{
> > +   if (upper)
> > +#ifdef CONFIG_PHYS_64BIT
> 
> Could we use 'if IS_ENABLED()' instead?

Are you suggesting to use IS_ENABLED() in a preprocessor #if or a
compiler if (IS_ENABLED(...)) { ... } construct? For the former, yes we
could certainly do that.

The latter would probably work as well if we did something like this:

> > +   *upper = addr >> 32;

*upper = upper_32_bits(addr);

where upper_32_bits() is a macro such as the one defined in Linux'
include/linux/kernel.h. That prevents the right-shift of 32 bits for
32-bit quantities to not produce a warning.

That said, I see that we already have that macro in U-Boot's kernel.h
header file, so I could switch to using that. With that I think we could
even leave out the conditional. The compiler would hopefully optimize it
(the upper_32_bits() invocation) out by itself.

I'll do some testing and respin if that works out.

Thierry

> > +#else
> > +   *upper = 0;
> > +#endif
> > +
> > +   return addr;
> > +}
> > +
> > +static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper)
> > +{
> > +   if (upper)
> > +#ifdef CONFIG_PHYS_64BIT
> > +   *upper = size >> 32;
> > +#else
> > +   *upper = 0;
> > +#endif
> > +
> > +   return size;
> > +}
> > +
> >  #ifdef CONFIG_PHYS_64BIT
> >  #define FDT_ADDR_T_NONE (-1U)
> >  #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
> > --
> > 2.21.0
> >
> 
> Regards,
> Simon


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Re: [U-Boot] [PATCH v3 04/13] fdtdec: Implement fdtdec_set_phandle()

[Thierry Reding]

On Fri, Mar 22, 2019 at 03:53:01PM +0800, Simon Glass wrote:
> Hi Thierry,
> 
> On Fri, 22 Mar 2019 at 02:10, Thierry Reding  wrote:
> >
> > From: Thierry Reding 
> >
> > This function can be used to set a phandle for a given node.
> >
> > Signed-off-by: Thierry Reding 
> > ---
> > Changes in v2:
> > - don't emit deprecated linux,phandle property
> >
> >  include/fdtdec.h | 11 +++
> >  lib/fdtdec.c |  7 +++
> >  2 files changed, 18 insertions(+)
> >
> > diff --git a/include/fdtdec.h b/include/fdtdec.h
> > index a0ba57c6318b..55600026c488 100644
> > --- a/include/fdtdec.h
> > +++ b/include/fdtdec.h
> > @@ -981,6 +981,17 @@ int fdtdec_setup_mem_size_base(void);
> >   */
> >  int fdtdec_setup_memory_banksize(void);
> >
> > +/**
> > + * fdtdec_set_phandle() - sets the phandle of a given node
> > + *
> > + * @param blob FDT blob
> > + * @param node offset in the FDT blob of the node whose phandle is 
> > to
> > + * be set
> > + * @param phandle  phandle to set for the given node
> > + * @return 0 on success or a negative error code on failure
> > + */
> > +int fdtdec_set_phandle(void *blob, int node, uint32_t phandle);
> > +
> >  /**
> >   * Set up the device tree ready for use
> >   */
> > diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> > index 09a7e133a539..00db90e3cdfd 100644
> > --- a/lib/fdtdec.c
> > +++ b/lib/fdtdec.c
> > @@ -1243,6 +1243,13 @@ __weak void *board_fdt_blob_setup(void)
> >  }
> >  #endif
> >
> > +int fdtdec_set_phandle(void *blob, int node, uint32_t phandle)
> > +{
> > +   fdt32_t value = cpu_to_fdt32(phandle);
> > +
> > +   return fdt_setprop(blob, node, "phandle", , sizeof(value));
> 
> Can we use fdt_setprop_u32() instead?

Yeah, we could. I'm not sure if after that optimization it's even worth
keeping the extra wrapper. There may be some benefit in having a
separate name for this because it's a somewhat special purpose. Maybe I
should make it a static inline function instead?

Thierry

> 
> > +}
> > +
> >  int fdtdec_setup(void)
> >  {
> >  #if CONFIG_IS_ENABLED(OF_CONTROL)
> > --
> > 2.21.0
> >
> 
> Regards,
> Simon


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Re: [U-Boot] [PATCH v3 10/13] fdtdec: test: Add carveout tests

[Thierry Reding]

On Fri, Mar 22, 2019 at 03:53:07PM +0800, Simon Glass wrote:
> Hi Thierry,
> 
> On Fri, 22 Mar 2019 at 02:10, Thierry Reding  wrote:
> >
> > From: Thierry Reding 
> >
> > Implement carveout tests for 32-bit and 64-bit builds.
> >
> > Signed-off-by: Thierry Reding 
> > ---
> > Changes in v2:
> > - new patch
> >
> >  lib/fdtdec_test.c | 152 ++
> >  1 file changed, 152 insertions(+)
> 
> Reviewed-by: Simon Glass 
> 
> Just an idea - as an alternative you could use the built-in device
> tree as your base rather than creating a new one. But perhaps that
> would only be safe on sandbox?

Yeah, running that test on a live system would mess up the reserved
memory regions. If U-Boot does something based on the reserved-memory
node, or passes it on to the kernel, that's going to cause issues.

The test also uses rather arbitrary values for the carveout, which may
not point at system memory at all.

Thierry


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Re: [U-Boot] [REGRESSION] tegra124: nyan-big: LPAE not working

[Thierry Reding]

On Mon, Feb 11, 2019 at 10:04:37AM +, Tristan Bastian wrote:
> 
> 
> 
> Thierry Reding – Mon, 11. February 2019 10:38
> > On Mon, Feb 11, 2019 at 09:20:33AM +, Tristan Bastian wrote:
> > > 
> > > Thierry Reding – Mon, 11. February 2019 9:52
> > > > On Sun, Feb 10, 2019 at 08:53:11PM +0100, Tristan Bastian wrote:
> > > > > Thierry, do you have any news on this?
> > > > > 
> > > > > I don't think, that google is going to push an updated version of
> > coreboot
> > > > > to each nyan-big device..
> > > > > So reverting this patch at least for the nyan devices would be the 
> > > > > best
> > I
> > > > > think..
> > > > 
> > > > Yes, I agree. I had a brief chat with Rob Herring about this and he too
> > > > agrees that we should revert it for now. I'll make it a manual revert
> > > > and add a comment to the device tree node that will hopefully avoid any
> > > > future janitorial "cleanups" of this sort.
> > > 
> > > great news! :)
> > > 
> > > > > BTW: I'm now running u-boot natively and it seems like u-boot always 
> > > > > has
> > a
> > > > > problem with the memory..
> > > > > If u-boot is used chainloaded to coreboot it is only getting 2GB of
> > memory
> > > > > and running u-boot natively also just gives me 2GB..
> > > > > I've tested that with a kernel with "ARM: tegra: Fix 
> > > > > unit_address_vs_reg
> > DTC
> > > > > warnings for /memory" reverted and also on a kernel, before this patch
> > was
> > > > > applied..
> > > > 
> > > > It's possible that U-Boot doesn't support LPAE and therefore may not be
> > > > able to use more than the 2 GiB of memory.
> > > 
> > > So I at least enabled LPAE in u-boot with "CONFIG_ARMV7_LPAE=y" and
> > > this was for some reason also needed to get some output on the
> > > display..
> > > I'm not sure why LPAE needs to activated in u-boot for display output
> > > on the nyan-big..
> > > Without LPAE enabled u-boot was still working, and booted linux, but
> > > u-boot didn't display anything on screen, linux then did..
> > 
> > Yeah, that's surprising. Perhaps without LPAE U-Boot thinks there's not
> > enough memory for the framebuffer? There should be plenty, so maybe
> > there is something else going on here.
> > 
> > > > However, U-Boot should be
> > > > able to tell the kernel exactly how much memory the system has and pass
> > > > that on via device tree. That still does work, right?
> > > 
> > > It seems like this is not working..
> > > And this seems to be the case with both, u-boot chainloaded and
> > > running u-boot natively..
> > > 
> > > I've used these scripts for flashing:
> > > github.com/NVIDIA/tegra-uboot-flasher-scripts
> > > And used the norrin device since it seems like it is the nyan-big dev
> > > board?
> > > But going with the norrin device config should not be the issue here
> > > since the problem also exists when chainloading u-boot, right?
> > 
> > It could be a problem. The memory bank configuration is stored in what's
> > called a BCT along with a bunch of other parameters that define what the
> > memory controller needs to access the given memory chips. So if you've
> > flashed a BCT that's for a board with only 2 GiB of memory you would end
> > up with a system that can't address any more than that. It's somewhat
> > surprising that memory accesses work at all with a BCT that's for
> > different memory chips, but sometimes you can get lucky.
> > 
> > You may want to try reflashing with the right BCT. The simplest would
> > probably be to duplicate the cbootimage configuration for Norrin and
> > substitute the relevant bits by what you have from the Chromebook flash
> > utilities. Looks like the BCT in really the only thing you can replace
> > there. Make sure to replace it with the one that matches your Chromebook
> > and it should give you the right memory bank configuration.
> 
> Is there a way to check if the correct bct for my 4GB model was used?
> What I tried was to edit the existing bct config file of norrin from here:
> https://github.com/NVIDIA/cbootimage-configs/blob/master/tegra124/nvidia/norrin/PM370_Hynix_2GB_H5TC4G63AFR_PBA_924MHz_01212014.bct.cfg
> by replacing all entries for each memory bank with the ent

[U-Boot] [PATCH 1/2] fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle()

[Thierry Reding]

From: Thierry Reding 

The fdt_setprop_u32() function does everything that we need, so we
really only use the function as a convenience wrapper, in which case it
can simply be a static inline function.

Signed-off-by: Thierry Reding 
---
 include/fdtdec.h | 5 -
 lib/fdtdec.c | 7 ---
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 266c58271f0b..110aa6ab6dea 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -1029,7 +1029,10 @@ int fdtdec_setup_memory_banksize(void);
  * @param phandle  phandle to set for the given node
  * @return 0 on success or a negative error code on failure
  */
-int fdtdec_set_phandle(void *blob, int node, uint32_t phandle);
+static inline int fdtdec_set_phandle(void *blob, int node, uint32_t phandle)
+{
+   return fdt_setprop_u32(blob, node, "phandle", phandle);
+}
 
 /**
  * fdtdec_add_reserved_memory() - add or find a reserved-memory node
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 9c9c30234732..fea44a9a8c65 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1261,13 +1261,6 @@ __weak void *board_fdt_blob_setup(void)
 }
 #endif
 
-int fdtdec_set_phandle(void *blob, int node, uint32_t phandle)
-{
-   fdt32_t value = cpu_to_fdt32(phandle);
-
-   return fdt_setprop(blob, node, "phandle", , sizeof(value));
-}
-
 static int fdtdec_init_reserved_memory(void *blob)
 {
int na, ns, node, err;
-- 
2.21.0

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[U-Boot] [PATCH 2/2] fdtdec: Remove fdt_{addr,size}_unpack()

[Thierry Reding]

From: Thierry Reding 

U-Boot already defines the {upper,lower}_32_bits() macros that have the
same purpose. Use the existing macros instead of defining new APIs.

Signed-off-by: Thierry Reding 
---
 include/fdtdec.h  | 24 
 lib/fdtdec.c  |  8 ++--
 lib/fdtdec_test.c |  8 ++--
 3 files changed, 12 insertions(+), 28 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 110aa6ab6dea..fa8e34f6f960 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -24,30 +24,6 @@
 typedef phys_addr_t fdt_addr_t;
 typedef phys_size_t fdt_size_t;
 
-static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
-{
-   if (upper)
-#ifdef CONFIG_PHYS_64BIT
-   *upper = addr >> 32;
-#else
-   *upper = 0;
-#endif
-
-   return addr;
-}
-
-static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper)
-{
-   if (upper)
-#ifdef CONFIG_PHYS_64BIT
-   *upper = size >> 32;
-#else
-   *upper = 0;
-#endif
-
-   return size;
-}
-
 #ifdef CONFIG_PHYS_64BIT
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index fea44a9a8c65..d0ba88897335 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
fdt32_t cells[4] = {}, *ptr = cells;
uint32_t upper, lower, phandle;
int parent, node, na, ns, err;
+   fdt_size_t size;
char name[64];
 
/* create an empty /reserved-memory node if one doesn't exist */
@@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
 * Unpack the start address and generate the name of the new node
 * base on the basename and the unit-address.
 */
-   lower = fdt_addr_unpack(carveout->start, );
+   upper = upper_32_bits(carveout->start);
+   lower = lower_32_bits(carveout->start);
 
if (na > 1 && upper > 0)
snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
@@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
*ptr++ = cpu_to_fdt32(lower);
 
/* store one or two size cells */
-   lower = fdt_size_unpack(carveout->end - carveout->start + 1, );
+   size = carveout->end - carveout->start + 1;
+   upper = upper_32_bits(size);
+   lower = lower_32_bits(size);
 
if (ns > 1)
*ptr++ = cpu_to_fdt32(upper);
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index f6defe16c5a6..1f4f27054057 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t 
na, uint32_t ns)
};
fdt32_t cells[4], *ptr = cells;
uint32_t upper, lower;
+   fdt_size_t size;
char name[32];
int offset;
 
/* store one or two address cells */
-   lower = fdt_addr_unpack(carveout.start, );
+   upper = upper_32_bits(carveout.start);
+   lower = lower_32_bits(carveout.start);
 
if (na > 1 && upper > 0)
snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
@@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, 
uint32_t ns)
*ptr++ = cpu_to_fdt32(lower);
 
/* store one or two size cells */
-   lower = fdt_size_unpack(carveout.end - carveout.start + 1, );
+   size = carveout.end - carveout.start + 1;
+   upper = upper_32_bits(size);
+   lower = lower_32_bits(size);
 
if (ns > 1)
*ptr++ = cpu_to_fdt32(upper);
-- 
2.21.0

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Re: [U-Boot] [PATCH v3 03/13] fdtdec: Add fdt_{addr, size}_unpack() helpers

[Thierry Reding]

On Fri, Apr 12, 2019 at 03:45:53PM -0600, Simon Glass wrote:
> Hi Thierry,
> 
> On Fri, 22 Mar 2019 at 02:31, Thierry Reding  wrote:
> >
> > On Fri, Mar 22, 2019 at 03:53:00PM +0800, Simon Glass wrote:
> > > Hi Thierry,
> > >
> > > On Fri, 22 Mar 2019 at 02:10, Thierry Reding  
> > > wrote:
> > > >
> > > > From: Thierry Reding 
> > > >
> > > > These helpers can be used to unpack variables of type fdt_addr_t and
> > > > fdt_size_t into a pair of 32-bit variables. This is useful in cases
> > > > where such variables need to be written to properties (such as "reg")
> > > > of a device tree node where they need to be split into cells.
> > > >
> > > > Signed-off-by: Thierry Reding 
> > > > ---
> > > > Changes in v2:
> > > > - new patch
> > > >
> > > >  include/fdtdec.h | 25 +
> > > >  1 file changed, 25 insertions(+)
> > > >
> > > > diff --git a/include/fdtdec.h b/include/fdtdec.h
> > > > index a965c33157c9..a0ba57c6318b 100644
> > > > --- a/include/fdtdec.h
> > > > +++ b/include/fdtdec.h
> > > > @@ -23,6 +23,31 @@
> > > >   */
> > > >  typedef phys_addr_t fdt_addr_t;
> > > >  typedef phys_size_t fdt_size_t;
> > > > +
> > > > +static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
> > > > +{
> > > > +   if (upper)
> > > > +#ifdef CONFIG_PHYS_64BIT
> > >
> > > Could we use 'if IS_ENABLED()' instead?
> >
> > Are you suggesting to use IS_ENABLED() in a preprocessor #if or a
> > compiler if (IS_ENABLED(...)) { ... } construct? For the former, yes we
> > could certainly do that.
> >
> > The latter would probably work as well if we did something like this:
> >
> > > > +   *upper = addr >> 32;
> >
> > *upper = upper_32_bits(addr);
> >
> > where upper_32_bits() is a macro such as the one defined in Linux'
> > include/linux/kernel.h. That prevents the right-shift of 32 bits for
> > 32-bit quantities to not produce a warning.
> >
> > That said, I see that we already have that macro in U-Boot's kernel.h
> > header file, so I could switch to using that. With that I think we could
> > even leave out the conditional. The compiler would hopefully optimize it
> > (the upper_32_bits() invocation) out by itself.
> >
> > I'll do some testing and respin if that works out.
> 
> Applied to u-boot-dm, thanks!
> 
> Please do a fixup patch if this works out. I hope I didn't miss an 
> email/patch.

Sorry, I had been meaning to send out a v4 of the series, but it took me
too long. I just sent out a couple of follow-up patches for this:

http://patchwork.ozlabs.org/project/uboot/list/?series=102732

Thierry


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[U-Boot] [PATCH 1/3] dm: core: Add dev_read_bytes()

[Thierry Reding]

From: Thierry Reding 

This function can be used to read a binary property into a buffer. One
example where this is needed is to read a MAC address from device tree.

Signed-off-by: Thierry Reding 
---
 drivers/core/of_access.c | 21 +
 drivers/core/ofnode.c| 13 +
 drivers/core/read.c  |  6 ++
 include/dm/of_access.h   | 15 +++
 include/dm/ofnode.h  | 11 +++
 include/dm/read.h| 17 +
 6 files changed, 83 insertions(+)

diff --git a/drivers/core/of_access.c b/drivers/core/of_access.c
index 945b81448cce..d110d171a3ea 100644
--- a/drivers/core/of_access.c
+++ b/drivers/core/of_access.c
@@ -446,6 +446,27 @@ static void *of_find_property_value_of_size(const struct 
device_node *np,
return prop->value;
 }
 
+int of_read_bytes(const struct device_node *np, const char *propname,
+ u8 *buffer, int size)
+{
+   const fdt32_t *value;
+
+   debug("%s: %s: ", __func__, propname);
+
+   if (!np)
+   return -EINVAL;
+
+   value = of_find_property_value_of_size(np, propname, size);
+   if (IS_ERR(value)) {
+   debug("(not found)\n");
+   return PTR_ERR(value);
+   }
+
+   memcpy(buffer, value, size);
+
+   return 0;
+}
+
 int of_read_u32(const struct device_node *np, const char *propname, u32 *outp)
 {
const __be32 *val;
diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 785f5c3acf7a..21b24e5aa00e 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -15,6 +15,19 @@
 #include 
 #include 
 
+int ofnode_read_bytes(ofnode node, const char *propname, u8 *buffer, int size)
+{
+   assert(ofnode_valid(node));
+   debug("%s: %s: ", __func__, propname);
+
+   if (ofnode_is_np(node))
+   return of_read_bytes(ofnode_to_np(node), propname, buffer,
+size);
+
+   return fdtdec_get_byte_array(gd->fdt_blob, ofnode_to_offset(node),
+propname, buffer, size);
+}
+
 int ofnode_read_u32(ofnode node, const char *propname, u32 *outp)
 {
assert(ofnode_valid(node));
diff --git a/drivers/core/read.c b/drivers/core/read.c
index 6bda077a34b9..9919ec19d4d8 100644
--- a/drivers/core/read.c
+++ b/drivers/core/read.c
@@ -11,6 +11,12 @@
 #include 
 #include 
 
+int dev_read_bytes(struct udevice *dev, const char *propname, u8 *buffer,
+  int size)
+{
+   return ofnode_read_bytes(dev_ofnode(dev), propname, buffer, size);
+}
+
 int dev_read_u32(struct udevice *dev, const char *propname, u32 *outp)
 {
return ofnode_read_u32(dev_ofnode(dev), propname, outp);
diff --git a/include/dm/of_access.h b/include/dm/of_access.h
index 13fedb7cf5e6..fc6a86959b23 100644
--- a/include/dm/of_access.h
+++ b/include/dm/of_access.h
@@ -218,6 +218,21 @@ struct device_node *of_find_node_by_prop_value(struct 
device_node *from,
  */
 struct device_node *of_find_node_by_phandle(phandle handle);
 
+/**
+ * of_read_bytes() - Find and read an array of bytes from a property
+ *
+ * Search for a property in a device node and read an array of bytes from it.
+ *
+ * @np: device node from which the property is to be read
+ * @propname: name of the property to be read
+ * @buffer: buffer to read the property value into
+ * @size: number of bytes to read
+ *
+ * @return 0 on success, or a negative error-code on failure.
+ */
+int of_read_bytes(const struct device_node *np, const char *propname,
+ u8 *buffer, int size);
+
 /**
  * of_read_u32() - Find and read a 32-bit integer from a property
  *
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index d206ee2caab7..5158296dfd96 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -192,6 +192,17 @@ static inline ofnode ofnode_null(void)
return node;
 }
 
+/**
+ * ofnode_read_bytes() - Read an array of bytes from a property
+ *
+ * @node: valid node reference to read property from
+ * @propname: name of the property to read from
+ * @buffer: buffer to read the value into
+ * @size: size of @buffer
+ * @return 0 on success, or a negative error code on failure
+ */
+int ofnode_read_bytes(ofnode node, const char *propname, u8 *buffer, int size);
+
 /**
  * ofnode_read_u32() - Read a 32-bit integer from a property
  *
diff --git a/include/dm/read.h b/include/dm/read.h
index 60b727cbd821..cb9776b39721 100644
--- a/include/dm/read.h
+++ b/include/dm/read.h
@@ -44,6 +44,18 @@ static inline bool dev_of_valid(struct udevice *dev)
 }
 
 #ifndef CONFIG_DM_DEV_READ_INLINE
+/**
+ * dev_read_bytes() - read an array of bytes from a device's DT property
+ *
+ * @dev: device to read DT property from
+ * @propname: name of the property to read from
+ * @buffer: buffer to read the value into
+ * @size: size of @buffer
+ * @return 0 on success, or a negative error code on failure
+ */
+int dev_read_bytes(struct udevice *d

[U-Boot] [PATCH 3/3] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

From: Thierry Reding 

Add the standard Ethernet device tree bindings (imported from v5.0 of
the Linux kernel) and implement support for reading the MAC address for
Ethernet devices in the Ethernet uclass. If the "mac-address" property
exists, the MAC address will be parsed from that. If that property does
not exist, the "local-mac-address" property will be tried as fallback.

MAC addresses from device tree take precedence over the ones stored in
a network interface card's ROM.

Signed-off-by: Thierry Reding 
---
 .../devicetree/bindings/net/ethernet.txt  | 66 +++
 net/eth-uclass.c  | 23 ++-
 2 files changed, 86 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt

diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
b/Documentation/devicetree/bindings/net/ethernet.txt
new file mode 100644
index ..cfc376bc977a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet.txt
@@ -0,0 +1,66 @@
+The following properties are common to the Ethernet controllers:
+
+NOTE: All 'phy*' properties documented below are Ethernet specific. For the
+generic PHY 'phys' property, see
+Documentation/devicetree/bindings/phy/phy-bindings.txt.
+
+- local-mac-address: array of 6 bytes, specifies the MAC address that was
+  assigned to the network device;
+- mac-address: array of 6 bytes, specifies the MAC address that was last used 
by
+  the boot program; should be used in cases where the MAC address assigned to
+  the device by the boot program is different from the "local-mac-address"
+  property;
+- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
+- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
+- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
+- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
+  the maximum frame size (there's contradiction in the Devicetree
+  Specification).
+- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
+  standard property; supported values are:
+  * "internal"
+  * "mii"
+  * "gmii"
+  * "sgmii"
+  * "qsgmii"
+  * "tbi"
+  * "rev-mii"
+  * "rmii"
+  * "rgmii" (RX and TX delays are added by the MAC when required)
+  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
+ MAC should not add the RX or TX delays in this case)
+  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
+ should not add an RX delay in this case)
+  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
+ should not add an TX delay in this case)
+  * "rtbi"
+  * "smii"
+  * "xgmii"
+  * "trgmii"
+  * "2000base-x",
+  * "2500base-x",
+  * "rxaui"
+  * "xaui"
+  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
+- phy-connection-type: the same as "phy-mode" property but described in the
+  Devicetree Specification;
+- phy-handle: phandle, specifies a reference to a node representing a PHY
+  device; this property is described in the Devicetree Specification and so
+  preferred;
+- phy: the same as "phy-handle" property, not recommended for new bindings.
+- phy-device: the same as "phy-handle" property, not recommended for new
+  bindings.
+- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
+  is used for components that can have configurable receive fifo sizes,
+  and is useful for determining certain configuration settings such as
+  flow control thresholds.
+- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
+  is used for components that can have configurable fifo sizes.
+- managed: string, specifies the PHY management type. Supported values are:
+  "auto", "in-band-status". "auto" is the default, it usess MDIO for
+  management if fixed-link is not specified.
+
+Child nodes of the Ethernet controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+They are described in the phy.txt file in this same directory.
+For non-MDIO PHY management see fixed-link.txt.
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 4225aabf1fa1..6bc7efbcdf9c 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -455,6 +455,20 @@ static int eth_pre_unbind(struct udevice *dev)
return 0;
 }
 
+static int eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN])
+{
+   int err;
+
+   err = dev_read_bytes(dev, "mac-address", mac, ARP_HLEN);
+   if (err < 0)
+   err = dev_read_bytes(dev, "local-mac-address", mac, ARP_HLEN);
+
+   if (err

[U-Boot] [PATCH 2/3] net: eth-uclass: Write MAC address to hardware after probe

[Thierry Reding]

From: Thierry Reding 

In order for the device to use the proper MAC address, which can have
been configured in the environment prior to the device being registered,
ensure that the MAC address is written after the device has been probed.
For devices that are registered before the network stack is initialized,
this is already done during eth_initialize(). If the Ethernet device is
on a bus that is not initialized on early boot, such as PCI, the device
is not available at the time eth_initialize() is called, so we need the
MAC address programming to also happen after probe.

Signed-off-by: Thierry Reding 
---
 net/eth-uclass.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 2ef20df19203..4225aabf1fa1 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev)
 #endif
}
 
+   eth_write_hwaddr(dev);
+
return 0;
 }
 
-- 
2.21.0

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[U-Boot] [PATCH v5 04/27] ARM: tegra: Remove disp1 clock initialization on Tegra210

[Thierry Reding]

From: Thierry Reding 

pll_c is not a valid parent for the disp1 clock, so trying to set it
will fail. Given that display is not used in U-Boot, remove the init
table entry so that disp1 will keep its default parent (clk_m).

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/tegra210/clock.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/mach-tegra/tegra210/clock.c 
b/arch/arm/mach-tegra/tegra210/clock.c
index 0d7cafea2017..b240860f08cf 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -1265,7 +1265,6 @@ struct periph_clk_init periph_clk_init_table[] = {
{ PERIPH_ID_SBC5, CLOCK_ID_PERIPH },
{ PERIPH_ID_SBC6, CLOCK_ID_PERIPH },
{ PERIPH_ID_HOST1X, CLOCK_ID_PERIPH },
-   { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL },
{ PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH },
{ PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH },
-- 
2.21.0

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[U-Boot] [PATCH v5 03/27] ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210

[Thierry Reding]

From: Thierry Reding 

On Tegra210 the parents for the disp1 and disp2 clocks are slightly
different from earlier chips. Only pll_p, pll_d_out0, pll_d2_out0 and
clk_m are valid parents (technically pll_d_out is as well, but U-Boot
doesn't know anything about it). Fix up the type name and the mux
definition.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/tegra210/clock.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-tegra/tegra210/clock.c 
b/arch/arm/mach-tegra/tegra210/clock.c
index 06068c4b7b8d..0d7cafea2017 100644
--- a/arch/arm/mach-tegra/tegra210/clock.c
+++ b/arch/arm/mach-tegra/tegra210/clock.c
@@ -40,7 +40,7 @@ enum clock_type_id {
CLOCK_TYPE_PDCT,
CLOCK_TYPE_ACPT,
CLOCK_TYPE_ASPTE,
-   CLOCK_TYPE_PMDACD2T,
+   CLOCK_TYPE_PDD2T,
CLOCK_TYPE_PCST,
CLOCK_TYPE_DP,
 
@@ -97,8 +97,8 @@ static enum clock_id 
clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
{ CLK(AUDIO),   CLK(SFROM32KHZ),CLK(PERIPH),CLK(OSC),
CLK(EPCI),  CLK(NONE),  CLK(NONE),  CLK(NONE),
MASK_BITS_31_29},
-   { CLK(PERIPH),  CLK(MEMORY),CLK(DISPLAY),   CLK(AUDIO),
-   CLK(CGENERAL),  CLK(DISPLAY2),  CLK(OSC),   CLK(NONE),
+   { CLK(PERIPH),  CLK(NONE),  CLK(DISPLAY),   CLK(NONE),
+   CLK(NONE),  CLK(DISPLAY2),  CLK(OSC),   CLK(NONE),
MASK_BITS_31_29},
{ CLK(PERIPH),  CLK(CGENERAL),  CLK(SFROM32KHZ),CLK(OSC),
CLK(NONE),  CLK(NONE),  CLK(NONE),  CLK(NONE),
@@ -174,8 +174,8 @@ static enum clock_type_id clock_periph_type[PERIPHC_COUNT] 
= {
TYPE(PERIPHC_0bh,   CLOCK_TYPE_NONE),
TYPE(PERIPHC_0ch,   CLOCK_TYPE_NONE),
TYPE(PERIPHC_SBC1,  CLOCK_TYPE_PC2CC3M_T),
-   TYPE(PERIPHC_DISP1, CLOCK_TYPE_PMDACD2T),
-   TYPE(PERIPHC_DISP2, CLOCK_TYPE_PMDACD2T),
+   TYPE(PERIPHC_DISP1, CLOCK_TYPE_PDD2T),
+   TYPE(PERIPHC_DISP2, CLOCK_TYPE_PDD2T),
 
/* 0x10 */
TYPE(PERIPHC_10h,   CLOCK_TYPE_NONE),
-- 
2.21.0

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[U-Boot] [PATCH v5 05/27] ARM: tegra: Use common header for PMU declarations

[Thierry Reding]

From: Thierry Reding 

There's no need to replicate the pmu.h header file for every Tegra SoC
generation. Use a single header that is shared across generations.

Signed-off-by: Thierry Reding 
---
 .../include/asm/{arch-tegra20 => arch-tegra}/pmu.h  |  6 +++---
 arch/arm/include/asm/arch-tegra114/pmu.h| 12 
 arch/arm/include/asm/arch-tegra124/pmu.h| 13 -
 arch/arm/include/asm/arch-tegra210/pmu.h| 13 -
 arch/arm/include/asm/arch-tegra30/pmu.h | 12 
 arch/arm/mach-tegra/board2.c|  2 +-
 arch/arm/mach-tegra/emc.c   |  2 +-
 7 files changed, 5 insertions(+), 55 deletions(-)
 rename arch/arm/include/asm/{arch-tegra20 => arch-tegra}/pmu.h (73%)
 delete mode 100644 arch/arm/include/asm/arch-tegra114/pmu.h
 delete mode 100644 arch/arm/include/asm/arch-tegra124/pmu.h
 delete mode 100644 arch/arm/include/asm/arch-tegra210/pmu.h
 delete mode 100644 arch/arm/include/asm/arch-tegra30/pmu.h

diff --git a/arch/arm/include/asm/arch-tegra20/pmu.h 
b/arch/arm/include/asm/arch-tegra/pmu.h
similarity index 73%
rename from arch/arm/include/asm/arch-tegra20/pmu.h
rename to arch/arm/include/asm/arch-tegra/pmu.h
index 18766dfed2bb..e850875d3166 100644
--- a/arch/arm/include/asm/arch-tegra20/pmu.h
+++ b/arch/arm/include/asm/arch-tegra/pmu.h
@@ -4,10 +4,10 @@
  *  NVIDIA Corporation 
  */
 
-#ifndef _ARCH_PMU_H_
-#define _ARCH_PMU_H_
+#ifndef _TEGRA_PMU_H_
+#define _TEGRA_PMU_H_
 
 /* Set core and CPU voltages to nominal levels */
 int pmu_set_nominal(void);
 
-#endif /* _ARCH_PMU_H_ */
+#endif /* _TEGRA_PMU_H_ */
diff --git a/arch/arm/include/asm/arch-tegra114/pmu.h 
b/arch/arm/include/asm/arch-tegra114/pmu.h
deleted file mode 100644
index 1e571ee7b317..
--- a/arch/arm/include/asm/arch-tegra114/pmu.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2010-2013, NVIDIA CORPORATION.  All rights reserved.
- */
-
-#ifndef _TEGRA114_PMU_H_
-#define _TEGRA114_PMU_H_
-
-/* Set core and CPU voltages to nominal levels */
-int pmu_set_nominal(void);
-
-#endif /* _TEGRA114_PMU_H_ */
diff --git a/arch/arm/include/asm/arch-tegra124/pmu.h 
b/arch/arm/include/asm/arch-tegra124/pmu.h
deleted file mode 100644
index c38393edefda..
--- a/arch/arm/include/asm/arch-tegra124/pmu.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2010-2013
- * NVIDIA Corporation 
- */
-
-#ifndef _TEGRA124_PMU_H_
-#define _TEGRA124_PMU_H_
-
-/* Set core and CPU voltages to nominal levels */
-int pmu_set_nominal(void);
-
-#endif /* _TEGRA124_PMU_H_ */
diff --git a/arch/arm/include/asm/arch-tegra210/pmu.h 
b/arch/arm/include/asm/arch-tegra210/pmu.h
deleted file mode 100644
index 6ea36aa41876..
--- a/arch/arm/include/asm/arch-tegra210/pmu.h
+++ /dev/null
@@ -1,13 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2010-2015
- * NVIDIA Corporation 
- */
-
-#ifndef _TEGRA210_PMU_H_
-#define _TEGRA210_PMU_H_
-
-/* Set core and CPU voltages to nominal levels */
-int pmu_set_nominal(void);
-
-#endif /* _TEGRA210_PMU_H_ */
diff --git a/arch/arm/include/asm/arch-tegra30/pmu.h 
b/arch/arm/include/asm/arch-tegra30/pmu.h
deleted file mode 100644
index a823f0fbfc61..
--- a/arch/arm/include/asm/arch-tegra30/pmu.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2010-2012, NVIDIA CORPORATION.  All rights reserved.
- */
-
-#ifndef _TEGRA30_PMU_H_
-#define _TEGRA30_PMU_H_
-
-/* Set core and CPU voltages to nominal levels */
-int pmu_set_nominal(void);
-
-#endif /* _TEGRA30_PMU_H_ */
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index 12257a42b51b..b8d5ef0322cb 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -15,6 +15,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -24,7 +25,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #ifdef CONFIG_TEGRA_CLOCK_SCALING
 #include 
diff --git a/arch/arm/mach-tegra/emc.c b/arch/arm/mach-tegra/emc.c
index 6697909d9a3e..66628933b653 100644
--- a/arch/arm/mach-tegra/emc.c
+++ b/arch/arm/mach-tegra/emc.c
@@ -8,10 +8,10 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 
 DECLARE_GLOBAL_DATA_PTR;
-- 
2.21.0

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[U-Boot] [PATCH v5 12/27] ARM: tegra: Allow boards to override boot target devices

[Thierry Reding]

From: Thierry Reding 

Boards may not support all the boot target devices in the default list
for Tegra devices. Allow a board to override the list and default to the
standard list only if the board hasn't specified one itself.

Signed-off-by: Thierry Reding 
---
 include/configs/tegra-common-post.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/configs/tegra-common-post.h 
b/include/configs/tegra-common-post.h
index e54428ba43e2..9685ee5059ab 100644
--- a/include/configs/tegra-common-post.h
+++ b/include/configs/tegra-common-post.h
@@ -21,12 +21,14 @@
 #define CONFIG_SYS_NONCACHED_MEMORY(1 << 20)   /* 1 MiB */
 
 #ifndef CONFIG_SPL_BUILD
+#ifndef BOOT_TARGET_DEVICES
 #define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
+#endif
 #include 
 #else
 #define BOOTENV
-- 
2.21.0

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[U-Boot] [PATCH v5 19/27] ARM: tegra: Import cbootargs value from cboot DTB

[Thierry Reding]

From: Thierry Reding 

Read the boot arguments passed by cboot via the /chosen/bootargs
property and store it in the cbootargs environment variable.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/cboot.c | 47 +
 1 file changed, 47 insertions(+)

diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index 628909f29137..a829ef794f2d 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -8,7 +8,9 @@
 #include 
 #include 
 #include 
+#include 
 
+#include 
 #include 
 
 #include 
@@ -546,10 +548,49 @@ out:
return err;
 }
 
+static char *strip(const char *ptr)
+{
+   const char *end;
+
+   while (*ptr && isblank(*ptr))
+   ptr++;
+
+   /* empty string */
+   if (*ptr == '\0')
+   return strdup(ptr);
+
+   end = ptr;
+
+   while (end[1])
+   end++;
+
+   while (isblank(*end))
+   end--;
+
+   return strndup(ptr, end - ptr + 1);
+}
+
+static char *cboot_get_bootargs(const void *fdt)
+{
+   const char *args;
+   int offset, len;
+
+   offset = fdt_path_offset(fdt, "/chosen");
+   if (offset < 0)
+   return NULL;
+
+   args = fdt_getprop(fdt, offset, "bootargs", );
+   if (!args)
+   return NULL;
+
+   return strip(args);
+}
+
 int cboot_late_init(void)
 {
const void *fdt = (const void *)cboot_boot_x0;
uint8_t mac[ETH_ALEN];
+   char *bootargs;
int err;
 
set_calculated_env_vars();
@@ -569,5 +610,11 @@ int cboot_late_init(void)
printf("failed to set MAC address %pM: %d\n", mac, err);
}
 
+   bootargs = cboot_get_bootargs(fdt);
+   if (bootargs) {
+   env_set("cbootargs", bootargs);
+   free(bootargs);
+   }
+
return 0;
 }
-- 
2.21.0

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[U-Boot] [PATCH v5 06/27] ARM: tegra: Guard clock code with a Kconfig symbol

[Thierry Reding]

From: Thierry Reding 

Clock code is not relevant on all Tegra SoC generations, so guard it
with a Kconfig symbol that can be selected by the generations that need
it.

This is in preparation for unifying Tegra186 code with the code used on
older generations.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig  |  5 +
 arch/arm/mach-tegra/Makefile |  2 +-
 arch/arm/mach-tegra/board.c  |  2 ++
 arch/arm/mach-tegra/board2.c | 12 ++--
 4 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 86b1cd11f752..ee078fec9adc 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -12,6 +12,9 @@ config SPL_LIBGENERIC_SUPPORT
 config SPL_SERIAL_SUPPORT
default y
 
+config TEGRA_CLKRST
+   bool
+
 config TEGRA_IVC
bool "Tegra IVC protocol"
help
@@ -55,6 +58,7 @@ config TEGRA_ARMV7_COMMON
select SPL
select SPL_BOARD_INIT if SPL
select SUPPORT_SPL
+   select TEGRA_CLKRST
select TEGRA_COMMON
select TEGRA_GPIO
select TEGRA_NO_BPMP
@@ -100,6 +104,7 @@ config TEGRA124
 config TEGRA210
bool "Tegra210 family"
select TEGRA_ARMV8_COMMON
+   select TEGRA_CLKRST
select TEGRA_GPIO
select TEGRA_NO_BPMP
 
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index d4b4666fb1e2..0e812818d7a2 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -16,7 +16,7 @@ endif
 obj-y += ap.o
 obj-y += board.o board2.o
 obj-y += cache.o
-obj-y += clock.o
+obj-$(CONFIG_TEGRA_CLKRST) += clock.o
 obj-y += pinmux-common.o
 obj-y += powergate.o
 obj-y += xusb-padctl-dummy.o
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index f8fc042a1dcc..ecd5001de4c5 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -9,7 +9,9 @@
 #include 
 #include 
 #include 
+#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
 #include 
+#endif
 #include 
 #include 
 #include 
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index b8d5ef0322cb..b94077221f77 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -22,7 +22,9 @@
 #include 
 #include 
 #include 
+#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
 #include 
+#endif
 #include 
 #include 
 #include 
@@ -109,8 +111,10 @@ int board_init(void)
__maybe_unused int board_id;
 
/* Do clocks and UART first so that printf() works */
+#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
clock_init();
clock_verify();
+#endif
 
tegra_gpu_config();
 
@@ -181,8 +185,10 @@ void gpio_early_init(void) __attribute__((weak, 
alias("__gpio_early_init")));
 
 int board_early_init_f(void)
 {
+#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
if (!clock_early_init_done())
clock_early_init();
+#endif
 
 #if defined(CONFIG_TEGRA_DISCONNECT_UDC_ON_BOOT)
 #define USBCMD_FS2 (1 << 15)
@@ -193,10 +199,12 @@ int board_early_init_f(void)
 #endif
 
/* Do any special system timer/TSC setup */
-#if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
+#if IS_ENABLED(CONFIG_TEGRA_CLKRST)
+#  if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE)
if (!tegra_cpu_is_non_secure())
-#endif
+#  endif
arch_timer_init();
+#endif
 
pinmux_init();
board_init_uart_f();
-- 
2.21.0

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[U-Boot] [PATCH v5 01/27] fdtdec: Add fdtdec_set_ethernet_mac_address()

[Thierry Reding]

From: Thierry Reding 

This function can be used to set the local MAC address for the default
Ethernet interface in its device tree node. The default interface is
identified by the "ethernet" alias.

One case where this is useful is for devices that store their MAC
address in a custom location. Once extracted, board code can store the
MAC address in U-Boot's control DTB so that it will automatically be
used by the Ethernet uclass.

Signed-off-by: Thierry Reding 
---
 include/fdtdec.h | 24 
 lib/fdtdec.c | 29 +
 2 files changed, 53 insertions(+)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index fa8e34f6f960..e6c22dd5cd5c 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -996,6 +996,30 @@ int fdtdec_setup_memory_banksize_fdt(const void *blob);
  */
 int fdtdec_setup_memory_banksize(void);
 
+/**
+ * fdtdec_set_ethernet_mac_address() - set MAC address for default interface
+ *
+ * Looks up the default interface via the "ethernet" alias (in the /aliases
+ * node) and stores the given MAC in its "local-mac-address" property. This
+ * is useful on platforms that store the MAC address in a custom location.
+ * Board code can call this in the late init stage to make sure that the
+ * interface device tree node has the right MAC address configured for the
+ * Ethernet uclass to pick it up.
+ *
+ * Typically the FDT passed into this function will be U-Boot's control DTB.
+ * Given that a lot of code may be holding offsets to various nodes in that
+ * tree, this code will only set the "local-mac-address" property in-place,
+ * which means that it needs to exist and have space for the 6-byte address.
+ * This ensures that the operation is non-destructive and does not invalidate
+ * offsets that other drivers may be using.
+ *
+ * @param fdt FDT blob
+ * @param mac buffer containing the MAC address to set
+ * @param size size of MAC address
+ * @return 0 on success or a negative error code on failure
+ */
+int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size);
+
 /**
  * fdtdec_set_phandle() - sets the phandle of a given node
  *
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index d0ba88897335..3ee786b57940 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1261,6 +1261,35 @@ __weak void *board_fdt_blob_setup(void)
 }
 #endif
 
+int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
+{
+   const char *path;
+   int offset, err;
+
+   if (!is_valid_ethaddr(mac))
+   return -EINVAL;
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path)
+   return 0;
+
+   debug("ethernet alias found: %s\n", path);
+
+   offset = fdt_path_offset(fdt, path);
+   if (offset < 0) {
+   debug("ethernet alias points to absent node %s\n", path);
+   return -ENOENT;
+   }
+
+   err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
+   if (err < 0)
+   return err;
+
+   debug("MAC address: %pM\n", mac);
+
+   return 0;
+}
+
 static int fdtdec_init_reserved_memory(void *blob)
 {
int na, ns, node, err;
-- 
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[U-Boot] [PATCH v5 16/27] ARM: tegra: Unify Tegra186 builds

[Thierry Reding]

From: Thierry Reding 

Tegra186 build are currently dealt with in very special ways, which is
because Tegra186 is fundamentally different in many respects. It is no
longer necessary to do many of the low-level programming because early
boot firmware will already have taken care of it.

Unfortunately, separating Tegra186 builds from the rest in this way
makes it difficult to share code with prior generations of Tegra. With
all of the low-level programming code behind Kconfig guards, the build
for Tegra186 can again be unified.

As a side-effect, and partial reason for this change, other Tegra SoC
generations can now make use of the code that deals with taking over a
boot from earlier bootloaders. This used to be nvtboot, but has been
replaced by cboot nowadays. Rename the files and functions related to
this to avoid confusion. The implemented protocols are unchanged.

Signed-off-by: Thierry Reding 
---
Changes in v4:
- consistently use /chosen/nvidia,ether-mac property

Changes in v3:
- load cboot DTB address to fdt_addr instead of fdtaddr

 arch/arm/include/asm/arch-tegra/cboot.h   |  39 
 arch/arm/mach-tegra/Makefile  |   4 +-
 arch/arm/mach-tegra/board.c   |  23 ++
 arch/arm/mach-tegra/board186.c|  32 ---
 arch/arm/mach-tegra/board2.c  |  21 ++
 .../{tegra186/nvtboot_board.c => cboot.c} | 200 --
 .../{tegra186/nvtboot_ll.S => cboot_ll.S} |  12 +-
 arch/arm/mach-tegra/tegra186/Makefile |   4 -
 arch/arm/mach-tegra/tegra186/nvtboot_mem.c| 172 ---
 board/nvidia/p2771-/p2771-.c  |  10 +-
 10 files changed, 278 insertions(+), 239 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-tegra/cboot.h
 delete mode 100644 arch/arm/mach-tegra/board186.c
 rename arch/arm/mach-tegra/{tegra186/nvtboot_board.c => cboot.c} (56%)
 rename arch/arm/mach-tegra/{tegra186/nvtboot_ll.S => cboot_ll.S} (57%)
 delete mode 100644 arch/arm/mach-tegra/tegra186/nvtboot_mem.c

diff --git a/arch/arm/include/asm/arch-tegra/cboot.h 
b/arch/arm/include/asm/arch-tegra/cboot.h
new file mode 100644
index ..b3441ec178b3
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/cboot.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2019 NVIDIA Corporation. All rights reserved.
+ */
+
+#ifndef _TEGRA_CBOOT_H_
+#define _TEGRA_CBOOT_H_
+
+#ifdef CONFIG_ARM64
+extern unsigned long cboot_boot_x0;
+
+void cboot_save_boot_params(unsigned long x0, unsigned long x1,
+   unsigned long x2, unsigned long x3);
+int cboot_dram_init(void);
+int cboot_dram_init_banksize(void);
+ulong cboot_get_usable_ram_top(ulong total_size);
+#else
+static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1,
+ unsigned long x2, unsigned long x3)
+{
+}
+
+static inline int cboot_dram_init(void)
+{
+   return -ENOSYS;
+}
+
+static inline int cboot_dram_init_banksize(void)
+{
+   return -ENOSYS;
+}
+
+static inline ulong cboot_get_usable_ram_top(ulong total_size)
+{
+   return 0;
+}
+#endif
+
+#endif
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index f8bc65aa8b18..41ba674edff4 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -5,7 +5,6 @@
 # (C) Copyright 2000-2008
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
 
-ifndef CONFIG_TEGRA186
 ifdef CONFIG_SPL_BUILD
 obj-y += spl.o
 obj-y += cpu.o
@@ -20,9 +19,8 @@ obj-$(CONFIG_TEGRA_CLKRST) += clock.o
 obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
 obj-$(CONFIG_TEGRA_PMC) += powergate.o
 obj-y += xusb-padctl-dummy.o
-endif
 
-obj-$(CONFIG_ARM64) += arm64-mmu.o
+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o
 obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 59d2f347485d..c3ba00811e83 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -21,6 +21,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -46,6 +47,21 @@ void save_boot_params(unsigned long r0, unsigned long r1, 
unsigned long r2,
  unsigned long r3)
 {
from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL;
+
+   /*
+* The logic for this is somewhat indirect. The purpose of the marker
+* (UBOOT_NOT_LOADED_FROM_SPL) is in fact used to determine if U-Boot
+* was loaded from a read-only instance of itself, which is something
+* that can happen in secure boot setups. So basically the presence
+* of the marker is an indication that U-Boot was loaded by one such
+* special variant of U-Boot. Conversely, the absence of the marker
+* indicates that this instance of U-Boot was loaded by something
+* other than a special U-Boot. This could be SPL, but i

[U-Boot] [PATCH v5 13/27] ARM: tegra: Support TZ-only access to PMC

[Thierry Reding]

From: Thierry Reding 

Some devices may restrict access to the PMC to TrustZone software only.
Non-TZ software can detect this and use SMC calls to the firmware that
runs in the TrustZone to perform accesses to PMC registers.

Note that this also fixes reset_cpu() and the enterrcm command on
Tegra186 where they were previously trying to access the PMC at a wrong
physical address.

Based on work by Kalyani Chidambaram  and Tom
Warren .

Signed-off-by: Thierry Reding 
---
 arch/arm/include/asm/arch-tegra/pmc.h   | 20 +-
 arch/arm/include/asm/arch-tegra/tegra.h |  6 ++
 arch/arm/mach-tegra/Kconfig |  5 ++
 arch/arm/mach-tegra/Makefile|  4 +-
 arch/arm/mach-tegra/clock.c | 13 ++--
 arch/arm/mach-tegra/cmd_enterrcm.c  |  6 +-
 arch/arm/mach-tegra/cpu.c   | 20 +++---
 arch/arm/mach-tegra/lowlevel_init.S | 39 ---
 arch/arm/mach-tegra/pmc.c   | 92 +
 arch/arm/mach-tegra/powergate.c | 11 +--
 10 files changed, 151 insertions(+), 65 deletions(-)
 delete mode 100644 arch/arm/mach-tegra/lowlevel_init.S
 create mode 100644 arch/arm/mach-tegra/pmc.c

diff --git a/arch/arm/include/asm/arch-tegra/pmc.h 
b/arch/arm/include/asm/arch-tegra/pmc.h
index 34bbe75d5fdb..1524bf291164 100644
--- a/arch/arm/include/asm/arch-tegra/pmc.h
+++ b/arch/arm/include/asm/arch-tegra/pmc.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- *  (C) Copyright 2010-2015
+ *  (C) Copyright 2010-2019
  *  NVIDIA Corporation 
  */
 
@@ -388,4 +388,22 @@ struct pmc_ctlr {
 /* APBDEV_PMC_CNTRL2_0 0x440 */
 #define HOLD_CKE_LOW_EN(1 << 12)
 
+/* PMC read/write functions */
+u32 tegra_pmc_readl(unsigned long offset);
+void tegra_pmc_writel(u32 value, unsigned long offset);
+
+#define PMC_CNTRL  0x0
+#define  PMC_CNTRL_MAIN_RSTBIT(4)
+
+#if IS_ENABLED(CONFIG_TEGRA186)
+#  define PMC_SCRATCH0 0x32000
+#else
+#  define PMC_SCRATCH0 0x00050
+#endif
+
+/* for secure PMC */
+#define TEGRA_SMC_PMC  0xc2fffe00
+#define  TEGRA_SMC_PMC_READ0xaa
+#define  TEGRA_SMC_PMC_WRITE   0xbb
+
 #endif /* PMC_H */
diff --git a/arch/arm/include/asm/arch-tegra/tegra.h 
b/arch/arm/include/asm/arch-tegra/tegra.h
index 7ae0129e2db3..7a4e0972fb76 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -30,7 +30,13 @@
 #define NV_PA_SLINK5_BASE  (NV_PA_APB_MISC_BASE + 0xDC00)
 #define NV_PA_SLINK6_BASE  (NV_PA_APB_MISC_BASE + 0xDE00)
 #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000)
+#if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
+   defined(CONFIG_TEGRA114) || defined(CONFIG_TEGRA124) || \
+   defined(CONFIG_TEGRA132) || defined(CONFIG_TEGRA210)
 #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
+#else
+#define NV_PA_PMC_BASE 0xc36
+#endif
 #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)
 #define NV_PA_FUSE_BASE(NV_PA_APB_MISC_BASE + 0xF800)
 #if defined(CONFIG_TEGRA20) || defined(CONFIG_TEGRA30) || \
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index db9198348d3f..28914a34a1b5 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -35,6 +35,10 @@ config TEGRA_PINCTRL
 config TEGRA_PMC
bool
 
+config TEGRA_PMC_SECURE
+   bool
+   depends on TEGRA_PMC
+
 config TEGRA_COMMON
bool "Tegra common options"
select BINMAN
@@ -127,6 +131,7 @@ config TEGRA210
select TEGRA_NO_BPMP
select TEGRA_PINCTRL
select TEGRA_PMC
+   select TEGRA_PMC_SECURE
 
 config TEGRA186
bool "Tegra186 family"
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 517be21ee5f5..f8bc65aa8b18 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -1,6 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0+
 #
-# (C) Copyright 2010-2015 Nvidia Corporation.
+# (C) Copyright 2010-2019 Nvidia Corporation.
 #
 # (C) Copyright 2000-2008
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.
@@ -27,11 +27,11 @@ obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
 obj-$(CONFIG_TEGRA_IVC) += ivc.o
-obj-y += lowlevel_init.o
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_ARMV7_PSCI) += psci.o
 endif
 obj-$(CONFIG_DISPLAY_CPUINFO) += sys_info.o
+obj-y += pmc.o
 
 obj-$(CONFIG_TEGRA20) += tegra20/
 obj-$(CONFIG_TEGRA30) += tegra30/
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 096330748f2b..c9cd4e6aaeb7 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0
 /*
- * Copyright (c) 2010-2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2010-2019, NVIDIA CORPORATION.  All rights reserved.
  */
 
 /* Tegra SoC common clock control functions */
@@ -814,11 +814,16 @@ void tegra3

[U-Boot] [PATCH v5 26/27] ARM: tegra: Mark built-in Ethernet as default on Jetson TX2

[Thierry Reding]

From: Thierry Reding 

Add an "ethernet" alias that points to the default network interface,
which is the built-in EQoS on Jetson TX2.

Signed-off-by: Thierry Reding 
---
 arch/arm/dts/tegra186-p2771-.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/dts/tegra186-p2771-.dtsi 
b/arch/arm/dts/tegra186-p2771-.dtsi
index a1319dc4936f..7cda0b41f74b 100644
--- a/arch/arm/dts/tegra186-p2771-.dtsi
+++ b/arch/arm/dts/tegra186-p2771-.dtsi
@@ -9,6 +9,7 @@
};
 
aliases {
+   ethernet = "/ethernet@249";
mmc0 = "/sdhci@346";
mmc1 = "/sdhci@340";
i2c0 = "/bpmp/i2c";
@@ -28,6 +29,7 @@
ethernet@249 {
status = "okay";
phy-reset-gpios = <_main TEGRA_MAIN_GPIO(M, 4) 
GPIO_ACTIVE_LOW>;
+   local-mac-address = [ 00 00 00 00 00 00 ];
};
 
i2c@316 {
-- 
2.21.0

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[U-Boot] [PATCH v5 25/27] ARM: tegra: Rename pcie-controller to pcie

[Thierry Reding]

From: Thierry Reding 

Recent versions of DTC have checks for PCI host bridge device tree nodes
that are named something other than "pci" or "pcie". Fix all occurrences
of such nodes for Tegra boards to avoid potential warnings from DTC.

Signed-off-by: Thierry Reding 
---
 arch/arm/dts/tegra124-apalis.dts | 2 +-
 arch/arm/dts/tegra124-cei-tk1-som.dts| 2 +-
 arch/arm/dts/tegra124-jetson-tk1.dts | 2 +-
 arch/arm/dts/tegra124.dtsi   | 2 +-
 arch/arm/dts/tegra186-p2771--000.dts | 2 +-
 arch/arm/dts/tegra186-p2771--500.dts | 2 +-
 arch/arm/dts/tegra186.dtsi   | 2 +-
 arch/arm/dts/tegra20-harmony.dts | 2 +-
 arch/arm/dts/tegra20-trimslice.dts   | 2 +-
 arch/arm/dts/tegra20.dtsi| 2 +-
 arch/arm/dts/tegra210-p2371-2180.dts | 2 +-
 arch/arm/dts/tegra210.dtsi   | 2 +-
 arch/arm/dts/tegra30-apalis.dts  | 2 +-
 arch/arm/dts/tegra30-beaver.dts  | 2 +-
 arch/arm/dts/tegra30-cardhu.dts  | 2 +-
 arch/arm/dts/tegra30.dtsi| 2 +-
 16 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm/dts/tegra124-apalis.dts b/arch/arm/dts/tegra124-apalis.dts
index fe08d3ea7304..a962c0a2f0ae 100644
--- a/arch/arm/dts/tegra124-apalis.dts
+++ b/arch/arm/dts/tegra124-apalis.dts
@@ -77,7 +77,7 @@
reg = <0x0 0x8000 0x0 0x8000>;
};
 
-   pcie-controller@01003000 {
+   pcie@1003000 {
status = "okay";
avddio-pex-supply = <_1v05>;
avdd-pex-pll-supply = <_1v05>;
diff --git a/arch/arm/dts/tegra124-cei-tk1-som.dts 
b/arch/arm/dts/tegra124-cei-tk1-som.dts
index b1dd4181ac03..e5b41f3183cd 100644
--- a/arch/arm/dts/tegra124-cei-tk1-som.dts
+++ b/arch/arm/dts/tegra124-cei-tk1-som.dts
@@ -29,7 +29,7 @@
reg = <0x8000 0x8000>;
};
 
-   pcie-controller@01003000 {
+   pcie@1003000 {
status = "okay";
 
avddio-pex-supply = <_1v05_run>;
diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts 
b/arch/arm/dts/tegra124-jetson-tk1.dts
index d6420436cde8..59e080a8af6f 100644
--- a/arch/arm/dts/tegra124-jetson-tk1.dts
+++ b/arch/arm/dts/tegra124-jetson-tk1.dts
@@ -29,7 +29,7 @@
reg = <0x8000 0x8000>;
};
 
-   pcie-controller@01003000 {
+   pcie@1003000 {
status = "okay";
 
avddio-pex-supply = <_1v05_run>;
diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi
index 83d63480471b..f473ba28e4a6 100644
--- a/arch/arm/dts/tegra124.dtsi
+++ b/arch/arm/dts/tegra124.dtsi
@@ -14,7 +14,7 @@
interrupt-parent = <>;
 
 
-   pcie-controller@01003000 {
+   pcie@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x01003000 0x0800   /* PADS registers */
diff --git a/arch/arm/dts/tegra186-p2771--000.dts 
b/arch/arm/dts/tegra186-p2771--000.dts
index d97c6fd3d09a..84e850d6fca6 100644
--- a/arch/arm/dts/tegra186-p2771--000.dts
+++ b/arch/arm/dts/tegra186-p2771--000.dts
@@ -11,7 +11,7 @@
power-gpios = <_main TEGRA_MAIN_GPIO(P, 5) 
GPIO_ACTIVE_HIGH>;
};
 
-   pcie-controller@10003000 {
+   pcie@10003000 {
status = "okay";
 
pci@1,0 {
diff --git a/arch/arm/dts/tegra186-p2771--500.dts 
b/arch/arm/dts/tegra186-p2771--500.dts
index 393a8b246a0b..1ac8ab431e90 100644
--- a/arch/arm/dts/tegra186-p2771--500.dts
+++ b/arch/arm/dts/tegra186-p2771--500.dts
@@ -11,7 +11,7 @@
power-gpios = <_main TEGRA_MAIN_GPIO(P, 6) 
GPIO_ACTIVE_HIGH>;
};
 
-   pcie-controller@10003000 {
+   pcie@10003000 {
status = "okay";
 
pci@1,0 {
diff --git a/arch/arm/dts/tegra186.dtsi b/arch/arm/dts/tegra186.dtsi
index dd9e3b869de7..0a9db9825b85 100644
--- a/arch/arm/dts/tegra186.dtsi
+++ b/arch/arm/dts/tegra186.dtsi
@@ -217,7 +217,7 @@
#interrupt-cells = <2>;
};
 
-   pcie-controller@10003000 {
+   pcie@10003000 {
compatible = "nvidia,tegra186-pcie";
device_type = "pci";
reg = <0x0 0x10003000 0x0 0x0800   /* PADS registers */
diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts
index 0c907054dbd4..7fe7d52096c4 100644
--- a/arch/arm/dts/tegra20-harmony.dts
+++ b/arch/arm/dts/tegra20-harmony.dts
@@ -599,7 +599,7 @@
nvidia,sys-clock-req-active-high;
};
 
-   pcie-controller@80003000 {
+   pcie@80003000 {
status = "okay";
 
avdd-pex-supply = <_vdd_reg>;
diff --git a/arch/arm/dts/tegra20-trimslice.dts 
b/arch/arm/dts/tegra20-t

[U-Boot] [PATCH v5 00/27] ARM: tegra: Miscalleneous improvements

[Thierry Reding]

From: Thierry Reding 

Hi Tom, Stephen,

this in the fifth installment of this series of miscellaneous
improvements for Tegra support. The main changes since the last version
are:

  - Add two patches from the "framebuffer carveout" series since Simon
has already picked up the libfdt and fdtdec specific parts.
  - Fix the MAC address regression found by Stephen's test system. This
is done by writing the MAC address to U-Boot's control DTB rather
than storing it in the environment and thereby confusing Ethernet
drivers if more than one device are present in the system.
  - I've also added the Jetson Nano patch to the series since it has
changed slightly. The issue of the pinmux spreadsheet is still open,
so this isn't quite ready to be merged, but I wanted to solicit more
feedback, so that this is already reviewed by the time the pinmux
spreadsheet issue is resolved.

Simon,

I've included another patch for a new fdtdec function in this series
because the first user is introduced here. It'd be great if you could
provide an Acked-by on the first patch so that Tom can pick it up and
send out as part of the PR for the entire series once it's been reviewed
and passed Stephen's test system.

The second patch is also required later in the series. There's no
explicit maintainer for lib/string.c, but you show up in the output for
scripts/get_maintainer.pl for the second patch, so perhaps you could
also give an Acked-by on that?

Alternatively you could pick up patches 1 and 2 so that Tom can base his
PR on your tree (or master, later on), if that's what you guys prefer.
Actually, this might be better anyway, since there might be a tiny merge
conflict between the fdtdec patch in this series and the other ones that
I sent out earlier.

Thanks,
Thierry

Thierry Reding (27):
  fdtdec: Add fdtdec_set_ethernet_mac_address()
  lib: Implement strndup()
  ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210
  ARM: tegra: Remove disp1 clock initialization on Tegra210
  ARM: tegra: Use common header for PMU declarations
  ARM: tegra: Guard clock code with a Kconfig symbol
  ARM: tegra: Guard GP pad control code with a Kconfig symbol
  ARM: tegra: Guard memory controller code with a Kconfig symbol
  ARM: tegra: Guard pin controller code with a Kconfig symbol
  ARM: tegra: Guard powergate code with a Kconfig symbol
  ARM: tegra: Fix save_boot_params() prototype
  ARM: tegra: Allow boards to override boot target devices
  ARM: tegra: Support TZ-only access to PMC
  ARM: tegra: Workaround UDC boot issues only if necessary
  ARM: tegra: Restore DRAM bank count
  ARM: tegra: Unify Tegra186 builds
  ARM: tegra: Implement cboot_save_boot_params() in C
  ARM: tegra: Implement cboot_get_ethaddr()
  ARM: tegra: Import cbootargs value from cboot DTB
  ARM: tegra: Enable position independent build for 64-bit
  p2371-2180: Pass Ethernet MAC to the kernel
  p2771-: Pass Ethernet MAC to the kernel
  p2371-2180: Add support for framebuffer carveouts
  p2771-: Add support for framebuffer carveouts
  ARM: tegra: Rename pcie-controller to pcie
  ARM: tegra: Mark built-in Ethernet as default on Jetson TX2
  ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support

 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/tegra124-apalis.dts  |   2 +-
 arch/arm/dts/tegra124-cei-tk1-som.dts |   2 +-
 arch/arm/dts/tegra124-jetson-tk1.dts  |   2 +-
 arch/arm/dts/tegra124.dtsi|   2 +-
 arch/arm/dts/tegra186-p2771--000.dts  |   2 +-
 arch/arm/dts/tegra186-p2771--500.dts  |   2 +-
 arch/arm/dts/tegra186-p2771-.dtsi |   2 +
 arch/arm/dts/tegra186.dtsi|   2 +-
 arch/arm/dts/tegra20-harmony.dts  |   2 +-
 arch/arm/dts/tegra20-trimslice.dts|   2 +-
 arch/arm/dts/tegra20.dtsi |   2 +-
 arch/arm/dts/tegra210-p2371-2180.dts  |   2 +-
 arch/arm/dts/tegra210-p3450-.dts  | 135 
 arch/arm/dts/tegra210.dtsi|   2 +-
 arch/arm/dts/tegra30-apalis.dts   |   2 +-
 arch/arm/dts/tegra30-beaver.dts   |   2 +-
 arch/arm/dts/tegra30-cardhu.dts   |   2 +-
 arch/arm/dts/tegra30.dtsi |   2 +-
 arch/arm/include/asm/arch-tegra/cboot.h   |  45 ++
 arch/arm/include/asm/arch-tegra/pmc.h |  20 +-
 .../asm/{arch-tegra20 => arch-tegra}/pmu.h|   6 +-
 arch/arm/include/asm/arch-tegra/tegra.h   |   6 +
 arch/arm/include/asm/arch-tegra114/pmu.h  |  12 -
 arch/arm/include/asm/arch-tegra124/pmu.h  |  13 -
 arch/arm/include/asm/arch-tegra210/pmu.h  |  13 -
 arch/arm/include/asm/arch-tegra30/pmu.h   |  12 -
 arch/arm/mach-tegra/Kconfig   |  32 +
 arch/arm/mach-tegra/Makefile  |  16 +-
 arch/arm/mach-tegra/board.c   |  41 +-
 arch/arm/mach-tegra/board186.c|  32 -
 arch/arm/mach-t

[U-Boot] [PATCH v5 02/27] lib: Implement strndup()

[Thierry Reding]

From: Thierry Reding 

Signed-off-by: Thierry Reding 
---
 include/linux/string.h |  1 +
 lib/string.c   | 23 +++
 2 files changed, 24 insertions(+)

diff --git a/include/linux/string.h b/include/linux/string.h
index 36066207392e..5d63be4ce5b0 100644
--- a/include/linux/string.h
+++ b/include/linux/string.h
@@ -94,6 +94,7 @@ size_t strcspn(const char *s, const char *reject);
 #ifndef __HAVE_ARCH_STRDUP
 extern char * strdup(const char *);
 #endif
+extern char * strndup(const char *, size_t);
 #ifndef __HAVE_ARCH_STRSWAB
 extern char * strswab(const char *);
 #endif
diff --git a/lib/string.c b/lib/string.c
index af17c16f616d..9b779ddc3bbe 100644
--- a/lib/string.c
+++ b/lib/string.c
@@ -326,6 +326,29 @@ char * strdup(const char *s)
 }
 #endif
 
+char * strndup(const char *s, size_t n)
+{
+   size_t len;
+   char *new;
+
+   if (s == NULL)
+   return NULL;
+
+   len = strlen(s);
+
+   if (n < len)
+   len = n;
+
+   new = malloc(len + 1);
+   if (new == NULL)
+   return NULL;
+
+   strncpy(new, s, len);
+   new[len] = '\0';
+
+   return new;
+}
+
 #ifndef __HAVE_ARCH_STRSPN
 /**
  * strspn - Calculate the length of the initial substring of @s which only
-- 
2.21.0

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[U-Boot] [PATCH v5 23/27] p2371-2180: Add support for framebuffer carveouts

[Thierry Reding]

From: Thierry Reding 

If early firmware initialized the display hardware and the display
controllers are scanning out a framebuffer (e.g. a splash screen), make
sure to pass information about the memory location of that framebuffer
to the kernel before booting to avoid the kernel from using that memory
for the buddy allocator.

This same mechanism can also be used in the kernel to set up early SMMU
mappings and avoid SMMU faults caused by the display controller reading
from memory for which it has no mapping.

Reviewed-by: Simon Glass 
Signed-off-by: Thierry Reding 
---
Changes in v4:
- add reviewed-by from Simon

 board/nvidia/p2371-2180/p2371-2180.c | 47 
 1 file changed, 47 insertions(+)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index a444d692d7ea..4985302d6bc2 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -6,6 +6,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -138,9 +139,55 @@ static void ft_mac_address_setup(void *fdt)
}
 }
 
+static int ft_copy_carveout(void *dst, const void *src, const char *node)
+{
+   struct fdt_memory fb;
+   int err;
+
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, );
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to get carveout for %s: %d\n", node,
+  err);
+
+   return err;
+   }
+
+   err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
+ );
+   if (err < 0) {
+   printf("failed to set carveout for %s: %d\n", node, err);
+   return err;
+   }
+
+   return 0;
+}
+
+static void ft_carveout_setup(void *fdt)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   static const char * const nodes[] = {
+   "/host1x@5000/dc@5420",
+   "/host1x@5000/dc@5424",
+   };
+   unsigned int i;
+   int err;
+
+   for (i = 0; i < ARRAY_SIZE(nodes); i++) {
+   err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]);
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to copy carveout for %s: %d\n",
+  nodes[i], err);
+   continue;
+   }
+   }
+}
+
 int ft_board_setup(void *fdt, bd_t *bd)
 {
ft_mac_address_setup(fdt);
+   ft_carveout_setup(fdt);
 
return 0;
 }
-- 
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[U-Boot] [PATCH v5 08/27] ARM: tegra: Guard memory controller code with a Kconfig symbol

[Thierry Reding]

From: Thierry Reding 

Memory controller code is not relevant on all Tegra SoC generations, so
guard it with a Kconfig symbol that can be selected by the generations
that need it.

This is in preparation for unifying Tegra186 code with the code used on
older generations.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig | 5 +
 arch/arm/mach-tegra/board.c | 7 +++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 265051b18aaf..5763c4ae3cd1 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -26,6 +26,9 @@ config TEGRA_IVC
  U-Boot, it is typically used for communication between the main CPU
  and various auxiliary processors.
 
+config TEGRA_MC
+   bool
+
 config TEGRA_COMMON
bool "Tegra common options"
select BINMAN
@@ -65,6 +68,7 @@ config TEGRA_ARMV7_COMMON
select TEGRA_COMMON
select TEGRA_GPIO
select TEGRA_GP_PADCTRL
+   select TEGRA_MC
select TEGRA_NO_BPMP
 
 config TEGRA_ARMV8_COMMON
@@ -111,6 +115,7 @@ config TEGRA210
select TEGRA_CLKRST
select TEGRA_GPIO
select TEGRA_GP_PADCTRL
+   select TEGRA_MC
select TEGRA_NO_BPMP
 
 config TEGRA186
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index ecd5001de4c5..7ef5a67edd1f 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -13,7 +13,9 @@
 #include 
 #endif
 #include 
+#if IS_ENABLED(CONFIG_TEGRA_MC)
 #include 
+#endif
 #include 
 #include 
 #include 
@@ -68,6 +70,7 @@ bool tegra_cpu_is_non_secure(void)
 }
 #endif
 
+#if IS_ENABLED(CONFIG_TEGRA_MC)
 /* Read the RAM size directly from the memory controller */
 static phys_size_t query_sdram_size(void)
 {
@@ -117,11 +120,15 @@ static phys_size_t query_sdram_size(void)
 
return size_bytes;
 }
+#endif
 
 int dram_init(void)
 {
+#if IS_ENABLED(CONFIG_TEGRA_MC)
/* We do not initialise DRAM here. We just query the size */
gd->ram_size = query_sdram_size();
+#endif
+
return 0;
 }
 
-- 
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[U-Boot] [PATCH v5 09/27] ARM: tegra: Guard pin controller code with a Kconfig symbol

[Thierry Reding]

From: Thierry Reding 

Pin controller code is not relevant on all Tegra SoC generations, so
guard it with a Kconfig symbol that can be selected by the generations
that need it.

This is in preparation for unifying Tegra186 code with the code used on
older generations.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig  | 5 +
 arch/arm/mach-tegra/Makefile | 2 +-
 arch/arm/mach-tegra/board.c  | 6 ++
 arch/arm/mach-tegra/board2.c | 2 ++
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5763c4ae3cd1..be20ac2e804e 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -29,6 +29,9 @@ config TEGRA_IVC
 config TEGRA_MC
bool
 
+config TEGRA_PINCTRL
+   bool
+
 config TEGRA_COMMON
bool "Tegra common options"
select BINMAN
@@ -70,6 +73,7 @@ config TEGRA_ARMV7_COMMON
select TEGRA_GP_PADCTRL
select TEGRA_MC
select TEGRA_NO_BPMP
+   select TEGRA_PINCTRL
 
 config TEGRA_ARMV8_COMMON
bool "Tegra 64-bit common options"
@@ -117,6 +121,7 @@ config TEGRA210
select TEGRA_GP_PADCTRL
select TEGRA_MC
select TEGRA_NO_BPMP
+   select TEGRA_PINCTRL
 
 config TEGRA186
bool "Tegra186 family"
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 69f802c01b45..395e0191a458 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -17,7 +17,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o
 obj-y += board.o board2.o
 obj-y += cache.o
 obj-$(CONFIG_TEGRA_CLKRST) += clock.o
-obj-y += pinmux-common.o
+obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
 obj-y += powergate.o
 obj-y += xusb-padctl-dummy.o
 endif
diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index 7ef5a67edd1f..b65bdde5a78d 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -12,7 +12,9 @@
 #if IS_ENABLED(CONFIG_TEGRA_CLKRST)
 #include 
 #endif
+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
 #include 
+#endif
 #if IS_ENABLED(CONFIG_TEGRA_MC)
 #include 
 #endif
@@ -132,6 +134,7 @@ int dram_init(void)
return 0;
 }
 
+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
 static int uart_configs[] = {
 #if defined(CONFIG_TEGRA20)
  #if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
@@ -199,9 +202,11 @@ static void setup_uarts(int uart_ids)
}
}
 }
+#endif
 
 void board_init_uart_f(void)
 {
+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
int uart_ids = 0;   /* bit mask of which UART ids to enable */
 
 #ifdef CONFIG_TEGRA_ENABLE_UARTA
@@ -220,6 +225,7 @@ void board_init_uart_f(void)
uart_ids |= UARTE;
 #endif
setup_uarts(uart_ids);
+#endif
 }
 
 #if !CONFIG_IS_ENABLED(OF_CONTROL)
diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c
index b94077221f77..ce1c9346959d 100644
--- a/arch/arm/mach-tegra/board2.c
+++ b/arch/arm/mach-tegra/board2.c
@@ -25,8 +25,10 @@
 #if IS_ENABLED(CONFIG_TEGRA_CLKRST)
 #include 
 #endif
+#if IS_ENABLED(CONFIG_TEGRA_PINCTRL)
 #include 
 #include 
+#endif
 #include 
 #ifdef CONFIG_TEGRA_CLOCK_SCALING
 #include 
-- 
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[U-Boot] [PATCH v5 07/27] ARM: tegra: Guard GP pad control code with a Kconfig symbol

[Thierry Reding]

From: Thierry Reding 

The GP pad control code is not relevant on all Tegra SoC generations, so
guard it with a Kconfig symbol that can be selected by the generations
that need it.

This is in preparation for unifying Tegra186 code with the code used on
older generations.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig  | 5 +
 arch/arm/mach-tegra/Makefile | 2 +-
 arch/arm/mach-tegra/cache.c  | 2 ++
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index ee078fec9adc..265051b18aaf 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -15,6 +15,9 @@ config SPL_SERIAL_SUPPORT
 config TEGRA_CLKRST
bool
 
+config TEGRA_GP_PADCTRL
+   bool
+
 config TEGRA_IVC
bool "Tegra IVC protocol"
help
@@ -61,6 +64,7 @@ config TEGRA_ARMV7_COMMON
select TEGRA_CLKRST
select TEGRA_COMMON
select TEGRA_GPIO
+   select TEGRA_GP_PADCTRL
select TEGRA_NO_BPMP
 
 config TEGRA_ARMV8_COMMON
@@ -106,6 +110,7 @@ config TEGRA210
select TEGRA_ARMV8_COMMON
select TEGRA_CLKRST
select TEGRA_GPIO
+   select TEGRA_GP_PADCTRL
select TEGRA_NO_BPMP
 
 config TEGRA186
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 0e812818d7a2..69f802c01b45 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -13,7 +13,7 @@ else
 obj-$(CONFIG_CMD_ENTERRCM) += cmd_enterrcm.o
 endif
 
-obj-y += ap.o
+obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o
 obj-y += board.o board2.o
 obj-y += cache.o
 obj-$(CONFIG_TEGRA_CLKRST) += clock.o
diff --git a/arch/arm/mach-tegra/cache.c b/arch/arm/mach-tegra/cache.c
index be414e4e4aca..d7063490e222 100644
--- a/arch/arm/mach-tegra/cache.c
+++ b/arch/arm/mach-tegra/cache.c
@@ -8,7 +8,9 @@
 #include 
 #include 
 #include 
+#if IS_ENABLED(CONFIG_TEGRA_GP_PADCTRL)
 #include 
+#endif
 
 #ifndef CONFIG_ARM64
 void config_cache(void)
-- 
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[U-Boot] [PATCH v5 11/27] ARM: tegra: Fix save_boot_params() prototype

[Thierry Reding]

From: Thierry Reding 

The save_boot_params() function takes as its first four arguments the
first four registers. On 32-bit ARM these are r0, r1, r2 and r3, all of
which are 32 bits wide. However, on 64-bit ARM thene registers are x0,
x1, x2 and x3, all of which are 64 bits wide. In order to allow reusing
the save_boot_params() implementation on 64-bit ARM, change it to take
unsigned long parameters rather than the fixed size 32-bit integers.
This ensures that the correct values are passed.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/board.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c
index b65bdde5a78d..59d2f347485d 100644
--- a/arch/arm/mach-tegra/board.c
+++ b/arch/arm/mach-tegra/board.c
@@ -42,7 +42,8 @@ enum {
 static bool from_spl __attribute__ ((section(".data")));
 
 #ifndef CONFIG_SPL_BUILD
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
+void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
+ unsigned long r3)
 {
from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL;
save_boot_params_ret();
-- 
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[U-Boot] [PATCH v5 21/27] p2371-2180: Pass Ethernet MAC to the kernel

[Thierry Reding]

From: Thierry Reding 

Pass the ethernet MAC address to the kernel upon boot. This passes both
the local-mac-address property (as passed to U-Boot from cboot) and the
currently set MAC address via the mac-address property. The latter will
only be set if it is different from the address that was already passed
via the local-mac-address property.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2371-2180/p2371-2180.c | 50 
 configs/p2371-2180_defconfig |  1 +
 2 files changed, 51 insertions(+)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index 212037da5ac0..a444d692d7ea 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -5,9 +5,12 @@
  */
 
 #include 
+#include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include "../p2571/max77620_init.h"
 #include "pinmux-config-p2371-2180.h"
 
@@ -94,3 +97,50 @@ int tegra_pcie_board_init(void)
return 0;
 }
 #endif /* PCI */
+
+static void ft_mac_address_setup(void *fdt)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
+   const char *path;
+   int offset, err;
+
+   err = cboot_get_ethaddr(cboot_fdt, local_mac);
+   if (err < 0)
+   memset(local_mac, 0, ETH_ALEN);
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path)
+   return;
+
+   debug("ethernet alias found: %s\n", path);
+
+   offset = fdt_path_offset(fdt, path);
+   if (offset < 0) {
+   printf("ethernet alias points to absent node %s\n", path);
+   return;
+   }
+
+   if (is_valid_ethaddr(local_mac)) {
+   err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
+ ETH_ALEN);
+   if (!err)
+   debug("Local MAC address set: %pM\n", local_mac);
+   }
+
+   if (eth_env_get_enetaddr("ethaddr", mac)) {
+   if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
+   err = fdt_setprop(fdt, offset, "mac-address", mac,
+ ETH_ALEN);
+   if (!err)
+   debug("MAC address set: %pM\n", mac);
+   }
+   }
+}
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+   ft_mac_address_setup(fdt);
+
+   return 0;
+}
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index 4923d330de6c..0ee4913a0469 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -5,6 +5,7 @@ CONFIG_TEGRA210=y
 CONFIG_TARGET_P2371_2180=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra210 (P2371-2180) # "
-- 
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[U-Boot] [PATCH v5 24/27] p2771-0000: Add support for framebuffer carveouts

[Thierry Reding]

From: Thierry Reding 

If early firmware initialized the display hardware and the display
controllers are scanning out a framebuffer (e.g. a splash screen), make
sure to pass information about the memory location of that framebuffer
to the kernel before booting to avoid the kernel from using that memory
for the buddy allocator.

This same mechanism can also be used in the kernel to set up early SMMU
mappings and avoid SMMU faults caused by the display controller reading
from memory for which it has no mapping.

Reviewed-by: Simon Glass 
Signed-off-by: Thierry Reding 
---
Changes in v4:
- add reviewed-by from Simon

 board/nvidia/p2771-/p2771-.c | 66 ++--
 1 file changed, 62 insertions(+), 4 deletions(-)

diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index fe22067f6571..d294c7ae0136 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -56,7 +57,7 @@ int tegra_pcie_board_init(void)
 }
 #endif
 
-int ft_board_setup(void *fdt, bd_t *bd)
+static void ft_mac_address_setup(void *fdt)
 {
const void *cboot_fdt = (const void *)cboot_boot_x0;
uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
@@ -69,13 +70,15 @@ int ft_board_setup(void *fdt, bd_t *bd)
 
path = fdt_get_alias(fdt, "ethernet");
if (!path)
-   return 0;
+   return;
 
debug("ethernet alias found: %s\n", path);
 
offset = fdt_path_offset(fdt, path);
-   if (offset < 0)
-   return 0;
+   if (offset < 0) {
+   printf("ethernet alias points to absent node %s\n", path);
+   return;
+   }
 
if (is_valid_ethaddr(local_mac)) {
err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
@@ -92,6 +95,61 @@ int ft_board_setup(void *fdt, bd_t *bd)
debug("MAC address set: %pM\n", mac);
}
}
+}
+
+static int ft_copy_carveout(void *dst, const void *src, const char *node)
+{
+   struct fdt_memory fb;
+   int err;
+
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, );
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to get carveout for %s: %d\n", node,
+  err);
+
+   return err;
+   }
+
+   err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
+ );
+   if (err < 0) {
+   printf("failed to set carveout for %s: %d\n", node, err);
+   return err;
+   }
+
+   return 0;
+}
+
+static void ft_carveout_setup(void *fdt)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   static const char * const nodes[] = {
+   "/host1x@13e0/display-hub@1520/display@1520",
+   "/host1x@13e0/display-hub@1520/display@1521",
+   "/host1x@13e0/display-hub@1520/display@1522",
+   };
+   unsigned int i;
+   int err;
+
+   for (i = 0; i < ARRAY_SIZE(nodes); i++) {
+   printf("copying carveout for %s...\n", nodes[i]);
+
+   err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]);
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to copy carveout for %s: %d\n",
+  nodes[i], err);
+
+   continue;
+   }
+   }
+}
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+   ft_mac_address_setup(fdt);
+   ft_carveout_setup(fdt);
 
return 0;
 }
-- 
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Re: [U-Boot] [PATCH v3 12/13] p2371-2180: Add support for framebuffer carveouts

[Thierry Reding]

On Thu, Apr 11, 2019 at 08:12:03PM -0600, Simon Glass wrote:
> Hi Thierry,
> 
> On Fri, 22 Mar 2019 at 01:53, Simon Glass  wrote:
> >
> > On Fri, 22 Mar 2019 at 02:10, Thierry Reding  
> > wrote:
> > >
> > > From: Thierry Reding 
> > >
> > > If early firmware initialized the display hardware and the display
> > > controllers are scanning out a framebuffer (e.g. a splash screen), make
> > > sure to pass information about the memory location of that framebuffer
> > > to the kernel before booting to avoid the kernel from using that memory
> > > for the buddy allocator.
> > >
> > > This same mechanism can also be used in the kernel to set up early SMMU
> > > mappings and avoid SMMU faults caused by the display controller reading
> > > from memory for which it has no mapping.
> > >
> > > Signed-off-by: Thierry Reding 
> > > ---
> > >  board/nvidia/p2371-2180/p2371-2180.c | 47 
> > >  1 file changed, 47 insertions(+)
> >
> > Reviewed-by: Simon Glass 
> 
> This doesn't apply for me. Can you please resend it?

This (and patch 13/13) depend on another series that I had expected to
go into Tom's tree earlier than this series. However, there were some
unexpected regressions caused by the other series, so I've got a couple
of minor changes to that, so maybe I should just add these two patches
to the other series for Tom to pick up?

Thierry


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[U-Boot] [PATCH v5 15/27] ARM: tegra: Restore DRAM bank count

[Thierry Reding]

From: Thierry Reding 

Commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") reduced
the number of DRAM banks supported by U-Boot from 1026 to 8 on P2771-000
boards.

However, as explained in commit a9819b9e33bd ("ARM: tegra: p2771-000:
increase max DRAM bank count"), the platform can have a large number of
unusable chunks of memory (up to 1024), so a total of 1026 DRAM banks
are needed to describe the worst-case situation.

In practice the number of DRAM banks needed will typically be much
lower, but we should be prepared to properly deal with the worst case.

Signed-off-by: Thierry Reding 
---
 configs/p2771--000_defconfig | 2 +-
 configs/p2771--500_defconfig | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/configs/p2771--000_defconfig b/configs/p2771--000_defconfig
index ac85efa37b3b..ad0802067e73 100644
--- a/configs/p2771--000_defconfig
+++ b/configs/p2771--000_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA186=y
-CONFIG_NR_DRAM_BANKS=8
+CONFIG_NR_DRAM_BANKS=1026
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
diff --git a/configs/p2771--500_defconfig b/configs/p2771--500_defconfig
index df4d914d85cf..459b67fd195f 100644
--- a/configs/p2771--500_defconfig
+++ b/configs/p2771--500_defconfig
@@ -2,7 +2,7 @@ CONFIG_ARM=y
 CONFIG_TEGRA=y
 CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA186=y
-CONFIG_NR_DRAM_BANKS=8
+CONFIG_NR_DRAM_BANKS=1026
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
-- 
2.21.0

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[U-Boot] [PATCH v5 20/27] ARM: tegra: Enable position independent build for 64-bit

[Thierry Reding]

From: Thierry Reding 

Note that U-Boot is always chainloaded from cboot starting with L4T
release 28. cboot always loads U-Boot to a fixed address, so making
the builds position independent isn't strictly necessary. However,
position independent builds can be convenient because if U-Boot is
ever loaded to an address different from its link address, it will
still be able to boot.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig  | 1 +
 configs/e2220-1170_defconfig | 2 +-
 configs/p2371-_defconfig | 2 +-
 configs/p2371-2180_defconfig | 2 +-
 configs/p2571_defconfig  | 2 +-
 5 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index faa73559fd42..97e22ead5985 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -87,6 +87,7 @@ config TEGRA_ARMV8_COMMON
bool "Tegra 64-bit common options"
select ARM64
select LINUX_KERNEL_IMAGE_HEADER
+   select POSITION_INDEPENDENT
select TEGRA_COMMON
 
 if TEGRA_ARMV8_COMMON
diff --git a/configs/e2220-1170_defconfig b/configs/e2220-1170_defconfig
index af3f80edb117..baabb0ccf8cc 100644
--- a/configs/e2220-1170_defconfig
+++ b/configs/e2220-1170_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_NR_DRAM_BANKS=2
 CONFIG_OF_SYSTEM_SETUP=y
diff --git a/configs/p2371-_defconfig b/configs/p2371-_defconfig
index 6b564366a825..aa8b73a2ba08 100644
--- a/configs/p2371-_defconfig
+++ b/configs/p2371-_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P2371_=y
 CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig
index a790cd83b82d..4923d330de6c 100644
--- a/configs/p2371-2180_defconfig
+++ b/configs/p2371-2180_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P2371_2180=y
 CONFIG_NR_DRAM_BANKS=2
diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig
index e48e0a1a14ec..8e9c45690dce 100644
--- a/configs/p2571_defconfig
+++ b/configs/p2571_defconfig
@@ -1,6 +1,6 @@
 CONFIG_ARM=y
 CONFIG_TEGRA=y
-CONFIG_SYS_TEXT_BASE=0x8011
+CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA210=y
 CONFIG_TARGET_P2571=y
 CONFIG_NR_DRAM_BANKS=2
-- 
2.21.0

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[U-Boot] [PATCH v5 10/27] ARM: tegra: Guard powergate code with a Kconfig symbol

[Thierry Reding]

From: Thierry Reding 

Powergate code is not relevant on all Tegra SoC generations, so guard it
with a Kconfig symbol that can be selected by the generations that need
it.

This is in preparation for unifying Tegra186 code with the code used on
older generations.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig  | 5 +
 arch/arm/mach-tegra/Makefile | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index be20ac2e804e..db9198348d3f 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -32,6 +32,9 @@ config TEGRA_MC
 config TEGRA_PINCTRL
bool
 
+config TEGRA_PMC
+   bool
+
 config TEGRA_COMMON
bool "Tegra common options"
select BINMAN
@@ -74,6 +77,7 @@ config TEGRA_ARMV7_COMMON
select TEGRA_MC
select TEGRA_NO_BPMP
select TEGRA_PINCTRL
+   select TEGRA_PMC
 
 config TEGRA_ARMV8_COMMON
bool "Tegra 64-bit common options"
@@ -122,6 +126,7 @@ config TEGRA210
select TEGRA_MC
select TEGRA_NO_BPMP
select TEGRA_PINCTRL
+   select TEGRA_PMC
 
 config TEGRA186
bool "Tegra186 family"
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 395e0191a458..517be21ee5f5 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -18,7 +18,7 @@ obj-y += board.o board2.o
 obj-y += cache.o
 obj-$(CONFIG_TEGRA_CLKRST) += clock.o
 obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
-obj-y += powergate.o
+obj-$(CONFIG_TEGRA_PMC) += powergate.o
 obj-y += xusb-padctl-dummy.o
 endif
 
-- 
2.21.0

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[U-Boot] [PATCH v5 18/27] ARM: tegra: Implement cboot_get_ethaddr()

[Thierry Reding]

From: Thierry Reding 

This function will attempt to look up an Ethernet address in the DTB
that was passed in from cboot. It does so by first trying to locate the
default Ethernet device for the board (identified by the "ethernet"
alias) and if found, reads the "local-mac-address" property. If the
"ethernet" alias does not exist, or if it points to a device tree node
that doesn't exist, or if the device tree node that it points to does
not have a "local-mac-address" property or if the value is invalid, it
will fall back to the legacy mechanism of looking for the MAC address
stored in the "nvidia,ethernet-mac" or "nvidia,ether-mac" properties of
the "/chosen" node.

The MAC address is then written to the default Ethernet device for the
board (again identified by the "ethernet" alias) in U-Boot's control
DTB. This allows the device driver for that device to read the MAC
address from the standard location in device tree.

Signed-off-by: Thierry Reding 
---
Changes in v5:
- write MAC to DT rather than an environment variable

Changes in v4:
- also check the /chosen/nvidia,ethernet-mac property for compatibility
  with Tegra210

Changes in v2:
- make dummy static inline to avoid duplicate definitions

 arch/arm/include/asm/arch-tegra/cboot.h |  6 ++
 arch/arm/mach-tegra/cboot.c | 97 -
 2 files changed, 86 insertions(+), 17 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/cboot.h 
b/arch/arm/include/asm/arch-tegra/cboot.h
index b3441ec178b3..021c24617575 100644
--- a/arch/arm/include/asm/arch-tegra/cboot.h
+++ b/arch/arm/include/asm/arch-tegra/cboot.h
@@ -14,6 +14,7 @@ void cboot_save_boot_params(unsigned long x0, unsigned long 
x1,
 int cboot_dram_init(void);
 int cboot_dram_init_banksize(void);
 ulong cboot_get_usable_ram_top(ulong total_size);
+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN]);
 #else
 static inline void cboot_save_boot_params(unsigned long x0, unsigned long x1,
  unsigned long x2, unsigned long x3)
@@ -34,6 +35,11 @@ static inline ulong cboot_get_usable_ram_top(ulong 
total_size)
 {
return 0;
 }
+
+static inline int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN])
+{
+   return -ENOSYS;
+}
 #endif
 
 #endif
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index a302ca45f39b..628909f29137 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -4,6 +4,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -465,46 +466,108 @@ static int set_fdt_addr(void)
  * Attempt to use /chosen/nvidia,ether-mac in the cboot DTB to U-Boot's
  * ethaddr environment variable if possible.
  */
-static int set_ethaddr_from_cboot(void)
+static int cboot_get_ethaddr_legacy(const void *fdt, uint8_t mac[ETH_ALEN])
 {
-   const void *cboot_blob = (void *)cboot_boot_x0;
-   int ret, node, len;
-   const u32 *prop;
-
-   /* Already a valid address in the environment? If so, keep it */
-   if (env_get("ethaddr"))
-   return 0;
-
-   node = fdt_path_offset(cboot_blob, "/chosen");
+   const char *const properties[] = {
+   "nvidia,ethernet-mac",
+   "nvidia,ether-mac",
+   };
+   const char *prop;
+   unsigned int i;
+   int node, len;
+
+   node = fdt_path_offset(fdt, "/chosen");
if (node < 0) {
printf("Can't find /chosen node in cboot DTB\n");
return node;
}
-   prop = fdt_getprop(cboot_blob, node, "nvidia,ether-mac", );
+
+   for (i = 0; i < ARRAY_SIZE(properties); i++) {
+   prop = fdt_getprop(fdt, node, properties[i], );
+   if (prop)
+   break;
+   }
+
if (!prop) {
-   printf("Can't find nvidia,ether-mac property in cboot DTB\n");
+   printf("Can't find Ethernet MAC address in cboot DTB\n");
return -ENOENT;
}
 
-   ret = env_set("ethaddr", (void *)prop);
-   if (ret) {
-   printf("Failed to set ethaddr from cboot DTB: %d\n", ret);
-   return ret;
+   eth_parse_enetaddr(prop, mac);
+
+   if (!is_valid_ethaddr(mac)) {
+   printf("Invalid MAC address: %s\n", prop);
+   return -EINVAL;
}
 
+   debug("Legacy MAC address: %pM\n", mac);
+
return 0;
 }
 
+int cboot_get_ethaddr(const void *fdt, uint8_t mac[ETH_ALEN])
+{
+   int node, len, err = 0;
+   const uchar *prop;
+   const char *path;
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path) {
+   err = -ENOENT;
+   goto out;
+   }
+
+   debug("ethernet alias found: %s\n", path);
+
+ 

[U-Boot] [PATCH v5 27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support

[Thierry Reding]

From: Thierry Reding 

The Jetson Nano Developer Kit is a Tegra X1 based development board. It
is similar to Jetson TX1 but it is not pin compatible. It features 4 GB
of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot
used for storage.

HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
Ethernet controller provides onboard network connectivity.

A 40-pin header on the board can be used to extend the capabilities and
exposed interfaces of the Jetson Nano.

Signed-off-by: Thierry Reding 
---
Changes in v5:
- add "ethernet" alias and store an empty MAC address as placeholder

Changes in v3:
- rename "Development Kit" to "Developer Kit"
- drop alias for non-existent eMMC interface
- import pinmux from A02 spreadsheet
- drop preboot support for now
- fixup text base

 arch/arm/dts/Makefile |   3 +-
 arch/arm/dts/tegra210-p3450-.dts  | 135 +
 arch/arm/mach-tegra/tegra210/Kconfig  |   7 +
 board/nvidia/p3450-/Kconfig   |  12 +
 board/nvidia/p3450-/MAINTAINERS   |   6 +
 board/nvidia/p3450-/Makefile  |   8 +
 board/nvidia/p3450-/p3450-.c  | 198 +
 .../p3450-/pinmux-config-p3450-.h | 265 ++
 configs/p3450-_defconfig  |  55 
 include/configs/p3450-.h  |  34 +++
 10 files changed, 722 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/dts/tegra210-p3450-.dts
 create mode 100644 board/nvidia/p3450-/Kconfig
 create mode 100644 board/nvidia/p3450-/MAINTAINERS
 create mode 100644 board/nvidia/p3450-/Makefile
 create mode 100644 board/nvidia/p3450-/p3450-.c
 create mode 100644 board/nvidia/p3450-/pinmux-config-p3450-.h
 create mode 100644 configs/p3450-_defconfig
 create mode 100644 include/configs/p3450-.h

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8167cdb4e856..f8d3441663c0 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra210-e2220-1170.dtb \
tegra210-p2371-.dtb \
tegra210-p2371-2180.dtb \
-   tegra210-p2571.dtb
+   tegra210-p2571.dtb \
+   tegra210-p3450-.dtb
 
 dtb-$(CONFIG_ARCH_MVEBU) +=\
armada-3720-db.dtb  \
diff --git a/arch/arm/dts/tegra210-p3450-.dts 
b/arch/arm/dts/tegra210-p3450-.dts
new file mode 100644
index ..d45ee9afc016
--- /dev/null
+++ b/arch/arm/dts/tegra210-p3450-.dts
@@ -0,0 +1,135 @@
+/dts-v1/;
+
+#include "tegra210.dtsi"
+
+/ {
+   model = "NVIDIA Jetson Nano Developer Kit";
+   compatible = "nvidia,p3450-", "nvidia,tegra210";
+
+   chosen {
+   stdout-path = 
+   };
+
+   aliases {
+   ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
+   i2c0 = "/i2c@7000d000";
+   i2c2 = "/i2c@7000c400";
+   i2c3 = "/i2c@7000c500";
+   i2c4 = "/i2c@7000c700";
+   sdhci0 = "/sdhci@700b";
+   spi0 = "/spi@7041";
+   usb0 = "/usb@7d00";
+   };
+
+   memory {
+   reg = <0x0 0x8000 0x0 0xc000>;
+   };
+
+   pcie@1003000 {
+   status = "okay";
+
+   pci@1,0 {
+   status = "okay";
+   };
+
+   pci@2,0 {
+   status = "okay";
+
+   ethernet@0,0 {
+   reg = <0x00 0 0 0 0>;
+   local-mac-address = [ 00 00 00 00 00 00 ];
+   };
+   };
+   };
+
+   serial@70006000 {
+   status = "okay";
+   };
+
+   padctl@7009f000 {
+   pinctrl-0 = <_default>;
+   pinctrl-names = "default";
+
+   padctl_default: pinmux {
+   xusb {
+   nvidia,lanes = "otg-1", "otg-2";
+   nvidia,function = "xusb";
+   nvidia,iddq = <0>;
+   };
+
+   usb3 {
+   nvidia,lanes = "pcie-5", "pcie-6";
+   nvidia,function = "usb3";
+   nvidia,iddq = <0>;
+   };
+
+   pcie-x1 {
+   nvidia,lanes = "pcie-0";
+   nvidia,function = "pcie-x1&quo

[U-Boot] [PATCH v5 14/27] ARM: tegra: Workaround UDC boot issues only if necessary

[Thierry Reding]

From: Thierry Reding 

Resetting the USB device controller on boot is only necessary if the SoC
actually has a UDC controller and U-Boot enables support for it. All the
Tegra boards support UDC via the ChipIdea UDC driver, so make the UDC on
boot workaround depend on the ChipIdea UDC driver.

This prevents a crash on Tegra186 which does not have the ChipIdea UDC.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 28914a34a1b5..faa73559fd42 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -148,6 +148,7 @@ endchoice
 
 config TEGRA_DISCONNECT_UDC_ON_BOOT
bool "Disconnect USB device mode controller on boot"
+   depends on CI_UDC
default y
help
  When loading U-Boot into RAM over USB protocols using tools such as
-- 
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[U-Boot] [PATCH v5 22/27] p2771-0000: Pass Ethernet MAC to the kernel

[Thierry Reding]

From: Thierry Reding 

Pass the ethernet MAC address to the kernel upon boot. This passes both
the local-mac-address property (as passed to U-Boot from cboot) and the
currently set MAC address via the mac-address property. The latter will
only be set if it is different from the address that was already passed
via the local-mac-address property.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2771-/p2771-.c | 43 
 configs/p2771--000_defconfig |  1 +
 configs/p2771--500_defconfig |  1 +
 3 files changed, 45 insertions(+)

diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index 6f88010c18c3..fe22067f6571 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -4,7 +4,10 @@
  */
 
 #include 
+#include 
 #include 
+#include 
+#include 
 #include "../p2571/max77620_init.h"
 
 void pin_mux_mmc(void)
@@ -52,3 +55,43 @@ int tegra_pcie_board_init(void)
return 0;
 }
 #endif
+
+int ft_board_setup(void *fdt, bd_t *bd)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
+   const char *path;
+   int offset, err;
+
+   err = cboot_get_ethaddr(cboot_fdt, local_mac);
+   if (err < 0)
+   memset(local_mac, 0, ETH_ALEN);
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path)
+   return 0;
+
+   debug("ethernet alias found: %s\n", path);
+
+   offset = fdt_path_offset(fdt, path);
+   if (offset < 0)
+   return 0;
+
+   if (is_valid_ethaddr(local_mac)) {
+   err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
+ ETH_ALEN);
+   if (!err)
+   debug("Local MAC address set: %pM\n", local_mac);
+   }
+
+   if (eth_env_get_enetaddr("ethaddr", mac)) {
+   if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
+   err = fdt_setprop(fdt, offset, "mac-address", mac,
+ ETH_ALEN);
+   if (!err)
+   debug("MAC address set: %pM\n", mac);
+   }
+   }
+
+   return 0;
+}
diff --git a/configs/p2771--000_defconfig b/configs/p2771--000_defconfig
index ad0802067e73..91896e39a10f 100644
--- a/configs/p2771--000_defconfig
+++ b/configs/p2771--000_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA186=y
 CONFIG_NR_DRAM_BANKS=1026
 CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra186 (P2771--000) # "
diff --git a/configs/p2771--500_defconfig b/configs/p2771--500_defconfig
index 459b67fd195f..20d4393838d6 100644
--- a/configs/p2771--500_defconfig
+++ b/configs/p2771--500_defconfig
@@ -4,6 +4,7 @@ CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_TEGRA186=y
 CONFIG_NR_DRAM_BANKS=1026
 CONFIG_OF_SYSTEM_SETUP=y
+CONFIG_OF_BOARD_SETUP=y
 CONFIG_CONSOLE_MUX=y
 CONFIG_SYS_STDIO_DEREGISTER=y
 CONFIG_SYS_PROMPT="Tegra186 (P2771--500) # "
-- 
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[U-Boot] [PATCH v5 17/27] ARM: tegra: Implement cboot_save_boot_params() in C

[Thierry Reding]

From: Thierry Reding 

This is easier to deal with and works just as well for this simple
function.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/Makefile   |  2 +-
 arch/arm/mach-tegra/cboot.c| 12 
 arch/arm/mach-tegra/cboot_ll.S | 20 
 3 files changed, 13 insertions(+), 21 deletions(-)
 delete mode 100644 arch/arm/mach-tegra/cboot_ll.S

diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 41ba674edff4..7165d70a60da 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -20,7 +20,7 @@ obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o
 obj-$(CONFIG_TEGRA_PMC) += powergate.o
 obj-y += xusb-padctl-dummy.o
 
-obj-$(CONFIG_ARM64) += arm64-mmu.o cboot_ll.o cboot.o
+obj-$(CONFIG_ARM64) += arm64-mmu.o cboot.o
 obj-y += dt-setup.o
 obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o
 obj-$(CONFIG_TEGRA_GPU) += gpu.o
diff --git a/arch/arm/mach-tegra/cboot.c b/arch/arm/mach-tegra/cboot.c
index 3ebf7b03..a302ca45f39b 100644
--- a/arch/arm/mach-tegra/cboot.c
+++ b/arch/arm/mach-tegra/cboot.c
@@ -52,6 +52,18 @@ static u64 ram_top __attribute__((section(".data")));
 /* The base address of the region of RAM that ends at ram_top */
 static u64 region_base __attribute__((section(".data")));
 
+/*
+ * Explicitly put this in the .data section because it is written before the
+ * .bss section is zeroed out but it needs to persist.
+ */
+unsigned long cboot_boot_x0 __attribute__((section(".data")));
+
+void cboot_save_boot_params(unsigned long x0, unsigned long x1,
+   unsigned long x2, unsigned long x3)
+{
+   cboot_boot_x0 = x0;
+}
+
 int cboot_dram_init(void)
 {
unsigned int na, ns;
diff --git a/arch/arm/mach-tegra/cboot_ll.S b/arch/arm/mach-tegra/cboot_ll.S
deleted file mode 100644
index 4c9ddacc2b39..
--- a/arch/arm/mach-tegra/cboot_ll.S
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Save cboot-related boot-time CPU state
- *
- * (C) Copyright 2015-2016 NVIDIA Corporation 
- */
-
-#include 
-#include 
-
-.align 8
-.globl cboot_boot_x0
-cboot_boot_x0:
-   .dword 0
-
-ENTRY(cboot_save_boot_params)
-   adr x8, cboot_boot_x0
-   str x0, [x8]
-   b   save_boot_params_ret
-ENDPROC(cboot_save_boot_params)
-- 
2.21.0

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[U-Boot] [RESEND PATCH 1/2] net: rtl8169: Implement ->hwaddr_write() callback

[Thierry Reding]

From: Thierry Reding 

Implement this callback that allows the MAC address to be set for the
Ethernet card. This is necessary in order for the device to be able to
receive packets for the MAC address that U-Boot advertises.

Signed-off-by: Thierry Reding 
---
 drivers/net/rtl8169.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index a78f3d233f1a..27e27b34176b 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -941,6 +941,23 @@ static void rtl_halt(struct eth_device *dev)
 }
 #endif
 
+#ifdef CONFIG_DM_ETH
+static int rtl8169_write_hwaddr(struct udevice *dev)
+{
+   struct eth_pdata *plat = dev_get_platdata(dev);
+   unsigned int i;
+
+   RTL_W8(Cfg9346, Cfg9346_Unlock);
+
+   for (i = 0; i < MAC_ADDR_LEN; i++)
+   RTL_W8(MAC0 + i, plat->enetaddr[i]);
+
+   RTL_W8(Cfg9346, Cfg9346_Lock);
+
+   return 0;
+}
+#endif
+
 /**
 INIT - Look for an adapter, this routine's visible to the outside
 ***/
@@ -1195,6 +1212,7 @@ static const struct eth_ops rtl8169_eth_ops = {
.send   = rtl8169_eth_send,
.recv   = rtl8169_eth_recv,
.stop   = rtl8169_eth_stop,
+   .write_hwaddr = rtl8169_write_hwaddr,
 };
 
 static const struct udevice_id rtl8169_eth_ids[] = {
-- 
2.21.0

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[U-Boot] [PATCH v2 1/2] net: eth-uclass: Write MAC address to hardware after probe

[Thierry Reding]

From: Thierry Reding 

In order for the device to use the proper MAC address, which can have
been configured in the environment prior to the device being registered,
ensure that the MAC address is written after the device has been probed.
For devices that are registered before the network stack is initialized,
this is already done during eth_initialize(). If the Ethernet device is
on a bus that is not initialized on early boot, such as PCI, the device
is not available at the time eth_initialize() is called, so we need the
MAC address programming to also happen after probe.

Signed-off-by: Thierry Reding 
---
 net/eth-uclass.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 2ef20df19203..4225aabf1fa1 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev)
 #endif
}
 
+   eth_write_hwaddr(dev);
+
return 0;
 }
 
-- 
2.21.0

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[U-Boot] [RESEND PATCH 2/2] net: rtl8169: Support RTL-8168h/8111h

[Thierry Reding]

From: Thierry Reding 

This version of the RTL-8168 is present on some development boards and
is compatible with this driver. Add support for identifying this version
of the chip so that U-Boot won't complain about it being unknown.

Signed-off-by: Thierry Reding 
---
 drivers/net/rtl8169.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 27e27b34176b..bc052e72564b 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -257,6 +257,7 @@ static struct {
{"RTL-8168/8111g",  0x4c, 0xff7e1880,},
{"RTL-8101e",   0x34, 0xff7e1880,},
{"RTL-8100e",   0x32, 0xff7e1880,},
+   {"RTL-8168h/8111h", 0x54, 0xff7e1880,},
 };
 
 enum _DescStatusBit {
-- 
2.21.0

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[U-Boot] [PATCH v2 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

From: Thierry Reding 

Add the standard Ethernet device tree bindings (imported from v5.0 of
the Linux kernel) and implement support for reading the MAC address for
Ethernet devices in the Ethernet uclass. If the "mac-address" property
exists, the MAC address will be parsed from that. If that property does
not exist, the "local-mac-address" property will be tried as fallback.

MAC addresses from device tree take precedence over the ones stored in
a network interface card's ROM.

Acked-by: Joe Hershberger 
Signed-off-by: Thierry Reding 
---
Changes in v2:
- use dev_read_u8_array_ptr()

 .../devicetree/bindings/net/ethernet.txt  | 66 +++
 net/eth-uclass.c  | 26 +++-
 2 files changed, 89 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt

diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
b/Documentation/devicetree/bindings/net/ethernet.txt
new file mode 100644
index ..cfc376bc977a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet.txt
@@ -0,0 +1,66 @@
+The following properties are common to the Ethernet controllers:
+
+NOTE: All 'phy*' properties documented below are Ethernet specific. For the
+generic PHY 'phys' property, see
+Documentation/devicetree/bindings/phy/phy-bindings.txt.
+
+- local-mac-address: array of 6 bytes, specifies the MAC address that was
+  assigned to the network device;
+- mac-address: array of 6 bytes, specifies the MAC address that was last used 
by
+  the boot program; should be used in cases where the MAC address assigned to
+  the device by the boot program is different from the "local-mac-address"
+  property;
+- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
+- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
+- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
+- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
+  the maximum frame size (there's contradiction in the Devicetree
+  Specification).
+- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
+  standard property; supported values are:
+  * "internal"
+  * "mii"
+  * "gmii"
+  * "sgmii"
+  * "qsgmii"
+  * "tbi"
+  * "rev-mii"
+  * "rmii"
+  * "rgmii" (RX and TX delays are added by the MAC when required)
+  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
+ MAC should not add the RX or TX delays in this case)
+  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
+ should not add an RX delay in this case)
+  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
+ should not add an TX delay in this case)
+  * "rtbi"
+  * "smii"
+  * "xgmii"
+  * "trgmii"
+  * "2000base-x",
+  * "2500base-x",
+  * "rxaui"
+  * "xaui"
+  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
+- phy-connection-type: the same as "phy-mode" property but described in the
+  Devicetree Specification;
+- phy-handle: phandle, specifies a reference to a node representing a PHY
+  device; this property is described in the Devicetree Specification and so
+  preferred;
+- phy: the same as "phy-handle" property, not recommended for new bindings.
+- phy-device: the same as "phy-handle" property, not recommended for new
+  bindings.
+- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
+  is used for components that can have configurable receive fifo sizes,
+  and is useful for determining certain configuration settings such as
+  flow control thresholds.
+- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
+  is used for components that can have configurable fifo sizes.
+- managed: string, specifies the PHY management type. Supported values are:
+  "auto", "in-band-status". "auto" is the default, it usess MDIO for
+  management if fixed-link is not specified.
+
+Child nodes of the Ethernet controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+They are described in the phy.txt file in this same directory.
+For non-MDIO PHY management see fixed-link.txt.
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 4225aabf1fa1..c6d5ec013bd8 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -455,6 +455,23 @@ static int eth_pre_unbind(struct udevice *dev)
return 0;
 }
 
+static bool eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN])
+{
+   const uint8_t *p;
+
+   p = dev_read_u8_array_ptr(dev, "mac-address", ARP_HLEN);
+   if (!p)
+   p = dev_read_

Re: [U-Boot] [PATCH 1/2] pci: Add boundary check for hose->regions

[Thierry Reding]

On Fri, Mar 15, 2019 at 04:32:32PM +0100, Thierry Reding wrote:
> From: Thierry Reding 
> 
> Make sure that we don't overflow the hose->regions array, otherwise we
> would end up overwriting the hose->region_count field and cause mayhem
> to ensue. Also print an error message when we'd be overflowing because
> it indicates that there aren't enough regions available and the number
> needs to be increased.
> 
> Signed-off-by: Thierry Reding 
> ---
>  drivers/pci/pci-uclass.c | 5 +
>  1 file changed, 5 insertions(+)

Hi Tom,

have you had a chance to look at these two patches? Simon's reviewed
them and they are needed to restore PCI support on Jetson TX2 (P2771).

Thierry

> diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
> index 824fa1190747..cf1e7617ae35 100644
> --- a/drivers/pci/pci-uclass.c
> +++ b/drivers/pci/pci-uclass.c
> @@ -918,6 +918,11 @@ static void decode_regions(struct pci_controller *hose, 
> ofnode parent_node,
>   return;
>  
>   for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
> + if (hose->region_count == MAX_PCI_REGIONS) {
> + pr_err("maximum number of regions parsed, aborting\n");
> + break;
> + }
> +
>   if (bd->bi_dram[i].size) {
>   pci_set_region(hose->regions + hose->region_count++,
>  bd->bi_dram[i].start,
> -- 
> 2.20.1
> 


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Re: [U-Boot] [PATCH v4 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

On Mon, May 20, 2019 at 05:59:57PM +0200, Thierry Reding wrote:
> From: Thierry Reding 
> 
> Add the standard Ethernet device tree bindings (imported from v5.0 of
> the Linux kernel) and implement support for reading the MAC address for
> Ethernet devices in the Ethernet uclass. If the "mac-address" property
> exists, the MAC address will be parsed from that. If that property does
> not exist, the "local-mac-address" property will be tried as fallback.
> 
> MAC addresses from device tree take precedence over the ones stored in
> a network interface card's ROM.
> 
> Acked-by: Joe Hershberger 
> Reviewed-by: Grygorii Strashko 
> Signed-off-by: Thierry Reding 
> ---
> Changes in v4:
> - do not clear MAC address on failure to avoid overwriting existing MAC
> - fix build on xtensa (missing CONFIG_OF_CONTROL)
> 
> Changes in v3:
> - add additional check to make sure the MAC address read from device
>   tree is a valid MAC address
> 
> Changes in v2:
> - use dev_read_u8_array_ptr()
> ---
>  .../devicetree/bindings/net/ethernet.txt  | 66 +++
>  net/eth-uclass.c  | 30 -
>  2 files changed, 93 insertions(+), 3 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt

Hi Joe,

did you have a chance to look at this updated version? I've manually
verified that the qemu-x86_64 test failure is no longer there and the
build failure for xtensa is also gone.

A fairly largish series for Tom's Tegra tree is currently blocked on
this because without these two patches it will cause a test failure.

Thierry

> diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
> b/Documentation/devicetree/bindings/net/ethernet.txt
> new file mode 100644
> index ..cfc376bc977a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/ethernet.txt
> @@ -0,0 +1,66 @@
> +The following properties are common to the Ethernet controllers:
> +
> +NOTE: All 'phy*' properties documented below are Ethernet specific. For the
> +generic PHY 'phys' property, see
> +Documentation/devicetree/bindings/phy/phy-bindings.txt.
> +
> +- local-mac-address: array of 6 bytes, specifies the MAC address that was
> +  assigned to the network device;
> +- mac-address: array of 6 bytes, specifies the MAC address that was last 
> used by
> +  the boot program; should be used in cases where the MAC address assigned to
> +  the device by the boot program is different from the "local-mac-address"
> +  property;
> +- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
> +- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
> +- max-speed: number, specifies maximum speed in Mbit/s supported by the 
> device;
> +- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather 
> than
> +  the maximum frame size (there's contradiction in the Devicetree
> +  Specification).
> +- phy-mode: string, operation mode of the PHY interface. This is now a 
> de-facto
> +  standard property; supported values are:
> +  * "internal"
> +  * "mii"
> +  * "gmii"
> +  * "sgmii"
> +  * "qsgmii"
> +  * "tbi"
> +  * "rev-mii"
> +  * "rmii"
> +  * "rgmii" (RX and TX delays are added by the MAC when required)
> +  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
> + MAC should not add the RX or TX delays in this case)
> +  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
> + should not add an RX delay in this case)
> +  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
> + should not add an TX delay in this case)
> +  * "rtbi"
> +  * "smii"
> +  * "xgmii"
> +  * "trgmii"
> +  * "2000base-x",
> +  * "2500base-x",
> +  * "rxaui"
> +  * "xaui"
> +  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
> +- phy-connection-type: the same as "phy-mode" property but described in the
> +  Devicetree Specification;
> +- phy-handle: phandle, specifies a reference to a node representing a PHY
> +  device; this property is described in the Devicetree Specification and so
> +  preferred;
> +- phy: the same as "phy-handle" property, not recommended for new bindings.
> +- phy-device: the same as "phy-handle" property, not recommended for new
> +  bindings.
> +- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
> +  is used for components that can have configurable receive fifo sizes,
> +  and is useful 

Re: [U-Boot] rtl8169: use dm_pci_map_bar

[Thierry Reding]

On Thu, Jun 13, 2019 at 03:16:10PM +0800, Bin Meng wrote:
> Hi Stefan,
> 
> On Thu, Jun 13, 2019 at 1:40 PM Stefan Roese  wrote:
> >
> > Added Bin, Joe and Thierry to Cc
> >
> > On 11.06.19 13:15, Patrick Wildt wrote:
> > > Hi,
> > >
> > > I have an rtl8169 on a macchiatobin and that card has a 64-bit
> > > memory address.  The current code only reads a single word, which
> > > means it can only support a 32-bit address.  By using dm_pci_map_bar
> > > we don't need to manually parse the register, we can just have it do
> > > its job.
> > >
> > > I'm not sure though if this works for all devices since the previous
> > > version had an explicit check for the device.
> > >
> > > Patrick
> > >
> > > Signed-off-by: Patrick Wildt 
> > >
> > > diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
> > > index 521e5909a2..f1d2ade253 100644
> > > --- a/drivers/net/rtl8169.c
> > > +++ b/drivers/net/rtl8169.c
> > > @@ -1182,22 +1182,11 @@ static int rtl8169_eth_probe(struct udevice *dev)
> > >   struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
> > >   struct rtl8169_private *priv = dev_get_priv(dev);
> > >   struct eth_pdata *plat = dev_get_platdata(dev);
> > > - u32 iobase;
> > > - int region;
> > >   int ret;
> > >
> > > - debug("rtl8169: REALTEK RTL8169 @0x%x\n", iobase);
> > > - switch (pplat->device) {
> > > - case 0x8168:
> > > - region = 2;
> > > - break;
> > > - default:
> > > - region = 1;
> > > - break;
> > > - }
> > > - dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0 + region * 4, );
> > > - iobase &= ~0xf;
> > > - priv->iobase = (int)dm_pci_mem_to_phys(dev, iobase);
> > > + priv->iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_2,
> > > +   PCI_REGION_MEM);
> > > + printf("rtl8169: REALTEK RTL8169 @0x%x\n", priv->iobase);
> > >
> > >   ret = rtl_init(priv->iobase, dev->name, plat->enetaddr);
> > >   if (ret < 0) {
> >
> > Bin, Joe, Thierry,
> >
> > do you have any comments on this patch? Moving unconditionally to one
> > BAR instead of BAR1/2 depending on the chip version seems a bit
> > "brave".
> 
> Agreed that blinding setting one BAR for the iobase is not a good idea.

Agreed. I don't know whether it's actually required to differentiate
based on version, but I suppose the code is like that for a reason, so
better keep that.

Also, looking at dm_pci_map_bar() it doesn't look like that does
anything different than the existing code. It merely reads a single
32-bit register, so it doesn't properly deal with 64-bit BARs either.

I suppose that could be fixed in dm_pci_map_bar(), and then the fix
would automatically propagate to all users of that, which is good. But I
don't think it currently works correctly.

Thierry


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Re: [U-Boot] [PATCH v2 45/50] Revert "pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS"

[Thierry Reding]

On Tue, May 07, 2019 at 09:04:16PM -0600, Simon Glass wrote:
> Hi Bin,
> 
> On Tue, 7 May 2019 at 03:28, Bin Meng  wrote:
> >
> > Hi Simon, Thierry,
> >
> > On Fri, May 3, 2019 at 12:22 AM Simon Glass  wrote:
> > >
> > > Hi Thierry,
> > >
> > > On Thu, 2 May 2019 at 03:25, Thierry Reding  wrote:
> > > >
> > > > On Thu, May 02, 2019 at 12:09:49AM +0800, Bin Meng wrote:
> > > > > +Thierry
> > > > >
> > > > > On Fri, Apr 26, 2019 at 12:00 PM Simon Glass  
> > > > > wrote:
> > > > > >
> > > > > > This reverts commit aec4298ccb337106fd0115b91d846a022fdf301d.
> > > > > >
> > > > > > Unfortunately this has a dramatic impact on the pre-relocation 
> > > > > > memory
> > > > > > used on x86 platforms (increasing it by 2KB) since it increases the
> > > > > > overhead for each PCI device from 220 bytes to 412 bytes.
> > > > > >
> > > > > > The offending line is in UCLASS_DRIVER(pci):
> > > > > >
> > > > > > .per_device_auto_alloc_size = sizeof(struct pci_controller),
> > > > > >
> > > > > > This means that all PCI devices have the controller struct 
> > > > > > associated
> > > > > > with them. The solution is to move the regions[] member out of the 
> > > > > > array,
> > > > > > makes its size dynamic, or split UCLASS_PCI into controllers and
> > > > > > non-controllers, as the comment suggests.
> > > > > >
> > > > > > For now, revert the commit to get things running again.
> > > > > >
> > > > > > Signed-off-by: Simon Glass 
> > > > > > ---
> > > > > >
> > > > > > Changes in v2: None
> > > > > >
> > > > > >  include/pci.h | 6 +-
> > > > > >  1 file changed, 1 insertion(+), 5 deletions(-)
> > > > > >
> > > > >
> > > > > Reviewed-by: Bin Meng 
> > > >
> > > > Ugh... so we're trading one regression for another? Can we not live with
> > > > the 2 KiB increase on x86 until this has been properly fixed? Currently
> > > > this will cause Jetson TX2 to crash if it starts using PCI.
> > >
> > > Unfortunately this breaks several boards since we are out of memory.
> > >
> > > I think this needs a better solution to reduce the memory usage down
> > > to sensible levels. This is something I should have considered when
> > > implementing the PCI uclass, but unfortunately I did not.
> > >
> >
> > Could you please suggest whether I should apply this revert patch for now?
> 
> I suggest a temporary revert since this breaks some x86 boards.
> 
> I think the real fix is to reduce the memory used by PCI devices.
> Thierry, do you have time to look at this?

Not right away. I may get around to this within a couple of weeks maybe.

Thierry


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[U-Boot] [PATCH v4 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

From: Thierry Reding 

Add the standard Ethernet device tree bindings (imported from v5.0 of
the Linux kernel) and implement support for reading the MAC address for
Ethernet devices in the Ethernet uclass. If the "mac-address" property
exists, the MAC address will be parsed from that. If that property does
not exist, the "local-mac-address" property will be tried as fallback.

MAC addresses from device tree take precedence over the ones stored in
a network interface card's ROM.

Acked-by: Joe Hershberger 
Reviewed-by: Grygorii Strashko 
Signed-off-by: Thierry Reding 
---
Changes in v4:
- do not clear MAC address on failure to avoid overwriting existing MAC
- fix build on xtensa (missing CONFIG_OF_CONTROL)

Changes in v3:
- add additional check to make sure the MAC address read from device
  tree is a valid MAC address

Changes in v2:
- use dev_read_u8_array_ptr()
---
 .../devicetree/bindings/net/ethernet.txt  | 66 +++
 net/eth-uclass.c  | 30 -
 2 files changed, 93 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt

diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
b/Documentation/devicetree/bindings/net/ethernet.txt
new file mode 100644
index ..cfc376bc977a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet.txt
@@ -0,0 +1,66 @@
+The following properties are common to the Ethernet controllers:
+
+NOTE: All 'phy*' properties documented below are Ethernet specific. For the
+generic PHY 'phys' property, see
+Documentation/devicetree/bindings/phy/phy-bindings.txt.
+
+- local-mac-address: array of 6 bytes, specifies the MAC address that was
+  assigned to the network device;
+- mac-address: array of 6 bytes, specifies the MAC address that was last used 
by
+  the boot program; should be used in cases where the MAC address assigned to
+  the device by the boot program is different from the "local-mac-address"
+  property;
+- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
+- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
+- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
+- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
+  the maximum frame size (there's contradiction in the Devicetree
+  Specification).
+- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
+  standard property; supported values are:
+  * "internal"
+  * "mii"
+  * "gmii"
+  * "sgmii"
+  * "qsgmii"
+  * "tbi"
+  * "rev-mii"
+  * "rmii"
+  * "rgmii" (RX and TX delays are added by the MAC when required)
+  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
+ MAC should not add the RX or TX delays in this case)
+  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
+ should not add an RX delay in this case)
+  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
+ should not add an TX delay in this case)
+  * "rtbi"
+  * "smii"
+  * "xgmii"
+  * "trgmii"
+  * "2000base-x",
+  * "2500base-x",
+  * "rxaui"
+  * "xaui"
+  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
+- phy-connection-type: the same as "phy-mode" property but described in the
+  Devicetree Specification;
+- phy-handle: phandle, specifies a reference to a node representing a PHY
+  device; this property is described in the Devicetree Specification and so
+  preferred;
+- phy: the same as "phy-handle" property, not recommended for new bindings.
+- phy-device: the same as "phy-handle" property, not recommended for new
+  bindings.
+- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
+  is used for components that can have configurable receive fifo sizes,
+  and is useful for determining certain configuration settings such as
+  flow control thresholds.
+- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
+  is used for components that can have configurable fifo sizes.
+- managed: string, specifies the PHY management type. Supported values are:
+  "auto", "in-band-status". "auto" is the default, it usess MDIO for
+  management if fixed-link is not specified.
+
+Child nodes of the Ethernet controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+They are described in the phy.txt file in this same directory.
+For non-MDIO PHY management see fixed-link.txt.
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 4225aabf1fa1..031d55862583 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -455,6 +455,26 @@ 

[U-Boot] [PATCH v4 1/2] net: eth-uclass: Write MAC address to hardware after probe

[Thierry Reding]

From: Thierry Reding 

In order for the device to use the proper MAC address, which can have
been configured in the environment prior to the device being registered,
ensure that the MAC address is written after the device has been probed.
For devices that are registered before the network stack is initialized,
this is already done during eth_initialize(). If the Ethernet device is
on a bus that is not initialized on early boot, such as PCI, the device
is not available at the time eth_initialize() is called, so we need the
MAC address programming to also happen after probe.

Acked-by: Joe Hershberger 
Signed-off-by: Thierry Reding 
---
 net/eth-uclass.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 2ef20df19203..4225aabf1fa1 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev)
 #endif
}
 
+   eth_write_hwaddr(dev);
+
return 0;
 }
 
-- 
2.21.0

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Re: [U-Boot] [PATCH 1/2] fdtdec: test: Fix memory leak

[Thierry Reding]

On Mon, May 20, 2019 at 02:51:08PM -0600, Simon Glass wrote:
> Hi Thierry,
> 
> On Mon, 20 May 2019 at 10:05, Thierry Reding  wrote:
> >
> > From: Thierry Reding 
> >
> > Free the memory allocated to store the test FDT upon test completion to
> > avoid leaking the memory. We don't bother cleaning up on test failure
> > since the code is broken in that case and should be fixed, in which case
> > the leak would also go away.
> >
> > Reported-by: Tom Rini 
> > Suggested-by: Heinrich Schuchardt 
> > Signed-off-by: Thierry Reding 
> > ---
> >  lib/fdtdec_test.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
> > index f6defe16c5a6..54efcc3d46ac 100644
> > --- a/lib/fdtdec_test.c
> > +++ b/lib/fdtdec_test.c
> > @@ -138,6 +138,7 @@ static int run_test(const char *aliases, const char 
> > *nodes, const char *expect)
> > }
> >
> > printf("pass\n");
> > +   free(blob);
> 
> Strictly speaking, CHECKVAL() can cause a function return in the case
> of an error.
> 
> So a better solution might be to put the code after the malloc() into
> a separate function.

When Heinrich suggested this fix he brought up the same issue, but
concluded, and I agree with him, that it wasn't worth addressing the
CHECKVAL case because if CHECKVAL failed, our code was buggy and would
need fixing, at which point the leak would go away along with the bug.

Do you feel strongly about reworking this so it doesn't leak in the
error case either?

Thierry


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[U-Boot] [PATCH 1/2] fdtdec: test: Fix memory leak

[Thierry Reding]

From: Thierry Reding 

Free the memory allocated to store the test FDT upon test completion to
avoid leaking the memory. We don't bother cleaning up on test failure
since the code is broken in that case and should be fixed, in which case
the leak would also go away.

Reported-by: Tom Rini 
Suggested-by: Heinrich Schuchardt 
Signed-off-by: Thierry Reding 
---
 lib/fdtdec_test.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index f6defe16c5a6..54efcc3d46ac 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -138,6 +138,7 @@ static int run_test(const char *aliases, const char *nodes, 
const char *expect)
}
 
printf("pass\n");
+   free(blob);
return 0;
 }
 
@@ -288,6 +289,7 @@ static int check_carveout(void)
CHECKVAL(make_fdt_carveout(fdt, FDT_SIZE, 2, 2), 0);
CHECKOK(check_fdt_carveout(fdt, 2, 2));
 
+   free(fdt);
return 0;
 }
 
-- 
2.21.0

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[U-Boot] [PATCH 2/2] fdtdec: Remove fdt_{addr,size}_unpack()

[Thierry Reding]

From: Thierry Reding 

U-Boot already defines the {upper,lower}_32_bits() macros that have the
same purpose. Use the existing macros instead of defining new APIs.

Signed-off-by: Thierry Reding 
---
 include/fdtdec.h  | 24 
 lib/fdtdec.c  |  8 ++--
 lib/fdtdec_test.c |  8 ++--
 3 files changed, 12 insertions(+), 28 deletions(-)

diff --git a/include/fdtdec.h b/include/fdtdec.h
index 110aa6ab6dea..fa8e34f6f960 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -24,30 +24,6 @@
 typedef phys_addr_t fdt_addr_t;
 typedef phys_size_t fdt_size_t;
 
-static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
-{
-   if (upper)
-#ifdef CONFIG_PHYS_64BIT
-   *upper = addr >> 32;
-#else
-   *upper = 0;
-#endif
-
-   return addr;
-}
-
-static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper)
-{
-   if (upper)
-#ifdef CONFIG_PHYS_64BIT
-   *upper = size >> 32;
-#else
-   *upper = 0;
-#endif
-
-   return size;
-}
-
 #ifdef CONFIG_PHYS_64BIT
 #define FDT_ADDR_T_NONE (-1U)
 #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index fea44a9a8c65..d0ba88897335 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
fdt32_t cells[4] = {}, *ptr = cells;
uint32_t upper, lower, phandle;
int parent, node, na, ns, err;
+   fdt_size_t size;
char name[64];
 
/* create an empty /reserved-memory node if one doesn't exist */
@@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
 * Unpack the start address and generate the name of the new node
 * base on the basename and the unit-address.
 */
-   lower = fdt_addr_unpack(carveout->start, );
+   upper = upper_32_bits(carveout->start);
+   lower = lower_32_bits(carveout->start);
 
if (na > 1 && upper > 0)
snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
@@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
*ptr++ = cpu_to_fdt32(lower);
 
/* store one or two size cells */
-   lower = fdt_size_unpack(carveout->end - carveout->start + 1, );
+   size = carveout->end - carveout->start + 1;
+   upper = upper_32_bits(size);
+   lower = lower_32_bits(size);
 
if (ns > 1)
*ptr++ = cpu_to_fdt32(upper);
diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
index 54efcc3d46ac..e8bfd1fb1ec3 100644
--- a/lib/fdtdec_test.c
+++ b/lib/fdtdec_test.c
@@ -156,11 +156,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t 
na, uint32_t ns)
};
fdt32_t cells[4], *ptr = cells;
uint32_t upper, lower;
+   fdt_size_t size;
char name[32];
int offset;
 
/* store one or two address cells */
-   lower = fdt_addr_unpack(carveout.start, );
+   upper = upper_32_bits(carveout.start);
+   lower = lower_32_bits(carveout.start);
 
if (na > 1 && upper > 0)
snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
@@ -174,7 +176,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, 
uint32_t ns)
*ptr++ = cpu_to_fdt32(lower);
 
/* store one or two size cells */
-   lower = fdt_size_unpack(carveout.end - carveout.start + 1, );
+   size = carveout.end - carveout.start + 1;
+   upper = upper_32_bits(size);
+   lower = lower_32_bits(size);
 
if (ns > 1)
*ptr++ = cpu_to_fdt32(upper);
-- 
2.21.0

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Re: [U-Boot] [PATCH 1/2] fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle()

[Thierry Reding]

On Mon, May 06, 2019 at 09:52:00PM -0600, Simon Glass wrote:
> Hi Thierry,
> 
> On Thu, 25 Apr 2019 at 07:25, Thierry Reding  wrote:
> >
> > On Mon, Apr 15, 2019 at 10:08:20AM +0200, Thierry Reding wrote:
> > > From: Thierry Reding 
> > >
> > > The fdt_setprop_u32() function does everything that we need, so we
> > > really only use the function as a convenience wrapper, in which case it
> > > can simply be a static inline function.
> > >
> > > Signed-off-by: Thierry Reding 
> > > ---
> > >  include/fdtdec.h | 5 -
> > >  lib/fdtdec.c | 7 ---
> > >  2 files changed, 4 insertions(+), 8 deletions(-)
> >
> > Hi Simon,
> >
> > gentle reminder on these. These are the two follow-up patches that you
> > had suggested I make on top of the other fdtdec series that you applied
> > a couple of weeks ago.
> 
> I think this is applied now?

Yes, I can see this in origin/master now.

Thierry


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Re: [U-Boot] [PATCH 2/2] fdtdec: Remove fdt_{addr,size}_unpack()

[Thierry Reding]

On Mon, May 06, 2019 at 09:52:02PM -0600, Simon Glass wrote:
> Hi Thierry,
> 
> On Fri, 26 Apr 2019 at 06:01, Thierry Reding  wrote:
> >
> > On Mon, Apr 15, 2019 at 10:08:21AM +0200, Thierry Reding wrote:
> > > From: Thierry Reding 
> > >
> > > U-Boot already defines the {upper,lower}_32_bits() macros that have the
> > > same purpose. Use the existing macros instead of defining new APIs.
> > >
> > > Signed-off-by: Thierry Reding 
> > > ---
> > >  include/fdtdec.h  | 24 
> > >  lib/fdtdec.c  |  8 ++--
> > >  lib/fdtdec_test.c |  8 ++--
> > >  3 files changed, 12 insertions(+), 28 deletions(-)
> >
> > Hi Simon,
> >
> > you picked up patch 1/2 of this set. Did you have any comments on v2, or
> > did you overlook it?
> 
> I marked it as superseded.
> 
> http://patchwork.ozlabs.org/patch/1085480/
> 
> Is that incorrect?

I think I messed up my earlier email. What I meant to say was whether
you had any comments on patch 2/2. There's no v2 of this patch and it
hasn't been applied. It's also not superseeded by anything. So I think
this should still be applied.

Thierry


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Re: [U-Boot] [PATCH v2 45/50] Revert "pci: Scale MAX_PCI_REGIONS based on CONFIG_NR_DRAM_BANKS"

[Thierry Reding]

On Thu, May 02, 2019 at 12:09:49AM +0800, Bin Meng wrote:
> +Thierry
> 
> On Fri, Apr 26, 2019 at 12:00 PM Simon Glass  wrote:
> >
> > This reverts commit aec4298ccb337106fd0115b91d846a022fdf301d.
> >
> > Unfortunately this has a dramatic impact on the pre-relocation memory
> > used on x86 platforms (increasing it by 2KB) since it increases the
> > overhead for each PCI device from 220 bytes to 412 bytes.
> >
> > The offending line is in UCLASS_DRIVER(pci):
> >
> > .per_device_auto_alloc_size = sizeof(struct pci_controller),
> >
> > This means that all PCI devices have the controller struct associated
> > with them. The solution is to move the regions[] member out of the array,
> > makes its size dynamic, or split UCLASS_PCI into controllers and
> > non-controllers, as the comment suggests.
> >
> > For now, revert the commit to get things running again.
> >
> > Signed-off-by: Simon Glass 
> > ---
> >
> > Changes in v2: None
> >
> >  include/pci.h | 6 +-
> >  1 file changed, 1 insertion(+), 5 deletions(-)
> >
> 
> Reviewed-by: Bin Meng 

Ugh... so we're trading one regression for another? Can we not live with
the 2 KiB increase on x86 until this has been properly fixed? Currently
this will cause Jetson TX2 to crash if it starts using PCI.

Thierry


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Re: [U-Boot] [PATCH 2/2] fdtdec: Remove fdt_{addr,size}_unpack()

[Thierry Reding]

On Mon, Apr 15, 2019 at 10:08:21AM +0200, Thierry Reding wrote:
> From: Thierry Reding 
> 
> U-Boot already defines the {upper,lower}_32_bits() macros that have the
> same purpose. Use the existing macros instead of defining new APIs.
> 
> Signed-off-by: Thierry Reding 
> ---
>  include/fdtdec.h  | 24 
>  lib/fdtdec.c  |  8 ++--
>  lib/fdtdec_test.c |  8 ++--
>  3 files changed, 12 insertions(+), 28 deletions(-)

Hi Simon,

you picked up patch 1/2 of this set. Did you have any comments on v2, or
did you overlook it?

Thierry

> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index 110aa6ab6dea..fa8e34f6f960 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -24,30 +24,6 @@
>  typedef phys_addr_t fdt_addr_t;
>  typedef phys_size_t fdt_size_t;
>  
> -static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
> -{
> - if (upper)
> -#ifdef CONFIG_PHYS_64BIT
> - *upper = addr >> 32;
> -#else
> - *upper = 0;
> -#endif
> -
> - return addr;
> -}
> -
> -static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper)
> -{
> - if (upper)
> -#ifdef CONFIG_PHYS_64BIT
> - *upper = size >> 32;
> -#else
> - *upper = 0;
> -#endif
> -
> - return size;
> -}
> -
>  #ifdef CONFIG_PHYS_64BIT
>  #define FDT_ADDR_T_NONE (-1U)
>  #define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index fea44a9a8c65..d0ba88897335 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char 
> *basename,
>   fdt32_t cells[4] = {}, *ptr = cells;
>   uint32_t upper, lower, phandle;
>   int parent, node, na, ns, err;
> + fdt_size_t size;
>   char name[64];
>  
>   /* create an empty /reserved-memory node if one doesn't exist */
> @@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char 
> *basename,
>* Unpack the start address and generate the name of the new node
>* base on the basename and the unit-address.
>*/
> - lower = fdt_addr_unpack(carveout->start, );
> + upper = upper_32_bits(carveout->start);
> + lower = lower_32_bits(carveout->start);
>  
>   if (na > 1 && upper > 0)
>   snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
> @@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char 
> *basename,
>   *ptr++ = cpu_to_fdt32(lower);
>  
>   /* store one or two size cells */
> - lower = fdt_size_unpack(carveout->end - carveout->start + 1, );
> + size = carveout->end - carveout->start + 1;
> + upper = upper_32_bits(size);
> + lower = lower_32_bits(size);
>  
>   if (ns > 1)
>   *ptr++ = cpu_to_fdt32(upper);
> diff --git a/lib/fdtdec_test.c b/lib/fdtdec_test.c
> index f6defe16c5a6..1f4f27054057 100644
> --- a/lib/fdtdec_test.c
> +++ b/lib/fdtdec_test.c
> @@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t 
> na, uint32_t ns)
>   };
>   fdt32_t cells[4], *ptr = cells;
>   uint32_t upper, lower;
> + fdt_size_t size;
>   char name[32];
>   int offset;
>  
>   /* store one or two address cells */
> - lower = fdt_addr_unpack(carveout.start, );
> + upper = upper_32_bits(carveout.start);
> + lower = lower_32_bits(carveout.start);
>  
>   if (na > 1 && upper > 0)
>   snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
> @@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t 
> na, uint32_t ns)
>   *ptr++ = cpu_to_fdt32(lower);
>  
>   /* store one or two size cells */
> - lower = fdt_size_unpack(carveout.end - carveout.start + 1, );
> + size = carveout.end - carveout.start + 1;
> + upper = upper_32_bits(size);
> + lower = lower_32_bits(size);
>  
>   if (ns > 1)
>   *ptr++ = cpu_to_fdt32(upper);
> -- 
> 2.21.0
> 


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Re: [U-Boot] [PATCH v2 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

On Wed, Apr 17, 2019 at 09:32:26PM -0700, Simon Glass wrote:
> Hi Thierry,
> 
> On Wed, 17 Apr 2019 at 08:03, Thierry Reding 
> wrote:
> 
> > On Wed, Apr 17, 2019 at 02:49:22PM +0300, Grygorii Strashko wrote:
> > >
> > >
> > > On 16.04.19 19:24, Thierry Reding wrote:
> > > > From: Thierry Reding 
> > > >
> > > > Add the standard Ethernet device tree bindings (imported from v5.0 of
> > > > the Linux kernel) and implement support for reading the MAC address for
> > > > Ethernet devices in the Ethernet uclass. If the "mac-address" property
> > > > exists, the MAC address will be parsed from that. If that property does
> > > > not exist, the "local-mac-address" property will be tried as fallback.
> > > >
> > > > MAC addresses from device tree take precedence over the ones stored in
> > > > a network interface card's ROM.
> > > >
> > > > Acked-by: Joe Hershberger 
> > > > Signed-off-by: Thierry Reding 
> > > > ---
> > > > Changes in v2:
> > > > - use dev_read_u8_array_ptr()
> >
> 
> It would be good to have test cases for these.

By "these", do you mean the eth_dev_get_mac_address() function that this
patche introduces, or the dev_read_u8_array_ptr() function?

For the former, that'd be a little difficult because it is not a public
API, it's only called from the eth-uclass.c code.

Thierry

> > > >
> > > >  .../devicetree/bindings/net/ethernet.txt  | 66 +++
> > > >  net/eth-uclass.c  | 26 +++-
> > > >  2 files changed, 89 insertions(+), 3 deletions(-)
> > > >  create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt
> >
> > Regards,
> Simon


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Re: [U-Boot] [PATCH 1/2] fdtdec: Use fdt_setprop_u32() for fdtdec_set_phandle()

[Thierry Reding]

On Mon, Apr 15, 2019 at 10:08:20AM +0200, Thierry Reding wrote:
> From: Thierry Reding 
> 
> The fdt_setprop_u32() function does everything that we need, so we
> really only use the function as a convenience wrapper, in which case it
> can simply be a static inline function.
> 
> Signed-off-by: Thierry Reding 
> ---
>  include/fdtdec.h | 5 -
>  lib/fdtdec.c | 7 ---
>  2 files changed, 4 insertions(+), 8 deletions(-)

Hi Simon,

gentle reminder on these. These are the two follow-up patches that you
had suggested I make on top of the other fdtdec series that you applied
a couple of weeks ago.

Thierry

> diff --git a/include/fdtdec.h b/include/fdtdec.h
> index 266c58271f0b..110aa6ab6dea 100644
> --- a/include/fdtdec.h
> +++ b/include/fdtdec.h
> @@ -1029,7 +1029,10 @@ int fdtdec_setup_memory_banksize(void);
>   * @param phandlephandle to set for the given node
>   * @return 0 on success or a negative error code on failure
>   */
> -int fdtdec_set_phandle(void *blob, int node, uint32_t phandle);
> +static inline int fdtdec_set_phandle(void *blob, int node, uint32_t phandle)
> +{
> + return fdt_setprop_u32(blob, node, "phandle", phandle);
> +}
>  
>  /**
>   * fdtdec_add_reserved_memory() - add or find a reserved-memory node
> diff --git a/lib/fdtdec.c b/lib/fdtdec.c
> index 9c9c30234732..fea44a9a8c65 100644
> --- a/lib/fdtdec.c
> +++ b/lib/fdtdec.c
> @@ -1261,13 +1261,6 @@ __weak void *board_fdt_blob_setup(void)
>  }
>  #endif
>  
> -int fdtdec_set_phandle(void *blob, int node, uint32_t phandle)
> -{
> - fdt32_t value = cpu_to_fdt32(phandle);
> -
> - return fdt_setprop(blob, node, "phandle", , sizeof(value));
> -}
> -
>  static int fdtdec_init_reserved_memory(void *blob)
>  {
>   int na, ns, node, err;
> -- 
> 2.21.0
> 


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Re: [U-Boot] [PATCH v2 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

On Thu, Apr 18, 2019 at 07:30:05PM +0300, Grygorii Strashko wrote:
> 
> 
> On 17.04.19 18:03, Thierry Reding wrote:
> > On Wed, Apr 17, 2019 at 02:49:22PM +0300, Grygorii Strashko wrote:
> >>
> >>
> >> On 16.04.19 19:24, Thierry Reding wrote:
> >>> From: Thierry Reding 
> >>>
> >>> Add the standard Ethernet device tree bindings (imported from v5.0 of
> >>> the Linux kernel) and implement support for reading the MAC address for
> >>> Ethernet devices in the Ethernet uclass. If the "mac-address" property
> >>> exists, the MAC address will be parsed from that. If that property does
> >>> not exist, the "local-mac-address" property will be tried as fallback.
> >>>
> >>> MAC addresses from device tree take precedence over the ones stored in
> >>> a network interface card's ROM.
> >>>
> >>> Acked-by: Joe Hershberger 
> >>> Signed-off-by: Thierry Reding 
> >>> ---
> >>> Changes in v2:
> >>> - use dev_read_u8_array_ptr()
> >>>
> >>>  .../devicetree/bindings/net/ethernet.txt  | 66 +++
> >>>  net/eth-uclass.c  | 26 +++-
> >>>  2 files changed, 89 insertions(+), 3 deletions(-)
> >>>  create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt
> >>>
> >>> diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
> >>> b/Documentation/devicetree/bindings/net/ethernet.txt
> >>> new file mode 100644
> >>> index ..cfc376bc977a
> >>> --- /dev/null
> >>> +++ b/Documentation/devicetree/bindings/net/ethernet.txt
> >>> @@ -0,0 +1,66 @@
> >>> +The following properties are common to the Ethernet controllers:
> >>> +
> >>> +NOTE: All 'phy*' properties documented below are Ethernet specific. For 
> >>> the
> >>> +generic PHY 'phys' property, see
> >>> +Documentation/devicetree/bindings/phy/phy-bindings.txt.
> >>> +
> >>> +- local-mac-address: array of 6 bytes, specifies the MAC address that was
> >>> +  assigned to the network device;
> >>> +- mac-address: array of 6 bytes, specifies the MAC address that was last 
> >>> used by
> >>> +  the boot program; should be used in cases where the MAC address 
> >>> assigned to
> >>> +  the device by the boot program is different from the 
> >>> "local-mac-address"
> >>> +  property;
> >>> +- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
> >>> +- nvmem-cell-names: string, should be "mac-address" if nvmem is to be 
> >>> used;
> >>> +- max-speed: number, specifies maximum speed in Mbit/s supported by the 
> >>> device;
> >>> +- max-frame-size: number, maximum transfer unit (IEEE defined MTU), 
> >>> rather than
> >>> +  the maximum frame size (there's contradiction in the Devicetree
> >>> +  Specification).
> >>> +- phy-mode: string, operation mode of the PHY interface. This is now a 
> >>> de-facto
> >>> +  standard property; supported values are:
> >>> +  * "internal"
> >>> +  * "mii"
> >>> +  * "gmii"
> >>> +  * "sgmii"
> >>> +  * "qsgmii"
> >>> +  * "tbi"
> >>> +  * "rev-mii"
> >>> +  * "rmii"
> >>> +  * "rgmii" (RX and TX delays are added by the MAC when required)
> >>> +  * "rgmii-id" (RGMII with internal RX and TX delays provided by the 
> >>> PHY, the
> >>> + MAC should not add the RX or TX delays in this case)
> >>> +  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the 
> >>> MAC
> >>> + should not add an RX delay in this case)
> >>> +  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the 
> >>> MAC
> >>> + should not add an TX delay in this case)
> >>> +  * "rtbi"
> >>> +  * "smii"
> >>> +  * "xgmii"
> >>> +  * "trgmii"
> >>> +  * "2000base-x",
> >>> +  * "2500base-x",
> >>> +  * "rxaui"
> >>> +  * "xaui"
> >>> +  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
&

Re: [U-Boot] [RESEND PATCH 1/2] net: rtl8169: Implement ->hwaddr_write() callback

[Thierry Reding]

On Tue, Apr 16, 2019 at 04:36:16PM +, Joe Hershberger wrote:
> On Tue, Apr 16, 2019 at 11:21 AM Thierry Reding
>  wrote:
> >
> > From: Thierry Reding 
> >
> > Implement this callback that allows the MAC address to be set for the
> > Ethernet card. This is necessary in order for the device to be able to
> > receive packets for the MAC address that U-Boot advertises.
> >
> > Signed-off-by: Thierry Reding 
> 
> Acked-by: Joe Hershberger 

Hi Joe,

it's not clear to me who you expect to pick this (and patch 2/2) up. I
didn't Cc anyone, so nobody else may consider themselves responsible for
these.

Did you mean to pick these up yourself or should they go via Simon's DT
tree along with the two eth-uclass patches that I sent? Or perhaps TomR
handles these patches directly? MAINTAINERS clearly identifies you as a
maintainer for the u-boot-net tree, so I was expecting you to pick them
up. Let me know if I should resend these to someone else with your
Acked-by.

Thierry


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[U-Boot] [PATCH v3 1/2] net: eth-uclass: Write MAC address to hardware after probe

[Thierry Reding]

From: Thierry Reding 

In order for the device to use the proper MAC address, which can have
been configured in the environment prior to the device being registered,
ensure that the MAC address is written after the device has been probed.
For devices that are registered before the network stack is initialized,
this is already done during eth_initialize(). If the Ethernet device is
on a bus that is not initialized on early boot, such as PCI, the device
is not available at the time eth_initialize() is called, so we need the
MAC address programming to also happen after probe.

Acked-by: Joe Hershberger 
Signed-off-by: Thierry Reding 
---
 net/eth-uclass.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 2ef20df19203..4225aabf1fa1 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev)
 #endif
}
 
+   eth_write_hwaddr(dev);
+
return 0;
 }
 
-- 
2.21.0

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[U-Boot] [PATCH v3 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

From: Thierry Reding 

Add the standard Ethernet device tree bindings (imported from v5.0 of
the Linux kernel) and implement support for reading the MAC address for
Ethernet devices in the Ethernet uclass. If the "mac-address" property
exists, the MAC address will be parsed from that. If that property does
not exist, the "local-mac-address" property will be tried as fallback.

MAC addresses from device tree take precedence over the ones stored in
a network interface card's ROM.

Acked-by: Joe Hershberger 
Signed-off-by: Thierry Reding 
---
Changes in v3:
- add additional check to make sure the MAC address read from device
  tree is a valid MAC address

Changes in v2:
- use dev_read_u8_array_ptr()

 .../devicetree/bindings/net/ethernet.txt  | 66 +++
 net/eth-uclass.c  | 27 +++-
 2 files changed, 90 insertions(+), 3 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt

diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
b/Documentation/devicetree/bindings/net/ethernet.txt
new file mode 100644
index ..cfc376bc977a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/ethernet.txt
@@ -0,0 +1,66 @@
+The following properties are common to the Ethernet controllers:
+
+NOTE: All 'phy*' properties documented below are Ethernet specific. For the
+generic PHY 'phys' property, see
+Documentation/devicetree/bindings/phy/phy-bindings.txt.
+
+- local-mac-address: array of 6 bytes, specifies the MAC address that was
+  assigned to the network device;
+- mac-address: array of 6 bytes, specifies the MAC address that was last used 
by
+  the boot program; should be used in cases where the MAC address assigned to
+  the device by the boot program is different from the "local-mac-address"
+  property;
+- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
+- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
+- max-speed: number, specifies maximum speed in Mbit/s supported by the device;
+- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather than
+  the maximum frame size (there's contradiction in the Devicetree
+  Specification).
+- phy-mode: string, operation mode of the PHY interface. This is now a de-facto
+  standard property; supported values are:
+  * "internal"
+  * "mii"
+  * "gmii"
+  * "sgmii"
+  * "qsgmii"
+  * "tbi"
+  * "rev-mii"
+  * "rmii"
+  * "rgmii" (RX and TX delays are added by the MAC when required)
+  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, the
+ MAC should not add the RX or TX delays in this case)
+  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
+ should not add an RX delay in this case)
+  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
+ should not add an TX delay in this case)
+  * "rtbi"
+  * "smii"
+  * "xgmii"
+  * "trgmii"
+  * "2000base-x",
+  * "2500base-x",
+  * "rxaui"
+  * "xaui"
+  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
+- phy-connection-type: the same as "phy-mode" property but described in the
+  Devicetree Specification;
+- phy-handle: phandle, specifies a reference to a node representing a PHY
+  device; this property is described in the Devicetree Specification and so
+  preferred;
+- phy: the same as "phy-handle" property, not recommended for new bindings.
+- phy-device: the same as "phy-handle" property, not recommended for new
+  bindings.
+- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
+  is used for components that can have configurable receive fifo sizes,
+  and is useful for determining certain configuration settings such as
+  flow control thresholds.
+- tx-fifo-depth: the size of the controller's transmit fifo in bytes. This
+  is used for components that can have configurable fifo sizes.
+- managed: string, specifies the PHY management type. Supported values are:
+  "auto", "in-band-status". "auto" is the default, it usess MDIO for
+  management if fixed-link is not specified.
+
+Child nodes of the Ethernet controller are typically the individual PHY devices
+connected via the MDIO bus (sometimes the MDIO bus controller is separate).
+They are described in the phy.txt file in this same directory.
+For non-MDIO PHY management see fixed-link.txt.
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index 4225aabf1fa1..28a82d7fc8d3 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -455,6 +455,23 @@ static int eth_pre_unbind(struct udevice *dev)
return 0;
 }
 
+static bool eth_dev_get_mac_address(struct udevice *dev, u8 mac[ARP_HLEN])
+{
+   const uint8_t *p;
+
+  

Re: [U-Boot] [PATCH 2/3] net: eth-uclass: Write MAC address to hardware after probe

[Thierry Reding]

On Mon, Apr 15, 2019 at 09:24:00PM +, Joe Hershberger wrote:
> On Mon, Apr 15, 2019 at 4:11 AM Thierry Reding  
> wrote:
> >
> > From: Thierry Reding 
> >
> > In order for the device to use the proper MAC address, which can have
> > been configured in the environment prior to the device being registered,
> > ensure that the MAC address is written after the device has been probed.
> > For devices that are registered before the network stack is initialized,
> > this is already done during eth_initialize(). If the Ethernet device is
> > on a bus that is not initialized on early boot, such as PCI, the device
> > is not available at the time eth_initialize() is called, so we need the
> > MAC address programming to also happen after probe.
> 
> I would expect to also see a removal of the call in eth_initialize,
> right? Why do it both places?

I'm hesitant to do that. eth_initialize() happens after eth_post_probe()
for devices that are on a fixed bus and there may be code setting up the
MAC address that runs between eth_post_probe() and eth_initialize(). If
we don't write the MAC address down to hardware in eth_initialize(), we
may end up regressing those boards.

Thierry

> > Signed-off-by: Thierry Reding 
> > ---
> >  net/eth-uclass.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/net/eth-uclass.c b/net/eth-uclass.c
> > index 2ef20df19203..4225aabf1fa1 100644
> > --- a/net/eth-uclass.c
> > +++ b/net/eth-uclass.c
> > @@ -524,6 +524,8 @@ static int eth_post_probe(struct udevice *dev)
> >  #endif
> > }
> >
> > +   eth_write_hwaddr(dev);
> > +
> > return 0;
> >  }
> >
> > --
> > 2.21.0
> >
> > ___
> > U-Boot mailing list
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> > https://lists.denx.de/listinfo/u-boot


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Re: [U-Boot] [PATCH 1/3] dm: core: Add dev_read_bytes()

[Thierry Reding]

On Mon, Apr 15, 2019 at 09:21:45PM +, Joe Hershberger wrote:
> On Mon, Apr 15, 2019 at 4:11 AM Thierry Reding  
> wrote:
> >
> > From: Thierry Reding 
> >
> > This function can be used to read a binary property into a buffer. One
> > example where this is needed is to read a MAC address from device tree.
> >
> > Signed-off-by: Thierry Reding 
> 
> Is there a reason dev_read_u8_array_ptr is insuffient?

No, it's perfectly suitable, I just hadn't seen it.

Thierry


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Re: [U-Boot] [PATCH v2 2/2] net: eth-uclass: Support device tree MAC addresses

[Thierry Reding]

On Wed, Apr 17, 2019 at 02:49:22PM +0300, Grygorii Strashko wrote:
> 
> 
> On 16.04.19 19:24, Thierry Reding wrote:
> > From: Thierry Reding 
> > 
> > Add the standard Ethernet device tree bindings (imported from v5.0 of
> > the Linux kernel) and implement support for reading the MAC address for
> > Ethernet devices in the Ethernet uclass. If the "mac-address" property
> > exists, the MAC address will be parsed from that. If that property does
> > not exist, the "local-mac-address" property will be tried as fallback.
> > 
> > MAC addresses from device tree take precedence over the ones stored in
> > a network interface card's ROM.
> > 
> > Acked-by: Joe Hershberger 
> > Signed-off-by: Thierry Reding 
> > ---
> > Changes in v2:
> > - use dev_read_u8_array_ptr()
> > 
> >  .../devicetree/bindings/net/ethernet.txt  | 66 +++
> >  net/eth-uclass.c  | 26 +++-
> >  2 files changed, 89 insertions(+), 3 deletions(-)
> >  create mode 100644 Documentation/devicetree/bindings/net/ethernet.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/net/ethernet.txt 
> > b/Documentation/devicetree/bindings/net/ethernet.txt
> > new file mode 100644
> > index ..cfc376bc977a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/net/ethernet.txt
> > @@ -0,0 +1,66 @@
> > +The following properties are common to the Ethernet controllers:
> > +
> > +NOTE: All 'phy*' properties documented below are Ethernet specific. For the
> > +generic PHY 'phys' property, see
> > +Documentation/devicetree/bindings/phy/phy-bindings.txt.
> > +
> > +- local-mac-address: array of 6 bytes, specifies the MAC address that was
> > +  assigned to the network device;
> > +- mac-address: array of 6 bytes, specifies the MAC address that was last 
> > used by
> > +  the boot program; should be used in cases where the MAC address assigned 
> > to
> > +  the device by the boot program is different from the "local-mac-address"
> > +  property;
> > +- nvmem-cells: phandle, reference to an nvmem node for the MAC address;
> > +- nvmem-cell-names: string, should be "mac-address" if nvmem is to be used;
> > +- max-speed: number, specifies maximum speed in Mbit/s supported by the 
> > device;
> > +- max-frame-size: number, maximum transfer unit (IEEE defined MTU), rather 
> > than
> > +  the maximum frame size (there's contradiction in the Devicetree
> > +  Specification).
> > +- phy-mode: string, operation mode of the PHY interface. This is now a 
> > de-facto
> > +  standard property; supported values are:
> > +  * "internal"
> > +  * "mii"
> > +  * "gmii"
> > +  * "sgmii"
> > +  * "qsgmii"
> > +  * "tbi"
> > +  * "rev-mii"
> > +  * "rmii"
> > +  * "rgmii" (RX and TX delays are added by the MAC when required)
> > +  * "rgmii-id" (RGMII with internal RX and TX delays provided by the PHY, 
> > the
> > + MAC should not add the RX or TX delays in this case)
> > +  * "rgmii-rxid" (RGMII with internal RX delay provided by the PHY, the MAC
> > + should not add an RX delay in this case)
> > +  * "rgmii-txid" (RGMII with internal TX delay provided by the PHY, the MAC
> > + should not add an TX delay in this case)
> > +  * "rtbi"
> > +  * "smii"
> > +  * "xgmii"
> > +  * "trgmii"
> > +  * "2000base-x",
> > +  * "2500base-x",
> > +  * "rxaui"
> > +  * "xaui"
> > +  * "10gbase-kr" (10GBASE-KR, XFI, SFI)
> > +- phy-connection-type: the same as "phy-mode" property but described in the
> > +  Devicetree Specification;
> > +- phy-handle: phandle, specifies a reference to a node representing a PHY
> > +  device; this property is described in the Devicetree Specification and so
> > +  preferred;
> > +- phy: the same as "phy-handle" property, not recommended for new bindings.
> > +- phy-device: the same as "phy-handle" property, not recommended for new
> > +  bindings.
> > +- rx-fifo-depth: the size of the controller's receive fifo in bytes. This
> > +  is used for components that can have configurable receive fifo sizes,
> > +  and is useful for determining certain configuration settings such as
> > +  flow control thresholds.
> > +- tx-fifo-depth: the size o

[U-Boot] [PATCH] net: rtl8169: Support RTL-8168c/8111c

[Thierry Reding]

From: Thierry Reding 

This version of the RTL-8168 chip can be found on some add-in cards sold
by CSL-Computer GmbH & Co. KG. The chip isn't special in any way, but it
needs to have the ChipCmd register programmed after the DMA descriptors
have been set up, so make sure that happens by adding an entry to the
chip information table.

Signed-off-by: Thierry Reding 
---
 drivers/net/rtl8169.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
index 521e5909a256..d887d00928f6 100644
--- a/drivers/net/rtl8169.c
+++ b/drivers/net/rtl8169.c
@@ -252,6 +252,7 @@ static struct {
{"RTL-8169sc/8110sc",   0x18, 0xff7e1880,},
{"RTL-8168b/8111sb",0x30, 0xff7e1880,},
{"RTL-8168b/8111sb",0x38, 0xff7e1880,},
+   {"RTL-8168c/8111c", 0x3c, 0xff7e1880,},
{"RTL-8168d/8111d", 0x28, 0xff7e1880,},
{"RTL-8168evl/8111evl", 0x2e, 0xff7e1880,},
{"RTL-8168/8111g",  0x4c, 0xff7e1880,},
-- 
2.23.0

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Re: [U-Boot] rtl8169: use dm_pci_map_bar

[Thierry Reding]

On Fri, Jun 14, 2019 at 01:16:32AM +0200, Patrick Wildt wrote:
> On Thu, Jun 13, 2019 at 06:43:25PM +0200, Thierry Reding wrote:
> > On Thu, Jun 13, 2019 at 03:16:10PM +0800, Bin Meng wrote:
> > > Hi Stefan,
> > > 
> > > On Thu, Jun 13, 2019 at 1:40 PM Stefan Roese  wrote:
> > > >
> > > > Added Bin, Joe and Thierry to Cc
> > > >
> > > > On 11.06.19 13:15, Patrick Wildt wrote:
> > > > > Hi,
> > > > >
> > > > > I have an rtl8169 on a macchiatobin and that card has a 64-bit
> > > > > memory address.  The current code only reads a single word, which
> > > > > means it can only support a 32-bit address.  By using dm_pci_map_bar
> > > > > we don't need to manually parse the register, we can just have it do
> > > > > its job.
> > > > >
> > > > > I'm not sure though if this works for all devices since the previous
> > > > > version had an explicit check for the device.
> > > > >
> > > > > Patrick
> > > > >
> > > > > Signed-off-by: Patrick Wildt 
> > > > >
> > > > > diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c
> > > > > index 521e5909a2..f1d2ade253 100644
> > > > > --- a/drivers/net/rtl8169.c
> > > > > +++ b/drivers/net/rtl8169.c
> > > > > @@ -1182,22 +1182,11 @@ static int rtl8169_eth_probe(struct udevice 
> > > > > *dev)
> > > > >   struct pci_child_platdata *pplat = dev_get_parent_platdata(dev);
> > > > >   struct rtl8169_private *priv = dev_get_priv(dev);
> > > > >   struct eth_pdata *plat = dev_get_platdata(dev);
> > > > > - u32 iobase;
> > > > > - int region;
> > > > >   int ret;
> > > > >
> > > > > - debug("rtl8169: REALTEK RTL8169 @0x%x\n", iobase);
> > > > > - switch (pplat->device) {
> > > > > - case 0x8168:
> > > > > - region = 2;
> > > > > - break;
> > > > > - default:
> > > > > - region = 1;
> > > > > - break;
> > > > > - }
> > > > > - dm_pci_read_config32(dev, PCI_BASE_ADDRESS_0 + region * 4, 
> > > > > );
> > > > > - iobase &= ~0xf;
> > > > > - priv->iobase = (int)dm_pci_mem_to_phys(dev, iobase);
> > > > > + priv->iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_2,
> > > > > +   PCI_REGION_MEM);
> > > > > + printf("rtl8169: REALTEK RTL8169 @0x%x\n", priv->iobase);
> > > > >
> > > > >   ret = rtl_init(priv->iobase, dev->name, plat->enetaddr);
> > > > >   if (ret < 0) {
> > > >
> > > > Bin, Joe, Thierry,
> > > >
> > > > do you have any comments on this patch? Moving unconditionally to one
> > > > BAR instead of BAR1/2 depending on the chip version seems a bit
> > > > "brave".
> > > 
> > > Agreed that blinding setting one BAR for the iobase is not a good idea.
> > 
> > Agreed. I don't know whether it's actually required to differentiate
> > based on version, but I suppose the code is like that for a reason, so
> > better keep that.
> > 
> > Also, looking at dm_pci_map_bar() it doesn't look like that does
> > anything different than the existing code. It merely reads a single
> > 32-bit register, so it doesn't properly deal with 64-bit BARs either.
> > 
> > I suppose that could be fixed in dm_pci_map_bar(), and then the fix
> > would automatically propagate to all users of that, which is good. But I
> > don't think it currently works correctly.
> > 
> > Thierry
> 
> Oh, I'm very sorry to have wasted your time.  Yes, I agree, the
> differentiation must come back.
> 
> To be honest it was about half a year ago, so I think I forgot the
> actual issue.  Maybe dm_pci_mem_to_phys() returned 0 for whatever
> reason, but I don't remember.  The address is 32-bit, 0xf600,
> so it definitely wasn't the 64-bit think I rambled about.  Sorry.
> 
> I will try to find out what was wrong and report back.
> 
> By the way, the debug() line in the current code prints iobase which at
> that time isn't even initialized.

Yeah, that's definitely a bug. I think that warrants a separate patch.
Mind sending out a patch with just that change?

Thierry


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Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT

[Thierry Reding]

On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote:
> -Original Message-
> From: Peter Robinson  
> Sent: Tuesday, March 31, 2020 3:54 AM
> To: tomcwarren3...@gmail.com
> Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry Reding 
> ; Jonathan Hunter ; Tom Warren 
> ; Vishruth Jain 
> Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
> 
> External email: Use caution opening links or attachments
> 
> 
> > From: Stephen Warren 
> >
> > This adds to the DT the I2C controllers that connect to the board ID 
> > EEPROM, camera board EEPROM, etc. With this change, you can now probe 
> > all I2C devices on a TX1 board.
> >
> > Signed-off-by: Tom Warren 
> > ---
> >  arch/arm/dts/tegra210-p2371-2180.dts | 18 ++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm/dts/tegra210-p2371-2180.dts 
> > b/arch/arm/dts/tegra210-p2371-2180.dts
> > index c2f497c..d982b5f 100644
> > --- a/arch/arm/dts/tegra210-p2371-2180.dts
> > +++ b/arch/arm/dts/tegra210-p2371-2180.dts
> > @@ -12,6 +12,9 @@
> >
> > aliases {
> > i2c0 = "/i2c@7000d000";
> > +   i2c2 = "/i2c@7000c400";
> > +   i2c3 = "/i2c@7000c500";
> > +   i2c5 = "/i2c@546c0c00";
> 
> I don't think this is correct, it doesn't show up in U-Boot with the
> "i2c bus" command where the others do, looking in the tegra210.dtsi it
> looks like it should be i2c@546c?
> [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot.  The
> VI_I2C controller is a little weird, it's normal I2C registers are
> offset from base by 0xC00.  A different driver is needed, but I
> haven't posted it yet upstream.  I should probably drop if from the
> DTS for now until I post the VI_I2C driver.

I think the problem here is that the upstream U-Boot device tree doesn't
contain an i2c@546c0c00 node. Instead it has i2c@546c, which we also
have in the upstream kernel. My recollection is that that's also the
address listed in the Tegra210 system address map of the TRM and there
are some registers before the regular I2C interface at offset 0xc00.

I've been carrying a patch against the upstream Linux I2C controller
driver to special-case the VI/I2C to always add that 0xc00 offset when
accessing registers, which allows us to reuse the existing driver and at
the same time keeps all registers mapped so we can also access the
VI/I2C specific registers.

My recollection is that the U-Boot driver is fairly similar to the Linux
driver, so I suspect something similar could be done.

Thierry


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Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT

[Thierry Reding]

On Wed, Apr 01, 2020 at 10:35:23PM +0200, Tom Warren wrote:
> -Original Message-
> From: Thierry Reding  
> Sent: Wednesday, April 1, 2020 8:20 AM
> To: Tom Warren 
> Cc: Peter Robinson ; tomcwarren3...@gmail.com; 
> u-boot@lists.denx.de; Stephen Warren ; Jonathan Hunter 
> ; Vishruth Jain 
> Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
> 
> On Wed, Apr 01, 2020 at 02:03:09AM +0200, Tom Warren wrote:
> > -Original Message-
> > From: Peter Robinson 
> > Sent: Tuesday, March 31, 2020 3:54 AM
> > To: tomcwarren3...@gmail.com
> > Cc: u-boot@lists.denx.de; Stephen Warren ; Thierry 
> > Reding ; Jonathan Hunter ; 
> > Tom Warren ; Vishruth Jain 
> > Subject: Re: [PATCH 3/3] ARM: tegra: p2371-2180: add I2C nodes to DT
> > 
> > External email: Use caution opening links or attachments
> > 
> > 
> > > From: Stephen Warren 
> > >
> > > This adds to the DT the I2C controllers that connect to the board ID 
> > > EEPROM, camera board EEPROM, etc. With this change, you can now 
> > > probe all I2C devices on a TX1 board.
> > >
> > > Signed-off-by: Tom Warren 
> > > ---
> > >  arch/arm/dts/tegra210-p2371-2180.dts | 18 ++
> > >  1 file changed, 18 insertions(+)
> > >
> > > diff --git a/arch/arm/dts/tegra210-p2371-2180.dts
> > > b/arch/arm/dts/tegra210-p2371-2180.dts
> > > index c2f497c..d982b5f 100644
> > > --- a/arch/arm/dts/tegra210-p2371-2180.dts
> > > +++ b/arch/arm/dts/tegra210-p2371-2180.dts
> > > @@ -12,6 +12,9 @@
> > >
> > > aliases {
> > > i2c0 = "/i2c@7000d000";
> > > +   i2c2 = "/i2c@7000c400";
> > > +   i2c3 = "/i2c@7000c500";
> > > +   i2c5 = "/i2c@546c0c00";
> > 
> > I don't think this is correct, it doesn't show up in U-Boot with the 
> > "i2c bus" command where the others do, looking in the tegra210.dtsi it 
> > looks like it should be i2c@546c?
> > [Tom] That I2C address is working in downstream (L4T) TX1 U-Boot.  The 
> > VI_I2C controller is a little weird, it's normal I2C registers are 
> > offset from base by 0xC00.  A different driver is needed, but I 
> > haven't posted it yet upstream.  I should probably drop if from the 
> > DTS for now until I post the VI_I2C driver.
> 
> I think the problem here is that the upstream U-Boot device tree
> doesn't contain an i2c@546c0c00 node. Instead it has i2c@546c,
> which we also have in the upstream kernel. My recollection is that
> that's also the address listed in the Tegra210 system address map of
> the TRM and there are some registers before the regular I2C interface
> at offset 0xc00.
> 
> I've been carrying a patch against the upstream Linux I2C controller
> driver to special-case the VI/I2C to always add that 0xc00 offset when
> accessing registers, which allows us to reuse the existing driver and
> at the same time keeps all registers mapped so we can also access the
> VI/I2C specific registers.
> 
> My recollection is that the U-Boot driver is fairly similar to the
> Linux driver, so I suspect something similar could be done.
> 
> Thierry
> [Tom] Thanks, Thierry. That's my recollection, too, about the VI_I2C
> 0xC00 offset. I'll take a look at what we have in L4T U-Boot for T210
> and address it in a set of patches for upstream soon.  That I2C
> controller isn't used for anything on any Jetson board except on TX1,
> I believe, where it allows U-Boot to talk to the camera add-in board
> to read the board ID. But we've moved all that out to CBoot (board ID
> EEPROM reading), so there isn't a pressing need for it in U-Boot
> anymore, IIRC.

We've had internal discussions about potentially using the ID EEPROMs to
dynamically modify the kernel DTB at runtime (possibly from U-Boot) in
order to support things like different add-in boards.

For example, we currently enable the DSI output in Linux for Jetson TX1.
However, the Jetson TX1 developer kits don't actually ship with that DSI
display (I don't think they even come with the display add-in card), so
this can lead to confusion. The idea was to have U-Boot probe ID EEPROMs
from several sources to determine what to add to the device tree, so
that the kernel DT *source* would only contain the standard developer
kit hardware, but U-Boot (or something else perhaps) could add in extra
nodes for a display module, or camera add-in board, etc.

Note that this is just a vague idea at this time and nothing concrete
has been done to implement this, yet.

Thierry


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Re: [PATCH 1/2] net: rt8169: WAR for DHCP not getting IP after kernel boot/reboot

[Thierry Reding]

On Tue, Mar 17, 2020 at 01:07:15PM -0700, twar...@nvidia.com wrote:
> From: Tom Warren 
> 
> This is a WAR for DHCP failure after rebooting from the L4T kernel. The
> r8169.c kernel driver is setting bit 19 of the rt816x HW register 0xF0,
> which goes by FuncEvent and MISC in various driver source/datasheets.
> That bit is called RxDv_Gated_En in the r8169.c kernel driver. Clear it
> here at the end of probe to ensure that U-Boot can get an IP assigned
> via DHCP.
> 
> Signed-off-by: Tom Warren 
> ---
>  drivers/net/rtl8169.c | 16 
>  1 file changed, 16 insertions(+)

Is this still needed? In my old p3450 branch that I worked on to get
Porg up and running I don't have this patch. It's also not in my local
development tree that I typically use to boot Tegra186 and earlier
boards. That branch works fine on the Jetson Nano, so I don't think this
is needed anymore. I vaguely recall that I determined that this was
fixed some other way, but unfortunately I don't remember the exact
details.

Thierry


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[PATCH 2/9] fdtdec: Support retrieving the name of a carveout

[Thierry Reding]

From: Thierry Reding 

When retrieving a given carveout for a device, allow callers to query
the name. This helps differentiating between carveouts when there are
more than one.

This is also useful when copying carveouts to help assign a meaningful
name that cannot always be guessed.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2371-2180/p2371-2180.c |  2 +-
 board/nvidia/p2771-/p2771-.c |  2 +-
 board/nvidia/p3450-/p3450-.c |  2 +-
 include/fdtdec.h |  8 +---
 lib/fdtdec.c | 12 
 lib/fdtdec_test.c|  3 ++-
 6 files changed, 18 insertions(+), 11 deletions(-)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index 7423a97ad0e3..1f7aa0050cde 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -128,7 +128,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
struct fdt_memory fb;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, );
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index 508c4d27b7fb..aca86c342680 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -104,7 +104,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
struct fdt_memory fb;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, );
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
diff --git a/board/nvidia/p3450-/p3450-.c 
b/board/nvidia/p3450-/p3450-.c
index f4741cfd1e4a..132eb824c675 100644
--- a/board/nvidia/p3450-/p3450-.c
+++ b/board/nvidia/p3450-/p3450-.c
@@ -128,7 +128,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
struct fdt_memory fb;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, );
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 8ac20c9a64f7..265ee54d41be 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -1071,14 +1071,16 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
  *
  * @param blob FDT blob
  * @param node name of a node
- * @param name name of the property in the given node that contains
+ * @param prop_namename of the property in the given node that contains
  * the phandle for the carveout
  * @param indexindex of the phandle for which to read the 
carveout
  * @param carveout return location for the carveout information
+ * @param name return location for the carveout name
  * @return 0 on success or a negative error code on failure
  */
-int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
-   unsigned int index, struct fdt_memory *carveout);
+int fdtdec_get_carveout(const void *blob, const char *node,
+   const char *prop_name, unsigned int index,
+   struct fdt_memory *carveout, const char **name);
 
 /**
  * fdtdec_set_carveout() - sets a carveout region for a given node
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 7f6b6d523232..19b8efb0d302 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1444,8 +1444,9 @@ int fdtdec_add_reserved_memory(void *blob, const char 
*basename,
return 0;
 }
 
-int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
-   unsigned int index, struct fdt_memory *carveout)
+int fdtdec_get_carveout(const void *blob, const char *node,
+   const char *prop_name, unsigned int index,
+   struct fdt_memory *carveout, const char **name)
 {
const fdt32_t *prop;
uint32_t phandle;
@@ -1456,9 +1457,9 @@ int fdtdec_get_carveout(const void *blob, const char 
*node, const char *name,
if (offset < 0)
return offset;
 
-   prop = fdt_getprop(blob, offset, name, );
+   prop = fdt_getprop(blob, offset, prop_name, );
if (!prop) {
-   debug("failed to get %s for %s\n", name, node);
+   debug("failed to get %s for %s\n", prop_n

[PATCH 3/9] fdtdec: Support compatible string list for reserved memory

[Thierry Reding]

From: Thierry Reding 

Reserved memory nodes can have a compatible string list to identify the
type of reserved memory that they represent. Support specifying an
optional compatible string list when creating these nodes.

Signed-off-by: Thierry Reding 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c |  3 +-
 arch/riscv/lib/fdt_fixup.c  |  2 +-
 board/nvidia/p2371-2180/p2371-2180.c|  5 +-
 board/nvidia/p2771-/p2771-.c|  5 +-
 board/nvidia/p3450-/p3450-.c|  5 +-
 include/fdtdec.h| 17 --
 lib/fdtdec.c| 69 -
 lib/fdtdec_test.c   |  4 +-
 lib/optee/optee.c   |  1 +
 test/dm/fdtdec.c| 18 +++
 10 files changed, 105 insertions(+), 24 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 42a096854629..faac618dc48a 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -54,7 +54,8 @@ int ls_gic_rd_tables_init(void *blob)
 
lpi_base.start = addr;
lpi_base.end = addr + size - 1;
-   ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", _base, NULL, 
false);
+   ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", _base, NULL,
+NULL, 0, false);
if (ret) {
debug("%s: failed to add reserved memory\n", __func__);
return ret;
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index f636b2844978..96c78baeb47d 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -76,7 +76,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
pmp_mem.start = addr;
pmp_mem.end = addr + size - 1;
err = fdtdec_add_reserved_memory(dst, basename, _mem,
-, false);
+NULL, 0, , false);
if (err < 0 && err != -FDT_ERR_EXISTS) {
log_err("failed to add reserved memory: %d\n", err);
return err;
diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index 1f7aa0050cde..58077255d073 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -128,7 +128,8 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
struct fdt_memory fb;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL);
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL,
+ NULL, NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
@@ -138,7 +139,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
}
 
err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
- );
+ NULL, 0, );
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index aca86c342680..e35e6b6f48dc 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -104,7 +104,8 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
struct fdt_memory fb;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL);
+   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL,
+ NULL, NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
@@ -114,7 +115,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
}
 
err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
- );
+ NULL, 0, );
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/board/nvidia/p3450-/p3450-.c 
b/board/nvidia/p3450-/p3450-.c
index 132eb824c675..d9ef45af5eea 100644
--- a/board/nvidia/p3450-/p3450-.c
+++ b/board/nvidia/p3450-/p3450-.c
@@ -128,7 +128,8 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
struct fdt_memory fb;
int err;
 
-   err = fdtdec_get_carve

[PATCH 0/9] ARM: tegra: Support EMC frequency tables on Tegra210

[Thierry Reding]

From: Thierry Reding 

Hi,

The first handful of patches are preparatory work to make the fdtdec
carveout helpers a bit more flexible and clean them up a little bit
while the final 4 patches make use of the improved helpers to copy
the EMC frequency tables that can be passed to U-Boot from earlier
bootloaders.

Thanks,
Thierry

Thierry Reding (9):
  fdtdec: Allow using fdtdec_get_carveout() in loops
  fdtdec: Support retrieving the name of a carveout
  fdtdec: Support compatible string list for reserved memory
  fdtdec: Reorder fdtdec_set_carveout() parameters for consistency
  fdtdec: Support reserved-memory flags
  ARM: tegra: Support multiple reserved memory regions
  ARM: tegra: Support EMC frequency tables on Tegra210
  ARM: tegra: Refactor DT update helpers
  ARM: tegra: Copy memory-region-names property

 arch/arm/cpu/armv8/fsl-layerscape/soc.c |   3 +-
 arch/arm/include/asm/arch-tegra/board.h |  10 ++
 arch/arm/mach-tegra/dt-setup.c  | 147 
 arch/riscv/lib/fdt_fixup.c  |   2 +-
 board/nvidia/p2371-2180/p2371-2180.c|  94 ++-
 board/nvidia/p2771-/p2771-.c|  98 ++--
 board/nvidia/p3450-/p3450-.c|  96 ++--
 include/configs/tegra210-common.h   |   2 +-
 include/fdtdec.h|  39 +--
 lib/fdtdec.c|  99 ++--
 lib/fdtdec_test.c   |   7 +-
 lib/optee/optee.c   |   4 +-
 test/dm/fdtdec.c|  28 +++--
 13 files changed, 321 insertions(+), 308 deletions(-)

-- 
2.33.0

[PATCH 4/9] fdtdec: Reorder fdtdec_set_carveout() parameters for consistency

[Thierry Reding]

From: Thierry Reding 

The fdtdec_set_carveout() function's parameters are inconsistent with
the parameters passed to fdtdec_add_reserved_memory(). Fix up the order
to make it more consistent.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2371-2180/p2371-2180.c |  4 ++--
 board/nvidia/p2771-/p2771-.c |  4 ++--
 board/nvidia/p3450-/p3450-.c |  4 ++--
 include/fdtdec.h |  8 
 lib/fdtdec.c |  6 +++---
 lib/fdtdec_test.c|  4 ++--
 test/dm/fdtdec.c | 15 ++-
 7 files changed, 21 insertions(+), 24 deletions(-)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index 58077255d073..bc0a133725ed 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -138,8 +138,8 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
return err;
}
 
-   err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
- NULL, 0, );
+   err = fdtdec_set_carveout(dst, node, "memory-region", 0, ,
+ "framebuffer", NULL, 0);
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index e35e6b6f48dc..cde5eff02f2a 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -114,8 +114,8 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
return err;
}
 
-   err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
- NULL, 0, );
+   err = fdtdec_set_carveout(dst, node, "memory-region", 0, ,
+ "framebuffer", NULL, 0);
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/board/nvidia/p3450-/p3450-.c 
b/board/nvidia/p3450-/p3450-.c
index d9ef45af5eea..541863cef361 100644
--- a/board/nvidia/p3450-/p3450-.c
+++ b/board/nvidia/p3450-/p3450-.c
@@ -138,8 +138,8 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
return err;
}
 
-   err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
- NULL, 0, );
+   err = fdtdec_set_carveout(dst, node, "memory-region", 0, ,
+ "framebuffer", NULL, 0);
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 489f5063763b..6d56c67d111c 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -1143,16 +1143,16 @@ int fdtdec_get_carveout(const void *blob, const char 
*node,
  * @param prop_namename of the property in which to store the phandle of
  * the carveout
  * @param indexindex of the phandle to store
- * @param name base name of the reserved-memory node to create
  * @param carveout information about the carveout to add
+ * @param name base name of the reserved-memory node to create
  * @param compatibles  compatible strings to set for the carveout
  * @param countnumber of compatible strings
  * @return 0 on success or a negative error code on failure
  */
 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
-   unsigned int index, const char *name,
-   const char **compatibles, unsigned int count,
-   const struct fdt_memory *carveout);
+   unsigned int index, const struct fdt_memory *carveout,
+   const char *name, const char **compatibles,
+   unsigned int count);
 
 /**
  * Set up the device tree ready for use
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index ba1fefaeef9d..60e537b8d61e 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1561,9 +1561,9 @@ skip_compat:
 }
 
 int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
-   unsigned int index, const char *name,
-   const char **compatibles, unsigned int count,
-   const struct fdt_memory *carveout)
+   unsigned int index, const struct fdt_memory *carveout,
+   const char *name, const char **compatibles,
+   unsigned int count)
 {
uint32_t phandle;
int err, offset, len;
diff --git a/lib/fdtdec_test.c b/li

[PATCH 7/9] ARM: tegra: Support EMC frequency tables on Tegra210

[Thierry Reding]

From: Thierry Reding 

The EMC frequency tables are created from a training sequence performed
during early boot and passed in via a reserved memory region by nvtboot.
Copy this table to the kernel DTB so that the kernel can use it to scale
the EMC frequency at runtime.

Note that early bootloaders store the EMC table at an address that
currently intersects with the load address of the initial ramdisk. In
order to avoid copying the table to a different address, simply change
the load address for the initial ramdisk in U-Boot.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2371-2180/p2371-2180.c | 1 +
 board/nvidia/p3450-/p3450-.c | 1 +
 include/configs/tegra210-common.h| 2 +-
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index f5126c552b00..cd5dc2de629e 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -183,6 +183,7 @@ static void ft_carveout_setup(void *fdt)
static const char * const nodes[] = {
"/host1x@5000/dc@5420",
"/host1x@5000/dc@5424",
+   "/external-memory-controller@7001b000",
};
unsigned int i;
int err;
diff --git a/board/nvidia/p3450-/p3450-.c 
b/board/nvidia/p3450-/p3450-.c
index 2c709d9b8117..dd408d2ebbf8 100644
--- a/board/nvidia/p3450-/p3450-.c
+++ b/board/nvidia/p3450-/p3450-.c
@@ -183,6 +183,7 @@ static void ft_carveout_setup(void *fdt)
static const char * const nodes[] = {
"/host1x@5000/dc@5420",
"/host1x@5000/dc@5424",
+   "/external-memory-controller@7001b000",
};
unsigned int i;
int err;
diff --git a/include/configs/tegra210-common.h 
b/include/configs/tegra210-common.h
index 2226effe16ab..c38d0f831835 100644
--- a/include/configs/tegra210-common.h
+++ b/include/configs/tegra210-common.h
@@ -48,7 +48,7 @@
"kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
"fdtfile=" FDTFILE "\0" \
"fdt_addr_r=0x8300\0" \
-   "ramdisk_addr_r=0x8320\0"
+   "ramdisk_addr_r=0x8342\0"
 
 /* For USB EHCI controller */
 #define CONFIG_EHCI_IS_TDI
-- 
2.33.0

[PATCH 1/9] fdtdec: Allow using fdtdec_get_carveout() in loops

[Thierry Reding]

From: Thierry Reding 

In order make it possible to use fdtdec_get_carveout() in loops, return
FDT_ERR_NOTFOUND when the passed-in index exceeds the number of phandles
present in the given property.

Signed-off-by: Thierry Reding 
---
 lib/fdtdec.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 337c4443b032..7f6b6d523232 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -1469,7 +1469,7 @@ int fdtdec_get_carveout(const void *blob, const char 
*node, const char *name,
 
if (len < (sizeof(phandle) * (index + 1))) {
debug("invalid phandle index\n");
-   return -FDT_ERR_BADPHANDLE;
+   return -FDT_ERR_NOTFOUND;
}
 
phandle = fdt32_to_cpu(prop[index]);
-- 
2.33.0

[PATCH 5/9] fdtdec: Support reserved-memory flags

[Thierry Reding]

From: Thierry Reding 

Reserved memory nodes can have additional flags. Support reading and
writing these flags to ensure that reserved memory nodes can be properly
parsed and emitted.

This converts support for the existing "no-map" flag to avoid extending
the argument list for fdtdec_add_reserved_memory() to excessive length.

Signed-off-by: Thierry Reding 
---
 arch/arm/cpu/armv8/fsl-layerscape/soc.c |  2 +-
 arch/riscv/lib/fdt_fixup.c  |  2 +-
 board/nvidia/p2371-2180/p2371-2180.c|  4 ++--
 board/nvidia/p2771-/p2771-.c|  4 ++--
 board/nvidia/p3450-/p3450-.c|  4 ++--
 include/fdtdec.h| 20 +++---
 lib/fdtdec.c| 28 -
 lib/fdtdec_test.c   |  4 ++--
 lib/optee/optee.c   |  3 ++-
 test/dm/fdtdec.c| 13 ++--
 10 files changed, 50 insertions(+), 34 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index faac618dc48a..6cebd8259a58 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -55,7 +55,7 @@ int ls_gic_rd_tables_init(void *blob)
lpi_base.start = addr;
lpi_base.end = addr + size - 1;
ret = fdtdec_add_reserved_memory(blob, "lpi_rd_table", _base, NULL,
-NULL, 0, false);
+NULL, 0, 0);
if (ret) {
debug("%s: failed to add reserved memory\n", __func__);
return ret;
diff --git a/arch/riscv/lib/fdt_fixup.c b/arch/riscv/lib/fdt_fixup.c
index 96c78baeb47d..8858b1bac870 100644
--- a/arch/riscv/lib/fdt_fixup.c
+++ b/arch/riscv/lib/fdt_fixup.c
@@ -76,7 +76,7 @@ int riscv_fdt_copy_resv_mem_node(const void *src, void *dst)
pmp_mem.start = addr;
pmp_mem.end = addr + size - 1;
err = fdtdec_add_reserved_memory(dst, basename, _mem,
-NULL, 0, , false);
+NULL, 0, , 0);
if (err < 0 && err != -FDT_ERR_EXISTS) {
log_err("failed to add reserved memory: %d\n", err);
return err;
diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index bc0a133725ed..137c7d3b12c3 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -129,7 +129,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
int err;
 
err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL,
- NULL, NULL);
+ NULL, NULL, NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
@@ -139,7 +139,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
}
 
err = fdtdec_set_carveout(dst, node, "memory-region", 0, ,
- "framebuffer", NULL, 0);
+ "framebuffer", NULL, 0, 0);
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index cde5eff02f2a..3d2653d1f075 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -105,7 +105,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
int err;
 
err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL,
- NULL, NULL);
+ NULL, NULL, NULL);
if (err < 0) {
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n", node,
@@ -115,7 +115,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
}
 
err = fdtdec_set_carveout(dst, node, "memory-region", 0, ,
- "framebuffer", NULL, 0);
+ "framebuffer", NULL, 0, 0);
if (err < 0) {
printf("failed to set carveout for %s: %d\n", node, err);
return err;
diff --git a/board/nvidia/p3450-/p3450-.c 
b/board/nvidia/p3450-/p3450-.c
index 541863cef361..cdedea18a176 100644
--- a/board/nvidia/p3450-/p3450-.c
+++ b/board/nvidia/p3450-/p3450-.c
@@ -129,7 +129,7 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
int err;
 
 

[PATCH 8/9] ARM: tegra: Refactor DT update helpers

[Thierry Reding]

From: Thierry Reding 

Rather than duplicate the Ethernet MAC address and carveout updating
code for each board, move it to a common location and make it more
reusable.

Signed-off-by: Thierry Reding 
---
 arch/arm/include/asm/arch-tegra/board.h |  10 ++
 arch/arm/mach-tegra/dt-setup.c  | 118 ++
 board/nvidia/p2371-2180/p2371-2180.c| 123 ++-
 board/nvidia/p2771-/p2771-.c| 126 ++-
 board/nvidia/p3450-/p3450-.c| 127 ++--
 5 files changed, 149 insertions(+), 355 deletions(-)

diff --git a/arch/arm/include/asm/arch-tegra/board.h 
b/arch/arm/include/asm/arch-tegra/board.h
index 24d0db8ced83..cd4d0ee3c953 100644
--- a/arch/arm/include/asm/arch-tegra/board.h
+++ b/arch/arm/include/asm/arch-tegra/board.h
@@ -30,4 +30,14 @@ void pin_mux_nand(void); /* overridable NAND pinmux 
setup*/
 void pin_mux_mmc(void);  /* overridable mmc pinmux setup */
 void pin_mux_display(void);  /* overridable DISPLAY pinmux setup */
 
+/*
+ * Helpers for various standard DT update mechanisms.
+ */
+
+#if defined(CONFIG_ARM64)
+void ft_mac_address_setup(void *fdt);
+void ft_carveout_setup(void *fdt, const char *const *nodes,
+  unsigned int count);
+#endif
+
 #endif
diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c
index 602b20e6b7e9..894a6358a2c4 100644
--- a/arch/arm/mach-tegra/dt-setup.c
+++ b/arch/arm/mach-tegra/dt-setup.c
@@ -4,6 +4,9 @@
  */
 
 #include 
+#include 
+#include 
+#include 
 #include 
 
 /*
@@ -31,3 +34,118 @@ int ft_system_setup(void *blob, struct bd_info *bd)
 
return 0;
 }
+
+#if defined(CONFIG_ARM64)
+void ft_mac_address_setup(void *fdt)
+{
+   const void *cboot_fdt = (const void *)cboot_boot_x0;
+   uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
+   const char *path;
+   int offset, err;
+
+   err = cboot_get_ethaddr(cboot_fdt, local_mac);
+   if (err < 0)
+   memset(local_mac, 0, ETH_ALEN);
+
+   path = fdt_get_alias(fdt, "ethernet");
+   if (!path)
+   return;
+
+   debug("ethernet alias found: %s\n", path);
+
+   offset = fdt_path_offset(fdt, path);
+   if (offset < 0) {
+   printf("ethernet alias points to absent node %s\n", path);
+   return;
+   }
+
+   if (is_valid_ethaddr(local_mac)) {
+   err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
+ ETH_ALEN);
+   if (!err)
+   debug("Local MAC address set: %pM\n", local_mac);
+   }
+
+   if (eth_env_get_enetaddr("ethaddr", mac)) {
+   if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
+   err = fdt_setprop(fdt, offset, "mac-address", mac,
+ ETH_ALEN);
+   if (!err)
+   debug("MAC address set: %pM\n", mac);
+   }
+   }
+}
+
+static int ft_copy_carveout(void *dst, const void *src, const char *node)
+{
+   struct fdt_memory carveout;
+   unsigned int index = 0;
+   int err;
+
+   while (true) {
+   const char **compatibles = NULL;
+   unsigned int num_compatibles;
+   unsigned long flags;
+   char *copy = NULL;
+   const char *name;
+
+   err = fdtdec_get_carveout(src, node, "memory-region", index,
+ , , ,
+ _compatibles, );
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to get carveout for %s: %d\n",
+  node, err);
+
+   return err;
+   }
+
+   if (name) {
+   const char *ptr = strchr(name, '@');
+
+   if (ptr) {
+   copy = strndup(name, ptr - name);
+   name = copy;
+   }
+   } else {
+   name = "carveout";
+   }
+
+   err = fdtdec_set_carveout(dst, node, "memory-region", index,
+ , name, compatibles,
+ num_compatibles, flags);
+   if (err < 0) {
+   printf("failed to set carveout for %s: %d\n", node,
+  err);
+   return err;
+   }
+
+   if (copy)
+   free(copy);
+
+   index++;
+   }
+
+   return 0;
+}
+
+void ft_carveout_setup(void *fdt, const char * const *nodes, unsigned int 
coun

[PATCH 6/9] ARM: tegra: Support multiple reserved memory regions

[Thierry Reding]

From: Thierry Reding 

Support multiple reserved memory regions per device to support platforms
that use both a framebuffer and color conversion lookup table for early
boot display splash.

While at it, also pass along the name, compatible strings and flags of
the carveouts.

Signed-off-by: Thierry Reding 
---
 board/nvidia/p2371-2180/p2371-2180.c | 55 +---
 board/nvidia/p2771-/p2771-.c | 55 +---
 board/nvidia/p3450-/p3450-.c | 55 +---
 3 files changed, 126 insertions(+), 39 deletions(-)

diff --git a/board/nvidia/p2371-2180/p2371-2180.c 
b/board/nvidia/p2371-2180/p2371-2180.c
index 137c7d3b12c3..f5126c552b00 100644
--- a/board/nvidia/p2371-2180/p2371-2180.c
+++ b/board/nvidia/p2371-2180/p2371-2180.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -125,24 +126,52 @@ static void ft_mac_address_setup(void *fdt)
 
 static int ft_copy_carveout(void *dst, const void *src, const char *node)
 {
-   struct fdt_memory fb;
+   unsigned int index = 0;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL,
- NULL, NULL, NULL);
-   if (err < 0) {
-   if (err != -FDT_ERR_NOTFOUND)
-   printf("failed to get carveout for %s: %d\n", node,
+   while (true) {
+   const char **compatibles = NULL;
+   unsigned int num_compatibles;
+   struct fdt_memory carveout;
+   unsigned long flags;
+   char *copy = NULL;
+   const char *name;
+
+   err = fdtdec_get_carveout(src, node, "memory-region", index,
+ , , ,
+ _compatibles, );
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to get carveout for %s: %d\n",
+  node, err);
+
+   return err;
+   }
+
+   if (name) {
+   const char *ptr = strchr(name, '@');
+
+   if (ptr) {
+   copy = strndup(name, ptr - name);
+   name = copy;
+   }
+   } else {
+   name = "carveout";
+   }
+
+   err = fdtdec_set_carveout(dst, node, "memory-region", index,
+ , name, compatibles,
+ num_compatibles, flags);
+   if (err < 0) {
+   printf("failed to set carveout for %s: %d\n", node,
   err);
+   return err;
+   }
 
-   return err;
-   }
+   if (copy)
+   free(copy);
 
-   err = fdtdec_set_carveout(dst, node, "memory-region", 0, ,
- "framebuffer", NULL, 0, 0);
-   if (err < 0) {
-   printf("failed to set carveout for %s: %d\n", node, err);
-   return err;
+   index++;
}
 
return 0;
diff --git a/board/nvidia/p2771-/p2771-.c 
b/board/nvidia/p2771-/p2771-.c
index 3d2653d1f075..46c36a22db5e 100644
--- a/board/nvidia/p2771-/p2771-.c
+++ b/board/nvidia/p2771-/p2771-.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include "../p2571/max77620_init.h"
@@ -101,24 +102,52 @@ static void ft_mac_address_setup(void *fdt)
 
 static int ft_copy_carveout(void *dst, const void *src, const char *node)
 {
-   struct fdt_memory fb;
+   unsigned int index = 0;
int err;
 
-   err = fdtdec_get_carveout(src, node, "memory-region", 0, , NULL,
- NULL, NULL, NULL);
-   if (err < 0) {
-   if (err != -FDT_ERR_NOTFOUND)
-   printf("failed to get carveout for %s: %d\n", node,
+   while (true) {
+   const char **compatibles = NULL;
+   unsigned int num_compatibles;
+   struct fdt_memory carveout;
+   unsigned long flags;
+   char *copy = NULL;
+   const char *name;
+
+   err = fdtdec_get_carveout(src, node, "memory-region", index,
+ , , ,
+ _compatibles, );
+   if (err < 0) {
+   if (err != -FDT_ERR_NOTFOUND)
+   printf("failed to get carveout for %s: %d\n",
+  node, err);
+
+ 

[PATCH 9/9] ARM: tegra: Copy memory-region-names property

[Thierry Reding]

From: Thierry Reding 

If multiple entries are present in the memory-region property, this new
memory-region-names property can be used to specify names for each of
them so that they can be more easily distinguished.

Signed-off-by: Thierry Reding 
---
 arch/arm/mach-tegra/dt-setup.c | 31 ++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c
index 894a6358a2c4..c11494722bc7 100644
--- a/arch/arm/mach-tegra/dt-setup.c
+++ b/arch/arm/mach-tegra/dt-setup.c
@@ -78,9 +78,11 @@ void ft_mac_address_setup(void *fdt)
 
 static int ft_copy_carveout(void *dst, const void *src, const char *node)
 {
+   const char *names = "memory-region-names";
struct fdt_memory carveout;
unsigned int index = 0;
-   int err;
+   int err, offset, len;
+   const void *prop;
 
while (true) {
const char **compatibles = NULL;
@@ -96,6 +98,8 @@ static int ft_copy_carveout(void *dst, const void *src, const 
char *node)
if (err != -FDT_ERR_NOTFOUND)
printf("failed to get carveout for %s: %d\n",
   node, err);
+   else
+   break;
 
return err;
}
@@ -126,6 +130,31 @@ static int ft_copy_carveout(void *dst, const void *src, 
const char *node)
index++;
}
 
+   offset = fdt_path_offset(src, node);
+   if (offset < 0) {
+   debug("failed to find source offset for %s: %s\n", node,
+ fdt_strerror(err));
+   return err;
+   }
+
+   prop = fdt_getprop(src, offset, names, );
+   if (prop) {
+   offset = fdt_path_offset(dst, node);
+   if (offset < 0) {
+   debug("failed to find destination offset for %s: %s\n",
+ node, fdt_strerror(err));
+   return err;
+   }
+
+   err = fdt_setprop(dst, offset, "memory-region-names", prop,
+ len);
+   if (err < 0) {
+   debug("failed to copy \"%s\" property: %s\n", names,
+ fdt_strerror(err));
+   return err;
+   }
+   }
+
return 0;
 }
 
-- 
2.33.0

Re: [PATCH v1 0/1] tegra_mmc: get tap and trim from dts

[Thierry Reding]

On Wed, Aug 23, 2023 at 02:30:48PM +0300, Svyatoslav Ryhel wrote:
> 
> 
> 23 серпня 2023 р. 13:53:26 GMT+03:00, Thierry Reding 
>  написав(-ла):
> >On Sat, Aug 19, 2023 at 06:35:00PM +0300, Svyatoslav Ryhel wrote:
> >> Default-tap and default-trim values are used for eMMC setup
> >> mostly on T114+ devices. As for now, those values are hardcoded
> >> for T210 and ignored for all other Tegra generations. Fix this
> >> by passing tap and trim values from dts.
> >> 
> >> This commit will cause regression on T210 (emmc may not work),
> >> fix is applied in tegra210.dtsi and will be sent next week.
> >
> >Heh... I don't think so. If you already know that this will cause a
> >regression on Tegra210 you need to rework this. Adding regressions
> >accidentally is already bad enough, but doing so knowingly is a big
> >no-no.
> 
> DTS change for t210 was sent in "General tegra and board improvements"
> patchset. This is why this pathset contains only 1 (one) patch and a
> warning. It has a dependency.

For U-Boot this may not matter as much because the control DTB is always
linked into the binary, but for Linux for example we need to make sure
that the kernel always remains backwards compatible with older device
trees. I think that's good to follow in general, so making sure there
are sensible defaults to fall back to if the DTB is missing some
properties is good practice.

Anyway, the way you posted these there was a future dependency, so if
someone had applied the driver change without the DTB change having been
applied first this would've caused a regression, which is always bad if
it happens at random points because it makes things like bisections very
painful.

So unless the patch is fixed to fall back to defaults for Tegra210 we
need to carefully coordinate in which order these patches go in. The DT
change needs to go in first, followed by the driver change that relies
on the DTB update.

Thierry


signature.asc
Description: PGP signature

Re: [PATCH v1 1/1] mmc: tegra: get default-tap and default-trim from device tree

[Thierry Reding]

On Wed, Aug 23, 2023 at 02:38:48PM +0300, Svyatoslav Ryhel wrote:
> 
> 
> 23 серпня 2023 р. 14:03:25 GMT+03:00, Thierry Reding 
>  написав(-ла):
> >On Sat, Aug 19, 2023 at 06:35:01PM +0300, Svyatoslav Ryhel wrote:
> >> Default-tap and default-trim values are used for eMMC setup
> >> mostly on T114+ devices. As for now, those values are hardcoded
> >> for T210 and ignored for all other Tegra generations. Fix this
> >> by passing tap and trim values from dts.
> >> 
> >> Tested-by: Svyatoslav Ryhel  # ASUS TF701T
> >> Signed-off-by: Svyatoslav Ryhel 
> >> ---
> >>  arch/arm/include/asm/arch-tegra/tegra_mmc.h | 17 
> >>  drivers/mmc/tegra_mmc.c | 46 ++---
> >>  2 files changed, 30 insertions(+), 33 deletions(-)
> >> 
> >> diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h 
> >> b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> >> index d6a55764ba..750c7d809e 100644
> >> --- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> >> +++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> >> @@ -128,21 +128,22 @@ struct tegra_mmc {
> >>  
> >>  /* SDMMC1/3 settings from SDMMCx Initialization Sequence of TRM */
> >>  #define MEMCOMP_PADCTRL_VREF  7
> >> -#define AUTO_CAL_ENABLE   (1 << 29)
> >> -#define AUTO_CAL_ACTIVE   (1 << 31)
> >> -#define AUTO_CAL_START(1 << 31)
> >> +#define AUTO_CAL_ENABLE   BIT(29)
> >> +#define AUTO_CAL_ACTIVE   BIT(31)
> >> +#define AUTO_CAL_STARTBIT(31)
> >> +
> >>  #if defined(CONFIG_TEGRA210)
> >>  #define AUTO_CAL_PD_OFFSET(0x7D << 8)
> >>  #define AUTO_CAL_PU_OFFSET(0 << 0)
> >> -#define IO_TRIM_BYPASS_MASK   (1 << 2)
> >> -#define TRIM_VAL_SHIFT24
> >> -#define TRIM_VAL_MASK (0x1F << TRIM_VAL_SHIFT)
> >> -#define TAP_VAL_SHIFT 16
> >> -#define TAP_VAL_MASK  (0xFF << TAP_VAL_SHIFT)
> >>  #else
> >>  #define AUTO_CAL_PD_OFFSET(0x70 << 8)
> >>  #define AUTO_CAL_PU_OFFSET(0x62 << 0)
> >>  #endif
> >>  
> >> +#define TRIM_VAL_SHIFT24
> >> +#define TRIM_VAL_MASK (0x1F << TRIM_VAL_SHIFT)
> >> +#define TAP_VAL_SHIFT 16
> >> +#define TAP_VAL_MASK  (0xFF << TAP_VAL_SHIFT)
> >> +
> >>  #endif/* __ASSEMBLY__ */
> >>  #endif/* __TEGRA_MMC_H_ */
> >> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
> >> index f76fee3ea0..7627800261 100644
> >> --- a/drivers/mmc/tegra_mmc.c
> >> +++ b/drivers/mmc/tegra_mmc.c
> >> @@ -37,6 +37,9 @@ struct tegra_mmc_priv {
> >>unsigned int version;   /* SDHCI spec. version */
> >>unsigned int clock; /* Current clock (MHz) */
> >>int mmc_id; /* peripheral id */
> >> +
> >> +  u32 tap_value;
> >> +  u32 trim_value;
> >>  };
> >>  
> >>  static void tegra_mmc_set_power(struct tegra_mmc_priv *priv,
> >> @@ -526,31 +529,6 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv 
> >> *priv)
> >>printf("%s: Warning: Autocal timed out!\n", __func__);
> >>/* TBD: Set CFG2TMC_SDMMC1_PAD_CAL_DRV* regs here */
> >>}
> >> -
> >> -#if defined(CONFIG_TEGRA210)
> >> -  u32 tap_value, trim_value;
> >> -
> >> -  /* Set tap/trim values for SDMMC1/3 @ <48MHz here */
> >> -  val = readl(>reg->venspictl); /* aka VENDOR_SYS_SW_CNTL */
> >> -  val &= IO_TRIM_BYPASS_MASK;
> >> -  if (id == PERIPH_ID_SDMMC1) {
> >> -  tap_value = 4;  /* default */
> >> -  if (val)
> >> -  tap_value = 3;
> >> -  trim_value = 2;
> >> -  } else {/* SDMMC3 */
> >> -  tap_value = 3;
> >> -  trim_value = 3;
> >> -  }
> >> -
> >> -  val = readl(>reg->venclkctl);
> >> -  val &= ~TRIM_VAL_MASK;
> >> -  val |= (trim_value << TRIM_VAL_SHIFT);
> >> -  val &= ~TAP_VAL_MASK;
> >> -  val |= (tap_value << TAP_VAL_SHIFT);
> >> -  writel(val, >reg->venclkctl);
> >> -  debug("%s: VENDOR_CLOCK_CNTRL = 0x%08X\n", __func__, val);
> >> -#endif/* T210

Re: [PATCH v1 1/1] mmc: tegra: get default-tap and default-trim from device tree

[Thierry Reding]

On Wed, Aug 23, 2023 at 03:02:42PM +0300, Svyatoslav Ryhel wrote:
> 
> 
> 23 серпня 2023 р. 14:03:25 GMT+03:00, Thierry Reding 
>  написав(-ла):
> >On Sat, Aug 19, 2023 at 06:35:01PM +0300, Svyatoslav Ryhel wrote:
> >> Default-tap and default-trim values are used for eMMC setup
> >> mostly on T114+ devices. As for now, those values are hardcoded
> >> for T210 and ignored for all other Tegra generations. Fix this
> >> by passing tap and trim values from dts.
> >> 
> >> Tested-by: Svyatoslav Ryhel  # ASUS TF701T
> >> Signed-off-by: Svyatoslav Ryhel 
> >> ---
> >>  arch/arm/include/asm/arch-tegra/tegra_mmc.h | 17 
> >>  drivers/mmc/tegra_mmc.c | 46 ++---
> >>  2 files changed, 30 insertions(+), 33 deletions(-)
> >> 
> >> diff --git a/arch/arm/include/asm/arch-tegra/tegra_mmc.h 
> >> b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> >> index d6a55764ba..750c7d809e 100644
> >> --- a/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> >> +++ b/arch/arm/include/asm/arch-tegra/tegra_mmc.h
> >> @@ -128,21 +128,22 @@ struct tegra_mmc {
> >>  
> >>  /* SDMMC1/3 settings from SDMMCx Initialization Sequence of TRM */
> >>  #define MEMCOMP_PADCTRL_VREF  7
> >> -#define AUTO_CAL_ENABLE   (1 << 29)
> >> -#define AUTO_CAL_ACTIVE   (1 << 31)
> >> -#define AUTO_CAL_START(1 << 31)
> >> +#define AUTO_CAL_ENABLE   BIT(29)
> >> +#define AUTO_CAL_ACTIVE   BIT(31)
> >> +#define AUTO_CAL_STARTBIT(31)
> >> +
> >>  #if defined(CONFIG_TEGRA210)
> >>  #define AUTO_CAL_PD_OFFSET(0x7D << 8)
> >>  #define AUTO_CAL_PU_OFFSET(0 << 0)
> >> -#define IO_TRIM_BYPASS_MASK   (1 << 2)
> >> -#define TRIM_VAL_SHIFT24
> >> -#define TRIM_VAL_MASK (0x1F << TRIM_VAL_SHIFT)
> >> -#define TAP_VAL_SHIFT 16
> >> -#define TAP_VAL_MASK  (0xFF << TAP_VAL_SHIFT)
> >>  #else
> >>  #define AUTO_CAL_PD_OFFSET(0x70 << 8)
> >>  #define AUTO_CAL_PU_OFFSET(0x62 << 0)
> >>  #endif
> >>  
> >> +#define TRIM_VAL_SHIFT24
> >> +#define TRIM_VAL_MASK (0x1F << TRIM_VAL_SHIFT)
> >> +#define TAP_VAL_SHIFT 16
> >> +#define TAP_VAL_MASK  (0xFF << TAP_VAL_SHIFT)
> >> +
> >>  #endif/* __ASSEMBLY__ */
> >>  #endif/* __TEGRA_MMC_H_ */
> >> diff --git a/drivers/mmc/tegra_mmc.c b/drivers/mmc/tegra_mmc.c
> >> index f76fee3ea0..7627800261 100644
> >> --- a/drivers/mmc/tegra_mmc.c
> >> +++ b/drivers/mmc/tegra_mmc.c
> >> @@ -37,6 +37,9 @@ struct tegra_mmc_priv {
> >>unsigned int version;   /* SDHCI spec. version */
> >>unsigned int clock; /* Current clock (MHz) */
> >>int mmc_id; /* peripheral id */
> >> +
> >> +  u32 tap_value;
> >> +  u32 trim_value;
> >>  };
> >>  
> >>  static void tegra_mmc_set_power(struct tegra_mmc_priv *priv,
> >> @@ -526,31 +529,6 @@ static void tegra_mmc_pad_init(struct tegra_mmc_priv 
> >> *priv)
> >>printf("%s: Warning: Autocal timed out!\n", __func__);
> >>/* TBD: Set CFG2TMC_SDMMC1_PAD_CAL_DRV* regs here */
> >>}
> >> -
> >> -#if defined(CONFIG_TEGRA210)
> >> -  u32 tap_value, trim_value;
> >> -
> >> -  /* Set tap/trim values for SDMMC1/3 @ <48MHz here */
> >> -  val = readl(>reg->venspictl); /* aka VENDOR_SYS_SW_CNTL */
> >> -  val &= IO_TRIM_BYPASS_MASK;
> >> -  if (id == PERIPH_ID_SDMMC1) {
> >> -  tap_value = 4;  /* default */
> >> -  if (val)
> >> -  tap_value = 3;
> >> -  trim_value = 2;
> >> -  } else {/* SDMMC3 */
> >> -  tap_value = 3;
> >> -  trim_value = 3;
> >> -  }
> >> -
> >> -  val = readl(>reg->venclkctl);
> >> -  val &= ~TRIM_VAL_MASK;
> >> -  val |= (trim_value << TRIM_VAL_SHIFT);
> >> -  val &= ~TAP_VAL_MASK;
> >> -  val |= (tap_value << TAP_VAL_SHIFT);
> >> -  writel(val, >reg->venclkctl);
> >> -  debug("%s: VENDOR_CLOCK_CNTRL = 0x%08X\n", __func__, val);
> >> -#endif/* T210 */
> >>  #endif/* T30/T210 */
> >>  }
> >>  
> >> @@ -588,6 +566,21 @@ static void tegra_mmc_reset(struct tegra_mmc_priv 
> >> *priv, struct mmc *mmc)
> >>  
> >>/* Make sure SDIO pads are set up */
> >>tegra_mmc_pad_init(priv);
> >> +
> >> +  if (priv->tap_value || priv->trim_value) {
> >
> >I think 0 is a valid value for both tap and trim, so you want to be able
> >to write that. I suggest getting rid of the conditional and always
> >writing these values and rely on defaults to make sure that a good value
> >is always programmed.
> >
> >Alternatively if you really only want to program these when they've been
> >specified, use an extra variable (or something like -1 as a default
> >value) to discriminate.
> 
> I may propose a compromise. Do not set default value at all and when time 
> comes just check if tap or trim is not error.

Yes, that's essentially a variant of the second option and it should
work.

Thierry


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Description: PGP signature

Re: [PATCH v1 17/19] ARM: tegra: dt-setup: convert TrustZone remove into config

[Thierry Reding]

On Wed, Aug 23, 2023 at 02:47:11PM +0300, Svyatoslav Ryhel wrote:
> 
> 
> 23 серпня 2023 р. 14:17:37 GMT+03:00, Thierry Reding 
>  написав(-ла):
> >On Tue, Aug 22, 2023 at 02:22:15PM +0300, Svyatoslav Ryhel wrote:
> >> Remove of TrustZone nodes is required by many product devices
> >> which require repetable calls of same function from device board.
> >> To simplify this, TZ remove is converted into Kconfig option.
> >> 
> >> Signed-off-by: Svyatoslav Ryhel 
> >> ---
> >>  arch/arm/mach-tegra/Kconfig| 14 ++
> >>  arch/arm/mach-tegra/dt-setup.c |  7 +++
> >>  2 files changed, 21 insertions(+)
> >
> >I kind of preferred the original because it's very explicit. There's
> >also no big advantage in consolidating this because the code is unlikely
> >to ever require changing (the libfdt API is quite stable and these nodes
> >are all hard-coded anyway). This new variant put non-generic code (it
> >requires a Kconfig option after all) into a generic place, so it seems a
> >bit backwards.
> 
> So you say that I have to add same function to boards over and over
> for all devices I plan to mainline? Unneeded code duplication in
> action.

There's a balance to be struck between duplication and readability. If
you insert this board-specific code into a generic code path, that
generic code path becomes difficult to read given the extra #ifdef
guards etc. If you're really worried about duplicating code you can move
the two libfdt calls into a separate function and call that function
from each of the boards that need it.

Thierry


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Description: PGP signature

Re: [PATCH v2 00/16] General tegra and board improvements

[Thierry Reding]

From: Thierry Reding 


On Thu, 24 Aug 2023 22:25:47 +0300, Svyatoslav Ryhel wrote:
> This patchset follows Transformers, Grouper, LG X3 and Endeavoru
> bringup and contains changes from v9 of previous patchset and
> some new improvenets.
> 
> List of changes:
> - separated tf600t and p1801-t device trees since they use
>   different video path bindings
> - enabled booting from usb devices (USB > SD > eMMC)
> - fixed tf201 dock usb line binding
> - removed transformer board pmic gpios setup
> - refresh USB option converted into enter console for transformers
> - updated device trees for future DM PMIC migration
> - re-synced defconfigs
> - added base voltages setup from board for t114 same as on t30
> - adjusted ebtupdate to work with non-encrypted re-crypted devices
> - attempt to move setup of some env values to arch
> - config fragments moved to board/vendor/device/configs/ dir
>   (requires pending u-boot patch)
> 
> [...]

Applied, thanks!

[01/16] ARM: dts: p1801-t: separate from common transformers tree
(no commit info)
[02/16] ARM: dts: tf600t: separate from common transformers tree
(no commit info)
[03/16] configs: transformer_t30: support booting from USB
(no commit info)
[04/16] ARM: dts: tf201: configure dock USB phy
(no commit info)
[05/16] board: asus: transformer-t30: remove PMIC GPIOs configuration
(no commit info)
[06/16] configs: transformer_t30: convert bootmenu option
(no commit info)
[07/16] ARM: dts: transformer-t30: complete missing bindings
(no commit info)
[08/16] ARM: dts: endeavoru: complete missing bindings
(no commit info)
[09/16] ARM: dts: lg-x3: complete missing bindings
(no commit info)
[10/16] ARM: dts: grouper: complete missing bindings
(no commit info)
[11/16] configs: transformer_t30: grouper: lg-x3: endeavoru: sync defconfigs
(no commit info)
[12/16] ARM: tegra114: enable base voltages setup from board
(no commit info)
[13/16] ARM: tegra20: tegra30: support EBTUPDATE on non-encrypted devices
(no commit info)
[14/16] ARM: tegra: board2: add generic late init
(no commit info)
[15/16] board: tegra30: remove nvidia_board_late_init calls
(no commit info)
[16/16] board: asus: lg: move config fragments into device boards
(no commit info)

Best regards,
-- 
Thierry Reding 

Re: [PATCH v2 0/2] tegra_mmc: get tap and trim from dts

[Thierry Reding]

From: Thierry Reding 


On Thu, 24 Aug 2023 21:53:30 +0300, Svyatoslav Ryhel wrote:
> Default-tap and default-trim values are used for eMMC setup
> mostly on T114+ devices. As for now, those values are hardcoded
> for T210 and ignored for all other Tegra generations. Fix this
> by passing tap and trim values from dts.
> 

Applied, thanks!

[1/2] ARM: tegra210: set default-tap and default-trim values in sdhci nodes
  (no commit info)
[2/2] mmc: tegra: get default-tap and default-trim from device tree
  (no commit info)

Best regards,
-- 
Thierry Reding 

Re: [GIT PULL] ARM: tegra: Changes for v2023.10-rc1

[Thierry Reding]

On Fri, Aug 18, 2023 at 12:49:43PM -0400, Tom Rini wrote:
> On Fri, Aug 18, 2023 at 03:39:22PM +0200, Thierry Reding wrote:
> 
> > From: Thierry Reding 
> > 
> > Hi Tom,
> > 
> > The following changes since commit 68c07fc5fdf34f0926cf06fc0c4ebd6f2f3afe19:
> > 
> >   Merge https://source.denx.de/u-boot/custodians/u-boot-usb (2023-06-21 
> > 14:42:50 -0400)
> > 
> > are available in the Git repository at:
> > 
> >   g...@source.denx.de:u-boot/custodians/u-boot-tegra.git 
> > tags/tegra-for-2023.10-rc1
> 
> FYI, in your .git/config you can do:
>   url = https://source.denx.de/u-boot/custodians/u-boot-tegra.git
>   pushurl = g...@source.denx.de:u-boot/custodians/u-boot-tegra.git
> 
> And this part looks "nicer".  Not a big deal, just an FYI.

This actually comes from a script that doesn't use the git config but
takes this from gitlab directly using the REST API. This is primarily
because the script also gets the link to the CI pipeline from there so
it was convenient.

Anyway, I wasn't sure if you preferred the HTTPS link or the SSH link,
but I can update the script now that I know. =)

Thierry


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Description: PGP signature

Re: [GIT PULL] ARM: tegra: Changes for v2023.10-rc1

[Thierry Reding]

On Fri, Aug 18, 2023 at 08:02:30PM +0300, Svyatoslav Ryhel wrote:
> 
> 
> 18 серпня 2023 р. 19:49:43 GMT+03:00, Tom Rini  
> написав(-ла):
> >On Fri, Aug 18, 2023 at 03:39:22PM +0200, Thierry Reding wrote:
> >
> >> From: Thierry Reding 
> >> 
> >> Hi Tom,
> >> 
> >> The following changes since commit 
> >> 68c07fc5fdf34f0926cf06fc0c4ebd6f2f3afe19:
> >> 
> >>   Merge https://source.denx.de/u-boot/custodians/u-boot-usb (2023-06-21 
> >> 14:42:50 -0400)
> >> 
> >> are available in the Git repository at:
> >> 
> >>   g...@source.denx.de:u-boot/custodians/u-boot-tegra.git 
> >> tags/tegra-for-2023.10-rc1
> >
> >FYI, in your .git/config you can do:
> > url = https://source.denx.de/u-boot/custodians/u-boot-tegra.git
> > pushurl = g...@source.denx.de:u-boot/custodians/u-boot-tegra.git
> >
> >And this part looks "nicer".  Not a big deal, just an FYI.
> >
> >> for you to fetch changes up to bdf9dead86f06c7d6980c399a4a6339430b531ec:
> >> 
> >>   board: htc: endeavoru: add One X support (2023-06-30 15:20:37 +0200)
> >> 
> >> This passes CI successfully:
> >> 
> >>   https://source.denx.de/u-boot/custodians/u-boot-tegra/-/pipelines/17411
> >> 
> >> Thanks,
> >> Thierry
> >> 
> >> 
> >> ARM: tegra: Changes for v2023.10-rc1
> >> 
> >> This adds support for various new Tegra30 boards (ASUS, LG and HTC) and
> >> has some other minor enhancements, such as enabling the poweroff command
> >> on several Tegra210 and Tegra186 boards.
> >> 
> >> 
> >> Jonas Schwöbel (1):
> >>   configs: tegra-common-post: make PXE and DHCP boot targets optional
> >> 
> >> Svyatoslav Ryhel (6):
> >>   configs: tegra-common-post: add GPIO keyboard as STDIN device
> >>   ARM: tegra: add SoC UID calculation function
> >>   board: asus: transformer: add ASUS Transformer T30 family support
> >>   board: asus: grouper: add Google Nexus 7 (2012) support
> >>   board: lg: x3: add Optimus 4X HD and Optimus Vu support
> >>   board: htc: endeavoru: add One X support
> >> 
> >> Thierry Reding (2):
> >>   ARM: tegra: Enable poweroff command on Jetson TX1 and Jetson Nano
> >>   ARM: tegra: Enable poweroff command on Jetson TX2
> >> 
> >> Tomasz Maciej Nowak (1):
> >>   ARM: dts: trimslice: sync SPI node with Linux dts
> >
> >Since I'm not sure if this is v8 or v9, given when v9 was posted, I've
> >applied this PR now, as I had said I wanted this in.  I do have two
> >requests for you Svyatoslav, however.  First, if there's changes that
> >are missing in master, please post those ASAP and we'll get them in, for
> >v2023.10. 
> 
> Patches Thierry applied are v8, while v9 has significant improvements.

I'm a little surprised by how this series developed. You've been urging
me since v6 to apply this, so I assumed this was mostly done. Having
another 3 versions with significant improvements come in after that
point indicates the opposite was true.

Thierry


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Re: [PATCH v1 1/1] usb: host: tegra: implement dts based xcvr setup

[Thierry Reding]

On Sun, Aug 20, 2023 at 09:10:17PM +0200, Marek Vasut wrote:
> On 8/20/23 20:32, Svyatoslav Ryhel wrote:
> > 20 серпня 2023 р. 21:14:15 GMT+03:00, Marek Vasut  
> > написав(-ла):
> > > On 8/20/23 09:13, Svyatoslav Ryhel wrote:
> > > > 20 серпня 2023 р. 05:23:14 GMT+03:00, Marek Vasut  
> > > > написав(-ла):
> > > > > On 8/19/23 17:06, Svyatoslav Ryhel wrote:
> > > > > > Some devices (like ASUS TF201) may not have fuse based xcvr setup
> > > > > > which will result in not working USB line. To fix this situation
> > > > > > allow xcvr setup to be performed from device tree values if
> > > > > > nvidia,xcvr-setup-use-fuses is not defined.
> > > > > > 
> > > > > > Tested-by: Svyatoslav Ryhel  # ASUS TF201
> > > > > 
> > > > > I would hope so. Usually T-B tags are not added by the patch author, 
> > > > > but that's a detail, and here it has the added model value, so keep 
> > > > > it.
> > > > > 
> > > > > > Signed-off-by: Svyatoslav Ryhel 
> > > > > > ---
> > > > > > drivers/usb/host/ehci-tegra.c | 53 
> > > > > > +++
> > > > > > 1 file changed, 48 insertions(+), 5 deletions(-)
> > > > > > 
> > > > > > diff --git a/drivers/usb/host/ehci-tegra.c 
> > > > > > b/drivers/usb/host/ehci-tegra.c
> > > > > > index 2cf1625670..f24baf8f0c 100644
> > > > > > --- a/drivers/usb/host/ehci-tegra.c
> > > > > > +++ b/drivers/usb/host/ehci-tegra.c
> > > > > > @@ -81,6 +81,8 @@ struct fdt_usb {
> > > > > >enum periph_id periph_id;/* peripheral id */
> > > > > >struct gpio_desc vbus_gpio; /* GPIO for vbus enable */
> > > > > >struct gpio_desc phy_reset_gpio; /* GPIO to reset ULPI phy */
> > > > > > +bool xcvr_setup_use_fuses; /* Indicates that the value is read 
> > > > > > from the on-chip fuses */
> > > > > > +u32 xcvr_setup; /* Input of XCVR cell, HS driver output 
> > > > > > control */
> > > > > > };
> > > > > >   /*
> > > > > > @@ -464,10 +466,21 @@ static int init_utmi_usb_controller(struct 
> > > > > > fdt_usb *config,
> > > > > >/* Recommended PHY settings for EYE diagram */
> > > > > >val = readl(>utmip_xcvr_cfg0);
> > > > > > -clrsetbits_le32(, UTMIP_XCVR_SETUP_MASK,
> > > > > > -0x4 << UTMIP_XCVR_SETUP_SHIFT);
> > > > > > -clrsetbits_le32(, UTMIP_XCVR_SETUP_MSB_MASK,
> > > > > > -0x3 << UTMIP_XCVR_SETUP_MSB_SHIFT);
> > > > > > +
> > > > > > +if (!config->xcvr_setup_use_fuses) {
> > > > > > +clrsetbits_le32(, UTMIP_XCVR_SETUP_MASK,
> > > > > > +config->xcvr_setup <<
> > > > > > +UTMIP_XCVR_SETUP_SHIFT);
> > > > > > +clrsetbits_le32(, 
> > > > > > UTMIP_XCVR_SETUP_MSB_MASK,
> > > > > > +config->xcvr_setup <<
> > > > > > +UTMIP_XCVR_SETUP_MSB_SHIFT);
> > > > > > +} else {
> > > > > > +clrsetbits_le32(, UTMIP_XCVR_SETUP_MASK,
> > > > > > +0x4 << UTMIP_XCVR_SETUP_SHIFT);
> > > > > 
> > > > > What is this hard-coded value ?
> > > > > 
> > > > 
> > > > 0x4 and 0x3 (not same) but those are not in the device tree. Mainline 
> > > > linux
> > > > driver seems not set this at all if use_fuses is enabled but I decided 
> > > > to keep
> > > > original setup just to not cause regressions.
> > > > 
> > > > https://github.com/clamor-s/linux/blob/transformer/drivers/usb/phy/phy-tegra-usb.c#L587-L590
> > > > 
> > > > > Why not place this value into config->xcvr_setup in e.g. probe() and 
> > > > > drop this if/else statement ?
> > > > > 
> > > > 
> > > > Because config->xcvr_setup should matter only if use_fuses is disabled
> > > 
> > > Can it matter always instead ?
> > > 
> > 
> > No, it cannot. You are inversing hw design. Xcvr_setup matters only if 
> > use_fuses is disabled. If use_fuses is on (which is default state) xcvr 
> > values are taken from chip fuse.
> 
> The way I read this block of code is, some value is written into the
> register if config->xcvr_setup_use_fuses is false, another value if
> config->xcvr_setup_use_fuses is true . Why not do this determination once in
> probe and then just program the appropriate value instead ?
> 
> > > > > > +clrsetbits_le32(, 
> > > > > > UTMIP_XCVR_SETUP_MSB_MASK,
> > > > > > +0x3 << 
> > > > > > UTMIP_XCVR_SETUP_MSB_SHIFT);
> > > > > > +}
> > > > > > +
> > > > > >clrsetbits_le32(, UTMIP_XCVR_HSSLEW_MSB_MASK,
> > > > > >0x8 << UTMIP_XCVR_HSSLEW_MSB_SHIFT);
> > > > > >writel(val, >utmip_xcvr_cfg0);
> > > > > > @@ -522,7 +535,9 @@ static int init_utmi_usb_controller(struct 
> > > > > > fdt_usb *config,
> > > > > >setbits_le32(>utmip_bat_chrg_cfg0, UTMIP_PD_CHRG);
> > > > > >

Re: [PATCH v1 0/1] tegra_mmc: get tap and trim from dts

[Thierry Reding]

On Sat, Aug 19, 2023 at 06:35:00PM +0300, Svyatoslav Ryhel wrote:
> Default-tap and default-trim values are used for eMMC setup
> mostly on T114+ devices. As for now, those values are hardcoded
> for T210 and ignored for all other Tegra generations. Fix this
> by passing tap and trim values from dts.
> 
> This commit will cause regression on T210 (emmc may not work),
> fix is applied in tegra210.dtsi and will be sent next week.

Heh... I don't think so. If you already know that this will cause a
regression on Tegra210 you need to rework this. Adding regressions
accidentally is already bad enough, but doing so knowingly is a big
no-no.

Thierry


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