[USRP-users] Multiple TX streams
Hi folks, I have 2x X310 connected to Octoclock (10 MHz + PPS), each with 2x UBX frontends. I control them from a C/C++ program. Since there are 4 channels, I create 4 tx streamers in order to transmit timed samples on each of them. The transmissions are not at the same time and this is the reason for using 4 tx streamers. The problem is that when I schedule timed transmissions on all of the channels (at the same time for test), sometimes I do not get anything with recv_async_msg, i.e. the timeout expires. This also happens even when I schedule only a single transmission from single tx streamer (all 4 streamers are created). Sometimes it happens that everything is working without problems, i.e. I make 200 transmissions on each of the channels and I get the proper response from the recv_async_msg, but many times, restarting the same program leads to just recv_async_msg with expired timeout. I am using UHD 3.13.0. I can probably use one streamer and transmitting 0's on the rest of the channels, but I would like to avoid LO leakage in the air. Best regards, Vladica ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] X300 RFNoC integer-N tuning
Hey All, I'm trying to figure out a way to enable integer-N tuning in my RFNoC application. My understanding is that rfnoc radio_ctrl object that interfaces with the Radio noc block on the device does not support the use of a tune_request object to pass in the mode_n=integer argument. See: https://github.com/EttusResearch/uhd/blob/UHD-3.13/host/lib/rfnoc/radio_ctrl_impl.cpp#L150 vs https://github.com/EttusResearch/uhd/blob/master/host/lib/usrp/multi_usrp.cpp#L1917 Is there another way I can pass this setting in to an rfnoc/device3 application that I am overlooking? Thanks, Ryan Marlow -- Ryan L. Marlow R L Marlow Consulting LLC rlmarlow.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Connect Eth Phy to FPGA
> This task should be performed in B210 (I guess, ethernet MAC is drived > by FPGA in here). The B210 is a USB3 device ... there is no ethernet anywhere in there. > So, how can i start to this task ? Where can i find an > example or some information to drive built-in ethernet MAC in FPGA ? It > will be appreciated, if you can give a point to start. Hire someone ... Sorry, but it's one of those "If you have to ask, you're not qualified". You're going to need FPGA design experience, embedded software experience including linux kernel, electronics design experience ... That's easily a few man-month of work for an engineer already experienced in all those domains. Cheers, Sylvain ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Connect Eth Phy to FPGA
Hello, Thank you for your answers. Actually, we need to achieve this task. This task should be performed in B210 (I guess, ethernet MAC is drived by FPGA in here). So, how can i start to this task ? Where can i find an example or some information to drive built-in ethernet MAC in FPGA ? It will be appreciated, if you can give a point to start. Best regards. On 21.05.2019 22:14, Philip Balister wrote: On 05/21/2019 02:56 PM, Sylvain Munaut wrote: Hi, Yes, it's connected to the PS and not the PL. _However_ ... you could just remove the ethernet driver from the linux side, then drive the built-in ethernet mac from the FPGA by just acting as an AXI master. None of this is trivial however ... But it is possible. I'd love to see someone try it. Philip Cheers, Sylvain ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
