Re: [USRP-users] Connect Eth Phy to FPGA
> This task should be performed in B210 (I guess, ethernet MAC is drived > by FPGA in here). The B210 is a USB3 device ... there is no ethernet anywhere in there. > So, how can i start to this task ? Where can i find an > example or some information to drive built-in ethernet MAC in FPGA ? It > will be appreciated, if you can give a point to start. Hire someone ... Sorry, but it's one of those "If you have to ask, you're not qualified". You're going to need FPGA design experience, embedded software experience including linux kernel, electronics design experience ... That's easily a few man-month of work for an engineer already experienced in all those domains. Cheers, Sylvain ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Connect Eth Phy to FPGA
Hello, Thank you for your answers. Actually, we need to achieve this task. This task should be performed in B210 (I guess, ethernet MAC is drived by FPGA in here). So, how can i start to this task ? Where can i find an example or some information to drive built-in ethernet MAC in FPGA ? It will be appreciated, if you can give a point to start. Best regards. On 21.05.2019 22:14, Philip Balister wrote: On 05/21/2019 02:56 PM, Sylvain Munaut wrote: Hi, Yes, it's connected to the PS and not the PL. _However_ ... you could just remove the ethernet driver from the linux side, then drive the built-in ethernet mac from the FPGA by just acting as an AXI master. None of this is trivial however ... But it is possible. I'd love to see someone try it. Philip Cheers, Sylvain ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Connect Eth Phy to FPGA
On 05/21/2019 02:56 PM, Sylvain Munaut wrote: > Hi, > > Yes, it's connected to the PS and not the PL. > _However_ ... you could just remove the ethernet driver from the linux > side, then drive the built-in ethernet mac from the FPGA by just > acting as an AXI master. > > None of this is trivial however ... But it is possible. I'd love to see someone try it. Philip > > > Cheers, > > Sylvain > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Connect Eth Phy to FPGA
Hi, Yes, it's connected to the PS and not the PL. _However_ ... you could just remove the ethernet driver from the linux side, then drive the built-in ethernet mac from the FPGA by just acting as an AXI master. None of this is trivial however ... Cheers, Sylvain ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] Connect Eth Phy to FPGA
You should check the schematic, but as I recall the ethernet interface is connected directly to the ARM and not via the FPGA fabric. Philip On 05/21/2019 10:32 AM, Ramazan Çetin via USRP-users wrote: > Hello, > > We want to use E310 as a peripheral network device like N210. We want > the RF samples come to ethernet interface through FPGA without passing > from CPU. In short, we don't want to use CPU. So, can we configure FPGA > to achieve this task? (Connecting ethernet interface directly to FPGA) > > Best regards. > > > > > > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] Connect Eth Phy to FPGA
Hello, We want to use E310 as a peripheral network device like N210. We want the RF samples come to ethernet interface through FPGA without passing from CPU. In short, we don't want to use CPU. So, can we configure FPGA to achieve this task? (Connecting ethernet interface directly to FPGA) Best regards. ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
