Re: [Xen-devel] [V3 PATCH 9/9] x86/hvm: pkeys, add pkeys support for cpuid handling

[Jan Beulich]

>>> On 07.12.15 at 10:16,  wrote:
> @@ -4605,6 +4605,18 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, 
> unsigned int *ebx,
>  /* Don't expose INVPCID to non-hap hvm. */
>  if ( (count == 0) && !hap_enabled(d) )
>  *ebx &= ~cpufeat_mask(X86_FEATURE_INVPCID);
> +
> +/* X86_FEATURE_PKU is not yet implemented for shadow paging

Coding style.

> + *
> + * Hypervisor gets guest pkru value from XSAVE state, because
> + * Hypervisor CR4 without X86_CR4_PKE disables RDPKRU instruction.
> + */
> +if ( (count == 0) && (!hap_enabled(d) || !cpu_has_xsave) )

I has been said before that you should check the guest property
here, not the host one. Without you doing so I can't even see the
point of you adjusting the logic to set OSXSAVE above.

Jan


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[Xen-devel] [V3 PATCH 9/9] x86/hvm: pkeys, add pkeys support for cpuid handling

[Huaitong Han]

This patch adds pkeys support for cpuid handing.

Pkeys hardware support is CPUID.7.0.ECX[3]:PKU. software support is
CPUID.7.0.ECX[4]:OSPKE and it reflects the support setting of CR4.PKE.

Signed-off-by: Huaitong Han 
---
 tools/libxc/xc_cpufeature.h |  2 ++
 tools/libxc/xc_cpuid_x86.c  |  6 --
 xen/arch/x86/hvm/hvm.c  | 14 +-
 3 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/tools/libxc/xc_cpufeature.h b/tools/libxc/xc_cpufeature.h
index c3ddc80..f6a9778 100644
--- a/tools/libxc/xc_cpufeature.h
+++ b/tools/libxc/xc_cpufeature.h
@@ -141,5 +141,7 @@
 #define X86_FEATURE_ADX 19 /* ADCX, ADOX instructions */
 #define X86_FEATURE_SMAP20 /* Supervisor Mode Access Protection */
 
+/* Intel-defined CPU features, CPUID level 0x0007:0 (ecx) */
+#define X86_FEATURE_PKU 3
 
 #endif /* __LIBXC_CPUFEATURE_H */
diff --git a/tools/libxc/xc_cpuid_x86.c b/tools/libxc/xc_cpuid_x86.c
index 8882c01..1ce979b 100644
--- a/tools/libxc/xc_cpuid_x86.c
+++ b/tools/libxc/xc_cpuid_x86.c
@@ -427,9 +427,11 @@ static void xc_cpuid_hvm_policy(xc_interface *xch,
 bitmaskof(X86_FEATURE_ADX)  |
 bitmaskof(X86_FEATURE_SMAP) |
 bitmaskof(X86_FEATURE_FSGSBASE));
+regs[2] &= bitmaskof(X86_FEATURE_PKU);
 } else
-regs[1] = 0;
-regs[0] = regs[2] = regs[3] = 0;
+regs[1] = regs[2] = 0;
+
+regs[0] = regs[3] = 0;
 break;
 
 case 0x000d:
diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c
index b88f381..d7b3b43 100644
--- a/xen/arch/x86/hvm/hvm.c
+++ b/xen/arch/x86/hvm/hvm.c
@@ -4577,7 +4577,7 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, 
unsigned int *ebx,
 __clear_bit(X86_FEATURE_APIC & 31, edx);
 
 /* Fix up OSXSAVE. */
-if ( cpu_has_xsave )
+if ( *ecx & cpufeat_mask(X86_FEATURE_XSAVE) )
 *ecx |= (v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_OSXSAVE) ?
  cpufeat_mask(X86_FEATURE_OSXSAVE) : 0;
 
@@ -4605,6 +4605,18 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, 
unsigned int *ebx,
 /* Don't expose INVPCID to non-hap hvm. */
 if ( (count == 0) && !hap_enabled(d) )
 *ebx &= ~cpufeat_mask(X86_FEATURE_INVPCID);
+
+/* X86_FEATURE_PKU is not yet implemented for shadow paging
+ *
+ * Hypervisor gets guest pkru value from XSAVE state, because
+ * Hypervisor CR4 without X86_CR4_PKE disables RDPKRU instruction.
+ */
+if ( (count == 0) && (!hap_enabled(d) || !cpu_has_xsave) )
+*ecx &= ~cpufeat_mask(X86_FEATURE_PKU);
+
+if ( (count == 0) && (*ecx & cpufeat_mask(X86_FEATURE_PKU)) )
+*ecx |= (v->arch.hvm_vcpu.guest_cr[4] & X86_CR4_PKE) ?
+ cpufeat_mask(X86_FEATURE_OSPKE) : 0;
 break;
 case 0xb:
 /* Fix the x2APIC identifier. */
-- 
2.4.3


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