@@ -8015,6 +8015,26 @@ but do not pass them to the underlying coroutine or pass
them by value.
}];
}
+def CoroStructuredConcurrencyDoc : Documentation {
+ let Category = DocCatDecl;
+ let Content = [{
+The ``[[clang::coro_structured_concurrency]]`` is a class attribute
efriedma-quic wrote:
For reference, current MSVC has a flag /Ob3 to request more aggressive inlining.
https://github.com/llvm/llvm-project/pull/95406
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https://github.com/efriedma-quic approved this pull request.
LGTM with one minor comment
https://github.com/llvm/llvm-project/pull/75912
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https://github.com/llvm/llvm-project/pull/75912
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@@ -6853,6 +6853,7 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) {
if (ES->hasExternalDefinitions(D) == ExternalASTSource::EK_Never)
DI->completeUnusedClass(*CRD);
}
+
efriedma-quic wrote:
Unnecessary whitespace change
@@ -318,6 +318,9 @@ namespace {
if (Diags.hasUnrecoverableErrorOccurred())
return;
+ if (RD->shouldEmitInExternalSource())
efriedma-quic wrote:
Most of the CodeGen code surrounding vtable emission is optimizations.
Specifically, to avoid
@@ -0,0 +1,807 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -2456,6 +2461,139 @@ static RValue
EmitHipStdParUnsupportedBuiltin(CodeGenFunction *CGF,
return RValue::get(CGF->Builder.CreateCall(UBF, Args));
}
+template
+void RecursivelyClearPaddingImpl(CodeGenFunction , Value *Ptr, QualType
Ty, size_t CurrentStartOffset, size_t
@@ -2538,6 +2539,205 @@ static RValue
EmitHipStdParUnsupportedBuiltin(CodeGenFunction *CGF,
return RValue::get(CGF->Builder.CreateCall(UBF, Args));
}
+template
+void RecursivelyClearPaddingImpl(CodeGenFunction , Value *Ptr, QualType Ty,
+
@@ -2456,6 +2461,139 @@ static RValue
EmitHipStdParUnsupportedBuiltin(CodeGenFunction *CGF,
return RValue::get(CGF->Builder.CreateCall(UBF, Args));
}
+template
+void RecursivelyClearPaddingImpl(CodeGenFunction , Value *Ptr, QualType
Ty, size_t CurrentStartOffset, size_t
efriedma-quic wrote:
If we're trying to match MSVC, the amount of inlining MSVC does at /O2 is
probably closer to what clang does at -O2 than -O3. Which is why it was mapped
that way in 015ce0f68f791b3abec4225c1b2e532ce5020174, I think. clang's -O3 is
really aggressive (which tends to look
@@ -318,6 +318,9 @@ namespace {
if (Diags.hasUnrecoverableErrorOccurred())
return;
+ if (RD->shouldEmitInExternalSource())
efriedma-quic wrote:
The way I see it, Sema should have the exact right answer for whether the
vtable is required.
efriedma-quic wrote:
Right, the specification requires splitting the whole structure into chunks; if
we add a special-case for 8-byte structs, we'll just have to throw it away when
we implement the right algorithm.
Also, I'm not sure what the isBuiltinType() check is supposed to handle. It
@@ -325,14 +325,19 @@ Address SparcV9ABIInfo::EmitVAArg(CodeGenFunction ,
Address VAListAddr,
break;
case ABIArgInfo::Ignore:
-return Address(llvm::UndefValue::get(ArgPtrTy), ArgTy, TypeInfo.Align);
+return CGF.EmitLoadOfAnyValue(
+CGF.MakeAddrLValue(
@@ -834,5 +834,4 @@ typedef struct {} empty;
empty empty_record_test(void) {
// CHECK-LABEL: define{{.*}} void @empty_record_test()
return va_arg(the_list, empty);
-// CHECK: [[GR_OFFS:%[a-z_0-9]+]] = load ptr, ptr @the_list
efriedma-quic wrote:
Maybe
https://github.com/efriedma-quic approved this pull request.
A couple minor comments; otherwise LGTM
https://github.com/llvm/llvm-project/pull/94635
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efriedma-quic wrote:
Yes, I think it's just a historical mistake; sin/cos/log/exp were added a very
long time ago, and we weren't as careful about that sort of thing. And nobody
has taken the time to try to cleanup the current defaults.
https://github.com/llvm/llvm-project/pull/94559
https://github.com/efriedma-quic approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/94346
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efriedma-quic wrote:
What you're implementing in this change doesn't seem like it brings us much
closer to what the document says. I mean, it handles the specific structs in
your testcase, but the algorithm you're using doesn't generalize.
https://github.com/llvm/llvm-project/pull/95257
efriedma-quic wrote:
Can we change the target-independent bits of the tan() implementation in the
backend so it doesn't require each target to explicitly request that tan()
needs to be expanded? It should be possible to adjust the code in
TargetLoweringBase.cpp a bit so FTAN defaults to
@@ -318,6 +318,9 @@ namespace {
if (Diags.hasUnrecoverableErrorOccurred())
return;
+ if (RD->shouldEmitInExternalSource())
efriedma-quic wrote:
Did you mean to change something in ModuleBuilder.cpp?
@@ -318,6 +318,9 @@ namespace {
if (Diags.hasUnrecoverableErrorOccurred())
return;
+ if (RD->shouldEmitInExternalSource())
efriedma-quic wrote:
Maybe this check should be part of DefineUsedVTables()?
@@ -6853,6 +6853,13 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) {
if (ES->hasExternalDefinitions(D) == ExternalASTSource::EK_Never)
DI->completeUnusedClass(*CRD);
}
+// If we're emitting a dynamic class from the importable module we're
+//
efriedma-quic wrote:
Do you have a reference for the rules you're implementing?
https://github.com/llvm/llvm-project/pull/95257
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@@ -789,27 +791,37 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address
VAListAddr, QualType Ty,
OnStackBlock, "vaargs.addr");
if (IsIndirect)
-return Address(CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"), ElementTy,
-
@@ -789,27 +791,37 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address
VAListAddr, QualType Ty,
OnStackBlock, "vaargs.addr");
if (IsIndirect)
-return Address(CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"), ElementTy,
-
efriedma-quic wrote:
> I don't know much about there intrinsics on ARM, what are the stronger
> guarantees?
The Arm specifies that there's a memory reservation, and you can write whatever
operations you want as long as you don't break that reservation. And the
reservation is usually only a
@@ -6853,6 +6853,13 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) {
if (ES->hasExternalDefinitions(D) == ExternalASTSource::EK_Never)
DI->completeUnusedClass(*CRD);
}
+// If we're emitting a dynamic class from the importable module we're
+//
@@ -1227,7 +1241,8 @@ void CodeGenModule::EmitDeferredVTables() {
#endif
for (const CXXRecordDecl *RD : DeferredVTables)
-if (shouldEmitVTableAtEndOfTranslationUnit(*this, RD))
+if (shouldEmitVTableAtEndOfTranslationUnit(*this, RD) &&
+
@@ -789,27 +791,37 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address
VAListAddr, QualType Ty,
OnStackBlock, "vaargs.addr");
if (IsIndirect)
-return Address(CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"), ElementTy,
-
@@ -4777,6 +4783,13 @@ class CodeGenFunction : public CodeGenTypeCache {
/// aggregate type into a temporary LValue.
LValue EmitAggExprToLValue(const Expr *E);
+ enum ExprValueKind { EVK_RValue, EVK_NonRValue };
+
+ /// EmitAggFinalDestCopy - Emit copy of the specified
https://github.com/efriedma-quic commented:
This generally seems fine.
https://github.com/llvm/llvm-project/pull/94635
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@@ -102,12 +98,7 @@ char *test_ptr(char *fmt, ...) {
// N32: [[TMP2:%.+]] = load i64, ptr [[AP_CUR]], align 8
// N32: [[TMP3:%.+]] = trunc i64 [[TMP2]] to i32
// N32: [[PTR:%.+]] = inttoptr i32 [[TMP3]] to ptr
-// N32: store ptr [[PTR]], ptr [[AP_CAST]], align 4
-//
@@ -789,27 +791,37 @@ Address AArch64ABIInfo::EmitAAPCSVAArg(Address
VAListAddr, QualType Ty,
OnStackBlock, "vaargs.addr");
if (IsIndirect)
-return Address(CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"), ElementTy,
-
@@ -325,14 +325,19 @@ Address SparcV9ABIInfo::EmitVAArg(CodeGenFunction ,
Address VAListAddr,
break;
case ABIArgInfo::Ignore:
-return Address(llvm::UndefValue::get(ArgPtrTy), ArgTy, TypeInfo.Align);
+return CGF.EmitLoadOfAnyValue(
+CGF.MakeAddrLValue(
https://github.com/efriedma-quic edited
https://github.com/llvm/llvm-project/pull/94635
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https://github.com/efriedma-quic approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/83301
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LGTM
https://github.com/llvm/llvm-project/pull/94559
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efriedma-quic wrote:
Also, we probably want to specify the interaction between trivial_abi and
value_type here... should trivial_abi imply value_type?
https://github.com/llvm/llvm-project/pull/95004
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efriedma-quic wrote:
> I feel like this is a property that needs to propagate through types
You mean, similar to the way trivial_abi works? That makes sense.
https://github.com/llvm/llvm-project/pull/95004
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@@ -196,12 +196,14 @@ bool AArch64FunctionInfo::needsAsyncDwarfUnwindInfo(
const MachineFunction ) const {
if (!NeedsAsyncDwarfUnwindInfo) {
const Function = MF.getFunction();
+const AArch64FunctionInfo *AFI = MF.getInfo();
// The check got "minsize" is
@@ -214,7 +232,8 @@ declare double @za_shared_callee(double) "aarch64_inout_za"
define double @za_new_caller_to_za_shared_callee(double %x) nounwind noinline
optnone "aarch64_new_za"{
; CHECK-COMMON-LABEL: za_new_caller_to_za_shared_callee:
; CHECK-COMMON: // %bb.0: //
https://github.com/efriedma-quic closed
https://github.com/llvm/llvm-project/pull/84135
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https://github.com/llvm/llvm-project/pull/93115
>From 816ceb271c28ff6c4dc05485000deec087674e37 Mon Sep 17 00:00:00 2001
From: Eli Friedman
Date: Thu, 23 May 2024 18:38:04 -0700
Subject: [PATCH] Fix codegen of consteval functions returning an empty
efriedma-quic wrote:
lr/sc builtins are extremely fragile: there's no reasonable way for the
compiler to guarantee that the sc is placed in such a way that it will
eventually succeed. (The equivalent intrinsics do exist on ARM, but ARM has
significantly stronger guarantees here. Even then,
efriedma-quic wrote:
I'm not sure messing with the linkage this way will interact well with various
C++ features. In particular, there are various places that check the "language
linkage", which you're not modifying: from the perspective of anything outside
of codegen, these
functions are
@@ -196,12 +196,14 @@ bool AArch64FunctionInfo::needsAsyncDwarfUnwindInfo(
const MachineFunction ) const {
if (!NeedsAsyncDwarfUnwindInfo) {
const Function = MF.getFunction();
+const AArch64FunctionInfo *AFI = MF.getInfo();
// The check got "minsize" is
@@ -214,7 +232,8 @@ declare double @za_shared_callee(double) "aarch64_inout_za"
define double @za_new_caller_to_za_shared_callee(double %x) nounwind noinline
optnone "aarch64_new_za"{
; CHECK-COMMON-LABEL: za_new_caller_to_za_shared_callee:
; CHECK-COMMON: // %bb.0: //
@@ -196,12 +196,14 @@ bool AArch64FunctionInfo::needsAsyncDwarfUnwindInfo(
const MachineFunction ) const {
if (!NeedsAsyncDwarfUnwindInfo) {
const Function = MF.getFunction();
+const AArch64FunctionInfo *AFI = MF.getInfo();
// The check got "minsize" is
@@ -3219,7 +3219,8 @@ void CodeGenModule::EmitVTablesOpportunistically() {
for (const CXXRecordDecl *RD : OpportunisticVTables) {
assert(getVTables().isVTableExternal(RD) &&
"This queue should only contain external vtables");
-if
@@ -6853,6 +6853,13 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) {
if (ES->hasExternalDefinitions(D) == ExternalASTSource::EK_Never)
DI->completeUnusedClass(*CRD);
}
+// If we're emitting a dynamic class from the importable module we're
+//
@@ -6853,6 +6853,13 @@ void CodeGenModule::EmitTopLevelDecl(Decl *D) {
if (ES->hasExternalDefinitions(D) == ExternalASTSource::EK_Never)
DI->completeUnusedClass(*CRD);
}
+// If we're emitting a dynamic class from the importable module we're
+//
@@ -1830,6 +1830,9 @@ void ItaniumCXXABI::emitVTableDefinitions(CodeGenVTables
,
if (VTable->hasInitializer())
return;
+ if (RD->shouldEmitInExternalSource())
+return;
efriedma-quic wrote:
This check seems like it's at the wrong level; if we
https://github.com/efriedma-quic approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/86951
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@@ -4656,14 +4656,14 @@ static void InitCatchParam(CodeGenFunction ,
auto catchRD = CatchType->getAsCXXRecordDecl();
CharUnits caughtExnAlignment = CGF.CGM.getClassPointerAlignment(catchRD);
- llvm::Type *PtrTy = CGF.UnqualPtrTy; // addrspace 0 ok
@@ -8287,6 +8289,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo ,
SDValue InGlue;
if (RequiresSMChange) {
+
+if (Subtarget->hasSVE()) {
efriedma-quic wrote:
Oh, right, there's also that dimension. I'm not sure I understand the
interaction
efriedma-quic wrote:
llvm::PointerType::getUnqual assumes pointers to addr-space 0 are
"unqualified"... but the discussion on #88182 concluded that doesn't make
sense: the "unqualified" address space is a target-specific choice, and
address-space zero isn't required to have any meaning at
@@ -128,6 +128,15 @@ class CodeGenTypes {
/// memory representation is usually i8 or i32, depending on the target.
llvm::Type *ConvertTypeForMem(QualType T, bool ForBitField = false);
+ /// Check that size and abi alignment of given LLVM type matches size and
+ ///
@@ -761,6 +761,10 @@ bool ConstStructBuilder::Build(const InitListExpr *ILE,
bool AllowOverwrite) {
if (Field->hasAttr())
AllowOverwrite = true;
} else {
+ llvm::Type *LoadType = CGM.getTypes().convertTypeForLoadStore(
efriedma-quic
@@ -5348,18 +5348,8 @@ Value *ScalarExprEmitter::VisitVAArgExpr(VAArgExpr *VE) {
return llvm::UndefValue::get(ArgTy);
}
- // FIXME Volatility.
- llvm::Value *Val = Builder.CreateLoad(ArgPtr);
-
- // If EmitVAArg promoted the type, we must truncate it.
- if (ArgTy !=
efriedma-quic wrote:
You're right, we have issues anytime we construct an object directly into the
return value slot, and the check isn't catching all those cases. It shouldn't
really be visible to users unless you're constructing an object using a
non-trivial constructor... but the codegen
@@ -8287,6 +8289,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo ,
SDValue InGlue;
if (RequiresSMChange) {
+
+if (Subtarget->hasSVE()) {
efriedma-quic wrote:
If there's no DWARF unwind, nothing can unwind the stack whether or not we
store
https://github.com/efriedma-quic closed
https://github.com/llvm/llvm-project/pull/91692
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efriedma-quic wrote:
Since nothing should be using preserve_none on aarch64 yet, it's probably fine
to just fix forward.
> I'm not sure under what conditions issues present for this
We only allocate a base pointer under restricted circumstances (primarily,
functions with dynamic allocation),
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,1037 @@
+//===-- ExpandVariadicsPass.cpp *- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -33,6 +33,7 @@ static_library("IPO") {
"DeadArgumentElimination.cpp",
"ElimAvailExtern.cpp",
"EmbedBitcodePass.cpp",
+"ExpandVariadics.cpp",
efriedma-quic wrote:
There's a bot that updates the gn files automatically... so unless you're
https://github.com/efriedma-quic commented:
Left some review comments. Please land
https://github.com/llvm/llvm-project/pull/94083 first.
I agree it makes sense to land this in essentially its current form; it seems
to be the right algorithm.
https://github.com/llvm/llvm-project/pull/93362
https://github.com/efriedma-quic edited
https://github.com/llvm/llvm-project/pull/93362
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https://github.com/llvm/llvm-project/pull/91692
>From 6123b5f43b11f968474baa15623c4bf4d14ed188 Mon Sep 17 00:00:00 2001
From: Eli Friedman
Date: Thu, 9 May 2024 19:40:46 -0700
Subject: [PATCH] [Sema] Fix handling of fields with initializers in nested
https://github.com/efriedma-quic updated
https://github.com/llvm/llvm-project/pull/91692
>From 2e442967c20b930788ac0818b4ce10daf2792f91 Mon Sep 17 00:00:00 2001
From: Eli Friedman
Date: Thu, 9 May 2024 19:40:46 -0700
Subject: [PATCH] [Sema] Fix handling of fields with initializers in nested
efriedma-quic wrote:
X19 is the base register; can we actually allocate arguments in it in general?
This seems hard to fix.
It looks like frame lowering assumes X9 is available; that's probably fixable,
but the code needs to be reworked, I think.
X15 is used on Windows for stack allocation;
@@ -8287,6 +8289,13 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo ,
SDValue InGlue;
if (RequiresSMChange) {
+
+if (Subtarget->hasSVE()) {
efriedma-quic wrote:
There are two different kinds of DWARF "unwind info"; one is the kind that's in
a
https://github.com/efriedma-quic approved this pull request.
https://github.com/llvm/llvm-project/pull/94228
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efriedma-quic wrote:
Ping
https://github.com/llvm/llvm-project/pull/91692
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https://github.com/efriedma-quic created
https://github.com/llvm/llvm-project/pull/94282
The construct has unclear semantics in general, and it's not really interesting
to try to support. So diagnose it.
Some subset of the cases this rejects might be possible to handle, if this
shows up in
https://github.com/efriedma-quic edited
https://github.com/llvm/llvm-project/pull/94228
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@@ -1853,18 +1853,26 @@ static std::string getMangledNameImpl(CodeGenModule
, GlobalDecl GD,
break;
case MultiVersionKind::Target: {
auto *Attr = FD->getAttr();
+assert(Attr &&
+ "Expected TargetAttr to be present for attribute
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efriedma-quic wrote:
> > The correct answer here is probably to fix the sizes in the RecordLayout
> > itself; in particular, the DataSize of the members.
>
> That would be ideal, but also means we'd have to reflect the various C++
> attributes that affect layout in DWARF. Avoiding adding such
@@ -1062,6 +1063,159 @@ CodeGenFunction::emitFlexibleArrayMemberSize(const Expr
*E, unsigned Type,
return Builder.CreateSelect(Cmp, Res, ConstantInt::get(ResType, 0,
IsSigned));
}
+namespace {
+
+class ObjectSizeVisitor
+: public ConstStmtVisitor {
+ bool SkipASE;
+
@@ -761,6 +761,10 @@ bool ConstStructBuilder::Build(const InitListExpr *ILE,
bool AllowOverwrite) {
if (Field->hasAttr())
AllowOverwrite = true;
} else {
+ llvm::Type *LoadType = CGM.getTypes().convertTypeForLoadStore(
efriedma-quic
@@ -2567,16 +2567,16 @@ int main() {
// CHECK3-NEXT:[[I:%.*]] = alloca i32, align 4
// CHECK3-NEXT:[[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
// CHECK3-NEXT:[[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
-// CHECK3-NEXT:
@@ -1062,6 +1063,160 @@ CodeGenFunction::emitFlexibleArrayMemberSize(const Expr
*E, unsigned Type,
return Builder.CreateSelect(Cmp, Res, ConstantInt::get(ResType, 0,
IsSigned));
}
+namespace {
+
+class ObjectSizeVisitor
+: public ConstStmtVisitor {
+ ASTContext
+
@@ -1062,6 +1063,159 @@ CodeGenFunction::emitFlexibleArrayMemberSize(const Expr
*E, unsigned Type,
return Builder.CreateSelect(Cmp, Res, ConstantInt::get(ResType, 0,
IsSigned));
}
+namespace {
+
+class ObjectSizeVisitor
+: public ConstStmtVisitor {
+ bool SkipASE;
+
efriedma-quic wrote:
Please add a table to LangRef comparing the behavior of the three versions of
min/max intrinsics for various inputs.
https://github.com/llvm/llvm-project/pull/93841
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efriedma-quic wrote:
I'm skeptical it's correct to skip all the assertions like this; the assertions
are there to ensure the layout of the LLVM IR type matches the layout provided
by the RecordLayout. If the LLVM IR layout is wrong, address-related
computations will be wrong, and ultimately
@@ -5348,18 +5348,8 @@ Value *ScalarExprEmitter::VisitVAArgExpr(VAArgExpr *VE) {
return llvm::UndefValue::get(ArgTy);
}
- // FIXME Volatility.
- llvm::Value *Val = Builder.CreateLoad(ArgPtr);
-
- // If EmitVAArg promoted the type, we must truncate it.
- if (ArgTy !=
@@ -743,6 +743,20 @@ bool Sema::checkMustTailAttr(const Stmt *St, const Attr
) {
CallerType.Func = CallerDecl->getType()->getAs();
}
+ if (Context.getTargetInfo().getTriple().isPPC()) {
+if (Context.getTargetInfo().getTriple().isOSAIX())
+ return
@@ -761,6 +761,10 @@ bool ConstStructBuilder::Build(const InitListExpr *ILE,
bool AllowOverwrite) {
if (Field->hasAttr())
AllowOverwrite = true;
} else {
+ llvm::Type *LoadType = CGM.getTypes().convertTypeForLoadStore(
efriedma-quic
@@ -436,9 +436,9 @@ class ScalarExprEmitter
if (Value *Result = ConstantEmitter(CGF).tryEmitConstantExpr(E)) {
if (E->isGLValue())
-return CGF.Builder.CreateLoad(Address(
-Result, CGF.ConvertTypeForMem(E->getType()),
-
@@ -128,6 +128,15 @@ class CodeGenTypes {
/// memory representation is usually i8 or i32, depending on the target.
llvm::Type *ConvertTypeForMem(QualType T, bool ForBitField = false);
+ /// Check that size and abi alignment of given LLVM type matches size and
+ ///
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