Am 21.08.2017 um 22:48 schrieb Felix Kuehling:
On 2017-08-21 12:00 PM, Alex Deucher wrote:
We need a larger gart for asics that do not support GPUVM on all
engines (e.g., MM) to make sure we have enough space for all
gtt buffers in physical mode. Change the default size based on
the asic type.
Am 21.08.2017 um 22:06 schrieb Felix Kuehling:
On 2017-08-21 03:21 PM, Oded Gabbay wrote:
On Mon, Aug 21, 2017 at 8:39 PM, Jerome Glisse wrote:
On Tue, Aug 15, 2017 at 11:00:20PM -0400, Felix Kuehling wrote:
From: Moses Reuben
v2:
* Renamed ALLOC_MEMORY_OF_SCRATCH to SET_SCRATCH_BACKING_VA
Am 22.08.2017 um 04:37 schrieb zhoucm1:
On 2017年08月21日 20:58, Christian König wrote:
From: Christian König
When a process is killed we shouldn't submit all waiting jobs, but
instead
clean up as fast as possible.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/scheduler/gpu_sched
On 2017年08月22日 16:55, Christian König wrote:
Am 22.08.2017 um 04:37 schrieb zhoucm1:
On 2017年08月21日 20:58, Christian König wrote:
From: Christian König
When a process is killed we shouldn't submit all waiting jobs, but
instead
clean up as fast as possible.
Signed-off-by: Christian Köni
From: Martin Peres
Despite all the careful planning of the kernel, a link may become
insufficient to handle the currently-set mode. At this point, the
kernel should mark this particular configuration as being broken
and potentially prune the mode before setting the offending connector's
link-stat
ping? Haven't seen any comments on amd-gfx or dri-devel.
Cheers,
Tom
On 18/08/17 10:07 AM, Tom St Denis wrote:
These functions replace a section of common code found
in radeon/amdgpu drivers (and possibly others) as part
of the ttm_tt_*populate() callbacks.
Signed-off-by: Tom St Denis
---
Reviewed-by: Christian König for this one as
well as the two patches for radeon and amdgpu.
Feel free to also add my Acked-by to the nouveau patch.
Regards,
Christian.
Am 22.08.2017 um 13:13 schrieb Tom St Denis:
ping? Haven't seen any comments on amd-gfx or dri-devel.
Cheers,
Tom
On 18/0
We'll need this for a some upcoming display changes
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/include/atomfirmware.h | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h
b/drivers/gpu/drm/amd/include/atomf
On Tue, Aug 22, 2017 at 9:35 AM, Harry Wentland wrote:
> We'll need this for a some upcoming display changes
>
> Signed-off-by: Harry Wentland
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/include/atomfirmware.h | 19 ++-
> 1 file changed, 18 insertions(+), 1 deletion(
On 2017-08-22 05:48 AM, Michel Dänzer wrote:
> From: Martin Peres
>
> Despite all the careful planning of the kernel, a link may become
> insufficient to handle the currently-set mode. At this point, the
> kernel should mark this particular configuration as being broken
> and potentially prune th
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Tuesday, August 22, 2017 5:48 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-amdgpu] modesetting: re-set the crtc's mode
> when link-status goes BAD
From: Michel Dänzer
Sent: Tuesday, August 22, 2017 1:52 AM
To: Abramov, Slava
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH xf86-video-amdgpu 04/10] Create
drmmode_crtc_wait_pending_event helper macro
On 18/08/17 11:51 PM, Abramov, Slava wrote:
> *From:* amd-gfx on behalf of
>
>> diff
Because nobody reacted on the bug report, I'm trying this way.
As mentioned in https://bugzilla.kernel.org/show_bug.cgi?id=196337, my
system gets unusable with GFX_PG enabled, cause X doesn't start anymore.
___
amd-gfx mailing list
amd-gfx@lists.freedes
Be more explicit and add comments explaining each case.
Also s/gart/GART/ in the parameter string as per Felix'
suggestion.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 38 +++-
2 files ch
Move the asic specific code into the IP modules.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 52
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.h | 1 -
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c| 19 +++-
drivers/gpu/drm/amd/amdgpu
On 22/08/17 12:20 PM, Johannes Hirte wrote:
Because nobody reacted on the bug report, I'm trying this way.
As mentioned in https://bugzilla.kernel.org/show_bug.cgi?id=196337, my
system gets unusable with GFX_PG enabled, cause X doesn't start anymore.
Hi Johannes,
Sorry nobody replied. On my
The series is Reviewed-by: Felix Kuehling
On 2017-08-22 01:09 PM, Alex Deucher wrote:
> Move the asic specific code into the IP modules.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 52
>
> drivers/gpu/drm/amd/amdgpu/amdgp
On 2017-08-22 04:52 AM, Christian König wrote:
>> BTW, on Vega10 the way scratch works has been changed, and this ioctl
>> becomes basically a no-op. The SH_HIDDEN_PRIVATE_BASE_VMID register no
>> longer exists. Instead the base address is now provided to the shader
>> directly without being progr
Reviewed-by: Christian König for the series
as well.
Am 22.08.2017 um 20:17 schrieb Felix Kuehling:
The series is Reviewed-by: Felix Kuehling
On 2017-08-22 01:09 PM, Alex Deucher wrote:
Move the asic specific code into the IP modules.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd
This is partly to silence a static checker warning:
drivers/gpu/drm/amd/amdgpu/ci_dpm.c:4553 ci_set_mc_special_registers()
error: buffer overflow 'table->mc_reg_address' 16 <= 16
The story is that it's valid to exit the loop with "j" less than or equal
to SMU7_DISCRETE_MC_REGISTER_ARRAY_S
This is partly to silence a static checker warning:
drivers/gpu/drm/amd/amdgpu/ci_dpm.c:4553 ci_set_mc_special_registers()
error: buffer overflow 'table->mc_reg_address' 16 <= 16
The story is that it's valid to exit the loop with "j" less than or equal
to SMU7_DISCRETE_MC_REGISTER_ARRAY_S
KIQ doesn't really use the GPU scheduler. The base
drivers generally use the KIQ ring directly rather than
submitting IBs. However, amdgpu_sched_hw_submission
(which defaults to 2) limits the number of outstanding
fences to 2. KFD uses the KIQ for TLB flushes and the
2 fence limit hurts performa
Thanks Alex!
Jay, do you think this is enough? This bumps the number of concurrent
operations on KIQ to 4 by default.
Regards,
Felix
On 2017-08-22 04:49 PM, Alex Deucher wrote:
> KIQ doesn't really use the GPU scheduler. The base
> drivers generally use the KIQ ring directly rather than
> su
Hi Alex,
See below comment about coding style of 80 characters per line.
Thanks,
Alex Bin Xie
From: amd-gfx on behalf of Alex Deucher
Sent: Tuesday, August 22, 2017 4:49 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu
On Tue, Aug 22, 2017, at 16:17, Felix Kuehling wrote:
> Thanks Alex!
>
> Jay, do you think this is enough? This bumps the number of concurrent
> operations on KIQ to 4 by default.
I'm not sure what the best number is. Up to 8 KFD processes is common
(beyond that performance drops off due to VMID
KIQ doesn't really use the GPU scheduler. The base
drivers generally use the KIQ ring directly rather than
submitting IBs. However, amdgpu_sched_hw_submission
(which defaults to 2) limits the number of outstanding
fences to 2. KFD uses the KIQ for TLB flushes and the
2 fence limit hurts performa
Change-Id: If1df87cf4a458d59ce2545a813c4594118fa4c3d
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 11 ---
drivers/gpu/drm/amd/powerplay/inc/smu9_driver_if.h | 6 --
2 files changed, 12 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/am
This change is Reviewed-by: Felix Kuehling
On 2017-08-22 09:52 PM, Alex Deucher wrote:
> KIQ doesn't really use the GPU scheduler. The base
> drivers generally use the KIQ ring directly rather than
> submitting IBs. However, amdgpu_sched_hw_submission
> (which defaults to 2) limits the number
> -Original Message-
> From: Evan Quan [mailto:evan.q...@amd.com]
> Sent: Tuesday, August 22, 2017 9:59 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander; Quan, Evan
> Subject: [PATCH] drm/amd/powerplay: ACG frequency added in PPTable
>
> Change-Id: If1df87cf4a458d59ce2545a81
On 08/21/2017 07:58 AM, Christian König wrote:
> From: Christian König
>
> When a process is killed we shouldn't submit all waiting jobs, but instead
> clean up as fast as possible.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 23 +
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