[AMD Official Use Only - Internal Distribution Only]
Enable VCN 3.0 PG and CG for Vangogh by setting up flags.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/nv.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
On 2020-10-15 11:02 p.m., Alex Deucher wrote:
On Wed, Oct 14, 2020 at 1:25 PM Andrey Grodzovsky
wrote:
On connector destruction call drm_dp_mst_topology_mgr_destroy
to release resources allocated in drm_dp_mst_topology_mgr_init.
Do it only if MST manager was initialized before otherwsie a
On Fri, Oct 16, 2020 at 5:21 AM Prike Liang wrote:
>
> The new amdgpu_gfx_state_change_set() funtion can support set GFX power
> change status to D0/D3.
>
> Signed-off-by: Prike Liang
> Acked-by: Huang Rui
> Reviewed-by: Alex Deucher
I presume we'll need something similar for renoir? That
Sienna Cichlid and newer have a hw fix so no longer require
the workaround.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
Avoids confusion in configurations.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 -
drivers/gpu/drm/amd/display/Kconfig | 27 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 60 +++
It's unused and identical to dal_cmd_tbl_helper_dce112_get_table2.
Signed-off-by: Alex Deucher
---
.../dce112/command_table_helper2_dce112.c | 40 ---
.../dce112/command_table_helper2_dce112.h | 3 --
2 files changed, 43 deletions(-)
diff --git
Not needed.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/include/atomfirmware.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h
b/drivers/gpu/drm/amd/include/atomfirmware.h
index 4eb578b1baef..6139d10f4289 100644
---
No need for a separate config option at this point.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/Kconfig | 8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 --
drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 2 --
Am 2020-10-16 um 10:20 a.m. schrieb Alex Deucher:
> Add a helper so we can set per asic default values. Also,
> the module parameter is currently clamped to 8, but clamp it
> per asic just in case some asics have different limits in the
> future. Enable the option on gfx6,7 as well for
Am 2020-10-16 um 11:34 a.m. schrieb Nirmoy Das:
> Compute queues are configurable with module param, num_kcq.
> amdgpu_gfx_is_high_priority_compute_queue was setting 1st 4 queues to
> high priority queue leaving a null drm scheduler in
> adev->gpu_sched[hw_ip]["normal_prio"].sched if num_kcq < 5
Compute queues are configurable with module param, num_kcq.
amdgpu_gfx_is_high_priority_compute_queue was setting 1st 4 queues to
high priority queue leaving a null drm scheduler in
adev->gpu_sched[hw_ip]["normal_prio"].sched if num_kcq < 5
Fixes: 33abcb1f5a1719b1c (drm/amdgpu: set compute queue
[AMD Public Use]
Reviewed-by: Alex Deucher
Want to add a Fixes: tag?
From: amd-gfx on behalf of Andrey
Grodzovsky
Sent: Friday, October 16, 2020 10:52 AM
To: amd-gfx@lists.freedesktop.org
Cc: Grodzovsky, Andrey ; Zhang, Jack (Jian)
Subject: [PATCH]
Acked-by: Nirmoy Das
On 10/16/20 4:20 PM, Alex Deucher wrote:
Add a helper so we can set per asic default values. Also,
the module parameter is currently clamped to 8, but clamp it
per asic just in case some asics have different limits in the
future. Enable the option on gfx6,7 as well for
psp sysfs not cleaned up on driver unload for sienna_cichlid
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
On 10/16/20 3:56 PM, Alex Deucher wrote:
On Wed, Oct 14, 2020 at 9:53 AM Nirmoy Das wrote:
Because of firmware bug, Raven asics can't handle jobs
scheduled to multiple compute queues. So enable only one
compute queue till we have a firmware fix.
Signed-off-by: Nirmoy Das
---
Add a helper so we can set per asic default values. Also,
the module parameter is currently clamped to 8, but clamp it
per asic just in case some asics have different limits in the
future. Enable the option on gfx6,7 as well for consistency.
Signed-off-by: Alex Deucher
---
On Wed, Oct 14, 2020 at 9:53 AM Nirmoy Das wrote:
>
> Because of firmware bug, Raven asics can't handle jobs
> scheduled to multiple compute queues. So enable only one
> compute queue till we have a firmware fix.
>
> Signed-off-by: Nirmoy Das
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 4
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Jiansong Chen
Sent: Friday, October 16, 2020 20:51
To: amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Zhang, Hawking ;
Chen, Jiansong (Simon)
Subject: [PATCH] drm/amd/pm: drop navy_flounder
Drop navy_flounder hardcode of using soft pptable, so that it
can use pptable from vbios when available.
Signed-off-by: Jiansong Chen
Change-Id: I33436b023d03ae77a1b92da5a8062e8466e80110
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 1 -
1 file changed, 1 deletion(-)
diff --git
On Fri, Oct 16, 2020 at 02:19:42PM +0200, Thomas Zimmermann wrote:
> Hi
>
> On Fri, 16 Oct 2020 14:03:47 +0200 Sam Ravnborg wrote:
>
> > Hi Thomas.
> >
> > On Thu, Oct 15, 2020 at 02:38:06PM +0200, Thomas Zimmermann wrote:
> > > At least sparc64 requires I/O-specific access to framebuffers.
Am 16.10.20 um 14:33 schrieb Madhav Chauhan:
2MB area is reserved at top inside VM.
Suggested-by: Christian König
Signed-off-by: Madhav Chauhan
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 10 ++
1 file changed, 10 insertions(+)
diff --git
2MB area is reserved at top inside VM.
Suggested-by: Christian König
Signed-off-by: Madhav Chauhan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
Hi
On Fri, 16 Oct 2020 14:03:47 +0200 Sam Ravnborg wrote:
> Hi Thomas.
>
> On Thu, Oct 15, 2020 at 02:38:06PM +0200, Thomas Zimmermann wrote:
> > At least sparc64 requires I/O-specific access to framebuffers. This
> > patch updates the fbdev console accordingly.
> >
> > For drivers with
Hi Thomas.
On Thu, Oct 15, 2020 at 02:38:06PM +0200, Thomas Zimmermann wrote:
> At least sparc64 requires I/O-specific access to framebuffers. This
> patch updates the fbdev console accordingly.
>
> For drivers with direct access to the framebuffer memory, the callback
> functions in struct
Hi
On Fri, 16 Oct 2020 12:58:54 +0200 Sam Ravnborg wrote:
> Hi Thomas.
>
> On Thu, Oct 15, 2020 at 02:38:06PM +0200, Thomas Zimmermann wrote:
> > At least sparc64 requires I/O-specific access to framebuffers. This
> > patch updates the fbdev console accordingly.
> >
> > For drivers with
Hi Thomas.
On Thu, Oct 15, 2020 at 02:38:05PM +0200, Thomas Zimmermann wrote:
> To do framebuffer updates, one needs memcpy from system memory and a
> pointer-increment function. Add both interfaces with documentation.
>
> Signed-off-by: Thomas Zimmermann
> ---
> include/linux/dma-buf-map.h |
Am 16.10.20 um 12:55 schrieb Mihir Patel:
From: Mihir Bhogilal Patel
Add a new list in VM for done state i.e. BOs which are
invalidated and updated in PTEs.
Signed-off-by: Mihir Bhogilal Patel
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 19
Hi Thomas.
On Thu, Oct 15, 2020 at 02:38:06PM +0200, Thomas Zimmermann wrote:
> At least sparc64 requires I/O-specific access to framebuffers. This
> patch updates the fbdev console accordingly.
>
> For drivers with direct access to the framebuffer memory, the callback
> functions in struct
From: Mihir Bhogilal Patel
Add a new list in VM for done state i.e. BOs which are
invalidated and updated in PTEs.
Signed-off-by: Mihir Bhogilal Patel
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 19 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 3 +++
2 files changed, 19
Hi Sam
On Fri, 16 Oct 2020 12:08:54 +0200 Sam Ravnborg wrote:
> Hi Thomas.
>
> On Thu, Oct 15, 2020 at 02:38:05PM +0200, Thomas Zimmermann wrote:
> > To do framebuffer updates, one needs memcpy from system memory and a
> > pointer-increment function. Add both interfaces with documentation.
> >
Hi Thomas.
On Thu, Oct 15, 2020 at 02:38:05PM +0200, Thomas Zimmermann wrote:
> To do framebuffer updates, one needs memcpy from system memory and a
> pointer-increment function. Add both interfaces with documentation.
>
> Signed-off-by: Thomas Zimmermann
Looks good.
Reviewed-by: Sam Ravnborg
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Kenneth Feng
-Original Message-
From: Wang, Kevin(Yang)
Sent: Friday, October 16, 2020 5:07 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Feng, Kenneth
; Lazar, Lijo ; Wang, Kevin(Yang)
Subject: [PATCH]
Am 15.10.20 um 19:52 schrieb Thomas Zimmermann:
Hi
On Thu, 15 Oct 2020 18:49:09 +0200 Daniel Vetter wrote:
On Thu, Oct 15, 2020 at 04:08:13PM +0200, Christian König wrote:
Am 15.10.20 um 14:38 schrieb Thomas Zimmermann:
The new functions ttm_bo_{vmap,vunmap}() map and unmap a TTM BO in
- Need skip the RLC/CP/GFX disable for let GFXOFF enter during suspend period.
- For s0i3 suspend only need suspend DCE and each IP interrupt.
- Before VBIOS POSTed check and atom HW INT need set the GPU power status change
to D0 in the resume period, otherwise the HW will be mess up and see the
update amdgpu device suspend sequence for gpu reset during s0i3 enable.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
add amdgpu_acpi_is_s0ix_supported() to check the platform
whether support s0i3.
Signed-off-by: Prike Liang
Reviewed-by: Alex Deucher
Acked-by: Huang Rui
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 14 ++
2 files changed, 16
The new amdgpu_gfx_state_change_set() funtion can support set GFX power
change status to D0/D3.
Signed-off-by: Prike Liang
Acked-by: Huang Rui
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 20
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
1.
when smc feature bit isn't mapped,
the feature state isn't showed on sysfs node of pp_features.
2.
add pp_features table title
Signed-off-by: Kevin Wang
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 27 --
1 file changed, 17 insertions(+), 10 deletions(-)
diff --git
open smu ip block meets with one-vf mode need
Signed-off-by: Jane Jian
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 4b1a4acb60d9..ef52d46b1458 100644
---
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