It is to workaround HW bug on other Asics and based on
reverting two commits:
drm/amdkfd: Add heavy-weight TLB flush after unmapping
drm/amdkfd: Add memory sync before TLB flush on unmap
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 37 +---
1
From: Felix Kuehling
The thunk needs to mmap all BOs for CPU access to allow the debugger to
access them. Invisible ones are mapped with PROT_NONE.
Fixes: 71df0368e9b6 ("drm/amdgpu: Implement mmap as GEM object function")
Signed-off-by: Felix Kuehling
Signed-off-by: Alex Deucher
---
From: Felix Kuehling
KFD Thunk maps invisible VRAM BOs with PROT_NONE, MAP_PRIVATE.
is_cow_mapping returns true for these mappings. Add a check for
vm_flags & VM_WRITE to avoid mmap failures on private read-only or
PROT_NONE mappings.
Fixes: f91142c62161 ("drm/ttm: nuke VM_MIXEDMAP on BO
Update Arcturus/Aldebaran thermal throttle SMI event path to use
ASIC-independent throttler bits when logging.
Signed-off-by: Graham Sider
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 4 ++--
drivers/gpu/drm/amd/amdkfd/kfd_device.c| 2 +-
On platforms that support multiple backlights, register
each one separately. This lets us manage them independently
rather than registering a single backlight and applying the
same settings to both.
Signed-off-by: Alex Deucher
---
Does anyone have a multi-eDP board to test this?
[Public]
+ if (tmp & INTERFACE_NOT_ENABLED_FLAG)
+ error_type = RLCG_INTERFACE_NOT_ENABLED;
+ if (tmp & WRONG_OPERATION_TYPE_FLAG)
+ error_type = RLCG_WRONG_OPERATION_TYPE;
+
On 2021-06-29 12:36 p.m., Michel Dänzer wrote:
> On 2021-06-28 7:16 p.m., Deucher, Alexander wrote:
>>
>> Thanks for narrowing this down. There is new PCO SDMA firmware available
>> (attached). Can you try it?
>
> Sure, I'll try it, thanks.
So far, so good; no hang in a week. I'll try the
[Public]
Please fix the // comment style before submitting and modify commit message as
'VF FLR'
Reviewed-by: Lijo Lazar
-Original Message-
From: amd-gfx On Behalf Of Peng Ju Zhou
Sent: Wednesday, July 7, 2021 10:47 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily
Subject:
[AMD Official Use Only]
Ping
-Original Message-
From: Roy Sun
Sent: Wednesday, July 7, 2021 4:11 PM
To: amd-gfx@lists.freedesktop.org
Cc: Sun, Roy
Subject: [PATCH] drm/amdgpu: change the imprecise function name
The callback functions are used for SRIOV read/write instead of just for
Signed-off-by: Roy Sun
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index bc4347a72301..2ec5b973a888 100644
---
[Public]
+ {24, 8, 2, 18}, {15, 31, 5, 21},
+ {19, 3, 9, 25}, {28, 12, 6, 22},
The coding style should be corrected. With this fixed, the patch is:
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of
[AMD Official Use Only]
Reviewed-by: John Clements
-Original Message-
From: Stanley.Yang
Sent: Thursday, July 8, 2021 11:28 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Hawking
; Clements, John ; Clements, John
; Yang, Stanley
Subject: [PATCH Review 1/1]
From: John Clements
support umc ras function initialization for aldebaran
Change-Id: I84155d4d3eaae86a8c1bd2331b1964946c47f6da
Signed-off-by: John Clements
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 13 +
drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 15
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