Hey Alex,
Agree, we are moving it above, Christian also had the same feedback.
- Shashank
On 2/4/2022 7:44 PM, Deucher, Alexander wrote:
[Public]
Seems like this functionality should be moved up into the callers.
Maybe add new IP callbacks (dump_reset_registers()) so that each IP can
From: Oliver Logush
[why]
To get the the cyan_skillfish check working
Reviewed-by: Charlene Liu
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Oliver Logush
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +--
From: Martin Tsai
[Why]
The link encoder mapping could return a null one and causes system crash.
[How]
Let the mapping can get an available link encoder without endpoint
identification check.
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Martin Tsai
---
From: Paul Hsieh
[Why]
VBIOS light up eDP with 6bpc but driver use 8bpc without
disable valid stream then re-enable valid stream. Some
panels can't runtime change color depth.
[How]
Change fastboot timing validation function. Not only check
LANE_COUNT, LINK_RATE...etc
Reviewed-by: Anthony Koo
From: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Jasdeep Dhillon
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
From: Aric Cyr
This version brings along the following fixes:
-fix for build failure uninitalized error
-Bug fix for DP2 using uncertified cable
-limit unbounded request to 5k
-fix DP LT sequence on EQ fail
-Bug fixes for S3/S4
Acked-by: Jasdeep Dhillon
Signed-off-by: Aric Cyr
---
From: Ilya
[Why]
The number of lanes wasn't being reset to maximum when reducing link
rate due to an EQ failure. This could result in having fewer lanes in
the verified link capabilities, a lower maximum link bandwidth, and
fewer modes being supported.
[How]
Reset the number of lanes to max
From: Dmytro Laktyushkin
Fix clamping to match register field size
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Dmytro Laktyushkin
---
.../drm/amd/display/dc/dcn31/dcn31_hubbub.c | 61 ++-
1 file changed, 32 insertions(+), 29 deletions(-)
diff --git
From: Dmytro Laktyushkin
Unbounded requesting is unsupported on pipe split modes
and this change prevents us running into such a situation
with wide modes.
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Dmytro Laktyushkin
---
From: Zhan Liu
[Why]
Even if can_apply_edp_fast_boot is set to 1 at boot, this flag will
be cleared to 0 at S3 resume.
[How]
Keep eDP Vdd on when eDP stream is already enabled.
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Zhan Liu
---
From: "Guo, Bing"
Why:
When resume from sleep or hiberation, blocked MST Topology discovery might
need to be used.
How:
Added "DETECT_REASON_RESUMEFROMS3S4" to enum dc_detect_reason; use it to
require blocked MST Topology discovery.
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
From: Eric Bernstein
[Why]
Build failure due to ‘status’ may be used uninitialized
[How]
Initialize status to LINK_TRAINING_SUCCESS
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed,
From: Eric Bernstein
remove static from optc31_set_drr
Reviewed-by: Nevenko Stupar
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.h | 2 ++
2 files changed, 3
From: Nicholas Kazlauskas
[Why]
Found when running igt@kms_atomic.
Userspace attempts to do a TEST_COMMIT when 0 streams which calls
dc_remove_stream_from_ctx. This in turn calls link_enc_unassign
which ends up modifying stream->link = NULL directly, causing the
global link_enc to be removed
This DC patchset brings improvements in multiple areas. In summary, we have:
-fix for build failure uninitalized error
-Bug fix for DP2 using uncertified cable
-limit unbounded request to 5k
-fix DP LT sequence on EQ fail
-Bug fixes for S3/S4
Anthony Koo (1):
drm/amd/display: [FW Promotion]
From: Oliver Logush
Signed-off-by: Oliver Logush
---
drivers/gpu/drm/amd/display/include/dal_asic_id.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
index
From: Anthony Koo
Reviewed-by: Aric Cyr
Acked-by: Jasdeep Dhillon
Signed-off-by: Anthony Koo
---
drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
From: Martin Tsai
[Why]
The link encoder mapping could return a null one and causes system crash.
[How]
Let the mapping can get an available link encoder without endpoint
identification check.
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Martin Tsai
---
From: Aric Cyr
This version brings along the following fixes:
-fix for build failure uninitalized error
-Bug fix for DP2 using uncertified cable
-limit unbounded request to 5k
-fix DP LT sequence on EQ fail
-Bug fixes for S3/S4
Acked-by: Jasdeep Dhillon
Signed-off-by: Aric Cyr
---
From: Zhan Liu
[Why]
Even if can_apply_edp_fast_boot is set to 1 at boot, this flag will
be cleared to 0 at S3 resume.
[How]
Keep eDP Vdd on when eDP stream is already enabled.
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Zhan Liu
---
From: Ilya
[Why]
The number of lanes wasn't being reset to maximum when reducing link
rate due to an EQ failure. This could result in having fewer lanes in
the verified link capabilities, a lower maximum link bandwidth, and
fewer modes being supported.
[How]
Reset the number of lanes to max
From: Paul Hsieh
[Why]
VBIOS light up eDP with 6bpc but driver use 8bpc without
disable valid stream then re-enable valid stream. Some
panels can't runtime change color depth.
[How]
Change fastboot timing validation function. Not only check
LANE_COUNT, LINK_RATE...etc
Reviewed-by: Anthony Koo
From: "Guo, Bing"
Why:
When resume from sleep or hiberation, blocked MST Topology discovery might
need to be used.
How:
Added "DETECT_REASON_RESUMEFROMS3S4" to enum dc_detect_reason; use it to
require blocked MST Topology discovery.
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
From: Dmytro Laktyushkin
Fix clamping to match register field size
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Dmytro Laktyushkin
---
.../drm/amd/display/dc/dcn31/dcn31_hubbub.c | 61 ++-
1 file changed, 32 insertions(+), 29 deletions(-)
diff --git
From: Dmytro Laktyushkin
Unbounded requesting is unsupported on pipe split modes
and this change prevents us running into such a situation
with wide modes.
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Dmytro Laktyushkin
---
From: Eric Bernstein
remove static from optc31_set_drr
Reviewed-by: Nevenko Stupar
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.h | 2 ++
2 files changed, 3
From: Oliver Logush
[why]
To get the the cyan_skillfish check working
Reviewed-by: Charlene Liu
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Oliver Logush
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +--
From: Nicholas Kazlauskas
[Why]
Found when running igt@kms_atomic.
Userspace attempts to do a TEST_COMMIT when 0 streams which calls
dc_remove_stream_from_ctx. This in turn calls link_enc_unassign
which ends up modifying stream->link = NULL directly, causing the
global link_enc to be removed
From: Eric Bernstein
[Why]
Build failure due to ‘status’ may be used uninitialized
[How]
Initialize status to LINK_TRAINING_SUCCESS
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed,
This DC patchset brings improvements in multiple areas. In summary, we have:
-fix for build failure uninitalized error
-Bug fix for DP2 using uncertified cable
-limit unbounded request to 5k
-fix DP LT sequence on EQ fail
-Bug fixes for S3/S4
Anthony Koo (1):
drm/amd/display: [FW Promotion]
Cleanup the kfd code by removing the unused old debugger
implementation.
Only a small piece of resetting wavefronts is kept and
is moved to kfd_device_queue_manager.c
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdkfd/Makefile | 2 -
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
A few MQD manager functions are duplicated for all versions of
MQD manager. Remove this duplication by moving the common
functions into kfd_mqd_manager.c file.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c | 63 +
With no HWS, TLB flushing will not work in SVM code.
Fix this by calling kfd_flush_tlb() which works for both
HWS and no HWS case.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git
On Sun, Jan 16, 2022 at 2:44 AM Tareque Md.Hanif
wrote:
>
> Hi Hsin-Yi,
>
> The issue still exists. I reverted a19f75de73c220b4496d2aefb7a605dd032f7c01
> (the commit that reverted 5a7b95fb993ec399c8a685552aa6a8fc995c40bd) and
> manually applied the patch (tags/v5.16). journalctl attached.
hi
On 2/4/2022 1:50 PM, Christian König wrote:
Am 04.02.22 um 19:47 schrieb Bhardwaj, Rajneesh:
On 2/4/2022 1:32 PM, Christian König wrote:
Am 04.02.22 um 19:12 schrieb Bhardwaj, Rajneesh:
[Sorry for top posting]
Hi Christian
I think you forgot the below hunk, without which the issue is not
From: Dmytro Laktyushkin
Unbounded requesting is unsupported on pipe split modes
and this change prevents us running into such a situation
with wide modes.
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Dmytro Laktyushkin
---
From: Oliver Logush
[why]
To get the the cyan_skillfish check working
Reviewed-by: Charlene Liu
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Oliver Logush
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +--
From: Eric Bernstein
remove static from optc31_set_drr
Reviewed-by: Nevenko Stupar
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.h | 2 ++
2 files changed, 3
From: Nicholas Kazlauskas
[Why]
Found when running igt@kms_atomic.
Userspace attempts to do a TEST_COMMIT when 0 streams which calls
dc_remove_stream_from_ctx. This in turn calls link_enc_unassign
which ends up modifying stream->link = NULL directly, causing the
global link_enc to be removed
This DC patchset brings improvements in multiple areas. In summary, we have:
-fix for build failure uninitalized error
-Bug fix for DP2 using uncertified cable
-limit unbounded request to 5k
-fix DP LT sequence on EQ fail
-Bug fixes for S3/S4
Anthony Koo (1):
drm/amd/display: [FW Promotion]
From: Eric Bernstein
[Why]
Build failure due to ‘status’ may be used uninitialized
[How]
Initialize status to LINK_TRAINING_SUCCESS
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed,
On Fri, Feb 4, 2022 at 1:56 PM Luben Tuikov wrote:
>
> On 2022-02-04 13:53, Alex Deucher wrote:
> > On Fri, Feb 4, 2022 at 1:48 PM Luben Tuikov wrote:
> >>
> >> The FRU and RAS EEPROMs share the same I2C bus on Aldebaran and Vega 20
> >> ASICs. Set the FRU bus "pointer" to this single bus, as
On 2022-02-04 13:53, Alex Deucher wrote:
> On Fri, Feb 4, 2022 at 1:48 PM Luben Tuikov wrote:
>>
>> The FRU and RAS EEPROMs share the same I2C bus on Aldebaran and Vega 20
>> ASICs. Set the FRU bus "pointer" to this single bus, as access to the FRU
>> is sought through that bus "pointer" and not
On Fri, Feb 4, 2022 at 1:48 PM Luben Tuikov wrote:
>
> The FRU and RAS EEPROMs share the same I2C bus on Aldebaran and Vega 20
> ASICs. Set the FRU bus "pointer" to this single bus, as access to the FRU
> is sought through that bus "pointer" and not through the RAS bus "pointer".
>
> Cc: Roy Sun
Am 04.02.22 um 19:47 schrieb Bhardwaj, Rajneesh:
On 2/4/2022 1:32 PM, Christian König wrote:
Am 04.02.22 um 19:12 schrieb Bhardwaj, Rajneesh:
[Sorry for top posting]
Hi Christian
I think you forgot the below hunk, without which the issue is not
fixed completely on a multi GPU system.
No,
The FRU and RAS EEPROMs share the same I2C bus on Aldebaran and Vega 20
ASICs. Set the FRU bus "pointer" to this single bus, as access to the FRU
is sought through that bus "pointer" and not through the RAS bus "pointer".
Cc: Roy Sun
Cc: Alex Deucher
Fixes: 9c6d2ba7057abb ("drm/amd: Expose the
On 2/4/2022 1:32 PM, Christian König wrote:
Am 04.02.22 um 19:12 schrieb Bhardwaj, Rajneesh:
[Sorry for top posting]
Hi Christian
I think you forgot the below hunk, without which the issue is not
fixed completely on a multi GPU system.
No, that is perfectly intentional. While removing a
[Public]
Seems like this functionality should be moved up into the callers. Maybe add
new IP callbacks (dump_reset_registers()) so that each IP can specify what
registers are relevant for a reset debugging and then we can walk the IP list
and call the callback before we call the asic_reset
From: Eric Bernstein
remove static from optc31_set_drr
Reviewed-by: Nevenko Stupar
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.h | 2 ++
2 files changed, 3
From: Oliver Logush
[why]
To get the the cyan_skillfish check working
Reviewed-by: Charlene Liu
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Oliver Logush
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +--
From: Dmytro Laktyushkin
Unbounded requesting is unsupported on pipe split modes
and this change prevents us running into such a situation
with wide modes.
Reviewed-by: Charlene Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Dmytro Laktyushkin
---
From: Nicholas Kazlauskas
[Why]
Found when running igt@kms_atomic.
Userspace attempts to do a TEST_COMMIT when 0 streams which calls
dc_remove_stream_from_ctx. This in turn calls link_enc_unassign
which ends up modifying stream->link = NULL directly, causing the
global link_enc to be removed
From: Eric Bernstein
[Why]
Build failure due to ‘status’ may be used uninitialized
[How]
Initialize status to LINK_TRAINING_SUCCESS
Reviewed-by: Wenjing Liu
Acked-by: Jasdeep Dhillon
Signed-off-by: Eric Bernstein
---
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
1 file changed,
This DC patchset brings improvements in multiple areas. In summary, we have:
-fix for build failure uninitalized error
-Bug fix for DP2 using uncertified cable
-limit unbounded request to 5k
-fix DP LT sequence on EQ fail
-Bug fixes for S3/S4
Anthony Koo (1):
drm/amd/display: [FW Promotion]
[Public]
In the suspend and hibernate cases, we don't care. In most cases the power
rail will be cut once the system enters suspend so it doesn't really matter.
That's why we call the asic reset callback directly rather than going through
the whole recovery process. The device is already
Am 04.02.22 um 19:12 schrieb Bhardwaj, Rajneesh:
[Sorry for top posting]
Hi Christian
I think you forgot the below hunk, without which the issue is not
fixed completely on a multi GPU system.
No, that is perfectly intentional. While removing a bo_va structure it
can happen that there are
[Sorry for top posting]
Hi Christian
I think you forgot the below hunk, without which the issue is not fixed
completely on a multi GPU system.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index dcc80d6e099e..6f68fc9da56a 100644
---
The 2022 X.Org Foundation elections are rapidly approaching. We will be
forwarding instructions on the nomination process to membership in the
near future.
Please note that only current members can vote in the upcoming election,
and that the deadline for new memberships or renewals to vote in the
On 2/4/2022 6:20 PM, Lazar, Lijo wrote:
[AMD Official Use Only]
One more thing
In suspend-reset case, won't this cause to schedule a work item on
suspend? I don't know if that is a good idea, ideally we would like to clean up
all work items before going to suspend.
Thanks,
Lijo
[AMD Official Use Only]
One more thing
In suspend-reset case, won't this cause to schedule a work item on
suspend? I don't know if that is a good idea, ideally we would like to clean up
all work items before going to suspend.
Thanks,
Lijo
-Original Message-
From: Sharma,
On 2/4/2022 6:11 PM, Lazar, Lijo wrote:
BTW, since this is already providing a set of values it would be useful to
provide one more field as the reset reason - RAS error recovery, GPU hung
recovery or something else.
Adding this additional parameter instead of blocking something in
[AMD Official Use Only]
No, otherwise driver reset only for GPU recovery purpose. S3/S4 is not meant
for recovery purpose. It's just a precautionary reset to make sure that
everything works fine on resume.
BTW, since this is already providing a set of values it would be useful to
provide one
On 2/4/2022 6:02 PM, Lazar, Lijo wrote:
[Public]
The problem is app doesn't know why the reset happened. It just receives a
bunch of registers to be read. On what basis an app can filter this out?
Again, that is contextual analysis capability, which needs to be
embedded in the reader
[Public]
The problem is app doesn't know why the reset happened. It just receives a
bunch of registers to be read. On what basis an app can filter this out?
Thanks,
Lijo
-Original Message-
From: Sharma, Shashank
Sent: Friday, February 4, 2022 10:29 PM
To: Lazar, Lijo ;
On 2/4/2022 5:50 PM, Lazar, Lijo wrote:
[AMD Official Use Only]
To explain more -
It's an unconditional reset done by the kernel on every suspend
(S3/S4). In such a case which process is going to receive the trace events?
Most likely use case would be related to gpu recovery.
[AMD Official Use Only]
To explain more -
It's an unconditional reset done by the kernel on every suspend
(S3/S4). In such a case which process is going to receive the trace events?
Most likely use case would be related to gpu recovery. Triggering a trace on
every reset doesn't look
Hey Lijo,
I somehow missed to respond on this comment, pls find inline:
Regards
Shashank
On 1/22/2022 7:42 AM, Lazar, Lijo wrote:
On 1/22/2022 2:04 AM, Sharma, Shashank wrote:
From 899ec6060eb7d8a3d4d56ab439e4e6cdd74190a4 Mon Sep 17 00:00:00 2001
From: Somalapuram Amaranath
Date: Fri, 21
On 2022-02-03 13:58, Alex Deucher wrote:
> Fixes hangs on driver load on DCN 2.0 parts.
>
> Bug: https://bugzilla.kernel.org/show_bug.cgi?id=215511
> Fixes: ee2698cf79cc ("drm/amd/display: Changed pipe split policy to allow for
> multi-display pipe split")
> Signed-off-by: Alex Deucher
Am 2022-02-04 um 03:52 schrieb Christian König:
Since newly added BOs don't have any mappings it's ok to add them
without holding the VM lock. Only when we add per VM BOs the lock is
mandatory.
Signed-off-by: Christian König
Reported-by: Bhardwaj, Rajneesh
Reviewed-by: Felix Kuehling
Series is
Reviewed-by: Harry Wentland
Harry
On 2022-02-03 13:58, Alex Deucher wrote:
> To align with other headers.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c | 4 ++--
> .../amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_3_offset.h
Am 04.02.22 um 17:23 schrieb Felix Kuehling:
Am 2022-02-04 um 02:13 schrieb Christian König:
Am 04.02.22 um 04:11 schrieb Rajneesh Bhardwaj:
Noticed the below warning while running a pytorch workload on vega10
GPUs. Change to trylock to avoid conflicts with already held
reservation
locks.
Am 2022-02-04 um 02:13 schrieb Christian König:
Am 04.02.22 um 04:11 schrieb Rajneesh Bhardwaj:
Noticed the below warning while running a pytorch workload on vega10
GPUs. Change to trylock to avoid conflicts with already held reservation
locks.
[ +0.03] WARNING: possible recursive
One tiny thing to fix before merging
> -Original Message-
> From: Kasiviswanathan, Harish
> Sent: Friday, February 4, 2022 10:01 AM
> To: Tuikov, Luben ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Tuikov, Luben
> ; Russell, Kent
> Subject: RE: [PATCH v1 3/3] drm/amdgpu:
[AMD Official Use Only]
Looks good, even if I am a proponent of "buff, don't nerf"
Series is Reviewed-by: Kent Russell
> -Original Message-
> From: Tuikov, Luben
> Sent: Friday, February 4, 2022 12:27 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Tuikov, Luben ; Deucher, Alexander
>
[AMD Official Use Only]
This series acked-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Luben Tuikov
Sent: Friday, February 4, 2022 12:27 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Tuikov, Luben
; Russell, Kent
Subject: [PATCH v1 3/3]
[Public]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Christian
König
Sent: Friday, February 4, 2022 3:52 AM
To: Bhardwaj, Rajneesh ;
amd-gfx@lists.freedesktop.org
Subject: [PATCH] drm/amdgpu: move lockdep assert to the right place.
Since newly added
Am 04.02.22 um 12:22 schrieb Arunpravin:
On 28/01/22 7:48 pm, Matthew Auld wrote:
On Thu, 27 Jan 2022 at 14:11, Arunpravin
wrote:
- Remove drm_mm references and replace with drm buddy functionalities
- Add res cursor support for drm buddy
v2(Matthew Auld):
- replace spinlock with mutex as
On 28/01/22 7:48 pm, Matthew Auld wrote:
> On Thu, 27 Jan 2022 at 14:11, Arunpravin
> wrote:
>>
>> - Remove drm_mm references and replace with drm buddy functionalities
>> - Add res cursor support for drm buddy
>>
>> v2(Matthew Auld):
>> - replace spinlock with mutex as we call
Since newly added BOs don't have any mappings it's ok to add them
without holding the VM lock. Only when we add per VM BOs the lock is
mandatory.
Signed-off-by: Christian König
Reported-by: Bhardwaj, Rajneesh
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 4 ++--
1 file changed, 2 insertions(+),
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