[Why]
GCMC_VM related registers should be programmed by PSP on host side.
L1 and RLCG will block these regisers on VF.
[How]
Remove programming GCMC_VM_FB_LOCATION_BASE/TOP on gfxhub_v3_0_3 under SRIOV VF.
Signed-off-by: Yifan Zha
---
drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c | 12
[AMD Official Use Only - General]
Hi Michel,
It is true that we don’t get obvious improvement on performance with these
patches.
The original requirement of using mcbp is that when there is a very long ib
package with many draw cmds on low priority which uses up gpu utilization, we
give a chan
On Wed, Nov 09, 2022 at 10:20:34PM -0500, Alex Deucher wrote:
> On Wed, Nov 9, 2022 at 8:31 PM Paulo Miguel Almeida
> wrote:
> >
> > On Wed, Nov 09, 2022 at 06:45:57PM -0600, Gustavo A. R. Silva wrote:
> > > On Wed, Nov 09, 2022 at 04:45:42PM +1300, Paulo Miguel Almeida wrote:
> > >
> > > Adding A
From: Nevenko Stupar
[ Upstream commit 7461016c5706eb8c477752bf69e5c9f5a38f502b ]
[Why]
Fix for some of the tool reported modes for FCLK
P-state deviations and UCLK P-state deviations that
are coming from DSC terms and/or Scaling terms
causing MinActiveFCLKChangeLatencySupported
and MaxActiveDRA
From: George Shen
[ Upstream commit 8dc323133d74518e3b5b07242e2b2f088799ea6e ]
[Why]
The DST_after_scaler value that DML spreadsheet outputs is
generally the driver value round up to the nearest int.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: George Shen
Tested-by: Mark Broadw
From: George Shen
[ Upstream commit ab007e5db5d3b8b8975c7eec69992ff38fe2a46c ]
[Why]
DSC config is calculated separately from DML calculations.
DML should use these separately calculated DSC params. The issue is
that the calculated bpp is not properly propagated into DML.
[How]
Correctly used f
From: Mario Limonciello
[ Upstream commit 8d4de331f1b24a22d18e3c6116aa25228cf54854 ]
If a system does not have swap and memory is under 100% usage,
amdgpu will fail to evict resources. Currently the suspend
carries on proceeding to reset the GPU:
```
[drm] evicting device resources failed
[drm
From: George Shen
[ Upstream commit bad610c97c08eef3ed1fa769a8b08b94f95b451e ]
[Why]
DCN32 DSC delay calculation had an unintentional integer division,
resulting in a mismatch against the DML spreadsheet.
[How]
Cast numerator to double before performing the division.
Reviewed-by: Alvin Lee
Ac
From: Yifan Zhang
[ Upstream commit 89b3554782e6b65894f0551e9e0a82ad02dac94d ]
This patch to fix the gdm3 start failure with virual display:
/usr/libexec/gdm-x-session[1711]: (II) AMDGPU(0): Setting screen physical size
to 270 x 203
/usr/libexec/gdm-x-session[1711]: (EE) AMDGPU(0): Failed to m
From: Alvin Lee
[ Upstream commit c3d3f35b725bf9c93bec6d3c056f6bb7cfd27403 ]
Missed enabling timing sync on DCN32 because DCN32 has a different DML
param.
Tested-by: Mark Broadworth
Reviewed-by: Martin Leung
Reviewed-by: Jun Lei
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
Signed-of
From: Fangzhi Zuo
[ Upstream commit 14aed119942f6c2f1286022323139f7404db5d2b ]
Ignore cable ID for DP2 receivers that does not support the feature.
Tested-by: Mark Broadworth
Reviewed-by: Roman Li
Acked-by: Rodrigo Siqueira
Signed-off-by: Fangzhi Zuo
Signed-off-by: Alex Deucher
Signed-off-
Am 2022-11-10 um 08:00 schrieb Christian König:
Clean that up a bit, no functional change.
Signed-off-by: Christian König
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
.../gpu/drm/amd/amdgpu
Am 2022-11-10 um 08:00 schrieb Christian König:
Remove unused parameters and cleanup dead code.
Signed-off-by: Christian König
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c | 14 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.h | 7 +++
drivers/gpu
Am 2022-11-10 um 08:00 schrieb Christian König:
The basic problem here is that it's not allowed to page fault while
holding the reservation lock.
So it can happen that multiple processes try to validate an userptr
at the same time.
Work around that by putting the HMM range object into the mut
Am 2022-11-10 um 08:00 schrieb Christian König:
Since switching to HMM we always need that because we no longer grab
references to the pages.
Signed-off-by: Christian König
CC: sta...@vger.kernel.org
Acked-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 8 +++-
1 f
On 11/10/2022 06:28, Denis Arefev wrote:
Return value of a function 'amdgpu_ras_find_obj' is dereferenced at
nbio_v7_4.c:325 without checking for null
This line is too long, you should be wrapping lines at 75 characters.
Could you run your patch through checkpatch?
Found by Linux Verificati
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 382d2f9e739bc6f151c718b38537ae522ff848cd Add linux-next specific
files for 20221110
Error/Warning reports:
https://lore.kernel.org/linux-mm/202210261404.b6ulzg7h-...@intel.com
https
On Thu, Nov 10, 2022 at 1:08 PM Luben Tuikov wrote:
>
> Thanks for fixing this.
>
> Please add a Cc tag to stable, and repost.
No need for stable. This patch just went upstream in 6.1, so I can
include it in my 6.1 fixes pull next week. Applied.
Thanks!
Alex
>
> Reviewed-by: Luben Tuikov
>
On Thu, Nov 10, 2022 at 8:00 AM Christian König
wrote:
>
> Since switching to HMM we always need that because we no longer grab
> references to the pages.
>
> Signed-off-by: Christian König
> CC: sta...@vger.kernel.org
Series is:
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/am
On 2022-10-18 05:08, jiadong@amd.com wrote:
> From: "Jiadong.Zhu"
>
> Trigger Mid-Command Buffer Preemption according to the priority of the
> software
> rings and the hw fence signalling condition.
>
> The muxer saves the locations of the indirect buffer frames from the software
> ring tog
Thanks for fixing this.
Please add a Cc tag to stable, and repost.
Reviewed-by: Luben Tuikov
Regards,
Luben
On 2022-11-10 09:33, Dong Chenchen wrote:
> When p->gang_size equals 0, amdgpu_cs_pass1() will return directly
> without freeing chunk_array, which will cause a memory leak issue,
> this
On Thu, Nov 10, 2022 at 12:00 PM Michel Dänzer wrote:
>
> On 2022-11-08 09:01, Zhu, Jiadong wrote:> From: Michel Dänzer
>
> >
> The bad news is that this series still makes some things very slow. The
> most extreme examples so far are glxgears (runs at ~400 fps now, ~7000
> fps
[AMD Official Use Only - General]
Hi Nathan,
Thanks for reporting this issue.
Hi Alvin,
Please see inline.
-Original Message-
From: Nathan Chancellor
Sent: Thursday, November 10, 2022 11:39 PM
To: Liu, HaoPing (Alan)
Cc: amd-gfx@lists.freedesktop.org; Wang, Chao-kai (Stylon)
; Li, Su
On 2022-11-08 09:01, Zhu, Jiadong wrote:> From: Michel Dänzer
>
The bad news is that this series still makes some things very slow. The
most extreme examples so far are glxgears (runs at ~400 fps now, ~7000 fps
before, i.e. almost 20x slowdown) and hexchat (scrolling one page now
On Thu, Nov 10, 2022 at 10:57 AM Alex Deucher wrote:
>
> On Wed, Nov 9, 2022 at 2:33 AM Paulo Miguel Almeida
> wrote:
> >
> > One-element arrays are deprecated, and we are replacing them with
> > flexible array members instead. So, replace one-element array with
> > flexible-array member in struc
On Wed, Nov 9, 2022 at 2:33 AM Paulo Miguel Almeida
wrote:
>
> One-element arrays are deprecated, and we are replacing them with
> flexible array members instead. So, replace one-element array with
> flexible-array member in structs _ATOM_CONNECTOR_DEVICE_TAG_RECORD,
> _ATOM_OBJECT_GPIO_CNTL_RECOR
On Thu, Nov 10, 2022 at 8:09 AM Takashi Iwai wrote:
>
> Check the availability of the audio capability and mode config before
> going to the loop for avoiding the access to an unusable state. Also,
> change the loop iterations over encoder instead of connector in order
> to align with radeon_audi
Hi Alan,
On Thu, Nov 03, 2022 at 12:01:06AM +0800, Alan Liu wrote:
> From: Alvin Lee
>
> [Description]
> - Need to disable phantom OTG after it's enabled
> in order to restore it to it's original state.
> - If it's enabled and then an MCLK switch comes in
> we may not prefetch the correct da
Applied. Thanks!
On Wed, Nov 9, 2022 at 8:51 AM Liu Jian wrote:
>
> Fix below sparse warning:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_optc.c:244:18:
> warning: Initializer entry defined twice
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn314/dcn314_optc.c:257:18: also
> defi
On Mon, Nov 7, 2022 at 2:26 PM Ville Syrjala
wrote:
>
> From: Ville Syrjälä
>
> Initialize on-stack modes with drm_mode_init() to guarantee
> no stack garbage in the list head, or that we aren't copying
> over another mode's list head.
>
> Based on the following cocci script, with manual fixups:
Hi,
My settings for checkpatch.pl are:
--strict --emacs --show-types --codespell
Please see the resource I sent in the chat.
Regards,
Luben
On 2022-11-10 00:25, Liu01, Tong (Esther) wrote:
> [AMD Official Use Only - General]
>
> Hi @Tuikov, Luben,
>
> Which checkpatch.pl you used? I use the
On 2022-11-10 03:42, YuBiao Wang wrote:
> Do not clear kiq position in RLC_CP_SCHEDULER so that CP could perform
> IDLE-SAVE after VF fini. CPG also needs to be active in save command.
>
> Signed-off-by: YuBiao Wang
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 14 ++
> drivers/gp
When p->gang_size equals 0, amdgpu_cs_pass1() will return directly
without freeing chunk_array, which will cause a memory leak issue,
this patch fixes it.
Fixes: 4624459c84d7 ("drm/amdgpu: add gang submit frontend v6")
Signed-off-by: Dong Chenchen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 +
Return value of a function 'amdgpu_ras_find_obj' is dereferenced at
nbio_v7_4.c:325 without checking for null
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Denis Arefev
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 3 +++
1 file changed, 3 insertions(+)
diff
Check the availability of the audio capability and mode config before
going to the loop for avoiding the access to an unusable state. Also,
change the loop iterations over encoder instead of connector in order
to align with radeon_audio_enable().
Link: https://gitlab.freedesktop.org/drm/amd/-/iss
Remove unused parameters and cleanup dead code.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.c | 14 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_hmm.h | 7 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 ++---
drivers/gpu/drm/amd/amdkfd/kfd_svm.c| 6 +
Clean that up a bit, no functional change.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 7 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 5 +
The basic problem here is that it's not allowed to page fault while
holding the reservation lock.
So it can happen that multiple processes try to validate an userptr
at the same time.
Work around that by putting the HMM range object into the mutex
protected bo list for now.
Signed-off-by: Christ
Since switching to HMM we always need that because we no longer grab
references to the pages.
Signed-off-by: Christian König
CC: sta...@vger.kernel.org
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
[AMD Official Use Only - General]
For consistency, you may avoid magic numbers and change this kind of lines to
if ((start_addr & (ATOM_VRAM_BLOCK_NEEDS_NO_RESERVATION << 30)) == 0) {
to
if ((start_addr & ATOM_VRAM_OPERATION_FLAGS_MASK) !=
(uint32_t)( ATOM_VRAM_B
My Acked-by should be sufficient as well.
For a Reviewed-by I would need to have more background on the atombios
tables. Alex is the expert on that.
Regards,
Christian.
Am 10.11.22 um 11:47 schrieb Liu01, Tong (Esther):
[AMD Official Use Only - General]
Hi @Deucher, Alexander & @Koenig, Chr
[AMD Official Use Only - General]
Hi @Deucher, Alexander & @Koenig, Christian,
Can you give me a Reviewed by:? Now the CI job must has Reviewed by then the
patch can be passed. Patch is in the attachment. Thanks a lot.
Kind regards,
Esther
-Original Message-
From: Koenig, Christian
Feel free to add my Acked-by: Christian König
to the patch.
Luben might have some additional comments, but in general I think the
biggest problem here is the mail settings.
Somehow either the mail client or the mail server are corrupting the patch.
Regards,
Christian.
Am 10.11.22 um 11:14
[AMD Official Use Only - General]
Hi Christian,
Please find the attached patch, thanks!
Kind regards,
Esther
-Original Message-
From: Koenig, Christian
Sent: 2022年11月8日星期二 下午10:04
To: Chang, HaiJun ; Liu01, Tong (Esther)
; amd-gfx@lists.freedesktop.org; Zhang, Bokun
Cc: Quan, Evan
I'm using the checkpatch.pl version from the upstream Linux kernel, but
as far as I know that should be the same.
Are you sending the patch with "git send-email" ? Maybe the mail client
is mangling white space or something like this, when I try to check the
patch here it gives quite some more
Do not clear kiq position in RLC_CP_SCHEDULER so that CP could perform
IDLE-SAVE after VF fini. CPG also needs to be active in save command.
Signed-off-by: YuBiao Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 14 ++
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 4 +++-
2 files change
[Public]
Reviewed-by: Candice Li mailto:candice...@amd.com>>
Thanks
Candice
From: Zhou1, Tao
Sent: Thursday, November 10, 2022 3:04:00 PM
To: amd-gfx@lists.freedesktop.org ; Li, Candice
; Zhang, Hawking ; Chai, Thomas
; Yang, Stanley
Cc: Zhou1, Tao
Subject:
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