Hi Guchun,
no, that doesn't make any sense at all.
The ready flag indicates that the scheduler is fully prepared for hw
submissions from userspace and is unrelated to the initialization
status. It's set to true after IB testing was successful and only set to
false only when a GPU reset fails
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
From: Yifan Zha
Date: Wednesday, February 1, 2023 at 13:15
To: amd-gfx@lists.freedesktop.org , Deucher,
Alexander , Zhang, Hawking
Cc: Chen, Horace , Chang, HaiJun ,
Zha, YiFan(Even)
Subject: [PATCH v2]
[Why]
Accessing GRBM_GFX_CNTL in full access time has risk when VF is doing MMIO
attacking.
Therefore, VF writing GRBM_GFX_CNTL are blocked by L1 Policy.
For RLCG interface, RLCG use SCRATCH_REG2 which is copied from GRBM_GFX_CNTL.
[How]
Remove writing GRBM_GFX_CNTL in amdgpu_virt_rlcg_reg_rw.
[Public]
This series is:
Reviewed-by: Yifan Zhang
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Wednesday, February 1, 2023 2:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH 5/5] Revert "drm/amd/display: disable S/G display on DCN
On Tue, Jan 31, 2023 at 10:01 AM Sasha Levin wrote:
>
> From: Dave Airlie
>
> [ Upstream commit f439a959dcfb6b39d6fd4b85ca1110a1d1de1587 ]
>
> This fixes the build here locally on my 32-bit arm build.
>
> Signed-off-by: Dave Airlie
> Signed-off-by: Sasha Levin
This patch is only applicable to
On 31/01/2023 14:52, Alex Deucher wrote:
> [...]
>> (b) We can't use sched.ready, which would make sense...but amdgpu
>> overrides its meaning, the driver manipulates this value for its own
>> purposes of tracking ring init, or something like that.
>>
>> This is the tangential topic: what should
On Tue, Jan 31, 2023 at 1:23 PM Guilherme G. Piccoli
wrote:
>
> On 31/01/2023 14:52, Alex Deucher wrote:
> > [...]
> >> (b) We can't use sched.ready, which would make sense...but amdgpu
> >> overrides its meaning, the driver manipulates this value for its own
> >> purposes of tracking ring init,
This reverts commit 9aa15370819294beb7eb67c9dcbf654d79ff8790.
This is fixed now so we can re-enable S/G display on DCN
3.1.4.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 +
1 file changed, 1 insertion(+)
diff --git
Take into account whether or not the AGP aperture is
enabled or not when calculating the system aperture.
Fixes white screens with DCN 3.1.4.
Based on a patch from Yifan Zhang
Cc: Yifan Zhang
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
This reverts commit 1a65327a84db5b9081a51ccb1c562083f59bfcec.
This should be resolved so we can re-enable this. Also,
the AGP apeture was bring programmed to 0 on MMHUB 3.0.1
since agp_start and end were not being set.
Acked-by: Harry Wentland
Signed-off-by: Alex Deucher
---
Causes flickering or white screens in some configurations.
Disable it for now until we can fix the issue.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2352
Cc: roman...@amd.com
Cc: yifan1.zh...@amd.com
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2
Causes flickering or white screens in some configurations.
Disable it for now until we can fix the issue.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2352
Cc: roman...@amd.com
Cc: yifan1.zh...@amd.com
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1
On Tue, Jan 31, 2023 at 9:32 AM Guilherme G. Piccoli
wrote:
>
> On 31/01/2023 10:58, Chen, Guchun wrote:
> > Hi Christian,
> >
> > Do you think if it makes sense that we can set 'ring->sched.ready' to be
> > true in each ring init, even if before executing/setting up drm_sched_init
> > in
On Tue, Jan 31, 2023 at 5:58 AM Christian König
wrote:
>
> Am 31.01.23 um 10:17 schrieb Chen, Guchun:
> > Hi Piccoli,
> >
> > Please ignore my request of full dmesg log. I can reproduce the issue and
> > get the same failure callstack by returning early with an error code prior
> > to
Applied. Thanks!
Alex
On Tue, Jan 31, 2023 at 9:40 AM Harry Wentland wrote:
>
> On 1/30/23 14:56, Guilherme G. Piccoli wrote:
> > This is a very trivial code clean-up related to commit 5468c36d6285
> > ("drm/amd/display: Filter Invalid 420 Modes for HDMI TMDS"). This commit
> > added a
Applied. Thanks!
Alex
On Thu, Jan 26, 2023 at 3:50 PM Tom Rix wrote:
>
> cppcheck reports
> drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c:1403:76: style:
> Expression is always true because 'else if' condition is opposite to
> previous condition at line 1396. [multiCondition]
>}
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 80bd9028fecadae4e8e3a278cd32d74badc2a6e0 Add linux-next specific
files for 20230131
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202301230743.xnut0zvc-...@intel.com
https
Applied. Thanks!
On Thu, Jan 26, 2023 at 8:38 PM Tom Rix wrote:
>
> checkpatch reports
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c:2902:13: style:
> Expression is always true because 'else if' condition is opposite to
> previous condition at line 2895. [multiCondition]
> }
Applied. Thanks!
Alex
On Fri, Jan 27, 2023 at 8:39 PM wrote:
>
> From: ye xingchen
>
> opp.h is included more than once.
>
> Signed-off-by: ye xingchen
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git
Applied. Thanks!
On Sun, Jan 29, 2023 at 10:18 AM Jonathan Neuschäfer
wrote:
>
> Spell it as "broadcast".
>
> Signed-off-by: Jonathan Neuschäfer
> ---
> drivers/gpu/drm/amd/amdgpu/df_v1_7.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git
Cursor gets clipped off in the middle of the screen with hw rotation
180. Fix a miscalculation of cursor offset when it's placed near the
edges in the pipe split case.
Cursor bugs with hw rotation were reported on AMD issue tracker:
https://gitlab.freedesktop.org/drm/amd/-/issues/2247
The issues
[AMD Official Use Only - General]
> -Original Message-
> From: Sasha Levin
> Sent: Tuesday, January 31, 2023 10:00 AM
> To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
> Cc: Dave Airlie ; Sasha Levin ;
> Wentland, Harry ; Li, Sun peng (Leo)
> ; Siqueira, Rodrigo ;
> Deucher,
On 31/01/2023 10:58, Chen, Guchun wrote:
> Hi Christian,
>
> Do you think if it makes sense that we can set 'ring->sched.ready' to be true
> in each ring init, even if before executing/setting up drm_sched_init in
> amdgpu_device_init_schedulers? As 'ready' is a member of gpu scheduler
>
From: Dave Airlie
[ Upstream commit f439a959dcfb6b39d6fd4b85ca1110a1d1de1587 ]
This fixes the build here locally on my 32-bit arm build.
Signed-off-by: Dave Airlie
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff
From: Aurabindo Pillai
[ Upstream commit 4b069553246f993c4221e382d0d0ae34f5ba730e ]
[Why]
Switching between certain modes that are freesync video modes and those
are not freesync video modes result in timing not changing as seen by
the monitor due to incorrect timing being driven.
The issue is
From: Dave Airlie
[ Upstream commit f439a959dcfb6b39d6fd4b85ca1110a1d1de1587 ]
This fixes the build here locally on my 32-bit arm build.
Signed-off-by: Dave Airlie
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed, 2 insertions(+)
diff
From: Aurabindo Pillai
[ Upstream commit 4b069553246f993c4221e382d0d0ae34f5ba730e ]
[Why]
Switching between certain modes that are freesync video modes and those
are not freesync video modes result in timing not changing as seen by
the monitor due to incorrect timing being driven.
The issue is
On 1/30/23 14:56, Guilherme G. Piccoli wrote:
> This is a very trivial code clean-up related to commit 5468c36d6285
> ("drm/amd/display: Filter Invalid 420 Modes for HDMI TMDS"). This commit
> added a validation on driver probe to prevent invalid TMDS modes, but one
> of the fake properties
Hi Christian,
Do you think if it makes sense that we can set 'ring->sched.ready' to be true
in each ring init, even if before executing/setting up drm_sched_init in
amdgpu_device_init_schedulers? As 'ready' is a member of gpu scheduler
structure.
Regards,
Guchun
-Original Message-
Am 31.01.23 um 10:17 schrieb Chen, Guchun:
Hi Piccoli,
Please ignore my request of full dmesg log. I can reproduce the issue and get
the same failure callstack by returning early with an error code prior to
amdgpu_device_init_schedulers.
Regards,
Guchun
-Original Message-
From:
A later bad compute job can block a good gfx job
The gang submit/barrier approach makes sure that only one application at
a time can use the gfx/compute block.
So when application B makes a compute submission while a GFX submission
of application A is still running we will wait for that GFX
Hi Piccoli,
Please ignore my request of full dmesg log. I can reproduce the issue and get
the same failure callstack by returning early with an error code prior to
amdgpu_device_init_schedulers.
Regards,
Guchun
-Original Message-
From: Chen, Guchun
Sent: Tuesday, January 31, 2023
On Mon, 9 Jan 2023 14:38:09 -0100
Melissa Wen wrote:
> On 01/09, Melissa Wen wrote:
> > Hi,
> >
> > After collecting comments in different places, here is a second version
> > of the work on adding DRM CRTC 3D LUT support to the current DRM color
> > mgmt interface. In comparison to previous
[AMD Official Use Only - General]
V2 is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Yiqing Yao
Sent: Tuesday, January 31, 2023 16:33
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Deucher, Alexander
; Yao, Yiqing(James)
Subject: [PATCH v2]
These sysfs nodes are tested supported, so enable them.
Signed-off-by: Yiqing Yao
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index
These sysfs nodes are tested supported, so enable it.
Signed-off-by: Yiqing Yao
---
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index
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