On 6/2/2023 11:26 AM, Chen, Guchun wrote:
[AMD Official Use Only - General]
-Original Message-
From: amd-gfx On Behalf Of Lijo
Lazar
Sent: Friday, June 2, 2023 12:00 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Hawking
Subject: [PATCH] drm/amd/pm: Fill metri
[AMD Official Use Only - General]
> -Original Message-
> From: amd-gfx On Behalf Of Lijo
> Lazar
> Sent: Friday, June 2, 2023 12:00 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander ; Zhang, Hawking
>
> Subject: [PATCH] drm/amd/pm: Fill metrics data for SMUv13.0.6
>
> Popul
These warning can cause build failure:
display/dc/dcn10/dcn10_hw_sequencer_debug.c: In function ‘snprintf_count’:
display/dc/dcn10/dcn10_hw_sequencer_debug.c:56:2: warning: function
‘snprintf_count’ might be a candidate for ‘gnu_printf’ format attribute
[-Wsuggest-attribute=format]
The warning
Populate metrics data table for SMU v13.0.6. Add PCIe link speed/width
information also.
Signed-off-by: Lijo Lazar
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 108 +++---
1 file changed, 67 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v1
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Le Ma
Sent: Friday, June 2, 2023 10:42
To: amd-gfx@lists.freedesktop.org
Cc: Ma, Le ; Lazar, Lijo ; Zhang, Morris
Subject: [PATCH 1/1] drm/amdgpu/pm: notify driv
Per requested, follow the same sequence as APU to send only
PPSMC_MSG_PrepareForDriverUnload to PMFW during driver unloading.
Change-Id: I2dc8495572b0bce6e21eafb51b215c83d94ac647
Signed-off-by: Le Ma
Reviewed-by: Shiwu Zhang
Reviewed-by: Lijo Lazar
---
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_
Hi Jay,
On 6/1/23 11:09, Aurabindo Pillai wrote:
Due to FPO, firmware will try to change OTG timings, which would only
latch if min/max selectors for vtotal are written by the driver.
Could you elaborate a little bit more about this issue? Right now, do we
have some sort of race between firmw
This is motivated by OOB access in amdgpu_vm_update_range when
offset_in_bo+map_size overflows.
v2: keep the validations in amdgpu_vm_bo_map
v3: add the validations to amdgpu_vm_bo_map/amdgpu_vm_bo_replace_map
rather than to amdgpu_gem_va_ioctl
Fixes: 9f7eb5367d00 ("drm/amdgpu: actually use t
On 2023-06-01 18:06, James Zhu wrote:
On 2023-06-01 17:17, Felix Kuehling wrote:
On 2023-06-01 16:47, James Zhu wrote:
Don't sleep when event age unmatch, and update last_event_age.
It is only for KFD_EVENT_TYPE_SIGNAL which is checked by user space.
Signed-off-by: James Zhu
---
drivers/g
On 2023-06-01 17:17, Felix Kuehling wrote:
On 2023-06-01 16:47, James Zhu wrote:
Don't sleep when event age unmatch, and update last_event_age.
It is only for KFD_EVENT_TYPE_SIGNAL which is checked by user space.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 13
According to Alex, most APUs from that time seem to have the same issue
(vbios says 48Mhz, actual is 100Mhz). I only have a CHIP_STONEY so I
limit the fixup to CHIP_STONEY
---
drivers/gpu/drm/amd/amdgpu/vi.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/g
On 2023-06-01 16:47, James Zhu wrote:
Don't sleep when event age unmatch, and update last_event_age.
It is only for KFD_EVENT_TYPE_SIGNAL which is checked by user space.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 13 +
1 file changed, 13 insertions(+)
On 2023-06-01 16:58, Felix Kuehling wrote:
On 2023-06-01 16:47, James Zhu wrote:
Add event age tracking
Signed-off-by: James Zhu
---
include/uapi/linux/kfd_ioctl.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/kfd_ioctl.h
b/include/uapi/linux/k
We'll also need a pointer to the user mode changes in some public repo,
or a public email code review of the user mode changes.
Thanks,
Felix
On 2023-06-01 16:58, Felix Kuehling wrote:
On 2023-06-01 16:47, James Zhu wrote:
Add event age tracking
Signed-off-by: James Zhu
---
include/uap
On 2023-06-01 16:47, James Zhu wrote:
Add event age tracking
Signed-off-by: James Zhu
---
include/uapi/linux/kfd_ioctl.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/kfd_ioctl.h b/include/uapi/linux/kfd_ioctl.h
index 7e19a2d1e907..bfbe0006370e 100
Don't sleep when event age unmatch, and update last_event_age.
It is only for KFD_EVENT_TYPE_SIGNAL which is checked by user space.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/k
Add event_age tracking when receiving interrupt.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdkfd/kfd_events.c | 6 ++
drivers/gpu/drm/amd/amdkfd/kfd_events.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
b/drivers/gpu/drm/amd/amdkfd/kf
Add event age tracking
Signed-off-by: James Zhu
---
include/uapi/linux/kfd_ioctl.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/uapi/linux/kfd_ioctl.h b/include/uapi/linux/kfd_ioctl.h
index 7e19a2d1e907..bfbe0006370e 100644
--- a/include/uapi/linux/kfd_ioctl.h
+
On 2023-06-01 15:31, Philip Yang wrote:
To free page table BOs which are fenced and freed when updating page
table.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/dri
On 2023-06-01 15:31, Philip Yang wrote:
To free page table BOs which are freed when updating page table, for
example PTE BOs when PDE0 used as PTE.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/d
On 5/23/23 18:15, Melissa Wen wrote:
> Wire up DC 3D LUT to DM CRTC color management (post-blending). On AMD
> display HW, we have to set a shaper LUT to delinearize or normalize the
> color space before applying a 3D LUT (since we have a reduced number of
> LUT entries). Therefore, we map DC sh
On 2023-06-01 15:31, Philip Yang wrote:
Add pt_fence to amdgpu vm structure and implement helper functions. This
fence will be shared by all page table BOs of the same amdgpu vm.
Suggested-by: Felix Kuehling
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +
dr
On 2023-05-30 22:08, Yang Li wrote:
drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device.c:1036 kgd2kfd_interrupt()
warn: inconsistent indenting
Signed-off-by: Yang Li
Reviewed-by: Felix Kuehling
I'm applying the patch to amd-staging-drm-next. Thanks!
---
drivers/gpu/drm/amd/amdkfd/kfd_dev
On 5/23/23 18:14, Melissa Wen wrote:
> From: Joshua Ashton
>
> Multiplier to 'gain' the plane. When PQ is decoded using the fixed func
> transfer function to the internal FP16 fb, 1.0 -> 80 nits (on AMD at
> least) When sRGB is decoded, 1.0 -> 1.0. Therefore, 1.0 multiplier = 80
> nits for SD
If updating page table free the page table BOs, add fence to the BOs to
ensure the page table BOs are not freed and reused before TLB is
flushed.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_pt.c | 33 +++
1 file changed, 22 insertions(+), 11 deletions(
To free page table BOs which are fenced and freed when updating page
table.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index e0d3
To free page table BOs which are freed when updating page table, for
example PTE BOs when PDE0 used as PTE.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdkfd/kfd_process.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
b/drivers/gpu/drm
Add pt_fence to amdgpu vm structure and implement helper functions. This
fence will be shared by all page table BOs of the same amdgpu vm.
Suggested-by: Felix Kuehling
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 45
This patch series to fix GPU generate random no-retry fault on APU with
XNACK on.
If updating GPU page table to use PDE0 as PTE, for example unmap 2MB
align virtual address, then map same virtual address using transparent
2MB huge page, we free the PTE BO first and then flush TLB.
If XNACK ON, H/
On 5/23/23 18:14, Melissa Wen wrote:
> Create and attach driver-private properties for plane color management.
> First add plane degamma LUT properties that means user-blob and its
> size. We will add more plane color properties in the next commits. In
> addition, we keep these driver-private pl
On 5/23/23 18:14, Melissa Wen wrote:
> Hook up driver-specific atomic operations for managing AMD color
> properties and create AMD driver-specific color management properties
> and attach them according to HW capabilities defined by `struct
> dc_color_caps`. Add enumerated transfer function pro
On Thu, Jun 1, 2023 at 2:23 PM Alex Deucher wrote:
>
> On Thu, Jun 1, 2023 at 1:32 PM Limonciello, Mario
> wrote:
> >
> > [AMD Official Use Only - General]
> >
> > > -Original Message-
> > > From: Alex Deucher
> > > Sent: Thursday, June 1, 2023 11:15 AM
> > > To: Limonciello, Mario
> >
On Thu, Jun 1, 2023 at 1:32 PM Limonciello, Mario
wrote:
>
> [AMD Official Use Only - General]
>
> > -Original Message-
> > From: Alex Deucher
> > Sent: Thursday, June 1, 2023 11:15 AM
> > To: Limonciello, Mario
> > Cc: amd-gfx@lists.freedesktop.org; Rafael Ávila de Espíndola
> >
> > Su
[AMD Official Use Only - General]
> -Original Message-
> From: Alex Deucher
> Sent: Thursday, June 1, 2023 11:15 AM
> To: Limonciello, Mario
> Cc: amd-gfx@lists.freedesktop.org; Rafael Ávila de Espíndola
>
> Subject: Re: [PATCH v2 1/2] drm/amd: Disallow s0ix without BIOS support
> again
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 571d71e886a5edc89b4ea6d0fe6f445282938320 Add linux-next specific
files for 20230601
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202305230552.wobyqyya-...@intel.com
https
Due to FPO, firmware will try to change OTG timings, which would only
latch if min/max selectors for vtotal are written by the driver.
Signed-off-by: Aurabindo Pillai
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 15 +++
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_optc.c |
On 5/30/2023 8:02 AM, Thomas Zimmermann wrote:
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Msm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.
By using fbdev helpers directly within each DRM fbdev emulation,
we can
On Thu, Jun 1, 2023 at 10:31 AM Hawking Zhang wrote:
>
> From: Lijo Lazar
>
> Use the right data structure for allocation.
>
> Signed-off-by: Lijo Lazar
> Reviewed-by: Hawking Zhang
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 ++--
> 1 file changed,
On Thu, Jun 1, 2023 at 11:33 AM Limonciello, Mario
wrote:
>
> [AMD Official Use Only - General]
>
> > -Original Message-
> > From: Alex Deucher
> > Sent: Wednesday, May 31, 2023 10:22 PM
> > To: Limonciello, Mario
> > Cc: amd-gfx@lists.freedesktop.org; Rafael Ávila de Espíndola
> >
> >
On 6/1/23 17:45, Pillai, Aurabindo wrote:
>
> I see, thanks for the info. I'll try repro'ing it locally.
Thanks. Note that I'm using a GNOME Wayland session, which doesn't support VRR
upstream yet (I'm building mutter with
https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/1154 for that). I
[Public]
I see, thanks for the info. I'll try repro'ing it locally. But do you have the
open userspace stack from AMD's packaged driver installed ? If not, could you
please try downloading from https://www.amd.com/en/support/linux-drivers and
install just the open components? You can run:
sudo
[AMD Official Use Only - General]
> -Original Message-
> From: Alex Deucher
> Sent: Wednesday, May 31, 2023 10:22 PM
> To: Limonciello, Mario
> Cc: amd-gfx@lists.freedesktop.org; Rafael Ávila de Espíndola
>
> Subject: Re: [PATCH v2 1/2] drm/amd: Disallow s0ix without BIOS support
> agai
On 5/31/23 22:14, Aurabindo Pillai wrote:
> On 5/11/23 03:06, Michel Dänzer wrote:
>> On 5/10/23 22:54, Aurabindo Pillai wrote:
>>> On 5/10/23 09:20, Michel Dänzer wrote:
On 5/9/23 23:07, Pillai, Aurabindo wrote:
>
> Sorry - the firmware in the previous message is for DCN32. For Navi2x
Am 20.05.23 um 11:25 schrieb Arunpravin Paneer Selvam:
This reverts commit c105518679b6e87232874ffc989ec403bee59664.
This patch disables the TOPDOWN flag for APU and few dGPU cards
which has the VRAM size equal to the BAR size.
When we enable the TOPDOWN flag, we get the free blocks at
the high
Am 26.05.23 um 14:37 schrieb Min Li:
Userspace can race to free the gobj(robj converted from), robj should not
be accessed again after drm_gem_object_put, otherwith it will result in
use-after-free.
Signed-off-by: Min Li
---
drivers/gpu/drm/radeon/radeon_gem.c | 2 +-
1 file changed, 1 inser
From: Lijo Lazar
Use the right data structure for allocation.
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
b/drive
Series is:
Reviewed-by: Alex Deucher
On Wed, May 31, 2023 at 9:59 PM Evan Quan wrote:
>
> Enable the following OD features support for SMU13:
> - Maxinum and minimum gfxclk frequency settings
> - Maxinum and minimum uclk frequency settings
> - Voltage offset settings for gfxclk v/f curve line
>
[Public]
Reviewed-by: Roman Li
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
> Sent: Wednesday, May 31, 2023 1:46 PM
> To: Pillai, Aurabindo ; Mahfooz, Hamza
> ; Siqueira, Rodrigo
> ; Wentland, Harry
> ; Li, Roman
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
>
> Sub
enforce process isolation between graphics and compute via using the same
reserved vmid.
Signed-off-by: Chong Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 13 -
3 files change
enforce process isolation between graphics and compute via using the same
reserved vmid.
Signed-off-by: Chong Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 13 -
3 files change
On Mon, May 15, 2023 at 03:04:43PM +0200, Michel Dänzer wrote:
On 5/11/23 21:39, Sasha Levin wrote:
From: Wesley Chalmers
[ Upstream commit 474f01015ffdb74e01c2eb3584a2822c64e7b2be ]
[WHY]
Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a
pipe commit can cause underflow.
On Tue, May 30, 2023 at 05:12:24PM +0200, Thomas Zimmermann wrote:
> Use the regular fbdev helpers for framebuffer I/O instead of DRM's
> helpers. Tegra does not use damage handling, so DRM's fbdev helpers
> are mere wrappers around the fbdev code.
>
> By using fbdev helpers directly within each D
[AMD Official Use Only - General]
Series is Reviewed-by: Le Ma
> -Original Message-
> From: Kamal, Asad
> Sent: Thursday, June 1, 2023 3:28 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Lazar, Lijo
> ; Ma, Le ; Zhang, Morris
>
> Subject: [PATCH 3/3] drm/amd/pm: Fix SMUv
From: Lijo Lazar
Instead of accumulated counters, PMFW will pass the throttle reason
along with throttle interrupt. Use that context information to report the
exact reason for throttling.
v2: Removed Dummy definition
Signed-off-by: Asad Kamal
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zha
From: Lijo Lazar
Keep throttle status indicator in SMUv13 power context
Signed-off-by: Lijo Lazar
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
b/drivers/gpu/drm/amd
From: Lijo Lazar
Update PMFW interface headers to for new metrics table format and
throttling information.
v2: Added dummy definition for compilation error
Signed-off-by: Lijo Lazar
Signed-off-by: Asad Kamal
Reviewed-by: Hawking Zhang
---
.../inc/pmfw_if/smu13_driver_if_v13_0_6.h | 31 +
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