Add general registers of gfx9 in ipdump for
devcoredump support.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 124 +-
1 file changed, 123 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amd
Add gfx9 support of CP queue registers for all queues
to be used by devcoredump.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 110 +-
1 file changed, 108 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/driver
Add support of gfx9 ipdump print so devcoredump
could trigger it to dump the captured registers
in devcoredump.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/
On Thu, 30 May 2024 at 07:41, Limonciello, Mario
wrote:
>
>
> >> Also a direct acpi_lid_open() call seems a bit iffy. But I guess if
> >> someone needs this to work on non-ACPI system they get to figure out
> >> how to abstract it better. acpi_lid_open() does seem to return != 0
> >> when ACPI is
AMDGPU_RAS_GPU_ERR_BOOT_STATUS field is no longer valid.
The polling sequence is also simplifed according to
the latest firmware change.
Signed-off-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 99 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 4 +-
2 fil
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Tao Zhou
One more question, do we need to consider the compatible with old FW?
> -Original Message-
> From: Hawking Zhang
> Sent: Thursday, May 30, 2024 4:41 PM
> To: amd-gfx@lists.freedesktop.org; Zhou1, Tao
> Cc:
Hi,
On 16/05/2024 13:18, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Reduced re-spin of my previous series after Christian corrected a few
misconceptions that I had. So lets see if what remains makes sense or is still
misguided.
To summarise, the series address the following two issues:
*
Hi,
On 20/05/2024 12:13, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Convert fdinfo memory stats to use the common drm_print_memory_stats
helper.
This achieves alignment with the common keys as documented in
drm-usage-stats.rst, adding specifically drm-total- key the driver was
missing until
Hi Cristian and Alex, two things to clarify:
First is that I didn't update Mesa for a week or so. The problem disappears
when I switch back to a 6.9 kernel.
Second is that sorry I couldn't bisect the troublesome commit. The problem
takes some time to reproduce, there were
just too many of the c
On Mon, May 27, 2024 at 10:47:39AM -0400, Alex Deucher wrote:
> On Mon, May 27, 2024 at 5:42 AM Tasos Sahanidis wrote:
> >
> > On 2024-05-23 17:52, Alex Deucher wrote:
> > > On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis
> > > wrote:
> > >>
> > >> Dyanmically sized arrays used [1] instead of []
> Evan no longer maintains the SWSMU code, it should be changed to Kenneth and
> Jun (CCed).
Thanks for the heads up! Kenneth, Jun, will you send a patch or shall I?
If you send one, please add:
Reported-by: Wolfram Sang
signature.asc
Description: PGP signature
> > remove I2C_CLASS_SPD without further dependencies? If you prefer to push
> > it through your tree, can you send it to Linus soon?
>
> Yes, I'll include the patch in my PR for this week.
Awesome, thank you!
signature.asc
Description: PGP signature
I'll send out an update. Thanks!
Alex
On Thu, May 30, 2024 at 9:12 AM Wolfram Sang
wrote:
>
>
> > Evan no longer maintains the SWSMU code, it should be changed to Kenneth
> > and Jun (CCed).
>
> Thanks for the heads up! Kenneth, Jun, will you send a patch or shall I?
> If you send one, please
Ping!?
On 5/25/2024 7:40 AM, Srinivasan Shanmugam wrote:
This commit fixes a type mismatch in the amdgpu_gfx_kiq_init_ring
function triggered by the snprintf function expecting unsigned char
arguments due to the '%hhu' format specifier, but receiving int and u32
arguments.
The issue occurred be
Am 30.05.24 um 05:46 schrieb Jesse Zhang:
Potentially overflowing expression mall_size_per_umc * adev->gmc.num_umc with
type unsigned int (32 bits, unsigned)
is evaluated using 32-bit arithmetic,and then used in a context that expects an
expression of type u64 (64 bits, unsigned).
Maybe bette
Am 30.05.24 um 05:48 schrieb Jesse Zhang:
If the svm migration copy memory gart fails or the dma mapping page fails for
the first time.
But the variable i is still 0, and executing i-- will overflow.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 3 ++-
1 file
Am 30.05.24 um 05:50 schrieb Jesse Zhang:
To fix the warning about unused value, comment out the variable use_static.
Commenting out variables with // will just get you another warning from
checkpatch.
Christian.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_packet_mana
Applied. Thanks!
On Wed, May 29, 2024 at 5:54 PM Nathan Chancellor wrote:
>
> From: Bill Wendling
>
> Work for __counted_by on generic pointers in structures (not just
> flexible array members) has started landing in Clang 19 (current tip of
> tree). During the development of this feature, a re
Similar to commit 15681da214b where some kernel log
messages are dropped. With this commit, more log
messages in older version of VCN/JPEG code are dropped.
Signed-off-by: David (Ming Qiang) Wu
---
drivers/gpu/drm/amd/amdgpu/jpeg_v1_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c | 8 +--
On Thu, May 30, 2024 at 6:31 AM Tasos Sahanidis wrote:
>
> On Mon, May 27, 2024 at 10:47:39AM -0400, Alex Deucher wrote:
> > On Mon, May 27, 2024 at 5:42 AM Tasos Sahanidis wrote:
> > >
> > > On 2024-05-23 17:52, Alex Deucher wrote:
> > > > On Thu, May 23, 2024 at 9:05 AM Tasos Sahanidis
> > >
On 5/28/24 2:18 AM, Srinivasan Shanmugam wrote:
This commit adds null checks for the 'stream' and 'plane' variables in
the dcn30_apply_idle_power_optimizations function. These variables were
previously assumed to be null at line 922, but they were used later in
the code without checking if the
On Sat, May 25, 2024 at 1:47 AM Srinivasan Shanmugam
wrote:
>
> This commit fixes a type mismatch in the amdgpu_gfx_kiq_init_ring
> function triggered by the snprintf function expecting unsigned char
> arguments due to the '%hhu' format specifier, but receiving int and u32
> arguments.
>
> The iss
On 5/28/24 08:57, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Currently when one enables driver debugging dmesg gets spammed, at I
suspect vblank rate, with messages like:
[drm:amdgpu_dm_atomic_check [amdgpu]] MPO enablement requested on
crtc:[f073c3bb]
Fix if by converting some log
Hi Dave, Sima,
Fixes for 6.10.
The following changes since commit 36f53d622a216ce80e568b8ca899bfbacb2592d4:
Merge tag 'drm-misc-fixes-2024-05-16' of
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next (2024-05-23
17:07:13 +0200)
are available in the Git repository at:
https://gi
On 2024-05-29 23:50, Jesse Zhang wrote:
Since the value of avail_size is at least VCRAT_SIZE_FOR_GPU(16384),
minus struct crat_header(40UL) and struct crat_subtype_compute(40UL) it cannot
be less than 0.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 6 --
1 fi
On 2024-05-29 23:48, Jesse Zhang wrote:
If the rewind flag is set, it should return the final result of
setting mes debug mode or refresh the run list.
No. We're rewinding because an error occurred. We want to return that
error, not the success probably returned by refreshing the runlist.
On 2024-05-29 23:47, Jesse Zhang wrote:
When copying the information from the user fails, it will goto exit.
But the variable i remains at 0, and do i-- will overflow.
i-- may underflow, but the loop will still exit. Why is the underflow a
problem?
Signed-off-by: Jesse Zhang
---
driv
On 2024-05-29 23:47, Jesse Zhang wrote:
the expression caps | HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED
is always 1/true regardless of the values of its operand.
Signed-off-by: Jesse Zhang
Please add a Fixes tag. I think this is the commit that introduced the
problem:
commit
On 2024-05-30 10:12, Christian König wrote:
Am 30.05.24 um 05:50 schrieb Jesse Zhang:
To fix the warning about unused value, comment out the variable
use_static.
Commenting out variables with // will just get you another warning
from checkpatch.
Christian.
Signed-off-by: Jesse Zhang
-
On 2024-05-29 23:49, Jesse Zhang wrote:
The varible uncached set false, the condition uncached cannot be true.
So remove the dead code, mapping flags will set the flag AMDGPU_VM_MTYPE_UC in
else.
Signed-off-by: Jesse Zhang
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd
From: Likun Gao
Remove hdp flush for gc v11/12 when enable gart.
Remove flush tlb for gc v10/11/12 when enable gart.
The flush is done for each GART mapping when it is created.
Signed-off-by: Likun Gao
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/gfx
Accessing registers via host is missing the check for skip_hw_access and
the lockdep check that comes with it.
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/am
Which method is used to flush tlb does not depend on whether a reset is
in progress or not. We should skip flush altogether if the GPU will get
reset. So put both path under reset_domain read lock.
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
CC: sta...@vger.kernel.org
---
drivers/gp
At this point the gart is not set up, there's no point to invalidate tlb
here and it could even be harmful.
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gtt_mgr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amd
These functions are missing the lock for reset domain.
Signed-off-by: Yunxiang Li
---
v3: only bracket amdgpu_device_flush_hdp with the read lock,
amdgpu_gmc_flush_gpu_tlb already takes the lock
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 6 +-
drivers/gpu/drm/amd/amdkfd/k
When amdgpu_gart_invalidate_tlb helper is introduced this part was left
out of the conversion. Avoid the code duplication here.
Signed-off-by: Yunxiang Li
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --
If another thread accesses the gpu while the GPU is being reset, the
reset could fail. This is especially problematic on SRIOV since host
may reset the GPU even if guest is not yet ready.
There are code in place that tries to prevent stray access, but over
time bugs have crept in making it not rel
is_hws_hang and is_resetting serves pretty much the same purpose and
they all duplicates the work of the reset_domain lock, just check that
directly instead. This also eliminate a few bugs listed below and get
rid of dqm->ops.pre_reset.
kfd_hws_hang did not need to avoid scheduling another reset.
We send back the ready to reset message before we stop anything. This is
wrong. Move it to when we are actually ready for the FLR to happen.
In the current state since we take tens of seconds to stop everything,
it is very likely that host would give up waiting and reset the GPU
before we send rea
On 2024-05-28 13:23, Yunxiang Li wrote:
These functions are missing the lock for reset domain.
Signed-off-by: Yunxiang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c| 8 ++--
drivers/gpu/drm/amd/amdkfd/kfd_
[AMD Official Use Only - AMD Internal Distribution Only]
> It's not clear to me what's the requirement for reset domain locking around
> MES calls. We have a lot more of them in kfd_device_queue_manager.c
> (mostly calling adev->mes.funcs->...
> directly). Do they all need to be wrapped individual
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Felix,
-Original Message-
From: Kuehling, Felix
Sent: Friday, May 31, 2024 4:37 AM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
; Kim, Jonathan ; Huang, Tim
Subject: Re: [PA
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Felix,
Thanks for your review, and will drop the patch.
Thanks
Jesse
-Original Message-
From: Kuehling, Felix
Sent: Friday, May 31, 2024 4:40 AM
To: Zhang, Jesse(Jie) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koen
The expression caps | HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED
and caps | HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED
are always 1/true regardless of the values of its operand.
Fixes: 75de8428c3d632 ("drm/amdkfd: enable single alu ops for gfx12")
Signed-off-by: Jesse Zhang
To fix the warning about unused value,
remove the use_static and use the parameter is_static directly.
Signed-off-by: Jesse Zhang
Suggested-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gp
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Christian and Felix
Thanks for your comment, we will ignore these similar Coverity warnings.
Regards
Jesse
-Original Message-
From: Koenig, Christian
Sent: Thursday, May 30, 2024 10:11 PM
To: Zhang, Jesse(Jie) ; amd-gfx@lists
On Wed, May 29, 2024 at 5:50 AM Sunil Khatri wrote:
>
> Add gfx9 support of CP queue registers for all queues
> to be used by devcoredump.
>
> Signed-off-by: Sunil Khatri
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 110 +-
> 1 file changed, 108 insertions(+), 2 deleti
[Public]
Hi Bob,
> -Original Message-
> From: Bob Zhou
> Sent: Wednesday, May 29, 2024 4:30 PM
> To: amd-gfx@lists.freedesktop.org; Huang, Tim ; Zhang,
> Jesse(Jie)
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Zhou, Bob
> Subject: [PATCH] drm/amd/pm: Fix the null pointer dereferenc
We can skip children resources when the parent resource does not cover
the range.
This should help vmf_insert_* users on x86, such as several DRM drivers.
On my AMD Ryzen 5 7520C, when streaming data from cpu memory into amdgpu
bo, the throughput goes from 5.1GB/s to 6.6GB/s. perf report says
[Public]
Thanks for your suggestion, I will send the next version patch.
Regards,
Bob
-Original Message-
From: Huang, Tim
Sent: 2024年5月31日 13:15
To: Zhou, Bob ; amd-gfx@lists.freedesktop.org; Zhang,
Jesse(Jie)
Cc: Deucher, Alexander ; Koenig, Christian
; Zhou, Bob
Subject: RE: [PATC
Check return value and conduct null pointer handling to avoid null pointer
dereference.
Signed-off-by: Bob Zhou
---
.../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c
b/dri
Am 30.05.24 um 23:48 schrieb Yunxiang Li:
These functions are missing the lock for reset domain.
Please separate the GART changes from the KFD changes. Apart from that
looks good to me.
Thanks,
Christian.
Signed-off-by: Yunxiang Li
---
v3: only bracket amdgpu_device_flush_hdp with the re
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Bob,
> -Original Message-
> From: Bob Zhou
> Sent: Friday, May 31, 2024 2:43 PM
> To: amd-gfx@lists.freedesktop.org; Huang, Tim ; Zhang,
> Jesse(Jie)
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Zhou, Bob
> Subject: [PATCH
Am 31.05.24 um 00:02 schrieb Felix Kuehling:
On 2024-05-28 13:23, Yunxiang Li wrote:
These functions are missing the lock for reset domain.
Signed-off-by: Yunxiang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
refine psp firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 26 +++--
1 file changed, 7 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 6d1911773043..1
Adding formatting string feature to improve function flexibility.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 30 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h | 3 ++-
2 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/d
refine mes firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 62edf6328566..9194a53b7c14 100644
--
refine isp firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c
index 2a3f4668cb9b..215bae809153 100644
--- a
refine gpu_info firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 6711836054f9..a6af1
refine pmfw/smu firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c | 8 +++-
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 6 +-
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 6 +-
drivers/gpu/drm/amd/pm/swsmu/smu13/sm
refine vcn firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index 5e2b7c340724..8d65b096db90
refine imu firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c | 10 --
drivers/gpu/drm/amd/amdgpu/imu_v12_0.c | 10 --
2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
b/drivers/gpu/drm/amd/a
refine vpe firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
index 49881073ff58..bad232859972 100644
--
refine gfx6 firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index d0992ce9fb47..564f0b9336b6
refine sdma firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 8
drivers/gpu/drm/amd/amdgpu/cik_sdma.c| 11 ++-
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 11 ++-
4 fil
refine gmc firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 14 --
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 7 ++-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 ++
3 files changed, 8 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/d
refine gfx7 firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 27 +--
1 file changed, 13 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 8f19b6ae8d5b..d84
refine gfx8 firmware loadin
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 69 +--
1 file changed, 33 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 2f0e72caee1a..ed61
refine gfx10 firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 632061b25867..8
refine gfx11 firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 72676bfbac8c..
refine gfx9 firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 45 -
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 11 +++---
2 files changed, 26 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers
refine gfx12 firmware loading
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 6419f98e32b6..f37c
72 matches
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