OTG master.
Also move the disconnection to before the OTG master disable, since the
register is double buffered.
Reviewed-by: Dillon Varone
Acked-by: Rodrigo Siqueira
Signed-off-by: George Shen
---
.../amd/display/dc/optc/dcn32/dcn32_optc.c| 19 +--
.../amd/display/dc/optc
From: Charlene Liu
Copy StutterPeriod from DML2 into DML1 StutterPeriod parameter.
Reviewed-by: Muhammad Ahmed
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
Signed-off-by: Charlene Liu
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c | 2 ++
1 file changed, 2 insertions(+)
diff
This DC patchset brings improvements in multiple areas. In summary, we
have:
- Improve z8/z10 support
- Revert some of the VRR optimization
- Improve usb4 when using MST
Thanks
Siqueira
Cc: Daniel Wheeler
Aric Cyr (1):
drm/amd/display: 3.2.266
Charlene Liu (2):
drm/amd/display: allow
Cc: Muhammad Ahmed
Cc: Hamza Mahfooz
Cc: Rodrigo Siqueira
Cc: Aurabindo Pillai
Cc: Alex Deucher
Cc: Srinath Rao
Signed-off-by: Srinivasan Shanmugam
---
v2:
- Added explaination for power down & power up sequence (Rodrigo)
- Removed documenting return void. (Rodrigo)
.../amd/dis
Cc: Muhammad Ahmed
Cc: Hamza Mahfooz
Cc: Rodrigo Siqueira
Cc: Aurabindo Pillai
Cc: Alex Deucher
Cc: Srinath Rao
Signed-off-by: Srinivasan Shanmugam
---
.../amd/display/dc/hwss/dcn35/dcn35_hwseq.c | 66 +++
1 file changed, 39 insertions(+), 27 deletions(-)
diff --git
Cc: Hamza Mahfooz
Cc: Aurabindo Pillai
Cc: Rodrigo Siqueira
Cc: Alex Deucher
Cc: Srinath Rao
Signed-off-by: Srinivasan Shanmugam
---
drivers/gpu/drm/amd/display/dc/core/dc_state.c | 2 +-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3 ++-
2 files changed, 3 insertions(+), 2
Enable DWB for tested platforms only */
if (amdgpu_ip_version(adev, DCE_HWIP, 0) >= IP_VERSION(3, 0, 0))
init_data.num_virtual_links = 1;
Reviewed-by: Rodrigo Siqueira
From: Tom Chung
[WHY]
Prepare for enabling the Panel Replay feature
[HOW]
- Add some Panel Replay setting functions in DC
- Add the Panel Replay resource in dcn35_resource.c
- Add debug masks for Panel Replay
Acked-by: Rodrigo Siqueira
Reviewed-by: Leo Li
Signed-off-by: Tom Chung
with detile
buffer allocation, which dissallow subvp from being used
Reviewed-by: Dillon Varone
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
Signed-off-by: Relja Vojvodic
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
the expected worst case scenario.
Reviewed-by: Hansen Dsouza
Reviewed-by: Ovidiu Bunea
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd
From: Gabe Teeger
[Why]
Failing mode validation during dc_commit, leading to blackscreen with an
8k DP2 display during mode change.
[What]
Fix mixmatch between pipe and stream, which prevented us from
recognizing the link as DP2.
Reviewed-by: Dmytro Laktyushkin
Acked-by: Rodrigo Siqueira
From: Revalla
[why]
Move all init files to hwss folder.
[how]
moved the dcnxx_init.c and .h files into inside the hwss and cleared the
linkage errors.
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
Signed-off-by: Revalla
---
drivers/gpu/drm/amd/display/dc/Makefile | 2
and lane count and update
reported link capability.
- To calculate the bandwidth required for streams of dpia links
per host router and validate against the allocated bandwidth for
the host router.
Reviewed-by: PeiChen Huang
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
Signed-off
-by: Sung joon Kim
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index
From: Alvin Lee
For FPO and SubVP/DRR cases we need to ensure to program
OTG_V_TOTAL_MIN/MAX_SEL, otherwise stretching the vblank in FPO / SubVP
/ DRR cases will not have any effect and we could hit underflow /
corruption.
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin
be hardlocked.
Reviewed-by: Sung joon Kim
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
b/drivers
From: Nicholas Kazlauskas
[Why]
dc->idle_optimizations_allowed may be desynced with the hardware state.
[How]
Make sure we always exit out when dc_dmub_srv_exit_low_power_state is
called by removing the check.
Reviewed-by: Sung joon Kim
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicho
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource_helpers.c
b/drivers/gpu/drm/amd/display/dc/dcn32
From: Wayne Lin
link_rate sometime will be changed when DP MST connector hotplug, so
pbn_div also need be updated; otherwise, it will mismatch with
link_rate, causes no output in external monitor.
Cc: sta...@vger.kernel.org
Reviewed-by: Jerry Zuo
Acked-by: Rodrigo Siqueira
Signed-off-by: Wade
Lee
Acked-by: Rodrigo Siqueira
Signed-off-by: Relja Vojvodic
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk
dex().
- Updated link_dp_dpia_allocate_usb4_bandwidth_for_stream() and
set_usb4_req_bw_req() to always issue request bw.
Reviewed-by: PeiChen Huang
Acked-by: Rodrigo Siqueira
Signed-off-by: Meenakshikumar Somasundaram
---
.../dc/link/protocols/link_dp_dpia_bw.c | 221 --
.../dc/l
user setting in ABM config initialization.
Reviewed-by: Anthony Koo
Acked-by: Rodrigo Siqueira
Signed-off-by: Camille Cho
---
drivers/gpu/drm/amd/display/dc/dce/dce_abm.c | 4 ++--
drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c | 4 ++--
drivers/gpu/drm/amd/display/dc
-State
assertion), so block FPO if there's no plane for the FPO pipe.
Acked-by: Rodrigo Siqueira
Reviewed-by: Samson Tam
Reviewed-by: Chaitanya Dhere
Signed-off-by: Alvin Lee
---
.../display/dc/dcn32/dcn32_resource_helpers.c | 18 +++---
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
-by: Sung Lee
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
Signed-off-by: Josip Pavic
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 3 ++-
3 files changed, 10
From: "Leo (Hanghong) Ma"
[Why]
Certain HDMI modes failed at dml cap check for uncompressed video but
they can still be supported for compressed video.
[How]
Add HDMI capacity computations using fixed31_32 in dc side.
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
Signed-o
. Ensured that the p_state type is kept
updated by looping through the pipes within commit_planes_for_stream.
Acked-by: Rodrigo Siqueira
Reviewed-by: Alvin Lee
Signed-off-by: Relja Vojvodic
---
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 90 -
drivers/gpu/drm/amd/display/dc/core/dc.c
From: Alvin Lee
[Why]
There is some logic error where the wrong variable was used to check for
OTG_MASTER and DPP_PIPE.
[How]
Add booleans to confirm that the expected pipes were found before
validating schedulability.
Acked-by: Rodrigo Siqueira
Reviewed-by: Samson Tam
Reviewed-by: Chaitanya
Here we are at the end of the year, the last set of patches for DC. This
DC patch set brings improvements in multiple areas. In summary, we
highlight:
* Address SubVP issues
* Update DMUB
* Improve mechanisms for test
Thanks
Siqueira
Cc: Daniel Wheeler
Alvin Lee (4):
drm/amd/display: Fix
put_format;
uint32_t dgam_lut_mode;
uint32_t rgam_lut_mode;
+ // gamut_remap data for dcn10_get_cm_states()
uint32_t gamut_remap_mode;
uint32_t gamut_remap_c11_c12;
uint32_t gamut_remap_c13_c14;
@@ -148,6 +149,8 @@ struct dcn_dpp_state {
uint32_t gamut_remap_c23_c24;
uint32_t gamut_remap_c31_c32;
uint32_t gamut_remap_c33_c34;
+ // gamut_remap data for dcn*_log_color_state()
+ struct dpp_grph_csc_adjustment gamut_remap;
};
struct CM_bias_params {
Reviewed-by: Rodrigo Siqueira
DTN_INFO_BEGIN();
+
+ dcn10_log_hubbub_state(dc, log_ctx);
+
+ dcn10_log_hubp_states(dc, log_ctx);
+
+ dcn10_log_color_state(dc, log_ctx);
DTN_INFO("OTG: v_bs v_be v_ss v_se vpol vmax vmin vmax_sel vmin_sel h_bs h_be h_ss h_se hpol htot vtot underflow blank_en\n");
Reviewed-by: Rodrigo Siqueira
This simple commit adjusts part of the code style in some of the dc bios
files.
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
.../drm/amd/display/dc/bios/bios_parser2.c| 63 +--
1 file changed, 30 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu
From: Aric Cyr
This version brings along following fixes:
* Enable writeback.
* Add multiple fixes for DML2 and DCN35.
* Introduce small code style adjustments.
Acked-by: Rodrigo Siqueira
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion
From: Alex Hung
[WHAT]
Handle writeback requests and fill in the required information for DWB
programming and setup.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 3 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 159
Reviewed-by: Aurabindo Pillai
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 102d00a9a24f..9d3925603979
From: Alex Hung
[WHY]
drm_writeback requires to capture exact one frame in each writeback
call.
[HOW]
frame_capture is disabled after each writeback is completed.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +-
From: Harry Wentland
[WHAT]
Writeback connectors don't have a physical sink but DC still
needs a sink to function. Create a fake sink and stream for
writeback connectors
Reviewed-by: Alex Hung
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
From: Alex Hung
[WHAT]
Add a function to enable and disable DWB's frame captures.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 23 +++
.../gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h | 2 ++
From: Alex Hung
[WHAT]
Add a new field to keep track whether a crtc is previously
writeback-enabled.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 +
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
2 files
From: Alex Hung
[WHAT]
The enable and disable writeback calls need to be included in the
coressponding functions in dc_stream.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/core/dc_stream.c | 33 +++
From: Roman Li
[Why]
UBSAN errors observed in dmesg.
array-index-out-of-bounds in dml2/display_mode_core.c
[How]
Fix the index.
Acked-by: Rodrigo Siqueira
Signed-off-by: Roman Li
---
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 6 +++---
1 file changed, 3 insertions(+), 3
From: Harry Wentland
[WHY]
We need to track the dc_link and it would get confusing if
re-using the amdgpu_dm_connector.
[HOW]
Creating new amdgpu_dm_wb_connector.
Reviewed-by: Alex Hung
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
From: Alex Hung
[WHY]
Counter j was not updated to present the num of writeback_info when
writeback pipes are removed.
[HOW]
update j (num of writeback info) under the correct condition.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc_stream.c
From: Alex Hung
[WHY]
Hardware may require different warmup approaches - big buffer or
individual buffers.
[HOW]
Setup warmup for big buffer when it is required by specific hardware.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |
From: Alex Hung
[WHAT]
hw_points_num is 0 before ogam LUT is programmed; however, function
"dwb3_program_ogam_pwl" assumes hw_points_num is always greater than 0,
i.e. substracting it by 1 as an array index.
[HOW]
Check hw_points_num is not equal to 0 before using it.
Reviewed-by: Harry
From: Alex Hung
[WHY]
wb_enabled field is set to false before it is used, and the following
code will never be executed.
[HOW]
Setting wb_enable to false after all removal work is completed.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
From: Alex Hung
[WHY & HOW]
This is to replace 24a2efb3aa08 to check connector type to avoid
unhandled null pointer for writeback connectors.
Fixes: 310b5f1a3c9e ("drm/amd/display: Revert "drm/amd/display: Use
drm_connector in create_validate_stream_for_sink"")
Signed-off-by: Alex Hung
From: Harry Wentland
[WHY]
We will be dealing with two types of connector: amdgpu_dm_connector
and drm_writeback_connector.
[HOW]
We want to find both and then cast to the appriopriate type afterwards.
Reviewed-by: Alex Hung
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
From: Harry Wentland
[WHAT]
Prepare a virtual connector for writeback.
Reviewed-by: Alex Hung
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
.../gpu/drm/amd/display/dc/hwss/dcn31/dcn31_hwseq.c | 3 ++-
2
From: Harry Wentland
[WHAT]
We need to use this function for both amdgpu_dm_connectors
and drm_writeback_connectors. Modify it to operate on
a drm_connector as a common base.
Reviewed-by: Alex Hung
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
From: Harry Wentland
[WHY]
Writeback connectors are based on a different object:
drm_writeback_connector, and are therefore different from
amdgpu_dm_connector. We need to be careful to ensure code
designed for amdgpu_dm_connector doesn't inadvertently try
to operate on a drm_writeback_connector.
From: Alex Hung
[WHAT]
Create a drm_writeback_connector when connector signal equals
SIGNAL_TYPE_VIRTUAL.
Reviewed-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/Makefile| 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 +-
From: Alex Hung
Virtual stream encoder should not be a free match for thunderbolt or
usbc, and thus should be avoided.
Reviewed-by: Harry Wentland
Acked-by: Rodrigo Siqueira
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c | 5 -
1 file changed
caps(HDR,OLED...etc)
Reviewed-by: Sun peng Li
Acked-by: Rodrigo Siqueira
Signed-off-by: Ivan Lipski
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
b/drivers/gpu
From: Harry Wentland
[WHY]
Previously this only excluded build for a few amdgpu_dm
binaries which makes no sense.
[HOW]
Wrap the entire Makefile in "ifneq ($(CONFIG_DRM_AMD_DC),)"
Reviewed-by: Alex Hung
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
From: Dillon Varone
Add function to handle deep copying dml2 context.
Reviewed-by: Chaitanya Dhere
Acked-by: Rodrigo Siqueira
Signed-off-by: Dillon Varone
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +++---
.../drm/amd/display/dc/dml2/dml2_wrapper.c| 29
From: Dennis Chan
In previous case, Replay didn't identify the IRQ type, This commit fixes
the issues for the interrupt.
Reviewed-by: Robin Chen
Acked-by: Rodrigo Siqueira
Signed-off-by: Dennis Chan
---
.../display/dc/link/protocols/link_dp_irq_handler.c | 12 ++--
1 file changed
From: Yihan Zhu
Missing clock gating programming blocks memory power on from boot up.
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
Signed-off-by: Yihan Zhu
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 3 ++-
drivers/gpu/drm/amd/display/dc/resource/dcn35
trauss
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Kazlauskas
---
.../drm/amd/display/dc/dml/dcn35/dcn35_fpu.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c
b/drivers/gpu/drm/amd/d
to use
dynamically generated DSCCLK by DTO. So DSCCLK is programmable based on
current pixel clock and dispclk.
Reviewed-by: Chaitanya Dhere
Acked-by: Rodrigo Siqueira
Signed-off-by: Wenjing Liu
---
.../amd/display/dc/hwss/dcn32/dcn32_hwseq.c | 25 +
drivers/gpu/drm/amd/display
From: Charlene Liu
This is w/a: we need to keep domain 24 power up in driver side, and let
dmubfw handle it for S0i3. For last display unplugged, if OTG in PG, no
interrupt call back coming.
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
Signed-off-by: Charlene Liu
---
.../amd/display
From: Relja Vojvodic
HW registers were being read to quickly, causing incorrect values to be
logged after a clock frequency was changed
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
Signed-off-by: Relja Vojvodic
---
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 26
to skip_fallback_on_link_loss for clarity.
Reviewed-by: Meenakshikumar Somasundaram
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: George Shen
---
drivers/gpu/drm/amd/display/dc/dc.h | 8 +++-
.../amd/display/dc/link/protocols/link_dp_irq_handler.c | 6 --
.../amd
as
there are cases when we don't disable OTG/FIFO but FIFO is enabled when
it isn't supposed to be.
[How]
Removing the enable/disable FIFO entirely.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Signed-off-by: Nicholas Susanto
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c | 8
From: Chris Park
[Why]
BIOS FW info version 3.5 is introduced to support new ASICs, but it's
content is currently same as 3.4.
[How]
Include minor version 5 in parsing to enable support.
Reviewed-by: Dillon Varone
Acked-by: Rodrigo Siqueira
Signed-off-by: Chris Park
---
drivers/gpu/drm/amd
From: Johnson Chen
Add guard for NULL pointer access
Reviewed-by: Charlene Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Johnson Chen
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c
From: Charlene Liu
Rollback to new context for active display: this was previous tested
sequence. Avoid to do OTG master toggle is no active display at all,
this w/a was for fifo err.
Reviewed-by: Chris Park
Acked-by: Rodrigo Siqueira
Signed-off-by: Charlene Liu
---
.../display/dc/clk_mgr
From: Ilya Bakoulin
Changing PBN calculation to be more in line with spec. We don't need to
inflate PBN_NATIVE value by the 1.006 margin, since that is already
taken care of in the get_pbn_per_slot function.
Reviewed-by: Wenjing Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Ilya Bakoulin
leave the OTG running but DIO/PHY off you can hit this in
cases where you have multiple displays as well it syncs with the first
active OTG, so if you had OTG[0] mapped and FIFO off you'd hit it even
if OTG[1] was mapped and had FIFO
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Sign
From: Alvin Lee
VBIOS has suggested to use channel_width=2 for any ASIC that uses vram
info 3.0. This is because channel_width in the vram table no longer
represents the memory width
Reviewed-by: Samson Tam
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display
From: Josip Pavic
[Why]
Larger data blocks are expected to be transferred between driver and FW
in the future.
[How]
Embiggen the scratch buffer to a cromulent size.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Signed-off-by: Josip Pavic
---
drivers/gpu/drm/amd/display/dmub
-by: Rodrigo Siqueira
Signed-off-by: Krunoslav Kovac
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index f3a9fdd2340d
-by: Charlene Liu
Acked-by: Rodrigo Siqueira
Signed-off-by: Daniel Miess
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_dccg.h | 32 ++
.../gpu/drm/amd/display/dc/dcn35/dcn35_dccg.c | 62 ++-
.../gpu/drm/amd/display/dc/dcn35/dcn35_dccg.h | 51 +++
3 files changed, 143
Acked-by: Rodrigo Siqueira
Signed-off-by: Lewis Huang
---
.../drm/amd/display/dc/bios/bios_parser2.c| 4 +-
.../drm/amd/display/dc/bios/command_table2.c | 12 ++--
.../drm/amd/display/dc/bios/command_table2.h | 2 +-
.../gpu/drm/amd/display/dc/dc_bios_types.h| 2 +-
drivers/gpu/drm
by treating only 1st remote sink in topology as an
encoder.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Signed-off-by: Michael Strauss
---
drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2
From: Charlene Liu
Fix issue when override level bigger than default. Levels 5, 6, and 7
had zero stutter latency, this is because override level being
initialized after stutter latency inits.
Reviewed-by: Syed Hassan
Reviewed-by: Allen Pan
Acked-by: Rodrigo Siqueira
Signed-off-by: Charlene
From: Alvin Lee
Optimize fast validation cases to only validate the highest voltage
level. This works because during fast validation we only care if the
mode can be supported or not (at any vlevel).
Reviewed-by: Aric Cyr
Acked-by: Rodrigo Siqueira
Signed-off-by: Alvin Lee
---
.../dc/dml
the incorrect
vlevel.
[how]
Added ODM check to apply the correct ODM policy before querying DML.
Reviewed-by: Alvin Lee
Acked-by: Rodrigo Siqueira
Signed-off-by: Relja Vojvodic
---
.../display/dc/dcn32/dcn32_resource_helpers.c | 26 +++
.../drm/amd/display/dc/dml/dcn32
(2):
drm/amd/display: Add ODM check during pipe split/merge validation
drm/amd/display: Added delay to DPM log
Rodrigo Siqueira (2):
drm/amd/display: Adjust code style
drm/amd/display: Update code comment to be more accurate
Roman Li (1):
drm/amd/display: Fix array-index-out-of-bounds
Hi Sagar,
First of all, thanks for your patch.
On 10/25/23 08:04, Sagar Vashnav wrote:
Add kernel documentation for the dc_stream_forward_crc_window
Signed-off-by: Sagar Vashnav
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +
1 file changed, 13 insertions(+)
diff --git
Sharing code with other OSes is confusing and raises some questions.
This patch introduces some explanation about our upstream process with
the shared code.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu
Introduce OPP as part of the kernel documentation.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 12
drivers/gpu/drm/amd/display/dc/inc/hw/opp.h | 16
This commit adds a contribution list for display under the kernel
documentation with some first suggestions. It also drops an old TODO
list from the display folder.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
.../amdgpu
This commit adds a kernel-doc entry for the MPC block. Since it enabled
the kernel-doc to parse some of the documentation in the mpc.h file,
fixing some of the comments was required.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 12
.../gpu/drm/amd/display/dc/link/hwss/link_hwss_dio.h | 10 ++
2 files changed, 22 insertions
Create the HUBP documentation page and add the doc references to extract
the HUBP code documentation.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
.../gpu/amdgpu/display/dcn-blocks.rst | 18
This commit introduces basic DPP information and the struct scan for
code documentation.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
.../gpu/amdgpu/display/dcn-blocks.rst | 12 +
drivers/gpu/drm/amd/display
with the display code.
Thanks
Siqueira
Rodrigo Siqueira (8):
Documentation/gpu: Add basic page for HUBP
Documentation/gpu: Add simple doc page for DCHUBBUB
Documentation/gpu: Add kernel doc entry for DPP
Documentation/gpu: Add kernel doc entry for MPC
Documentation/gpu: Add entry for OPP
Enable the documentation to extract code documentation from dchubbub.h
file.
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Hamza Mahfooz
Signed-off-by: Rodrigo Siqueira
---
Documentation/gpu/amdgpu/display/dcn-blocks.rst | 12
drivers/gpu/drm/amd/display/dc/inc
On 10/20/23 15:38, Harry Wentland wrote:
On 2023-10-20 17:26, Rodrigo Siqueira wrote:
The first commit of this series just sets the variable using_dml2 to
false for all ASICs that do not require it. The second commit adds a fix
to the DC sequence that calls a DML2 operation in ASICs
Cc: Roman Li
Cc: Qingqing Zhuo
Cc: Daniel Wheeler
Cc: Alex Deucher
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn201/dcn201_resource.c | 1
version.
Cc: Vitaly Prosyak
Cc: Roman Li
Cc: Qingqing Zhuo
Cc: Daniel Wheeler
Cc: Alex Deucher
Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2")
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 9 +
1 file changed, 5 insertions(+), 4
: Alex Deucher
Rodrigo Siqueira (2):
drm/amd/display: Set the DML2 attribute to false in all DCNs older
than version 3.5
drm/amd/display: Fix DMUB errors introduced by DML2
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 9 +
drivers/gpu/drm/amd/display/dc/dcn10
Deucher
Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2")
Signed-off-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
b/drivers/g
Hi Nathan,
(+Hamza)
First of all, thanks a lot for your feedback. You can see my comments
inline.
On 10/17/23 11:22, Nathan Chancellor wrote:
Hi Rodrigo,
On Mon, Oct 16, 2023 at 08:19:16AM -0600, Rodrigo Siqueira wrote:
Stephen discovers a stack size issue when compiling the latest amdgpu
This commit is the last part of the fix that reduces the stack size in
the DML2 code.
Cc: Stephen Rothwell
Cc: Alex Deucher
Cc: Roman Li
Cc: Chaitanya Dhere
Fixes: a2815ada8616 ("drm/amd/display: Introduce DML2")
Signed-off-by: Rodrigo Siqueira
---
.../amd/displ
Stephen discovers a stack size issue when compiling the latest amdgpu
code with allmodconfig. This patchset addresses that issue by splitting
a large function into two smaller parts.
Thanks
Siqueira
Rodrigo Siqueira (2):
drm/amd/display: Reduce stack size by splitting function
drm/amd
From: Sung Joon Kim
[why]
There are cases where more than 1 stream can be mapped to the same
surface. DML2.0 does not seem to handle these cases.
[how]
Make sure to account for the stream id when deriving the plane id. By
doing this, each plane id will be unique based on the stream id.
From: Gabe Teeger
[what]
does_configuration_meet_sw_policies check was not done in the
validate_only portion of dml2, so some unsupported modes were passing bw
validation, only to fail the same check later in validate_and_build. now
we add the check to validate_only.
Also add line in
From: Taimur Hassan
Rework dml2_map_dc_pipes to keep the logic clean.
Reviewed-by: Chaitanya Dhere
Acked-by: Qingqing Zhuo
Signed-off-by: Qingqing Zhuo
Signed-off-by: Taimur Hassan
---
.../amd/display/dc/dml2/dml2_dc_resource_mgmt.c | 9 +
From: Daniel Miess
Update DML2 with replay vblank logic found in DML1.
Reviewed-by: Charlene Liu
Acked-by: Qingqing Zhuo
Signed-off-by: Daniel Miess
Signed-off-by: Qingqing Zhuo
---
.../amd/display/dc/dml2/display_mode_core.c | 25 ---
1 file changed, 22 insertions(+), 3
101 - 200 of 1463 matches
Mail list logo
