Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register

2022-07-18 Thread Alex Deucher
Applied. Thanks! On Thu, Jul 14, 2022 at 12:45 PM Maíra Canal wrote: > > On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable > should be written into the control register instead of 0. > > Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)") > Fixes: 2285b91c

Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register

2022-07-14 Thread André Almeida
Às 13:44 de 14/07/22, Maíra Canal escreveu: > On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable > should be written into the control register instead of 0. > > Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)") > Fixes: 2285b91c ("drm/amdgpu/dce8: simplify h

Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register

2022-07-14 Thread André Almeida
Às 16:14 de 14/07/22, Alex Deucher escreveu: > On Thu, Jul 14, 2022 at 3:05 PM André Almeida wrote: >> >> Hi Maíra, >> >> Thank you for your patch, >> >> Às 13:44 de 14/07/22, Maíra Canal escreveu: >>> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable >>> should be written into

Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register

2022-07-14 Thread Alex Deucher
On Thu, Jul 14, 2022 at 3:05 PM André Almeida wrote: > > Hi Maíra, > > Thank you for your patch, > > Às 13:44 de 14/07/22, Maíra Canal escreveu: > > On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable > > should be written into the control register instead of 0. > > > > Why? I do

Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register

2022-07-14 Thread André Almeida
Hi Maíra, Thank you for your patch, Às 13:44 de 14/07/22, Maíra Canal escreveu: > On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable > should be written into the control register instead of 0. > Why? I do see that tmp was unused before your patch, but why should we write it i

[PATCH 01/12] drm/amdgpu: Write masked value to control register

2022-07-14 Thread Maíra Canal
On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable should be written into the control register instead of 0. Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)") Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code") Signed-off-by: Maíra Canal --- drivers/gpu