So did you use the low latency Patch and threads with Sched_FIFO?
Did your system slow down to noticable amounts?
I built a driver for an intersil light sensor and this one has some issues
with the amount of time that elapses between succesive reads of the reg
values. So I may or may not need th
It seems that the SCHED_FIFO and 'low latency desktop' fixed the
situation. Now I have 200uS latency, which is sufficient.
Thank you
Rob
On Apr 20, 11:53 am, robstoddard wrote:
> I considered polling. I'll give it a shot.
>
> I am at current removed from DSOs and logic analyzers (just order
I considered polling. I'll give it a shot.
I am at current removed from DSOs and logic analyzers (just ordered
one, it will be in tomorrow night) so I can't be absolutely sure of my
current solution, since printks tend to slow things down to a crawl in
my driver, but I think setting SCHED_FIFO in
