"IBM Mainframe Assembler List" wrote on
02/23/2024 03:54:52 PM:
> Simply? In someone else's controlled environment?
That is why I said "simply" (i.e., in quotes). ;-)But, it
would do for testing on a single program source.
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eginning of your assembler source program and --
voila! Naturally, you would need those exit program in place, too.
PROCESS EXIT(INX(EXNAME),LBX(EXNAME),PRX(EXNAME))
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"IBM Mainframe Assembler List" wrote on
02/23/2024 11:38:24 AM:
> IEABRC is z/OS, but ASMMSP is part of the HLASM Toolkit. Or is the
> toolkit only for z/OS and z/VM?
HLASM Toolkit is available for z/VSE as a separate product --
which we don't have.
Sincer
"IBM Mainframe Assembler List" wrote on
02/23/2024 11:27:00 AM:
> Is there anything in ASMMSP or IEABRC that depends on being in open
code?
I don't have those copybooks (I'm on z/VSE) so someone else will
have to answer that question.
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the copybook usage, too.
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PDF.
> <https://urldefense.com/v3/__http://www.lbdsoftware.com/
> xmitip.html__;!!E0nbmg29qrX0lQ!YHkuqIGmwgXl-
>
vC9A9xrsSgRpjm7tFLFXAGTAlimNlS3HkFL2iPn6eFNFlwno1ETfDHaUjdo87g2HVGJb4A2maH6ZA5Hajg8fwZGSME
> $ >
That site's data was moved to: https://github.com/lbdyck
S
or these -- only the object module. So, I'm using a
V-constant.
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ut everything was already relocatable by that
time, also. I think that happened with the transition from DOS/VS to
DOS/VSE in 1979.
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(...)|RMODE(...)}<,{RMODE(...)|AMODE(...)}>
INCLUDE <,(sectionlist)>
REP address ...
ENTRY
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Da
05378 005300 005300 RXVSAMXA 24 24
RXVSAMXR 506778 506778 006700 006700 RXVSAMXR 24 24
DTEMAN507678 507678 007600 007600 DTEMAN31 ANY
IEANTCR 507C78 507C78 007C00 007C00 IEANTCR 31 ANY
IEANTRT 507CC0 507CC0 007C48 007C48 IEANTRT 31 ANY
Sincerely
s was a z/VSE question. But, crossing my fingers, I
checked the manual for the z/VSE Linkage Editor and I didn't see an ORDER
statement among the choices. :-(
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003490 RXVSAMBK 24 24
RXVSAMBR 504708 504708 004690 004690 RXVSAMBR 24 24
RXVSAMXA 505A08 505A08 005990 005990 RXVSAMXA 24 24
RXVSAMXR 506E08 506E08 006D90 006D90 RXVSAMXR 24 24
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the following plan.
CSECT 0
J START
DATA LOCTR
eye-catcher
CODE LOCTR
START *
...
DATA LOCTR
LTORG
...
CORG 0,256
END
That ended up generating binary zeroes to push the CODE area to
location 100 -- which is exactly what I wanted.
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dir
.
>
> macro ,
> corg ,
> org +()+()*((*-+()-()-1)/())
> mend ,
Perfect. Thank you very much.
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ps I should clarify then... My "static" areas are statically
allocated -- not, necessarily, that they will not be modified. So, is
there a way to force a 256-byte boundary between my static data allocation
my static code allocation?
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code area starts on the next 256-byte boundary?
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**
"IBM Mainframe Assembler List" wrote on
11/28/2023 10:30:28 AM:
> HEXTABLE DC*-192
Sorry, that is a type. It *was* as follows.
HEXTABLE EQU *-192
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I added the unneeded part of the
translate table and all is well.
HEXTABLE DC*-192
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0(2,R1),HEXTABLE
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This email
Then, to confirm... When I change BAS to JAS, I don't have to
change BASR at all. Correct?
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for APAR PH57717 (very recent) to get correct results.
All very good information. Thank you.
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OK, I've tested it now. I was expecting that DEQUOTE() would
receive any of the caller's doubled-aposts as a single apost that,
therefore, needed to be re-doubled. So, I removed the use of DOUBLE() and
the results are usable. Thanks.
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('')
DCCL4'' AUTHOR
SETC DEQUOTE('')
SETC DOUBLE('')
DCCL8'' DATE
*
CODE LOCTR
HDR DS0H
...etc...
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t 5 minutes or so you find the answer yourself. Sorry to bother you
all. ;-)
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functions supported by the assembler? ..or is it only in macro
language? But, still, where are these documented? Thanks.
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"IBM Mainframe Assembler List" wrote on
11/21/2023 04:32:27 PM:
> As to solutions for data, look up the LOCTR assembler instruction.
Thank you for the informaiton and the explanation.
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there is some caching issue
with having data using the same base register as code -- or some such. Are
there other solutions for hard-coded and LTORG constants?
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com/docs/en/zos/2.1.0?
> topic=xct-ieabrcx-relative-branch-macro-extension__;!!
> E0nbmg29qrX0lQ!
>
fM5la5Qkky51NLbVsKXkFMo1UZqEW6ISw8l1woQYjY1GqLFOoDamVPYYB03l25a8Hv1QL_baeJkLgbEGLYRYcQVzSeMGuO968NC1lNs
> $ >
Thanks, but the IEABRCX macro doesn't exist in the z/VSE world.
from a literal +/-32K to an actual +/-64K range. Thanks! ;-)
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u. But if you allow someone to do a thing
then they just might do it. ;-)But, now that I know the basic
relative jump is at least +/- 32K, I don't think I need to allow for more
than that. Thanks.
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ot;normal" relative jump is the signed, 16-bit variety
mentioned (15-bit relative target with left-most bit as the direction).
How is that +/- 65K? Wouldn't that be +/- 32K? Or are there actually
three varieties -- 16-bit, 32-bit, and the "even longer ones" you hinted
at?
Sincerely
, ELSE, and ENDF. These
also arbitrarily allow nesting up to 8 levels.
IF condition,AND/OR,condition
AND condition,AND,condition
... as much code as the user desires between here ...
ELSE
... as much code as the user desires between here ...
ENDIF
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the entire CSECT is less than 4K (if that makes
any difference).
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ss constant with LOAD instead of just using LOAD
ADDRESS -- as was mentioned?
USING *,R11
TARGET DS 0H
DROP R11
...
USING *,R12
B TARGET
DROP R12
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RTN ADDRESS
LAR3,PCHAREA GET I/O AREA ADDRESS
STM R2,R3,INLCPCHA PUT ADDRESSES IN CONTROL BLOCK
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"IBM Mainframe Assembler List" wrote on
11/08/2023 04:13:09 PM:
> read also about limiting the range of a USING
OK, that definitely sounds useful. Didn't know that could be
done. Thanks.
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ZON3
...
BAS R2,GETVAR
...
BAS R5,SETVAR
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should I be placing these exit routines in
their own programs? Or if having them "internal" as described, is there
something else I should be doing to avoid overlapping base registers?
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unction that I have this
coding. Originally I had this:
SHVPARMB DS5F
OISHVPARMB+(5*4-4),X'80'
And now I have this:
SHVPARMB DS5F
SHVPLAST EQU *-4
OISHVPLAST,X'80'
You have some other suggestion for how to handle this?
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resulting load module -- rather than letting the linkage editor include it
wherever it wants. Case in point for that last situation is the stub
routines for CICS and/or DLI/IMS.
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ingle load module is the result. But multiple PHASE statements can be
interspersed in SYSLNK to create multiple load modules in a single
execution of the linkage editor.
I did work in a couple of MVS/SP shops but I was not as familiar
with the compile processes there and always created only lo
hat my Notes client generates for replies
with an internet-style history. Apparently, Notes sees your post as
coming from the list rather than from you. Sorry. ;-)
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All you really want is the alignment after all,
> > not any actual storage.
Yes, the following are interchangeable because of the 0
duplication factor. But, I, too would prefer to see DS rather than DC.
;-)
DC 0H
DS 0H
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"IBM Mainframe Assembler List" wrote on
10/18/2023 02:35:40 PM:
> On Wed, 18 Oct 2023, at 19:09, Dave Clark wrote:
> > However, the following is the solution I'm actually going with.
>
> > LAR0,SHVPARM1 GET ADDRESS OF PARM 1
> > LAR1,SHVPAR
"IBM Mainframe Assembler List" wrote on
10/18/2023 01:56:58 PM:
> On 10/18/23 11:49:12, Dave Clark wrote:
> > ...
> > The z/VSE CALL macro does not have those last two keywords.
But,
> > I can just code ORG *-2 after the CALL to accomplish the same th
ot have those last two keywords. But,
I can just code ORG *-2 after the CALL to accomplish the same thing.
Thanks.
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plication factor?
SHVPARMB DS5F
SHVPLAST EQU *-4
OISHVPLAST,X'80'
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0,SHVPARM1
ST0,0(0,1)
LA0,SHVPARM2
ST0,4(0,1)
LA0,SHVPARM2
ST0,8(0,1)
LA0,SHVBLOCK
ST0,12(0,1)
LA0,SHVPARM5
ST0,16(0,1)
OI16(1),X'80
BALR 14,15
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"IBM Mainframe Assembler List" wrote on
10/18/2023 11:56:55 AM:
> Why not use the CALL macro with the VL parameter to mark the end of the
list?
Because I don't appreciate the in-line parameter list it
generates.
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definition? I ask, because I would rather not hardcode the following to
set the end flag for the list.
OISHVPARMB+(5*4-4),X'80'
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(937
DEQUEUE AND CONTINUE
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ENDSEL ,
>
> No need for a placeholder instruction.
Thanks. Yes, that would work but I don't like how it looks.
Because, to a COBOL programmer, it looks like an OR condition as it is in
COBOL. I wanted the placeholder instruction so that even a COBOL
programmer won't mistake th
"IBM Mainframe Assembler List" wrote on
09/25/2023 04:44:08 PM:
> What do you need other than one of:
> BCR 0,0
> DS0H
> ???
I found what I wanted in a different manual. I'm using NOPR 0 for
this.
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IS the best way to do this and I don't see a NOP or NOOP -- as I
would expect. What am I missing?!?
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d. It is a little difficult to debug an appendage routine when
it runs as an extension of the supervisor. Suggestions anyone?
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Otherwise, since the previous EXCP for the ERASE-WRITE worked just
fine (the requisite screen does correctly appear on the device), I don't
see how the device can be unavailable. But, if your interpretation is
corerct, how would I determine if the device is not ready?
Sincerely,
Dav
. However,
when my program goes to queue up the NOOP, I get back CCB status x'0C40'
and I can't figure out why. Anybody else have some idea?
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SET RC VALUE
XR R15,R15 CLEAR REGISTER
IC R15,MYCCB+4 SET RESULT VALUE
BRETERRGO RETURN ERROR
ENDIF ENDIF
I haven't tested this, yet, though. Does that all look correct?
Sincerely,
Dave Cla
ape (which is now not supported).
In my case, I am using a channel appendage routine to synchronize
native 3270 I/O. Basically, after writing to the 3270 device, I can't read
immediately and must wait for an attention interrupt to tell me when the
3270 device has data to be received.
Sincerely
So, the only reason for using a format-1 CCW is so that the I/O
buffer can reside in 31-bit space?
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the first question or point me to a definitive manual would be appreciated.
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. I guess I'll just have to drop that validation.
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"IBM Mainframe Assembler List" wrote on
08/19/2023 11:34:03 AM:
> However, I would agree that a custom data type might be a
> suitable solution, for example a lower case letter.
Thanks.
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ing, my DF macro accepts an optional parameter that
names the flag byte.
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'
MEXIT
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*
Th
ction will query it.
Thanks.
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*
Th
andard way of defining
a bit mask, I want some way of making sure that the operand for the SF,
CF, and TF macros was correctly defined.
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type for the resulting equated bit mask.
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cting a unique
data type designation? Note that the programmer would still be able to
use whatever format (binary, hexadecimal, character, numeric, etc) for the
bit mask operand of the DF macro, but the DF macro would assign its own
(override the) data type for the resulting equated bit mask.
acros.
OK, I'd call that multiple masks. Thanks.
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operations".
Thanks. To me, it just sounds like a bit mask that has more than one bit
set (and to test) at the same time. But I don't see how this scenario
doesn't support that -- as it is all part of the same mask-- so, you must
be talking about something else. ;-)
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Dav
named base location assuming an immediately prior 1-byte flag
field definition) or absolute mask flags (that have a named base location
allowing for a multi-byte flag field definition using BASE+0, BASE+1,
BASE+2, etc.). Thanks.
MACRO
DF,,DEFINE FLAG BIT(s)
...
Sincerely,
D
AG,B'1000' *
.* *
.* NOTE: See also the SF macro and the CF macro.*
.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
.BEGIN ANOP
TM,L' TEST FLAG BIT(s)
MEND
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and the CF macro.*
.* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
TM,L' TEST FLAG BIT(s)
MEND
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END TEST
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This
'flag
Ratz! Those macros are not on my system. ;-b
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hmetic.
10 TEST DC XL4(LDAP_AUTH_ENABLED)
** ASMA035S Invalid delimiter - (LDAP_AUTH_ENABLED)
** ASMA435I Record 10 in SYSIPT on volume:
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to an address
constant. But, I tried it and it works as desired. Thanks.
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(
It makes more sense to me (and is self-documenting) to code it
this way.
FLAGS DC A(LDAP_AUTH_ENABLED+TRACE)
But that yields aligned storage, correct? Is there a way to
achieve the same result but without aligned storage?
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eans LCLC does not require the leading
ampersand but in all other uses the leading ampersand is required -- and
it is the same variable.
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ing bit and byte positions do
not change the comparison, it is not necessary to
continue comparing unequal operands beyond the
first unequal bit pair.
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"IBM Mainframe Assembler List" wrote on
06/12/2023 07:07:50 PM:
> -as opposed to what?
The operands are treated logically, bit-by-bit for their length,
as opposed to the full fields treated numerically as a whole.
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Dave Clark
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ong name, the VSE linkage editor won't resolve the external
addresses. As far as I know, at this point, the V-constant is the only
way in VSE for the linkage editor to resolve the external reference.
Sincerely,
Dave Clark
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d correctly even
if the actual wording is nonsensical.
I'll not argue it further.
Sincerely,
Dave Clark
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nary/packed) comparison.
Sincerely,
Dave Clark
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*
Thi
"IBM Mainframe Assembler List" wrote on
06/07/2023 01:22:23 PM:
> So where does this "Logical" come from? I'm sure it's something obvious!
It is a character (hexadecimal) comparison vs. a numeric
(binary/packed) comparison.
Sincerely,
Dave Clark
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executables IBM supports only
the VSE Librarian (LIBR) libraries.
Sincerely,
Dave Clark
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libraries would be found. I also just checked
my system and there is no CEEPCALL macro. I have all the other macros you
referenced. Hmmm...
Sincerely,
Dave Clark
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AP and it wasn't just compiled
into the LDAP client that IBM provided us.
By the way... This is a z/VSE shop we're talking about here. ;-)
Sincerely,
Dave Clark
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311
links (binds), but when I run it the output is "ECTEXT".
That is very helpful. Thank you.
Sincerely,
Dave Clark
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compiler. We just have the provided C runtime
libraries.
Sincerely,
Dave Clark
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d_s
ldap_search_s
etc.
Sincerely,
Dave Clark
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*
Thi
long C function
names to the C runtime libraries?
Sincerely,
Dave Clark
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see an example of -- how to connect a C
function name to the object that would be found in the system library. In
RPG/ILE you create a procedure prototype that connects an internal RPG
procedure name to the external C function name. How do I do something
equivalent to that in HLASM?
Sincerel
with HLASM code
...
PRINT NOGEN
END START
Sincerely,
Dave Clark
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or TSO. Thanks for the info.
Sincerely,
Dave Clark
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use with
programs or processes that are aware of the REXX environment and can
return their output via ARXOUT.
Sincerely,
Dave Clark
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*
;noit
can't".
>
> /* Rexx */
> /* Capture WTO from BATCHPGM */
> xtrp = outtrap("zdsp.")
> address attchmvs "BATCHPGM"
> xtrp = outtrap("OFF")
> say "ZDSP.1="zdsp.1
I can't speak to zOS or TSO. But I have done this in zVSE usin
ling in the END statement keeps
this information with the source.
//SYSLIN DD *
NAME LMOD(R)
ENTRYLMOD
INCLUDE IN
Sincerely,
Dave Clark
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: a non-assembler had an assembler answer.
Yep, the linker/loader/binder did it but an assembler statement
change "fixed" it. Interestingly enough, a linker/loader/binder ENTRY
statement would have fixed it, too.
Sincerely,
Dave Clark
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