A 4 byte address field in virtual storage has one updater and many readers
If using load and store instuctions, will the readers always see a complete
(valid) address, or could a CPU see a partially updated field while a store is
in progress on another CPU?
Is the answer any different for other
Hi Everyone, thanks for the answers. I did read the POP, but obviously not hard
enough. (It is never an easy read).
The block concurrency section explains it perfectly. The fullword is aligned so
all should be good. The question about MVC was just out of interest.
Thanks.
Joe
Yes, your illustration is exactly what I was concerned about. My instinct was
CS was just about updaters of storage, and not readers, so there must be some
other type of protection for readers.
Thanks, Joe
If you can assemble IKEA furniture, you can assemble anything.
I would restructure to open/close the DCB once
Here using -ve value to indicate open has failed, or could use flags to track
DCB status
* Message is in WORKMSG on arrival here
LTR4,MYDCB@ Get DCB address
BM WRITTEN Previous open failed, skip
Thanks for the replies, much appreciated.
We do have current processors, just my knowledge that is out of date :)
The factor might not be a whole number, which is why I thought of FP, but
I can see I can follow the multiply by a 64 bit divide by 100 to get a
percentage.
I take it the 'G' instruct
After such a great response to my last post, I thought I would try here
again for some useful advice on the best design for a program I am about to
write.
I have a mainline program that reads an input file and will then pass a
record to a subtask to process.
The subtask has a work cycle
MQPUT messs
Thanks to everyone for the response to this, your insight will definately
save me time, and I'll end up with something better than I would have on
my own.
I read up on the PLO instruction and got a headache, same type I get when
I read how DAT translation works :) I will probably stick with CDS or
Re the ECB posting, I still don't get it..sorry.
The agreement seems to be the the subtasks clears the ECB with a blocked
instruction as soon as it comes out of the wait. Well actually after he has
checked the post code, but there is no guarantee he will be dispatched before
the poster.
Consider
Th
Quote
"There are three queues - a requestor que, a process que and a reuseable
element que.
assuming que elements have the first word of which is the ptr to the next
que element, the requestors push elements to the top of the requestor que
with a single CS. The elements are therefore in reverse
"Please stay in touch and let us know how you are proceeding."
I completed the program. I can now drive a flash copy of our IMS system
using the messages extracted from the production IMS log, and requeued via
MQ/OTMA, also checking the output messages produce matche what is expected.
This means
This is a great thread. It is great to see someone enthusiastic about
learning assembler.
Your EODAD routine looks like a potential problem. The access method calls
your EODAD inside the get. Here you would normally set a flag to say EOD
occured and return to operating system (BR14), and test this
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