Someone wrote:
> Thought it was a double word
> As in DS D
It is a doubleword, specifically a long (64 bit) floating point type.
And yes,
DS D
and
DS 0D
are commonly used when floating point is not intended.
And as Fortran programmers would know, E is the short (32 bit) fl
Bernd wrote:
> We also had a self-written batch debugger, which relied completely on
> S0C1 and SPIE to do its instrumentation and implement the breakpoints;
> at least in the first version.
Reminds me of a debugger I used with Orvyl/370 in S/370 days.
I believe it used SVC 255 for breakpoint
Shmuel (Seymour J.) Metz wrote:
> No; it is guarantied to generate a program 001 interrupt.
> You only get an ABEND S0C1 if there is no SPIE/ESPIE exit.
I suspect that some use S0C1 as shorthand, and as you note
incorrect, description for program interrupt 1.j
It might be that some SPIE routines
Nothing against discussions on how to write fast code, but I don’t believe that
this is normally necessary.
About 20 years ago, I was counting words, not just how many, but how many of
each word, on gigabytes of text.
(Full text US patents for two years.) I did it in Java (with JIT compiler o
> Maybe I'm missing something, as this is a bit trickier than the usual
> shlop, but wouldn't it be more efficient to OI the last byte of &TARGET
> with x'F0', and skip the MVZ? Using =C'0123...'-C'0' for the TR table of
> course.
Maybe you are planning to do this a few billion times.
Otherwis
> Yes. My question was "In a called module, how do we determine
> if it was called dynamically or statically”
The whole design, since OS/360, is that you don’t.
If you want to know, pass an argument to the load module that has a different
value for the dynamic case.
Using LINK, your module is
> Sorry for the confusion caused. I strongly agree this is a basic question
> and I too understand the Static, all the loads will be loaded in to main
> memory and the load will be placed in to the main memory during execution
> time, Dynamic. We can give Call macro and Load macro for the same. My
For those doing time conversion, posix (used by most unix systems)
uses the epoch of Jan. 1st, 1970.
To convert from Jan 1st, 1900 to 1970, add -2208988790 seconds.
I found this from:
http://www.epochconverter.com/
But otherwise, it is 70 years with 17 leap days.
-- glen
> SRLG uses a "source" and "target" register as well as #bits.
> STCKE MILLSECS
> LG R1,MILLSECS # IGNORE SECOND DOUBLE WORD
> SRLG R1,R1,5 # SCOOT RIGHT 5 BITS
> DSGF R1,=F'100' # DIVIDE BY A MILLION
> CGHI R0,5
As mentioned previously, the ability to virtualize depends on
instructions that can tell problem from supervisor state need
to trap in problem state.
The instruction I remember wondering most about when I was first
learning S/370 assembler is STIDP. But that was before I knew
about virtualizatio
Remembering how the bits are stored in the FAT12 table,
you could alternate between entries with the A first and last.
It makes the table lookup code slightly more complicated, but allows
for aligned A entries. This probably only makes sense for really
big tables with hundreds or thousands of ent
> "Tony Harminc" wrote:
(snip)
>L R14,R4
(snip)
> This sets R14 to the address of the adcon in the entry you just found
> in the table (or it would if the above-mentioned boundary alignment
> problem wasn't there). You need
No, this loads R14 from an address ne
As well as I know it, Macro-11, the assembler for the PDP-11,
has local labels with the scope delimited by non-local labels.
From: https://en.wikipedia.org/wiki/MACRO-11
.TITLE HELLO WORLD
.MCALL .TTYOUT,.EXIT
HELLO:: MOV #MSG,R1 ;STARTING ADDRESS OF STRING
1$: MOVB
someone wrote:
> I was raised to do single-instruction branches thus:
> TM FLAG,BIT Is the flag bit set?
> BO*+8Yes, skip next instruction
> L R15,SOMEVALNo, get the value
> *+8 DS0H
> Yes, of course I realize
OK, here are the macros as I use them, with the test for host machine removed.
They come from the HRTPB360 program that is part of HASP.
Note that OS/360 assemblers support BAS and BASR, possibly for the 360/67.
-- glen
*** V00
(someone wrote)
"I may be wrong but I have the Impression hat the 360/20 version of
BAS/BASR (that machine's equivalent to BAL/BALR had a different op
code from the current BAS/BASR."
I have assembled BAS and BASR with the Tachyon assemmbler with the
right X'4D' and X'0D' opcodes. I
The detail on the instructions are in:
httt://www.bitsavers.org/pdf/ibm/360/funcChar/A26-5847-3_360-20_funChar_Apr67.pdf
The HRTBP360 program that IBM still distributes, I am told, with HASP,
uses macros for the 360/20 specific instructions. (It was written
to assembler with OS/360 or OS/VS2 ass
"The OP said he was working with code for a model 20."
That was only barely a true S360 and had a few
instructions peculiar to it."
Yes. XIO is the I/O instruction that reads or writes.
Like other 360's, I/O is asynchronous. You have to test
(with TIOB) to see if it is done yet.
With 8K
Thanks all for the help with this one. I have known for a long
time that the assembler could generate absolute addresses, but
never asked why. For those still following, here is the program
that reads the object deck:
BASR 11,0-2: 0DB0
XIO 78(19,11),80 0: D012B04E0
(snip, I wrote)
>>I wonder if USING 0,0 and USING 4096,1 should work correctly.
>What are you trying to accomplish? There are three forms of USING,
>and all three require an address as the first operand. This is given as
>a label to tell the assembler that the address of that label is in the
>r
Roger wrote:
> I don't think R0 has ever worked as a base register. Try another.
(after I wrote)
>> I wonder if USING 0,0 and USING 4096,1 should work correctly.
>> I have tried it with START 1000, and START 5000, respectively,
>> such that addresses are in the appropriate range, but, using
>>
In the HLASM release 5 manual, there is an example:
"If a register is specified with base address zero, the
assembler will use it in preference to the default use
of register zero. For example:
| USING 3,0
| LA 7,5
| generates the instruction X'41703005'; in the absence of
I wonder if USING 0,0 and USING 4096,1 should work correctly.
I have tried it with START 1000, and START 5000, respectively,
such that addresses are in the appropriate range, but, using
the Tachyon assembler, get addressability errors.
Or maybe there is an assembler option to allow this that
I d
Seems to me what would be nice is a way to use the length of the
second operand as the length for MVC or CLC.
If you are copying into a buffer, it is the length of the source,
not the length of the buffer, that you want to use.
Once you do that, the given problem goes away.
(You might then want
> As for the ISA, Intel seems to be very "ad hoc" compared to the z
> architecture. Especially in the virtualization arena. Basically,
> the z has a _single_ virtualization instruction: SIE.
> Intel has I don't know how many different versions of different
> instructions to let hypervisors run a
"Thanks you all very much, and I didn't realize it was in
micro seconds. Thanks for that info."
Bit 51 is in microseconds, so times 4096,or 2**(63-51).
So, 5 seconds is 5*1000*1000*4096
or, as someone else indicated, X'4C4B4'
Note that bit 31 is not so far from one second, being 2**20
Here are pictures of the key switch:
https://commons.wikimedia.org/wiki/File:Customer_Engineer_Key_Switch_for_IBM_S-360_computer,_view_1.JPG
https://commons.wikimedia.org/wiki/File:Customer_Engineer_Key_Switch_for_IBM_S-360_computer,_view_2.JPG
> If you're talking about the CE key that switched metering from
> customer to IBM, I have no idea. Those were a real pin-tumbler lock;
> not just a simple latch. They may even have been unique to each
> machine, though I think it would've been impractical to have each CE
> carry a jangling bunch o
I wonder if anyone knows where to find CE keys for S/360 CPUs.
thanks,
-- glen
(snip, someone wrote)
>> And POPCNT is another one. Why do I need to
>> know the number of 1 bits in each individual byte in a GPR?
On 2015-03-11, at 08:49, John McKown wrote:
> Because CDC had it first? I suspect that it became a built-in
> function in Pascal, CARD(), because Pascal was dev
The mention of instruction sets and green cards reminds me,
does anyone have a (scan of) a 360/20 Reference Summary?
Some places indicate that it might be yellow or red.
-- glen
Gary wrote:
> I have heard that only one machine was ever delivered without the
> decimal set, but it may have just been rumour.
All the 360/91's were delivered without the decimal instructions.
The OS emulates them when the illegal instruction exception is
generated.
But maybe you meant only
Someone wrote:
"The problem with TRT is it validates the whole TRT table before
it starts to do the TRT."
As far as I know, TR, but not TRT, can do a trial execution.
First, it is only needed if the translate table starts within 256
bytes before a page boundary.
But it is needed for TR, as
My favorite book describing the variety of computer architectures
is the Blaauw & Brooks book. Many of the examples have a little
more detail for S/360 and S/370, but they have all of the
important details for many other older and newer systems.
Otherwise, the previously mentioned book seems to be
Someone wrote:
> At least that explains I don't need to worry that km is
> not suddenly 1024m as soon as I carry a storage device ;-)
Reminds me that I used to wonder if IBM sold computers
in units of $1024, that is, k$.
I presume everyone here knows that the serial numbers on S/370
CPUs are in
>From C28-6514-5 on bitsavers, on page 16:
"Division by zero is permitted and yields a zero result."
After that, (and presumably also earlier) it has to stay that
way as code (macros) might depend on that.
There is no reason given.
-- glen
> My result from a DP in dividing 1300 by 3 is 00 00 00 43 3C 00 1C
> but on a calculator it is displayed as 433.3 - which is what
> I want to display in a field on a screen. How do I turn that
> remainder of 1C into the decimal value ?
You should have enough to do it as scaled decimal.
Consi
Instructions are hard to count, though instruction count isn't a
very good way to determine CISCness.
RISC tends to have a small number of instruction lengths, often 1.
S/360 through z/ have three lengths. Not too CISCy, but not RISC.
(VAX might have 14 or so, from one byte on up.)
RISC tends to
Jonathan Scott wrote:
> If you want to modify DC, you need to define an opcode which
> refers to the original DC first so that you can invoke it from
> within the macro.
> DC_ OPSYN DC Set up alias for original DC
> DC OPSYN MYDCRedirect DC to my macro
> Then within the macro
(snip, I wrote)
>> But, why the DS 0H instead of putting the label on the LM?
> I do the same thing for "labels" to "code". Why? Hum, I guess
> from reading the HASP code long ago. Also, it makes it
> easier to insert a new instruction at that logical point in
> the program without remembering to
Someone wrote:
> MYCSECT CSECT
> USING *,R15
> B BYID
> ID DCC'module-name'
> BASESDCA(MYCSECT)
> DCA(MYCSECT+4096)
> DCA(MYCSECT+2*4096)
> DCA(MYCSECT+3*4096)
> BYID DS0H
> LMR9,R12,BASES
>
> I am working with some IPv6 addresses that are 128 bits long.
> The input to the program is an ip name or address and the
> number of high bits that I need to use for a compare against
> another ip address.
> So, I want to create run time routine to build the a
> 16 byte 'and' bit field based on
(someone wrote)
> IHMO, the mnemonic for BCT was not well-chosen.
> Better might have been DBZ
> for Decrement and Branch on Zero.
That would be Decrement and Branch on Not Zero, DBNZ,
and also DBNZR. Sounds too much like DEC to me.(*)
I believe none of the S/360 instructions are more than f
> For short EX MVC's the burden of getting stuff in the right registers
> makes MVCL less interesting.
As I understand it, and doesn't seem to have been mentioned, the big
effect on EX has to do with caching. I believe that it should be
near code and not data. (That is, it goes into the instructio
(snip, someone wrote)
> You've sometimes admonished me for taking the synchronic view
> rather than the diachronic. But here, you're being narrowly
> synchronic. In the Bad Old Days of Yore, mechanical serial
> printers could be commanded to underscore with the sequence
> . In this
> diachronic
(snip, someone wrote)
> o IBM hexadecimal floating-point, HFP,
> o ANSI binary floating-point, BFP, and
> o ANSI decimal floating-point, DFP.
> Of these the first two, HFP and BFP, make zeros positive; but the
> third, DFP, supports both positive and negative zeros.
The change to the Fortran s
> Finally, ISTR, but can find no references, that FORTRAN II had
> a two argument SGNF(X,Y) defined as the magnitude of X with the
> sign of Y. A plausible motivation is this was a single machine
> instruction on the IBM 70x series -- doubleword shift with a
> count of zero.
The SIGN function is
(snip, I wrote)
>> The OS/360 Fortran compilers (G and H) make local copies of scalar
>> variables, and then copy them back before return. (Usually
>> described as call by value result.) That is legal Fortran.
> FORTRAN tries pretty hard to accommodate the idiosyncrasies
> of various implementat
(someone wrote)
> My understanding is that the C standard calls for all parameters
> to be passed by value. My experience is that IBM's C usually
> passes parameters by reference except that if a parameter is a
> pointer it gets passed by value. Go figger.
That is most consistent with the way it
(previously I wrote)
>> The book "Computer Architecture: Concepts and Evolution" by
>> Blaauw and Brooks has many descriptions on how instructions got
>> to be the way they did.
>> (Blaauw was the main designer of S/360...
> I thought that Gene Amdahl was the principle architect of 360.
> A searc
Someone wrote:
> Should we have machine instructions to compute a polynome of grade n?
> I don't think so (but there were machines in the 60s which did just that,
> and - in that period - they were faster by using such instructions).
VAX had polynomial evaluation in the 1980's, and it was well kn
>(after I wrote)
>> The book "Computer Architecture: Concepts and Evolution" by
>> Blaauw and Brooks has many descriptions on how instructions got
>> to be the way they did.
>> The book covers a wide variety of machines, though S/360 is
>> a favorite example. (Blaauw was the main designer of S/3
The book "Computer Architecture: Concepts and Evolution" by
Blaauw and Brooks has many descriptions on how instructions got
to be the way they did.
The book covers a wide variety of machines, though S/360 is
a favorite example. (Blaauw was the main designer of S/360,
so it isn't so surprising.)
The reminds me of some problems with Fortran many years ago.
(Before OPEN was added, though I believe it is still optional.)
It seems that Fortran opens the DDNAME for INOUT by default.
That is true even if the first operation is READ, as one is allowed
to REWIND (or BACKSPACE) and then WRITE.
Th
It is the address in memory that matters.
This reminds me of programs with two base registers, using LA
to set the registers such that the offset of the second is 4095
from the first. All instruction addresses (an branch instructions)
will then have an odd offset, legal but it looks funny.
On th
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