On Sat, Feb 07, 2009 at 06:13:55PM +0200, Nick Kossifidis wrote:
> 2009/2/7 Bob Copeland :
> > On Sat, Feb 07, 2009 at 07:20:52AM +0200, Nick Kossifidis wrote:
> >> O.K. do you want me to put these fixes on this patch or post a separate ?
> >
> > I think a separate patch is fine, it's a valid chang
2009/2/8 John W. Linville :
> On Sat, Feb 07, 2009 at 06:13:55PM +0200, Nick Kossifidis wrote:
>> 2009/2/7 Bob Copeland :
>> > On Sat, Feb 07, 2009 at 07:20:52AM +0200, Nick Kossifidis wrote:
>> >> O.K. do you want me to put these fixes on this patch or post a separate ?
>> >
>> > I think a separat
2009/2/7 Bob Copeland :
> On Sat, Feb 07, 2009 at 07:20:52AM +0200, Nick Kossifidis wrote:
>> O.K. do you want me to put these fixes on this patch or post a separate ?
>
> I think a separate patch is fine, it's a valid change by itself.
>
> --
> Bob Copeland %% www.bobcopeland.com
>
>
O.K. i'm sen
On Sat, Feb 07, 2009 at 07:20:52AM +0200, Nick Kossifidis wrote:
> O.K. do you want me to put these fixes on this patch or post a separate ?
I think a separate patch is fine, it's a valid change by itself.
--
Bob Copeland %% www.bobcopeland.com
___
at
2009/2/7 Bob Copeland :
> On Thu, Feb 05, 2009 at 11:06:59PM +0200, Nick Kossifidis wrote:
>> I think this is because we call reset too many times. Try removing
>> call to reset from config_interface, after some tests i did it seems
>> wrong (we don't need to reset pcu and if we do, we don't need t
On Thu, Feb 05, 2009 at 11:06:59PM +0200, Nick Kossifidis wrote:
> I think this is because we call reset too many times. Try removing
> call to reset from config_interface, after some tests i did it seems
> wrong (we don't need to reset pcu and if we do, we don't need to reset
> the whole chip and
On Thu, Feb 05, 2009 at 11:06:59PM +0200, Nick Kossifidis wrote:
> I think this is because we call reset too many times. Try removing
> call to reset from config_interface, after some tests i did it seems
Ok I'll try it, let you know ASAP.
--
Bob Copeland %% www.bobcopeland.com
On Fri, Feb 06, 2009 at 01:28:07AM +0200, Nick Kossifidis wrote:
> > This works much better, except I still get some hard hangs
> > occasionally. Doesn't appear to be bmiss storm this time. I did it
> > with a VT up and didn't get an oops; I guess I'll try a serial console
> > or some printks.
>
2009/2/5 Bob Copeland :
> On Wed, 4 Feb 2009 23:57:06 +0200, Nick Kossifidis wrote
>> * Update reset and sync with HALs
>> * Clean up eeprom settings and tweaking of initvals and put them on
> separate functions
>> * Set/Restore 32KHz ref clk operation
>> * Add some more documentation
>> TODO:
2009/2/5 Bob Copeland :
> On Wed, 4 Feb 2009 23:57:06 +0200, Nick Kossifidis wrote
>> * Update reset and sync with HALs
>> * Clean up eeprom settings and tweaking of initvals and put them on
> separate functions
>> * Set/Restore 32KHz ref clk operation
>> * Add some more documentation
>> TODO:
On Thu, 2009-02-05 at 10:51 -0500, Bob Copeland wrote:
> On Wed, 4 Feb 2009 23:57:06 +0200, Nick Kossifidis wrote
> > * Update reset and sync with HALs
> > * Clean up eeprom settings and tweaking of initvals and put them on
> separate functions
> > * Set/Restore 32KHz ref clk operation
> > * Add
On Wed, 4 Feb 2009 23:57:06 +0200, Nick Kossifidis wrote
> * Update reset and sync with HALs
> * Clean up eeprom settings and tweaking of initvals and put them on
separate functions
> * Set/Restore 32KHz ref clk operation
> * Add some more documentation
> TODO: Spur mitigation, tpc, half/quarte
* Update reset and sync with HALs
* Clean up eeprom settings and tweaking of initvals and put them on separate
functions
* Set/Restore 32KHz ref clk operation
* Add some more documentation
TODO: Spur mitigation, tpc, half/quarter rate, compression etc
v2: Address comments from Bob and Felix
2009/2/4 Nick Kossifidis :
> 2009/2/4 Bob Copeland :
>> On Tue, Feb 03, 2009 at 06:28:47PM +0200, Nick Kossifidis wrote:
>>> Nice catch ;-)
>>>
>>> Another difference i remembered is that we now don't set the TPC
>>> register to 3f (until we fix the whole tx power stuff). I'll try to
>>> reproduce
2009/2/4 Bob Copeland :
> On Tue, Feb 03, 2009 at 06:28:47PM +0200, Nick Kossifidis wrote:
>> Nice catch ;-)
>>
>> Another difference i remembered is that we now don't set the TPC
>> register to 3f (until we fix the whole tx power stuff). I'll try to
>> reproduce this with my ar2425 as it turns it
On Tue, Feb 03, 2009 at 06:28:47PM +0200, Nick Kossifidis wrote:
> Nice catch ;-)
>
> Another difference i remembered is that we now don't set the TPC
> register to 3f (until we fix the whole tx power stuff). I'll try to
> reproduce this with my ar2425 as it turns it also has problems.
And the wi
2009/2/3 Bob Copeland :
> On Sat, 31 Jan 2009 04:31:47 +0200, Nick Kossifidis wrote
>> int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
>> struct ieee80211_channel *channel, bool change_channel)
>
> Here's another thing I just noticed:
>
>> {
>> + u32 s_seq[10], s_an
On Sat, 31 Jan 2009 04:31:47 +0200, Nick Kossifidis wrote
> int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
> struct ieee80211_channel *channel, bool change_channel)
Here's another thing I just noticed:
> {
> + u32 s_seq[10], s_ant, s_led[3], staid1_flags, tsf_up,
* Update reset and sync with HALs
* Clean up eeprom settings and tweaking of initvals and put them on separate
functions
* Set/Restore 32KHz ref clk operation
* Add some more documentation
TODO: Spur mitigation, tpc, half/quarter rate, compression etc
Signed-Off-by: Nick Kossifidis
---
2009/2/1 Felix Fietkau :
> Nick Kossifidis wrote:
>> 2009/2/1 Felix Fietkau :
>>> Nick Kossifidis wrote:
2009/2/1 Bob Copeland :
> On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
>> > Heh, we should write a little tool to check the shifts and masks :)
>> >
>>
>
Nick Kossifidis wrote:
> 2009/2/1 Felix Fietkau :
>> Nick Kossifidis wrote:
>>> 2009/2/1 Bob Copeland :
On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
> > Heh, we should write a little tool to check the shifts and masks :)
> >
>
> Yup :P
I just wrote
2009/2/1 Felix Fietkau :
> Nick Kossifidis wrote:
>> 2009/2/1 Bob Copeland :
>>> On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
> Heh, we should write a little tool to check the shifts and masks :)
>
Yup :P
>>>
>>> I just wrote one, I can post it later :) It
On Sun, Feb 01, 2009 at 12:58:14AM +0200, Nick Kossifidis wrote:
> Are you all ok on the rest 4 patches ?
I skimmed the rest of the patches, all look good to me.
--
Bob Copeland %% www.bobcopeland.com
___
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Nick Kossifidis wrote:
> 2009/2/1 Bob Copeland :
>> On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
>>> > Heh, we should write a little tool to check the shifts and masks :)
>>> >
>>>
>>> Yup :P
>>
>> I just wrote one, I can post it later :) It also found:
>>
>> AR5K_PHY_SIGMA_DE
2009/2/1 Bob Copeland :
> On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
>> > Heh, we should write a little tool to check the shifts and masks :)
>> >
>>
>> Yup :P
>
> I just wrote one, I can post it later :) It also found:
>
> AR5K_PHY_SIGMA_DELTA_ADC_CLIP 0x01ff3000 13
>
> Sho
2009/2/1 Bob Copeland :
> On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
>> > Heh, we should write a little tool to check the shifts and masks :)
>> >
>>
>> Yup :P
>
> I just wrote one, I can post it later :) It also found:
>
> AR5K_PHY_SIGMA_DELTA_ADC_CLIP 0x01ff3000 13
>
> Sho
On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
> > Heh, we should write a little tool to check the shifts and masks :)
> >
>
> Yup :P
I just wrote one, I can post it later :) It also found:
AR5K_PHY_SIGMA_DELTA_ADC_CLIP 0x01ff3000 13
Should be 12 or a different mask...
> Th
Nick Kossifidis wrote:
>>> My intention is to reimplement hw_htoclock to account for half/quarter
>>> rate so it'll soon be
>>> clock = ath5k_hw_htoclock(1, channel->hw_value);
>> AFAIK Sam's HAL might have a bug there. If I remember correctly, the MAC
>> runs at the same clock speed with Half/Quar
2009/1/31 Felix Fietkau :
> Nick Kossifidis wrote:
[...]
@@ -2156,7 +2157,8 @@
#define AR5K_PHY_ANT_CTL_TXRX_EN0x0001 /* Enable
TX/RX (?) */
#define AR5K_PHY_ANT_CTL_SECTORED_ANT 0x0004 /* Sectored
Antenna */
#define
Nick Kossifidis wrote:
>>> [...]
>>> @@ -2156,7 +2157,8 @@
>>> #define AR5K_PHY_ANT_CTL_TXRX_EN0x0001 /* Enable
>>> TX/RX (?) */
>>> #define AR5K_PHY_ANT_CTL_SECTORED_ANT 0x0004 /* Sectored
>>> Antenna */
>>> #define AR5K_PHY_ANT_CTL_HITUNE50x
2009/1/31 Bob Copeland :
> On Sat, Jan 31, 2009 at 04:31:47AM +0200, Nick Kossifidis wrote:
>> * Update reset and sync with HALs
>> * Clean up eeprom settings and tweaking of initvals and put them on
>> separate functions
>> * Set/Restore 32KHz ref clk operation
>> * Add some more documentatio
On Sat, Jan 31, 2009 at 04:31:47AM +0200, Nick Kossifidis wrote:
> * Update reset and sync with HALs
> * Clean up eeprom settings and tweaking of initvals and put them on separate
> functions
> * Set/Restore 32KHz ref clk operation
> * Add some more documentation
> TODO: Spur mitigation, tpc,
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