Does nobody have a clue about the problem? Reproducing the issue is totally
easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
descriptor - it won't work! Is nobody at Atheros bothered by the fact that
transmit
On Fri, Jul 8, 2011 at 2:54 PM, Robert Budde robert.bu...@gmx.net wrote:
Does nobody have a clue about the problem? Reproducing the issue is totally
easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
descriptor
On Fri, Jul 8, 2011 at 2:54 PM, Robert Budde robert.bu...@gmx.net wrote:
Does nobody have a clue about the problem? Reproducing the issue is totally
easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
descriptor
Hi!
We are using TPC per packet with the ath9k driver for AR5416/AR5418 and
AR9280 chipsets. All these chipsets work as expected if you
1. add REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER |
AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE); to ar5008_hw_process_ini in
ar5008_phy.c after
On Fri, Jul 8, 2011 at 6:27 PM, Robert Budde robert.bu...@gmx.net wrote:
Hi!
We are using TPC per packet with the ath9k driver for AR5416/AR5418 and
AR9280 chipsets. All these chipsets work as expected if you
1. add REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER |
Oh sorry, let me take last words back. Robert is right it does not work with
AR9380.
Power control mechanism does not depend on AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE
bit.
The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 on
AR9380 and
0x007f on older chips.
On Fri,
On 8 July 2011 22:19, Alex Hacker hac...@epn.ru wrote:
Oh sorry, let me take last words back. Robert is right it does not work with
AR9380.
Power control mechanism does not depend on
AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit.
The AR_PHY_POWER_TX_RATE_MAX register contains a different value
