Oh sorry, let me take last words back. Robert is right it does not work with AR9380. Power control mechanism does not depend on AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit. The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 on AR9380 and 0x0000007f on older chips.
On Fri, Jul 08, 2011 at 05:27:22PM +0600, Alex Hacker wrote: > I test the TPC in our own propiertay driver (not ath9k) with AR9380. It works > likewise previous Atheros chips. I think this is not a HW problem, probably > EEPROM power limit. Currently have no time to experiment with ath9k (should > complete AR93xx support in my own driver ASAP). > > On Fri, Jul 08, 2011 at 11:24:25AM +0200, Robert Budde wrote: > > Does nobody have a clue about the problem? Reproducing the issue is totally > > easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the > > AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet > > descriptor - it won't work! Is nobody at Atheros bothered by the fact that > > transmit control per packet is obviously not working with their latest > > product on the market? > > > > Best regards, > > Robert > > > > _______________________________________________ > > ath9k-devel mailing list > > ath9k-devel@lists.ath9k.org > > https://lists.ath9k.org/mailman/listinfo/ath9k-devel > > > > _______________________________________________ > > ath9k-devel mailing list > > ath9k-devel@lists.ath9k.org > > https://lists.ath9k.org/mailman/listinfo/ath9k-devel > _______________________________________________ > ath9k-devel mailing list > ath9k-devel@lists.ath9k.org > https://lists.ath9k.org/mailman/listinfo/ath9k-devel _______________________________________________ ath9k-devel mailing list ath9k-devel@lists.ath9k.org https://lists.ath9k.org/mailman/listinfo/ath9k-devel
