Add a device tree fixup that adds a /chosen/barebox-reset-reason string
property to the device tree chosen node. It can be read under Linux in
/sys/firmware/devicetree/base/chosen/barebox-reset-reason.
Signed-off-by: Philipp Zabel
---
Documentation/user/reset-reason.rst | 3 +++
common/reset_so
On Mon, Mar 19, 2018 at 10:21:20AM +0100, Michael Grzeschik wrote:
> Signed-off-by: Michael Grzeschik
> ---
> v1 -> v2:
> - dropped SZ_4G
> - fixed and clean env prepraration in board.c
> - added compatible checks for initcalls
> - dropped clock gate in flash headers
>
In some cases it is practical to supervise as much as possible of
the barebox execution with a watchdog (or multiple watchdogs). This
patch provides an async poller for watchdog core framework which can
be enabled by the user and stores this configuration to nv.
Signed-off-by: Oleksij Rempel
---
Pass the barebox version to Linux in case somebody is interested in it
under Linux. We use put the version under /chosen/barebox-version and
it can be read under Linux in
/sys/firmware/devicetree/base/chosen/barebox-version.
Signed-off-by: Sascha Hauer
---
common/oftree.c | 1 +
1 file changed,
Signed-off-by: Michael Grzeschik
---
v1 -> v2:
- dropped SZ_4G
- fixed and clean env prepraration in board.c
- added compatible checks for initcalls
- dropped clock gate in flash headers
- added memory detection in lowlevel
- merged imx6qdl-samx6i wi
These patches add support for the kontron samx6i smarc modules.
The memory size gets selected by gpio setup in the lowlevel setup.
For this we add some lowlevel gpio input functions.
Michael Grzeschik (2):
ARM: i.MX: Add lowlevel gpio input functions
boards: samx6: add initial support for kont
This adds the function to set direction input and read the values
in the header file for setting i.MX gpios early.
Signed-off-by: Michael Grzeschik
---
arch/arm/mach-imx/include/mach/imx-gpio.h | 46 +++
1 file changed, 41 insertions(+), 5 deletions(-)
diff --git a/a
The fec receive buffers are coherently mapped, no need to dma_sync on
them.
Signed-off-by: Sascha Hauer
---
drivers/net/fec_imx.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/fec_imx.c b/drivers/net/fec_imx.c
index d506fd64f1..33599dd826 100644
--- a/drivers/net/fec_imx.c
+
Signed-off-by: Sascha Hauer
---
arch/arm/dts/imx8mq-pinfunc.h | 623
arch/arm/dts/imx8mq.dtsi | 624
arch/arm/mach-imx/Kconfig | 9 +
arch/arm/mach-imx/Makefile |
This is based on Lucas' patch sent as "[PATCH v2 4/4] clk: imx: add
clock driver for i.MX8MQ CCM" to the mailing list.
It will likely need some rework before it is finally merged, so apply
the reworks here before merging into barebox.
Signed-off-by: Sascha Hauer
---
drivers/clk/imx/Makefile
Signed-off-by: Sascha Hauer
---
drivers/gpio/gpio-imx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpio/gpio-imx.c b/drivers/gpio/gpio-imx.c
index d8bcea2234..d618e60119 100644
--- a/drivers/gpio/gpio-imx.c
+++ b/drivers/gpio/gpio-imx.c
@@ -190,6 +190,9 @@ static __maybe_unuse
Rather than doing DMA on the input buffer address get a proper DMA
address from the mapping functions.
Signed-off-by: Sascha Hauer
---
drivers/net/fec_imx.c | 15 +--
drivers/net/fec_imx.h | 1 +
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/net/fec_imx.c b
Signed-off-by: Sascha Hauer
---
arch/arm/boards/Makefile | 1 +
arch/arm/boards/nxp-imx8mq-evk/Makefile | 2 +
arch/arm/boards/nxp-imx8mq-evk/board.c| 44 +++
arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 43 +++
arch/arm/dts/Makefile | 1 +
arch/a
Signed-off-by: Sascha Hauer
---
drivers/serial/serial_imx.c | 5 -
include/serial/imx-uart.h | 5 +
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_imx.c b/drivers/serial/serial_imx.c
index e8c3836a66..49fb5e8340 100644
--- a/drivers/serial/serial_imx
Rather than relying on the fact that addresses can be just casted
into DMA addresses use proper DMA mapping functions.
This fixes compiler warnings when we do DMA on this 32bit only device
on aarch64 SoCs.
Signed-off-by: Sascha Hauer
---
drivers/mci/imx-esdhc.c | 53
Allow to use dt-bindings files that are not yet upstreamed. They can
be put into include/dt-bindings.
Signed-off-by: Sascha Hauer
---
arch/mips/dts/include/dt-bindings | 1 -
scripts/Makefile.lib | 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
delete mode 12 arch/mips/dts
Signed-off-by: Sascha Hauer
---
drivers/mci/imx-esdhc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c
index 8929901d4b..c4daa9d121 100644
--- a/drivers/mci/imx-esdhc.c
+++ b/drivers/mci/imx-esdhc.c
@@ -728,6 +728,7 @@ static __maybe_unused s
Signed-off-by: Sascha Hauer
---
arch/arm/mach-imx/cpu_init.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c
index 6a6c4c5210..5b93d12da9 100644
--- a/arch/arm/mach-imx/cpu_init.c
+++ b/arch/arm/mach-imx/cpu_init.c
@@ -16,6 +16,7 @
Signed-off-by: Sascha Hauer
---
arch/arm/mach-imx/include/mach/debug_ll.h | 3 +++
common/Kconfig| 8
2 files changed, 11 insertions(+)
diff --git a/arch/arm/mach-imx/include/mach/debug_ll.h
b/arch/arm/mach-imx/include/mach/debug_ll.h
index d54d601db0..72124
This series adds support for the i.MX8MQ SoC and the EVK board from NXP.
Currently only 2nd stage after U-Boot is supported, 1st stage support
will still need some time. Besides of the missing first stage support
the EVK support should be fairly complete already, as the i.MX8MQ is
very similar to t
Signed-off-by: Sascha Hauer
---
arch/arm/mach-imx/Kconfig | 2 +-
arch/arm/mach-imx/ocotp.c | 10 ++
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b430b19d6..b49bef3f27 100644
--- a/arch/arm/mach-imx/Kconfig
++
the ESDHC controller is a 32bit device, so can do DMA only on the
lower 32bit. Fix the compiler warning about casting a pointer to integer
of different size on aarch64 by casting to unsigned long first. Error
out if the destination does not fit into 32bit though.
Signed-off-by: Sascha Hauer
---
Hi Sascha,
On Mon, Mar 19, 2018 at 09:36:29AM +0100, Sascha Hauer wrote:
> ...
> I wonder though what calls into the filesystem layer before / is
> mounted in your case.
>
The issue is trigger by function stat() in start_barebox(), right before
I expect to have a shell.
Here.
if (IS_ENA
Hi Andrey,
On Fri, Mar 16, 2018 at 02:51:19PM -0700, Andrey Smirnov wrote:
> On Fri, Mar 16, 2018 at 5:53 AM, Sascha Hauer wrote:
> > This adds aarch64 support for relocating binaries linked with -pie.
> >
> > Support is integrated into the already exisiting
> > relocate_to_current_adr() function
Hi Gaël,
On Sun, Mar 18, 2018 at 06:22:36PM -0400, Gaël PORTAY wrote:
> In __canonicalize_path() we dereference the pointer returned by
> get_fsdevice_by_path() without checking if the pointer is NULL or not.
> When the pointer is NULL it leads to an Ooops.
>
> Ooops, address error on load
Several boards use defaultenv_append_directory() to append a board
specific envfs snippet during runtime. This only works when
defaultenv_append_directory() is called before defaultenv_load() is
exectuted. Since that was executed at the end of the start process
every initcall level could be used to
Hi Alexander,
On Sun, Mar 18, 2018 at 09:10:46PM +, Alexander Kurz wrote:
> With patch 5b92cfceff38 ("startup: Load default environment earlier")
> loading of the default environment moved from environment_initcall
> four initcalls up to fs_initcall. At this time, most of the board specific
>
On Fri, Mar 16, 2018 at 03:56:58PM +0100, Lucas Stach wrote:
> There are valid cases where there is no way to translate a OF node to
> a MMIO address via ranges, so do the same as the Linux kernel and don't
> print an error message in that case, but make it available as a debug
> message.
>
> Sign
On Tue, Mar 13, 2018 at 09:33:28AM +0100, Oleksij Rempel wrote:
> In some cases it is practical to supervise as much as possible of
> the barebox execution with a watchdog (or multiple watchdogs). This
> patch provides an async poller for watchdog core framework which can
> be enabled by the user a
Several DDR3 phy registers are written with the pattern x<<30 | x<<20 | x<<10 |
x.
The x<<30 doesn't fit into 32bit which causes a compiler warning.
Looking at the reference manual only the lower 10bit of the registers
have any meaning, so drop the other bogus values. This affects the
registers:
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