[PATCH v3 01/14] ARM: zynqmp: add sd_dll_reset call

Add a function to reset DLL logic for SD devices. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- arch/arm/mach-zynqmp/firmware-zynqmp.c | 17 + 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c b/arch/arm/mach-zynqmp/firmware

Re: [PATCH v2 13/14] mci: arasan-sdhci: add HS200 tuning support on ZynqMP

to resolve this just by looking at it. Please rebase your series on that patch. meh, will do. Thanks, Steffen -- Pengutronix e.K.| Dipl.-Inform. Steffen Trumtrar | Steuerwalder Str. 21| https://www.pengutronix.de/| 31137 Hildesheim, Germany | Phone: +49-5121-206917-0

[PATCH v2 01/14] ARM: zynqmp: add sd_dll_reset call

Add a function to reset DLL logic for SD devices. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- arch/arm/mach-zynqmp/firmware-zynqmp.c | 17 + 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-zynqmp/firmware-zynqmp.c b/arch/arm/mach-zynqmp/firmware

[PATCH v2 10/14] mci: mci-core: add HS200 support

HS200 is a timing mode for eMMCs to work 8bit with 200MHz clocks. To be used, drivers need to set the correct drive strength, clock phases and then SDHCI can start tuning for HS200. Signed-off-by: Steffen Trumtrar --- drivers/mci/Kconfig| 7 ++ drivers/mci/mci-core.c | 257

[PATCH v2 04/14] include: mci: sync mci_timing with linux

The timings are used to check if mci_host->timing is equal to one of this values. Linux uses a different numbering. Adapt that for compatability. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- include/mci.h | 18 ++ 1 file changed, 10 insertions(+), 8 deleti

[PATCH v2 09/14] mci: core: parse more host capabilities from DT

Port the linux v6.7 mmc host caps2 parsing. While at it, remove the ->no_sd and ->no_sdio. These are bits in the caps2 field. Signed-off-by: Steffen Trumtrar --- drivers/mci/mci-core.c | 36 ++-- include/mci.h | 32 +

[PATCH v2 02/14] zynqmp: firmware: add functions to set tap delay

Add a function to set the tap delay for the clk phase of the sd host controller. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- arch/arm/mach-zynqmp/firmware-zynqmp.c | 42 ++ include/mach/zynqmp/firmware-zynqmp.h | 23 +++ 2

[PATCH v2 14/14] mci: sdhci: replace sdhci_wait_idle

Fatoum Signed-off-by: Steffen Trumtrar --- drivers/mci/am654-sdhci.c| 2 +- drivers/mci/arasan-sdhci.c | 2 +- drivers/mci/atmel-sdhci-common.c | 4 ++-- drivers/mci/dove-sdhci.c | 2 +- drivers/mci/mci-bcm2835.c| 2 +- drivers/mci/rockchip

[PATCH v2 06/14] mci: core: save the set clock as actual_clock

Linux mmc_host saves the actual_clock set on the HC. Do the same to use it later. Signed-off-by: Steffen Trumtrar --- drivers/mci/mci-core.c | 2 ++ include/mci.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index 2b39985d5e

[PATCH v2 08/14] include: mci: add more EXT_CSD_CARD_TYPE_*

Import missing EXT_CSD_CARD_TYPE_ defines from linux v6.7. EXT_CSD_CARD_TYPE_SDR_1_8V/1_2V is unused in barebox. Replace with the defines from linux. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- include/mci.h | 15 +-- 1 file changed, 13 insertions(+), 2 deletions

[PATCH v2 03/14] mci: arasan: implement 25MHz quirk for zynqmp

The Arasan on the zynqmp in version 8.9a doesn't meet the timing requirements at 25MHz. It works at 19MHz instead. Add the quirk from linux kernel v6.8-rc4. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- drivers/mci/arasan-sdhci.c | 28 +++- 1 file

[PATCH v2 07/14] mci: arasan: register sdcard/sampleclk

Read and register the sampleclk and sdcardclk. They are needed later for HS200 tuning support. Signed-off-by: Steffen Trumtrar --- drivers/mci/arasan-sdhci.c | 316 + 1 file changed, 316 insertions(+) diff --git a/drivers/mci/arasan-sdhci.c b/drivers

[PATCH v2 05/14] mci: arasan: read clk phases from DT

Depending on the used SDHCI mode the clock phases are different. Import the helper function to get these values from the DT from linux v6.7. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- drivers/mci/arasan-sdhci.c | 121 + 1 file

[PATCH v2 00/14] mci: add HS200 support for eMMCs

Signed-off-by: Steffen Trumtrar --- Changes in v2: - added Reviewed-bys - small style fixes - return host->actual_clock in arasan_zynqmp_sampleclk_recalc_rate - return host->actual_clock in arasan_zynqmp_sdcardeclk_recalc_rate - move DT property parsing into IS_ENABLED - port mci_switch_statu

[PATCH v2 11/14] mci: mci-core: replace value with define

Use the newly introduced define for High Speed timing mode instead of just '1'. Signed-off-by: Steffen Trumtrar --- drivers/mci/mci-core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index e825c91c80..ebfd3e9fb8 100644

[PATCH v2 13/14] mci: arasan-sdhci: add HS200 tuning support on ZynqMP

The ZynpMP 8.9a has an Arasan IP core that supports HS200 tuning. Register the callback with the mci-core. Arasan uses the SDHCI tuning method. Signed-off-by: Steffen Trumtrar Reviewed-by: Ahmad Fatoum --- drivers/mci/arasan-sdhci.c | 62 +++--- 1 file

[PATCH v2 12/14] mci: sdhci: add tuning support

The arasan SDHCI driver doesn't use MMC tuning but SDHCI tuning. Both are not supported yet in barebox. Add SDHCI tuning support from linux v6.7. Signed-off-by: Steffen Trumtrar Signed-off-by: Ahmad Fatoum --- drivers/mci/sdhci.c | 275

[PATCH] mci: arasan: rework register_sdclk

Instead of guarding this at compile time, always call register_sdclk with the correct clk_ops, like in linux. Currently only ZynqMP and default arasan ops are supported. Signed-off-by: Steffen Trumtrar --- Instead of guarding the zynqmp functions at compile time and introducing possible run

[PATCH 0/2] mci: fix warning and linker error

]: *** [Makefile:900: .tmp_barebox1] Error 1 Signed-off-by: Steffen Trumtrar --- Steffen Trumtrar (2): mci: mci-core: fix mci_switch_status call mci: arasan: fix build for non-ZynqMP drivers/mci/arasan-sdhci.c | 3 ++- drivers/mci/mci-core.c | 4 +--- 2 files changed, 3 insertions(+), 4

[PATCH 1/2] mci: mci-core: fix mci_switch_status call

mci_switch_status needs to be called with a boolean instead of a u32. Signed-off-by: Steffen Trumtrar --- drivers/mci/mci-core.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/mci/mci-core.c b/drivers/mci/mci-core.c index 414bcf6f06..78c65c8614 100644

[PATCH 2/2] mci: arasan: fix build for non-ZynqMP

Registering sdclk only makes sense on the ZynqMP architecture. Guard calling the function with a IS_ENABLED() Signed-off-by: Steffen Trumtrar --- drivers/mci/arasan-sdhci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/mci/arasan-sdhci.c b/drivers/mci/arasan

[PATCH] ARM: arria10: generic.h: fix unused-function Werror

arria10_watchdog_disable/kick_l4wd0 is not used on non-Arria10 platforms. To not throw unused-function errors during compile stage, the prototype must be "static inline void ..." and not just "static ..." Signed-off-by: Steffen Trumtrar --- include/mach/socfpga/generi

[PATCH 10/14] ARM: Arria10: arria10_finish_io: remove unused param

arria10_finish_io() doesn't use mainpll_cfg, perpll_cfg. Remove them from the parameter list. Signed-off-by: Steffen Trumtrar --- arch/arm/boards/enclustra-aa1/lowlevel.c | 4 ++-- arch/arm/boards/reflex-achilles/lowlevel.c | 4 ++-- arch/arm/mach-socfpga/arria10-init.c | 4

[PATCH 13/14] ARM: Arria10: xload: reduce timeout on condone

Reduce the timeout while waiting for condone pin. Also, kick the l4wd0 while waiting. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-xload.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/arria10-xload.c b/arch/arm/mach

[PATCH 04/14] ARM: arria10: reset-manager: don't touch l4 wdog

can try to start the next bootloader image as fallback. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-reset-manager.c | 9 ++--- arch/arm/mach-socfpga/arria10-xload.c | 5 + include/mach/socfpga/generic.h| 2 ++ 3 files changed, 13 insertions

[PATCH 11/14] ARM: Arria10: xload: remove useless writel

0xffd0628 is a handoff register. This looks like a debugging writel that was accidentally commited, as the write to this register is useless otherwise. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-xload.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git

[PATCH 03/14] ARM: socfpga: Arria10: PE1: remove arm_cpu_lowlevel_init

-by: Steffen Trumtrar --- arch/arm/boards/enclustra-aa1/lowlevel.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm/boards/enclustra-aa1/lowlevel.c b/arch/arm/boards/enclustra-aa1/lowlevel.c index ba4d562e5f..ada7cb5a9f 100644 --- a/arch/arm/boards/enclustra-aa1/lowlevel.c +++ b/arch/arm

[PATCH 05/14] ARM: Arria10: PE1: disable l4wd0 in bringup

The l4wd0 is now left running from the BootROM. Disable it in the bringup image, because it would only make problems and has no benefit in that case. Signed-off-by: Steffen Trumtrar --- arch/arm/boards/enclustra-aa1/lowlevel.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm

[PATCH 01/14] ARM: arria10: system-manager: add handoff registers

The isw handoff registers are free to use for the bootloader. Add their offsets for lowlevel debugging purposes. Signed-off-by: Steffen Trumtrar --- include/mach/socfpga/arria10-system-manager.h | 9 + 1 file changed, 9 insertions(+) diff --git a/include/mach/socfpga/arria10-system

[PATCH 02/14] ARM: Arria10: reset manager: document reset source

Add defines for the reset manager reset source bits in the STAT register. Signed-off-by: Steffen Trumtrar --- include/mach/socfpga/arria10-reset-manager.h | 31 1 file changed, 31 insertions(+) diff --git a/include/mach/socfpga/arria10-reset-manager.h b/include

[PATCH 06/14] ARM: Arria10: xload: rework __arria10_load_fpga

this is not a reason to try again. Just try writing the FPGA and see if it succeeds. Try again, if that fails. - ignore arria10_read_blocks errors (as before) Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-xload.c | 5 + 1 file changed, 1 insertion(+), 4 deletions

[PATCH 09/14] ARM: arria10: mark image in OCRAM as valid

The bootrom checks on warm reset if there is already a valid image in ocram and boots it. Otherwise the next boot slot is loaded. When barebox gets to this stage, mark it as successfully loaded to ocram. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-generic.c | 4

[PATCH 08/14] ARM: Arria10: xload: kick watchdog

To be sure, that the watchdog doesn't prematurely triggers, kick it when things are expected to take a little bit longer. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-xload.c | 6 ++ include/mach/socfpga/arria10-fpga.h | 1 + include/mach/socfpga/generic.h

[PATCH 07/14] ARM: arria10: xload: fix __arria10_load_fpga

ize to get the correct end_sector up until __arria10_load_fpga needs to read. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-xload.c | 21 +++-- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-socfpga/arria10-xload.c b/arch/arm/mach-socf

[PATCH 14/14] ARM: arria10-xload: rework broken bitstream handling

the failed bootloader slot. Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfpga/arria10-xload.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-socfpga/arria10-xload.c b/arch/arm/mach-socfpga/arria10-xload.c index 3921ace3aa..afec55c33a 100644

[PATCH 00/14] ARM: SoCFPGA: arria10: clean up early bitstream loading

This series cleans up/reworks the early bitstream loading in the Arria10 xloader code. Some useful defines are added on the way. Signed-off-by: Steffen Trumtrar --- Steffen Trumtrar (14): ARM: arria10: system-manager: add handoff registers ARM: Arria10: reset manager

[PATCH 12/14] ARM: Arria10: xload: refactor wait loops

wait_on_timeout uses get_time_ns() which we don't have. Instead define our own variant of wait_on_timeout() and replace all wait loops with this one define. While at it, reduce the "chosen-by-dice" timeouts where appropriate Signed-off-by: Steffen Trumtrar --- arch/arm/mach-socfp

[PATCH v2] net: designware-imx: add fix_reset callback

. Signed-off-by: Steffen Trumtrar --- Changes in v2: - dropped TX_CLK patch from series - Link to v1: https://lore.barebox.org/20240417-v2024-03-0-topic-imx93-designware-imx-v1-0-c532c18f9...@pengutronix.de --- drivers/net/designware_eqos.c | 3 +++ drivers/net/designware_eqos.h | 1 + drivers/net

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