I tracked down the issue a bit more:
If I insert something between two reads of the DDR memory in my kernel
module (I inserted a pr_info("test")), the value is refreshed.
Maybe there is a possiblity to invalidate the cache? I will investigate
more.
Thanks
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Hello and thank you for the fast help. Here my answers for your comments:
Unless you carefully write kernel code to treat your DDR memory buffer
> as DMA memory, you are almost certainly encountering caching effects.
>
I thought to have this done by getting the memory space from
dma_alloc_coh
Hello,
I encounter a caching issue with my application. I will describe what I
want to do, how I planned to do it and what goes wrong:
*WHAT:*
By using the PRU on my BBB, I want to timestamp a periodic rising edge on
one input pin in *a nanosecond scale *and signal it to a Linux Kernel
modul
