On Wed, Apr 29, 2015 at 11:03:12AM +0100, Rebecca N. Palmer wrote:
-61,[8] +62[,8] means the following block adds one more line:
No, that means the _preceding_ block(s) add one more line, which they do.
oops, the second number indicates the lines. But it still fails to be applied.
even use the
The chv's backend is almost same as bdw. But some long register restrictions:
1. ARF registers must never be used with 64b datatype.
2. Source and Destination horizontal stride must be aligned to the same qword.
3. Source and Destination offset must be the same, except the case of scalar
source.
From: Meng Mengmeng mengmeng.m...@intel.com
Cherryview's EU configurations is not decided by pciid, must get from kernel by
libdrm.
Thanks for Jeff adding this support in the kernel and libdrm.
V2: Add the warning when can't get configurations.
Signed-off-by: Yang Rong rong.r.y...@intel.com
---
From: Meng Mengmeng mengmeng.m...@intel.com
Cherryview's EU configurations is not decided by pciid, must get from kernel by
libdrm.
Thanks for Jeff adding this support in the kernel and libdrm.
V2: Add the warning when can't get configurations.
Signed-off-by: Yang Rong rong.r.y...@intel.com
---
The chv's backend is almost same as bdw. But some long register restrictions:
1. ARF registers must never be used with 64b datatype.
2. Source and Destination horizontal stride must be aligned to the same qword.
3. Source and Destination offset must be the same, except the case of scalar
source.
From: Luo Xionghu xionghu@intel.com
api ungrade for opencl-2.0.
set sampler normalized_coords default value per spec.
the CL_SAMPLER_NORMALIZED_COORDS should be CL_FALSE for these cases.
v2: icd entry update for opencl-2.0.
Signed-off-by: Luo Xionghu xionghu@intel.com
---
src/cl_api.c
From: Luo Xionghu xionghu@intel.com
Signed-off-by: Luo Xionghu xionghu@intel.com
---
src/cl_khr_icd.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/cl_khr_icd.c b/src/cl_khr_icd.c
index f9b91ae..13514c4 100644
--- a/src/cl_khr_icd.c
+++ b/src/cl_khr_icd.c
@@ -115,7 +115,11
From: Luo Xionghu xionghu@intel.com
v2: add this icd entry for opencl 2.0 special API.
Signed-off-by: Luo Xionghu xionghu@intel.com
---
src/cl_khr_icd.c | 81 +++-
1 file changed, 80 insertions(+), 1 deletion(-)
diff --git
The patch looks better than mine, I think we can merge this patch into master.
Any comments?
Compare with tgamma instead of tgammaf for better accuracy.
Include negative inputs, and handle the resulting denormals.
Print maximum error found.
Signed-off-by: Rebecca Palmer
The patch LGTM too, but the patch seems broken for me, could you check
and send a new version?
Thanks,
Zhigang Gong.
On Wed, Apr 29, 2015 at 08:18:18AM +, Song, Ruiling wrote:
The patch looks better than mine, I think we can merge this patch into
master. Any comments?
Just as you want to start any X application in a text console, you need to set
the proper DISPLAY environment.
Usually, export DISPLAY=:0 should work.
CC to the list.
-Original Message-
From: Gao, Sanshan [mailto:g...@mail.ustc.edu.cn]
Sent: Wednesday, April 29, 2015 5:13 PM
To:
On Tue, Apr 28, 2015 at 10:03:17PM +0100, Rebecca N. Palmer wrote:
From http://www.freedesktop.org/wiki/Software/Beignet/ :
Based on our test result, LLVM 3.5 has best pass rate on all the test
suites. Compare to LLVM 3.5, LLVM 3.6 has slightly lower pass rate(caused by
one front end bug at
On Tue, Apr 28, 2015 at 07:36:39PM +0100, Rebecca N. Palmer wrote:
Given that really fixing shared local memory on Haswell is likely
to take some time, at least make it an explicit error that points
the user to the kernel patch, instead of returning success
without actually doing the
You may need a completely clean rebuild which need to delete all the old files.
On Wed, Apr 29, 2015 at 02:43:05PM +0800, Gao, Sanshan wrote:
When I run any OpenCL programs, I need root privilege
You shouldn't; you may have accidentally built beignet without X support.
Run
sudo
When I run any OpenCL programs, I need root privilege
You shouldn't; you may have accidentally built beignet without X support. Run
sudo apt-get install cmake pkg-config python ocl-icd-dev ocl-icd-opencl-dev
libdrm-dev libxfixes-dev libxext-dev llvm-3.5-dev clang-3.5 libclang-3.5-dev
After revert the beignet's atomic in l3 patch [9e8874c ?], the
i915.enable_ppgtt=2 should work for HSW platform.
If it's that easy to really fix this, I agree we should do so; I'd taken
the absence of anything other than patch the kernel in the
documentation to mean that no other fix was
On Wed, Apr 29, 2015 at 11:07:04AM +0100, Rebecca N. Palmer wrote:
On 29/04/15 08:54, Zhigang Gong wrote:
The patch LGTM too, but the patch seems broken for me, could you check
and send a new version?
Don't know what's wrong with this one: what error do you get?
The same as the other patches.
On 29/04/15 08:54, Zhigang Gong wrote:
The patch LGTM too, but the patch seems broken for me, could you check
and send a new version?
Don't know what's wrong with this one: what error do you get?
Compare with tgamma instead of tgammaf for better accuracy.
Include negative inputs, and handle
-61,[8] +62[,8] means the following block adds one more line:
No, that means the _preceding_ block(s) add one more line, which they do.
raise
all_vector = 1,2,3,4,8,16
There was a space-only line between these: has the email system lost it?
Make the build scripts work in both Python
On 29/04/15 10:11, Zhigang Gong wrote:
Actually, almost all the patches you sent out have similar problem and
I had manually applied them line by line before. I think it's better to
find out the root cause.
This works fine. Thanks.
On Wed, Apr 29, 2015 at 11:26:41AM +0100, Rebecca N. Palmer wrote:
On 29/04/15 10:11, Zhigang Gong wrote:
Actually, almost all the patches you sent out have similar problem and
I had manually applied them line by line before. I think it's better to
find out the
-Original Message-
From: Beignet [mailto:beignet-boun...@lists.freedesktop.org] On Behalf Of
Rebecca N. Palmer
Sent: Wednesday, April 29, 2015 8:13 PM
To: beignet@lists.freedesktop.org
Subject: Re: [Beignet] Haswell issues
After revert the beignet's atomic in l3 patch [9e8874c
Andi,
Thanks for your comments and that makes sense for me, just check kernel version
is not
an ideal method for those unofficial kernels with back porting patches. Then we
have the
following open questions in my mind:
How do we check whether the i915 KMD support secure batch buffer
Zhigang Gong zhigang.g...@linux.intel.com writes:
but I don't have the hardware to try it.
We will do some testing on this. And once we get the exact version, I will
submit a
new patch to give some warn if the user is using an unsupported kernel. As
now we
have better solution than patch
Signed-off-by: Ruiling Song ruiling.s...@intel.com
---
backend/src/ir/immediate.hpp | 12 ++--
backend/src/llvm/llvm_gen_backend.cpp | 2 +-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/backend/src/ir/immediate.hpp b/backend/src/ir/immediate.hpp
index
Signed-off-by: Ruiling Song ruiling.s...@intel.com
---
backend/src/backend/gen7_encoder.cpp | 1 -
backend/src/backend/gen8_encoder.cpp | 1 -
2 files changed, 2 deletions(-)
diff --git a/backend/src/backend/gen7_encoder.cpp
b/backend/src/backend/gen7_encoder.cpp
index a7d132c..fc358be 100644
As we are going to support dynamic bti, it is impossible
to add the bti dependency. so just use one bti dependency,
that is to say, we don't change the memory instruction sequence
in instruction scheduler.
Signed-off-by: Ruiling Song ruiling.s...@intel.com
---
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